; -------------------------------------------------------------------------------- ; @Title: LPC2917/19/21/23/25/26/30/39 On-Chip Peripherals ; @Props: Released ; @Author: BOB, CIN, MAR ; @Changelog: ; 2008-12-01 MAR ; 2010-11-19 MAR ; @Manufacturer: NXP - NXP Semiconductors ; @Doc: UM10316.pdf Rev. 3 (2010-10-19) ; user.manual.lpc2917.01.lpc2919.01.lpc29xx.pdf Rev. 00.06 (2008-12-17) ; DDI0311.pdf; DDI0165B_9ES_trm.pdf ; @Core: ARM968E-S ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perlpc29xx.per 7592 2017-02-18 13:54:14Z askoncej $ config 16. 8. width 0xb base ad:0x0 sif (cpuis("LPC29*")) sif (cpu()=="LPC2915") tree "ARM Core Registers" width 9. tree "ID Registers" rgroup.long c15:0x0000--0x0000 line.long 0x0 "MIDR,Identity Code" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer" hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Major Specification Revision" hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Minor Specification Revision" rgroup.long c15:0x200--0x200 line.long 0x0 "TCMCFG ,Tightly Coupled Memory Size Configuraton" bitfld.long 0x0 18.--22. " DTCM , Data TCM Size" "0,1kB,2kB,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserve,?..." bitfld.long 0x0 14. " DTCM , Data TCM Exists" "Yes,No" textline " " bitfld.long 0x0 6.--10. " ITCM , Instruction TCM Size" "0,1kB,2kB,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserve,?..." bitfld.long 0x0 2. " ITCM , Instruction TCM Exists" "Yes,No" tree.end width 9. tree "System Configuration and Control" group.long c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 15. " LT ,Configure Loading TBIT" "Enable,Disable" bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction SRAM Enable" "Disable,Enable" textline " " bitfld.long 0x0 7. " B ,Endianism" "Little,Big" bitfld.long 0x0 3. " W ,Write Buffer" "Disable,Enable" bitfld.long 0x0 2. " D ,Data SRAM Enable" "Disable,Enable" textline " " bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable" group.long c15:0x101f--0x101f line.long 0x0 "CCR,Configuration Control Register" bitfld.long 0x0 18. " I ,ITCM Order Bit" "Not stalled,Stalled" bitfld.long 0x0 17. " D ,DTCM Order Bit" "Not stalled,Stalled" bitfld.long 0x0 16. " B ,AHB Instruction Prefetch Buffer Disable Bit" "No,Yes" textline " " bitfld.long 0x0 2. " FM ,Stalling Core when FIQ and ETM FIFOFULL" "Not stalled,Stalled" bitfld.long 0x0 1. " IM ,Stalling Core when IRQ and ETM FIFOFULL" "Not stalled,Stalled" group.long c15:0x010d--0x010d line.long 0x0 "CONTEXT,Trace Process ID Register" tree.end width 9. tree "ICEbreaker" group.long ice:0x0--0x0 "Debug Control" line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "No,Yes" bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "Disabled,Enabled" bitfld.long 0x0 0x3 " STEP ,Single Step" "Disabled,Enabled" textline " " bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "No,Yes" bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "No,Yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "No,Yes" rgroup.long ice:0x1--0x1 line.long 0x0 "DBGSTAT,Debug Status Register" bitfld.long 0x0 0x4 " ITBIT ,ITBIT" "0,Thumb" bitfld.long 0x0 0x3 " SYSCOMP ,SYSCOMP" "0,1" bitfld.long 0x0 0x2 " IFEN ,Interrupts Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "No,Yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "No,Yes" group.long ice:0x2--0x2 line.long 0x0 "VECTOR,Vector Catch Register" bitfld.long 0x0 0x7 " FIQ ,FIQ" "Disabled,Enabled" bitfld.long 0x0 0x6 " IRQ ,IRQ" "Disabled,Enabled" bitfld.long 0x0 0x4 " D_ABO ,D_ABORT" "Disabled,Enabled" textline " " bitfld.long 0x0 0x3 " P_ABO ,P_ABORT" "Disabled,Enabled" bitfld.long 0x0 0x2 " SWI ,SWI" "Disabled,Enabled" bitfld.long 0x0 0x1 " UND ,UNDEF" "Disabled,Enabled" textline " " bitfld.long 0x0 0x0 " RES ,RESET" "Disabled,Enabled" rgroup.long ice:0x4--0x4 line.long 0x0 "COMCTRL,Debug Communication Control Register" bitfld.long 0x0 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x0 0x1 " W ,Write Register Free" "Idle,Pending" bitfld.long 0x0 0x0 " R ,Read Register Free" "Idle,Pending" group.long ice:0x5--0x5 line.long 0x0 "COMDATA,Debug Communication Data Register" group.long ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "Disabled,Enabled" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0,1" bitfld.long 0x10 0x5 " DBGEXT ,Depentend from EXTERN Signal" "0,1" bitfld.long 0x10 0x4 " DnTRANS ,CPU Mode" "User,No User" bitfld.long 0x10 0x1--0x2 " DMAS ,Access Size" "Byte,Word,Long,?..." bitfld.long 0x10 0x0 " DnRW ,Read/Write" "R,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "Enabled,Disabled" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "Enabled,Disabled" bitfld.long 0x14 0x5 " DBGEXT ,Depentend from EXTERN Signal" "Enabled,Disabled" bitfld.long 0x14 0x4 " DnTRANS ,CPU Mode" "Enabled,Disabled" bitfld.long 0x14 0x1--0x2 " DMAS ,Access Size" "Enabled,Reserved,Reserved,Disabled" bitfld.long 0x14 0x0 " DnRW ,Read/Write" "Enabled,Disabled" group.long ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "Disabled,Enabled" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0,1" bitfld.long 0x10 0x5 " DBGEXT ,Depentend from EXTERN Signal" "0,1" bitfld.long 0x10 0x4 " DnTRANS ,CPU Mode" "User,No User" bitfld.long 0x10 0x1--0x2 " DMAS ,Access Size" "Byte,Word,Long,?..." bitfld.long 0x10 0x0 " DnRW ,Read/Write" "R,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "Enabled,Disabled" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "Enabled,Disabled" bitfld.long 0x14 0x5 " DBGEXT ,Depentend from EXTERN Signal" "Enabled,Disabled" bitfld.long 0x14 0x4 " DnTRANS ,CPU Mode" "Enabled,Disabled" bitfld.long 0x14 0x1--0x2 " DMAS ,Access Size" "Enabled,Reserved,Reserved,Disabled" bitfld.long 0x14 0x0 " DnRW ,Read/Write" "Enabled,Disabled" tree.end width 0xb tree.end else tree "ARM Core Registers" width 9. tree "ID Registers" rgroup.long c15:0x0000--0x0000 line.long 0x0 "MIDR,Identity Code" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer" hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Major Specification Revision" hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Minor Specification Revision" rgroup.long c15:0x200--0x200 line.long 0x0 "TCMCFG ,Tightly Coupled Memory Size Configuraton" bitfld.long 0x0 18.--22. " DTCM , Data TCM Size" "0,1kB,2kB,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserve,?..." bitfld.long 0x0 14. " DTCM , Data TCM Exists" "Yes,No" textline " " bitfld.long 0x0 6.--10. " ITCM , Instruction TCM Size" "0,1kB,2kB,4kB,8kB,16kB,32kB,64kB,128kB,256kB,512kB,1MB,2MB,4MB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserve,?..." bitfld.long 0x0 2. " ITCM , Instruction TCM Exists" "Yes,No" tree.end width 9. tree "System Configuration and Control" group.long c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 15. " LT ,Configure Loading TBIT" "Enable,Disable" bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction SRAM Enable" "Disable,Enable" textline " " bitfld.long 0x0 7. " B ,Endianism" "Little,Big" bitfld.long 0x0 3. " W ,Write Buffer" "Disable,Enable" bitfld.long 0x0 2. " D ,Data SRAM Enable" "Disable,Enable" textline " " bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable" group.long c15:0x101f--0x101f line.long 0x0 "CCR,Configuration Control Register" bitfld.long 0x0 18. " I ,ITCM Order Bit" "Not stalled,Stalled" bitfld.long 0x0 17. " D ,DTCM Order Bit" "Not stalled,Stalled" bitfld.long 0x0 16. " B ,AHB Instruction Prefetch Buffer Disable Bit" "No,Yes" textline " " bitfld.long 0x0 2. " FM ,Stalling Core when FIQ and ETM FIFOFULL" "Not stalled,Stalled" bitfld.long 0x0 1. " IM ,Stalling Core when IRQ and ETM FIFOFULL" "Not stalled,Stalled" group.long c15:0x010d--0x010d line.long 0x0 "CONTEXT,Trace Process ID Register" tree.end width 9. tree "ICEbreaker" group.long ice:0x0--0x0 "Debug Control" line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "No,Yes" bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "Disabled,Enabled" bitfld.long 0x0 0x3 " STEP ,Single Step" "Disabled,Enabled" textline " " bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "No,Yes" bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "No,Yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "No,Yes" rgroup.long ice:0x1--0x1 line.long 0x0 "DBGSTAT,Debug Status Register" bitfld.long 0x0 0x4 " ITBIT ,ITBIT" "0,Thumb" bitfld.long 0x0 0x3 " SYSCOMP ,SYSCOMP" "0,1" bitfld.long 0x0 0x2 " IFEN ,Interrupts Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "No,Yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "No,Yes" group.long ice:0x2--0x2 line.long 0x0 "VECTOR,Vector Catch Register" bitfld.long 0x0 0x7 " FIQ ,FIQ" "Disabled,Enabled" bitfld.long 0x0 0x6 " IRQ ,IRQ" "Disabled,Enabled" bitfld.long 0x0 0x4 " D_ABO ,D_ABORT" "Disabled,Enabled" textline " " bitfld.long 0x0 0x3 " P_ABO ,P_ABORT" "Disabled,Enabled" bitfld.long 0x0 0x2 " SWI ,SWI" "Disabled,Enabled" bitfld.long 0x0 0x1 " UND ,UNDEF" "Disabled,Enabled" textline " " bitfld.long 0x0 0x0 " RES ,RESET" "Disabled,Enabled" rgroup.long ice:0x4--0x4 line.long 0x0 "COMCTRL,Debug Communication Control Register" bitfld.long 0x0 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x0 0x1 " W ,Write Register Free" "Idle,Pending" bitfld.long 0x0 0x0 " R ,Read Register Free" "Idle,Pending" group.long ice:0x5--0x5 line.long 0x0 "COMDATA,Debug Communication Data Register" group.long ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "Disabled,Enabled" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0,1" bitfld.long 0x10 0x5 " DBGEXT ,Depentend from EXTERN Signal" "0,1" bitfld.long 0x10 0x4 " DnTRANS ,CPU Mode" "User,No User" bitfld.long 0x10 0x1--0x2 " DMAS ,Access Size" "Byte,Word,Long,?..." bitfld.long 0x10 0x0 " DnRW ,Read/Write" "R,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "Enabled,Disabled" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "Enabled,Disabled" bitfld.long 0x14 0x5 " DBGEXT ,Depentend from EXTERN Signal" "Enabled,Disabled" bitfld.long 0x14 0x4 " DnTRANS ,CPU Mode" "Enabled,Disabled" bitfld.long 0x14 0x1--0x2 " DMAS ,Access Size" "Enabled,Reserved,Reserved,Disabled" bitfld.long 0x14 0x0 " DnRW ,Read/Write" "Enabled,Disabled" group.long ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "Disabled,Enabled" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0,1" bitfld.long 0x10 0x5 " DBGEXT ,Depentend from EXTERN Signal" "0,1" bitfld.long 0x10 0x4 " DnTRANS ,CPU Mode" "User,No User" bitfld.long 0x10 0x1--0x2 " DMAS ,Access Size" "Byte,Word,Long,?..." bitfld.long 0x10 0x0 " DnRW ,Read/Write" "R,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "Enabled,Disabled" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "Enabled,Disabled" bitfld.long 0x14 0x5 " DBGEXT ,Depentend from EXTERN Signal" "Enabled,Disabled" bitfld.long 0x14 0x4 " DnTRANS ,CPU Mode" "Enabled,Disabled" bitfld.long 0x14 0x1--0x2 " DMAS ,Access Size" "Enabled,Reserved,Reserved,Disabled" bitfld.long 0x14 0x0 " DnRW ,Read/Write" "Enabled,Disabled" tree.end width 0xb tree.end tree.open "CGU (Clock Generation Unit)" tree "CGU 0" base ad:0xFFFF8000 width 9. group.long 0x14++0x3 line.long 0x0 "FREQ_MON,Frequency monitor register" hexmask.long.byte 0x0 24.--31. 1. " CLK_SEL ,Clock-source selection for the clock to be measured" bitfld.long 0x0 23. " MEAS ,Measure frequency" "Disabled,Enabled" textline " " hexmask.long.word 0x0 9.--22. 1. " FCNT ,Selected clock-counter value" hexmask.long.word 0x0 0.--8. 1. " RCNT ,Reference clock-counter value" rgroup.long 0x18++0x3 line.long 0x0 "RDET,Clock detection register" bitfld.long 0x0 11. " FDIV6_PRESENT ,Activity-detection register for FDIV 6" "Not present,Present" bitfld.long 0x0 10. " FDIV5_PRESENT ,Activity-detection register for FDIV 5" "Not present,Present" textline " " bitfld.long 0x0 9. " FDIV4_PRESENT ,Activity-detection register for FDIV 4" "Not present,Present" bitfld.long 0x0 8. " FDIV3_PRESENT ,Activity-detection register for FDIV 3" "Not present,Present" textline " " bitfld.long 0x0 7. " FDIV2_PRESENT ,Activity-detection register for FDIV 2" "Not present,Present" bitfld.long 0x0 6. " FDIV1_PRESENT ,Activity-detection register for FDIV 1" "Not present,Present" textline " " bitfld.long 0x0 5. " FDIV0_PRESENT ,Activity-detection register for FDIV 0" "Not present,Present" bitfld.long 0x0 4. " PLL240_PRESENT ,Activity-detection register for 240x-shifted PLL output" "Not present,Present" textline " " bitfld.long 0x0 3. " PLL120_PRESENT ,Activity-detection register for 120x-shifted PLL output" "Not present,Present" bitfld.long 0x0 2. " PLL_PRESENT ,Activity-detection register for normal PLL output" "Not present,Present" textline " " bitfld.long 0x0 1. " XTAL_PRESENT ,Activity-detection register for crystal-oscillator output" "Not present,Present" bitfld.long 0x0 0. " LP_OSC_PRESENT ,Activity-detection register for LP_OSC" "Not present,Present" width 18. rgroup.long 0x1c++0x3 line.long 0x0 "XTAL_OSC_STATUS,Crystal-oscillator status register" bitfld.long 0x00 2. " HF ,Oscillator HF pin" "Low-frequency,High-frequency" bitfld.long 0x00 1. " BYPASS ,Configure crystal operation or external clock" "Crystal,External" textline " " bitfld.long 0x00 0. " ENABLE ,Oscillator-pad enable" "Power-down,Enabled" group.long 0x20++0x3 line.long 0x0 "XTAL_OSC_CONTROL,Crystal-oscillator control register" bitfld.long 0x00 2. " HF ,Oscillator HF pin" "Low-frequency,High-frequency" bitfld.long 0x00 1. " BYPASS ,Configure crystal operation or external clock" "Crystal,External" textline " " bitfld.long 0x00 0. " ENABLE ,Oscillator-pad enable" "Power-down,Enabled" rgroup.long 0x24++0x3 line.long 0x0 "PLL_STATUS,PLL status register" bitfld.long 0x00 0. " LOCK ,Indicates if the PLL is in lock or not" "Not in lock,In lock" group.long 0x28++0x3 line.long 0x0 "PLL_CONTROL,PLL control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Clock-source Selection for clock generator to be connected to the input of the PLL" hexmask.long.byte 0x00 16.--23. 1. " MSEL ,Enables auto-blocking of clock when programming changes" textline " " bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 8.--9. " PSEL ,Post-divider division ratio" "2,4,8,16" textline " " bitfld.long 0x00 7. " DIRECT ,Direct CCO clock output control" "Post-divider,Directly" bitfld.long 0x00 2. " P23EN ,Three-phase output mode control" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BYPASS ,Input-clock bypass control" "CCO,PLL input " bitfld.long 0x00 0. " PD ,Power-down control" "Normal,Power-down" rgroup.long 0x2C++0x3 line.long 0x0 "FDIV_STATUS_0,FDIV 0 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 0" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x30++0x3 line.long 0x0 "FDIV_CONTROL_0,FDIV 0 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 0" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x34++0x3 line.long 0x0 "FDIV_STATUS_1,FDIV 1 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 1" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x38++0x3 line.long 0x0 "FDIV_CONTROL_1,FDIV 1 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 1" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x3C++0x3 line.long 0x0 "FDIV_STATUS_2,FDIV 2 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 2" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x40++0x3 line.long 0x0 "FDIV_CONTROL_2,FDIV 2 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 2" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x44++0x3 line.long 0x0 "FDIV_STATUS_3,FDIV 3 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 3" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x48++0x3 line.long 0x0 "FDIV_CONTROL_3,FDIV 3 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 3" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x4C++0x3 line.long 0x0 "FDIV_STATUS_4,FDIV 4 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 4" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x50++0x3 line.long 0x0 "FDIV_CONTROL_4,FDIV 4 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 4" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x54++0x3 line.long 0x0 "FDIV_STATUS_5,FDIV 5 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 5" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x58++0x3 line.long 0x0 "FDIV_CONTROL_5,FDIV 5 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 5" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x5C++0x3 line.long 0x0 "FDIV_STATUS_6,FDIV 6 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 6" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" textline " " hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x60++0x3 line.long 0x0 "FDIV_CONTROL_6,FDIV 6 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 6" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" rgroup.long 0x64++0x3 line.long 0x0 "SAFE_CLK_STATUS,Output-clock status register for BASE_SAFE_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" group.long 0x68++0x3 line.long 0x0 "SAFE_CLK_CONF,Output-clock configuration register for BASE_SAFE_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" rgroup.long 0x6c++0x3 line.long 0x0 "SYS_CLK_STATUS,Output-clock status register for BASE_SYS_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x70++0x3 line.long 0x0 "SYS_CLK_CONF,Output-clock configuration register for BASE_SYS_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x74++0x3 line.long 0x0 "PCR_CLK_STATUS,Output-clock status register for BASE_PCR_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" group.long 0x78++0x3 line.long 0x0 "PCR_CLK_CONF,Output-clock configuration register for BASE_PCR_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" rgroup.long 0x7C++0x3 line.long 0x0 "IVNSS_CLK_STATUS,Output-clock status register for BASE_IVNSS_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x80++0x3 line.long 0x0 "IVNSS_CLK_CONF,Output-clock configuration register for BASE_IVNSS_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x84++0x3 line.long 0x0 "MSCSS_CLK_STATUS,Output-clock status register for BASE_MSCSS_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x88++0x3 line.long 0x0 "MSCSS_CLK_CONF,Output-clock configuration register for BASE_MSCSS_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x8C++0x3 line.long 0x0 "ICLK0_CLK_STATUS,Output-clock status register for BASE_ICLK0_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x90++0x3 line.long 0x0 "ICLK0_CLK_CONF,Output-clock configuration register for BASE_ICLK0_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x94++0x3 line.long 0x0 "UART_CLK_STATUS,Output-clock status register for BASE_UART_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x98++0x3 line.long 0x0 "UART_CLK_CONF,Output-clock configuration register for BASE_UART_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x9C++0x3 line.long 0x0 "SPI_CLK_STATUS,Output-clock status register for BASE_SPI_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0xA0++0x3 line.long 0x0 "SPI_CLK_CONF,Output-clock configuration register for BASE_SPI_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0xA4++0x3 line.long 0x0 "TMR_CLK_STATUS,Output-clock status register for BASE_TMR_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0xA8++0x3 line.long 0x0 "TMR_CLK_CONF,Output-clock configuration register for BASE_TMR_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0xAC++0x3 line.long 0x0 "ADC_CLK_STATUS,Output-clock status register for BASE_ADC_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0xB0++0x3 line.long 0x0 "ADC_CLK_CONF,Output-clock configuration register for BASE_ADC_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0xBC++0x3 line.long 0x0 "ICLK1_CLK_CONF,Output-clock configuration register for BASE_ICLK1_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0xC0++0x3 line.long 0x0 "ICLK1_CLK_STATUS,Output-clock status register for BASE_ICLK1_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" width 13. group.long 0xfe0++0x3 line.long 0x0 "INT_STATUS,Interrupt status register" setclrfld.long 0x0 11. 0xc 11. 0x8 11. " STATUS_FDIV6_set/clr ,Status of the FDIV6 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 10. 0xc 10. 0x8 10. " STATUS_FDIV5_set/clr ,Status of the FDIV5 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 9. 0xc 9. 0x8 9. " STATUS_FDIV4_set/clr ,Status of the FDIV4 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 8. 0xc 8. 0x8 8. " STATUS_FDIV3_set/clr ,Status of the FDIV3 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 7. 0xc 7. 0x8 7. " STATUS_FDIV2_set/clr ,Status of the FDIV2 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 6. 0xc 6. 0x8 6. " STATUS_FDIV1_set/clr ,Status of the FDIV1 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 5. 0xc 5. 0x8 5. " STATUS_FDIV0_set/clr ,Status of the FDIV0 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 4. 0xc 4. 0x8 4. " STATUS_PL160M240_set/clr ,Status of the PL160M240 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 3. 0xc 3. 0x8 3. " STATUS_PL160M120_set/clr ,Status of the PL160M120 interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 2. 0xc 2. 0x8 2. " STATUS_PL160M_set/clr ,Status of the PL160M interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 1. 0xc 1. 0x8 1. " STATUS_CRYSTAL_set/clr ,Status of the Crystal interrupt event" "Not occurred,Occurred" textline " " setclrfld.long 0x0 0. 0xc 0. 0x8 0. " STATUS_LP_OSC_set/clr ,Status of the LP_OSC interrupt event" "Not occurred,Occurred" group.long 0xfe4++0x3 line.long 0x0 "INT_ENABLE,interrupt enable register" setclrfld.long 0x0 11. -0x8 11. -0xc 11. " ENABLE_FDIV6_set/clr ,Enables generation of FDIV6 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 10. -0x8 10. -0xc 10. " ENABLE_FDIV5_set/clr ,Enables generation of FDIV5 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 9. -0x8 10. -0xc 10. " ENABLE_FDIV4_set/clr ,Enables generation of FDIV4 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 8. -0x8 8. -0xc 8. " ENABLE_FDIV3_set/clr ,Enables generation of FDIV3 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 7. -0x8 7. -0xc 7. " ENABLE_FDIV2_set/clr ,Enables generation of FDIV2 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 6. -0x8 6. -0xc 6. " ENABLE_FDIV1_set/clr ,Enables generation of FDIV1 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 5. -0x8 5. -0xc 5. " ENABLE_FDIV0_set/clr ,Enables generation of FDIV0 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 4. -0x8 4. -0xc 4. " ENABLE_PL160M240_set/clr ,Enables generation of PL160M240 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 3. -0x8 3. -0xc 3. " ENABLE_PL160M120_set/clr ,Enables generation of PL160M120 interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 2. -0x8 2. -0xc 2. " ENABLE_PL160M_set/clr ,Enables generation of PL160M interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 1. -0x8 1. -0xc 1. " ENABLE_CRYSTAL_set/clr ,Enables generation of Crystal interrupt requests" "Disabled,Enabled" textline " " setclrfld.long 0x0 0. -0x8 0. -0xc 0. " ENABLE_LP_OSC_set/clr ,Enables generation of LP_OSC interrupt requests" "Disabled,Enabled" group.long 0xff4++0x3 line.long 0x0 "BUS_DISABLE,Bus disable register" bitfld.long 0x00 0. " RRBUS ,Bus write-disable bit" "Normal,No writes" width 0xB tree.end tree "CGU 1" base ad:0xFFFFB000 width 10. group.long 0x14++0x3 line.long 0x0 "FREQ_MON,Frequency monitor register" hexmask.long.byte 0x0 24.--31. 1. " CLK_SEL ,Clock-source selection for the clock to be measured" bitfld.long 0x0 23. " MEAS ,Measure frequency" "Disabled,Enabled" textline " " hexmask.long.word 0x0 9.--22. 1. " FCNT ,Selected clock-counter value" hexmask.long.word 0x0 0.--8. 1. " RCNT ,Reference clock-counter value" rgroup.long 0x18++0x7 line.long 0x0 "RDET,Clock detection register" bitfld.long 0x0 5. " FDIV0_PRESENT ,Activity-detection register for FDIV 0" "Not present,Present" bitfld.long 0x0 4. " PLL240_PRESENT ,Activity-detection register for 240x-shifted PLL output" "Not present,Present" textline " " bitfld.long 0x0 3. " PLL120_PRESENT ,Activity-detection register for 120x-shifted PLL output" "Not present,Present" bitfld.long 0x0 2. " PLL_PRESENT ,Activity-detection register for normal PLL output" "Not present,Present" textline " " bitfld.long 0x0 1. " BASE_ICLK0_CLK_PRESENT ,Activity-detection register for crystal-oscillator output" "Not present,Present" bitfld.long 0x0 0. " BASE_ICLK1_CLK_PRESENT ,Activity-detection register for LP_OSC" "Not present,Present" width 15. line.long 0x4 "PLL_STATUS,PLL status register" bitfld.long 0x04 0. " LOCK ,Indicates if the PLL is in lock or not" "In lock,Not in lock" group.long 0x20++0x3 line.long 0x0 "PLL_CONTROL,PLL control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Clock-source Selection for clock generator to be connected to the input of the PLL" hexmask.long.byte 0x00 16.--23. 1. " MSEL ,Enables auto-blocking of clock when programming changes" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " PSEL ,Post-divider division ratio" "2,4,8,16" bitfld.long 0x00 7. " DIRECT ,Direct CCO clock output control" "Post-divider,Directly" bitfld.long 0x00 2. " P23EN ,Three-phase output mode control" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BYPASS ,Input-clock bypass control" "CCO,PLL input " bitfld.long 0x00 0. " PD ,Power-down control" "Normal,Power-down" rgroup.long 0x24++0x3 line.long 0x0 "FDIV_STATUS_0,FDIV 0 frequency-divider status register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 0" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" group.long 0x28++0x3 line.long 0x0 "FDIV_CONTROL_0,FDIV 0 frequency-divider control register" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock for FDIV 0" hexmask.long.word 0x00 12.--23. 1. " LOAD ,Load value" hexmask.long.word 0x00 0.--11. 1. " DENOMINATOR ,Denominator or modulo value" width 20. rgroup.long 0x2C++0x3 line.long 0x0 "USB_CLK_STATUS,Output-clock status register for BASE_USB_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x30++0x3 line.long 0x0 "USB_CLK_CONF,Output-clock configuration register for BASE_USB_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x34++0x3 line.long 0x0 "USB_I2C_CLK_STATUS,Output-clock status register for BASE_USB_I2C_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x38++0x3 line.long 0x0 "USB_I2C_CLK_CONF,Output-clock configuration register for BASE_USB_I2C_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" rgroup.long 0x3C++0x3 line.long 0x0 "OUT_CLK_STATUS,Output-clock status register for BASE_OUT_CLK" bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 1. " RTX ,Clock-disable polarity" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0x40++0x3 line.long 0x0 "OUT_CLK_CONF,Output-clock configuration register for BASE_OUT_CLK" hexmask.long.byte 0x00 24.--31. 1. " CLK_SEL ,Selected source clock" bitfld.long 0x00 11. " AUTOBLOK ,Enables auto-blocking of clock when programming changes" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--4. " IDIV ,Integer divide value" "1,2,3,4,5,6,7,8" bitfld.long 0x00 0. " PD ,Power-down clock slice" "Normal,Power-down" group.long 0xff4++0x3 line.long 0x0 "BUS_DISABLE,Bus disable register" bitfld.long 0x00 0. " RRBUS ,Bus write-disable bit" "Normal,No writes" width 0xB tree.end tree.end tree "RGU (Reset Generation Unit)" base ad:0xffff9000 width 15. wgroup.long 0x100++0x7 line.long 0x0 "RESET_CTRL0,Reset control register 0" bitfld.long 0x00 4. " WARM_RST_CTRL ,Activate WARM_RST" "Not activated,Activated" bitfld.long 0x00 3. " COLD_RST_CTRL ,Activate COLD_RST" "Not activated,Activated" textline " " bitfld.long 0x00 2. " PCR_RST_CTRL ,Activate PCR_RST" "Not activated,Activated" bitfld.long 0x00 1. " RGU_RST_CTRL ,Activate RGU_RST" "Not activated,Activated" line.long 0x4 "RESET_CTRL1,Reset control register 1" bitfld.long 0x04 29. " AHB_RST_CTRL ,Activate AHB_RST" "Not activated,Activated" bitfld.long 0x04 28. " VIC_RST_CTRL ,Activate VIC_RST" "Not activated,Activated" textline " " bitfld.long 0x04 23. " DMA_RST_CTRL ,Activate DMA_RST" "Not activated,Activated" sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x04 24. " USB,Activate USB_RST" "Not activated,Activated" endif textline " " bitfld.long 0x04 23. " DMA_RST_CTRL ,Activate DMA_RST" "Not activated,Activated" bitfld.long 0x04 22. " MSCSS_QEI_RST_CTRL ,Activate MSCSS_QEI_RST" "Not activated,Activated" bitfld.long 0x04 21. " IVNSS_I2C_RST_CTRL ,Activate IVNSS_I2C_RST" "Not activated,Activated" textline " " bitfld.long 0x04 20. " MSCSS_TMR_RST_CTRL ,Activate MSCSS_TMR_RST" "Not activated,Activated" bitfld.long 0x04 19. " MSCSS_ADC_RST_CTRL ,Activate MSCSS_ADC_RST" "Not activated,Activated" textline " " bitfld.long 0x04 18. " MSCSS_PWM_RST_CTRL ,Activate MSCSS_PWM_RST" "Not activated,Activated" bitfld.long 0x04 17. " MSCSS_A2V_RST_CTRL ,Activate MSCSS_A2V_RST" "Not activated,Activated" textline " " bitfld.long 0x04 16. " IVNSS_LIN_RST_CTRL ,Activate IVNSS_LIN_RST" "Not activated,Activated" bitfld.long 0x04 15. " IVNSS_CAN_RST_CTRL ,Activate IVNSS_CAN_RST" "Not activated,Activated" textline " " bitfld.long 0x04 14. " IVNSS_A2V_RST_CTRL ,Activate IVNSS_A2V_RST" "Not activated,Activated" bitfld.long 0x04 13. " SPI_RST_CTRL ,Activate SPI_RST" "Not activated,Activated" textline " " bitfld.long 0x04 12. " TMR_RST_CTRL ,Activate TMR_RST" "Not activated,Activated" bitfld.long 0x04 11. " UART_RST_CTRL ,Activate UART_RST" "Not activated,Activated" textline " " bitfld.long 0x04 10. " GPIO_RST_CTRL ,Activate GPIO_RST" "Not activated,Activated" bitfld.long 0x04 9. " PESS_A2V_RST_CTRL ,Activate PESS_A2V_RST" "Not activated,Activated" textline " " bitfld.long 0x04 8. " GESS_A2V_RST_CTRL ,Activate GESS_A2V_RST" "Not activated,Activated" bitfld.long 0x04 6. " SMC_RST_CTRL ,Activate SMC_RST" "Not activated,Activated" textline " " bitfld.long 0x04 5. " EMC_RST_CTRL ,Activate EMC_RST" "Not activated,Activated" bitfld.long 0x04 4. " FMC_RST_CTRL ,Activate FMC_RST" "Not activated,Activated" textline " " bitfld.long 0x04 1. " CFID_RST_CTRL ,Activate CFID_RST" "Not activated,Activated" bitfld.long 0x04 0. " SCU_RST_CTRL ,Activate SCU_RST" "Not activated,Activated" group.long 0x110++0xf line.long 0x0 "RESET_STATUS0,Reset status register 0" bitfld.long 0x00 8.--9. " WARM_RST_STAT ,Status of warm reset" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 6.--7. " COLD_RST_STAT ,Status of cold reset" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 4.--5. " PCR_RST_STAT ,Status of PCRT reset" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 2.--3. " RGU_RST_STAT ,Status of RGU reset" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 0.--1. " POR_RST_STAT ,Status of POR reset" "No reset,Power On Reset,Reserved,Reset control register" hgroup.long 0x114++0x3 hide.long 0x00 "RESET_STATUS1,Reset status register 1" group.long 0x118++0x7 line.long 0x00 "RESET_STATUS2,Reset status register 2" bitfld.long 0x00 30.--31. " IVNSS_CAN_RST_STAT ,Reset IVNSS CAN status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 28.--29. " IVNSS_A2V_RST_STAT ,Reset IVNSS AHB2APB status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 26.--27. " SPI_RST_STAT ,Reset SPI status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 24.--25. " TMR_RST_STAT ,Reset Timer status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 22.--23. " UART_RST_STAT ,Reset UART status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 20.--21. " GPIO_RST_STAT ,Reset GPIO status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 18.--19. " PESS_A2V_RST_STAT ,Reset PeSS AHB2APB status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 16.--17. " GESS_A2V_RST_STAT ,Reset GeSS AHB2APB status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 12.--13. " SMC_RST_STAT ,Reset SMC status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 10.--11. " EMC_RST_STAT ,Reset EMC status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 8.--9. " FMC_RST_STAT ,Reset FMC status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x00 2.--3. " CFID_RST_STAT ,Reset CFID status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x00 0.--1. " SCU_RST_STAT ,Reset SCU status" "No reset,Input reset to RGU,Reserved,Reset control register" line.long 0x04 "RESET_STATUS3,Reset status register 3" bitfld.long 0x04 26.--27. " AHB_RST_STAT ,Reset AHB status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x04 24.--25. " VIC_RST_STAT ,Reset INTC status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x04 16.--17. " USB_STAT ,Reset USB status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " endif bitfld.long 0x04 14.--15. " DMA_STAT ,Reset DMA status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x04 12.--13. " MSCSS_QEI_STAT ,Reset MSCSS QEI status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x04 10.--11. " IVNSCC_I2C_STAT ,Reset IVNSCC I2C status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x04 8.--9. " MSCSS_TMR_RST_STAT ,Reset MSCSS Timer status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x04 6.--7. " MSCSS_ADC_RST_STAT ,Reset MSCSS ADC status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x04 4.--5. " MSCSS_PWM_RST_STAT ,Reset MSCSS PWM status" "No reset,Input reset to RGU,Reserved,Reset control register" textline " " bitfld.long 0x04 2.--3. " MSCSS_A2V_RST_STAT ,Reset MSCSS AHB2APB status" "No reset,Input reset to RGU,Reserved,Reset control register" bitfld.long 0x04 0.--1. " IVNSS_LIN_RST_STAT ,Reset IVNSS LIN status" "No reset,Input reset to RGU,Reserved,Reset control register" width 20. rgroup.long 0x150++0x7 line.long 0x00 "RST_ACTIVE_STATUS0,Reset-Active Status register 0" bitfld.long 0x00 4. " WARM_RST_STAT ,Current state of WARM_RST" "Reset,Normal" bitfld.long 0x00 3. " COLD_RST_STAT ,Current state of COLD_RST" "Reset,Normal" textline " " bitfld.long 0x00 2. " PCR_RST_STAT ,Current state of PCR_RST" "Reset,Normal" bitfld.long 0x00 1. " RGU_RST_STAT ,Current state of RGU_RST" "Reset,Normal" textline " " bitfld.long 0x00 0. " POR_RST_STAT ,Current state of POR_RST" "Reset,Normal" line.long 0x04 "RST_ACTIVE_STATUS1,Reset-Active Status register 1" bitfld.long 0x04 29. " AHB_RST_STAT ,Current state of AHB_RST" "Reset,Normal" bitfld.long 0x04 28. " VIC_RST_STAT ,Current state of VIC_RST" "Reset,Normal" textline " " sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x04 24. " USB_RST_STAT ,Current state of USB_RST" "Reset,Normal" textline " " endif bitfld.long 0x04 23. " DMA_RST_STAT ,Current state of DMA_RST" "Reset,Normal" bitfld.long 0x04 22. " MSCSS_QEI_RST_STAT ,Current state of MSCSS_QEI_RST" "Reset,Normal" textline " " bitfld.long 0x04 21. " IVNSS_I2C_RST_STAT ,Current state of IVNSS_I2C_RST" "Reset,Normal" bitfld.long 0x04 20. " MSCSS_TMR_RST_STAT ,Current state of MSCSS_TMR_RST" "Reset,Normal" textline " " bitfld.long 0x04 19. " MSCSS_ADC_RST_STAT ,Current state of MSCSS_ADC_RST" "Reset,Normal" bitfld.long 0x04 18. " MSCSS_PWM_RST_STAT ,Current state of MSCSS_PWM_RST" "Reset,Normal" textline " " bitfld.long 0x04 17. " MSCSS_A2V_RST_STAT ,Current state of MSCSS_A2V_RST" "Reset,Normal" bitfld.long 0x04 16. " IVNSS_LIN_RST_STAT ,Current state of IVNSS_LIN_RST" "Reset,Normal" textline " " bitfld.long 0x04 15. " IVNSS_CAN_RST_STAT ,Current state of IVNSS_CAN_RST" "Reset,Normal" bitfld.long 0x04 14. " IVNSS_A2V_RST_STAT ,Current state of IVNSS_A2V_RST" "Reset,Normal" textline " " bitfld.long 0x04 13. " SPI_RST_STAT ,Current state of SPI_RST" "Reset,Normal" bitfld.long 0x04 12. " TMR_RST_STAT ,Current state of TMR_RST" "Reset,Normal" textline " " bitfld.long 0x04 11. " UART_RST_STAT ,Current state of UART_RST" "Reset,Normal" bitfld.long 0x04 10. " GPIO_RST_STAT ,Current state of GPIO_RST" "Reset,Normal" textline " " bitfld.long 0x04 9. " PESS_A2V_RST_STAT ,Current state of PESS_A2V_RST" "Reset,Normal" bitfld.long 0x04 8. " GESS_A2V_RST_STAT ,Current state of GESS_A2V_RST" "Reset,Normal" textline " " bitfld.long 0x04 6. " SMC_RST_STAT ,Current state of SMC_RST" "Reset,Normal" bitfld.long 0x04 5. " EMC_RST_STAT ,Current state of EMC_RST" "Reset,Normal" textline " " bitfld.long 0x04 4. " FMC_RST_STAT ,Current state of FMC_RST" "Reset,Normal" bitfld.long 0x04 1. " CFID_RST_STAT ,Current state of CFID_RST" "Reset,Normal" textline " " bitfld.long 0x04 0. " SCU_RST_STAT ,Current state of SCU_RST" "Reset,Normal" group.long 0x404++0xF line.long 0x00 "RGU_RST_SRC,Source register for RGU reset" bitfld.long 0x00 1. " RSTN_PIN ,Reset activated by external input reset" "Not activated,Activated" bitfld.long 0x00 0. " POR ,Reset activated by power-on-reset" "Not activated,Activated" line.long 0x04 "PCR_RST_SRC,Source register for PCRT reset" bitfld.long 0x04 3. " WDT_TMR ,Reset activated by Watchdog timer" "Not activated,Activated" bitfld.long 0x04 2. " RGU ,Reset activated by RGU reset" "Not activated,Activated" line.long 0x08 "COLD_RST_SRC,Source register for COLD reset" bitfld.long 0x08 4. " PCR ,Reset activated by PCR reset" "Not activated,Activated" line.long 0x0C "WARM_RST_SRC,Source register for WARM reset" bitfld.long 0x0C 5. " COLD ,Reset activated by COLD reset" "Not activated,Activated" group.long 0x480++0x7 line.long 0x00 "SCU_RST_SRC,Source register for SCU reset" bitfld.long 0x00 5. " COLD ,Reset activated by COLD reset" "Not activated,Activated" line.long 0x04 "CFID_RST_SRC,Source register for CFID reset" bitfld.long 0x04 5. " COLD ,Reset activated by COLD reset" "Not activated,Activated" group.long 0x490++0xb line.long 0x00 "FMC_RST_SRC,Source register for EFC reset" bitfld.long 0x00 5. " COLD ,Reset activated by COLD reset" "Not activated,Activated" line.long 0x04 "EMC_RST_SRC,Source register for EMC reset" bitfld.long 0x04 5. " COLD ,Reset activated by COLD reset" "Not activated,Activated" line.long 0x08 "SMC_RST_SRC,Source register for SMC reset" bitfld.long 0x08 5. " COLD ,Reset activated by COLD reset" "Not activated,Activated" group.long 0x4a0++0x3f line.long 0x00 "GESS_A2V_RST_SRC,Source register for GeSS AHB2APB bridge reset" bitfld.long 0x00 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x04 "PESS_A2V_RST_SRC,Source register for PeSS AHB2APB bridge reset" bitfld.long 0x04 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x08 "GPIO_RST_SRC,Source register for GPIO reset" bitfld.long 0x08 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x0C "UART_RST_SRC,Source register for UART reset" bitfld.long 0x0C 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x10 "TMR_RST_SRC,Source register for Timer reset" bitfld.long 0x10 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x14 "SPI_RST_SRC,Source register for SPI reset" bitfld.long 0x14 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x18 "IVNSS_A2V_RST_SRC,Source register for IVNSS AHB2APB bridge reset" bitfld.long 0x18 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x1C "IVNSS_CAN_RST_SRC,Source register for IVNSS CAN reset" bitfld.long 0x1C 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x20 "IVNSS_LIN_RST_SRC,Source register for IVNSS LIN reset" bitfld.long 0x20 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x24 "MSCSS_A2V_RST_SRC,Source register for MSCSS AHB2APB bridge reset" bitfld.long 0x24 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x28 "MSCSS_PWM_RST_SRC,Source register for MSCSS PWM reset" bitfld.long 0x28 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x2C "MSCSS_ADC_RST_SRC,Source register for MSCSS ADC reset" bitfld.long 0x2C 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x30 "MSCSS_TMR_RST_SRC,Source register for MSCSS Timer reset" bitfld.long 0x30 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x34 "I2C_RST_SRC,Source register for I2C Reset" bitfld.long 0x34 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x38 "QEI_RST_SRC,Source register for QEI reset" bitfld.long 0x38 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x3c "DMA_RST_SRC,Source register for DMA reset" bitfld.long 0x3c 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" sif (cpuis("LPC292*")||cpuis("LPC293*")) group.long 0x4e0++0x03 line.long 0x00 "USB_RST_SRC,Source register for USB reset" bitfld.long 0x00 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" endif group.long 0x4f0++0x7 line.long 0x0 "VIC_RST_SRC,Source register for VIC reset" bitfld.long 0x00 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" line.long 0x4 "AHB_RST_SRC,Source register for AHB reset" bitfld.long 0x04 6. " WARM ,Reset activated by WARM reset" "Not activated,Activated" group.long 0xff4++0x3 line.long 0x0 "BUS_DISABLE,Bus-disable register" bitfld.long 0x00 0. " RRBUS ,RBus write-disable bit" "Normal,No write" tree.end tree "PMU (Power Management Unit)" base ad:0xFFFFA000 width 20. group.long 0x0++0x3 line.long 0x0 "PM,Power mode register" bitfld.long 0x00 0. " PD ,Initiate power-down mode (disables all output clocks with wake-up enabled)" "Normal,Disabled" rgroup.long 0x4++0x3 line.long 0x0 "BASE_STAT,Base-clock status register" sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x00 12. " BASE12_STA ,Indicator for BASE_USB_CLK" "Disabled,Enabled" textline " " endif sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2926"||cpuis("LPC293*")) bitfld.long 0x00 11. " BASE11_STAT ,Indicator for BASE_USB_I2C_CLK" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " BASE10_STAT ,Indicator for BASE_CLK_TESTSHELL" "Disabled,Enabled" bitfld.long 0x00 9. " BASE9_STAT ,Indicator for BASE_ADC_CLK" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " BASE8_STAT ,Indicator for BASE_TMR_CLK" "Disabled,Enabled" bitfld.long 0x00 7. " BASE7_STAT ,Indicator for BASE_SPI_CLK" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " BASE6_STAT ,Indicator for BASE_UART_CLK" "Disabled,Enabled" bitfld.long 0x00 4. " BASE4_STAT ,Indicator for BASE_MSCSS_CLK" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BASE3_STAT ,Indicator for BASE_IVNSS_CLK" "Disabled,Enabled" bitfld.long 0x00 2. " BASE2_STAT ,Indicator for BASE_PCR_CLK" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BASE1_STAT ,Indicator for BASE_SYS_CLK" "Disabled,Enabled" bitfld.long 0x00 0. " BASE0_STAT ,Indicator for BASE_SAFE_CLK" "Disabled,Enabled" group.long 0x100++0x3 line.long 0x00 "CLK_CFG_SAFE,Safe-clock configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long 0x104++0x3 line.long 0x00 "CLK_STAT_SAFE,Safe-clock status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x200++0x3 line.long 0x00 "CLK_CFG_CPU,CPU-clock configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x200+0x4)++0x3 line.long 0x00 "CLK_STAT_CPU,CPU-clock status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x208++0x3 line.long 0x00 "CLK_CFG_SYS,System-clock configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x208+0x4)++0x3 line.long 0x00 "CLK_STAT_SYS,System-clock status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x210++0x3 line.long 0x00 "CLK_CFG_PCR,System-clock_pcr configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x210+0x4)++0x3 line.long 0x00 "CLK_STAT_PCR,System-clock_pcr status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC291*")||cpuis("LPC292*")||cpuis("LPC293*")) group.long 0x218++0x3 line.long 0x00 "CLK_CFG_FMC,Flash-clock configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x218+0x4)++0x3 line.long 0x00 "CLK_STAT_FMC,Flash-clock status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0x220++0x3 line.long 0x00 "CLK_CFG_RAM0,AHB clock to embedded memory controller 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x220+0x4)++0x3 line.long 0x00 "CLK_STAT_RAM0,AHB clock to embedded memory controller 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC291*")||cpu()=="LPC2925"||cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")) group.long 0x228++0x3 line.long 0x00 "CLK_CFG_RAM1,AHB clock to embedded memory controller 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x228+0x4)++0x3 line.long 0x00 "CLK_STAT_RAM1,AHB clock to embedded memory controller 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0x230++0x3 line.long 0x00 "CLK_CFG_SMC,AHB clock to Static Memory Controller configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x230+0x4)++0x3 line.long 0x00 "CLK_STAT_SMC,AHB clock to Static Memory Controller status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x238++0x3 line.long 0x00 "CLK_CFG_GESS,AHB/APB clock to GeSS module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x238+0x4)++0x3 line.long 0x00 "CLK_STAT_GESS,AHB/APB clock to GeSS module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x240++0x3 line.long 0x00 "CLK_CFG_VIC,AHB/DTL clock to interrupt controller configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x240+0x4)++0x3 line.long 0x00 "CLK_STAT_VIC,AHB/DTL clock to interrupt controller status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x248++0x3 line.long 0x00 "CLK_CFG_PESS,AHB/APB clock to PeSS module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x248+0x4)++0x3 line.long 0x00 "CLK_STAT_PESS,AHB/APB clock to PeSS module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x250++0x3 line.long 0x00 "CLK_CFG_GPIO0,APB clock to General-Purpose I/O 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x250+0x4)++0x3 line.long 0x00 "CLK_STAT_GPIO0,APB clock to General-Purpose I/O 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x258++0x3 line.long 0x00 "CLK_CFG_GPIO1,APB clock to General-Purpose I/O 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x258+0x4)++0x3 line.long 0x00 "CLK_STAT_GPIO1,APB clock to General-Purpose I/O 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC291*")||cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")) group.long 0x260++0x3 line.long 0x00 "CLK_CFG_GPIO2,APB clock to General-Purpose I/O 2 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x260+0x4)++0x3 line.long 0x00 "CLK_STAT_GPIO2,APB clock to General-Purpose I/O 2 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif sif (cpuis("LPC291*")||cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")) group.long 0x268++0x3 line.long 0x00 "CLK_CFG_GPIO3,APB clock to General-Purpose I/O 3 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x268+0x4)++0x3 line.long 0x00 "CLK_STAT_GPIO3,APB clock to General-Purpose I/O 3 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0x270++0x3 line.long 0x00 "CLK_CFG_IVNSS_A,AHB clock to IVNSS module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x270+0x4)++0x3 line.long 0x00 "CLK_STAT_IVNSS_A,AHB clock to IVNSS module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x278++0x3 line.long 0x00 "CLK_CFG_MSCSS_A,AHB/APB clock to MSCSS module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x278+0x4)++0x3 line.long 0x00 "CLK_STAT_MSCSS_A,AHB/APB clock to MSCSS module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC293*")) group.long 0x280++0x3 line.long 0x00 "CLK_CFG_GPIO4,APB clock to General-Purpose I/O 4 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x280+0x4)++0x3 line.long 0x00 "CLK_STAT_GPIO4,APB clock to General-Purpose I/O 4 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif sif (cpuis("LPC292*")||cpuis("LPC293*")) group.long 0x288++0x3 line.long 0x00 "CLK_CFG_GPIO5,APB clock to General-Purpose I/O 5 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x288+0x4)++0x3 line.long 0x00 "CLK_STAT_GPIO5,APB clock to General-Purpose I/O 5 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0x290++0x3 line.long 0x00 "CLK_CFG_DMA,GPDMA clock configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x290+0x4)++0x3 line.long 0x00 "CLK_STAT_DMA,GPDMA clock status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC292*")||cpuis("LPC293*")) group.long 0x298++0x3 line.long 0x00 "CLK_CFG_USB,USB configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x298+0x4)++0x3 line.long 0x00 "CLK_STAT_USB,USB status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0x300++0x3 line.long 0x00 "CLK_CFG_PCR_IP,IP clock to PCR module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x300+0x4)++0x3 line.long 0x00 "CLK_STAT_PCR_IP,IP clock to PCR module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x400++0x3 line.long 0x00 "CLK_CFG_IVNSS_APB,APB clock to IVNSS module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x400+0x4)++0x3 line.long 0x00 "CLK_STAT_IVNSS_APB,APB clock to IVNSS module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x408++0x3 line.long 0x00 "CLK_CFG_CANCA,IP clock to CAN gateway acceptance filter configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x408+0x4)++0x3 line.long 0x00 "CLK_STAT_CANCA,IP clock to CAN gateway acceptance filter status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x410++0x3 line.long 0x00 "CLK_CFG_CANC0,IP clock to CAN gateway 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x410+0x4)++0x3 line.long 0x00 "CLK_STAT_CANC0,IP clock to CAN gateway 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x418++0x3 line.long 0x00 "CLK_CFG_CANC1,IP clock to CAN gateway 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x418+0x4)++0x3 line.long 0x00 "CLK_STAT_CANC1,IP clock to CAN gateway 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x420++0x3 line.long 0x00 "CLK_CFG_I2C0,IP clock to I2C0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x420+0x4)++0x3 line.long 0x00 "CLK_STAT_I2C0,IP clock to I2C0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x428++0x3 line.long 0x00 "CLK_CFG_I2C1,IP clock to I2C1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x428+0x4)++0x3 line.long 0x00 "CLK_STAT_I2C1,IP clock to I2C1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x440++0x3 line.long 0x00 "CLK_CFG_LIN0,IP clock to LIN controller 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x440+0x4)++0x3 line.long 0x00 "CLK_STAT_LIN0,IP clock to LIN controller 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x448++0x3 line.long 0x00 "CLK_CFG_LIN1,IP clock to LIN controller 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x448+0x4)++0x3 line.long 0x00 "CLK_STAT_LIN1,IP clock to LIN controller 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x500++0x3 line.long 0x00 "CLK_CFG_MSCSS_APB,APB clock to MSCSS module configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x500+0x4)++0x3 line.long 0x00 "CLK_STAT_MSCSS_APB,APB clock to MSCSS module status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x508++0x3 line.long 0x00 "CLK_CFG_MTMR0,IP clock to timer 0 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x508+0x4)++0x3 line.long 0x00 "CLK_STAT_MTMR0,IP clock to timer 0 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x510++0x3 line.long 0x00 "CLK_CFG_MTMR1,IP clock to timer 1 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x510+0x4)++0x3 line.long 0x00 "CLK_STAT_MTMR1,IP clock to timer 1 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x518++0x3 line.long 0x00 "CLK_CFG_PWM0,IP clock to PWM 0 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x518+0x4)++0x3 line.long 0x00 "CLK_STAT_PWM0,IP clock to PWM 0 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x520++0x3 line.long 0x00 "CLK_CFG_PWM1,IP clock to PWM 1 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x520+0x4)++0x3 line.long 0x00 "CLK_STAT_PWM1,IP clock to PWM 1 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x528++0x3 line.long 0x00 "CLK_CFG_PWM2,IP clock to PWM 2 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x528+0x4)++0x3 line.long 0x00 "CLK_STAT_PWM2,IP clock to PWM 2 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x530++0x3 line.long 0x00 "CLK_CFG_PWM3,IP clock to PWM 3 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x530+0x4)++0x3 line.long 0x00 "CLK_STAT_PWM3,IP clock to PWM 3 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC2927")||cpuis("LPC2926")||cpuis("LPC2929")||cpuis("LPC293*")) group.long 0x538++0x3 line.long 0x00 "CLK_CFG_ADC0_APB,APB clock to ADC 0 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x538+0x4)++0x3 line.long 0x00 "CLK_STAT_ADC0_APB,APB clock to ADC 0 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0x540++0x3 line.long 0x00 "CLK_CFG_ADC1_APB,APB clock to ADC 1 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x540+0x4)++0x3 line.long 0x00 "CLK_STAT_ADC1_APB,APB clock to ADC 1 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x548++0x3 line.long 0x00 "CLK_CFG_ADC2_APB,APB clock to ADC 2 in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x548+0x4)++0x3 line.long 0x00 "CLK_STAT_ADC2_APB,APB clock to ADC 2 in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x550++0x3 line.long 0x00 "CLK_CFG_QEI_APB,APB clock to QEI in MSCSS configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x550+0x4)++0x3 line.long 0x00 "CLK_STAT_QEI_APB,APB clock to QEI in MSCSS status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x600++0x3 line.long 0x00 "CLK_CFG_OUT_CLK,Clock Out configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x600+0x4)++0x3 line.long 0x00 "CLK_STAT_OUT_CLK,Clock Out status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x700++0x3 line.long 0x00 "CLK_CFG_UART0,IP clock to UART-0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x700+0x4)++0x3 line.long 0x00 "CLK_STAT_UART0,IP clock to UART-0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x708++0x3 line.long 0x00 "CLK_CFG_UART1,IP clock to UART 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x708+0x4)++0x3 line.long 0x00 "CLK_STAT_UART1,IP clock to UART 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x800++0x3 line.long 0x00 "CLK_CFG_SPI0,IP clock to SPI 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x800+0x4)++0x3 line.long 0x00 "CLK_STAT_SPI0,IP clock to SPI 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x808++0x3 line.long 0x00 "CLK_CFG_SPI1,IP clock to SPI 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x808+0x4)++0x3 line.long 0x00 "CLK_STAT_SPI1,IP clock to SPI 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x810++0x3 line.long 0x00 "CLK_CFG_SPI2,IP clock to SPI 2 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x810+0x4)++0x3 line.long 0x00 "CLK_STAT_SPI2,IP clock to SPI 2 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x900++0x3 line.long 0x00 "CLK_CFG_TMR0,IP clock to Timer 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x900+0x4)++0x3 line.long 0x00 "CLK_STAT_TMR0,IP clock to Timer 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x908++0x3 line.long 0x00 "CLK_CFG_TMR1,IP clock to Timer 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x908+0x4)++0x3 line.long 0x00 "CLK_STAT_TMR1,IP clock to Timer 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x910++0x3 line.long 0x00 "CLK_CFG_TMR2,IP clock to Timer 2 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x910+0x4)++0x3 line.long 0x00 "CLK_STAT_TMR2,IP clock to Timer 2 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0x918++0x3 line.long 0x00 "CLK_CFG_TMR3,IP clock to Timer 3 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0x918+0x4)++0x3 line.long 0x00 "CLK_STAT_TMR3,IP clock to Timer 3 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC2927")||cpuis("LPC2929")||cpuis("LPC2926")||cpuis("LPC293*")) group.long 0xa00++0x3 line.long 0x00 "CLK_CFG_ADC0,IP clock to ADC 0 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0xa00+0x4)++0x3 line.long 0x00 "CLK_STAT_ADC0,IP clock to ADC 0 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif group.long 0xa08++0x3 line.long 0x00 "CLK_CFG_ADC1,IP clock to ADC 1 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0xa08+0x4)++0x3 line.long 0x00 "CLK_STAT_ADC1,IP clock to ADC 1 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0xa10++0x3 line.long 0x00 "CLK_CFG_ADC2,IP clock to ADC 2 configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0xa10+0x4)++0x3 line.long 0x00 "CLK_STAT_ADC2,IP clock to ADC 2 status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" group.long 0xb00++0x3 line.long 0x00 "CLK_CFG_TSSHELL,IP clock to TESTSHELL configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0xb00+0x4)++0x3 line.long 0x00 "CLK_STAT_TSSHELL,IP clock to TESTSHELL status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" sif (cpuis("LPC2927")||cpuis("LPC2926")||cpuis("LPC2929")||cpuis("LPC293*")) group.long 0xc00++0x3 line.long 0x00 "CLK_CFG_USB_I2C,IP clock to USB I2C configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0xc00+0x4)++0x3 line.long 0x00 "CLK_STAT_USB_I2C,IP clock to USB I2C status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif sif (cpuis("LPC292*")||cpuis("LPC293*")) group.long 0xd00++0x3 line.long 0x00 "CLK_CFG_USB_CLK,IP clock to USB CLK configuration register" bitfld.long 0x00 2. " WAKEUP ,Sets PM:PD bit influence on the branch clock wake-up" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO ,Enable auto (AHB disable mechanism)" "Disabled,Enabled" bitfld.long 0x00 0. " RUN ,Run control of the branch clock" "Disabled,Enabled" rgroup.long (0xd00+0x4)++0x3 line.long 0x00 "CLK_STAT_USB_CLK,IP clock to USB CLK status register" bitfld.long 0x00 8.--9. " SM ,Status of state machine controlling the clock-enable signal" "RUN,WAIT,SLEEP1,SLEEP0" bitfld.long 0x00 2. " WS ,Wake-up mechanism enable status" "Disabled,Enabled" bitfld.long 0x00 1. " AS ,Auto (AHB disable mechanism) enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RS ,Run-enable status" "Disabled,Enabled" endif width 0xB tree.end tree "SCU (System Control Unit)" base ad:0xE0001000 width 9. group.long 0xB00++0x3 line.long 0x00 "SEC_DIS,Security Disable Register" bitfld.long 0x00 1. " DIS ,JTAG security disable" "No,Yes" rgroup.long 0xB01++0x3 line.long 0x00 "SEC_STA,Security Status Register" bitfld.long 0x00 1. " DIS ,JTAG security" "Disabled,Enabled" group.long 0xC00++0x3 line.long 0x0 "SSMM0 ,Shadow Memory Mapping Register For ARM9" hexmask.long 0x0 10.--31. 0x400 " SMMSA ,Shadow memory map start address" group.long 0xC04++0x3 line.long 0x0 "SSMM1 ,Shadow Memory Mapping Register For DMA0" hexmask.long 0x0 10.--31. 0x400 " SMMSA ,Shadow memory map start address" group.long 0xC08++0x3 line.long 0x0 "SSMM2 ,Shadow Memory Mapping Register For DMA1" hexmask.long 0x0 10.--31. 0x400 " SMMSA ,Shadow memory map start address" sif (cpuis("LPC292*")||cpuis("LPC293*")) group.long 0xC0C++0x3 line.long 0x0 "SSMM3 ,Shadow Memory Mapping Register For USB" hexmask.long 0x0 10.--31. 0x400 " SMMSA ,Shadow memory map start address" endif group.long 0xD00++0x3 line.long 0x0 "SMP0 ,AHB Master Priority Registers For ARM9" bitfld.long 0x00 0.--2. " PRIO ,AHB priority (1: highest, 4: lowest)" "0,1,2,3,4,5,6,7" group.long 0xD04++0x3 line.long 0x0 "SMP1 ,AHB Master Priority Registers For DMA0" bitfld.long 0x00 0.--2. " PRIO ,AHB priority (1: highest, 4: lowest)" "0,1,2,3,4,5,6,7" group.long 0xD08++0x3 line.long 0x0 "SMP2 ,AHB Master Priority Registers For DMA1" bitfld.long 0x00 0.--2. " PRIO ,AHB priority (1: highest, 4: lowest)" "0,1,2,3,4,5,6,7" sif (cpuis("LPC292*")||cpuis("LPC293*")) group.long 0xD0C++0x3 line.long 0x0 "SMP3 ,AHB Master Priority Registers For USB" bitfld.long 0x00 0.--2. " PRIO ,AHB priority (1: highest, 4: lowest)" "0,1,2,3,4,5,6,7" endif width 0xB sif (cpuis("LPC291*")||(cpu()=="LPC2926")||(cpu()=="LPC2927")||cpu()=="LPC2929") width 10. tree "Port 0" group.long 0x00++0x7f line.long 0x00 "SFSP0_0,Function-select port 0, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 0,QEI0 PHB,CAN0 TXD,EXTBUS D24" else bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 0,QEI0 PHB,CAN0 TXD,EXTBUS D24" endif line.long 0x04 "SFSP0_1,Function-select port 0, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 1,QEI 0 PHA,CAN0 RXD,EXTBUS D25" else bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 1,QEI 0 PHA,CAN0 RXD,EXTBUS D25" endif line.long 0x08 "SFSP0_2,Function-select port 0, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 2,CLK_OUT,PWM0 MAT0,EXTBUS D26" line.long 0x0c "SFSP0_3,Function-select port 0, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 3,Reserved,PWM0 MAT1,EXTBUS D27" else bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 3,/USB_UP_LED,PWM0 MAT1,EXTBUS D27" endif line.long 0x10 "SFSP0_4,Function-select port 0, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 4,Reserved,PWM0 MAT2,EXTBUS D28" else bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 4,ADC0 IN0,PWM0 MAT2,EXTBUS D28" endif line.long 0x14 "SFSP0_5,Function-select port 0, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 5,Reserved,PWM0 MAT3,EXTBUS D29" else bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 5,ADC0 IN1,PWM0 MAT3,EXTBUS D29" endif line.long 0x18 "SFSP0_6,Function-select port 0, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 6,Reserved,PWM0 MAT4,EXTBUS D30" else bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 6,ADC0 IN2,PWM0 MAT4,EXTBUS D30" endif line.long 0x1c "SFSP0_7,Function-select port 0, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 7,Reserved,PWM0 MAT5,EXTBUS D31" else bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 7,ADC0 IN3,PWM0 MAT5,EXTBUS D31" endif line.long 0x20 "SFSP0_8,Function-select port 0, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 8,ADC1 IN0,LIN0 TXDL,EXTBUS A20" else bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 8,ADC1 IN0,LIN0/UART TXD,EXTBUS A20" endif line.long 0x24 "SFSP0_9,Function-select port 0, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 9,ADC1 IN1,LIN0 RXDL,EXTBUS A21" elif (cpu()=="LPC2917/01"||cpu()=="LPC2917/01") bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 9,ADC1 IN1,LIN0/UART RXD,EXTBUS A21" else bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 9,ADC1 IN1,LIN0 RXD/UART TXD,EXTBUS A21" endif line.long 0x28 "SFSP0_10,Function-select port 0, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 10,ADC1 IN2,PWM1 MAT0,EXTBUS A8" line.long 0x2c "SFSP0_11,Function-select port 0, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 11,ADC1 IN3,PWM1 MAT1,EXTBUS A9" line.long 0x30 "SFSP0_12,Function-select port 0, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 12,ADC1 IN4,PWM1 MAT2,EXTBUS A10" line.long 0x34 "SFSP0_13,Function-select port 0, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 13,ADC1 IN5,PWM1 MAT3,EXTBUS A11" line.long 0x38 "SFSP0_14,Function-select port 0, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 14,ADC1 IN6,PWM1 MAT4,EXTBUS A12" line.long 0x3c "SFSP0_15,Function-select port 0, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 15,ADC1 IN7,PWM1 MAT5,EXTBUS A13" line.long 0x40 "SFSP0_16,Function-select port 0, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 16,ADC2 IN0,UART0 TXD,EXTBUS A22" line.long 0x44 "SFSP0_17,Function-select port 0, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 17,ADC2 IN1,UART0 RXD,EXTBUS A23" line.long 0x48 "SFSP0_18,Function-select port 0, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 18,ADC2 IN2,PWM2 MAT0,EXTBUS A14" line.long 0x4c "SFSP0_19,Function-select port 0, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 19,ADC2 IN3,PWM2 MAT1,EXTBUS A15" line.long 0x50 "SFSP0_20,Function-select port 0, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 20,ADC2 IN4,PWM2 MAT2,EXTBUS A16" line.long 0x54 "SFSP0_21,Function-select port 0, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 21,ADC2 IN5,PWM2 MAT3,EXTBUS A17" line.long 0x58 "SFSP0_22,Function-select port 0, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 22,ADC2 IN6,PWM2 MAT4,EXTBUS A18" line.long 0x5c "SFSP0_23,Function-select port 0, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 23,ADC2 IN7,PWM2 MAT5,EXTBUS A19" line.long 0x60 "SFSP0_24,Function-select port 0, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 24,UART1 TXD,CAN1 TXD,SPI2 SCS0" line.long 0x64 "SFSP0_25,Function-select port 0, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 25,UART1 RXD,CAN1 RXD,SPI2 SDO" line.long 0x68 "SFSP0_26,Function-select port 0, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 26,Reserved,UART1 TXD,SPI2 SDI" else bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 26,Reserved,UART1 TXD,SPI2 SDI" endif line.long 0x6c "SFSP0_27,Function-select port 0, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 27,Reserved,UART1 RXD,SPI2 SCK" else bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 27,Reserved,UART1 RXD,SPI2 SCK" endif line.long 0x70 "SFSP0_28,Function-select port 0, pin 28 register" bitfld.long 0x70 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x70 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 28,Reserved,TIMER0 CAP0,TIMER0 MAT0" line.long 0x74 "SFSP0_29,Function-select port 0, pin 29 register" bitfld.long 0x74 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x74 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 29,Reserved,TIMER0 CAP1,TIMER0 MAT1" line.long 0x78 "SFSP0_30,Function-select port 0, pin 30 register" bitfld.long 0x78 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x78 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 30,Reserved,TIMER0 CAP2,TIMER0 MAT2" line.long 0x7c "SFSP0_31,Function-select port 0, pin 31 register" bitfld.long 0x7c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x7c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 31,Reserved,TIMER0 CAP3,TIMER0 MAT3" tree.end tree "Port 1" group.long 0x100++0x6f line.long 0x00 "SFSP1_0,Function-select port 1, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 0,EXTINT0,PWM3 MAT0,EXTBUS A0" line.long 0x04 "SFSP1_1,Function-select port 1, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 1,EXTINT1,PWM3 MAT1,EXTBUS A1" line.long 0x08 "SFSP1_2,Function-select port 1, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 2,SPI2 SCS3,PWM3 MAT2,EXTBUS A2" line.long 0x0c "SFSP1_3,Function-select port 1, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 3,SPI2 SCS1,PWM3 MAT3,EXTBUS A3" line.long 0x10 "SFSP1_4,Function-select port 1, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 4,SPI2 SCS2,PWM3 MAT4,EXTBUS A4" line.long 0x14 "SFSP1_5,Function-select port 1, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 5,SPI1 SCS1,PWM3 MAT5,EXTBUS A5" line.long 0x18 "SFSP1_6,Function-select port 1, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 6,SPI1 SCS2,UART1 TXD,EXTBUS A6" line.long 0x1c "SFSP1_7,Function-select port 1, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 7,SPI1 SCS3,UART1 RXD,EXTBUS A7" line.long 0x20 "SFSP1_8,Function-select port 1, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 8,SPI1 SCS0,LIN1 TXDL,EXTBUS CS0" else bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 8,SPI1 SCS0,LIN1/UART TXD,EXTBUS CS0" endif line.long 0x24 "SFSP1_9,Function-select port 1, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 9,SPI1 SDO,LIN1 RXDL,EXTBUS CS1" else bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 9,SPI1 SDO,LIN1/UART RXD,EXTBUS CS1" endif line.long 0x28 "SFSP1_10,Function-select port 1, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 10,SPI1 SDI,I2C0 SDA,EXTBUS CS2" else bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 10,SPI1 SDI,I2C0 SDA,EXTBUS CS2" endif line.long 0x2c "SFSP1_11,Function-select port 1, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 11,SPI1 SCK,I2C0 SCL,EXTBUS CS3" else bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 11,SPI1 SCK,I2C0 SCL,EXTBUS CS3" endif line.long 0x30 "SFSP1_12,Function-select port 1, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 12,EXTINT2,Reserved,EXTBUS OE_N" else bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 12,EXTINT2,I2C1 SDA,EXTBUS OE_N" endif line.long 0x34 "SFSP1_13,Function-select port 1, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 13,EXTINT3,I2C1 SCL,EXTBUS WE_N" else bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 13,EXTINT3,I2C1 SCL,EXTBUS WE_N" endif line.long 0x38 "SFSP1_14,Function-select port 1, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 14,TIMER2 CAP0,SPI0 SCS3,EXTBUS D0" line.long 0x3c "SFSP1_15,Function-select port 1, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 15,TIMER2 CAP1,SPI0 SCS0,EXTBUS D1" line.long 0x40 "SFSP1_16,Function-select port 1, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 16,TIMER2 CAP2,SPI0 SCK,EXTBUS D2" line.long 0x44 "SFSP1_17,Function-select port 1, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 17,TIMER2 CAP3,SPI0 SDI,EXTBUS D3" line.long 0x48 "SFSP1_18,Function-select port 1, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 18,TIMER3 CAP0,SPI0 SDO,EXTBUS D4" line.long 0x4c "SFSP1_19,Function-select port 1, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 19,TIMER3 CAP1,SPI0 SCS2,EXTBUS D5" line.long 0x50 "SFSP1_20,Function-select port 1, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 20,TIMER3 CAP2,SPI0 SCS1,EXTBUS D6" line.long 0x54 "SFSP1_21,Function-select port 1, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 21,TIMER3 CAP3,TIMER1 CAP3/MSCSSPAUSE,EXTBUS D7" line.long 0x58 "SFSP1_22,Function-select port 1, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 22,UART0 TXD,Reserved,EXTBUS CS4" else bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 22,UART0 TXD,/USB_UP_LED,EXTBUS CS4" endif line.long 0x5c "SFSP1_23,Function-select port 1, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 23,UART0 RXD,Reserved,EXTBUS CS5" else bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 23,UART0 RXD,USB_SSPND,EXTBUS CS5" endif line.long 0x60 "SFSP1_24,Function-select port 1, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 24,PWM0 MAT0,Reserved,PWM3 MAT0" else bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 24,PWM0 MAT0,/USB_CONNECT,PWM3 MAT0" endif line.long 0x64 "SFSP1_25,Function-select port 1, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 25,PWM1 MAT0,Reserved,PWM3 MAT1" else bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 25,PWM1 MAT0,VBUS,PWM3 MAT1" endif line.long 0x68 "SFSP1_26,Function-select port 1, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 26,PWM2 MAT0,PWM TRAP3,PWM3 MAT2" line.long 0x6c "SFSP1_27,Function-select port 1, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 27,TIMER1 CAP2/ADC2 EXT START,PWM TRAP2,PWM3 MAT3" sif (cpuis("LPC291*")) group.long 0x170++0xf line.long 0x00 "SFSP1_28,Function-select port 1, pin 28 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 28,TIMER1 CAP1/ADC1 EXT START,PWM TRAP1,PWM3 MAT4" line.long 0x04 "SFSP1_29,Function-select port 1, pin 29 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 29,TIMER1 CAP0,PWM TRAP0,PWM3 MAT5" line.long 0x08 "SFSP1_30,Function-select port 1, pin 30 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 30,TIMER0 CAP0,TIMER0 MAT0,EXTINT4" line.long 0x0c "SFSP1_31,Function-select port 1, pin 31 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 31,TIMER0 CAP1,TIMER0 MAT1,EXTINT5" endif tree.end tree "Port 2" group.long 0x200++0x6f line.long 0x00 "SFSP2_0,Function-select port 2, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 0,TIMER2 MAT0,PWM TRAP3,EXTBUS D8" line.long 0x04 "SFSP2_1,Function-select port 2, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 1,TIMER2 MAT1,PWM TRAP2,EXTBUS D9" line.long 0x08 "SFSP2_2,Function-select port 2, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 2,TIMER2 MAT2,PWM TRAP1,EXTBUS D10" line.long 0x0c "SFSP2_3,Function-select port 2, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 3,TIMER2 MAT3,PWM TRAP0,EXTBUS D11" line.long 0x10 "SFSP2_4,Function-select port 2, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 4,TIMER1 MAT0,EXTINT0,EXTBUS D12" line.long 0x14 "SFSP2_5,Function-select port 2, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 5,TIMER1 MAT1,EXTINT1,EXTBUS D13" line.long 0x18 "SFSP2_6,Function-select port 2, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 6,TIMER1 MAT2,EXTINT2,EXTBUS D14" line.long 0x1c "SFSP2_7,Function-select port 2, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 7,TIMER1 MAT3,EXTINT3,EXTBUS D15" line.long 0x20 "SFSP2_8,Function-select port 2, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 8,CLK_OUT,PWM0 MAT0,SPI0 SCS2" else bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 8,CLK_OUT,PWM0 MAT0,SPI0 SCS2" endif line.long 0x24 "SFSP2_9,Function-select port 2, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 9,Reserved,PWM0 MAT1,SPI0 SCS1" else bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 9,/USB_UP_LED,PWM0 MAT1,SPI0 SCS1" endif line.long 0x28 "SFSP2_10,Function-select port 2, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 10,Reserved,PWM0 MAT2,SPI0 SCS0" line.long 0x2c "SFSP2_11,Function-select port 2, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 11,Reserved,PWM0 MAT3,SPI0 SCK" line.long 0x30 "SFSP2_12,Function-select port 2, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 12,Reserved,PWM0 MAT4,SPI0 SDI" else bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 12,ADC0 IN4,PWM0 MAT4,SPI0 SDI" endif line.long 0x34 "SFSP2_13,Function-select port 2, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 13,Reserved,PWM0 MAT5,SPI0 SDO" else bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 13,ADC0 IN5,PWM0 MAT5,SPI0 SDO" endif line.long 0x38 "SFSP2_14,Function-select port 2, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 14,I2C1 SDA,PWM0 CAP0,EXTBUS BLS0" line.long 0x3c "SFSP2_15,Function-select port 2, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 15,Reserved,PWM0 CAP1,EXTBUS BLS1" else bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 15,I2C1 SCL,PWM0 CAP1,EXTBUS BLS1" endif line.long 0x40 "SFSP2_16,Function-select port 2, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 16,UART1 TXD,PWM0 CAP2,EXTBUS BLS2" line.long 0x44 "SFSP2_17,Function-select port 2, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 17,UART1 RXD,PWM1 CAP0,EXTBUS BLS3" line.long 0x48 "SFSP2_18,Function-select port 2, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 18,SPI2 SCS1,PWM1 CAP1,EXTBUS D16" else bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 18,SPI2 SCS1,PWM1 CAP1,EXTBUS D16" endif line.long 0x4c "SFSP2_19,Function-select port 2, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 19,SPI2 SCS0,PWM1 CAP2,EXTBUS D17" else bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 19,SPI2 SCS0,PWM1 CAP2,EXTBUS D17" endif line.long 0x50 "SFSP2_20,Function-select port 2, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 20,SPI2 SDO,PWM2 CAP0,EXTBUS D18" else bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 20,SPI2 SDO,PWM2 CAP0,EXTBUS D18" endif line.long 0x54 "SFSP2_21,Function-select port 2, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 21,SPI2 SDI,PWM2 CAP1,EXTBUS D19" else bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 21,SPI2 SDI,PWM2 CAP1,EXTBUS D19" endif line.long 0x58 "SFSP2_22,Function-select port 2, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 22,SPI2 SCK,PWM2 CAP2,EXTBUS D20" else bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 22,SPI2 SCK,PWM2 CAP2,EXTBUS D20" endif line.long 0x5c "SFSP2_23,Function-select port 2, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 23,SPI1 SCS0,PWM3 CAP0,EXTBUS D21" else bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 23,SPI1 SCS0,PWM3 CAP0,EXTBUS D21" endif line.long 0x60 "SFSP2_24,Function-select port 2, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 24,SPI1 SCS1,PWM3 CAP1,EXTBUS D22" else bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 24,Reserved,PWM3 CAP1,EXTBUS D22" endif line.long 0x64 "SFSP2_25,Function-select port 2, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 25,SPI1 SCS2,PWM3 CAP2,EXTBUS D23" else bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 25,SPI1 SCS2,PWM3 CAP2,EXTBUS D23" endif line.long 0x68 "SFSP2_26,Function-select port 2, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 26,TIMER0 CAP2,TIMER0 MAT2,EXTINT6" line.long 0x6c "SFSP2_27,Function-select port 2, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 27,TIMER0 CAP3,TIMER0 MAT3,EXTINT7" tree.end tree "Port 3" group.long 0x300++0x3F line.long 0x00 "SFSP3_0,Function-select port 3, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 0,Reserved,PWM2 MAT0,EXTBUS CS6" else bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 0,ADC0 IN6,PWM2 MAT0,EXTBUS CS6" endif line.long 0x04 "SFSP3_1,Function-select port 3, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 1,Reserved,PWM2 MAT1,EXTBUS CS7" else bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 1,ADC0 IN7,PWM2 MAT1,EXTBUS CS7" endif line.long 0x08 "SFSP3_2,Function-select port 3, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 2,TIMER3 MAT0,PWM2 MAT2,?..." else bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 2,TIMER3 MAT0,PWM2 MAT2,USB_SDA" endif line.long 0x0c "SFSP3_3,Function-select port 3, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 3,TIMER3 MAT1,PWM2 MAT3,?..." else bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 3,TIMER3 MAT1,PWM2 MAT3,USB_SCL" endif line.long 0x10 "SFSP3_4,Function-select port 3, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 4,TIMER3 MAT2,PWM2 MAT4,CAN1 TXD" line.long 0x14 "SFSP3_5,Function-select port 3, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 5,TIMER3 MAT3,PWM2 MAT5,CAN1 RXD" line.long 0x18 "SFSP3_6,Function-select port 3, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 6,SPI0 SCS3,PWM1 MAT0,LIN1/UART TXD" else bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 6,SPI0 SCS3,PWM1 MAT0,LIN1/UART TXD" endif line.long 0x1c "SFSP3_7,Function-select port 3, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 7,SPI2 SCS1,PWM1 MAT1,LIN1/UART RXD" else bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 7,SPI2 SCS1,PWM1 MAT1,LIN1/UART RXD" endif line.long 0x20 "SFSP3_8,Function-select port 3, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 8,SPI2 SCS0,PWM1 MAT2,?..." line.long 0x24 "SFSP3_9,Function-select port 3, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 9,SPI2 SDO,PWM1 MAT3,?..." line.long 0x28 "SFSP3_10,Function-select port 3, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 10,SPI2 SDI,PWM1 MAT4,?..." line.long 0x2c "SFSP3_11,Function-select port 3, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 11,SPI2 SCK,PWM1 MAT5,?..." else bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 11,SPI2 SCK,PWM1 MAT5,USB_LS" endif line.long 0x30 "SFSP3_12,Function-select port 3, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpuis("LPC291*")) bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 12,SPI1 SCS0,EXTINT4,?..." else bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 12,SPI1 SCS0,EXTINT4,USB_SSPND" endif line.long 0x34 "SFSP3_13,Function-select port 3, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " sif (cpu()=="LPC2917"||cpu()=="LPC2919") bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 13,SPI1 SDO,EXTINT5,QEI0 IDX" else bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 13,SPI1 SDO,EXTINT5,QEI0 IDX" endif line.long 0x38 "SFSP3_14,Function-select port 3, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 14,SPI1 SDI,EXTINT6,CAN0 TXD" line.long 0x3c "SFSP3_15,Function-select port 3, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 15,SPI1 SCK,EXTINT7,CAN0 RXD" tree.end sif (cpu()=="LPC2927")||(cpu()=="LPC2929")||(cpu()=="LPC2926") tree "Port 5" group.long 0x548++0x7 line.long 0x00 "SFSP5_18,Function-select port 5, pin 18 register" bitfld.long 0x00 4. " VBUS ,Port 1 VBUS select" "Host/Device,OTG" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 18,USB_D-,?..." line.long 0x04 "SFSP5_19,Function-select port 5, pin 19 register" bitfld.long 0x04 4. " VBUS ,Port 1 VBUS select" "Host/Device,OTG" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 19,USB_D+,?..." tree.end endif elif (cpu()=="LPC2921")||(cpu()=="LPC2923")||(cpu()=="LPC2925") width 10. tree "Port 0" group.long 0x00++0x7f line.long 0x00 "SFSP0_0,Function-select port 0, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 0,QEI0 PHB,CAN0 TXD,?..." line.long 0x04 "SFSP0_1,Function-select port 0, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 1,QEI0 PHA,CAN0 RXD,?..." line.long 0x08 "SFSP0_2,Function-select port 0, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 2,CLK_OUT,PWM0 MAT0,?..." line.long 0x0c "SFSP0_3,Function-select port 0, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 3,/USB_UP_LED,PWM0 MAT1,?..." line.long 0x10 "SFSP0_4,Function-select port 0, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 4,Reserved,PWM0 MAT2,?..." line.long 0x14 "SFSP0_5,Function-select port 0, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 5,Reserved,PWM0 MAT3,?..." line.long 0x18 "SFSP0_6,Function-select port 0, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 6,Reserved,PWM0 MAT4,?..." line.long 0x1c "SFSP0_7,Function-select port 0, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 7,Reserved,PWM0 MAT5,?..." line.long 0x20 "SFSP0_8,Function-select port 0, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 8,ADC1 IN0,?..." line.long 0x24 "SFSP0_9,Function-select port 0, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 9,ADC1 IN1,?..." line.long 0x28 "SFSP0_10,Function-select port 0, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 10,ADC1 IN2,PWM1 MAT0,?..." line.long 0x2c "SFSP0_11,Function-select port 0, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 11,ADC1 IN3,PWM1 MAT1,?..." line.long 0x30 "SFSP0_12,Function-select port 0, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 12,ADC1 IN4,PWM1 MAT2,?..." line.long 0x34 "SFSP0_13,Function-select port 0, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 13,ADC1 IN5,PWM1 MAT3,?..." line.long 0x38 "SFSP0_14,Function-select port 0, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 14,ADC1 IN6,PWM1 MAT4,?..." line.long 0x3c "SFSP0_15,Function-select port 0, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 15,ADC1 IN7,PWM1 MAT5,?..." line.long 0x40 "SFSP0_16,Function-select port 0, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 16,ADC2 IN0,UART0 TXD,?..." line.long 0x44 "SFSP0_17,Function-select port 0, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 17,ADC2 IN1,UART0 RXD,?..." line.long 0x48 "SFSP0_18,Function-select port 0, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 18,ADC2 IN2,PWM2 MAT0,?..." line.long 0x4c "SFSP0_19,Function-select port 0, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 19,ADC2 IN3,PWM2 MAT1,?..." line.long 0x50 "SFSP0_20,Function-select port 0, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 20,ADC2 IN4,PWM2 MAT2,?..." line.long 0x54 "SFSP0_21,Function-select port 0, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 21,ADC2 IN5,PWM2 MAT3,?..." line.long 0x58 "SFSP0_22,Function-select port 0, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 22,ADC2 IN6,PWM2 MAT4,?..." line.long 0x5c "SFSP0_23,Function-select port 0, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 23,ADC2 IN7,PWM2 MAT5,?..." line.long 0x60 "SFSP0_24,Function-select port 0, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 24,UART1 TXD,CAN1 TXD,SPI2 SCS0" line.long 0x64 "SFSP0_25,Function-select port 0, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 25,UART1 RXD,CAN1 RXD,SPI2 SDO" line.long 0x68 "SFSP0_26,Function-select port 0, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 26,Reserved,UART1 TXD,SPI2 SDI" line.long 0x6c "SFSP0_27,Function-select port 0, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 27,Reserved,UART1 RXD,SPI2 SCK" line.long 0x70 "SFSP0_28,Function-select port 0, pin 28 register" bitfld.long 0x70 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x70 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 28,Reserved,TIMER0 CAP0,TIMER0 MAT0" line.long 0x74 "SFSP0_29,Function-select port 0, pin 29 register" bitfld.long 0x74 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x74 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 29,Reserved,TIMER0 CAP1,TIMER0 MAT1" line.long 0x78 "SFSP0_30,Function-select port 0, pin 30 register" bitfld.long 0x78 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x78 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 30,Reserved,TIMER0 CAP2,TIMER0 MAT2" line.long 0x7c "SFSP0_31,Function-select port 0, pin 31 register" bitfld.long 0x7c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x7c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 31,Reserved,TIMER0 CAP3,TIMER0 MAT3" tree.end tree "Port 1" group.long 0x100++0x6f line.long 0x00 "SFSP1_0,Function-select port 1, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 0,EXTINT0,PWM3 MAT0,?..." line.long 0x04 "SFSP1_1,Function-select port 1, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 1,EXTINT1,PWM3 MAT1,?..." line.long 0x08 "SFSP1_2,Function-select port 1, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 2,SPI2 SCS3,PWM3 MAT2,?..." line.long 0x0c "SFSP1_3,Function-select port 1, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 3,SPI2 SCS1,PWM3 MAT3,?..." line.long 0x10 "SFSP1_4,Function-select port 1, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 4,SPI2 SCS2,PWM3 MAT4,?..." line.long 0x14 "SFSP1_5,Function-select port 1, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 5,SPI1 SCS1,PWM3 MAT5,?..." line.long 0x18 "SFSP1_6,Function-select port 1, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 6,SPI1 SCS2,UART1 TXD,?..." line.long 0x1c "SFSP1_7,Function-select port 1, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 7,SPI1 SCS3,UART1 RXD,?..." line.long 0x20 "SFSP1_8,Function-select port 1, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 8,SPI1 SCS0,?..." line.long 0x24 "SFSP1_9,Function-select port 1, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 9,SPI1 SDO,?..." line.long 0x28 "SFSP1_10,Function-select port 1, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 10,SPI1 SDI,I2C0 SDA,?..." line.long 0x2c "SFSP1_11,Function-select port 1, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 11,SPI1 SCK,I2C0 SCL,?..." line.long 0x30 "SFSP1_12,Function-select port 1, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 12,EXTINT2,I2C1 SDA,?..." line.long 0x34 "SFSP1_13,Function-select port 1, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 13,EXTINT3,I2C1 SCL,?..." line.long 0x38 "SFSP1_14,Function-select port 1, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 14,TIMER2 CAP0,SPI0 SCS3,?..." line.long 0x3c "SFSP1_15,Function-select port 1, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 15,TIMER2 CAP1,SPI0 SCS0,?..." line.long 0x40 "SFSP1_16,Function-select port 1, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 16,TIMER2 CAP2,SPI0 SCK,?..." line.long 0x44 "SFSP1_17,Function-select port 1, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 17,TIMER2 CAP3,SPI0 SDI,?..." line.long 0x48 "SFSP1_18,Function-select port 1, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 18,TIMER3 CAP0,SPI0 SDO,?..." line.long 0x4c "SFSP1_19,Function-select port 1, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 19,TIMER3 CAP1,SPI0 SCS2,?..." line.long 0x50 "SFSP1_20,Function-select port 1, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 20,TIMER3 CAP2,SPI0 SCS1,?..." line.long 0x54 "SFSP1_21,Function-select port 1, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 21,TIMER3 CAP3,TIMER1 CAP3/MSCSS PAUSE,?..." line.long 0x58 "SFSP1_22,Function-select port 1, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 22,UART0 TXD,/USB_UP_LED,?..." line.long 0x5c "SFSP1_23,Function-select port 1, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 23,UART0 RXD,?..." line.long 0x60 "SFSP1_24,Function-select port 1, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 24,PWM0 MAT0,/USB_CONNECT,PWM3 MAT0" line.long 0x64 "SFSP1_25,Function-select port 1, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 25,PWM1 MAT0,USB_VBUS,PWM3 MAT1" line.long 0x68 "SFSP1_26,Function-select port 1, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 26,PWM2 MAT0,PWM TRAP3,PWM3 MAT2" line.long 0x6c "SFSP1_27,Function-select port 1, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 27,TIMER1 CAP2/ADC2 EXT START,PWM TRAP2,PWM3 MAT3" tree.end tree "Port 5" group.long 0x548++0x7 line.long 0x00 "SFSP5_18,Function-select port 5, pin 18 register" bitfld.long 0x00 4. " VBUS ,Port 1 VBUS select" "Host/Device,OTG" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 18,USB_D-,?..." line.long 0x04 "SFSP5_19,Function-select port 5, pin 19 register" bitfld.long 0x04 4. " VBUS ,Port 1 VBUS select" "Host/Device,OTG" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 19,USB_D+,?..." tree.end else width 10. tree "Port 0" group.long 0x00++0x7f line.long 0x00 "SFSP0_0,Function-select port 0, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 0,QEI0 PHB,CAN0 TXD,EXTBUS D24" line.long 0x04 "SFSP0_1,Function-select port 0, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 1,QEI 0 PHA,CAN0 RXD,EXTBUS D25" line.long 0x08 "SFSP0_2,Function-select port 0, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 2,CLK_OUT,PWM0 MAT0,EXTBUS D26" line.long 0x0c "SFSP0_3,Function-select port 0, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 3,/USB_UP_LED1,PWM0 MAT1,EXTBUS D27" line.long 0x10 "SFSP0_4,Function-select port 0, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 4,ADC0 IN0,PWM0 MAT2,EXTBUS D28" line.long 0x14 "SFSP0_5,Function-select port 0, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 5,ADC0 IN1,PWM0 MAT3,EXTBUS D29" line.long 0x18 "SFSP0_6,Function-select port 0, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 6,ADC0 IN2,PWM0 MAT4,EXTBUS D30" line.long 0x1c "SFSP0_7,Function-select port 0, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 7,ADC0 IN3,PWM0 MAT5,EXTBUS D31" line.long 0x20 "SFSP0_8,Function-select port 0, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 8,ADC1 IN0,LIN0 TXD/UART TXD,EXTBUS A20" line.long 0x24 "SFSP0_9,Function-select port 0, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 9,ADC1 IN1,LIN0 RXD/ UART TXD,EXTBUS A21" line.long 0x28 "SFSP0_10,Function-select port 0, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 10,ADC1 IN2,PWM1 MAT0,EXTBUS A8" line.long 0x2c "SFSP0_11,Function-select port 0, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 11,ADC1 IN3,PWM1 MAT1,EXTBUS A9" line.long 0x30 "SFSP0_12,Function-select port 0, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 12,ADC1 IN4,PWM1 MAT2,EXTBUS A10" line.long 0x34 "SFSP0_13,Function-select port 0, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 13,ADC1 IN5,PWM1 MAT3,EXTBUS A11" line.long 0x38 "SFSP0_14,Function-select port 0, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 14,ADC1 IN6,PWM1 MAT4,EXTBUS A12" line.long 0x3c "SFSP0_15,Function-select port 0, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 15,ADC1 IN7,PWM1 MAT5,EXTBUS A13" line.long 0x40 "SFSP0_16,Function-select port 0, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 16,ADC2 IN0,UART0 TXD,EXTBUS A22" line.long 0x44 "SFSP0_17,Function-select port 0, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 17,ADC2 IN1,UART0 RXD,EXTBUS A23" line.long 0x48 "SFSP0_18,Function-select port 0, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 18,ADC2 IN2,PWM2 MAT0,EXTBUS A14" line.long 0x4c "SFSP0_19,Function-select port 0, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 19,ADC2 IN3,PWM2 MAT1,EXTBUS A15" line.long 0x50 "SFSP0_20,Function-select port 0, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 20,ADC2 IN4,PWM2 MAT2,EXTBUS A16" line.long 0x54 "SFSP0_21,Function-select port 0, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 21,ADC2 IN5,PWM2 MAT3,EXTBUS A17" line.long 0x58 "SFSP0_22,Function-select port 0, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 22,ADC2 IN6,PWM2 MAT4,EXTBUS A18" line.long 0x5c "SFSP0_23,Function-select port 0, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 23,ADC2 IN7,PWM2 MAT5,EXTBUS A19" line.long 0x60 "SFSP0_24,Function-select port 0, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 24,UART1 TXD,CAN1 TXD,SPI2 SCS0" line.long 0x64 "SFSP0_25,Function-select port 0, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 25,UART1 RXD,CAN1 RXD,SPI2 SDO" line.long 0x68 "SFSP0_26,Function-select port 0, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 26,Reserved,UART1 TXD,SPI2 SDI" line.long 0x6c "SFSP0_27,Function-select port 0, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 27,Reserved,UART1 RXD,SPI2 SCK" line.long 0x70 "SFSP0_28,Function-select port 0, pin 28 register" bitfld.long 0x70 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x70 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 28,Reserved,TIMER0 CAP0,TIMER0 MAT0" line.long 0x74 "SFSP0_29,Function-select port 0, pin 29 register" bitfld.long 0x74 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x74 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 29,Reserved,TIMER0 CAP1,TIMER0 MAT1" line.long 0x78 "SFSP0_30,Function-select port 0, pin 30 register" bitfld.long 0x78 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x78 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 30,Reserved,TIMER0 CAP2,TIMER0 MAT2" line.long 0x7c "SFSP0_31,Function-select port 0, pin 31 register" bitfld.long 0x7c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x7c 0.--1. " FUNC_SEL ,Function-select" "GPIO_0/pin 31,Reserved,TIMER0 CAP3,TIMER0 MAT3" tree.end tree "Port 1" group.long 0x100++0x7f line.long 0x00 "SFSP1_0,Function-select port 1, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 0,EXTINT0,PWM3 MAT0,EXTBUS A0" line.long 0x04 "SFSP1_1,Function-select port 1, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 1,EXTINT1,PWM3 MAT1,EXTBUS A1" line.long 0x08 "SFSP1_2,Function-select port 1, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 2,SPI2 SCS3,PWM3 MAT2,EXTBUS A2" line.long 0x0c "SFSP1_3,Function-select port 1, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 3,SPI2 SCS1,PWM3 MAT3,EXTBUS A3" line.long 0x10 "SFSP1_4,Function-select port 1, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 4,SPI2 SCS2,PWM3 MAT4,EXTBUS A4" line.long 0x14 "SFSP1_5,Function-select port 1, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 5,SPI1 SCS1,PWM3 MAT5,EXTBUS A5" line.long 0x18 "SFSP1_6,Function-select port 1, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 6,SPI1 SCS2,UART1 TXD,EXTBUS A6" line.long 0x1c "SFSP1_7,Function-select port 1, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 7,SPI1 SCS3,UART1 RXD,EXTBUS A7" line.long 0x20 "SFSP1_8,Function-select port 1, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 8,SPI1 SCS0,LIN1 TXD/UART TXD,EXTBUS CS0" line.long 0x24 "SFSP1_9,Function-select port 1, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 9,SPI1 SDO,LIN1 RXD/UART RXD,EXTBUS CS1" line.long 0x28 "SFSP1_10,Function-select port 1, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 10,SPI1 SDI,I2C0 SDA,EXTBUS CS2" line.long 0x2c "SFSP1_11,Function-select port 1, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 11,SPI1 SCK,I2C0 SCL,EXTBUS CS3" line.long 0x30 "SFSP1_12,Function-select port 1, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 12,EXTINT2,I2C1 SDA,EXTBUS OE" line.long 0x34 "SFSP1_13,Function-select port 1, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 13,EXTINT3,I2C1 SCL,EXTBUS WE" line.long 0x38 "SFSP1_14,Function-select port 1, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 14,TIMER2 CAP0,SPI0 SCS3,EXTBUS D0" line.long 0x3c "SFSP1_15,Function-select port 1, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 15,TIMER2 CAP1,SPI0 SCS0,EXTBUS D1" line.long 0x40 "SFSP1_16,Function-select port 1, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 16,TIMER2 CAP2,SPI0 SCK,EXTBUS D2" line.long 0x44 "SFSP1_17,Function-select port 1, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 17,TIMER2 CAP3,SPI0 SDI,EXTBUS D3" line.long 0x48 "SFSP1_18,Function-select port 1, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 18,TIMER3 CAP0,SPI0 SDO,EXTBUS D4" line.long 0x4c "SFSP1_19,Function-select port 1, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 19,TIMER3 CAP1,SPI0 SCS2,EXTBUS D5" line.long 0x50 "SFSP1_20,Function-select port 1, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 20,TIMER3 CAP2,SPI0 SCS1,EXTBUS D6" line.long 0x54 "SFSP1_21,Function-select port 1, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 21,TIMER3 CAP3,TIMER1 CAP3/MSCSS PAUSE,EXTBUS D7" line.long 0x58 "SFSP1_22,Function-select port 1, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 22,UART0 TXD,/USB_UP_LED1,EXTBUS CS4" line.long 0x5c "SFSP1_23,Function-select port 1, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 23,UART0 RXD,USB_SSPND1,EXTBUS CS5" line.long 0x60 "SFSP1_24,Function-select port 1, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 24,PWM0 MAT0,/USB_CONNECT1,PWM3 MAT0" line.long 0x64 "SFSP1_25,Function-select port 1, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 25,PWM1 MAT0,USB_VBUS1,PWM3 MAT1" line.long 0x68 "SFSP1_26,Function-select port 1, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 26,PWM2 MAT0,PWM TRAP3,PWM3 MAT2" line.long 0x6c "SFSP1_27,Function-select port 1, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 27,TIMER1 CAP2/ADC2 EXT START,PWM TRAP2,PWM3 MAT3" line.long 0x70 "SFSP1_28,Function-select port 1, pin 28 register" bitfld.long 0x70 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x70 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 28,TIMER1 CAP1/ADC1 EXTSTART,PWM TRAP1,PWM3 MAT4" line.long 0x74 "SFSP1_29,Function-select port 1, pin 29 register" bitfld.long 0x74 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x74 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 29,TIMER1 CAP0/ADC0 EXTSTART,PWM TRAP0,PWM3 MAT5" line.long 0x78 "SFSP1_30,Function-select port 1, pin 30 register" bitfld.long 0x78 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x78 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 30,TIMER0 CAP0,TIMER0 MAT0,EXTINT4" line.long 0x7c "SFSP1_31,Function-select port 1, pin 31 register" bitfld.long 0x7c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x7c 0.--1. " FUNC_SEL ,Function-select" "GPIO_1/pin 31,TIMER0 CAP1,TIMER0 MAT1,EXTINT5" tree.end tree "Port 2" group.long 0x200++0x6f line.long 0x00 "SFSP2_0,Function-select port 2, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 0,TIMER2 MAT0,PWM TRAP3,EXTBUS D8" line.long 0x04 "SFSP2_1,Function-select port 2, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 1,TIMER2 MAT1,PWM TRAP2,EXTBUS D9" line.long 0x08 "SFSP2_2,Function-select port 2, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 2,TIMER2 MAT2,PWM TRAP1,EXTBUS D10" line.long 0x0c "SFSP2_3,Function-select port 2, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 3,TIMER2 MAT3,PWM TRAP0,EXTBUS D11" line.long 0x10 "SFSP2_4,Function-select port 2, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 4,TIMER1 MAT0,EXTINT0,EXTBUS D12" line.long 0x14 "SFSP2_5,Function-select port 2, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 5,TIMER1 MAT1,EXTINT1,EXTBUS D13" line.long 0x18 "SFSP2_6,Function-select port 2, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 6,TIMER1 MAT2,EXTINT2,EXTBUS D14" line.long 0x1c "SFSP2_7,Function-select port 2, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 7,TIMER1 MAT3,EXTINT3,EXTBUS D15" line.long 0x20 "SFSP2_8,Function-select port 2, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 8,CLK_OUT,PWM0 MAT0,SPI0 SCS2" line.long 0x24 "SFSP2_9,Function-select port 2, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 9,/USB_UP_LED1,PWM0 MAT1,SPI0 SCS1" line.long 0x28 "SFSP2_10,Function-select port 2, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 10,/USB_INT1,PWM0 MAT2,SPI0 SCS0" line.long 0x2c "SFSP2_11,Function-select port 2, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 11,/USB_RST1,PWM0 MAT3,SPI0 SCK" line.long 0x30 "SFSP2_12,Function-select port 2, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 12,ADC0 IN4,PWM0 MAT4,SPI0 SDI" line.long 0x34 "SFSP2_13,Function-select port 2, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 13,ADC0 IN5,PWM0 MAT5,SPI0 SDO" line.long 0x38 "SFSP2_14,Function-select port 2, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 14,I2C1 SDA,PWM0 CAP0,EXTBUS BLS0" line.long 0x3c "SFSP2_15,Function-select port 2, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 15,I2C1 SCL,PWM0 CAP1,EXTBUS BLS1" line.long 0x40 "SFSP2_16,Function-select port 2, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 16,UART1 TXD,PWM0 CAP2,EXTBUS BLS2" line.long 0x44 "SFSP2_17,Function-select port 2, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 17,UART1 RXD,PWM1 CAP0,EXTBUS BLS3" line.long 0x48 "SFSP2_18,Function-select port 2, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 18,SPI2 SCS1,PWM1 CAP1,EXTBUS D16" line.long 0x4c "SFSP2_19,Function-select port 2, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 19,SPI2 SCS0,PWM1 CAP2,EXTBUS D17" line.long 0x50 "SFSP2_20,Function-select port 2, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 20,SPI2 SDO,PWM2 CAP0,EXTBUS D18" line.long 0x54 "SFSP2_21,Function-select port 2, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 21,SPI2 SDI,PWM2 CAP1,EXTBUS D19" line.long 0x58 "SFSP2_22,Function-select port 2, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 22,SPI2 SCK,PWM2 CAP2,EXTBUS D20" line.long 0x5c "SFSP2_23,Function-select port 2, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 23,SPI1 SCS0,PWM3 CAP0,EXTBUS D21" line.long 0x60 "SFSP2_24,Function-select port 2, pin 24 register" bitfld.long 0x60 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x60 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 24,SPI1 SCS1,PWM3 CAP1,EXTBUS D22" line.long 0x64 "SFSP2_25,Function-select port 2, pin 25 register" bitfld.long 0x64 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x64 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 25,SPI1 SCS2,PWM3 CAP2,EXTBUS D23" line.long 0x68 "SFSP2_26,Function-select port 2, pin 26 register" bitfld.long 0x68 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x68 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 26,TIMER0 CAP2,TIMER0 MAT2,EXTINT6" line.long 0x6c "SFSP2_27,Function-select port 2, pin 27 register" bitfld.long 0x6c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x6c 0.--1. " FUNC_SEL ,Function-select" "GPIO_2/pin 27,TIMER0 CAP3,TIMER0 MAT3,EXTINT7" tree.end tree "Port 3" group.long 0x300++0x3f line.long 0x00 "SFSP3_0,Function-select port 3, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 0,ADC0 IN6,PWM2 MAT0,EXTBUS CS6" line.long 0x04 "SFSP3_1,Function-select port 3, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 1,ADC0 IN7,PWM2 MAT1,EXTBUS CS7" line.long 0x08 "SFSP3_2,Function-select port 3, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 2,TIMER3 MAT0,PWM2 MAT2,USB_SDA1" line.long 0x0c "SFSP3_3,Function-select port 3, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 3,TIMER3 MAT1,PWM2 MAT3,USB_SCL1" line.long 0x10 "SFSP3_4,Function-select port 3, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 4,TIMER3 MAT2,PWM2 MAT4,CAN1 TXD" line.long 0x14 "SFSP3_5,Function-select port 3, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 5,TIMER3 MAT3,PWM2 MAT5,CAN1 RXD" line.long 0x18 "SFSP3_6,Function-select port 3, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 6,SPI0 SCS3,PWM1 MAT0,LIN1/UART TXD" line.long 0x1c "SFSP3_7,Function-select port 3, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 7,SPI2 SCS1,PWM1 MAT1,LIN1/UART RXD" line.long 0x20 "SFSP3_8,Function-select port 3, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 8,SPI2 SCS0,PWM1 MAT2,/USB_OVRCR1" line.long 0x24 "SFSP3_9,Function-select port 3, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 9,SPI2 SDO,PWM1 MAT3,/USB_PPWR1" line.long 0x28 "SFSP3_10,Function-select port 3, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 10,SPI2 SDI,PWM1 MAT4,/USB_PWRD1" line.long 0x2c "SFSP3_11,Function-select port 3, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 11,SPI2 SCK,PWM1 MAT5,USB_LS1" line.long 0x30 "SFSP3_12,Function-select port 3, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 12,SPI1 SCS0,EXTINT4,USB_SSPND1" line.long 0x34 "SFSP3_13,Function-select port 3, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 13,SPI1 SDO,EXTINT5,QEI0 IDX" line.long 0x38 "SFSP3_14,Function-select port 3, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 14,SPI1 SDI,EXTINT6,CAN0 TXD" line.long 0x3c "SFSP3_15,Function-select port 3, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_3/pin 15,SPI1 SCK,EXTINT7,CAN0 RXD" tree.end tree "Port 4" group.long 0x400++0x5f line.long 0x00 "SFSP4_0,Function-select port 4, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 0,EXTBUS A8,?..." line.long 0x04 "SFSP4_1,Function-select port 4, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 1,EXTBUS A9,?..." line.long 0x08 "SFSP4_2,Function-select port 4, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 2,EXTBUS A10,?..." line.long 0x0c "SFSP4_3,Function-select port 4, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 3,EXTBUS A11,?..." line.long 0x10 "SFSP4_4,Function-select port 4, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 4,EXTBUS A12,?..." line.long 0x14 "SFSP4_5,Function-select port 4, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 5,EXTBUS A13,?..." line.long 0x18 "SFSP4_6,Function-select port 4, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 6,EXTBUS A20,UART1 RI1,?..." line.long 0x1c "SFSP4_7,Function-select port 4, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 7,EXTBUS A21,UART1 DTR,?..." line.long 0x20 "SFSP4_8,Function-select port 4, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 8,EXTBUS A22,UART1 DSR,?..." line.long 0x24 "SFSP4_9,Function-select port 4, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 9,EXTBUS A23,UART1 DCD,?..." line.long 0x28 "SFSP4_10,Function-select port 4, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 10,EXTBUS OE_N,UART1 CTS,?..." line.long 0x2c "SFSP4_11,Function-select port 4, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 11,EXTBUS WE_N,UART0 CTS,?..." line.long 0x30 "SFSP4_12,Function-select port 4, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 12,EXTBUS BLS0,?..." line.long 0x34 "SFSP4_13,Function-select port 4, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 13,EXTBUS BLS1,?..." line.long 0x38 "SFSP4_14,Function-select port 4, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 14,EXTBUS BLS2,?..." line.long 0x3c "SFSP4_15,Function-select port 4, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 15,EXTBUS BLS3,?..." line.long 0x40 "SFSP4_16,Function-select port 4, pin 16 register" bitfld.long 0x40 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 16,EXTBUS CS6,UART1 OUT1,?..." line.long 0x44 "SFSP4_17,Function-select port 4, pin 17 register" bitfld.long 0x44 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 17,EXTBUS CS7,UART1 OUT2,?..." line.long 0x48 "SFSP4_18,Function-select port 4, pin 18 register" bitfld.long 0x48 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 18,/USB_UP_LED2,?..." line.long 0x4c "SFSP4_19,Function-select port 4, pin 19 register" bitfld.long 0x4c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x4c 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 19,/USB_CONNECT2,?..." line.long 0x50 "SFSP4_20,Function-select port 4, pin 20 register" bitfld.long 0x50 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x50 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 20,USB_VBUS2,?..." line.long 0x54 "SFSP4_21,Function-select port 4, pin 21 register" bitfld.long 0x54 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x54 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 21,/USB_OVRCR2,?..." line.long 0x58 "SFSP4_22,Function-select port 4, pin 22 register" bitfld.long 0x58 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x58 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 22,/USB_PPWR2,?..." line.long 0x5c "SFSP4_23,Function-select port 4, pin 23 register" bitfld.long 0x5c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x5c 0.--1. " FUNC_SEL ,Function-select" "GPIO_4/pin 23,/USB_PWRD2,?..." tree.end tree "Port 5" group.long 0x500++0x4f line.long 0x00 "SFSP5_0,Function-select port 5, pin 0 register" bitfld.long 0x00 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x00 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 0,EXTBUS D8,?..." line.long 0x04 "SFSP5_1,Function-select port 5, pin 1 register" bitfld.long 0x04 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x04 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 1,EXTBUS D9,?..." line.long 0x08 "SFSP5_2,Function-select port 5, pin 2 register" bitfld.long 0x08 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x08 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 2,EXTBUS D10,?..." line.long 0x0c "SFSP5_3,Function-select port 5, pin 3 register" bitfld.long 0x0c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x0c 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 3,EXTBUS D11,?..." line.long 0x10 "SFSP5_4,Function-select port 5, pin 4 register" bitfld.long 0x10 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x10 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 4,EXTBUS D16,?..." line.long 0x14 "SFSP5_5,Function-select port 5, pin 5 register" bitfld.long 0x14 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x14 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 5,EXTBUS D17,?..." line.long 0x18 "SFSP5_6,Function-select port 5, pin 6 register" bitfld.long 0x18 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x18 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 6,EXTBUS D18,UART0 RI,?..." line.long 0x1c "SFSP5_7,Function-select port 5, pin 7 register" bitfld.long 0x1c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x1c 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 7,EXTBUS D19,UART0 OUT1,?..." line.long 0x20 "SFSP5_8,Function-select port 5, pin 8 register" bitfld.long 0x20 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x20 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 8,EXTBUS D20,UART0 OUT2,?..." line.long 0x24 "SFSP5_9,Function-select port 5, pin 9 register" bitfld.long 0x24 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x24 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 9,EXTBUS D21,UART0 DTR,?..." line.long 0x28 "SFSP5_10,Function-select port 5, pin 10 register" bitfld.long 0x28 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x28 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 10,EXTBUS D22,UART1 DSR,?..." line.long 0x2c "SFSP5_11,Function-select port 5, pin 11 register" bitfld.long 0x2c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x2c 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 11,EXTBUS D23,UART0 DCD,?..." line.long 0x30 "SFSP5_12,Function-select port 5, pin 12 register" bitfld.long 0x30 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x30 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 12,EXTBUS D24,?..." line.long 0x34 "SFSP5_13,Function-select port 5, pin 13 register" bitfld.long 0x34 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x34 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 13,EXTBUS D25,?..." line.long 0x38 "SFSP5_14,Function-select port 5, pin 14 register" bitfld.long 0x38 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x38 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 14,USB_SSPND1,UART0 RS,?..." line.long 0x3c "SFSP5_15,Function-select port 5, pin 15 register" bitfld.long 0x3c 2.--4. " PAD_TYPE ,Input pad type" "Analog input,Digital In w/o internal pull up/down,Reserved,Digital In w/ internal pull up,Reserved,Digital In w/ internal pull down,Reserved,Digital In w/ bus keeper" textline " " bitfld.long 0x3c 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 15,/USB_UP_LED1,UART1 RTS,?..." line.long 0x40 "SFSP5_16,Function-select port 5, pin 16 register" bitfld.long 0x40 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 16,USB_D-2,?..." line.long 0x44 "SFSP5_17,Function-select port 5, pin 17 register" bitfld.long 0x44 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 17,USB_D+2,?..." line.long 0x48 "SFSP5_18,Function-select port 5, pin 18 register" bitfld.long 0x48 4. " VBUS ,Port 1 VBUS select" "Host/Device,OTG" textline " " bitfld.long 0x48 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 18,USB_D-1,?..." line.long 0x4c "SFSP5_19,Function-select port 5, pin 19 register" bitfld.long 0x4C 4. " VBUS ,Port 1 VBUS select" "Host/Device,OTG" textline " " bitfld.long 0x4C 0.--1. " FUNC_SEL ,Function-select" "GPIO_5/pin 19,USB_D+1,?..." tree.end endif tree.end tree "CFID (Chip Feature Id)" base ad:0xE0000000 width 8. rgroup.long 0x00++0x3 line.long 0x00 "CHIPID,CHIPID" bitfld.long 0x00 28.--31. " VERSION ,VERSION" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." hexmask.long.word 0x00 12.--27. 1. " PART_NR ,PART_NR" hexmask.long.word 0x00 1.--11. 1. " MANUFACTURER_ID ,MANUFACTURER_ID" rgroup.long 0x100++0x0F line.long 0x00 "FEAT0" bitfld.long 0x00 0.--3. " PACKAGE_ID ,PACKAGE_ID" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "FEAT1" line.long 0x08 "FEAT2" line.long 0x0C "FEAT3" bitfld.long 0x0C 31. " JTAGSEC ,JTAG security in the flash index sector" "Disabled,Enabled" width 0xb tree.end tree "Event Router" base ad:0xE0002000 width 6. group.long 0xC00++0x03 line.long 0x00 "PEND,Event status register" setclrfld.long 0x0 24. 0x40 24. 0x20 24. " PEND_VIC_set/clr ,Event status on the corresponding pin (VIC IRQ - interanl)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 23. 0x40 23. 0x20 23. " PEND_FIC_set/clr ,Event status on the corresponding pin (FIC FIQ - internal)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 22. 0x40 22. 0x20 22. " PEND_CAN_set/clr ,Event status on the corresponding pin (CAN interrupt - internal)" "Not occurred,Occurred" textline " " sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2926"||cpuis("LPC293*")) setclrfld.long 0x0 21. 0x40 21. 0x20 21. " PEND_USB_I2C_SCL_set/clr ,Event status on the corresponding pin (USB_I2C_SCL)" "Not occurred,Occurred" textline " " endif setclrfld.long 0x0 20. 0x40 20. 0x20 20. " PEND_UART1_RXD_set/clr ,Event status on the corresponding pin (UART1 RXD)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 19. 0x40 19. 0x20 19. " PEND_UART0_RXD_set/clr ,Event status on the corresponding pin (UART0 RXD)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 18. 0x40 18. 0x20 18. " PEND_SPI2_SDI_set/clr ,Event status on the corresponding pin (SPI2 SDI)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 17. 0x40 17. 0x20 17. " PEND_SPI1_SDI_set/clr ,Event status on the corresponding pin (SPI1 SDI)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 16. 0x40 16. 0x20 16. " PEND_SPI0_SDI_set/clr ,Event status on the corresponding pin (SPI0 SDI)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 15. 0x40 15. 0x20 15. " PEND_LIN1_RXDL_set/clr ,Event status on the corresponding pin (LIN1 RXDL)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 14. 0x40 14. 0x20 14. " PEND_LIN0_RXDL_set/clr ,Event status on the corresponding pin (LIN0 RXDL)" "Not occurred,Occurred" textline " " sif (cpuis("LPC292*")||cpuis("LPC293*")) setclrfld.long 0x0 13. 0x40 13. 0x20 13. " PEND_USB_D+2_set/clr ,Event status on the corresponding pin (RSR USB D+2)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 12. 0x40 12. 0x20 12. " PEND_USB_D+1_set/clr ,Event status on the corresponding pin (USB0_DP)" "Not occurred,Occurred" textline " " endif setclrfld.long 0x0 11. 0x40 11. 0x20 11. " PEND_I2C1_SCL_set/clr ,Event status on the corresponding pin (I2C1_SCL)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 10. 0x40 10. 0x20 10. " PEND_I2C0_SCL_set/clr ,Event status on the corresponding pin (I2C0_SCL)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 9. 0x40 9. 0x20 9. " PEND_CAN1_RXDC_set/clr ,Event status on the corresponding pin (CAN1 RXDC)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 8. 0x40 8. 0x20 8. " PEND_CAN0_RXDC_set/clr ,Event status on the corresponding pin (CAN0 RXDC)" "Not occurred,Occurred" textline " " sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925"||cpu()!="LPC2917"||cpu()!="LPC2919") setclrfld.long 0x0 7. 0x40 7. 0x20 7. " PEND_EXTINT7_set/clr ,Event status on the corresponding pin (EXTINT7)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 6. 0x40 6. 0x20 6. " PEND_EXTINT6_set/clr ,Event status on the corresponding pin (EXTINT6)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 5. 0x40 5. 0x20 5. " PEND_EXTINT5_set/clr ,Event status on the corresponding pin (EXTINT5)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 4. 0x40 4. 0x20 4. " PEND_EXTINT4_set/clr ,Event status on the corresponding pin (EXTINT4)" "Not occurred,Occurred" textline " " endif sif (cpu()!="LPC2917"||cpu()!="LPC2919") setclrfld.long 0x0 3. 0x40 3. 0x20 3. " PEND_EXTINT3_set/clr ,Event status on the corresponding pin (EXTINT3)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 2. 0x40 2. 0x20 2. " PEND_EXTINT2_set/clr ,Event status on the corresponding pin (EXTINT2)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 1. 0x40 1. 0x20 1. " PEND_EXTINT1_set/clr ,Event status on the corresponding pin (EXTINT1)" "Not occurred,Occurred" textline " " setclrfld.long 0x0 0. 0x40 0. 0x20 0. " PEND_EXTINT0_set/clr ,Event status on the corresponding pin (EXTINT0)" "Not occurred,Occurred" endif group.long 0xC60++0x03 line.long 0x00 "MASK,Event-enable register" setclrfld.long 0x0 24. 0x40 24. 0x20 24. " MASK_VIC_set/clr ,Event enable on the corresponding pin (VIC IRQ - interanl)" "Disabled,Enabled" setclrfld.long 0x0 23. 0x40 23. 0x20 23. " MASK_FIC_set/clr ,Event enable on the corresponding pin (FIC FIQ - internal)" "Disabled,Enabled" textline " " setclrfld.long 0x0 22. 0x40 22. 0x20 22. " MASK_CAN_set/clr ,Event enable on the corresponding pin (CAN interrupt - internal)" "Disabled,Enabled" sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2926"||cpuis("LPC293*")) setclrfld.long 0x0 21. 0x40 21. 0x20 21. " MASK_USB_I2C_SCL_set/clr ,Event enable on the corresponding pin (USB_I2C_SCL)" "Disabled,Enabled" endif textline " " setclrfld.long 0x0 20. 0x40 20. 0x20 20. " MASK_UART1_RXD_set/clr ,Event enable on the corresponding pin (UART1 RXD)" "Disabled,Enabled" setclrfld.long 0x0 19. 0x40 19. 0x20 19. " MASK_UART0_RXD_set/clr ,Event enable on the corresponding pin (UART0 RXD)" "Disabled,Enabled" textline " " setclrfld.long 0x0 18. 0x40 18. 0x20 18. " MASK_SPI2_SDI_set/clr ,Event enable on the corresponding pin (SPI2 SDI)" "Disabled,Enabled" setclrfld.long 0x0 17. 0x40 17. 0x20 17. " MASK_SPI1_SDI_set/clr ,Event enable on the corresponding pin (SPI1 SDI)" "Disabled,Enabled" textline " " setclrfld.long 0x0 16. 0x40 16. 0x20 16. " MASK_SPI0_SDI_set/clr ,Event enable on the corresponding pin (SPI0 SDI)" "Disabled,Enabled" setclrfld.long 0x0 15. 0x40 15. 0x20 15. " MASK_LIN1_RXDL_set/clr ,Event enable on the corresponding pin (LIN1 RXDL)" "Disabled,Enabled" textline " " setclrfld.long 0x0 14. 0x40 14. 0x20 14. " MASK_LIN0_RXDL_set/clr ,Event enable on the corresponding pin (LIN0 RXDL)" "Disabled,Enabled" sif (cpuis("LPC292*")||cpuis("LPC293*")) setclrfld.long 0x0 13. 0x40 13. 0x20 13. " MASK_USB_D+2_set/clr ,Event enable on the corresponding pin (RSR USB D+2)" "Disabled,Enabled" textline " " setclrfld.long 0x0 12. 0x40 12. 0x20 12. " MASK_USB_D+1_set/clr ,Event enable on the corresponding pin (USB0_DP)" "Disabled,Enabled" endif setclrfld.long 0x0 11. 0x40 11. 0x20 11. " MASK_I2C1_SCL_set/clr ,Event enable on the corresponding pin (I2C1_SCL)" "Disabled,Enabled" textline " " setclrfld.long 0x0 10. 0x40 10. 0x20 10. " MASK_I2C0_SCL_set/clr ,Event enable on the corresponding pin (I2C0_SCL)" "Disabled,Enabled" setclrfld.long 0x0 9. 0x40 9. 0x20 9. " MASK_CAN1_RXDC_set/clr ,Event enable on the corresponding pin (CAN1 RXDC)" "Disabled,Enabled" textline " " setclrfld.long 0x0 8. 0x40 8. 0x20 8. " MASK_CAN0_RXDC_set/clr ,Event enable on the corresponding pin (CAN0 RXDC)" "Disabled,Enabled" sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925"||cpu()!="LPC2917"||cpu()!="LPC2919") setclrfld.long 0x0 7. 0x40 7. 0x20 7. " MASK_EXTINT7_set/clr ,Event enable on the corresponding pin (EXTINT7)" "Disabled,Enabled" textline " " setclrfld.long 0x0 6. 0x40 6. 0x20 6. " MASK_EXTINT6_set/clr ,Event enable on the corresponding pin (EXTINT6)" "Disabled,Enabled" setclrfld.long 0x0 5. 0x40 5. 0x20 5. " MASK_EXTINT5_set/clr ,Event enable on the corresponding pin (EXTINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x0 4. 0x40 4. 0x20 4. " MASK_EXTINT4_set/clr ,Event enable on the corresponding pin (EXTINT4)" "Disabled,Enabled" endif sif (cpu()!="LPC2917"||cpu()!="LPC2919") setclrfld.long 0x0 3. 0x40 3. 0x20 3. " MASK_EXTINT3_set/clr ,Event enable on the corresponding pin (EXTINT3)" "Disabled,Enabled" textline " " setclrfld.long 0x0 2. 0x40 2. 0x20 2. " MASK_EXTINT2_set/clr ,Event enable on the corresponding pin (EXTINT2)" "Disabled,Enabled" setclrfld.long 0x0 1. 0x40 1. 0x20 1. " MASK_EXTINT1_set/clr ,Event enable on the corresponding pin (EXTINT1)" "Disabled,Enabled" textline " " setclrfld.long 0x0 0. 0x40 0. 0x20 0. " MASK_EXTINT0_set/clr ,Event enable on the corresponding pin (EXTINT0)" "Disabled,Enabled" endif group.long 0xCC0++0x03 line.long 0x00 "APR,Activation polarity register" bitfld.long 0x0 24. " APR_VIC ,Sets the active state level on the corresponding pin (VIC IRQ - interanl)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 23. " APR_FIC ,Sets the active state level on the corresponding pin (FIC FIQ - internal)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 22. " APR_CAN ,Sets the active state level on the corresponding pin (CAN interrupt - internal)" "Low-level/Falling edge,High-level/Rising edge)" textline " " sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2926"||cpuis("LPC293*")) bitfld.long 0x0 21. " APR_USB_I2C_SCL ,Sets the active state level on the corresponding pin (USB_I2C_SCL)" "Low-level/Falling edge,High-level/Rising edge)" textline " " endif bitfld.long 0x0 20. " APR_UART1_RXD ,Sets the active state level on the corresponding pin (UART1 RXD)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 19. " APR_UART0_RXD ,Sets the active state level on the corresponding pin (UART0 RXD)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 18. " APR_SPI2_SDI ,Sets the active state level on the corresponding pin (SPI2 SDI)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 17. " APR_SPI1_SDI ,Sets the active state level on the corresponding pin (SPI1 SDI)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 16. " APR_SPI0_SDI ,Sets the active state level on the corresponding pin (SPI0 SDI)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 15. " APR_LIN1_RXDL ,Sets the active state level on the corresponding pin (LIN1 RXDL)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 14. " APR_LIN0_RXDL ,Sets the active state level on the corresponding pin (LIN0 RXDL)" "Low-level/Falling edge,High-level/Rising edge)" textline " " sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x0 13. " APR_USB_D+2 ,Sets the active state level on the corresponding pin (RSR USB D+2)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 12. " APR_USB_D+1 ,Sets the active state level on the corresponding pin (USB0_DP)" "Low-level/Falling edge,High-level/Rising edge)" textline " " endif bitfld.long 0x0 11. " APR_I2C1_SCL ,Sets the active state level on the corresponding pin (I2C1_SCL)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 10. " APR_I2C0_SCL ,Sets the active state level on the corresponding pin (I2C0_SCL)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 9. " APR_CAN1_RXDC ,Sets the active state level on the corresponding pin (CAN1 RXDC)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 8. " APR_CAN0_RXDC ,Sets the active state level on the corresponding pin (CAN0 RXDC)" "Low-level/Falling edge,High-level/Rising edge)" textline " " sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925"||cpu()!="LPC2917"||cpu()!="LPC2919") bitfld.long 0x0 7. " APR_EXTINT7 ,Sets the active state level on the corresponding pin (EXTINT7)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 6. " APR_EXTINT6 ,Sets the active state level on the corresponding pin (EXTINT6)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 5. " APR_EXTINT5 ,Sets the active state level on the corresponding pin (EXTINT5)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 4. " APR_EXTINT4 ,Sets the active state level on the corresponding pin (EXTINT4)" "Low-level/Falling edge,High-level/Rising edge)" textline " " endif sif (cpu()!="LPC2917"||cpu()!="LPC2919") bitfld.long 0x0 3. " APR_EXTINT3 ,Sets the active state level on the corresponding pin (EXTINT3)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 2. " APR_EXTINT2 ,Sets the active state level on the corresponding pin (EXTINT2)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 1. " APR_EXTINT1 ,Sets the active state level on the corresponding pin (EXTINT1)" "Low-level/Falling edge,High-level/Rising edge)" textline " " bitfld.long 0x0 0. " APR_EXTINT0 ,Sets the active state level on the corresponding pin (EXTINT0)" "Low-level/Falling edge,High-level/Rising edge)" endif group.long 0xCE0++0x03 line.long 0x00 "ATR,Activation type register" bitfld.long 0x0 24. " ATR_VIC ,Event setting on the corresponding pin (VIC IRQ - interanl)" "Directly/Level,Latched/Edge" bitfld.long 0x0 23. " ATR_FIC ,Event setting on the corresponding pin (FIC FIQ - internal)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 22. " ATR_CAN ,Event setting on the corresponding pin (CAN interrupt - internal)" "Directly/Level,Latched/Edge" sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2926"||cpuis("LPC293*")) bitfld.long 0x0 21. " ATR_USB_I2C_SCL ,Event setting on the corresponding pin (USB_I2C_SCL)" "Directly/Level,Latched/Edge" endif textline " " bitfld.long 0x0 20. " ATR_UART1_RXD ,Event setting on the corresponding pin (UART1 RXD)" "Directly/Level,Latched/Edge" bitfld.long 0x0 19. " ATR_UART0_RXD ,Event setting on the corresponding pin (UART0 RXD)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 18. " ATR_SPI2_SDI ,Event setting on the corresponding pin (SPI2 SDI)" "Directly/Level,Latched/Edge" bitfld.long 0x0 17. " ATR_SPI1_SDI ,Event setting on the corresponding pin (SPI1 SDI)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 16. " ATR_SPI0_SDI ,Event setting on the corresponding pin (SPI0 SDI)" "Directly/Level,Latched/Edge" bitfld.long 0x0 15. " ATR_LIN1_RXDL ,Event setting on the corresponding pin (LIN1 RXDL)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 14. " ATR_LIN0_RXDL ,Event setting on the corresponding pin (LIN0 RXDL)" "Directly/Level,Latched/Edge" sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x0 13. " ATR_USB_D+2 ,Event setting on the corresponding pin (RSR USB D+2)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 12. " ATR_USB_D+1 ,Event setting on the corresponding pin (USB0_DP)" "Directly/Level,Latched/Edge" endif bitfld.long 0x0 11. " ATR_I2C1_SCL ,Event setting on the corresponding pin (I2C1_SCL)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 10. " ATR_I2C0_SCL ,Event setting on the corresponding pin (I2C0_SCL)" "Directly/Level,Latched/Edge" bitfld.long 0x0 9. " ATR_CAN1_RXDC ,Event setting on the corresponding pin (CAN1 RXDC)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 8. " ATR_CAN0_RXDC ,Event setting on the corresponding pin (CAN0 RXDC)" "Directly/Level,Latched/Edge" sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925"||cpu()!="LPC2917"||cpu()!="LPC2919") bitfld.long 0x0 7. " ATR_EXTINT7 ,Event setting on the corresponding pin (EXTINT7)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 6. " ATR_EXTINT6 ,Event setting on the corresponding pin (EXTINT6)" "Directly/Level,Latched/Edge" bitfld.long 0x0 5. " ATR_EXTINT5 ,Event setting on the corresponding pin (EXTINT5)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 4. " ATR_EXTINT4 ,Event setting on the corresponding pin (EXTINT4)" "Directly/Level,Latched/Edge" endif sif (cpu()!="LPC2917"||cpu()!="LPC2919") bitfld.long 0x0 3. " ATR_EXTINT3 ,Event setting on the corresponding pin (EXTINT3)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 2. " ATR_EXTINT2 ,Event setting on the corresponding pin (EXTINT2)" "Directly/Level,Latched/Edge" bitfld.long 0x0 1. " ATR_EXTINT1 ,Event setting on the corresponding pin (EXTINT1)" "Directly/Level,Latched/Edge" textline " " bitfld.long 0x0 0. " ATR_EXTINT0 ,Event setting on the corresponding pin (EXTINT0)" "Directly/Level,Latched/Edge" endif rgroup.long 0xD20++0x03 line.long 0x00 "RSR,Raw-status register" bitfld.long 0x0 24. " RSR_VIC ,Unmasked events including latched on the corresponding pin (VIC IRQ - interanl)" "Not occurred,Occurred" bitfld.long 0x0 23. " RSR_FIC ,Unmasked events including latched on the corresponding pin (FIC FIQ - internal)" "Not occurred,Occurred" textline " " bitfld.long 0x0 22. " RSR_CAN ,Unmasked events including latched on the corresponding pin (CAN interrupt - internal)" "Not occurred,Occurred" sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2926"||cpuis("LPC293*")) bitfld.long 0x0 21. " RSR_USB_I2C_SCL ,Unmasked events including latched on the corresponding pin (USB_I2C_SCL)" "Not occurred,Occurred" endif textline " " bitfld.long 0x0 20. " RSR_UART1_RXD ,Unmasked events including latched on the corresponding pin (UART1 RXD)" "Not occurred,Occurred" bitfld.long 0x0 19. " RSR_UART0_RXD ,Unmasked events including latched on the corresponding pin (UART0 RXD)" "Not occurred,Occurred" textline " " bitfld.long 0x0 18. " RSR_SPI2_SDI ,Unmasked events including latched on the corresponding pin (SPI2 SDI)" "Not occurred,Occurred" bitfld.long 0x0 17. " RSR_SPI1_SDI ,Unmasked events including latched on the corresponding pin (SPI1 SDI)" "Not occurred,Occurred" textline " " bitfld.long 0x0 16. " RSR_SPI0_SDI ,Unmasked events including latched on the corresponding pin (SPI0 SDI)" "Not occurred,Occurred" bitfld.long 0x0 15. " RSR_LIN1_RXDL ,Unmasked events including latched on the corresponding pin (LIN1 RXDL)" "Not occurred,Occurred" textline " " bitfld.long 0x0 14. " RSR_LIN0_RXDL ,Unmasked events including latched on the corresponding pin (LIN0 RXDL)" "Not occurred,Occurred" sif (cpuis("LPC292*")||cpuis("LPC293*")) bitfld.long 0x0 13. " RSR_USB_D+2 ,Unmasked events including latched on the corresponding pin (RSR USB D+2)" "Not occurred,Occurred" textline " " bitfld.long 0x0 12. " RSR_USB_D+1 ,Unmasked events including latched on the corresponding pin (USB0_DP)" "Not occurred,Occurred" endif bitfld.long 0x0 11. " RSR_I2C1_SCL ,Unmasked events including latched on the corresponding pin (I2C1_SCL)" "Not occurred,Occurred" textline " " bitfld.long 0x0 10. " RSR_I2C0_SCL ,Unmasked events including latched on the corresponding pin (I2C0_SCL)" "Not occurred,Occurred" bitfld.long 0x0 9. " RSR_CAN1_RXDC ,Unmasked events including latched on the corresponding pin (CAN1 RXDC)" "Not occurred,Occurred" textline " " bitfld.long 0x0 8. " RSR_CAN0_RXDC ,Unmasked events including latched on the corresponding pin (CAN0 RXDC)" "Not occurred,Occurred" sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925"||cpu()!="LPC2917"||cpu()!="LPC2919") bitfld.long 0x0 7. " RSR_EXTINT7 ,Unmasked events including latched on the corresponding pin (EXTINT7)" "Not occurred,Occurred" textline " " bitfld.long 0x0 6. " RSR_EXTINT6 ,Unmasked events including latched on the corresponding pin (EXTINT6)" "Not occurred,Occurred" bitfld.long 0x0 5. " RSR_EXTINT5 ,Unmasked events including latched on the corresponding pin (EXTINT5)" "Not occurred,Occurred" textline " " bitfld.long 0x0 4. " RSR_EXTINT4 ,Unmasked events including latched on the corresponding pin (EXTINT4)" "Not occurred,Occurred" endif sif (cpu()!="LPC2917"||cpu()!="LPC2919") bitfld.long 0x0 3. " RSR_EXTINT3 ,Unmasked events including latched on the corresponding pin (EXTINT3)" "Not occurred,Occurred" textline " " bitfld.long 0x0 2. " RSR_EXTINT2 ,Unmasked events including latched on the corresponding pin (EXTINT2)" "Not occurred,Occurred" bitfld.long 0x0 1. " RSR_EXTINT1 ,Unmasked events including latched on the corresponding pin (EXTINT1)" "Not occurred,Occurred" textline " " bitfld.long 0x0 0. " RSR_EXTINT0 ,Unmasked events including latched on the corresponding pin (EXTINT0)" "Not occurred,Occurred" endif width 0xB tree.end tree "VIC (Vectored Interrupt Controller)" base ad:0xFFFFF000 width 20. group.long 0x00++0x07 line.long 0x00 "INT_PRIORITYMASK_0,Target 0 priority-mask register" bitfld.long 0x00 0.--3. " PRIORITY_LIMITER ,Priority limiter" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "INT_PRIORITYMASK_1,Target 1 priority-mask register" bitfld.long 0x04 0.--3. " PRIORITY_LIMITER ,Priority limiter" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." group.long 0x100++0x07 line.long 0x00 "INT_VECTOR_0,Target 0 (FIQ) vector register" hexmask.long 0x00 11.--31. 0x800 " TABLE_ADDR ,Table start address" sif (cpu()=="LPC2917"||cpu()=="LPC2919"||cpu()=="LPC2901") bitfld.long 0x00 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,flash,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,Reserved,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,USB I2C,USB high priority,USB low-priority,USB DMA,USB host interrupt,USB ATX,USB OTG timer,QEI,Reserved,Reserved,CGU0,CGU1,?..." elif (cpu()=="LPC2921"||cpu()=="LPC2923"||cpu()=="LPC2925") bitfld.long 0x00 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,flash,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,Reserved,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,Reserved,USB high priority,USB low-priority,USB DMA,Reserved,Reserved,Reserved,QEI,Reserved,Reserved,CGU0,CGU1,?..." elif (cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2939") bitfld.long 0x00 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,flash,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,ADC int_req 0,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,USB I2C,USB high priority,USB low-priority,USB DMA,USB host interrupt,USB ATX,USB OTG timer,QEI,Reserved,Reserved,CGU0,CGU1,?..." elif (cpu()=="LPC2930") bitfld.long 0x00 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,Reserved,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,ADC int_req 0,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,USB I2C,USB high priority,USB low-priority,USB DMA,USB host interrupt,USB ATX,USB OTG timer,QEI,Reserved,Reserved,CGU0,CGU1,?..." endif line.long 0x04 "INT_VECTOR_1,Target 1 (IRQ) vector register" hexmask.long 0x04 11.--31. 0x800 " TABLE_ADDR ,Table start address" sif (cpu()=="LPC2917"||cpu()=="LPC2919"||cpu()=="LPC2901") bitfld.long 0x04 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,flash,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,Reserved,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,USB I2C,USB high priority,USB low-priority,USB DMA,USB host interrupt,USB ATX,USB OTG timer,QEI,Reserved,Reserved,CGU0,CGU1,?..." elif (cpu()=="LPC2921"||cpu()=="LPC2923"||cpu()=="LPC2925") bitfld.long 0x04 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,flash,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,Reserved,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,Reserved,USB high priority,USB low-priority,USB DMA,Reserved,Reserved,Reserved,QEI,Reserved,Reserved,CGU0,CGU1,?..." elif (cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpu()=="LPC2939") bitfld.long 0x04 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,flash,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,ADC int_req 0,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,USB I2C,USB high priority,USB low-priority,USB DMA,USB host interrupt,USB ATX,USB OTG timer,QEI,Reserved,Reserved,CGU0,CGU1,?..." elif (cpu()=="LPC2930") bitfld.long 0x04 3.--8. " INDEX ,Index (interrupt request line)" "No interrupt,Watchdog,timer 0,timer 1,timer 2,timer 3,UART 0,UART 1,SPI 0,SPI 1,SPI 2,Reserved,embedded RT-ICE Rx,embedded RT-ICE Tx,MSCSS timer 0,MSCSS timer 1,ADC int_req 0,ADC int_req 1,ADC int_req 2,PWM 0,PWM capt match 0,PWM 1,PWM capt match 1,PWM 2,PWM capt match 2,PWM 3,PWM capt match 3,Event Router,LIN master controller 0,LIN master controller 1,I2C0,I2C1,GPDMA,GPDMA err,GPDMA tc,all CAN controllers,all CAN ctrls&look-up table,CAN controller 0 Rx,CAN controller 1 Rx,Reserved,Reserved,Reserved,Reserved,CAN controller 0 Tx,CAN controller 1 Tx,USB I2C,USB high priority,USB low-priority,USB DMA,USB host interrupt,USB ATX,USB OTG timer,QEI,Reserved,Reserved,CGU0,CGU1,?..." endif rgroup.long 0x200++0x07 line.long 0x00 "INT_PENDING_1_31,Interrupt-pending status register" bitfld.long 0x0 31. " PEND_I2C1 ,Interrupt request 31(I2C1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 30. " PEND_I2C0 ,Interrupt request 30(I2C0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 29. " PEND_LIN1 ,Interrupt request 29(LIN master controller 1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 28. " PEND_LIN0 ,Interrupt request 28(LIN master controller 0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 27. " PEND_ER ,Interrupt request 27(Event Router) is pending" "No interrupt,Interrupt" bitfld.long 0x0 26. " PEND_PWM_M3 ,Interrupt request 26(PWM capt match 3) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 25. " PEND_PWM3 ,Interrupt request 25(PWM 3) is pending" "No interrupt,Interrupt" bitfld.long 0x0 24. " PEND_PWM_M2 ,Interrupt request 24(PWM capt match 2) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 23. " PEND_PWM2 ,Interrupt request 23(PWM 2) is pending" "No interrupt,Interrupt" bitfld.long 0x0 22. " PEND_PWM_M1 ,Interrupt request 22(PWM capt match 1) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 21. " PEND_PWM1 ,Interrupt request 21(PWM 1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 20. " PEND_PWM_M0 ,Interrupt request 20(PWM capt match 0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 19. " PEND_PWM0 ,Interrupt request 19(PWM 0) is pending" "No interrupt,Interrupt" bitfld.long 0x0 18. " PEND_ADC2 ,Interrupt request 18(ADC int_req 2) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 17. " PEND_ADC1 ,Interrupt request 17(ADC int_req 1) is pending" "No interrupt,Interrupt" sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")) bitfld.long 0x0 16. " PEND_ADC0 ,Interrupt request 16(ADC int_req 0) is pending" "No interrupt,Interrupt" endif textline " " bitfld.long 0x0 15. " PEND_MSCSS1 ,Interrupt request 15(MSCSS timer 1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 14. " PEND_MSCSS0 ,Interrupt request 14(MSCSS timer 0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 13. " PEND_ICE_TX ,Interrupt request 13(embedded RT-ICE Tx) is pending" "No interrupt,Interrupt" bitfld.long 0x0 12. " PEND_ICE_RX ,Interrupt request 12(embedded RT-ICE Rx) is pending" "No interrupt,Interrupt" textline " " sif (cpu()!="LPC2930") bitfld.long 0x0 11. " PEND_FLASH ,Interrupt request 11(flash) is pending" "No interrupt,Interrupt" endif bitfld.long 0x0 10. " PEND_SPI2 ,Interrupt request 10(SPI 2) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " PEND_SPI1 ,Interrupt request 9(SPI 1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 8. " PEND_SPI0 ,Interrupt request 8(SPI 0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 7. " PEND_UART1 ,Interrupt request 7(UART 1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 6. " PEND_UART0 ,Interrupt request 6(UART 0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " PEND_TIMER3 ,Interrupt request 5(timer 3) is pending" "No interrupt,Interrupt" bitfld.long 0x0 4. " PEND_TIMER2 ,Interrupt request 4(timer 2) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " PEND_TIMER1 ,Interrupt request 3(timer 1) is pending" "No interrupt,Interrupt" bitfld.long 0x0 2. " PEND_TIMER0 ,Interrupt request 2(timer 0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " PENDING_WDT ,Interrupt request 1(Watchdog) is pending" "No interrupt,Interrupt" line.long 0x04 "INT_PENDING_32_56,Interrupt-pending status register" bitfld.long 0x04 24. " PEND_CGU1 ,Interrupt request 56(CGU1) is pending" "No interrupt,Interrupt" bitfld.long 0x04 23. " PEND_CGU0 ,Interrupt request 55(CGU0) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " PEND_QEI ,Interrupt request 52(QEI) is pending" "No interrupt,Interrupt" sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925") bitfld.long 0x04 19. " PEND_USBOTG ,Interrupt request 51(USB OTG timer) is pending" "No interrupt,Interrupt" bitfld.long 0x04 18. " PEND_USBATX ,Interrupt request 50(USB ATX) is pending" "No interrupt,Interrupt" bitfld.long 0x04 17. " PEND_USBHOSTINT ,Interrupt request 49(USB HOSTINT) is pending" "No interrupt,Interrupt" endif textline " " bitfld.long 0x04 16. " PEND_USBDMA ,Interrupt request 48(USB device DMA) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " PEND_USBLOW ,Interrupt request 47(USB device low-priority) is pending" "No interrupt,Interrupt" bitfld.long 0x04 14. " PEND_USBHI ,Interrupt request 46(USB device high-priority) is pending" "No interrupt,Interrupt" textline " " sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925") bitfld.long 0x04 13. " PEND_USBI2C ,Interrupt request 45(USB I2C) is pending" "No interrupt,Interrupt" endif textline " " bitfld.long 0x04 12. " PEND_CAN1TX ,Interrupt request 44(CAN controller 1 Tx) is pending" "No interrupt,Interrupt" bitfld.long 0x04 11. " PEND_CAN0TX ,Interrupt request 43(CAN controller 0 Tx) is pending" "No interrupt,Interrupt" bitfld.long 0x04 6. " PEND_CAN1RX ,Interrupt request 38(CAN controller 1 Rx) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " PEND_CAN0RX ,Interrupt request 37(CAN controller 0 Rx) is pending" "No interrupt,Interrupt" bitfld.long 0x04 4. " PEND_CANSLUP ,Interrupt request 36(all CAN controllers and look-up table) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " PEND_CANS ,Interrupt request 35(all CAN controllers) is pending" "No interrupt,Interrupt" bitfld.long 0x04 2. " PEND_GPDMATC ,Interrupt request 34(GPDMA tc) is pending" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " PEND_GPDMAERR ,Interrupt request 33(GPDMA err) is pending" "No interrupt,Interrupt" bitfld.long 0x04 0. " PEND_GPDMA ,Interrupt request 32(GPDMA) is pending" "No interrupt,Interrupt" width 15. rgroup.long 0x300++0x03 line.long 0x00 "INT_FEATURES,Interrupt controller features register" bitfld.long 0x00 16.--21. " T ,Number of targets" "1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31.,32.,33.,34.,35.,36.,37.,38.,39.,40.,41.,42.,43.,44.,45.,46.,47.,48.,49.,50.,51.,52.,53.,54.,55.,56.,57.,58.,59.,60.,61.,62.,63.,64." hexmask.long.byte 0x00 8.--15. 1. " P ,Number of priorities (minus one)" textline " " hexmask.long.byte 0x00 0.--7. 1. " N ,Number of interrupt requests" group.long 0x404++0x97 line.long 0x0 "INT_REQUEST_1,Interrupt Request 1 (Watchdog) control register" bitfld.long 0x0 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x0 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x0 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x0 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x0 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x0 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x0 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x0 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x4 "INT_REQUEST_2,Interrupt Request 2 (timer 0) control register" bitfld.long 0x4 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x4 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x4 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x4 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x4 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x4 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x4 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x4 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x8 "INT_REQUEST_3,Interrupt Request 3 (timer 1) control register" bitfld.long 0x8 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x8 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x8 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x8 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x8 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x8 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x8 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x8 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0xC "INT_REQUEST_4,Interrupt Request 4 (timer 2) control register" bitfld.long 0xC 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0xC 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0xC 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0xC 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0xC 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0xC 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0xC 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0xC 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0xC 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0xC 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0xC 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "INT_REQUEST_5,Interrupt Request 5 (timer 3) control register" bitfld.long 0x10 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x10 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x10 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x10 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x10 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x10 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x10 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x10 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "INT_REQUEST_6,Interrupt Request 6 (UART 0) control register" bitfld.long 0x14 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x14 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x14 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x14 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x14 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x14 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x14 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x14 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x18 "INT_REQUEST_7,Interrupt Request 7 (UART 1) control register" bitfld.long 0x18 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x18 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x18 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x18 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x18 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x18 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x18 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x18 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x18 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x1C "INT_REQUEST_8,Interrupt Request 8 (SPI 0) control register" bitfld.long 0x1C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x1C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x1C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x1C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x1C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x1C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x1C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x1C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x1C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x1C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x20 "INT_REQUEST_9,Interrupt Request 9 (SPI 1) control register" bitfld.long 0x20 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x20 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x20 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x20 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x20 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x20 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x20 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x20 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x20 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x20 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x20 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x24 "INT_REQUEST_10,Interrupt Request 10 (SPI 2) control register" bitfld.long 0x24 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x24 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x24 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x24 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x24 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x24 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x24 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x24 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x24 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x24 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x24 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." sif (cpu()!="LPC2930") line.long 0x28 "INT_REQUEST_11,Interrupt Request 11 (Flash) control register" bitfld.long 0x28 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x28 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x28 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x28 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x28 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x28 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x28 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x28 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x28 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x28 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x28 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." endif line.long 0x2C "INT_REQUEST_12,Interrupt Request 12 (embedded RT-ICE Rx) control register" bitfld.long 0x2C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x2C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x2C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x2C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x2C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x2C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x2C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x2C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x2C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x2C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x2C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x30 "INT_REQUEST_13,Interrupt Request 13 (embedded RT-ICE Tx) control register" bitfld.long 0x30 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x30 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x30 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x30 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x30 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x30 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x30 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x30 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x30 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x30 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x30 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x34 "INT_REQUEST_14,Interrupt Request 14 (MSCSS timer 0) control register" bitfld.long 0x34 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x34 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x34 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x34 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x34 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x34 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x34 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x34 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x34 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x34 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x34 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x38 "INT_REQUEST_15,Interrupt Request 15 (MSCSS timer 1) control register" bitfld.long 0x38 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x38 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x38 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x38 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x38 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x38 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x38 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x38 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x38 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x38 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x38 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." sif (cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")) line.long 0x3C "INT_REQUEST_16,Interrupt Request 16 (ADC int_req 0) control register" bitfld.long 0x3C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x3C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x3C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x3C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x3C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x3C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x3C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x3C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x3C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x3C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x3C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." endif line.long 0x40 "INT_REQUEST_17,Interrupt Request 17 (ADC int_req 1) control register" bitfld.long 0x40 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x40 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x40 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x40 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x40 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x40 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x40 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x40 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x40 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x40 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x40 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x44 "INT_REQUEST_18,Interrupt Request 18 (ADC int_req 2) control register" bitfld.long 0x44 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x44 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x44 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x44 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x44 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x44 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x44 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x44 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x44 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x44 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x44 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x48 "INT_REQUEST_19,Interrupt Request 19 (PWM 0) control register" bitfld.long 0x48 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x48 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x48 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x48 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x48 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x48 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x48 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x48 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x48 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x48 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x48 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x4C "INT_REQUEST_20,Interrupt Request 20 (PWM capt match 0) control register" bitfld.long 0x4C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x4C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x4C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x4C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x4C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x4C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x4C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x4C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x50 "INT_REQUEST_21,Interrupt Request 21 (PWM 1) control register" bitfld.long 0x50 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x50 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x50 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x50 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x50 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x50 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x50 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x50 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x50 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x50 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x50 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x54 "INT_REQUEST_22,Interrupt Request 22 (PWM capt match 1) control register" bitfld.long 0x54 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x54 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x54 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x54 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x54 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x54 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x54 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x54 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x54 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x54 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x54 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x58 "INT_REQUEST_23,Interrupt Request 23 (PWM 2) control register" bitfld.long 0x58 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x58 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x58 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x58 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x58 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x58 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x58 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x58 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x58 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x58 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x58 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x5C "INT_REQUEST_24,Interrupt Request 24 (PWM capt match 2) control register" bitfld.long 0x5C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x5C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x5C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x5C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x5C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x5C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x5C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x5C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x5C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x5C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x5C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x60 "INT_REQUEST_25,Interrupt Request 25 (PWM 3) control register" bitfld.long 0x60 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x60 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x60 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x60 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x60 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x60 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x60 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x60 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x60 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x60 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x60 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x64 "INT_REQUEST_26,Interrupt Request 26 (PWM capt match 3) control register" bitfld.long 0x64 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x64 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x64 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x64 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x64 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x64 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x64 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x64 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x64 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x64 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x64 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x68 "INT_REQUEST_27,Interrupt Request 27 (Event Router) control register" bitfld.long 0x68 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x68 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x68 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x68 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x68 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x68 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x68 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x68 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x68 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x68 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x68 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x6C "INT_REQUEST_28,Interrupt Request 28 (LIN master controller 0) control register" bitfld.long 0x6C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x6C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x6C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x6C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x6C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x6C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x6C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x6C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x6C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x6C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x6C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x70 "INT_REQUEST_29,Interrupt Request 29 (LIN master controller 1) control register" bitfld.long 0x70 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x70 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x70 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x70 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x70 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x70 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x70 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x70 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x70 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x70 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x70 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x74 "INT_REQUEST_30,Interrupt Request 30 (I2C0) control register" bitfld.long 0x74 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x74 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x74 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x74 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x74 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x74 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x74 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x74 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x74 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x74 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x74 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x78 "INT_REQUEST_31,Interrupt Request 31 (I2C1) control register" bitfld.long 0x78 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x78 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x78 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x78 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x78 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x78 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x78 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x78 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x78 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x78 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x78 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x7C "INT_REQUEST_32,Interrupt Request 32 (GPDMA) control register" bitfld.long 0x7C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x7C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x7C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x7C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x7C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x7C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x7C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x7C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x7C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x7C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x7C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x80 "INT_REQUEST_33,Interrupt Request 33 (GPDMA err) control register" bitfld.long 0x80 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x80 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x80 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x80 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x80 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x80 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x80 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x80 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x80 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x80 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x80 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x84 "INT_REQUEST_34,Interrupt Request 34 (GPDMA tc) control register" bitfld.long 0x84 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x84 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x84 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x84 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x84 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x84 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x84 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x84 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x84 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x84 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x84 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x88 "INT_REQUEST_35,Interrupt Request 35 (all CAN controllers) control register" bitfld.long 0x88 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x88 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x88 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x88 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x88 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x88 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x88 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x88 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x88 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x88 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x88 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x8C "INT_REQUEST_36,Interrupt Request 36 (all CAN controllers and look-up table) control register" bitfld.long 0x8C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x8C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x8C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x8C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x8C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x8C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x8C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x8C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x90 "INT_REQUEST_37,Interrupt Request 37 (CAN controller 0 Rx) control register" bitfld.long 0x90 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x90 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x90 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x90 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x90 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x90 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x90 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x90 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x90 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x90 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x90 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x94 "INT_REQUEST_38,Interrupt Request 38 (CAN controller 1 Rx) control register" bitfld.long 0x94 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x94 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x94 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x94 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x94 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x94 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x94 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x94 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x94 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x94 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x94 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." group.long 0x4ac++0x27 line.long 0x0 "INT_REQUEST_43,Interrupt Request 43 (CAN controller 0 Tx) control register" bitfld.long 0x0 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x0 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x0 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x0 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x0 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x0 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x0 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x0 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x4 "INT_REQUEST_44,Interrupt Request 44 (CAN controller 1 Tx) control register" bitfld.long 0x4 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x4 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x4 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x4 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x4 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x4 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x4 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x4 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925") line.long 0x8 "INT_REQUEST_45,Interrupt Request 45 (USB I2C) control register" bitfld.long 0x8 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x8 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x8 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x8 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x8 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x8 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x8 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x8 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x8 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." endif line.long 0xC "INT_REQUEST_46,Interrupt Request 46 (USB device high-priority) control register" bitfld.long 0xC 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0xC 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0xC 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0xC 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0xC 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0xC 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0xC 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0xC 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0xC 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0xC 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0xC 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "INT_REQUEST_47,Interrupt Request 47 (USB device low-priority) control register" bitfld.long 0x10 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x10 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x10 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x10 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x10 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x10 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x10 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x10 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x10 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "INT_REQUEST_48,Interrupt Request 48 (USB device DMA) control register" bitfld.long 0x14 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x14 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x14 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x14 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x14 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x14 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x14 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x14 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925") line.long 0x18 "INT_REQUEST_49,Interrupt Request 49 (USB HostInterrupt) control register" bitfld.long 0x18 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x18 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x18 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x18 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x18 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x18 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x18 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x18 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x18 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x18 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." endif sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925") line.long 0x1C "INT_REQUEST_50,Interrupt Request 50 (USB ATX) control register" bitfld.long 0x1C 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x1C 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x1C 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x1C 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x1C 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x1C 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x1C 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x1C 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x1C 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x1C 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." endif sif (cpu()!="LPC2921"||cpu()!="LPC2923"||cpu()!="LPC2925") line.long 0x20 "INT_REQUEST_51,Interrupt Request 51 (USB OTG TIMER) control register" bitfld.long 0x20 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x20 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x20 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x20 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x20 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x20 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x20 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x20 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x20 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x20 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x20 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." endif line.long 0x24 "INT_REQUEST_52,Interrupt Request 52 (QEI) control register" bitfld.long 0x24 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x24 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x24 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x24 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x24 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x24 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x24 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x24 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x24 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x24 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x24 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." group.long 0x4dc++0x7 line.long 0x0 "INT_REQUEST_55,Interrupt Request 55 (CGU0) control register" bitfld.long 0x0 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x0 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x0 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x0 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x0 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x0 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x0 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x0 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." group.long 0x4dc++0x7 line.long 0x4 "INT_REQUEST_56,Interrupt Request 56 (CGU1) control register" bitfld.long 0x4 31. " PENDING ,Pending interrupt request" "No interrupt,Interrupt" bitfld.long 0x4 30. " SET_SWINT ,Set software-interrupt request (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 29. " CLR_SWINT ,Clear software-interrupt request (Read as 0)" "No effect,Clear" bitfld.long 0x4 28. " WE_PRIORITY_LEVEL ,Write-enable priority level (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " WE_TARGET ,Write-enable target (Read as 0)" "Disabled,Enabled" bitfld.long 0x4 26. " WE_ENABLE ,Write enable (Read as 0)" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " WE_ACTIVE_LOW ,Write-enable active LOW (Read as 0)" "Disabled,Enabled" bitfld.long 0x4 17. " ACTIVE_LOW ,Active-LOW interrupt line" "High,Low" textline " " bitfld.long 0x4 16. " ENABLE ,Enable interrupt request" "Disabled,Enabled" bitfld.long 0x4 8. " TARGET ,Interrupt target" "FIQ,IRQ" textline " " bitfld.long 0x4 0.--3. " PRIORITY_LEVEL ,Interrupt priority level" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." width 0xB tree.end sif (cpuis("LPC291*")||cpu()=="LPC2926"||cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")) tree.open "SMC (External Static Memory Controller)" base ad:0x60000000 width 13. tree "Bank 0" group.long (0x00+0x0)++0x1b line.long 0x00 "SMBIDCYR0,Idle-cycle control register for memory bank 0" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R0,Wait-state 1 control register for memory bank 0" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R0,Wait-state 2 control register for memory bank 0" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR0,Output-enable assertion delay control register for memory bank 0" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR0,Write-enable assertion delay control register for memory bank 0" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR0,Configuration register for memory bank 0" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR0,Status register for memory bank 0" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 1" group.long (0x00+0x1C)++0x1b line.long 0x00 "SMBIDCYR1,Idle-cycle control register for memory bank 1" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R1,Wait-state 1 control register for memory bank 1" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R1,Wait-state 2 control register for memory bank 1" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR1,Output-enable assertion delay control register for memory bank 1" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR1,Write-enable assertion delay control register for memory bank 1" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR1,Configuration register for memory bank 1" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR1,Status register for memory bank 1" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 2" group.long (0x00+0x38)++0x1b line.long 0x00 "SMBIDCYR2,Idle-cycle control register for memory bank 2" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R2,Wait-state 1 control register for memory bank 2" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R2,Wait-state 2 control register for memory bank 2" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR2,Output-enable assertion delay control register for memory bank 2" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR2,Write-enable assertion delay control register for memory bank 2" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR2,Configuration register for memory bank 2" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR2,Status register for memory bank 2" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 3" group.long (0x00+0x54)++0x1b line.long 0x00 "SMBIDCYR3,Idle-cycle control register for memory bank 3" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R3,Wait-state 1 control register for memory bank 3" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R3,Wait-state 2 control register for memory bank 3" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR3,Output-enable assertion delay control register for memory bank 3" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR3,Write-enable assertion delay control register for memory bank 3" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR3,Configuration register for memory bank 3" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR3,Status register for memory bank 3" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 4" group.long (0x00+0x70)++0x1b line.long 0x00 "SMBIDCYR4,Idle-cycle control register for memory bank 4" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R4,Wait-state 1 control register for memory bank 4" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R4,Wait-state 2 control register for memory bank 4" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR4,Output-enable assertion delay control register for memory bank 4" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR4,Write-enable assertion delay control register for memory bank 4" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR4,Configuration register for memory bank 4" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR4,Status register for memory bank 4" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 5" group.long (0x00+0x8C)++0x1b line.long 0x00 "SMBIDCYR5,Idle-cycle control register for memory bank 5" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R5,Wait-state 1 control register for memory bank 5" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R5,Wait-state 2 control register for memory bank 5" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR5,Output-enable assertion delay control register for memory bank 5" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR5,Write-enable assertion delay control register for memory bank 5" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR5,Configuration register for memory bank 5" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR5,Status register for memory bank 5" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 6" group.long (0x00+0xA8)++0x1b line.long 0x00 "SMBIDCYR6,Idle-cycle control register for memory bank 6" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R6,Wait-state 1 control register for memory bank 6" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R6,Wait-state 2 control register for memory bank 6" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR6,Output-enable assertion delay control register for memory bank 6" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR6,Write-enable assertion delay control register for memory bank 6" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR6,Configuration register for memory bank 6" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR6,Status register for memory bank 6" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end tree "Bank 7" group.long (0x00+0xC4)++0x1b line.long 0x00 "SMBIDCYR7,Idle-cycle control register for memory bank 7" bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x04 "SMBWST1R7,Wait-state 1 control register for memory bank 7" bitfld.long 0x04 0.--4. " WST1 ,Wait-state 1(the length of read accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x08 "SMBWST2R7,Wait-state 2 control register for memory bank 7" bitfld.long 0x08 0.--4. " WST2 ,Wait-state 2(the length of write accesses)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31." line.long 0x0C "SMBWSTOENR7,Output-enable assertion delay control register for memory bank 7" bitfld.long 0x0C 0.--3. " WSTOEN ,Output-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x10 "SMBWSTWENR7,Write-enable assertion delay control register for memory bank 7" bitfld.long 0x10 0.--3. " WSTWEN ,Write-enable assertion delay" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." line.long 0x14 "SMBCR7,Configuration register for memory bank 7" bitfld.long 0x14 6.--7. " MW ,Memory-width configuration" "8-bit,16-bit,32-bit,?..." bitfld.long 0x14 5. " BM ,Burst mode" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " WP ,Write-protect" "Disabled,Enabled" bitfld.long 0x14 3. " CSPOL ,Chip-select polarity" "Active HIGH,Active LOW" textline " " bitfld.long 0x14 0. " RBLE ,Read-byte lane enable" "Disabled,Enabled" line.long 0x18 "SMBSR7,Status register for memory bank 7" eventfld.long 0x18 1. " WRITEPROTERR ,Write-protect error" "No error,Error" tree.end width 0xB tree.end endif sif (cpuis("LPC292*"))||(cpuis("LPC293*")) tree.open "USB (Universal Serial Bus)" base ad:0xE0100000 width 12. tree "Clock control registers" group.long 0xFF4++0x3 line.long 0x0 "USBClkCtrl,USB Clock Control register" bitfld.long 0x0 4. " AHB_CLK_EN ,AHB clock enable" "Disabled,Enabled" bitfld.long 0x0 3. " PORTSEL_CLK_EN ,Port select register clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled" rgroup.long 0xFF8++0x3 line.long 0x0 "USBClkSt,USB Clock Status register" bitfld.long 0x0 4. " AHB_CLK_ON ,AHB clock on" "Not active,Active" bitfld.long 0x0 3. " PORTSEL_CLK_ON ,Port select register clock" "Not active,Active" textline " " bitfld.long 0x0 1. " DEV_CLK_ON ,Device clock on" "Not active,Active" tree.end width 14. tree "Interrupt Registers" sif !(cpuis("LPC292*"))&&!(cpuis("LPC293*")) group.long 0x1C0++0x3 line.long 0x00 "USBIntSt,USB Interrupt Status Register" bitfld.long 0x00 31. " EN_USB_INTS ,Enable USB Interrupts" "Disabled,Enabled" bitfld.long 0x00 8. " USB_NEED_CLK ,USB Need Clock Indicator" "Not needed,Needed" textline " " bitfld.long 0x00 2. " USB_INT_REQ_DMA ,DMA Interrupt Line Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " USB_INT_REQ_HP ,High Priority Interrupt Line Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " USB_INT_REQ_LP ,Low Priority Interrupt Line Status" "No interrupt,Interrupt" endif group.long 0x200++0x7 line.long 0x0 "USBDevIntSt,USB Device Interrupt Status Register" setclrfld.long 0x0 9. 0xC 9. 0x8 9. " ERR_INT_set/clr ,Error interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0xC 8. 0x8 8. " EP_RLZED_set/clr ,Endpoints realized interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0xC 7. 0x8 7. " TxENDPKT_set/clr ,TxPacket length interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0xC 6. 0x8 6. " RxENDPKT_set/clr ,RxPacket length interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0xC 5. 0x8 5. " CDFULL_set/clr ,Command data register is full interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0xC 4. 0x8 4. " CCEMPTY_set/clr ,The command code register is empty interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0xC 3. 0x8 3. " DEV_STAT_set/clr ,Device state interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0xC 2. 0x8 2. " EP_SLOW_set/clr ,Slow interrupt transfer for the endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0xC 1. 0x8 1. " EP_FAST_set/clr ,Fast interrupt transfer for the endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0xC 0. 0x8 0. " FRAME_set/clr ,Frame interrupt" "No interrupt,Interrupt" line.long 0x4 "USBDevIntEn,USB Device Interrupt Enable Register" bitfld.long 0x4 9. " ERR_INT ,Error interrupt" "Disabled,Enabled" bitfld.long 0x4 8. " EP_RLZED ,Endpoints realized interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " TxENDPKT ,TxPacket length interrupt" "Disabled,Enabled" bitfld.long 0x4 6. " RxENDPKT ,RxPacket length interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 5. " CDFULL ,Command data register is full interrupt" "Disabled,Enabled" bitfld.long 0x4 4. " CCEMPTY ,The command code register is empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 3. " DEV_STAT ,Device state interrupt" "Disabled,Enabled" bitfld.long 0x4 2. " EP_SLOW ,Slow interrupt transfer for the endpoint" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " EP_FAST ,Fast interrupt transfer for the endpoint" "Disabled,Enabled" bitfld.long 0x4 0. " FRAME ,Frame interrupt" "Disabled,Enabled" wgroup.long 0x22C++0x3 line.long 0x0 "USBDevIntPri,USB Device Interrupt Priority Register" bitfld.long 0x0 1. " EP_FAST ,Endpoint fast interrupt transfer priority" "Low,High" bitfld.long 0x0 0. " FRAME ,Frame interruptpriority" "Low,High" group.long 0x230++0x7 line.long 0x0 "USBEpIntSt,USB Endpoint Interrupt Status Register" setclrfld.long 0x0 31. 0xC 31. 0x8 31. " EP15TX_set/clr ,Endpoint 15. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 30. 0xC 30. 0x8 30. " EP15RX_set/clr ,Endpoint 15. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 29. 0xC 29. 0x8 29. " EP14TX_set/clr ,Endpoint 14. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 28. 0xC 28. 0x8 28. " EP14RX_set/clr ,Endpoint 14. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 27. 0xC 27. 0x8 27. " EP13TX_set/clr ,Endpoint 13. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 26. 0xC 26. 0x8 26. " EP13RX_set/clr ,Endpoint 13. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 25. 0xC 25. 0x8 25. " EP12TX_set/clr ,Endpoint 12. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 24. 0xC 24. 0x8 24. " EP12RX_set/clr ,Endpoint 12. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 23. 0xC 23. 0x8 23. " EP11TX_set/clr ,Endpoint 11. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 22. 0xC 22. 0x8 22. " EP11RX_set/clr ,Endpoint 11, Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 21. 0xC 21. 0x8 21. " EP10TX_set/clr ,Endpoint 10. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 20. 0xC 20. 0x8 20. " EP10RX_set/clr ,Endpoint 10. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 19. 0xC 19. 0x8 19. " EP9TX_set/clr ,Endpoint 9. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 18. 0xC 18. 0x8 18. " EP9RX_set/clr ,Endpoint 9. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 17. 0xC 17. 0x8 17. " EP8TX_set/clr ,Endpoint 8. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 16. 0xC 16. 0x8 16. " EP8RX_set/clr ,Endpoint 8. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 15. 0xC 15. 0x8 15. " EP7TX_set/clr ,Endpoint 7. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 14. 0xC 14. 0x8 14. " EP7RX_set/clr ,Endpoint 7. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 13. 0xC 13. 0x8 13. " EP6TX_set/clr ,Endpoint 6. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0xC 12. 0x8 12. " EP6RX_set/clr ,Endpoint 6. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0xC 11. 0x8 11. " EP5TX_set/clr ,Endpoint 5. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0xC 10. 0x8 10. " EP5RX_set/clr ,Endpoint 5. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0xC 9. 0x8 9. " EP4TX_set/clr ,Endpoint 4. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0xC 8. 0x8 8. " EP4RX_set/clr ,Endpoint 4. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0xC 7. 0x8 7. " EP3TX_set/clr ,Endpoint 3. Isochronous endpoint" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0xC 6. 0x8 6. " EP3RX_set/clr ,Endpoint 3. Isochronous endpoint" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0xC 5. 0x8 5. " EP2TX_set/clr ,Endpoint 2. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0xC 4. 0x8 4. " EP2RX_set/clr ,Endpoint 2. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0xC 3. 0x8 3. " EP1TX_set/clr ,Endpoint 1. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0xC 2. 0x8 2. " EP1RX_set/clr ,Endpoint 1. Data Received Interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0xC 1. 0x8 1. " EP0TX_set/clr ,Endpoint 0. Data Transmitted Interrupt or sent a NAK" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0xC 0. 0x8 0. " EP0RX_set/clr ,Endpoint 0. Data Received Interrupt" "No interrupt,Interrupt" line.long 0x4 "USBEpIntEn,USB Endpoint Interrupt Enable Register" bitfld.long 0x4 31. " EP15TX ,Endpoint 15. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 30. " EP15RX ,Endpoint 15. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 29. " EP14TX ,Endpoint 14. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 28. " EP14RX ,Endpoint 14. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 27. " EP13TX ,Endpoint 13. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 26. " EP13RX ,Endpoint 13. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " EP12TX ,Endpoint 12. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 24. " EP12RX ,Endpoint 12. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 23. " EP11TX ,Endpoint 11. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 22. " EP11RX ,Endpoint 11, Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 21. " EP10TX ,Endpoint 10. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 20. " EP10RX ,Endpoint 10. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " EP9TX ,Endpoint 9. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 18. " EP9RX ,Endpoint 9. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 17. " EP8TX ,Endpoint 8. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " EP8RX ,Endpoint 8. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 15. " EP7TX ,Endpoint 7. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 14. " EP7RX ,Endpoint 7. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 13. " EP6TX ,Endpoint 6. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 12. " EP6RX ,Endpoint 6. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 11. " EP5TX ,Endpoint 5. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 10. " EP5RX ,Endpoint 5. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 9. " EP4TX ,Endpoint 4. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 8. " EP4RX ,Endpoint 4. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " EP3TX ,Endpoint 3. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 6. " EP3RX ,Endpoint 3. Isochronous endpoint" "Disabled,Enabled" bitfld.long 0x4 5. " EP2TX ,Endpoint 2. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " EP2RX ,Endpoint 2. Data Received Interrupt" "Disabled,Enabled" bitfld.long 0x4 3. " EP1TX ,Endpoint 1. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 2. " EP1RX ,Endpoint 1. Data Received Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " EP0TX ,Endpoint 0. Data Transmitted Interrupt or sent a NAK" "Disabled,Enabled" bitfld.long 0x4 0. " EP0RX ,Endpoint 0. Data Received Interrupt" "Disabled,Enabled" wgroup.long 0x240++0x3 line.long 0x0 "USBEpIntPri,USB Endpoint Interrupt Priority Register" bitfld.long 0x0 31. " EP15TX ,Endpoint 15. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 30. " EP15RX ,Endpoint 15. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 29. " EP14TX ,Endpoint 14. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 28. " EP14RX ,Endpoint 14. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 27. " EP13TX ,Endpoint 13. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 26. " EP13RX ,Endpoint 13. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 25. " EP12TX ,Endpoint 12. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 24. " EP12RX ,Endpoint 12. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 23. " EP11TX ,Endpoint 11. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 22. " EP11RX ,Endpoint 11, Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 21. " EP10TX ,Endpoint 10. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 20. " EP10RX ,Endpoint 10. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 19. " EP9TX ,Endpoint 9. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 18. " EP9RX ,Endpoint 9. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 17. " EP8TX ,Endpoint 8. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 16. " EP8RX ,Endpoint 8. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 15. " EP7TX ,Endpoint 7. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 14. " EP7RX ,Endpoint 7. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 13. " EP6TX ,Endpoint 6. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 12. " EP6RX ,Endpoint 6. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 11. " EP5TX ,Endpoint 5. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 10. " EP5RX ,Endpoint 5. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 9. " EP4TX ,Endpoint 4. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 8. " EP4RX ,Endpoint 4. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 7. " EP3TX ,Endpoint 3. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 6. " EP3RX ,Endpoint 3. Isochronous endpoint" "Slow,Fast" bitfld.long 0x0 5. " EP2TX ,Endpoint 2. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" textline " " bitfld.long 0x0 4. " EP2RX ,Endpoint 2. Data Received Interrupt" "Slow,Fast" bitfld.long 0x0 3. " EP1TX ,Endpoint 1. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 2. " EP1RX ,Endpoint 1. Data Received Interrupt" "Slow,Fast" textline " " bitfld.long 0x0 1. " EP0TX ,Endpoint 0. Data Transmitted Interrupt or sent a NAK" "Slow,Fast" bitfld.long 0x0 0. " EP0RX ,Endpoint 0. Data Received Interrupt" "Slow,Fast" tree.end width 13. tree "Realization/Transfer/Command Registers" group.long 0x244++0x3 line.long 0x0 "USBReEp,USB Realize Endpoint Register" bitfld.long 0x0 31. " EP31 ,Endpoint 31 realized" "Unrealized,Realized" bitfld.long 0x0 30. " EP30 ,Endpoint 30 realized" "Unrealized,Realized" bitfld.long 0x0 29. " EP29 ,Endpoint 29 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 28. " EP28 ,Endpoint 28 realized" "Unrealized,Realized" bitfld.long 0x0 27. " EP27 ,Endpoint 27 realized" "Unrealized,Realized" bitfld.long 0x0 26. " EP26 ,Endpoint 26 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 25. " EP25 ,Endpoint 25 realized" "Unrealized,Realized" bitfld.long 0x0 24. " EP24 ,Endpoint 24 realized" "Unrealized,Realized" bitfld.long 0x0 23. " EP23 ,Endpoint 23 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 22. " EP22 ,Endpoint 22 realized" "Unrealized,Realized" bitfld.long 0x0 21. " EP21 ,Endpoint 21 realized" "Unrealized,Realized" bitfld.long 0x0 20. " EP20 ,Endpoint 20 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 19. " EP19 ,Endpoint 19 realized" "Unrealized,Realized" bitfld.long 0x0 18. " EP18 ,Endpoint 18 realized" "Unrealized,Realized" bitfld.long 0x0 17. " EP17 ,Endpoint 17 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 16. " EP16 ,Endpoint 16 realized" "Unrealized,Realized" bitfld.long 0x0 15. " EP15 ,Endpoint 15 realized" "Unrealized,Realized" bitfld.long 0x0 14. " EP14 ,Endpoint 14 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 13. " EP13 ,Endpoint 13 realized" "Unrealized,Realized" bitfld.long 0x0 12. " EP12 ,Endpoint 12 realized" "Unrealized,Realized" bitfld.long 0x0 11. " EP11 ,Endpoint 11 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 10. " EP10 ,Endpoint 10 realized" "Unrealized,Realized" bitfld.long 0x0 9. " EP9 ,Endpoint 9 realized" "Unrealized,Realized" bitfld.long 0x0 8. " EP8 ,Endpoint 8 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 7. " EP7 ,Endpoint 7 realized" "Unrealized,Realized" bitfld.long 0x0 6. " EP6 ,Endpoint 6 realized" "Unrealized,Realized" bitfld.long 0x0 5. " EP5 ,Endpoint 5 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 4. " EP4 ,Endpoint 4 realized" "Unrealized,Realized" bitfld.long 0x0 3. " EP3 ,Endpoint 3 realized" "Unrealized,Realized" bitfld.long 0x0 2. " EP2 ,Endpoint 2 realized" "Unrealized,Realized" textline " " bitfld.long 0x0 1. " EP1 ,Endpoint 1 realized" "Unrealized,Realized" bitfld.long 0x0 0. " EP0 ,Endpoint 0 realized" "Unrealized,Realized" wgroup.long 0x248++0x3 line.long 0x0 "USBEpInd,USB Endpoint Index Register" bitfld.long 0x0 0.--4. " PhyEndp ,Physical endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x24C++0x3 line.long 0x0 "USBMaxPSize,USB MaxPacketSize Register" hexmask.long.word 0x0 0.--9. 1. " MaxPacketSize ,Maximum packet size value" hgroup.long 0x218++0x3 hide.long 0x0 "USBRxData,USB Receive Data Register" in rgroup.long 0x220++0x3 line.long 0x0 "USBRxPLen,USB Receive Packet Length Register" bitfld.long 0x0 11. " PKT_RDY ,Packet length field ready" "Not ready,Ready" bitfld.long 0x0 10. " DV ,Data valid" "Invalid,Valid" textline " " hexmask.long.word 0x0 0.--9. 1. " PKT_LNGTH ,Remaining amount of data in bytes still to be read from the RAM" wgroup.long 0x21C++0x3 line.long 0x0 "USBTxData,USB Transmit Data Register" wgroup.long 0x224++0x3 line.long 0x0 "USBTxPLen,USB Transmit Packet Length Register" hexmask.long.word 0x0 0.--9. 1. " PKT_LNGTH ,Remaining amount of data in bytes to be written to the EP_RAM" group.long 0x228++0x3 line.long 0x0 "USBCtrl,USB Control Register" bitfld.long 0x0 2.--5. " LOG_ENDPOINT ,Logical Endpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 1. " WR_EN ,Write mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RD_EN ,Read mode enable" "Disabled,Enabled" wgroup.long 0x210++0x3 line.long 0x0 "USBCmdCode,USB Command Code Register" hexmask.long.byte 0x0 16.--23. 1. " CMD_CODE ,Code for the command" hexmask.long.byte 0x0 8.--15. 1. " CMD_PHASE ,Command phase" rgroup.long 0x214++0x3 line.long 0x0 "USBCmdData,USB Command Data Register" hexmask.long.byte 0x0 0.--7. 1. " CMD_DATA ,Command Data" tree.end tree "DMA Registers" width 13. group.long 0x250++0x3 line.long 0x0 "USBDMARSt,USB DMA Request Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,Endpoint 31 DMA request" "Not requested,Requested" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,Endpoint 30 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,Endpoint 29 DMA request" "Not requested,Requested" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,Endpoint 28 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,Endpoint 27 DMA request" "Not requested,Requested" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,Endpoint 26 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,Endpoint 25 DMA request" "Not requested,Requested" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,Endpoint 24 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,Endpoint 23 DMA request" "Not requested,Requested" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,Endpoint 22 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,Endpoint 21 DMA request" "Not requested,Requested" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,Endpoint 20 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,Endpoint 19 DMA request" "Not requested,Requested" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,Endpoint 18 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,Endpoint 17 DMA request" "Not requested,Requested" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,Endpoint 16 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,Endpoint 15 DMA request" "Not requested,Requested" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,Endpoint 14 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,Endpoint 13 DMA request" "Not requested,Requested" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,Endpoint 12 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,Endpoint 11 DMA request" "Not requested,Requested" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,Endpoint 10 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,Endpoint 9 DMA request" "Not requested,Requested" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,Endpoint 8 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,Endpoint 7 DMA request" "Not requested,Requested" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,Endpoint 6 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,Endpoint 5 DMA request" "Not requested,Requested" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,Endpoint 4 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,Endpoint 3 DMA request" "Not requested,Requested" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,Endpoint 2 DMA request" "Not requested,Requested" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,Control endpoint IN" "Not requested,Requested" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,Control endpoint OUT" "Not requested,Requested" group.long 0x280++0x7 line.long 0x0 "USBUDCAH,USB UDCA Head Register" hexmask.long 0x0 7.--31. 0x80 " UDCA_ADDR ,Start address of the UDCA Header" line.long 0x4 "USBEpDMASt,USB EP DMA Status Register" setclrfld.long 0x4 31. 0x8 31. 0xC 31. " EP31_set/clr ,DMA for Endpoint 31 enable" "Disabled,Enabled" setclrfld.long 0x4 30. 0x8 30. 0xC 30. " EP30_set/clr ,DMA for Endpoint 30 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 29. 0x8 29. 0xC 29. " EP29_set/clr ,DMA for Endpoint 29 enable" "Disabled,Enabled" setclrfld.long 0x4 28. 0x8 28. 0xC 28. " EP28_set/clr ,DMA for Endpoint 28 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 27. 0x8 27. 0xC 27. " EP27_set/clr ,DMA for Endpoint 27 enable" "Disabled,Enabled" setclrfld.long 0x4 26. 0x8 26. 0xC 26. " EP26_set/clr ,DMA for Endpoint 26 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 25. 0x8 25. 0xC 25. " EP25_set/clr ,DMA for Endpoint 25 enable" "Disabled,Enabled" setclrfld.long 0x4 24. 0x8 24. 0xC 24. " EP24_set/clr ,DMA for Endpoint 24 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 23. 0x8 23. 0xC 23. " EP23_set/clr ,DMA for Endpoint 23 enable" "Disabled,Enabled" setclrfld.long 0x4 22. 0x8 22. 0xC 22. " EP22_set/clr ,DMA for Endpoint 22 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 21. 0x8 21. 0xC 21. " EP21_set/clr ,DMA for Endpoint 21 enable" "Disabled,Enabled" setclrfld.long 0x4 20. 0x8 20. 0xC 20. " EP20_set/clr ,DMA for Endpoint 20 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 19. 0x8 19. 0xC 19. " EP19_set/clr ,DMA for Endpoint 19 enable" "Disabled,Enabled" setclrfld.long 0x4 18. 0x8 18. 0xC 18. " EP18_set/clr ,DMA for Endpoint 18 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 17. 0x8 17. 0xC 17. " EP17_set/clr ,DMA for Endpoint 17 enable" "Disabled,Enabled" setclrfld.long 0x4 16. 0x8 16. 0xC 16. " EP16_set/clr ,DMA for Endpoint 16 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 15. 0x8 15. 0xC 15. " EP15_set/clr ,DMA for Endpoint 15 enable" "Disabled,Enabled" setclrfld.long 0x4 14. 0x8 14. 0xC 14. " EP14_set/clr ,DMA for Endpoint 14 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 13. 0x8 13. 0xC 13. " EP13_set/clr ,DMA for Endpoint 13 enable" "Disabled,Enabled" setclrfld.long 0x4 12. 0x8 12. 0xC 12. " EP12_set/clr ,DMA for Endpoint 12 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 11. 0x8 11. 0xC 11. " EP11_set/clr ,DMA for Endpoint 11 enable" "Disabled,Enabled" setclrfld.long 0x4 10. 0x8 10. 0xC 10. " EP10_set/clr ,DMA for Endpoint 10 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 9. 0x8 9. 0xC 9. " EP9_set/clr ,DMA for Endpoint 9 enable" "Disabled,Enabled" setclrfld.long 0x4 8. 0x8 8. 0xC 8. " EP8_set/clr ,DMA for Endpoint 8 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 7. 0x8 7. 0xC 7. " EP7_set/clr ,DMA for Endpoint 7 enable" "Disabled,Enabled" setclrfld.long 0x4 6. 0x8 6. 0xC 6. " EP6_set/clr ,DMA for Endpoint 6 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 5. 0x8 5. 0xC 5. " EP5_set/clr ,DMA for Endpoint 5 enable" "Disabled,Enabled" setclrfld.long 0x4 4. 0x8 4. 0xC 4. " EP4_set/clr ,DMA for Endpoint 4 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 3. 0x8 3. 0xC 3. " EP3_set/clr ,DMA for Endpoint 3 enable" "Disabled,Enabled" setclrfld.long 0x4 2. 0x8 2. 0xC 2. " EP2_set/clr ,DMA for Endpoint 2 enable" "Disabled,Enabled" textline " " setclrfld.long 0x4 1. 0x8 1. 0xC 1. " EP1_set/clr ,Control endpoint IN" "0,1" setclrfld.long 0x4 0. 0x8 0. 0xC 0. " EP0_set/clr ,Control endpoint OUT" "0,1" rgroup.long 0x290++0x3 line.long 0x0 "USBDMAIntSt,USB DMA Interrupt Status Register" bitfld.long 0x0 2. " ERR ,System error interrupt" "No interrupt,Interrupt" bitfld.long 0x0 1. " NDDR ,New DD Request Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " EOT ,End of Transfer Interrupt" "No interrupt,Interrupt" group.long 0x294++0x3 line.long 0x0 "USBDMAIntEn,USB DMA Interrupt Enable Register" bitfld.long 0x0 2. " ERR ,System error interrupt" "Disabled,Enabled" bitfld.long 0x0 1. " NDDR ,New DD Request Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " EOT ,End of Transfer Interrupt" "Disabled,Enabled" group.long 0x2A0++0x3 line.long 0x0 "USBEoTIntSt,USB End Of Transfer Interrupt Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,End of Transfer Interrupt request for Endpoint 31" "No interrupt,Interrupt" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,End of Transfer Interrupt request for Endpoint 30" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,End of Transfer Interrupt request for Endpoint 29" "No interrupt,Interrupt" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,End of Transfer Interrupt request for Endpoint 28" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,End of Transfer Interrupt request for Endpoint 27" "No interrupt,Interrupt" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,End of Transfer Interrupt request for Endpoint 26" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,End of Transfer Interrupt request for Endpoint 25" "No interrupt,Interrupt" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,End of Transfer Interrupt request for Endpoint 24" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,End of Transfer Interrupt request for Endpoint 23" "No interrupt,Interrupt" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,End of Transfer Interrupt request for Endpoint 22" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,End of Transfer Interrupt request for Endpoint 21" "No interrupt,Interrupt" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,End of Transfer Interrupt request for Endpoint 20" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,End of Transfer Interrupt request for Endpoint 19" "No interrupt,Interrupt" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,End of Transfer Interrupt request for Endpoint 18" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,End of Transfer Interrupt request for Endpoint 17" "No interrupt,Interrupt" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,End of Transfer Interrupt request for Endpoint 16" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,End of Transfer Interrupt request for Endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,End of Transfer Interrupt request for Endpoint 14" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,End of Transfer Interrupt request for Endpoint 13" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,End of Transfer Interrupt request for Endpoint 12" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,End of Transfer Interrupt request for Endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,End of Transfer Interrupt request for Endpoint 10" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,End of Transfer Interrupt request for Endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,End of Transfer Interrupt request for Endpoint 8" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,End of Transfer Interrupt request for Endpoint 7" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,End of Transfer Interrupt request for Endpoint 6" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,End of Transfer Interrupt request for Endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,End of Transfer Interrupt request for Endpoint 4" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,End of Transfer Interrupt request for Endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,End of Transfer Interrupt request for Endpoint 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,End of Transfer Interrupt request for Endpoint 1" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,End of Transfer Interrupt request for Endpoint 0" "No interrupt,Interrupt" width 16. group.long 0x2AC++0x3 line.long 0x0 "USBNDDRIntSt,USB New DD Request Interrupt Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,New DD Request for Endpoint 31" "Not requested,Requested" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,New DD Request for Endpoint 30" "Not requested,Requested" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,New DD Request for Endpoint 29" "Not requested,Requested" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,New DD Request for Endpoint 28" "Not requested,Requested" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,New DD Request for Endpoint 27" "Not requested,Requested" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,New DD Request for Endpoint 26" "Not requested,Requested" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,New DD Request for Endpoint 25" "Not requested,Requested" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,New DD Request for Endpoint 24" "Not requested,Requested" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,New DD Request for Endpoint 23" "Not requested,Requested" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,New DD Request for Endpoint 22" "Not requested,Requested" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,New DD Request for Endpoint 21" "Not requested,Requested" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,New DD Request for Endpoint 20" "Not requested,Requested" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,New DD Request for Endpoint 19" "Not requested,Requested" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,New DD Request for Endpoint 18" "Not requested,Requested" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,New DD Request for Endpoint 17" "Not requested,Requested" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,New DD Request for Endpoint 16" "Not requested,Requested" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,New DD Request for Endpoint 15" "Not requested,Requested" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,New DD Request for Endpoint 14" "Not requested,Requested" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,New DD Request for Endpoint 13" "Not requested,Requested" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,New DD Request for Endpoint 12" "Not requested,Requested" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,New DD Request for Endpoint 11" "Not requested,Requested" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,New DD Request for Endpoint 10" "Not requested,Requested" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,New DD Request for Endpoint 9" "Not requested,Requested" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,New DD Request for Endpoint 8" "Not requested,Requested" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,New DD Request for Endpoint 7" "Not requested,Requested" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,New DD Request for Endpoint 6" "Not requested,Requested" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,New DD Request for Endpoint 5" "Not requested,Requested" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,New DD Request for Endpoint 4" "Not requested,Requested" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,New DD Request for Endpoint 3" "Not requested,Requested" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,New DD Request for Endpoint 2" "Not requested,Requested" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,New DD Request for Endpoint 1" "Not requested,Requested" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,New DD Request for Endpoint 0" "Not requested,Requested" group.long 0x2B8++0x3 line.long 0x0 "USBSysErrIntSt,USB System Error Interrupt Status Register" setclrfld.long 0x0 31. 0x8 31. 0x4 31. " EP31_set/clr ,System Error Interrupt request for Endpoint 31" "No interrupt,Interrupt" setclrfld.long 0x0 30. 0x8 30. 0x4 30. " EP30_set/clr ,System Error Interrupt request for Endpoint 30" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 29. 0x8 29. 0x4 29. " EP29_set/clr ,System Error Interrupt request for Endpoint 29" "No interrupt,Interrupt" setclrfld.long 0x0 28. 0x8 28. 0x4 28. " EP28_set/clr ,System Error Interrupt request for Endpoint 28" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 27. 0x8 27. 0x4 27. " EP27_set/clr ,System Error Interrupt request for Endpoint 27" "No interrupt,Interrupt" setclrfld.long 0x0 26. 0x8 26. 0x4 26. " EP26_set/clr ,System Error Interrupt request for Endpoint 26" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 25. 0x8 25. 0x4 25. " EP25_set/clr ,System Error Interrupt request for Endpoint 25" "No interrupt,Interrupt" setclrfld.long 0x0 24. 0x8 24. 0x4 24. " EP24_set/clr ,System Error Interrupt request for Endpoint 24" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 23. 0x8 23. 0x4 23. " EP23_set/clr ,System Error Interrupt request for Endpoint 23" "No interrupt,Interrupt" setclrfld.long 0x0 22. 0x8 22. 0x4 22. " EP22_set/clr ,System Error Interrupt request for Endpoint 22" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 21. 0x8 21. 0x4 21. " EP21_set/clr ,System Error Interrupt request for Endpoint 21" "No interrupt,Interrupt" setclrfld.long 0x0 20. 0x8 20. 0x4 20. " EP20_set/clr ,System Error Interrupt request for Endpoint 20" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 19. 0x8 19. 0x4 19. " EP19_set/clr ,System Error Interrupt request for Endpoint 19" "No interrupt,Interrupt" setclrfld.long 0x0 18. 0x8 18. 0x4 18. " EP18_set/clr ,System Error Interrupt request for Endpoint 18" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 17. 0x8 17. 0x4 17. " EP17_set/clr ,System Error Interrupt request for Endpoint 17" "No interrupt,Interrupt" setclrfld.long 0x0 16. 0x8 16. 0x4 16. " EP16_set/clr ,System Error Interrupt request for Endpoint 16" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 15. 0x8 15. 0x4 15. " EP15_set/clr ,System Error Interrupt request for Endpoint 15" "No interrupt,Interrupt" setclrfld.long 0x0 14. 0x8 14. 0x4 14. " EP14_set/clr ,System Error Interrupt request for Endpoint 14" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 13. 0x8 13. 0x4 13. " EP13_set/clr ,System Error Interrupt request for Endpoint 13" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x8 12. 0x4 12. " EP12_set/clr ,System Error Interrupt request for Endpoint 12" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x8 11. 0x4 11. " EP11_set/clr ,System Error Interrupt request for Endpoint 11" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x8 10. 0x4 10. " EP10_set/clr ,System Error Interrupt request for Endpoint 10" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x8 9. 0x4 9. " EP9_set/clr ,System Error Interrupt request for Endpoint 9" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x8 8. 0x4 8. " EP8_set/clr ,System Error Interrupt request for Endpoint 8" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 7. 0x8 7. 0x4 7. " EP7_set/clr ,System Error Interrupt request for Endpoint 7" "No interrupt,Interrupt" setclrfld.long 0x0 6. 0x8 6. 0x4 6. " EP6_set/clr ,System Error Interrupt request for Endpoint 6" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 5. 0x8 5. 0x4 5. " EP5_set/clr ,System Error Interrupt request for Endpoint 5" "No interrupt,Interrupt" setclrfld.long 0x0 4. 0x8 4. 0x4 4. " EP4_set/clr ,System Error Interrupt request for Endpoint 4" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 3. 0x8 3. 0x4 3. " EP3_set/clr ,System Error Interrupt request for Endpoint 3" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0x8 2. 0x4 2. " EP2_set/clr ,System Error Interrupt request for Endpoint 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0x8 1. 0x4 1. " EP1_set/clr ,System Error Interrupt request for Endpoint 1" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0x8 0. 0x4 0. " EP0_set/clr ,System Error Interrupt request for Endpoint 0" "No interrupt,Interrupt" tree.end width 0x0B tree.end endif sif (cpuis("LPC293*")) tree "USB HOST (Universal Serial Bus HOST)" base ad:0xE0100000 width 22. rgroup.long 0x00++0x3 line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register" hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification" group.long 0x04++0x3 line.long 0x0 "HcControl,HC Operating Modes Register" bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled" bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected" bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management" textline " " bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend" bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled" bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" group.long 0x08++0x3 line.long 0x0 "HcCommandStatus,HC Status Register" bitfld.long 0x0 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3" bitfld.long 0x0 3. " OCR ,Ownership Change Request" "Not requested,Requested" bitfld.long 0x0 2. " BLF ,Bulk List Filled" "Not filled,Filled" textline " " bitfld.long 0x0 1. " CLF ,Control List Filled" "Not filled,Filled" bitfld.long 0x0 0. " HCR ,Host Controller Reset" "No effect,Reset" group.long 0x0c++0x3 line.long 0x0 "HcInterruptStatus,HC Interrupt Status Register" bitfld.long 0x0 30. " OC ,Ownership Change" "No interrupt,Interrupt" bitfld.long 0x0 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt" bitfld.long 0x0 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt" bitfld.long 0x0 3. " RD ,Resume Detected" "No interrupt,Interrupt" bitfld.long 0x0 2. " SF ,Start of Frame" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt" bitfld.long 0x0 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt" group.long 0x10++0x3 line.long 0x0 "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register" setclrfld.long 0x0 31. 0x0 31. 0x4 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled" setclrfld.long 0x0 30. 0x0 30. 0x4 30. " OCMIE_set/clr ,Ownership Change" "Disabled,Enabled" textline " " setclrfld.long 0x0 6. 0x0 6. 0x4 6. " RHSCMIE_set/clr ,Root Hub Status Change" "Disabled,Enabled" setclrfld.long 0x0 5. 0x0 5. 0x4 5. " FNOMIE_set/clr ,Frame Number Overflow" "Disabled,Enabled" textline " " setclrfld.long 0x0 4. 0x0 4. 0x4 4. " UEMIE_set/clr ,Unrecoverable Error" "Disabled,Enabled" setclrfld.long 0x0 3. 0x0 3. 0x4 3. " RDMIE_set/clr ,Resume Detected" "Disabled,Enabled" textline " " setclrfld.long 0x0 2. 0x0 2. 0x4 2. " SFMIE_set/clr ,Start of Frame" "Disabled,Enabled" setclrfld.long 0x0 1. 0x0 1. 0x4 1. " WDHMIE_set/clr ,Writeback Done Head" "Disabled,Enabled" textline " " setclrfld.long 0x0 0. 0x0 0. 0x4 0. " SOMIE_set/clr ,Scheduling Overrun" "Disabled,Enabled" group.long 0x18++0x3 line.long 0x00 "HcHCCA,Host Controller Communication Area Physical Address Register" hexmask.long 0x00 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address" rgroup.long 0x1C++0x3 line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED" group.long 0x20++0x3 line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED" group.long 0x24++0x3 line.long 0x0 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CCED ,Control Current ED" group.long 0x28++0x3 line.long 0x0 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " BHED ,Bulk Head ED" group.long 0x2c++0x3 line.long 0x0 "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " BCED ,Bulk Current ED" rgroup.long 0x30++0x3 line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head" group.long 0x34++0x3 line.long 0x0 "HcFmInterval,HC Frame Interval Register" bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet" hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval" rgroup.long 0x38++0x3 line.long 0x0 "HcFmRemaining,HC Frame Remaining Register" bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining" rgroup.long 0x3c++0x3 line.long 0x0 "HcFmNumber,HC Frame Number Register" hexmask.long.word 0x0 0.--15. 1. " FN ,Frame Number" group.long 0x40++0x3 line.long 0x0 "HcPeriodicStart,HC Periodic Start Register" hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start" group.long 0x44++0x3 line.long 0x0 "HcLSThreshold,HC LS Threshold Register" hexmask.long.word 0x0 0.--11. 1. " LST ,LS Threshold" group.long 0x48++0x3 line.long 0x0 "HcRhDescriptorA,HC Root Hub Descriptor A Register" hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,Power On To Power Good Time" bitfld.long 0x0 12. " NOCP ,No Over Current Protection" "Protection,No protection" bitfld.long 0x0 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis" textline " " bitfld.long 0x0 10. " DT ,Device Type" "Not compound,Compound" bitfld.long 0x0 9. " PSM ,Power Switching Mode" "Global,Individual" bitfld.long 0x0 8. " NPS ,No Power Switching" "Switched,Not switched" textline " " hexmask.long.byte 0x0 0.--7. 1. " NDP ,Number Downstream Ports" group.long 0x4c++0x3 line.long 0x0 "HcRhDescriptorB,HC Root Hub Descriptor B Register" hexmask.long.word 0x0 16.--31. 1. " PPCM ,Port Power Control Mask" hexmask.long.word 0x0 0.--15. 1. " DR ,Device Removable" group.long 0x50++0x3 line.long 0x0 "HcRhStatus,HC Root Hub Status Register" bitfld.long 0x0 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared" eventfld.long 0x0 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred" textline " " bitfld.long 0x0 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on" bitfld.long 0x0 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set" textline " " bitfld.long 0x0 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent" bitfld.long 0x0 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off" group.long 0x54++0x3 line.long 0x0 "HcRhPortStatus[1],HC Root Hub Port Status 1 Register" eventfld.long 0x0 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" eventfld.long 0x0 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x0 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" eventfld.long 0x0 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x0 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x0 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" bitfld.long 0x0 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x0 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" bitfld.long 0x0 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x0 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x0 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" group.long 0x58++0x3 line.long 0x0 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register" eventfld.long 0x0 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" eventfld.long 0x0 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x0 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" eventfld.long 0x0 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x0 16. " CSC ,Connect Status Change" "Not changed,Changed" bitfld.long 0x0 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x0 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" bitfld.long 0x0 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x0 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" bitfld.long 0x0 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x0 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" bitfld.long 0x0 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" sif (cpu()=="LPC3180"||cpuis("LPC293*")) rgroup.long 0xFC++0x3 line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register" endif width 0x0B tree.end endif sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")||cpu()=="LPC2926") tree "USB OTG (Universal Serial Bus On-The-Go)" base ad:0xE0100000 width 12. ;group.long ; line.long 0x0 "USBIntSt,USB Interrupt Status register" ; bitfld.long 0x00 31. "EN_USB_INTS ,Enable all USB interrupts" "Disabled,Enabled" ; textline " " ; bitfld.long 0x00 8. "USB_NEED_CLK ,USB need clock indicator" "Not Needed,Needed" ; textline " " ; bitfld.long 0x00 6. "USB_I2C_INT ,I2C module interrupt line status" "No interrupt,Interrupt" ; textline " " ; bitfld.long 0x00 5. "USB_OTG_INT ,OTG interrupt line status" "No interrupt,Interrupt" ; bitfld.long 0x00 4. "USB_ATX_INT ,External ATX interrupt line status" "No interrupt,Interrupt" ; textline " " ; bitfld.long 0x00 3. "USB_HOST_INT ,USB host interrupt line status" "No interrupt,Interrupt" ; textline " " ; bitfld.long 0x00 2. "USB_INT_REQ_DMA ,DMA interrupt line status" "No interrupt,Interrupt" ; textline " " ; bitfld.long 0x00 1. "USB_INT_REQ_HP ,High priority interrupt line status" "No interrupt,Interrupt" ; textline " " ; bitfld.long 0x00 0. "USB_INT_REQ_LP ,Low priority interrupt line status" "No interrupt,Interrupt" group.long 0x100++0x7 line.long 0x0 "OTGIntSt,OTG Interrupt Status Register" setclrfld.long 0x0 3. 0x8 3. 0xC 3. " HNP_SUCCESS ,HNP succeeded interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 2. 0x8 2. 0xC 2. " HNP_FAILURE ,HNP failed interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 1. 0x8 1. 0xC 1. " REMOVE_PU ,Remove pull-up interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 0. 0x8 0. 0xC 0. " TMR ,Timer time-out interrupt" "No interrupt,Interrupt" line.long 0x4 "OTGIntEn,OTG Interrupt Enable Register" bitfld.long 0x4 3. " HNP_SUCCESS ,HNP succeeded interrupt" "Disabled,Enabled" bitfld.long 0x4 2. " HNP_FAILURE ,HNP failed interrupt" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " REMOVE_PU ,Remove pull-up interrupt" "Disabled,Enabled" bitfld.long 0x4 0. " TMR ,Timer time-out interrupt" "Disabled,Enabled" group.long 0x110++0x7 line.long 0x0 "OTGStCtrl,OTG Status And Control Register" hexmask.long.word 0x0 16.--31. 1. " TMR_CNT ,Current timer count value" bitfld.long 0x0 10. " PU_REMOVED ,Pullup Removed" "Not removed,Removed" textline " " bitfld.long 0x0 9. " A_HNP_TRACK ,Enable HNP tracking for A-device (host)" "Disabled,Enabled" bitfld.long 0x0 8. " B_HNP_TRACK ,Enable HNP tracking for B-device (peripheral)" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " TMR_RST ,Timer reset" "No reset,Reset" textline " " bitfld.long 0x0 5. " TMR_EN ,Timer enable" "Disabled,Enabled" bitfld.long 0x0 4. " TMR_MODE ,Timer mode" "Monoshot,Free running" textline " " bitfld.long 0x0 2.--3. " TMR_SCALE ,Timer granularity selection" "10us(100KHz),100us(10KHz),1000us(1KHz),?..." bitfld.long 0x0 0. " PORT_FUNC ,Port function" "Device,Host" line.long 0x4 "OTGTMR,OTG Timer Register" hexmask.long.word 0x4 0.--15. 1. " TIMEOUT_CNT ,16-bit timer value to be counted" group.long 0xFF4++0x3 line.long 0x0 "OTGClkCtrl,OTG Clock Control Register" bitfld.long 0x0 4. " AHB_CLK_EN ,AHB clock enable" "Disabled,Enabled" bitfld.long 0x0 3. " OTG_CLK_EN ,OTG clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " I2C_CLK_EN ,I2C clock enable" "Disabled,Enabled" bitfld.long 0x0 1. " DEV_CLK_EN ,Device clock enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " HOST_CLK_EN ,Host clock enable" "Disabled,Enabled" rgroup.long 0xFF8++0x3 line.long 0x0 "OTGClkSt,OTG Clock Status Register" bitfld.long 0x0 4. " AHB_CLK_ON ,AHB clock status" "Not available,Available" bitfld.long 0x0 3. " OTG_CLK_ON ,OTG clock status" "Not available,Available" textline " " bitfld.long 0x0 2. " I2C_CLK_ON ,I2C clock status" "Not available,Available" bitfld.long 0x0 1. " DEV_CLK_ON ,Device clock status" "Not available,Available" textline " " bitfld.long 0x0 0. " HOST_CLK_ON ,Host clock status" "Not available,Available" hgroup.long 0x300++0x3 hide.long 0x0 "I2C_RX/TX,I2C RX/TX Register" in group.long 0x304++0x3 line.long 0x0 "I2C_STS,I2C Status Register" bitfld.long 0x0 11. " TFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.long 0x0 10. " TFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.long 0x0 9. " RFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.long 0x0 8. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.long 0x0 7. " SDA ,Value of the SDA signal" "Low,High" bitfld.long 0x0 6. " SCL ,Value of the SCL signal" "Low,High" textline " " bitfld.long 0x0 5. " Active ,Bus Active" "Not active,Active" bitfld.long 0x0 4. " DRSI ,Slave Data Request" "Not requested,Requested" textline " " bitfld.long 0x0 3. " DRMI ,Master Data Request" "Not requested,Requested" bitfld.long 0x0 2. " NAI ,No Acknowledge" "Acknowledge,No acknowledge" textline " " eventfld.long 0x0 1. " AFI ,Arbitration Failure" "Not occurred,Occurred" eventfld.long 0x0 0. " TDI ,Transaction Done" "Undone,Done" group.long 0x308++0x7 line.long 0x0 "I2C_CTL,I2C Control Register" bitfld.long 0x0 8. " SRST ,Soft reset" "No reset,Reset" bitfld.long 0x0 7. " TFFIE ,Transmit FIFO Not Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " RFDAIE ,Receive Data Available Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 5. " RFFIE ,Receive FIFO Full Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " DRSIE ,Slave Transmitter Data Request Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 3. " DRMIE ,Master Transmitter Data Request Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " NAIE ,Transmitter No Acknowledge Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0 1. " AFIE ,Transmitter Arbitration Failure Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " TDIE ,Transmit Done Interrupt Enable" "Disabled,Enabled" line.long 0x4 "I2C_CLKHI,I2C Clock High Register" hexmask.long.byte 0x4 0.--7. 1. " CDHI ,Clock divisor high" wgroup.long 0x310++0x03 line.long 0x00 "I2C_CLKLO,I2C Clock Low Register" hexmask.long.byte 0x00 0.--7. 1. " CDLO ,Clock divisor low" width 0xB tree.end endif tree.open "GPIO (General Purpose Input/Output)" base ad:0xE004A000 width 6. tree "Port 0" rgroup.long 0x00++0x3 line.long 0x00 "PINS,GPIO port 0 input register" bitfld.long 0x00 31. " PINS[31] ,Input level of pin P0[31]" "Low,High" bitfld.long 0x00 30. " PINS[30] ,Input level of pin P0[30]" "Low,High" bitfld.long 0x00 29. " PINS[29] ,Input level of pin P0[29]" "Low,High" textline " " bitfld.long 0x00 28. " PINS[28] ,Input level of pin P0[28]" "Low,High" bitfld.long 0x00 27. " PINS[27] ,Input level of pin P0[27]" "Low,High" bitfld.long 0x00 26. " PINS[26] ,Input level of pin P0[26]" "Low,High" textline " " bitfld.long 0x00 25. " PINS[25] ,Input level of pin P0[25]" "Low,High" bitfld.long 0x00 24. " PINS[24] ,Input level of pin P0[24]" "Low,High" bitfld.long 0x00 23. " PINS[23] ,Input level of pin P0[23]" "Low,High" textline " " bitfld.long 0x00 22. " PINS[22] ,Input level of pin P0[22]" "Low,High" bitfld.long 0x00 21. " PINS[21] ,Input level of pin P0[21]" "Low,High" bitfld.long 0x00 20. " PINS[20] ,Input level of pin P0[20]" "Low,High" textline " " bitfld.long 0x00 19. " PINS[19] ,Input level of pin P0[19]" "Low,High" bitfld.long 0x00 18. " PINS[18] ,Input level of pin P0[18]" "Low,High" bitfld.long 0x00 17. " PINS[17] ,Input level of pin P0[17]" "Low,High" textline " " bitfld.long 0x00 16. " PINS[16] ,Input level of pin P0[16]" "Low,High" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P0[15]" "Low,High" bitfld.long 0x00 14. " PINS[14] ,Input level of pin P0[14]" "Low,High" textline " " bitfld.long 0x00 13. " PINS[13] ,Input level of pin P0[13]" "Low,High" bitfld.long 0x00 12. " PINS[12] ,Input level of pin P0[12]" "Low,High" bitfld.long 0x00 11. " PINS[11] ,Input level of pin P0[11]" "Low,High" textline " " bitfld.long 0x00 10. " PINS[10] ,Input level of pin P0[10]" "Low,High" bitfld.long 0x00 9. " PINS[9] ,Input level of pin P0[9]" "Low,High" bitfld.long 0x00 8. " PINS[8] ,Input level of pin P0[8]" "Low,High" textline " " bitfld.long 0x00 7. " PINS[7] ,Input level of pin P0[7]" "Low,High" bitfld.long 0x00 6. " PINS[6] ,Input level of pin P0[6]" "Low,High" bitfld.long 0x00 5. " PINS[5] ,Input level of pin P0[5]" "Low,High" textline " " bitfld.long 0x00 4. " PINS[4] ,Input level of pin P0[4]" "Low,High" bitfld.long 0x00 3. " PINS[3] ,Input level of pin P0[3]" "Low,High" bitfld.long 0x00 2. " PINS[2] ,Input level of pin P0[2]" "Low,High" textline " " bitfld.long 0x00 1. " PINS[1] ,Input level of pin P0[1]" "Low,High" bitfld.long 0x00 0. " PINS[0] ,Input level of pin P0[0]" "Low,High" group.long 0x04++0x07 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 31. " OR[31] ,Output level of pin P0[31]" "Low,High" bitfld.long 0x00 30. " OR[30] ,Output level of pin P0[30]" "Low,High" bitfld.long 0x00 29. " OR[29] ,Output level of pin P0[29]" "Low,High" textline " " bitfld.long 0x00 28. " OR[28] ,Output level of pin P0[28]" "Low,High" bitfld.long 0x00 27. " OR[27] ,Output level of pin P0[27]" "Low,High" bitfld.long 0x00 26. " OR[26] ,Output level of pin P0[26]" "Low,High" textline " " bitfld.long 0x00 25. " OR[25] ,Output level of pin P0[25]" "Low,High" bitfld.long 0x00 24. " OR[24] ,Output level of pin P0[24]" "Low,High" bitfld.long 0x00 23. " OR[23] ,Output level of pin P0[23]" "Low,High" textline " " bitfld.long 0x00 22. " OR[22] ,Output level of pin P0[22]" "Low,High" bitfld.long 0x00 21. " OR[21] ,Output level of pin P0[21]" "Low,High" bitfld.long 0x00 20. " OR[20] ,Output level of pin P0[20]" "Low,High" textline " " bitfld.long 0x00 19. " OR[19] ,Output level of pin P0[19]" "Low,High" bitfld.long 0x00 18. " OR[18] ,Output level of pin P0[18]" "Low,High" bitfld.long 0x00 17. " OR[17] ,Output level of pin P0[17]" "Low,High" textline " " bitfld.long 0x00 16. " OR[16] ,Output level of pin P0[16]" "Low,High" bitfld.long 0x00 15. " OR[15] ,Output level of pin P0[15]" "Low,High" bitfld.long 0x00 14. " OR[14] ,Output level of pin P0[14]" "Low,High" textline " " bitfld.long 0x00 13. " OR[13] ,Output level of pin P0[13]" "Low,High" bitfld.long 0x00 12. " OR[12] ,Output level of pin P0[12]" "Low,High" bitfld.long 0x00 11. " OR[11] ,Output level of pin P0[11]" "Low,High" textline " " bitfld.long 0x00 10. " OR[10] ,Output level of pin P0[10]" "Low,High" bitfld.long 0x00 9. " OR[9] ,Output level of pin P0[9]" "Low,High" bitfld.long 0x00 8. " OR[8] ,Output level of pin P0[8]" "Low,High" textline " " bitfld.long 0x00 7. " OR[7] ,Output level of pin P0[7]" "Low,High" bitfld.long 0x00 6. " OR[6] ,Output level of pin P0[6]" "Low,High" bitfld.long 0x00 5. " OR[5] ,Output level of pin P0[5]" "Low,High" textline " " bitfld.long 0x00 4. " OR[4] ,Output level of pin P0[4]" "Low,High" bitfld.long 0x00 3. " OR[3] ,Output level of pin P0[3]" "Low,High" bitfld.long 0x00 2. " OR[2] ,Output level of pin P0[2]" "Low,High" textline " " bitfld.long 0x00 1. " OR[1] ,Output level of pin P0[1]" "Low,High" bitfld.long 0x00 0. " OR[0] ,Output level of pin P0[0]" "Low,High" line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 31. " DR[31] ,Pin P0[31] configuration" "Input,Output" bitfld.long 0x04 30. " DR[30] ,Pin P0[30] configuration" "Input,Output" bitfld.long 0x04 29. " DR[29] ,Pin P0[29] configuration" "Input,Output" textline " " bitfld.long 0x04 28. " DR[28] ,Pin P0[28] configuration" "Input,Output" bitfld.long 0x04 27. " DR[27] ,Pin P0[27] configuration" "Input,Output" bitfld.long 0x04 26. " DR[26] ,Pin P0[26] configuration" "Input,Output" textline " " bitfld.long 0x04 25. " DR[25] ,Pin P0[25] configuration" "Input,Output" bitfld.long 0x04 24. " DR[24] ,Pin P0[24] configuration" "Input,Output" bitfld.long 0x04 23. " DR[23] ,Pin P0[23] configuration" "Input,Output" textline " " bitfld.long 0x04 22. " DR[22] ,Pin P0[22] configuration" "Input,Output" bitfld.long 0x04 21. " DR[21] ,Pin P0[21] configuration" "Input,Output" bitfld.long 0x04 20. " DR[20] ,Pin P0[20] configuration" "Input,Output" textline " " bitfld.long 0x04 19. " DR[19] ,Pin P0[19] configuration" "Input,Output" bitfld.long 0x04 18. " DR[18] ,Pin P0[18] configuration" "Input,Output" bitfld.long 0x04 17. " DR[17] ,Pin P0[17] configuration" "Input,Output" textline " " bitfld.long 0x04 16. " DR[16] ,Pin P0[16] configuration" "Input,Output" bitfld.long 0x04 15. " DR[15] ,Pin P0[15] configuration" "Input,Output" bitfld.long 0x04 14. " DR[14] ,Pin P0[14] configuration" "Input,Output" textline " " bitfld.long 0x04 13. " DR[13] ,Pin P0[13] configuration" "Input,Output" bitfld.long 0x04 12. " DR[12] ,Pin P0[12] configuration" "Input,Output" bitfld.long 0x04 11. " DR[11] ,Pin P0[11] configuration" "Input,Output" textline " " bitfld.long 0x04 10. " DR[10] ,Pin P0[10] configuration" "Input,Output" bitfld.long 0x04 9. " DR[9] ,Pin P0[9] configuration" "Input,Output" bitfld.long 0x04 8. " DR[8] ,Pin P0[8] configuration" "Input,Output" textline " " bitfld.long 0x04 7. " DR[7] ,Pin P0[7] configuration" "Input,Output" bitfld.long 0x04 6. " DR[6] ,Pin P0[6] configuration" "Input,Output" bitfld.long 0x04 5. " DR[5] ,Pin P0[5] configuration" "Input,Output" textline " " bitfld.long 0x04 4. " DR[4] ,Pin P0[4] configuration" "Input,Output" bitfld.long 0x04 3. " DR[3] ,Pin P0[3] configuration" "Input,Output" bitfld.long 0x04 2. " DR[2] ,Pin P0[2] configuration" "Input,Output" textline " " bitfld.long 0x04 1. " DR[1] ,Pin P0[1] configuration" "Input,Output" bitfld.long 0x04 0. " DR[0] ,Pin P0[0] configuration" "Input,Output" tree.end sif cpuis("LPC291*") tree "Port 1" rgroup.long 0x1000++0x3 line.long 0x00 "PINS,GPIO port 1 input register" bitfld.long 0x00 31. " PINS[31] ,Input level of pin P1[31]" "Low,High" bitfld.long 0x00 30. " PINS[30] ,Input level of pin P1[30]" "Low,High" bitfld.long 0x00 29. " PINS[29] ,Input level of pin P1[29]" "Low,High" textline " " bitfld.long 0x00 28. " PINS[28] ,Input level of pin P1[28]" "Low,High" bitfld.long 0x00 27. " PINS[27] ,Input level of pin P1[27]" "Low,High" bitfld.long 0x00 26. " PINS[26] ,Input level of pin P1[26]" "Low,High" textline " " bitfld.long 0x00 25. " PINS[25] ,Input level of pin P1[25]" "Low,High" bitfld.long 0x00 24. " PINS[24] ,Input level of pin P1[24]" "Low,High" bitfld.long 0x00 23. " PINS[23] ,Input level of pin P1[23]" "Low,High" textline " " bitfld.long 0x00 22. " PINS[22] ,Input level of pin P1[22]" "Low,High" bitfld.long 0x00 21. " PINS[21] ,Input level of pin P1[21]" "Low,High" bitfld.long 0x00 20. " PINS[20] ,Input level of pin P1[20]" "Low,High" textline " " bitfld.long 0x00 19. " PINS[19] ,Input level of pin P1[19]" "Low,High" bitfld.long 0x00 18. " PINS[18] ,Input level of pin P1[18]" "Low,High" bitfld.long 0x00 17. " PINS[17] ,Input level of pin P1[17]" "Low,High" textline " " bitfld.long 0x00 16. " PINS[16] ,Input level of pin P1[16]" "Low,High" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P1[15]" "Low,High" bitfld.long 0x00 14. " PINS[14] ,Input level of pin P1[14]" "Low,High" textline " " bitfld.long 0x00 13. " PINS[13] ,Input level of pin P1[13]" "Low,High" bitfld.long 0x00 12. " PINS[12] ,Input level of pin P1[12]" "Low,High" bitfld.long 0x00 11. " PINS[11] ,Input level of pin P1[11]" "Low,High" textline " " bitfld.long 0x00 10. " PINS[10] ,Input level of pin P1[10]" "Low,High" bitfld.long 0x00 9. " PINS[9] ,Input level of pin P1[9]" "Low,High" bitfld.long 0x00 8. " PINS[8] ,Input level of pin P1[8]" "Low,High" textline " " bitfld.long 0x00 7. " PINS[7] ,Input level of pin P1[7]" "Low,High" bitfld.long 0x00 6. " PINS[6] ,Input level of pin P1[6]" "Low,High" bitfld.long 0x00 5. " PINS[5] ,Input level of pin P1[5]" "Low,High" textline " " bitfld.long 0x00 4. " PINS[4] ,Input level of pin P1[4]" "Low,High" bitfld.long 0x00 3. " PINS[3] ,Input level of pin P1[3]" "Low,High" bitfld.long 0x00 2. " PINS[2] ,Input level of pin P1[2]" "Low,High" textline " " bitfld.long 0x00 1. " PINS[1] ,Input level of pin P1[1]" "Low,High" bitfld.long 0x00 0. " PINS[0] ,Input level of pin P1[0]" "Low,High" group.long 0x1004++0x07 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 31. " OR[31] ,Output level of pin P1[31]" "Low,High" bitfld.long 0x00 30. " OR[30] ,Output level of pin P1[30]" "Low,High" bitfld.long 0x00 29. " OR[29] ,Output level of pin P1[29]" "Low,High" textline " " bitfld.long 0x00 28. " OR[28] ,Output level of pin P1[28]" "Low,High" bitfld.long 0x00 27. " OR[27] ,Output level of pin P1[27]" "Low,High" bitfld.long 0x00 26. " OR[26] ,Output level of pin P1[26]" "Low,High" textline " " bitfld.long 0x00 25. " OR[25] ,Output level of pin P1[25]" "Low,High" bitfld.long 0x00 24. " OR[24] ,Output level of pin P1[24]" "Low,High" bitfld.long 0x00 23. " OR[23] ,Output level of pin P1[23]" "Low,High" textline " " bitfld.long 0x00 22. " OR[22] ,Output level of pin P1[22]" "Low,High" bitfld.long 0x00 21. " OR[21] ,Output level of pin P1[21]" "Low,High" bitfld.long 0x00 20. " OR[20] ,Output level of pin P1[20]" "Low,High" textline " " bitfld.long 0x00 19. " OR[19] ,Output level of pin P1[19]" "Low,High" bitfld.long 0x00 18. " OR[18] ,Output level of pin P1[18]" "Low,High" bitfld.long 0x00 17. " OR[17] ,Output level of pin P1[17]" "Low,High" textline " " bitfld.long 0x00 16. " OR[16] ,Output level of pin P1[16]" "Low,High" bitfld.long 0x00 15. " OR[15] ,Output level of pin P1[15]" "Low,High" bitfld.long 0x00 14. " OR[14] ,Output level of pin P1[14]" "Low,High" textline " " bitfld.long 0x00 13. " OR[13] ,Output level of pin P1[13]" "Low,High" bitfld.long 0x00 12. " OR[12] ,Output level of pin P1[12]" "Low,High" bitfld.long 0x00 11. " OR[11] ,Output level of pin P1[11]" "Low,High" textline " " bitfld.long 0x00 10. " OR[10] ,Output level of pin P1[10]" "Low,High" bitfld.long 0x00 9. " OR[9] ,Output level of pin P1[9]" "Low,High" bitfld.long 0x00 8. " OR[8] ,Output level of pin P1[8]" "Low,High" textline " " bitfld.long 0x00 7. " OR[7] ,Output level of pin P1[7]" "Low,High" bitfld.long 0x00 6. " OR[6] ,Output level of pin P1[6]" "Low,High" bitfld.long 0x00 5. " OR[5] ,Output level of pin P1[5]" "Low,High" textline " " bitfld.long 0x00 4. " OR[4] ,Output level of pin P1[4]" "Low,High" bitfld.long 0x00 3. " OR[3] ,Output level of pin P1[3]" "Low,High" bitfld.long 0x00 2. " OR[2] ,Output level of pin P1[2]" "Low,High" textline " " bitfld.long 0x00 1. " OR[1] ,Output level of pin P1[1]" "Low,High" bitfld.long 0x00 0. " OR[0] ,Output level of pin P1[0]" "Low,High" line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 31. " DR[31] ,Pin P1[31] configuration" "Input,Output" bitfld.long 0x04 30. " DR[30] ,Pin P1[30] configuration" "Input,Output" bitfld.long 0x04 29. " DR[29] ,Pin P1[29] configuration" "Input,Output" textline " " bitfld.long 0x04 28. " DR[28] ,Pin P1[28] configuration" "Input,Output" bitfld.long 0x04 27. " DR[27] ,Pin P1[27] configuration" "Input,Output" bitfld.long 0x04 26. " DR[26] ,Pin P1[26] configuration" "Input,Output" textline " " bitfld.long 0x04 25. " DR[25] ,Pin P1[25] configuration" "Input,Output" bitfld.long 0x04 24. " DR[24] ,Pin P1[24] configuration" "Input,Output" bitfld.long 0x04 23. " DR[23] ,Pin P1[23] configuration" "Input,Output" textline " " bitfld.long 0x04 22. " DR[22] ,Pin P1[22] configuration" "Input,Output" bitfld.long 0x04 21. " DR[21] ,Pin P1[21] configuration" "Input,Output" bitfld.long 0x04 20. " DR[20] ,Pin P1[20] configuration" "Input,Output" textline " " bitfld.long 0x04 19. " DR[19] ,Pin P1[19] configuration" "Input,Output" bitfld.long 0x04 18. " DR[18] ,Pin P1[18] configuration" "Input,Output" bitfld.long 0x04 17. " DR[17] ,Pin P1[17] configuration" "Input,Output" textline " " bitfld.long 0x04 16. " DR[16] ,Pin P1[16] configuration" "Input,Output" bitfld.long 0x04 15. " DR[15] ,Pin P1[15] configuration" "Input,Output" bitfld.long 0x04 14. " DR[14] ,Pin P1[14] configuration" "Input,Output" textline " " bitfld.long 0x04 13. " DR[13] ,Pin P1[13] configuration" "Input,Output" bitfld.long 0x04 12. " DR[12] ,Pin P1[12] configuration" "Input,Output" bitfld.long 0x04 11. " DR[11] ,Pin P1[11] configuration" "Input,Output" textline " " bitfld.long 0x04 10. " DR[10] ,Pin P1[10] configuration" "Input,Output" bitfld.long 0x04 9. " DR[9] ,Pin P1[9] configuration" "Input,Output" bitfld.long 0x04 8. " DR[8] ,Pin P1[8] configuration" "Input,Output" textline " " bitfld.long 0x04 7. " DR[7] ,Pin P1[7] configuration" "Input,Output" bitfld.long 0x04 6. " DR[6] ,Pin P1[6] configuration" "Input,Output" bitfld.long 0x04 5. " DR[5] ,Pin P1[5] configuration" "Input,Output" textline " " bitfld.long 0x04 4. " DR[4] ,Pin P1[4] configuration" "Input,Output" bitfld.long 0x04 3. " DR[3] ,Pin P1[3] configuration" "Input,Output" bitfld.long 0x04 2. " DR[2] ,Pin P1[2] configuration" "Input,Output" textline " " bitfld.long 0x04 1. " DR[1] ,Pin P1[1] configuration" "Input,Output" bitfld.long 0x04 0. " DR[0] ,Pin P1[0] configuration" "Input,Output" tree.end else tree "Port 1" rgroup.long 0x1000++0x3 line.long 0x00 "PINS,GPIO port 1 input register" bitfld.long 0x00 27. " PINS[27] ,Input level of pin P1[27]" "Low,High" bitfld.long 0x00 26. " PINS[26] ,Input level of pin P1[26]" "Low,High" textline " " bitfld.long 0x00 25. " PINS[25] ,Input level of pin P1[25]" "Low,High" bitfld.long 0x00 24. " PINS[24] ,Input level of pin P1[24]" "Low,High" bitfld.long 0x00 23. " PINS[23] ,Input level of pin P1[23]" "Low,High" textline " " bitfld.long 0x00 22. " PINS[22] ,Input level of pin P1[22]" "Low,High" bitfld.long 0x00 21. " PINS[21] ,Input level of pin P1[21]" "Low,High" bitfld.long 0x00 20. " PINS[20] ,Input level of pin P1[20]" "Low,High" textline " " bitfld.long 0x00 19. " PINS[19] ,Input level of pin P1[19]" "Low,High" bitfld.long 0x00 18. " PINS[18] ,Input level of pin P1[18]" "Low,High" bitfld.long 0x00 17. " PINS[17] ,Input level of pin P1[17]" "Low,High" textline " " bitfld.long 0x00 16. " PINS[16] ,Input level of pin P1[16]" "Low,High" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P1[15]" "Low,High" bitfld.long 0x00 14. " PINS[14] ,Input level of pin P1[14]" "Low,High" textline " " bitfld.long 0x00 13. " PINS[13] ,Input level of pin P1[13]" "Low,High" bitfld.long 0x00 12. " PINS[12] ,Input level of pin P1[12]" "Low,High" bitfld.long 0x00 11. " PINS[11] ,Input level of pin P1[11]" "Low,High" textline " " bitfld.long 0x00 10. " PINS[10] ,Input level of pin P1[10]" "Low,High" bitfld.long 0x00 9. " PINS[9] ,Input level of pin P1[9]" "Low,High" bitfld.long 0x00 8. " PINS[8] ,Input level of pin P1[8]" "Low,High" textline " " bitfld.long 0x00 7. " PINS[7] ,Input level of pin P1[7]" "Low,High" bitfld.long 0x00 6. " PINS[6] ,Input level of pin P1[6]" "Low,High" bitfld.long 0x00 5. " PINS[5] ,Input level of pin P1[5]" "Low,High" textline " " bitfld.long 0x00 4. " PINS[4] ,Input level of pin P1[4]" "Low,High" bitfld.long 0x00 3. " PINS[3] ,Input level of pin P1[3]" "Low,High" bitfld.long 0x00 2. " PINS[2] ,Input level of pin P1[2]" "Low,High" textline " " bitfld.long 0x00 1. " PINS[1] ,Input level of pin P1[1]" "Low,High" bitfld.long 0x00 0. " PINS[0] ,Input level of pin P1[0]" "Low,High" group.long 0x1004++0x07 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 27. " OR[27] ,Output level of pin P1[27]" "Low,High" bitfld.long 0x00 26. " OR[26] ,Output level of pin P1[26]" "Low,High" textline " " bitfld.long 0x00 25. " OR[25] ,Output level of pin P1[25]" "Low,High" bitfld.long 0x00 24. " OR[24] ,Output level of pin P1[24]" "Low,High" bitfld.long 0x00 23. " OR[23] ,Output level of pin P1[23]" "Low,High" textline " " bitfld.long 0x00 22. " OR[22] ,Output level of pin P1[22]" "Low,High" bitfld.long 0x00 21. " OR[21] ,Output level of pin P1[21]" "Low,High" bitfld.long 0x00 20. " OR[20] ,Output level of pin P1[20]" "Low,High" textline " " bitfld.long 0x00 19. " OR[19] ,Output level of pin P1[19]" "Low,High" bitfld.long 0x00 18. " OR[18] ,Output level of pin P1[18]" "Low,High" bitfld.long 0x00 17. " OR[17] ,Output level of pin P1[17]" "Low,High" textline " " bitfld.long 0x00 16. " OR[16] ,Output level of pin P1[16]" "Low,High" bitfld.long 0x00 15. " OR[15] ,Output level of pin P1[15]" "Low,High" bitfld.long 0x00 14. " OR[14] ,Output level of pin P1[14]" "Low,High" textline " " bitfld.long 0x00 13. " OR[13] ,Output level of pin P1[13]" "Low,High" bitfld.long 0x00 12. " OR[12] ,Output level of pin P1[12]" "Low,High" bitfld.long 0x00 11. " OR[11] ,Output level of pin P1[11]" "Low,High" textline " " bitfld.long 0x00 10. " OR[10] ,Output level of pin P1[10]" "Low,High" bitfld.long 0x00 9. " OR[9] ,Output level of pin P1[9]" "Low,High" bitfld.long 0x00 8. " OR[8] ,Output level of pin P1[8]" "Low,High" textline " " bitfld.long 0x00 7. " OR[7] ,Output level of pin P1[7]" "Low,High" bitfld.long 0x00 6. " OR[6] ,Output level of pin P1[6]" "Low,High" bitfld.long 0x00 5. " OR[5] ,Output level of pin P1[5]" "Low,High" textline " " bitfld.long 0x00 4. " OR[4] ,Output level of pin P1[4]" "Low,High" bitfld.long 0x00 3. " OR[3] ,Output level of pin P1[3]" "Low,High" bitfld.long 0x00 2. " OR[2] ,Output level of pin P1[2]" "Low,High" textline " " bitfld.long 0x00 1. " OR[1] ,Output level of pin P1[1]" "Low,High" bitfld.long 0x00 0. " OR[0] ,Output level of pin P1[0]" "Low,High" line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 27. " DR[27] ,Pin P1[27] configuration" "Input,Output" bitfld.long 0x04 26. " DR[26] ,Pin P1[26] configuration" "Input,Output" textline " " bitfld.long 0x04 25. " DR[25] ,Pin P1[25] configuration" "Input,Output" bitfld.long 0x04 24. " DR[24] ,Pin P1[24] configuration" "Input,Output" bitfld.long 0x04 23. " DR[23] ,Pin P1[23] configuration" "Input,Output" textline " " bitfld.long 0x04 22. " DR[22] ,Pin P1[22] configuration" "Input,Output" bitfld.long 0x04 21. " DR[21] ,Pin P1[21] configuration" "Input,Output" bitfld.long 0x04 20. " DR[20] ,Pin P1[20] configuration" "Input,Output" textline " " bitfld.long 0x04 19. " DR[19] ,Pin P1[19] configuration" "Input,Output" bitfld.long 0x04 18. " DR[18] ,Pin P1[18] configuration" "Input,Output" bitfld.long 0x04 17. " DR[17] ,Pin P1[17] configuration" "Input,Output" textline " " bitfld.long 0x04 16. " DR[16] ,Pin P1[16] configuration" "Input,Output" bitfld.long 0x04 15. " DR[15] ,Pin P1[15] configuration" "Input,Output" bitfld.long 0x04 14. " DR[14] ,Pin P1[14] configuration" "Input,Output" textline " " bitfld.long 0x04 13. " DR[13] ,Pin P1[13] configuration" "Input,Output" bitfld.long 0x04 12. " DR[12] ,Pin P1[12] configuration" "Input,Output" bitfld.long 0x04 11. " DR[11] ,Pin P1[11] configuration" "Input,Output" textline " " bitfld.long 0x04 10. " DR[10] ,Pin P1[10] configuration" "Input,Output" bitfld.long 0x04 9. " DR[9] ,Pin P1[9] configuration" "Input,Output" bitfld.long 0x04 8. " DR[8] ,Pin P1[8] configuration" "Input,Output" textline " " bitfld.long 0x04 7. " DR[7] ,Pin P1[7] configuration" "Input,Output" bitfld.long 0x04 6. " DR[6] ,Pin P1[6] configuration" "Input,Output" bitfld.long 0x04 5. " DR[5] ,Pin P1[5] configuration" "Input,Output" textline " " bitfld.long 0x04 4. " DR[4] ,Pin P1[4] configuration" "Input,Output" bitfld.long 0x04 3. " DR[3] ,Pin P1[3] configuration" "Input,Output" bitfld.long 0x04 2. " DR[2] ,Pin P1[2] configuration" "Input,Output" textline " " bitfld.long 0x04 1. " DR[1] ,Pin P1[1] configuration" "Input,Output" bitfld.long 0x04 0. " DR[0] ,Pin P1[0] configuration" "Input,Output" tree.end endif sif (cpuis("LPC291*"))||(cpuis("LPC293*"))||(cpu()=="LPC2927")||(cpu()=="LPC2929")||(cpu()=="LPC2926") tree "Port 2" rgroup.long 0x2000++0x3 line.long 0x00 "PINS,GPIO port 2 input register" bitfld.long 0x00 27. " PINS[27] ,Input level of pin P2[27]" "Low,High" bitfld.long 0x00 26. " PINS[26] ,Input level of pin P2[26]" "Low,High" textline " " bitfld.long 0x00 25. " PINS[25] ,Input level of pin P2[25]" "Low,High" bitfld.long 0x00 24. " PINS[24] ,Input level of pin P2[24]" "Low,High" bitfld.long 0x00 23. " PINS[23] ,Input level of pin P2[23]" "Low,High" textline " " bitfld.long 0x00 22. " PINS[22] ,Input level of pin P2[22]" "Low,High" bitfld.long 0x00 21. " PINS[21] ,Input level of pin P2[21]" "Low,High" bitfld.long 0x00 20. " PINS[20] ,Input level of pin P2[20]" "Low,High" textline " " bitfld.long 0x00 19. " PINS[19] ,Input level of pin P2[19]" "Low,High" bitfld.long 0x00 18. " PINS[18] ,Input level of pin P2[18]" "Low,High" bitfld.long 0x00 17. " PINS[17] ,Input level of pin P2[17]" "Low,High" textline " " bitfld.long 0x00 16. " PINS[16] ,Input level of pin P2[16]" "Low,High" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P2[15]" "Low,High" bitfld.long 0x00 14. " PINS[14] ,Input level of pin P2[14]" "Low,High" textline " " bitfld.long 0x00 13. " PINS[13] ,Input level of pin P2[13]" "Low,High" bitfld.long 0x00 12. " PINS[12] ,Input level of pin P2[12]" "Low,High" bitfld.long 0x00 11. " PINS[11] ,Input level of pin P2[11]" "Low,High" textline " " bitfld.long 0x00 10. " PINS[10] ,Input level of pin P2[10]" "Low,High" bitfld.long 0x00 9. " PINS[9] ,Input level of pin P2[9]" "Low,High" bitfld.long 0x00 8. " PINS[8] ,Input level of pin P2[8]" "Low,High" textline " " bitfld.long 0x00 7. " PINS[7] ,Input level of pin P2[7]" "Low,High" bitfld.long 0x00 6. " PINS[6] ,Input level of pin P2[6]" "Low,High" bitfld.long 0x00 5. " PINS[5] ,Input level of pin P2[5]" "Low,High" textline " " bitfld.long 0x00 4. " PINS[4] ,Input level of pin P2[4]" "Low,High" bitfld.long 0x00 3. " PINS[3] ,Input level of pin P2[3]" "Low,High" bitfld.long 0x00 2. " PINS[2] ,Input level of pin P2[2]" "Low,High" textline " " bitfld.long 0x00 1. " PINS[1] ,Input level of pin P2[1]" "Low,High" bitfld.long 0x00 0. " PINS[0] ,Input level of pin P2[0]" "Low,High" group.long 0x2004++0x07 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 27. " OR[27] ,Output level of pin P2[27]" "Low,High" bitfld.long 0x00 26. " OR[26] ,Output level of pin P2[26]" "Low,High" textline " " bitfld.long 0x00 25. " OR[25] ,Output level of pin P2[25]" "Low,High" bitfld.long 0x00 24. " OR[24] ,Output level of pin P2[24]" "Low,High" bitfld.long 0x00 23. " OR[23] ,Output level of pin P2[23]" "Low,High" textline " " bitfld.long 0x00 22. " OR[22] ,Output level of pin P2[22]" "Low,High" bitfld.long 0x00 21. " OR[21] ,Output level of pin P2[21]" "Low,High" bitfld.long 0x00 20. " OR[20] ,Output level of pin P2[20]" "Low,High" textline " " bitfld.long 0x00 19. " OR[19] ,Output level of pin P2[19]" "Low,High" bitfld.long 0x00 18. " OR[18] ,Output level of pin P2[18]" "Low,High" bitfld.long 0x00 17. " OR[17] ,Output level of pin P2[17]" "Low,High" textline " " bitfld.long 0x00 16. " OR[16] ,Output level of pin P2[16]" "Low,High" bitfld.long 0x00 15. " OR[15] ,Output level of pin P2[15]" "Low,High" bitfld.long 0x00 14. " OR[14] ,Output level of pin P2[14]" "Low,High" textline " " bitfld.long 0x00 13. " OR[13] ,Output level of pin P2[13]" "Low,High" bitfld.long 0x00 12. " OR[12] ,Output level of pin P2[12]" "Low,High" bitfld.long 0x00 11. " OR[11] ,Output level of pin P2[11]" "Low,High" textline " " bitfld.long 0x00 10. " OR[10] ,Output level of pin P2[10]" "Low,High" bitfld.long 0x00 9. " OR[9] ,Output level of pin P2[9]" "Low,High" bitfld.long 0x00 8. " OR[8] ,Output level of pin P2[8]" "Low,High" textline " " bitfld.long 0x00 7. " OR[7] ,Output level of pin P2[7]" "Low,High" bitfld.long 0x00 6. " OR[6] ,Output level of pin P2[6]" "Low,High" bitfld.long 0x00 5. " OR[5] ,Output level of pin P2[5]" "Low,High" textline " " bitfld.long 0x00 4. " OR[4] ,Output level of pin P2[4]" "Low,High" bitfld.long 0x00 3. " OR[3] ,Output level of pin P2[3]" "Low,High" bitfld.long 0x00 2. " OR[2] ,Output level of pin P2[2]" "Low,High" textline " " bitfld.long 0x00 1. " OR[1] ,Output level of pin P2[1]" "Low,High" bitfld.long 0x00 0. " OR[0] ,Output level of pin P2[0]" "Low,High" line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 27. " DR[27] ,Pin P2[27] configuration" "Input,Output" bitfld.long 0x04 26. " DR[26] ,Pin P2[26] configuration" "Input,Output" textline " " bitfld.long 0x04 25. " DR[25] ,Pin P2[25] configuration" "Input,Output" bitfld.long 0x04 24. " DR[24] ,Pin P2[24] configuration" "Input,Output" bitfld.long 0x04 23. " DR[23] ,Pin P2[23] configuration" "Input,Output" textline " " bitfld.long 0x04 22. " DR[22] ,Pin P2[22] configuration" "Input,Output" bitfld.long 0x04 21. " DR[21] ,Pin P2[21] configuration" "Input,Output" bitfld.long 0x04 20. " DR[20] ,Pin P2[20] configuration" "Input,Output" textline " " bitfld.long 0x04 19. " DR[19] ,Pin P2[19] configuration" "Input,Output" bitfld.long 0x04 18. " DR[18] ,Pin P2[18] configuration" "Input,Output" bitfld.long 0x04 17. " DR[17] ,Pin P2[17] configuration" "Input,Output" textline " " bitfld.long 0x04 16. " DR[16] ,Pin P2[16] configuration" "Input,Output" bitfld.long 0x04 15. " DR[15] ,Pin P2[15] configuration" "Input,Output" bitfld.long 0x04 14. " DR[14] ,Pin P2[14] configuration" "Input,Output" textline " " bitfld.long 0x04 13. " DR[13] ,Pin P2[13] configuration" "Input,Output" bitfld.long 0x04 12. " DR[12] ,Pin P2[12] configuration" "Input,Output" bitfld.long 0x04 11. " DR[11] ,Pin P2[11] configuration" "Input,Output" textline " " bitfld.long 0x04 10. " DR[10] ,Pin P2[10] configuration" "Input,Output" bitfld.long 0x04 9. " DR[9] ,Pin P2[9] configuration" "Input,Output" bitfld.long 0x04 8. " DR[8] ,Pin P2[8] configuration" "Input,Output" textline " " bitfld.long 0x04 7. " DR[7] ,Pin P2[7] configuration" "Input,Output" bitfld.long 0x04 6. " DR[6] ,Pin P2[6] configuration" "Input,Output" bitfld.long 0x04 5. " DR[5] ,Pin P2[5] configuration" "Input,Output" textline " " bitfld.long 0x04 4. " DR[4] ,Pin P2[4] configuration" "Input,Output" bitfld.long 0x04 3. " DR[3] ,Pin P2[3] configuration" "Input,Output" bitfld.long 0x04 2. " DR[2] ,Pin P2[2] configuration" "Input,Output" textline " " bitfld.long 0x04 1. " DR[1] ,Pin P2[1] configuration" "Input,Output" bitfld.long 0x04 0. " DR[0] ,Pin P2[0] configuration" "Input,Output" tree.end tree "Port 3" rgroup.long 0x3000++0x3 line.long 0x00 "PINS,GPIO port 3 input register" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P3[15]" "Low,High" bitfld.long 0x00 14. " PINS[14] ,Input level of pin P3[14]" "Low,High" bitfld.long 0x00 13. " PINS[13] ,Input level of pin P3[13]" "Low,High" textline " " bitfld.long 0x00 12. " PINS[12] ,Input level of pin P3[12]" "Low,High" bitfld.long 0x00 11. " PINS[11] ,Input level of pin P3[11]" "Low,High" bitfld.long 0x00 10. " PINS[10] ,Input level of pin P3[10]" "Low,High" textline " " bitfld.long 0x00 9. " PINS[9] ,Input level of pin P3[9]" "Low,High" bitfld.long 0x00 8. " PINS[8] ,Input level of pin P3[8]" "Low,High" bitfld.long 0x00 7. " PINS[7] ,Input level of pin P3[7]" "Low,High" textline " " bitfld.long 0x00 6. " PINS[6] ,Input level of pin P3[6]" "Low,High" bitfld.long 0x00 5. " PINS[5] ,Input level of pin P3[5]" "Low,High" bitfld.long 0x00 4. " PINS[4] ,Input level of pin P3[4]" "Low,High" textline " " bitfld.long 0x00 3. " PINS[3] ,Input level of pin P3[3]" "Low,High" bitfld.long 0x00 2. " PINS[2] ,Input level of pin P3[2]" "Low,High" bitfld.long 0x00 1. " PINS[1] ,Input level of pin P3[1]" "Low,High" textline " " bitfld.long 0x00 0. " PINS[0] ,Input level of pin P3[0]" "Low,High" group.long 0x3004++0x7 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 15. " OR[15] ,Output level of pin P3[15]" "Low,High" bitfld.long 0x00 14. " OR[14] ,Output level of pin P3[14]" "Low,High" bitfld.long 0x00 13. " OR[13] ,Output level of pin P3[13]" "Low,High" textline " " bitfld.long 0x00 12. " OR[12] ,Output level of pin P3[12]" "Low,High" bitfld.long 0x00 11. " OR[11] ,Output level of pin P3[11]" "Low,High" bitfld.long 0x00 10. " OR[10] ,Output level of pin P3[10]" "Low,High" textline " " bitfld.long 0x00 9. " OR[9] ,Output level of pin P3[9]" "Low,High" bitfld.long 0x00 8. " OR[8] ,Output level of pin P3[8]" "Low,High" bitfld.long 0x00 7. " OR[7] ,Output level of pin P3[7]" "Low,High" textline " " bitfld.long 0x00 6. " OR[6] ,Output level of pin P3[6]" "Low,High" bitfld.long 0x00 5. " OR[5] ,Output level of pin P3[5]" "Low,High" bitfld.long 0x00 4. " OR[4] ,Output level of pin P3[4]" "Low,High" textline " " bitfld.long 0x00 3. " OR[3] ,Output level of pin P3[3]" "Low,High" bitfld.long 0x00 2. " OR[2] ,Output level of pin P3[2]" "Low,High" bitfld.long 0x00 1. " OR[1] ,Output level of pin P3[1]" "Low,High" textline " " bitfld.long 0x00 0. " OR[0] ,Output level of pin P3[0]" "Low,High" line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 15. " DR[15] ,Pin P3[15] configuration" "Input,Output" bitfld.long 0x04 14. " DR[14] ,Pin P3[14] configuration" "Input,Output" bitfld.long 0x04 13. " DR[13] ,Pin P3[13] configuration" "Input,Output" textline " " bitfld.long 0x04 12. " DR[12] ,Pin P3[12] configuration" "Input,Output" bitfld.long 0x04 11. " DR[11] ,Pin P3[11] configuration" "Input,Output" bitfld.long 0x04 10. " DR[10] ,Pin P3[10] configuration" "Input,Output" textline " " bitfld.long 0x04 9. " DR[9] ,Pin P3[9] configuration" "Input,Output" bitfld.long 0x04 8. " DR[8] ,Pin P3[8] configuration" "Input,Output" bitfld.long 0x04 7. " DR[7] ,Pin P3[7] configuration" "Input,Output" textline " " bitfld.long 0x04 6. " DR[6] ,Pin P3[6] configuration" "Input,Output" bitfld.long 0x04 5. " DR[5] ,Pin P3[5] configuration" "Input,Output" bitfld.long 0x04 4. " DR[4] ,Pin P3[4] configuration" "Input,Output" textline " " bitfld.long 0x04 3. " DR[3] ,Pin P3[3] configuration" "Input,Output" bitfld.long 0x04 2. " DR[2] ,Pin P3[2] configuration" "Input,Output" bitfld.long 0x04 1. " DR[1] ,Pin P3[1] configuration" "Input,Output" textline " " bitfld.long 0x04 0. " DR[0] ,Pin P3[0] configuration" "Input,Output" tree.end endif sif (cpuis("LPC293*")) tree "Port 4" rgroup.long 0x4000++0x3 line.long 0x00 "PINS,GPIO port 4 input register" bitfld.long 0x00 23. " PINS[23] ,Input level of pin P4[23]" "Low,High" bitfld.long 0x00 22. " PINS[22] ,Input level of pin P4[22]" "Low,High" bitfld.long 0x00 21. " PINS[21] ,Input level of pin P4[21]" "Low,High" textline " " bitfld.long 0x00 20. " PINS[20] ,Input level of pin P4[20]" "Low,High" bitfld.long 0x00 19. " PINS[19] ,Input level of pin P4[19]" "Low,High" bitfld.long 0x00 18. " PINS[18] ,Input level of pin P4[18]" "Low,High" textline " " bitfld.long 0x00 17. " PINS[17] ,Input level of pin P4[17]" "Low,High" bitfld.long 0x00 16. " PINS[16] ,Input level of pin P4[16]" "Low,High" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P4[15]" "Low,High" textline " " bitfld.long 0x00 14. " PINS[14] ,Input level of pin P4[14]" "Low,High" bitfld.long 0x00 13. " PINS[13] ,Input level of pin P4[13]" "Low,High" bitfld.long 0x00 12. " PINS[12] ,Input level of pin P4[12]" "Low,High" textline " " bitfld.long 0x00 11. " PINS[11] ,Input level of pin P4[11]" "Low,High" bitfld.long 0x00 10. " PINS[10] ,Input level of pin P4[10]" "Low,High" bitfld.long 0x00 9. " PINS[9] ,Input level of pin P4[9]" "Low,High" textline " " bitfld.long 0x00 8. " PINS[8] ,Input level of pin P4[8]" "Low,High" bitfld.long 0x00 7. " PINS[7] ,Input level of pin P4[7]" "Low,High" bitfld.long 0x00 6. " PINS[6] ,Input level of pin P4[6]" "Low,High" textline " " bitfld.long 0x00 5. " PINS[5] ,Input level of pin P4[5]" "Low,High" bitfld.long 0x00 4. " PINS[4] ,Input level of pin P4[4]" "Low,High" bitfld.long 0x00 3. " PINS[3] ,Input level of pin P4[3]" "Low,High" textline " " bitfld.long 0x00 2. " PINS[2] ,Input level of pin P4[2]" "Low,High" bitfld.long 0x00 1. " PINS[1] ,Input level of pin P4[1]" "Low,High" bitfld.long 0x00 0. " PINS[0] ,Input level of pin P4[0]" "Low,High" group.long 0x4004++0x7 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 23. " OR[23] ,Output level of pin P4[23]" "Low,High" bitfld.long 0x00 22. " OR[22] ,Output level of pin P4[22]" "Low,High" bitfld.long 0x00 21. " OR[21] ,Output level of pin P4[21]" "Low,High" textline " " bitfld.long 0x00 20. " OR[20] ,Output level of pin P4[20]" "Low,High" bitfld.long 0x00 19. " OR[19] ,Output level of pin P4[19]" "Low,High" bitfld.long 0x00 18. " OR[18] ,Output level of pin P4[18]" "Low,High" textline " " bitfld.long 0x00 17. " OR[17] ,Output level of pin P4[17]" "Low,High" bitfld.long 0x00 16. " OR[16] ,Output level of pin P4[16]" "Low,High" bitfld.long 0x00 15. " OR[15] ,Output level of pin P4[15]" "Low,High" textline " " bitfld.long 0x00 14. " OR[14] ,Output level of pin P4[14]" "Low,High" bitfld.long 0x00 13. " OR[13] ,Output level of pin P4[13]" "Low,High" bitfld.long 0x00 12. " OR[12] ,Output level of pin P4[12]" "Low,High" textline " " bitfld.long 0x00 11. " OR[11] ,Output level of pin P4[11]" "Low,High" bitfld.long 0x00 10. " OR[10] ,Output level of pin P4[10]" "Low,High" bitfld.long 0x00 9. " OR[9] ,Output level of pin P4[9]" "Low,High" textline " " bitfld.long 0x00 8. " OR[8] ,Output level of pin P4[8]" "Low,High" bitfld.long 0x00 7. " OR[7] ,Output level of pin P4[7]" "Low,High" bitfld.long 0x00 6. " OR[6] ,Output level of pin P4[6]" "Low,High" textline " " bitfld.long 0x00 5. " OR[5] ,Output level of pin P4[5]" "Low,High" bitfld.long 0x00 4. " OR[4] ,Output level of pin P4[4]" "Low,High" bitfld.long 0x00 3. " OR[3] ,Output level of pin P4[3]" "Low,High" textline " " bitfld.long 0x00 2. " OR[2] ,Output level of pin P4[2]" "Low,High" bitfld.long 0x00 1. " OR[1] ,Output level of pin P4[1]" "Low,High" bitfld.long 0x00 0. " OR[0] ,Output level of pin P4[0]" "Low,High" line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 23. " DR[23] ,Pin P4[23] configuration" "Input,Output" bitfld.long 0x04 22. " DR[22] ,Pin P4[22] configuration" "Input,Output" bitfld.long 0x04 21. " DR[21] ,Pin P4[21] configuration" "Input,Output" textline " " bitfld.long 0x04 20. " DR[20] ,Pin P4[20] configuration" "Input,Output" bitfld.long 0x04 19. " DR[19] ,Pin P4[19] configuration" "Input,Output" bitfld.long 0x04 18. " DR[18] ,Pin P4[18] configuration" "Input,Output" textline " " bitfld.long 0x04 17. " DR[17] ,Pin P4[17] configuration" "Input,Output" bitfld.long 0x04 16. " DR[16] ,Pin P4[16] configuration" "Input,Output" bitfld.long 0x04 15. " DR[15] ,Pin P4[15] configuration" "Input,Output" textline " " bitfld.long 0x04 14. " DR[14] ,Pin P4[14] configuration" "Input,Output" bitfld.long 0x04 13. " DR[13] ,Pin P4[13] configuration" "Input,Output" bitfld.long 0x04 12. " DR[12] ,Pin P4[12] configuration" "Input,Output" textline " " bitfld.long 0x04 11. " DR[11] ,Pin P4[11] configuration" "Input,Output" bitfld.long 0x04 10. " DR[10] ,Pin P4[10] configuration" "Input,Output" bitfld.long 0x04 9. " DR[9] ,Pin P4[9] configuration" "Input,Output" textline " " bitfld.long 0x04 8. " DR[8] ,Pin P4[8] configuration" "Input,Output" bitfld.long 0x04 7. " DR[7] ,Pin P4[7] configuration" "Input,Output" bitfld.long 0x04 6. " DR[6] ,Pin P4[6] configuration" "Input,Output" textline " " bitfld.long 0x04 5. " DR[5] ,Pin P4[5] configuration" "Input,Output" bitfld.long 0x04 4. " DR[4] ,Pin P4[4] configuration" "Input,Output" bitfld.long 0x04 3. " DR[3] ,Pin P4[3] configuration" "Input,Output" textline " " bitfld.long 0x04 2. " DR[2] ,Pin P4[2] configuration" "Input,Output" bitfld.long 0x04 1. " DR[1] ,Pin P4[1] configuration" "Input,Output" bitfld.long 0x04 0. " DR[0] ,Pin P4[0] configuration" "Input,Output" tree.end endif sif (cpuis("LPC292*"))||(cpuis("LPC293*")) tree "Port 5" rgroup.long 0x5000++0x3 line.long 0x00 "PINS,GPIO port 5 input register" bitfld.long 0x00 19. " PINS[19] ,Input level of pin P5[19]" "Low,High" bitfld.long 0x00 18. " PINS[18] ,Input level of pin P5[18]" "Low,High" sif (cpuis("LPC293*")) bitfld.long 0x00 17. " PINS[17] ,Input level of pin P5[17]" "Low,High" textline " " bitfld.long 0x00 16. " PINS[16] ,Input level of pin P5[16]" "Low,High" bitfld.long 0x00 15. " PINS[15] ,Input level of pin P5[15]" "Low,High" bitfld.long 0x00 14. " PINS[14] ,Input level of pin P5[14]" "Low,High" textline " " bitfld.long 0x00 13. " PINS[13] ,Input level of pin P5[13]" "Low,High" bitfld.long 0x00 12. " PINS[12] ,Input level of pin P5[12]" "Low,High" bitfld.long 0x00 11. " PINS[11] ,Input level of pin P5[11]" "Low,High" textline " " bitfld.long 0x00 10. " PINS[10] ,Input level of pin P5[10]" "Low,High" bitfld.long 0x00 9. " PINS[9] ,Input level of pin P5[9]" "Low,High" bitfld.long 0x00 8. " PINS[8] ,Input level of pin P5[8]" "Low,High" textline " " bitfld.long 0x00 7. " PINS[7] ,Input level of pin P5[7]" "Low,High" bitfld.long 0x00 6. " PINS[6] ,Input level of pin P5[6]" "Low,High" bitfld.long 0x00 5. " PINS[5] ,Input level of pin P5[5]" "Low,High" textline " " bitfld.long 0x00 4. " PINS[4] ,Input level of pin P5[4]" "Low,High" bitfld.long 0x00 3. " PINS[3] ,Input level of pin P5[3]" "Low,High" bitfld.long 0x00 2. " PINS[2] ,Input level of pin P5[2]" "Low,High" textline " " bitfld.long 0x00 1. " PINS[1] ,Input level of pin P5[1]" "Low,High" bitfld.long 0x00 0. " PINS[0] ,Input level of pin P5[0]" "Low,High" endif group.long 0x5004++0x7 line.long 0x00 "OR,GPIO port output register" bitfld.long 0x00 19. " OR[19] ,Output level of pin P5[19]" "Low,High" bitfld.long 0x00 18. " OR[18] ,Output level of pin P5[18]" "Low,High" sif (cpuis("LPC293*")) bitfld.long 0x00 17. " OR[17] ,Output level of pin P5[17]" "Low,High" textline " " bitfld.long 0x00 16. " OR[16] ,Output level of pin P5[16]" "Low,High" bitfld.long 0x00 15. " OR[15] ,Output level of pin P5[15]" "Low,High" bitfld.long 0x00 14. " OR[14] ,Output level of pin P5[14]" "Low,High" textline " " bitfld.long 0x00 13. " OR[13] ,Output level of pin P5[13]" "Low,High" bitfld.long 0x00 12. " OR[12] ,Output level of pin P5[12]" "Low,High" bitfld.long 0x00 11. " OR[11] ,Output level of pin P5[11]" "Low,High" textline " " bitfld.long 0x00 10. " OR[10] ,Output level of pin P5[10]" "Low,High" bitfld.long 0x00 9. " OR[9] ,Output level of pin P5[9]" "Low,High" bitfld.long 0x00 8. " OR[8] ,Output level of pin P5[8]" "Low,High" textline " " bitfld.long 0x00 7. " OR[7] ,Output level of pin P5[7]" "Low,High" bitfld.long 0x00 6. " OR[6] ,Output level of pin P5[6]" "Low,High" bitfld.long 0x00 5. " OR[5] ,Output level of pin P5[5]" "Low,High" textline " " bitfld.long 0x00 4. " OR[4] ,Output level of pin P5[4]" "Low,High" bitfld.long 0x00 3. " OR[3] ,Output level of pin P5[3]" "Low,High" bitfld.long 0x00 2. " OR[2] ,Output level of pin P5[2]" "Low,High" textline " " bitfld.long 0x00 1. " OR[1] ,Output level of pin P5[1]" "Low,High" bitfld.long 0x00 0. " OR[0] ,Output level of pin P5[0]" "Low,High" endif line.long 0x04 "DR,GPIO port direction register" bitfld.long 0x04 19. " DR[19] ,Pin P5[19] configuration" "Input,Output" bitfld.long 0x04 18. " DR[18] ,Pin P5[18] configuration" "Input,Output" sif (cpuis("LPC293*")) bitfld.long 0x04 17. " DR[17] ,Pin P5[17] configuration" "Input,Output" textline " " bitfld.long 0x04 16. " DR[16] ,Pin P5[16] configuration" "Input,Output" bitfld.long 0x04 15. " DR[15] ,Pin P5[15] configuration" "Input,Output" bitfld.long 0x04 14. " DR[14] ,Pin P5[14] configuration" "Input,Output" textline " " bitfld.long 0x04 13. " DR[13] ,Pin P5[13] configuration" "Input,Output" bitfld.long 0x04 12. " DR[12] ,Pin P5[12] configuration" "Input,Output" bitfld.long 0x04 11. " DR[11] ,Pin P5[11] configuration" "Input,Output" textline " " bitfld.long 0x04 10. " DR[10] ,Pin P5[10] configuration" "Input,Output" bitfld.long 0x04 9. " DR[9] ,Pin P5[9] configuration" "Input,Output" bitfld.long 0x04 8. " DR[8] ,Pin P5[8] configuration" "Input,Output" textline " " bitfld.long 0x04 7. " DR[7] ,Pin P5[7] configuration" "Input,Output" bitfld.long 0x04 6. " DR[6] ,Pin P5[6] configuration" "Input,Output" bitfld.long 0x04 5. " DR[5] ,Pin P5[5] configuration" "Input,Output" textline " " bitfld.long 0x04 4. " DR[4] ,Pin P5[4] configuration" "Input,Output" bitfld.long 0x04 3. " DR[3] ,Pin P5[3] configuration" "Input,Output" bitfld.long 0x04 2. " DR[2] ,Pin P5[2] configuration" "Input,Output" textline " " bitfld.long 0x04 1. " DR[1] ,Pin P5[1] configuration" "Input,Output" bitfld.long 0x04 0. " DR[0] ,Pin P5[0] configuration" "Input,Output" endif tree.end endif width 0xB tree.end tree.open "Timers" base ad:0xE0041000 width 12. tree "Timer 0" group.long 0x0++0x27 line.long 0x00 "TCR,Timer control register" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" line.long 0x04 "TC,Timer counter value" line.long 0x08 "PR,Prescale register" line.long 0x0C "MCR,Match-control register" bitfld.long 0x0C 7. " STOP_3 ,Stop TC on match MR3 and TC" "Counting,Stopped" bitfld.long 0x0C 6. " RESET_3 ,Reset TC on match MR3 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 5. " STOP_2 ,Stop TC on match MR2 and TC" "Counting,Stopped" bitfld.long 0x0C 4. " RESET_2 ,Reset TC on match MR2 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 3. " STOP_1 ,Stop TC on match MR1 and TC" "Counting,Stopped" bitfld.long 0x0C 2. " RESET_1 ,Reset TC on match MR1 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 1. " STOP_0 ,Stop TC on match MR0 and TC" "Counting,Stopped" bitfld.long 0x0C 0. " RESET_0 ,Reset TC on match MR0 and TC" "No reset,Reset" line.long 0x10 "EMR,External-match register" bitfld.long 0x10 10.--11. " CTRL_3 ,External match control 3" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 8.--9. " CTRL_2 ,External match control 2" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 6.--7. " CTRL_1 ,External match control 1" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 4.--5. " CTRL_0 ,External match control 0" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 3. " EMR_3 ,Current value of the Match 3 pin" "Low,High" bitfld.long 0x10 2. " EMR_2 ,Current value of the Match 2 pin" "Low,High" textline " " bitfld.long 0x10 1. " EMR_1 ,Current value of the Match 1 pin" "Low,High" bitfld.long 0x10 0. " EMR_0 ,Current value of the Match 0 pin" "Low,High" line.long 0x14 "MR0,Match register 0" line.long 0x18 "MR1,Match register 1" line.long 0x1C "MR2,Match register 2" line.long 0x20 "MR3,Match register 3" line.long 0x24 "CCR,Capture control register" bitfld.long 0x24 7. " FALL_3 ,Capture on capture input 3 falling" "Disabled,Enabled" bitfld.long 0x24 6. " RISE_3 ,Capture on capture input 3 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " FALL_2 ,Capture on capture input 2 falling" "Disabled,Enabled" bitfld.long 0x24 4. " RISE_2 ,Capture on capture input 2 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " FALL_1 ,Capture on capture input 1 falling" "Disabled,Enabled" bitfld.long 0x24 2. " RISE_1 ,Capture on capture input 1 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " FALL_0 ,Capture on capture input 0 falling" "Disabled,Enabled" bitfld.long 0x24 0. " RISE_0 ,Capture on capture input 0 rising" "Disabled,Enabled" rgroup.long 0x28++0xF line.long 0x00 "CR0,Capture register 0" line.long 0x04 "CR1,Capture register 1" line.long 0x08 "CR2,Capture register 2" line.long 0x0C "CR3,Capture register 3" group.long (0x0+0xFE0)++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " C3_set/clr ,Capture 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " C2_set/clr ,Capture 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " C1_set/clr ,Capture 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " C0_set/clr ,Capture 0 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " M3_set/clr ,Match 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " M2_set/clr ,Match 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " M1_set/clr ,Match 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " M0_set/clr ,Match 0 event" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 7. -0x04 7. -0x08 7. " C3_set/clr ,Capture 3 event" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " C2_set/clr ,Capture 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " C1_set/clr ,Capture 1 event" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " C0_set/clr ,Capture 0 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " M3_set/clr ,Match 3 event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " M2_set/clr ,Match 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " M1_set/clr ,Match 1 event" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " M0_set/clr ,Match 0 event" "Disabled,Enabled" tree.end tree "Timer 1" group.long 0x1000++0x27 line.long 0x00 "TCR,Timer control register" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" line.long 0x04 "TC,Timer counter value" line.long 0x08 "PR,Prescale register" line.long 0x0C "MCR,Match-control register" bitfld.long 0x0C 7. " STOP_3 ,Stop TC on match MR3 and TC" "Counting,Stopped" bitfld.long 0x0C 6. " RESET_3 ,Reset TC on match MR3 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 5. " STOP_2 ,Stop TC on match MR2 and TC" "Counting,Stopped" bitfld.long 0x0C 4. " RESET_2 ,Reset TC on match MR2 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 3. " STOP_1 ,Stop TC on match MR1 and TC" "Counting,Stopped" bitfld.long 0x0C 2. " RESET_1 ,Reset TC on match MR1 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 1. " STOP_0 ,Stop TC on match MR0 and TC" "Counting,Stopped" bitfld.long 0x0C 0. " RESET_0 ,Reset TC on match MR0 and TC" "No reset,Reset" line.long 0x10 "EMR,External-match register" bitfld.long 0x10 10.--11. " CTRL_3 ,External match control 3" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 8.--9. " CTRL_2 ,External match control 2" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 6.--7. " CTRL_1 ,External match control 1" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 4.--5. " CTRL_0 ,External match control 0" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 3. " EMR_3 ,Current value of the Match 3 pin" "Low,High" bitfld.long 0x10 2. " EMR_2 ,Current value of the Match 2 pin" "Low,High" textline " " bitfld.long 0x10 1. " EMR_1 ,Current value of the Match 1 pin" "Low,High" bitfld.long 0x10 0. " EMR_0 ,Current value of the Match 0 pin" "Low,High" line.long 0x14 "MR0,Match register 0" line.long 0x18 "MR1,Match register 1" line.long 0x1C "MR2,Match register 2" line.long 0x20 "MR3,Match register 3" line.long 0x24 "CCR,Capture control register" bitfld.long 0x24 7. " FALL_3 ,Capture on capture input 3 falling" "Disabled,Enabled" bitfld.long 0x24 6. " RISE_3 ,Capture on capture input 3 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " FALL_2 ,Capture on capture input 2 falling" "Disabled,Enabled" bitfld.long 0x24 4. " RISE_2 ,Capture on capture input 2 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " FALL_1 ,Capture on capture input 1 falling" "Disabled,Enabled" bitfld.long 0x24 2. " RISE_1 ,Capture on capture input 1 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " FALL_0 ,Capture on capture input 0 falling" "Disabled,Enabled" bitfld.long 0x24 0. " RISE_0 ,Capture on capture input 0 rising" "Disabled,Enabled" rgroup.long 0x28++0xF line.long 0x00 "CR0,Capture register 0" line.long 0x04 "CR1,Capture register 1" line.long 0x08 "CR2,Capture register 2" line.long 0x0C "CR3,Capture register 3" group.long (0x1000+0xFE0)++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " C3_set/clr ,Capture 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " C2_set/clr ,Capture 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " C1_set/clr ,Capture 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " C0_set/clr ,Capture 0 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " M3_set/clr ,Match 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " M2_set/clr ,Match 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " M1_set/clr ,Match 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " M0_set/clr ,Match 0 event" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 7. -0x04 7. -0x08 7. " C3_set/clr ,Capture 3 event" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " C2_set/clr ,Capture 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " C1_set/clr ,Capture 1 event" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " C0_set/clr ,Capture 0 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " M3_set/clr ,Match 3 event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " M2_set/clr ,Match 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " M1_set/clr ,Match 1 event" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " M0_set/clr ,Match 0 event" "Disabled,Enabled" tree.end tree "Timer 2" group.long 0x2000++0x27 line.long 0x00 "TCR,Timer control register" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" line.long 0x04 "TC,Timer counter value" line.long 0x08 "PR,Prescale register" line.long 0x0C "MCR,Match-control register" bitfld.long 0x0C 7. " STOP_3 ,Stop TC on match MR3 and TC" "Counting,Stopped" bitfld.long 0x0C 6. " RESET_3 ,Reset TC on match MR3 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 5. " STOP_2 ,Stop TC on match MR2 and TC" "Counting,Stopped" bitfld.long 0x0C 4. " RESET_2 ,Reset TC on match MR2 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 3. " STOP_1 ,Stop TC on match MR1 and TC" "Counting,Stopped" bitfld.long 0x0C 2. " RESET_1 ,Reset TC on match MR1 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 1. " STOP_0 ,Stop TC on match MR0 and TC" "Counting,Stopped" bitfld.long 0x0C 0. " RESET_0 ,Reset TC on match MR0 and TC" "No reset,Reset" line.long 0x10 "EMR,External-match register" bitfld.long 0x10 10.--11. " CTRL_3 ,External match control 3" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 8.--9. " CTRL_2 ,External match control 2" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 6.--7. " CTRL_1 ,External match control 1" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 4.--5. " CTRL_0 ,External match control 0" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 3. " EMR_3 ,Current value of the Match 3 pin" "Low,High" bitfld.long 0x10 2. " EMR_2 ,Current value of the Match 2 pin" "Low,High" textline " " bitfld.long 0x10 1. " EMR_1 ,Current value of the Match 1 pin" "Low,High" bitfld.long 0x10 0. " EMR_0 ,Current value of the Match 0 pin" "Low,High" line.long 0x14 "MR0,Match register 0" line.long 0x18 "MR1,Match register 1" line.long 0x1C "MR2,Match register 2" line.long 0x20 "MR3,Match register 3" line.long 0x24 "CCR,Capture control register" bitfld.long 0x24 7. " FALL_3 ,Capture on capture input 3 falling" "Disabled,Enabled" bitfld.long 0x24 6. " RISE_3 ,Capture on capture input 3 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " FALL_2 ,Capture on capture input 2 falling" "Disabled,Enabled" bitfld.long 0x24 4. " RISE_2 ,Capture on capture input 2 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " FALL_1 ,Capture on capture input 1 falling" "Disabled,Enabled" bitfld.long 0x24 2. " RISE_1 ,Capture on capture input 1 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " FALL_0 ,Capture on capture input 0 falling" "Disabled,Enabled" bitfld.long 0x24 0. " RISE_0 ,Capture on capture input 0 rising" "Disabled,Enabled" rgroup.long 0x28++0xF line.long 0x00 "CR0,Capture register 0" line.long 0x04 "CR1,Capture register 1" line.long 0x08 "CR2,Capture register 2" line.long 0x0C "CR3,Capture register 3" group.long (0x2000+0xFE0)++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " C3_set/clr ,Capture 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " C2_set/clr ,Capture 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " C1_set/clr ,Capture 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " C0_set/clr ,Capture 0 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " M3_set/clr ,Match 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " M2_set/clr ,Match 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " M1_set/clr ,Match 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " M0_set/clr ,Match 0 event" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 7. -0x04 7. -0x08 7. " C3_set/clr ,Capture 3 event" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " C2_set/clr ,Capture 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " C1_set/clr ,Capture 1 event" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " C0_set/clr ,Capture 0 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " M3_set/clr ,Match 3 event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " M2_set/clr ,Match 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " M1_set/clr ,Match 1 event" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " M0_set/clr ,Match 0 event" "Disabled,Enabled" tree.end tree "Timer 3" group.long 0x3000++0x27 line.long 0x00 "TCR,Timer control register" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" line.long 0x04 "TC,Timer counter value" line.long 0x08 "PR,Prescale register" line.long 0x0C "MCR,Match-control register" bitfld.long 0x0C 7. " STOP_3 ,Stop TC on match MR3 and TC" "Counting,Stopped" bitfld.long 0x0C 6. " RESET_3 ,Reset TC on match MR3 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 5. " STOP_2 ,Stop TC on match MR2 and TC" "Counting,Stopped" bitfld.long 0x0C 4. " RESET_2 ,Reset TC on match MR2 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 3. " STOP_1 ,Stop TC on match MR1 and TC" "Counting,Stopped" bitfld.long 0x0C 2. " RESET_1 ,Reset TC on match MR1 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 1. " STOP_0 ,Stop TC on match MR0 and TC" "Counting,Stopped" bitfld.long 0x0C 0. " RESET_0 ,Reset TC on match MR0 and TC" "No reset,Reset" line.long 0x10 "EMR,External-match register" bitfld.long 0x10 10.--11. " CTRL_3 ,External match control 3" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 8.--9. " CTRL_2 ,External match control 2" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 6.--7. " CTRL_1 ,External match control 1" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 4.--5. " CTRL_0 ,External match control 0" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 3. " EMR_3 ,Current value of the Match 3 pin" "Low,High" bitfld.long 0x10 2. " EMR_2 ,Current value of the Match 2 pin" "Low,High" textline " " bitfld.long 0x10 1. " EMR_1 ,Current value of the Match 1 pin" "Low,High" bitfld.long 0x10 0. " EMR_0 ,Current value of the Match 0 pin" "Low,High" line.long 0x14 "MR0,Match register 0" line.long 0x18 "MR1,Match register 1" line.long 0x1C "MR2,Match register 2" line.long 0x20 "MR3,Match register 3" line.long 0x24 "CCR,Capture control register" bitfld.long 0x24 7. " FALL_3 ,Capture on capture input 3 falling" "Disabled,Enabled" bitfld.long 0x24 6. " RISE_3 ,Capture on capture input 3 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " FALL_2 ,Capture on capture input 2 falling" "Disabled,Enabled" bitfld.long 0x24 4. " RISE_2 ,Capture on capture input 2 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " FALL_1 ,Capture on capture input 1 falling" "Disabled,Enabled" bitfld.long 0x24 2. " RISE_1 ,Capture on capture input 1 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " FALL_0 ,Capture on capture input 0 falling" "Disabled,Enabled" bitfld.long 0x24 0. " RISE_0 ,Capture on capture input 0 rising" "Disabled,Enabled" rgroup.long 0x28++0xF line.long 0x00 "CR0,Capture register 0" line.long 0x04 "CR1,Capture register 1" line.long 0x08 "CR2,Capture register 2" line.long 0x0C "CR3,Capture register 3" group.long (0x3000+0xFE0)++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " C3_set/clr ,Capture 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " C2_set/clr ,Capture 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " C1_set/clr ,Capture 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " C0_set/clr ,Capture 0 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " M3_set/clr ,Match 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " M2_set/clr ,Match 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " M1_set/clr ,Match 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " M0_set/clr ,Match 0 event" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 7. -0x04 7. -0x08 7. " C3_set/clr ,Capture 3 event" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " C2_set/clr ,Capture 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " C1_set/clr ,Capture 1 event" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " C0_set/clr ,Capture 0 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " M3_set/clr ,Match 3 event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " M2_set/clr ,Match 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " M1_set/clr ,Match 1 event" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " M0_set/clr ,Match 0 event" "Disabled,Enabled" tree.end width 0xB base ad:0xE00C0000 width 12. tree "MSCSS_Timer 0" group.long 0x0++0x27 line.long 0x00 "TCR,Timer control register" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" line.long 0x04 "TC,Timer counter value" line.long 0x08 "PR,Prescale register" line.long 0x0C "MCR,Match-control register" bitfld.long 0x0C 7. " STOP_3 ,Stop TC on match MR3 and TC" "Counting,Stopped" bitfld.long 0x0C 6. " RESET_3 ,Reset TC on match MR3 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 5. " STOP_2 ,Stop TC on match MR2 and TC" "Counting,Stopped" bitfld.long 0x0C 4. " RESET_2 ,Reset TC on match MR2 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 3. " STOP_1 ,Stop TC on match MR1 and TC" "Counting,Stopped" bitfld.long 0x0C 2. " RESET_1 ,Reset TC on match MR1 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 1. " STOP_0 ,Stop TC on match MR0 and TC" "Counting,Stopped" bitfld.long 0x0C 0. " RESET_0 ,Reset TC on match MR0 and TC" "No reset,Reset" line.long 0x10 "EMR,External-match register" bitfld.long 0x10 10.--11. " CTRL_3 ,External match control 3" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 8.--9. " CTRL_2 ,External match control 2" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 6.--7. " CTRL_1 ,External match control 1" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 4.--5. " CTRL_0 ,External match control 0" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 3. " EMR_3 ,Current value of the Match 3 pin" "Low,High" bitfld.long 0x10 2. " EMR_2 ,Current value of the Match 2 pin" "Low,High" textline " " bitfld.long 0x10 1. " EMR_1 ,Current value of the Match 1 pin" "Low,High" bitfld.long 0x10 0. " EMR_0 ,Current value of the Match 0 pin" "Low,High" line.long 0x14 "MR0,Match register 0" line.long 0x18 "MR1,Match register 1" line.long 0x1C "MR2,Match register 2" line.long 0x20 "MR3,Match register 3" line.long 0x24 "CCR,Capture control register" bitfld.long 0x24 7. " FALL_3 ,Capture on capture input 3 falling" "Disabled,Enabled" bitfld.long 0x24 6. " RISE_3 ,Capture on capture input 3 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " FALL_2 ,Capture on capture input 2 falling" "Disabled,Enabled" bitfld.long 0x24 4. " RISE_2 ,Capture on capture input 2 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " FALL_1 ,Capture on capture input 1 falling" "Disabled,Enabled" bitfld.long 0x24 2. " RISE_1 ,Capture on capture input 1 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " FALL_0 ,Capture on capture input 0 falling" "Disabled,Enabled" bitfld.long 0x24 0. " RISE_0 ,Capture on capture input 0 rising" "Disabled,Enabled" rgroup.long 0x28++0xF line.long 0x00 "CR0,Capture register 0" line.long 0x04 "CR1,Capture register 1" line.long 0x08 "CR2,Capture register 2" line.long 0x0C "CR3,Capture register 3" group.long (0x0+0xFE0)++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " C3_set/clr ,Capture 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " C2_set/clr ,Capture 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " C1_set/clr ,Capture 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " C0_set/clr ,Capture 0 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " M3_set/clr ,Match 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " M2_set/clr ,Match 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " M1_set/clr ,Match 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " M0_set/clr ,Match 0 event" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 7. -0x04 7. -0x08 7. " C3_set/clr ,Capture 3 event" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " C2_set/clr ,Capture 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " C1_set/clr ,Capture 1 event" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " C0_set/clr ,Capture 0 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " M3_set/clr ,Match 3 event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " M2_set/clr ,Match 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " M1_set/clr ,Match 1 event" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " M0_set/clr ,Match 0 event" "Disabled,Enabled" tree.end tree "MSCSS_Timer 1" group.long 0x1000++0x27 line.long 0x00 "TCR,Timer control register" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" line.long 0x04 "TC,Timer counter value" line.long 0x08 "PR,Prescale register" line.long 0x0C "MCR,Match-control register" bitfld.long 0x0C 7. " STOP_3 ,Stop TC on match MR3 and TC" "Counting,Stopped" bitfld.long 0x0C 6. " RESET_3 ,Reset TC on match MR3 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 5. " STOP_2 ,Stop TC on match MR2 and TC" "Counting,Stopped" bitfld.long 0x0C 4. " RESET_2 ,Reset TC on match MR2 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 3. " STOP_1 ,Stop TC on match MR1 and TC" "Counting,Stopped" bitfld.long 0x0C 2. " RESET_1 ,Reset TC on match MR1 and TC" "No reset,Reset" textline " " bitfld.long 0x0C 1. " STOP_0 ,Stop TC on match MR0 and TC" "Counting,Stopped" bitfld.long 0x0C 0. " RESET_0 ,Reset TC on match MR0 and TC" "No reset,Reset" line.long 0x10 "EMR,External-match register" bitfld.long 0x10 10.--11. " CTRL_3 ,External match control 3" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 8.--9. " CTRL_2 ,External match control 2" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 6.--7. " CTRL_1 ,External match control 1" "No operation,Logic 0,Logic 1,Toggled" bitfld.long 0x10 4.--5. " CTRL_0 ,External match control 0" "No operation,Logic 0,Logic 1,Toggled" textline " " bitfld.long 0x10 3. " EMR_3 ,Current value of the Match 3 pin" "Low,High" bitfld.long 0x10 2. " EMR_2 ,Current value of the Match 2 pin" "Low,High" textline " " bitfld.long 0x10 1. " EMR_1 ,Current value of the Match 1 pin" "Low,High" bitfld.long 0x10 0. " EMR_0 ,Current value of the Match 0 pin" "Low,High" line.long 0x14 "MR0,Match register 0" line.long 0x18 "MR1,Match register 1" line.long 0x1C "MR2,Match register 2" line.long 0x20 "MR3,Match register 3" line.long 0x24 "CCR,Capture control register" bitfld.long 0x24 7. " FALL_3 ,Capture on capture input 3 falling" "Disabled,Enabled" bitfld.long 0x24 6. " RISE_3 ,Capture on capture input 3 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 5. " FALL_2 ,Capture on capture input 2 falling" "Disabled,Enabled" bitfld.long 0x24 4. " RISE_2 ,Capture on capture input 2 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 3. " FALL_1 ,Capture on capture input 1 falling" "Disabled,Enabled" bitfld.long 0x24 2. " RISE_1 ,Capture on capture input 1 rising" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " FALL_0 ,Capture on capture input 0 falling" "Disabled,Enabled" bitfld.long 0x24 0. " RISE_0 ,Capture on capture input 0 rising" "Disabled,Enabled" rgroup.long 0x28++0xF line.long 0x00 "CR0,Capture register 0" line.long 0x04 "CR1,Capture register 1" line.long 0x08 "CR2,Capture register 2" line.long 0x0C "CR3,Capture register 3" group.long (0x1000+0xFE0)++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " C3_set/clr ,Capture 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " C2_set/clr ,Capture 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " C1_set/clr ,Capture 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " C0_set/clr ,Capture 0 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " M3_set/clr ,Match 3 event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " M2_set/clr ,Match 2 event" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " M1_set/clr ,Match 1 event" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " M0_set/clr ,Match 0 event" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 7. -0x04 7. -0x08 7. " C3_set/clr ,Capture 3 event" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " C2_set/clr ,Capture 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " C1_set/clr ,Capture 1 event" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " C0_set/clr ,Capture 0 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " M3_set/clr ,Match 3 event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " M2_set/clr ,Match 2 event" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " M1_set/clr ,Match 1 event" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " M0_set/clr ,Match 0 event" "Disabled,Enabled" tree.end width 0xB tree.end tree.open "SPI (Serial Peripheral Interface)" tree "SPI 0" base ad:0xE0047000 width 12. if ((d.l(ad:0xE0047000)&0xA)==0xA) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" bitfld.long 0x00 5. " TIMER_TRIGGER ,Timer trigger-block bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLAVE_DISABLE ,Slave-output disable" "No,Yes" bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" elif ((d.l(ad:0xE0047000)&0xA)==0x8) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" bitfld.long 0x00 5. " TIMER_TRIGGER ,Timer trigger-block bit" "Disabled,Disabled" textline " " bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" elif ((d.l(ad:0xE0047000)&0xA)==0x2) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" textline " " bitfld.long 0x00 4. " SLAVE_DISABLE ,Slave-output disable" "No,Yes" bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" else group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" textline " " bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" endif group.long 0x04++0x3 line.long 0x00 "SLV_ENABLE,Slave-enable register" bitfld.long 0x00 6.--7. " SLV_ENABLE_3 ,Slave enable slave 3" "Disabled,Enabled,Reserved,Suspended" bitfld.long 0x00 4.--5. " SLV_ENABLE_2 ,Slave enable slave 2" "Disabled,Enabled,Reserved,Suspended" textline " " bitfld.long 0x00 2.--3. " SLV_ENABLE_1 ,Slave enable slave 1" "Disabled,Enabled,Reserved,Suspended" bitfld.long 0x00 0.--1. " SLV_ENABLE_0 ,Slave enable slave 0" "Disabled,Enabled,Reserved,Suspended" width 18. wgroup.long 0x08++0x3 line.long 0x00 "TX_FIFO_FLUSH,Tx FIFO flush register" bitfld.long 0x00 0. " TX_FIFO_FLUSH ,Flush transmit FIFO" "No effect,Flush" hgroup.long 0x0C++0x3 hide.long 0x00 "FIFO_DATA,FIFO data register" in wgroup.long 0x10++0x3 line.long 0x00 "RX_FIFO_POP,Rx FIFO pop register" bitfld.long 0x00 0. " RX_FIFO_POP ,Pops the first element from the receive FIFO" "Not pop,Pop" group.long 0x14++0x7 line.long 0x00 "RX_FIFO_READMODE,Rx FIFO read-mode selection register" bitfld.long 0x00 0. " RX_FIFO_PROTECT ,Receive-FIFO protect-mode" "Disabled,Enabled" line.long 0x04 "DMA_SETTINGS,DMA settings and enable register" bitfld.long 0x04 5.--7. " TX_DMA_BURST ,Number of free spaces when Tx DMA burst will be requested" "1,4,8,16,32,64,128,256" bitfld.long 0x04 2.--4. " RX_DMA_BURST ,Number of free spaces when Rx DMA burst will be requested" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0x04 1. " TX_DMA_ENABLE ,Tx DMA enable" "Disabled,Enabled" bitfld.long 0x04 0. " RX_DMA-ENABLE ,Rx DMA enable" "Disabled,Enabled" rgroup.long 0x1C++0x3 line.long 0x00 "STATUS,Status register" bitfld.long 0x00 5. " SMS_MODE_BUSY ,Sequential-slave mode busy" "Not busy,Busy" bitfld.long 0x00 4. " SPI_BUSY ,SPI busy" "Idle,Busy" textline " " bitfld.long 0x00 3. " RX_FIFO_FULL ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 2. " RX_FIFO_EMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 1. " TX_FIFO_FULL ,Transmit FIFO full" "Not full,Full" bitfld.long 0x00 0. " TX_FIFO_EMPTY ,Transmit FIFO empty" "Not empty,Empty" if ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x24+0x04))&0x80)==0x80) group.long 0x24++0x3 line.long 0x00 "SLV0_SETTINGS1,Slave-settings register 1 for slave 0" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x24+0x04))&0x80)==0x0) group.long 0x24++0x3 line.long 0x00 "SLV0_SETTINGS1,Slave-settings register 1 for slave 0" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x2)&&((d.l(ad:(0xE0047000+0x24+0x04))&0x80)==0x80) group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x2C+0x04))&0x80)==0x80) group.long 0x2C++0x3 line.long 0x00 "SLV1_SETTINGS1,Slave-settings register 1 for slave 1" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x2C+0x04))&0x80)==0x0) group.long 0x2C++0x3 line.long 0x00 "SLV1_SETTINGS1,Slave-settings register 1 for slave 1" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x2)&&((d.l(ad:(0xE0047000+0x2C+0x04))&0x80)==0x80) group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x34+0x04))&0x80)==0x80) group.long 0x34++0x3 line.long 0x00 "SLV2_SETTINGS1,Slave-settings register 1 for slave 2" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x34+0x04))&0x80)==0x0) group.long 0x34++0x3 line.long 0x00 "SLV2_SETTINGS1,Slave-settings register 1 for slave 2" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x2)&&((d.l(ad:(0xE0047000+0x34+0x04))&0x80)==0x80) group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x3C+0x04))&0x80)==0x80) group.long 0x3C++0x3 line.long 0x00 "SLV3_SETTINGS1,Slave-settings register 1 for slave 3" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x0)&&((d.l(ad:(0xE0047000+0x3C+0x04))&0x80)==0x0) group.long 0x3C++0x3 line.long 0x00 "SLV3_SETTINGS1,Slave-settings register 1 for slave 3" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0047000)&0x2)==0x2)&&((d.l(ad:(0xE0047000+0x3C+0x04))&0x80)==0x80) group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif group.long 0xFD4++0x3 line.long 0x00 "INT_THRESHOLD,Tx/Rx FIFO threshold interrupt levels" hexmask.long.byte 0x00 8.--15. 1. " TX_THRESHOLD ,When number of Tx FIFO elements is less then this value interrupt is requested" hexmask.long.byte 0x00 0.--7. 1. " RX_THRESHOLD ,When number of Rx FIFO elements is greater then this value interrupt is requested" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " SMS_set/clr ,Sequential-slave mode ready" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " TX_set/clr ,Transmit threshold level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " RX_set/clr ,Receive threshold level" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TO_set/clr ,Receive time-out" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " OV_set/clr ,Receive overrun" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " SMS_set/clr ,Sequential-slave mode ready" "Disabled,Enabled" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " TX_set/clr ,Transmit threshold level" "Disabled,Enabled" textline " " setclrfld.long 0x04 2. -0x04 2. -0x08 2. " RX_set/clr ,Receive threshold level" "Disabled,Enabled" setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TO_set/clr ,Receive time-out" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " OV_set/clr ,Receive overrun" "Disabled,Enabled" width 0xb tree.end tree "SPI 1" base ad:0xE0048000 width 12. if ((d.l(ad:0xE0048000)&0xA)==0xA) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" bitfld.long 0x00 5. " TIMER_TRIGGER ,Timer trigger-block bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLAVE_DISABLE ,Slave-output disable" "No,Yes" bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" elif ((d.l(ad:0xE0048000)&0xA)==0x8) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" bitfld.long 0x00 5. " TIMER_TRIGGER ,Timer trigger-block bit" "Disabled,Disabled" textline " " bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" elif ((d.l(ad:0xE0048000)&0xA)==0x2) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" textline " " bitfld.long 0x00 4. " SLAVE_DISABLE ,Slave-output disable" "No,Yes" bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" else group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" textline " " bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" endif group.long 0x04++0x3 line.long 0x00 "SLV_ENABLE,Slave-enable register" bitfld.long 0x00 6.--7. " SLV_ENABLE_3 ,Slave enable slave 3" "Disabled,Enabled,Reserved,Suspended" bitfld.long 0x00 4.--5. " SLV_ENABLE_2 ,Slave enable slave 2" "Disabled,Enabled,Reserved,Suspended" textline " " bitfld.long 0x00 2.--3. " SLV_ENABLE_1 ,Slave enable slave 1" "Disabled,Enabled,Reserved,Suspended" bitfld.long 0x00 0.--1. " SLV_ENABLE_0 ,Slave enable slave 0" "Disabled,Enabled,Reserved,Suspended" width 18. wgroup.long 0x08++0x3 line.long 0x00 "TX_FIFO_FLUSH,Tx FIFO flush register" bitfld.long 0x00 0. " TX_FIFO_FLUSH ,Flush transmit FIFO" "No effect,Flush" hgroup.long 0x0C++0x3 hide.long 0x00 "FIFO_DATA,FIFO data register" in wgroup.long 0x10++0x3 line.long 0x00 "RX_FIFO_POP,Rx FIFO pop register" bitfld.long 0x00 0. " RX_FIFO_POP ,Pops the first element from the receive FIFO" "Not pop,Pop" group.long 0x14++0x7 line.long 0x00 "RX_FIFO_READMODE,Rx FIFO read-mode selection register" bitfld.long 0x00 0. " RX_FIFO_PROTECT ,Receive-FIFO protect-mode" "Disabled,Enabled" line.long 0x04 "DMA_SETTINGS,DMA settings and enable register" bitfld.long 0x04 5.--7. " TX_DMA_BURST ,Number of free spaces when Tx DMA burst will be requested" "1,4,8,16,32,64,128,256" bitfld.long 0x04 2.--4. " RX_DMA_BURST ,Number of free spaces when Rx DMA burst will be requested" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0x04 1. " TX_DMA_ENABLE ,Tx DMA enable" "Disabled,Enabled" bitfld.long 0x04 0. " RX_DMA-ENABLE ,Rx DMA enable" "Disabled,Enabled" rgroup.long 0x1C++0x3 line.long 0x00 "STATUS,Status register" bitfld.long 0x00 5. " SMS_MODE_BUSY ,Sequential-slave mode busy" "Not busy,Busy" bitfld.long 0x00 4. " SPI_BUSY ,SPI busy" "Idle,Busy" textline " " bitfld.long 0x00 3. " RX_FIFO_FULL ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 2. " RX_FIFO_EMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 1. " TX_FIFO_FULL ,Transmit FIFO full" "Not full,Full" bitfld.long 0x00 0. " TX_FIFO_EMPTY ,Transmit FIFO empty" "Not empty,Empty" if ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x24+0x04))&0x80)==0x80) group.long 0x24++0x3 line.long 0x00 "SLV0_SETTINGS1,Slave-settings register 1 for slave 0" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x24+0x04))&0x80)==0x0) group.long 0x24++0x3 line.long 0x00 "SLV0_SETTINGS1,Slave-settings register 1 for slave 0" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x2)&&((d.l(ad:(0xE0048000+0x24+0x04))&0x80)==0x80) group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x2C+0x04))&0x80)==0x80) group.long 0x2C++0x3 line.long 0x00 "SLV1_SETTINGS1,Slave-settings register 1 for slave 1" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x2C+0x04))&0x80)==0x0) group.long 0x2C++0x3 line.long 0x00 "SLV1_SETTINGS1,Slave-settings register 1 for slave 1" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x2)&&((d.l(ad:(0xE0048000+0x2C+0x04))&0x80)==0x80) group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x34+0x04))&0x80)==0x80) group.long 0x34++0x3 line.long 0x00 "SLV2_SETTINGS1,Slave-settings register 1 for slave 2" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x34+0x04))&0x80)==0x0) group.long 0x34++0x3 line.long 0x00 "SLV2_SETTINGS1,Slave-settings register 1 for slave 2" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x2)&&((d.l(ad:(0xE0048000+0x34+0x04))&0x80)==0x80) group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x3C+0x04))&0x80)==0x80) group.long 0x3C++0x3 line.long 0x00 "SLV3_SETTINGS1,Slave-settings register 1 for slave 3" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x0)&&((d.l(ad:(0xE0048000+0x3C+0x04))&0x80)==0x0) group.long 0x3C++0x3 line.long 0x00 "SLV3_SETTINGS1,Slave-settings register 1 for slave 3" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0048000)&0x2)==0x2)&&((d.l(ad:(0xE0048000+0x3C+0x04))&0x80)==0x80) group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif group.long 0xFD4++0x3 line.long 0x00 "INT_THRESHOLD,Tx/Rx FIFO threshold interrupt levels" hexmask.long.byte 0x00 8.--15. 1. " TX_THRESHOLD ,When number of Tx FIFO elements is less then this value interrupt is requested" hexmask.long.byte 0x00 0.--7. 1. " RX_THRESHOLD ,When number of Rx FIFO elements is greater then this value interrupt is requested" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " SMS_set/clr ,Sequential-slave mode ready" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " TX_set/clr ,Transmit threshold level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " RX_set/clr ,Receive threshold level" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TO_set/clr ,Receive time-out" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " OV_set/clr ,Receive overrun" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " SMS_set/clr ,Sequential-slave mode ready" "Disabled,Enabled" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " TX_set/clr ,Transmit threshold level" "Disabled,Enabled" textline " " setclrfld.long 0x04 2. -0x04 2. -0x08 2. " RX_set/clr ,Receive threshold level" "Disabled,Enabled" setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TO_set/clr ,Receive time-out" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " OV_set/clr ,Receive overrun" "Disabled,Enabled" width 0xb tree.end tree "SPI 2" base ad:0xE0049000 width 12. if ((d.l(ad:0xE0049000)&0xA)==0xA) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" bitfld.long 0x00 5. " TIMER_TRIGGER ,Timer trigger-block bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " SLAVE_DISABLE ,Slave-output disable" "No,Yes" bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" elif ((d.l(ad:0xE0049000)&0xA)==0x8) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" bitfld.long 0x00 5. " TIMER_TRIGGER ,Timer trigger-block bit" "Disabled,Disabled" textline " " bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" elif ((d.l(ad:0xE0049000)&0xA)==0x2) group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" textline " " bitfld.long 0x00 4. " SLAVE_DISABLE ,Slave-output disable" "No,Yes" bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" else group.long 0x00++0x3 line.long 0x00 "SPI_CONFIG,Configuration register" hexmask.long.word 0x00 16.--31. 1. " INTER_SLAVE_DLY ,The minimum delay between two transfers to different slaves (value 1 is minimum)" bitfld.long 0x00 7. " UPDATE_ENABLE ,Update enable bit (usage of the value in the SLV_ENABLE)" "Presently,Waiting" textline " " bitfld.long 0x00 6. " SOFTWARE_RESET ,Software reset bit" "No effect,Reset" textline " " bitfld.long 0x00 3. " TRANSMIT_MODE ,Transmit mode" "Normal,Sequential-slave" textline " " bitfld.long 0x00 2. " LOOPBACK_MODE ,Loopback-mode bit" "Normal,Looped-back" bitfld.long 0x00 1. " MS_MODE ,Master/slave mode" "Master,Slave" textline " " bitfld.long 0x00 0. " SPI_ENABLE ,SPI enable bit" "Disabled,Enabled" endif group.long 0x04++0x3 line.long 0x00 "SLV_ENABLE,Slave-enable register" bitfld.long 0x00 6.--7. " SLV_ENABLE_3 ,Slave enable slave 3" "Disabled,Enabled,Reserved,Suspended" bitfld.long 0x00 4.--5. " SLV_ENABLE_2 ,Slave enable slave 2" "Disabled,Enabled,Reserved,Suspended" textline " " bitfld.long 0x00 2.--3. " SLV_ENABLE_1 ,Slave enable slave 1" "Disabled,Enabled,Reserved,Suspended" bitfld.long 0x00 0.--1. " SLV_ENABLE_0 ,Slave enable slave 0" "Disabled,Enabled,Reserved,Suspended" width 18. wgroup.long 0x08++0x3 line.long 0x00 "TX_FIFO_FLUSH,Tx FIFO flush register" bitfld.long 0x00 0. " TX_FIFO_FLUSH ,Flush transmit FIFO" "No effect,Flush" hgroup.long 0x0C++0x3 hide.long 0x00 "FIFO_DATA,FIFO data register" in wgroup.long 0x10++0x3 line.long 0x00 "RX_FIFO_POP,Rx FIFO pop register" bitfld.long 0x00 0. " RX_FIFO_POP ,Pops the first element from the receive FIFO" "Not pop,Pop" group.long 0x14++0x7 line.long 0x00 "RX_FIFO_READMODE,Rx FIFO read-mode selection register" bitfld.long 0x00 0. " RX_FIFO_PROTECT ,Receive-FIFO protect-mode" "Disabled,Enabled" line.long 0x04 "DMA_SETTINGS,DMA settings and enable register" bitfld.long 0x04 5.--7. " TX_DMA_BURST ,Number of free spaces when Tx DMA burst will be requested" "1,4,8,16,32,64,128,256" bitfld.long 0x04 2.--4. " RX_DMA_BURST ,Number of free spaces when Rx DMA burst will be requested" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0x04 1. " TX_DMA_ENABLE ,Tx DMA enable" "Disabled,Enabled" bitfld.long 0x04 0. " RX_DMA-ENABLE ,Rx DMA enable" "Disabled,Enabled" rgroup.long 0x1C++0x3 line.long 0x00 "STATUS,Status register" bitfld.long 0x00 5. " SMS_MODE_BUSY ,Sequential-slave mode busy" "Not busy,Busy" bitfld.long 0x00 4. " SPI_BUSY ,SPI busy" "Idle,Busy" textline " " bitfld.long 0x00 3. " RX_FIFO_FULL ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 2. " RX_FIFO_EMPTY ,Receive FIFO empty" "Not empty,Empty" textline " " bitfld.long 0x00 1. " TX_FIFO_FULL ,Transmit FIFO full" "Not full,Full" bitfld.long 0x00 0. " TX_FIFO_EMPTY ,Transmit FIFO empty" "Not empty,Empty" if ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x24+0x04))&0x80)==0x80) group.long 0x24++0x3 line.long 0x00 "SLV0_SETTINGS1,Slave-settings register 1 for slave 0" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x24+0x04))&0x80)==0x0) group.long 0x24++0x3 line.long 0x00 "SLV0_SETTINGS1,Slave-settings register 1 for slave 0" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x2)&&((d.l(ad:(0xE0049000+0x24+0x04))&0x80)==0x80) group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x24+0x04)++0x3 line.long 0x00 "SLV0_SETTINGS2,Slave-settings register 2 for slave 0" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x2C+0x04))&0x80)==0x80) group.long 0x2C++0x3 line.long 0x00 "SLV1_SETTINGS1,Slave-settings register 1 for slave 1" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x2C+0x04))&0x80)==0x0) group.long 0x2C++0x3 line.long 0x00 "SLV1_SETTINGS1,Slave-settings register 1 for slave 1" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x2)&&((d.l(ad:(0xE0049000+0x2C+0x04))&0x80)==0x80) group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x2C+0x04)++0x3 line.long 0x00 "SLV1_SETTINGS2,Slave-settings register 2 for slave 1" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x34+0x04))&0x80)==0x80) group.long 0x34++0x3 line.long 0x00 "SLV2_SETTINGS1,Slave-settings register 1 for slave 2" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x34+0x04))&0x80)==0x0) group.long 0x34++0x3 line.long 0x00 "SLV2_SETTINGS1,Slave-settings register 1 for slave 2" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x2)&&((d.l(ad:(0xE0049000+0x34+0x04))&0x80)==0x80) group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x34+0x04)++0x3 line.long 0x00 "SLV2_SETTINGS2,Slave-settings register 2 for slave 2" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif if ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x3C+0x04))&0x80)==0x80) group.long 0x3C++0x3 line.long 0x00 "SLV3_SETTINGS1,Slave-settings register 1 for slave 3" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x0)&&((d.l(ad:(0xE0049000+0x3C+0x04))&0x80)==0x0) group.long 0x3C++0x3 line.long 0x00 "SLV3_SETTINGS1,Slave-settings register 1 for slave 3" hexmask.long.byte 0x00 24.--31. 1. " INTER_TRANSFER_DLY ,The delay between transfers to this slave" hexmask.long.byte 0x00 16.--23. 1. " NUMBER_WORDS ,Number of words to send in sequential slave mode (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " CLK_DIVISOR2 ,Serial clock-rate divisor 2 (2-254)" hexmask.long.byte 0x00 0.--7. 1. " CLK_DIVISOR1 ,Serial clock-rate divisor 1 (0-255)" group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" hexmask.long.byte 0x00 9.--16. 1. " PRE_POST_CS_DLY ,Programmable delay that occurs twice in a transfer" bitfld.long 0x00 8. " CS_VALUE ,Chip-select value between back-to-back transfers selection" "Low,High" textline " " bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." elif ((d.l(ad:0xE0049000)&0x2)==0x2)&&((d.l(ad:(0xE0049000+0x3C+0x04))&0x80)==0x80) group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,4 bits,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." else group.long (0x3C+0x04)++0x3 line.long 0x00 "SLV3_SETTINGS2,Slave-settings register 2 for slave 3" bitfld.long 0x00 7. " TRANSFER_FORMAT ,Format of transfer" "Motorola SPI,Texas Sync serial" bitfld.long 0x00 6. " SPO ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 5. " SPH ,Serial clock phase" "First edge,Second edge" bitfld.long 0x00 0.--4. " WORDSIZE ,Word size of transfers to this slave" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8 bits,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16 bits,?..." endif group.long 0xFD4++0x3 line.long 0x00 "INT_THRESHOLD,Tx/Rx FIFO threshold interrupt levels" hexmask.long.byte 0x00 8.--15. 1. " TX_THRESHOLD ,When number of Tx FIFO elements is less then this value interrupt is requested" hexmask.long.byte 0x00 0.--7. 1. " RX_THRESHOLD ,When number of Rx FIFO elements is greater then this value interrupt is requested" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " SMS_set/clr ,Sequential-slave mode ready" "No interrupt,Interrupt" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " TX_set/clr ,Transmit threshold level" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " RX_set/clr ,Receive threshold level" "No interrupt,Interrupt" setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TO_set/clr ,Receive time-out" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " OV_set/clr ,Receive overrun" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " SMS_set/clr ,Sequential-slave mode ready" "Disabled,Enabled" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " TX_set/clr ,Transmit threshold level" "Disabled,Enabled" textline " " setclrfld.long 0x04 2. -0x04 2. -0x08 2. " RX_set/clr ,Receive threshold level" "Disabled,Enabled" setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TO_set/clr ,Receive time-out" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " OV_set/clr ,Receive overrun" "Disabled,Enabled" width 0xb tree.end tree.end tree.open "UART (Universal Asynchronous Receiver/Transmitter)" tree "UART 0" base ad:0xE0045000 width 11. if (((data.byte(ad:(0xE0045000+0xC)))&0x80)==0x00) hgroup.byte 0x00++0x00 hide.byte 0x00 "U0RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U0IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.byte 0x00++0x00 line.byte 0x00 "U0DLL,Divisor Latch LSB" group.byte 0x04++0x00 line.byte 0x00 "U0DLM,Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U0IIR,Interrupt ID" in wgroup.byte 0x08++0x00 line.byte 0x00 "U0FCR,FIFO Control Register" bitfld.byte 0x00 6.--7. " RxTrigLvl ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" bitfld.byte 0x0 3. " DMAMode ,DMA Mode Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " TxFIFORes ,Transmitter FIFO Reset" "No reset,Reset" bitfld.byte 0x0 1. " RxFIFORes ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.byte 0x00 0. " FIFOEnable ,FIFO Enable" "Disabled,Enabled" if ((data.byte(ad:(0xE0045000+0xC))&0x03)==0x00) group.byte 0x0C++0x00 line.byte 0x00 "U0LCR,Line Control Register" bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled" textline " " bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick" bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.byte 0x0C++0x00 line.byte 0x00 "U0LCR,Line Control Register" bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled" textline " " bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick" bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif sif (cpuis("LPC293*")) group.byte 0x10++0x0 line.byte 0x00 "U0MCR,Modem Control Register" bitfld.byte 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.byte 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.byte 0x00 3. " OUT2CTRL ,Inverse control for the U0OUT2 pin" "Not inverted,Inverted" textline " " bitfld.byte 0x00 2. " OUT1CTRL ,Inverse control for the U0OUT1 pin" "Not inverted,Inverted" bitfld.byte 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.byte 0x00 0. " DTRCTRL ,Source for modem output pin, DTR" "Low,High" endif hgroup.byte 0x14++0x00 hide.byte 0x00 "U0LSR,Line Status Register" in sif (cpuis("LPC293*")) hgroup.byte 0x18++0x00 hide.byte 0x00 "U0MSR,Modern Status Register" in endif group.byte 0x1C++0x00 line.byte 0x00 "U0SCR,Scratch Pad Register" group.long 0x20++0x03 line.long 0x00 "U0ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " Mode ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " Start ,Auto-baud Start" "Stopped,Started" group.long 0x28++0x003 line.long 0x00 "U0FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." group.byte 0x30++0x00 line.byte 0x00 "U0TER,Transmit Enable Register" bitfld.byte 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" sif (cpu()!="LPC2917"&&cpu()!="LPC2919") width 18. group.long 0x4C++0x3 line.long 0x00 "U0RS485CTRL,RS485 Control register" bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.byte 0x50++0x0 line.byte 0x00 "U0RS485ADRMATCH,RS485 Address Match register" endif sif (cpuis("LPC293*")) group.byte 0x54++0x0 line.byte 0x00 "U0RS485DLY,Direction control (RTS or DTR) delay value" endif width 0xB tree.end tree "UART 1" base ad:0xE0046000 width 11. if (((data.byte(ad:(0xE0046000+0xC)))&0x80)==0x00) hgroup.byte 0x00++0x00 hide.byte 0x00 "U1RBR/THR,Receiver/Transmit Buffer Register" in group.long 0x04++0x03 line.long 0x00 "U1IER,Interrupt Enable Register" bitfld.long 0x00 9. " ABTOIntEn ,Auto-baud Time-out Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " ABEOIntEn ,End of Auto-baud Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RXLSIE ,Rx Line Status Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " THREIE ,THRE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RBRIE ,RBR Interrupt Enable" "Disabled,Enabled" else group.byte 0x00++0x00 line.byte 0x00 "U1DLL,Divisor Latch LSB" group.byte 0x04++0x00 line.byte 0x00 "U1DLM,Divisor Latch MSB" endif hgroup.long 0x08++0x03 hide.long 0x00 "U1IIR,Interrupt ID" in wgroup.byte 0x08++0x00 line.byte 0x00 "U1FCR,FIFO Control Register" bitfld.byte 0x00 6.--7. " RxTrigLvl ,Rx Trigger Level Select" "Level 0(1 char.),Level 1(4 char.),Level 2(8 char.),Level 3(14 char.)" bitfld.byte 0x0 3. " DMAMode ,DMA Mode Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " TxFIFORes ,Transmitter FIFO Reset" "No reset,Reset" bitfld.byte 0x0 1. " RxFIFORes ,Receiver FIFO Reset" "No reset,Reset" textline " " bitfld.byte 0x00 0. " FIFOEnable ,FIFO Enable" "Disabled,Enabled" if ((data.byte(ad:(0xE0046000+0xC))&0x03)==0x00) group.byte 0x0C++0x00 line.byte 0x00 "U1LCR,Line Control Register" bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled" textline " " bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick" bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,1.5 bits" bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" else group.byte 0x0C++0x00 line.byte 0x00 "U1LCR,Line Control Register" bitfld.byte 0x00 7. " DLAB ,Divisor Latch Access Bit" "Disabled,Enabled" bitfld.byte 0x00 6. " BreakControl ,Break Control" "Disabled,Enabled" textline " " bitfld.byte 0x00 4.--5. " ParitySelect ,Parity Select" "Odd,Even,1 stick,0 stick" bitfld.byte 0x00 3. " ParityEnable ,Parity Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " SBS ,Stop Bit Select" "1 bit,2 bits" bitfld.byte 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" endif sif (cpuis("LPC293*")) group.byte 0x10++0x0 line.byte 0x00 "U1MCR,Modem Control Register" bitfld.byte 0x00 7. " CTSEN ,Auto-cts flow control" "Disabled,Enabled" bitfld.byte 0x00 6. " RTSEN ,Auto-rts flow" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " LOOPMODE ,Modem loopback mode select" "Disabled,Enabled" bitfld.byte 0x00 3. " OUT2CTRL ,Inverse control for the U1OUT2 pin" "Not inverted,Inverted" textline " " bitfld.byte 0x00 2. " OUT1CTRL ,Inverse control for the U1OUT1 pin" "Not inverted,Inverted" bitfld.byte 0x00 1. " RTSCTRL ,Source for modem output pin RTS" "Low,High" textline " " bitfld.byte 0x00 0. " DTRCTRL ,Source for modem output pin, DTR" "Low,High" endif hgroup.byte 0x14++0x00 hide.byte 0x00 "U1LSR,Line Status Register" in sif (cpuis("LPC293*")) hgroup.byte 0x18++0x00 hide.byte 0x00 "U1MSR,Modern Status Register" in endif group.byte 0x1C++0x00 line.byte 0x00 "U1SCR,Scratch Pad Register" group.long 0x20++0x03 line.long 0x00 "U1ACR,Auto-baud Control Register" bitfld.long 0x00 9. " ABTOIntClr ,Auto-baud Time-out Interrupt Clear Bit" "No effect,Cleared" bitfld.long 0x00 8. " ABEOIntClr ,End of Auto-baud Interrupt Clear Bit" "No effect,Cleared" textline " " bitfld.long 0x00 2. " AutoRestart ,Auto Restart" "Not restarted,Restarted" bitfld.long 0x00 1. " Mode ,Auto-baud Mode Select" "Mode 0,Mode 1" textline " " bitfld.long 0x00 0. " Start ,Auto-baud Start" "Stopped,Started" group.long 0x28++0x003 line.long 0x00 "U1FDR,Fractional Divider Register" bitfld.long 0x00 4.--7. " MULVAL , Pre-scaler Multiplier Value" "Reserved,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." bitfld.long 0x00 0.--3. " DIVADDVAL , Pre-scaler Divisor Value" "No effect,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." group.byte 0x30++0x00 line.byte 0x00 "U1TER,Transmit Enable Register" bitfld.byte 0x00 7. " TXEN ,Transmission Enable" "Disabled,Enabled" sif (cpu()!="LPC2917"&&cpu()!="LPC2919") width 18. group.long 0x4C++0x3 line.long 0x00 "U1RS485CTRL,RS485 Control register" bitfld.long 0x00 2. " AADEN ,Auto Address Detect" "Disabled,Enabled" bitfld.long 0x00 1. " RXDIS ,The receiver disable" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " NMMEN ,Normal Multidrop Mode" "Disabled,Enabled" group.byte 0x50++0x0 line.byte 0x00 "U1RS485ADRMATCH,RS485 Address Match register" endif sif (cpuis("LPC293*")) group.byte 0x54++0x0 line.byte 0x00 "U1RS485DLY,Direction control (RTS or DTR) delay value" endif width 0xB tree.end tree.end tree "WDT (WatchDog Timer)" base ad:0xE0040000 width 16. group.long 0x00++0x3 line.long 0x00 "WTCR,Timer control register" hexmask.long 0x00 3.--31. 1. " WD_KEY ,Protection key" bitfld.long 0x00 2. " PAUSE_ENABLE ,Enables the pause feature of the Watchdog timer" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " COUNTER_RESET ,Reset timer and prescale counter" "No effect,Reset" bitfld.long 0x00 0. " COUNTER_ENABLE ,Enable timer and prescale counter" "Disabled,Enabled" rgroup.long 0x04++0x3 line.long 0x00 "TC,Timer counter value" group.long 0x08++0x3 line.long 0x00 "PR,Prescale register" group.long 0x38++0xB line.long 0x00 "WD_KEY_VAL,Watchdog timer key register" line.long 0x04 "WD_TIMEOUT_VAL,Watchdog time-out register" line.long 0x08 "WD_DEBUG,Watchdog debug register" hexmask.long 0x08 1.--31. 1. " WD_KEY ,Protection key" textline " " bitfld.long 0x08 0. " WD_RST_DIS ,Disables generation of a reset on Watchdog time-out" "No,Yes" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " WD_set/clr ,Watchdog timer" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 8. -0x04 8. -0x08 8. " WD_set/clr ,Watchdog timert" "Disabled,Enabled" width 0xB tree.end tree.open "CAN (Controller Area Network)" base ad:0xE0080000 base ad:0xE0080000 tree "CAN0" width 0xA group.long 0x00++0x03 line.long 0x00 "CCMODE0,CAN0 controller mode register" bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "LOW,HIGH" bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN ID,Tx Priority" textline " " bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RM ,Reset Mode" "No reset,Reset" wgroup.long 0x04++0x03 line.long 0x00 "CCCMD0,CAN0 controller command register" bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected" bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected" textline " " bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected" bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared" bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released" textline " " bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted" bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested" group.long 0x08++0x03 line.long 0x00 "CCGS0,CAN0 controller global status register" hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value" hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value" textline " " bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Bus-Off" bitfld.long 0x00 6. " ES ,Error Status" "No error,Error" textline " " bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy" bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready" hgroup.long 0x0C++0x03 hide.long 0x00 "CCIC0,CAN0 controller interrupt and capture register" in group.long 0x10++0x3 line.long 0x00 "CCIE0,CAN0 controller interrupt-enable register" bitfld.long 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled" bitfld.long 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " EWIE ,Error Warning Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled" bitfld.long 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "CCBT0,CAN0 controller bus timing register" bitfld.long 0x00 23. " SAM ,Bus Sampling" "Once,3 times" bitfld.long 0x00 20.--22. " TESG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 16.--19. " TESG1 ,Delay from the nominal Sync point to the sample point" "1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16." bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4" textline " " hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler" group.long 0x18++0x03 line.long 0x00 "CCEWL0,CAN0 controller error-warning limit register" hexmask.long.byte 0x00 0.--7. 1. " EWL ,Error warning limit" rgroup.long 0x1C++0x03 line.long 0x00 "CCSTAT0,CAN0 controller status register" bitfld.long 0x00 23. " BS3 ,Bus Status 3" "Normal,Bus-Off" bitfld.long 0x00 22. " ES3 ,Error Status 3" "No error,Error" textline " " bitfld.long 0x00 21. " TS3 ,Transmit status 3" "Not busy,Busy" bitfld.long 0x00 20. " RS3 ,Receive Status 3" "Not busy,Busy" textline " " bitfld.long 0x00 19. " TCS3 ,Transmission complete status 3" "Not completed,Completed" bitfld.long 0x00 18. " TBS3 ,Transmit buffer status 3" "Not ready,Ready" textline " " bitfld.long 0x00 17. " DOS3 ,Data Overrun Status 3" "Not occurred,Occurred" bitfld.long 0x00 16. " RBS3 ,Receive Buffer Status 3" "Not ready,Ready" textline " " bitfld.long 0x00 15. " BS2 ,Bus Status 2" "Normal,Bus-Off" bitfld.long 0x00 14. " ES2 ,Error Status 2" "No error,Error" textline " " bitfld.long 0x00 13. " TS2 ,Transmit status 2" "Not busy,Busy" bitfld.long 0x00 12. " RS2 ,Receive Status 2" "Not busy,Busy" textline " " bitfld.long 0x00 11. " TCS2 ,Transmission complete status 2" "Not completed,Completed" bitfld.long 0x00 10. " TBS2 ,Transmit buffer status 2" "Not ready,Ready" textline " " bitfld.long 0x00 9. " DOS2 ,Data Overrun Status 2" "Not occurred,Occurred" bitfld.long 0x00 8. " RBS2 ,Receive Buffer Status 2" "Not ready,Ready" textline " " bitfld.long 0x00 7. " BS1 ,Bus Status 1" "Normal,Bus-Off" bitfld.long 0x00 6. " ES1 ,Error Status 1" "No error,Error" textline " " bitfld.long 0x00 5. " TS1 ,Transmit status 1" "Not busy,Busy" bitfld.long 0x00 4. " RS1 ,Receive Status 1" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS1 ,Transmission complete status 1" "Not completed,Completed" bitfld.long 0x00 2. " TBS1 ,Transmit buffer status 1" "Not ready,Ready" textline " " bitfld.long 0x00 1. " DOS1 ,Data Overrun Status 1" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS1 ,Receive Buffer Status 1" "Not ready,Ready" group.long 0x20++0x03 line.long 0x00 "CCRXBMI0,CAN0 controller receive-buffer message info register" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" bitfld.long 0x00 10. " BP ,Bypass mode" "Not AF Bypass,AF Bypass" textline " " hexmask.long.word 0x00 0.--9. 1. " IDI ,Identifier index (zero-based number of the Lookup Table RAM entry)" if (((data.long(ad:(0xE0080000+0x20)))&0x80000000)==0x00000000) rgroup.long 0x24++0x03 line.long 0x00 "CCRXBID0,CAN0 controller receive buffer identifier register" hexmask.long.word 0x00 0.--10. 1. " ID ,Identifier of the received CAN message" else rgroup.long 0x24++0x03 line.long 0x00 "CCRXBID0,CAN0 controller receive buffer identifier register" hexmask.long 0x00 0.--28. 1. " ID ,Identifier of the received CAN message" endif group.long 0x28++0x07 line.long 0x00 "CCRXBDB0,CAN0 controller receive buffer data A register" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the received message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the received message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the received message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the received message" line.long 0x04 "CCRXBDB0,CAN0 controller receive-buffer data B register" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the received message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the received message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the received message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the received message" group.long 0x30++0x03 line.long 0x00 "CCTXB1MI0,CAN0 controller transmit-buffer 1 message info registers" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " TXPRIO ,Transmit priority" if (((data.long(ad:(0xE0080000+0x30)))&0x80000000)==0x00000000) group.long (0x30+0x4)++0x03 line.long 0x00 "CCTXB1ID0,CAN0 controller transmit-buffer 1 identifier registers" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long (0x30+0x4)++0x03 line.long 0x00 "CCTXB1ID0,CAN0 controller transmit-buffer 1 identifier registers" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long (0x30+0x8)++0x07 line.long 0x00 "CCTXB1DA0,CAN0 controller transmit-buffer 1 data A registers" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the transmit message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the transmit message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the transmit message" line.long 0x04 "CCTXB1DB0,CAN0 controller transmit-buffer 1 data B registers" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the transmit message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the transmit message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the transmit message" group.long 0x40++0x03 line.long 0x00 "CCTXB2MI0,CAN0 controller transmit-buffer 2 message info registers" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " TXPRIO ,Transmit priority" if (((data.long(ad:(0xE0080000+0x40)))&0x80000000)==0x00000000) group.long (0x40+0x4)++0x03 line.long 0x00 "CCTXB2ID0,CAN0 controller transmit-buffer 2 identifier registers" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long (0x40+0x4)++0x03 line.long 0x00 "CCTXB2ID0,CAN0 controller transmit-buffer 2 identifier registers" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long (0x40+0x8)++0x07 line.long 0x00 "CCTXB2DA0,CAN0 controller transmit-buffer 2 data A registers" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the transmit message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the transmit message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the transmit message" line.long 0x04 "CCTXB2DB0,CAN0 controller transmit-buffer 2 data B registers" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the transmit message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the transmit message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the transmit message" group.long 0x50++0x03 line.long 0x00 "CCTXB3MI0,CAN0 controller transmit-buffer 3 message info registers" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " TXPRIO ,Transmit priority" if (((data.long(ad:(0xE0080000+0x50)))&0x80000000)==0x00000000) group.long (0x50+0x4)++0x03 line.long 0x00 "CCTXB3ID0,CAN0 controller transmit-buffer 3 identifier registers" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long (0x50+0x4)++0x03 line.long 0x00 "CCTXB3ID0,CAN0 controller transmit-buffer 3 identifier registers" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long (0x50+0x8)++0x07 line.long 0x00 "CCTXB3DA0,CAN0 controller transmit-buffer 3 data A registers" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the transmit message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the transmit message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the transmit message" line.long 0x04 "CCTXB3DB0,CAN0 controller transmit-buffer 3 data B registers" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the transmit message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the transmit message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the transmit message" width 0x0B tree.end base ad:0xE0081000 tree "CAN1" width 0xA group.long 0x00++0x03 line.long 0x00 "CCMODE1,CAN1 controller mode register" bitfld.long 0x00 5. " RPM ,Reverse Polarity Mode" "LOW,HIGH" bitfld.long 0x00 3. " TPM ,Transmit Priority Mode" "CAN ID,Tx Priority" textline " " bitfld.long 0x00 2. " STM ,Self Test Mode" "Disabled,Enabled" bitfld.long 0x00 1. " LOM ,Listen Only Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RM ,Reset Mode" "No reset,Reset" wgroup.long 0x04++0x03 line.long 0x00 "CCCMD1,CAN1 controller command register" bitfld.long 0x00 7. " STB3 ,Select Tx Buffer 3 for transmission" "Not selected,Selected" bitfld.long 0x00 6. " STB2 ,Select Tx Buffer 2 for transmission" "Not selected,Selected" textline " " bitfld.long 0x00 5. " STB1 ,Select Tx Buffer 1 for transmission" "Not selected,Selected" bitfld.long 0x00 4. " SRR ,Self Reception Request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " CDO ,Clear Data Overrun" "Not cleared,Cleared" bitfld.long 0x00 2. " RRB ,Release Receive Buffer" "Not released,Released" textline " " bitfld.long 0x00 1. " AT ,Abort Transmission" "Not aborted,Aborted" bitfld.long 0x00 0. " TR ,Transmission Request" "Not requested,Requested" group.long 0x08++0x03 line.long 0x00 "CCGS1,CAN1 controller global status register" hexmask.long.byte 0x00 24.--31. 1. " TXERR ,Tx Error Counter Value" hexmask.long.byte 0x00 16.--23. 1. " RXERR ,Rx Error Counter Value" textline " " bitfld.long 0x00 7. " BS ,Bus Status" "Normal,Bus-Off" bitfld.long 0x00 6. " ES ,Error Status" "No error,Error" textline " " bitfld.long 0x00 5. " TS ,Transmit Status" "Not busy,Busy" bitfld.long 0x00 4. " RS ,Receive Status" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS ,Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 2. " TBS ,Transmit Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x00 1. " DOS ,Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS ,Receive Buffer Status" "Not ready,Ready" hgroup.long 0x0C++0x03 hide.long 0x00 "CCIC1,CAN1 controller interrupt and capture register" in group.long 0x10++0x3 line.long 0x00 "CCIE1,CAN1 controller interrupt-enable register" bitfld.long 0x00 10. " TIE3 ,Transmit Interrupt Enable (3)" "Disabled,Enabled" bitfld.long 0x00 9. " TIE2 ,Transmit Interrupt Enable (2)" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " IDIE ,ID Ready Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 7. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " ALIE ,Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " EPIE ,Error Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DOIE ,Data Overrun Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " EWIE ,Error Warning Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " TIE1 ,Transmit Interrupt Enable (1)" "Disabled,Enabled" bitfld.long 0x00 0. " RIE ,Receiver Interrupt Enable" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "CCBT1,CAN1 controller bus timing register" bitfld.long 0x00 23. " SAM ,Bus Sampling" "Once,3 times" bitfld.long 0x00 20.--22. " TESG2 ,Delay from the sample point to the next nominal sync point" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 16.--19. " TESG1 ,Delay from the nominal Sync point to the sample point" "1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16." bitfld.long 0x00 14.--15. " SJW ,Synchronization Jump Width" "1,2,3,4" textline " " hexmask.long.word 0x00 0.--9. 1. " BRP ,Baud Rate Prescaler" group.long 0x18++0x03 line.long 0x00 "CCEWL1,CAN1 controller error-warning limit register" hexmask.long.byte 0x00 0.--7. 1. " EWL ,Error warning limit" rgroup.long 0x1C++0x03 line.long 0x00 "CCSTAT1,CAN1 controller status register" bitfld.long 0x00 23. " BS3 ,Bus Status 3" "Normal,Bus-Off" bitfld.long 0x00 22. " ES3 ,Error Status 3" "No error,Error" textline " " bitfld.long 0x00 21. " TS3 ,Transmit status 3" "Not busy,Busy" bitfld.long 0x00 20. " RS3 ,Receive Status 3" "Not busy,Busy" textline " " bitfld.long 0x00 19. " TCS3 ,Transmission complete status 3" "Not completed,Completed" bitfld.long 0x00 18. " TBS3 ,Transmit buffer status 3" "Not ready,Ready" textline " " bitfld.long 0x00 17. " DOS3 ,Data Overrun Status 3" "Not occurred,Occurred" bitfld.long 0x00 16. " RBS3 ,Receive Buffer Status 3" "Not ready,Ready" textline " " bitfld.long 0x00 15. " BS2 ,Bus Status 2" "Normal,Bus-Off" bitfld.long 0x00 14. " ES2 ,Error Status 2" "No error,Error" textline " " bitfld.long 0x00 13. " TS2 ,Transmit status 2" "Not busy,Busy" bitfld.long 0x00 12. " RS2 ,Receive Status 2" "Not busy,Busy" textline " " bitfld.long 0x00 11. " TCS2 ,Transmission complete status 2" "Not completed,Completed" bitfld.long 0x00 10. " TBS2 ,Transmit buffer status 2" "Not ready,Ready" textline " " bitfld.long 0x00 9. " DOS2 ,Data Overrun Status 2" "Not occurred,Occurred" bitfld.long 0x00 8. " RBS2 ,Receive Buffer Status 2" "Not ready,Ready" textline " " bitfld.long 0x00 7. " BS1 ,Bus Status 1" "Normal,Bus-Off" bitfld.long 0x00 6. " ES1 ,Error Status 1" "No error,Error" textline " " bitfld.long 0x00 5. " TS1 ,Transmit status 1" "Not busy,Busy" bitfld.long 0x00 4. " RS1 ,Receive Status 1" "Not busy,Busy" textline " " bitfld.long 0x00 3. " TCS1 ,Transmission complete status 1" "Not completed,Completed" bitfld.long 0x00 2. " TBS1 ,Transmit buffer status 1" "Not ready,Ready" textline " " bitfld.long 0x00 1. " DOS1 ,Data Overrun Status 1" "Not occurred,Occurred" bitfld.long 0x00 0. " RBS1 ,Receive Buffer Status 1" "Not ready,Ready" group.long 0x20++0x03 line.long 0x00 "CCRXBMI1,CAN1 controller receive-buffer message info register" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" bitfld.long 0x00 10. " BP ,Bypass mode" "Not AF Bypass,AF Bypass" textline " " hexmask.long.word 0x00 0.--9. 1. " IDI ,Identifier index (zero-based number of the Lookup Table RAM entry)" if (((data.long(ad:(0xE0081000+0x20)))&0x80000000)==0x00000000) rgroup.long 0x24++0x03 line.long 0x00 "CCRXBID1,CAN1 controller receive buffer identifier register" hexmask.long.word 0x00 0.--10. 1. " ID ,Identifier of the received CAN message" else rgroup.long 0x24++0x03 line.long 0x00 "CCRXBID1,CAN1 controller receive buffer identifier register" hexmask.long 0x00 0.--28. 1. " ID ,Identifier of the received CAN message" endif group.long 0x28++0x07 line.long 0x00 "CCRXBDB1,CAN1 controller receive buffer data A register" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the received message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the received message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the received message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the received message" line.long 0x04 "CCRXBDB1,CAN1 controller receive-buffer data B register" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the received message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the received message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the received message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the received message" group.long 0x30++0x03 line.long 0x00 "CCTXB1MI1,CAN1 controller transmit-buffer 1 message info registers" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " TXPRIO ,Transmit priority" if (((data.long(ad:(0xE0081000+0x30)))&0x80000000)==0x00000000) group.long (0x30+0x4)++0x03 line.long 0x00 "CCTXB1ID1,CAN1 controller transmit-buffer 1 identifier registers" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long (0x30+0x4)++0x03 line.long 0x00 "CCTXB1ID1,CAN1 controller transmit-buffer 1 identifier registers" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long (0x30+0x8)++0x07 line.long 0x00 "CCTXB1DA1,CAN1 controller transmit-buffer 1 data A registers" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the transmit message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the transmit message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the transmit message" line.long 0x04 "CCTXB1DB1,CAN1 controller transmit-buffer 1 data B registers" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the transmit message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the transmit message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the transmit message" group.long 0x40++0x03 line.long 0x00 "CCTXB2MI1,CAN1 controller transmit-buffer 2 message info registers" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " TXPRIO ,Transmit priority" if (((data.long(ad:(0xE0081000+0x40)))&0x80000000)==0x00000000) group.long (0x40+0x4)++0x03 line.long 0x00 "CCTXB2ID1,CAN1 controller transmit-buffer 2 identifier registers" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long (0x40+0x4)++0x03 line.long 0x00 "CCTXB2ID1,CAN1 controller transmit-buffer 2 identifier registers" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long (0x40+0x8)++0x07 line.long 0x00 "CCTXB2DA1,CAN1 controller transmit-buffer 2 data A registers" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the transmit message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the transmit message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the transmit message" line.long 0x04 "CCTXB2DB1,CAN1 controller transmit-buffer 2 data B registers" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the transmit message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the transmit message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the transmit message" group.long 0x50++0x03 line.long 0x00 "CCTXB3MI1,CAN1 controller transmit-buffer 3 message info registers" bitfld.long 0x00 31. " FF ,Frame format" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote frame request" "Data frame,Remote Frame" textline " " bitfld.long 0x00 16.--19. " DLC ,Data Length Code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" hexmask.long.byte 0x00 0.--7. 1. " TXPRIO ,Transmit priority" if (((data.long(ad:(0xE0081000+0x50)))&0x80000000)==0x00000000) group.long (0x50+0x4)++0x03 line.long 0x00 "CCTXB3ID1,CAN1 controller transmit-buffer 3 identifier registers" hexmask.long.word 0x00 0.--10. 1. " ID ,Transmitted Identifier" else group.long (0x50+0x4)++0x03 line.long 0x00 "CCTXB3ID1,CAN1 controller transmit-buffer 3 identifier registers" hexmask.long 0x00 0.--28. 1. " ID ,Transmitted Identifier" endif group.long (0x50+0x8)++0x07 line.long 0x00 "CCTXB3DA1,CAN1 controller transmit-buffer 3 data A registers" hexmask.long.byte 0x00 24.--31. 1. " DB4 ,4th Data byte of the transmit message" hexmask.long.byte 0x00 16.--23. 1. " DB3 ,3rd Data byte of the transmit message" textline " " hexmask.long.byte 0x00 8.--15. 1. " DB2 ,2ndData byte of the transmit message" hexmask.long.byte 0x00 0.--7. 1. " DB1 ,1st Data byte of the transmit message" line.long 0x04 "CCTXB3DB1,CAN1 controller transmit-buffer 3 data B registers" hexmask.long.byte 0x04 24.--31. 1. " DB8 ,8th Data byte of the transmit message" hexmask.long.byte 0x04 16.--23. 1. " DB7 ,7th Data byte of the transmit message" textline " " hexmask.long.byte 0x04 8.--15. 1. " DB6 ,6th Data byte of the transmit message" hexmask.long.byte 0x04 0.--7. 1. " DB5 ,5th Data byte of the transmit message" width 0x0B tree.end base ad:0xE0087000 tree "Acceptance Filter" width 9. group.long 0x00++0x17 line.long 0x00 "CAMODE,CAN acceptance-filter mode register" bitfld.long 0x00 2. " EFCAN ,SFullCAN extension mode" "Disabled,Enabled" bitfld.long 0x00 1. " ACCBP ,Acceptance filter bypass" "Not accepted,Accepted" bitfld.long 0x00 0. " ACCOFF ,Acceptance Filter Disable" "No,Yes" line.long 0x4 "CASFESA,CAN acceptance-filter standard-frame explicit start-address register" hexmask.long.word 0x4 2.--11. 4. " SFESA ,The start address of the table of individual Standard Identifiers in AF Lookup" line.long 0x8 "CASFGSA,CAN acceptance-filter standard-frame group start-address register" hexmask.long.word 0x8 2.--11. 4. " SFGSA ,The start address of the table of grouped Standard Identifiers in AF Lookup RAM" line.long 0xC "CAEFESA,CAN acceptance-filter extended-frame explicit start-address register" hexmask.long.word 0xC 2.--11. 4. " EFESA ,The start address of the table of individual Extended Identifiers in AF Lookup RAM" line.long 0x10 "CAEFGSA,CAN acceptance-filter extended-frame group start-address register" hexmask.long.word 0x10 2.--11. 4. " EFGSA ,The start address of the table of grouped Extended Identifiers in AF Lookup RAM" line.long 0x14 "CAEOTA,CAN acceptance-filter end of look-up table address register" hexmask.long.word 0x14 2.--11. 4. " EOTA ,End of look-up table address" hgroup.long 0x18++0x3 hide.long 0x00 "CALUTEA,CAN acceptance filter look-up table error address register" in rgroup.long 0x1C++0x3 line.long 0x0 "CALUTE,CAN acceptance-filter look-up table error register" bitfld.long 0x0 0. " LUTE ,Look-up table error" "No Error,Error" if ((d.l(ad:0xE0080000+0x7000)&0x1)==0x1) group.long 0x20++0x3 line.long 0x00 "FCANIE,Global FullCAN Interrupt Enable register" bitfld.long 0x0 0. " FCANIE ,Global FullCAN Interrupt Enable" "Disabled,Enabled" else rgroup.long 0x20++0x3 line.long 0x00 "FCANIE,Global FullCAN Interrupt Enable register" bitfld.long 0x0 0. " FCANIE ,Global FullCAN Interrupt Enable" "Disabled,Enabled" endif group.long 0x24++0x7 line.long 0x00 "FCANIC0,FullCAN interrupt and capture register 0" bitfld.long 0x00 31. " INTPND31 ,FullCan Interrupt Pending bit 31" "No interrupt,Interrupt" bitfld.long 0x00 30. " INTPND30 ,FullCan Interrupt Pending bit 30" "No interrupt,Interrupt" textline " " bitfld.long 0x00 29. " INTPND29 ,FullCan Interrupt Pending bit 29" "No interrupt,Interrupt" bitfld.long 0x00 28. " INTPND28 ,FullCan Interrupt Pending bit 28" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " INTPND27 ,FullCan Interrupt Pending bit 27" "No interrupt,Interrupt" bitfld.long 0x00 26. " INTPND26 ,FullCan Interrupt Pending bit 26" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " INTPND25 ,FullCan Interrupt Pending bit 25" "No interrupt,Interrupt" bitfld.long 0x00 24. " INTPND24 ,FullCan Interrupt Pending bit 24" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " INTPND23 ,FullCan Interrupt Pending bit 23" "No interrupt,Interrupt" bitfld.long 0x00 22. " INTPND22 ,FullCan Interrupt Pending bit 22" "No interrupt,Interrupt" textline " " bitfld.long 0x00 21. " INTPND21 ,FullCan Interrupt Pending bit 21" "No interrupt,Interrupt" bitfld.long 0x00 20. " INTPND20 ,FullCan Interrupt Pending bit 20" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " INTPND19 ,FullCan Interrupt Pending bit 19" "No interrupt,Interrupt" bitfld.long 0x00 18. " INTPND18 ,FullCan Interrupt Pending bit 18" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " INTPND17 ,FullCan Interrupt Pending bit 17" "No interrupt,Interrupt" bitfld.long 0x00 16. " INTPND16 ,FullCan Interrupt Pending bit 16" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " INTPND15 ,FullCan Interrupt Pending bit 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " INTPND14 ,FullCan Interrupt Pending bit 14" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " INTPND13 ,FullCan Interrupt Pending bit 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " INTPND12 ,FullCan Interrupt Pending bit 12" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " INTPND11 ,FullCan Interrupt Pending bit 11" "No interrupt,Interrupt" bitfld.long 0x00 10. " INTPND10 ,FullCan Interrupt Pending bit 10" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " INTPND9 ,FullCan Interrupt Pending bit 9" "No interrupt,Interrupt" bitfld.long 0x00 8. " INTPND8 ,FullCan Interrupt Pending bit 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " INTPND7 ,FullCan Interrupt Pending bit 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " INTPND6 ,FullCan Interrupt Pending bit 6" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " INTPND5 ,FullCan Interrupt Pending bit 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " INTPND4 ,FullCan Interrupt Pending bit 4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " INTPND3 ,FullCan Interrupt Pending bit 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " INTPND2 ,FullCan Interrupt Pending bit 2" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INTPND1 ,FullCan Interrupt Pending bit 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " INTPND0 ,FullCan Interrupt Pending bit 0" "No interrupt,Interrupt" line.long 0x04 "FCANIC1,FullCAN interrupt and capture register 1" bitfld.long 0x04 31. " INTPND63 ,FullCan Interrupt Pending bit 63" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTPND62 ,FullCan Interrupt Pending bit 62" "No interrupt,Interrupt" textline " " bitfld.long 0x04 29. " INTPND61 ,FullCan Interrupt Pending bit 61" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTPND60 ,FullCan Interrupt Pending bit 60" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTPND59 ,FullCan Interrupt Pending bit 59" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTPND58 ,FullCan Interrupt Pending bit 58" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTPND57 ,FullCan Interrupt Pending bit 57" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTPND56 ,FullCan Interrupt Pending bit 56" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " INTPND55 ,FullCan Interrupt Pending bit 55" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTPND54 ,FullCan Interrupt Pending bit 54" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTPND53 ,FullCan Interrupt Pending bit 53" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTPND52 ,FullCan Interrupt Pending bit 52" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " INTPND51 ,FullCan Interrupt Pending bit 51" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTPND50 ,FullCan Interrupt Pending bit 50" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTPND49 ,FullCan Interrupt Pending bit 49" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTPND48 ,FullCan Interrupt Pending bit 48" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " INTPND47 ,FullCan Interrupt Pending bit 47" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTPND46 ,FullCan Interrupt Pending bit 46" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTPND45 ,FullCan Interrupt Pending bit 45" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTPND44 ,FullCan Interrupt Pending bit 44" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " INTPND43 ,FullCan Interrupt Pending bit 43" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTPND42 ,FullCan Interrupt Pending bit 42" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTPND41 ,FullCan Interrupt Pending bit 41" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTPND40 ,FullCan Interrupt Pending bit 40" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " INTPND39 ,FullCan Interrupt Pending bit 39" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTPND38 ,FullCan Interrupt Pending bit 38" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTPND37 ,FullCan Interrupt Pending bit 37" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTPND36 ,FullCan Interrupt Pending bit 36" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " INTPND35 ,FullCan Interrupt Pending bit 35" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTPND34 ,FullCan Interrupt Pending bit 34" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTPND33 ,FullCan Interrupt Pending bit 33" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTPND32 ,FullCan Interrupt Pending bit 32" "No interrupt,Interrupt" tree.end base ad:0xE0088000 tree "CAN Central Status" width 0x09 rgroup.long 0x00++0x0B line.long 0x00 "CCCTS,CAN controller central transmit-status register" bitfld.long 0x00 17. " TCS1 ,CAN1 Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 16. " TCS0 ,CAN0 Transmit Complete Status" "Not completed,Completed" bitfld.long 0x00 9. " TBS1 ,CAN1 Transmit Buffers Status" "Not empty,Empty" textline " " bitfld.long 0x00 8. " TBS0 ,CAN0 Transmit Buffers Status" "Not empty,Empty" bitfld.long 0x00 1. " TS1 ,CAN1 Transmit Status" "Not busy,Busy" bitfld.long 0x00 0. " TS0 ,CAN0 Transmit Status" "Not busy,Busy" line.long 0x04 "CCCRS,CAN controller central receive-status register" bitfld.long 0x04 17. " DOS1 ,CAN1 Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x04 16. " DOS0 ,CAN0 Data Overrun Status" "Not occurred,Occurred" bitfld.long 0x04 9. " RBS1 ,CAN1 Receive Buffer Status" "Not ready,Ready" textline " " bitfld.long 0x04 8. " RBS0 ,CAN0 Receive Buffer Status" "Not ready,Ready" bitfld.long 0x04 1. " RS1 ,CAN1 Receive Status" "Not busy,Busy" bitfld.long 0x04 0. " RS0 ,CAN0 Receive Status" "Not busy,Busy" line.long 0x08 "CCCMS,CAN controller central miscellaneous-status register" bitfld.long 0x08 9. " BS1 ,CAN1 Bus Status" "Normal,Bus-Off" bitfld.long 0x08 8. " BS0 ,CAN0 Bus Status" "Normal,Bus-Off" bitfld.long 0x08 1. " ES1 ,CAN1 Error Status" "No error,Error" textline " " bitfld.long 0x08 0. " ES0 ,CAN0 Error Status" "No error,Error" tree.end width 0x0B tree.end tree.open "LIN (Local Interconnect Network)" tree "LIN 0" base ad:0xE0089000 width 7. group.long 0x00++0xF line.long 0x00 "LMODE,LIN 0 master-controller mode register" bitfld.long 0x00 7. " MODE ,LIN master/UART mode" "LIN,UART" bitfld.long 0x00 0. " LRM ,LIN reset mode" "No effect,Reset" line.long 0x04 "LCFG,LIN 0 master-controller configuration register" bitfld.long 0x04 7. " SWPA ,Software ID parity" "Hardware,Software" bitfld.long 0x04 6. " SWCS ,Software checksum" "Hardware,Software" textline " " bitfld.long 0x04 3.--4. " IBS ,Inter-byte space length" "0 bits,1 bit,2 bits,3 bits" bitfld.long 0x04 0.--2. " SBL ,Synch-break logic 0 length" "10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits" line.long 0x08 "LCMD,LIN 0 master-controller command register" bitfld.long 0x08 7. " SSB ,Send sync break" "Not requested,Requested" bitfld.long 0x08 0. " TR ,Transmit request" "Not requested,Requested" line.long 0x0C "LFBRG,LIN 0 master-controller fractional baud-rate generator register" bitfld.long 0x0C 16.--19. " FRAC ,Fractional value (fraction of the baud division)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." hexmask.long.word 0x0C 0.--15. 1. " INT ,Integer value (baud rate divisor)" if ((d.l(ad:0xE0089000+0x00)&0x80)==0x00) rgroup.long 0x10++0x3 line.long 0x00 "LSTAT,LIN 0 master-controller status register" bitfld.long 0x00 9. " TTL ,TXD line level" "Recessive,Dominant" bitfld.long 0x00 8. " RLL ,RXD line level" "Recessive,Dominant" bitfld.long 0x00 6. " IS ,Idle status" "Active,Idle" textline " " bitfld.long 0x00 5. " ES ,Error status" "No error,Error" bitfld.long 0x00 4. " TS ,Transmit status" "Not busy,Busy" bitfld.long 0x00 3. " RS ,Receive status" "Not busy,Busy" textline " " bitfld.long 0x00 2. " HS ,Header status" "Not busy,Busy" bitfld.long 0x00 1. " MBA ,Message buffer access" "Locked,Unlocked" bitfld.long 0x00 0. " MR ,Message received" "Invalid,Valid" hgroup.long 0x14++0x3 hide.long 0x00 "LIC,LIN 0 master-controller interrupt and capture register" in group.long 0x18++0x3 line.long 0x00 "LIE,LIN 0 master-controller interrupt-enable register" bitfld.long 0x00 6. " WPIE ,Wake-up and LIN protocol error-interrupt" "Disabled,Enabled" bitfld.long 0x00 5. " RTLCEIE ,Line-clamped error interrupt (enable with BEIE)" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " NRIE ,Slave-not-responding error interrupt" "Disabled,Enabled" bitfld.long 0x00 3. " CSIE ,Checksum error interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " BEIE ,Bit-error interrupt (enable with RTLCEIE)" "Disabled,Enabled" bitfld.long 0x00 1. " TIE ,Transmit-message complete interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RIE ,Receive-message complete interrupt" "Disabled,Enabled" group.long 0x20++0x1B line.long 0x00 "LCS,LIN 0 master-controller checksum register" hexmask.long.byte 0x00 0.--7. 1. " CS ,LIN message checksum" line.long 0x04 "LTO,LIN 0 master-controller time-out register" hexmask.long.byte 0x04 0.--7. 1. " TO ,LIN message time-out" line.long 0x08 "LID,LIN 0 master-controller message buffer identifier register" bitfld.long 0x08 25. " CSID ,Checksum ID inclusion" "Disabled,Enabled" bitfld.long 0x08 24. " DD ,Data direction" "LIN,Slave" bitfld.long 0x08 16.--20. " DLC ,Data-length code" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16." textline " " bitfld.long 0x08 7. " P1 ,LIN message-parity bit 1" "Low,High" bitfld.long 0x08 6. " P0 ,LIN message-parity bit 0" "Low,High" bitfld.long 0x08 0.--5. " ID ,LIN message identifier" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31.,32.,33.,34.,35.,36.,37.,38.,39.,40.,41.,42.,43.,44.,45.,46.,47.,48.,49.,50.,51.,52.,53.,54.,55.,56.,57.,58.,59.,60.,61.,62.,63." textline " " line.long 0x0C "LDATA,LIN 0 master-controller message buffer data A register" hexmask.long.byte 0x0C 24.--31. 1. " DF4 ,LIN message-data field 4" hexmask.long.byte 0x0C 16.--23. 1. " DF3 ,LIN message-data field 3" hexmask.long.byte 0x0C 8.--15. 1. " DF2 ,LIN message-data field 2" textline " " hexmask.long.byte 0x0C 0.--7. 1. " DF1 ,LIN message-data field 1" line.long 0x10 "LDATB,LIN 0 master-controller message buffer data B register" hexmask.long.byte 0x10 24.--31. 1. " DF8 ,LIN message-data field 8" hexmask.long.byte 0x10 16.--23. 1. " DF7 ,LIN message-data field 7" hexmask.long.byte 0x10 8.--15. 1. " DF6 ,LIN message-data field 6" textline " " hexmask.long.byte 0x10 0.--7. 1. " DF5 ,LIN message-data field 5" line.long 0x14 "LDATC,LIN 0 master-controller message buffer data C register" hexmask.long.byte 0x14 24.--31. 1. " DF12 ,LIN message-data field 12" hexmask.long.byte 0x14 16.--23. 1. " DF11 ,LIN message-data field 11" hexmask.long.byte 0x14 8.--15. 1. " DF10 ,LIN message-data field 10" textline " " hexmask.long.byte 0x14 0.--7. 1. " DF9 ,LIN message-data field 9" line.long 0x18 "LDATD,LIN 0 master-controller message buffer data D register" hexmask.long.byte 0x18 24.--31. 1. " DF16 ,LIN message-data field 16" hexmask.long.byte 0x18 16.--23. 1. " DF15 ,LIN message-data field 15" hexmask.long.byte 0x18 8.--15. 1. " DF14 ,LIN message-data field 14" textline " " hexmask.long.byte 0x18 0.--7. 1. " DF13 ,LIN message-data field 13" else rgroup.long 0x10++0x3 line.long 0x00 "LU0RBR,LIN/UART0 Receiver Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RBR ,LIN/UART0 Receiver Buffer Register" wgroup.long 0x10++0x3 line.long 0x00 "LU0THR,LIN/UART0 Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " THR ,LIN/UART0 Transmit Holding Register" group.long 0x14++0x3 line.long 0x00 "LU0IER,LIN/UART0 Interrupt Enable Register" bitfld.long 0x00 2. " RX_LSIE , RX line status interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " THRE_IE , THRE interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RDA_IE , Receive data available interrupt enable" "Disabled,Enabled" rgroup.long 0x18++0x3 line.long 0x00 "LU0IIR, LIN/UART0 Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFO_EN , FIFO enable" "Disabled,Enabled,?..." bitfld.long 0x00 1.--3. " INTID , Interrupt identification" "Reserved,THRE_Int,RDA,RLS,Reserved,Reserved,CTI,?..." bitfld.long 0x00 0. " INTSTATUS , Interrupt status" "Interrupt,No interrupt" group.long 0x18++0x3 line.long 0x00 "LU0FCR, LIN/UART0 FIFO Control Register" bitfld.long 0x00 6.--7. " RX_TL , Number of receiver LIN/UART0 FIFO characters" "1,4,8,14" eventfld.long 0x00 2. " TX_FIFO_RST , TX FIFO reset" "No effect,Reset" eventfld.long 0x00 1. " RX_FIFO_RST , RX FIFO reset" "No effect,Reset" bitfld.long 0x00 0. " FIFO_EN , FIFO enable" "Disabled,Enabled" if ((d.l(ad:0xE0089000+0x1C)&0x3)==0x00) group.long 0x1C++0x3 line.long 0x00 "LU0LCR , LIN/UART0 Line Control Register" bitfld.long 0x00 6. " BREAK_CTRL ,Transmission brake enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " PARITY , Parrity select" "ODD,EVEN,Forced '1',Forced '0'" textline " " bitfld.long 0x00 3. " PARITY_EN , Parrity enable" "Disabled,Enabled" bitfld.long 0x00 2. " STOP_BIT , Number of stop bits " "1,1.5" bitfld.long 0x00 0.--1. " WL , Word length select" "5bit,6bit,7bit,8bit" else group.long 0x1C++0x3 line.long 0x00 "LU0LCR , LIN/UART0 Line Control Register" bitfld.long 0x00 6. " BREAK_CTRL ,Transmission brake enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " PARITY , Parrity select" "ODD,EVEN,Forced '1',Forced '0'" textline " " bitfld.long 0x00 3. " PARITY_EN , Parrity enable" "Disabled,Enabled" bitfld.long 0x00 2. " STOP_BIT , Number of stop bits " "1,2" bitfld.long 0x00 0.--1. " WL , Word length select" "5bit,6bit,7bit,8bit" endif rgroup.long 0x24++0x3 line.long 0x00 "LU0LSR , LIN/UART0 Line Status Register" bitfld.long 0x00 7. " RXFE ,Error in RX FIFO" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty" "No empty,Empty" bitfld.long 0x00 5. " THRE ,Transmitter holding register empty" "No empty,Empty" bitfld.long 0x00 4. " BI ,Break interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " FE ,Framing error enable" "Disabled,Enabled" bitfld.long 0x00 2. " PE ,Parity error enable" "Disabled,Enabled" bitfld.long 0x00 1. " OE ,Overrun error enable" "Disabled,Enabled" bitfld.long 0x00 0. " RDR ,Receiver data ready" "Empty,No empty" group.long 0x2C++0x3 line.long 0x00 "LU0SCR , LIN/UART0 Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " PAD , Readable/Writable byte" group.long 0x40++0x3 line.long 0x00 "LU0TER , LIN/UART0 Transmit Enable Register" bitfld.long 0x00 7. " TXEN , TX enable" "Disabled,Enabled" endif width 0xB tree.end tree "LIN 1" base ad:0xE008A000 width 7. group.long 0x00++0xF line.long 0x00 "LMODE,LIN 1 master-controller mode register" bitfld.long 0x00 7. " MODE ,LIN master/UART mode" "LIN,UART" bitfld.long 0x00 0. " LRM ,LIN reset mode" "No effect,Reset" line.long 0x04 "LCFG,LIN 1 master-controller configuration register" bitfld.long 0x04 7. " SWPA ,Software ID parity" "Hardware,Software" bitfld.long 0x04 6. " SWCS ,Software checksum" "Hardware,Software" textline " " bitfld.long 0x04 3.--4. " IBS ,Inter-byte space length" "0 bits,1 bit,2 bits,3 bits" bitfld.long 0x04 0.--2. " SBL ,Synch-break logic 0 length" "10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,17 bits" line.long 0x08 "LCMD,LIN 1 master-controller command register" bitfld.long 0x08 7. " SSB ,Send sync break" "Not requested,Requested" bitfld.long 0x08 0. " TR ,Transmit request" "Not requested,Requested" line.long 0x0C "LFBRG,LIN 1 master-controller fractional baud-rate generator register" bitfld.long 0x0C 16.--19. " FRAC ,Fractional value (fraction of the baud division)" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15." hexmask.long.word 0x0C 0.--15. 1. " INT ,Integer value (baud rate divisor)" if ((d.l(ad:0xE008A000+0x00)&0x80)==0x00) rgroup.long 0x10++0x3 line.long 0x00 "LSTAT,LIN 1 master-controller status register" bitfld.long 0x00 9. " TTL ,TXD line level" "Recessive,Dominant" bitfld.long 0x00 8. " RLL ,RXD line level" "Recessive,Dominant" bitfld.long 0x00 6. " IS ,Idle status" "Active,Idle" textline " " bitfld.long 0x00 5. " ES ,Error status" "No error,Error" bitfld.long 0x00 4. " TS ,Transmit status" "Not busy,Busy" bitfld.long 0x00 3. " RS ,Receive status" "Not busy,Busy" textline " " bitfld.long 0x00 2. " HS ,Header status" "Not busy,Busy" bitfld.long 0x00 1. " MBA ,Message buffer access" "Locked,Unlocked" bitfld.long 0x00 0. " MR ,Message received" "Invalid,Valid" hgroup.long 0x14++0x3 hide.long 0x00 "LIC,LIN 1 master-controller interrupt and capture register" in group.long 0x18++0x3 line.long 0x00 "LIE,LIN 1 master-controller interrupt-enable register" bitfld.long 0x00 6. " WPIE ,Wake-up and LIN protocol error-interrupt" "Disabled,Enabled" bitfld.long 0x00 5. " RTLCEIE ,Line-clamped error interrupt (enable with BEIE)" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " NRIE ,Slave-not-responding error interrupt" "Disabled,Enabled" bitfld.long 0x00 3. " CSIE ,Checksum error interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " BEIE ,Bit-error interrupt (enable with RTLCEIE)" "Disabled,Enabled" bitfld.long 0x00 1. " TIE ,Transmit-message complete interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RIE ,Receive-message complete interrupt" "Disabled,Enabled" group.long 0x20++0x1B line.long 0x00 "LCS,LIN 1 master-controller checksum register" hexmask.long.byte 0x00 0.--7. 1. " CS ,LIN message checksum" line.long 0x04 "LTO,LIN 1 master-controller time-out register" hexmask.long.byte 0x04 0.--7. 1. " TO ,LIN message time-out" line.long 0x08 "LID,LIN 1 master-controller message buffer identifier register" bitfld.long 0x08 25. " CSID ,Checksum ID inclusion" "Disabled,Enabled" bitfld.long 0x08 24. " DD ,Data direction" "LIN,Slave" bitfld.long 0x08 16.--20. " DLC ,Data-length code" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16.,16." textline " " bitfld.long 0x08 7. " P1 ,LIN message-parity bit 1" "Low,High" bitfld.long 0x08 6. " P0 ,LIN message-parity bit 0" "Low,High" bitfld.long 0x08 0.--5. " ID ,LIN message identifier" "0.,1.,2.,3.,4.,5.,6.,7.,8.,9.,10.,11.,12.,13.,14.,15.,16.,17.,18.,19.,20.,21.,22.,23.,24.,25.,26.,27.,28.,29.,30.,31.,32.,33.,34.,35.,36.,37.,38.,39.,40.,41.,42.,43.,44.,45.,46.,47.,48.,49.,50.,51.,52.,53.,54.,55.,56.,57.,58.,59.,60.,61.,62.,63." textline " " line.long 0x0C "LDATA,LIN 1 master-controller message buffer data A register" hexmask.long.byte 0x0C 24.--31. 1. " DF4 ,LIN message-data field 4" hexmask.long.byte 0x0C 16.--23. 1. " DF3 ,LIN message-data field 3" hexmask.long.byte 0x0C 8.--15. 1. " DF2 ,LIN message-data field 2" textline " " hexmask.long.byte 0x0C 0.--7. 1. " DF1 ,LIN message-data field 1" line.long 0x10 "LDATB,LIN 1 master-controller message buffer data B register" hexmask.long.byte 0x10 24.--31. 1. " DF8 ,LIN message-data field 8" hexmask.long.byte 0x10 16.--23. 1. " DF7 ,LIN message-data field 7" hexmask.long.byte 0x10 8.--15. 1. " DF6 ,LIN message-data field 6" textline " " hexmask.long.byte 0x10 0.--7. 1. " DF5 ,LIN message-data field 5" line.long 0x14 "LDATC,LIN 1 master-controller message buffer data C register" hexmask.long.byte 0x14 24.--31. 1. " DF12 ,LIN message-data field 12" hexmask.long.byte 0x14 16.--23. 1. " DF11 ,LIN message-data field 11" hexmask.long.byte 0x14 8.--15. 1. " DF10 ,LIN message-data field 10" textline " " hexmask.long.byte 0x14 0.--7. 1. " DF9 ,LIN message-data field 9" line.long 0x18 "LDATD,LIN 1 master-controller message buffer data D register" hexmask.long.byte 0x18 24.--31. 1. " DF16 ,LIN message-data field 16" hexmask.long.byte 0x18 16.--23. 1. " DF15 ,LIN message-data field 15" hexmask.long.byte 0x18 8.--15. 1. " DF14 ,LIN message-data field 14" textline " " hexmask.long.byte 0x18 0.--7. 1. " DF13 ,LIN message-data field 13" else rgroup.long 0x10++0x3 line.long 0x00 "LU1RBR,LIN/UART1 Receiver Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " RBR ,LIN/UART1 Receiver Buffer Register" wgroup.long 0x10++0x3 line.long 0x00 "LU1THR,LIN/UART1 Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " THR ,LIN/UART1 Transmit Holding Register" group.long 0x14++0x3 line.long 0x00 "LU1IER,LIN/UART1 Interrupt Enable Register" bitfld.long 0x00 2. " RX_LSIE , RX line status interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " THRE_IE , THRE interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RDA_IE , Receive data available interrupt enable" "Disabled,Enabled" rgroup.long 0x18++0x3 line.long 0x00 "LU1IIR, LIN/UART1 Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFO_EN , FIFO enable" "Disabled,Enabled,?..." bitfld.long 0x00 1.--3. " INTID , Interrupt identification" "Reserved,THRE_Int,RDA,RLS,Reserved,Reserved,CTI,?..." bitfld.long 0x00 0. " INTSTATUS , Interrupt status" "Interrupt,No interrupt" group.long 0x18++0x3 line.long 0x00 "LU1FCR, LIN/UART1 FIFO Control Register" bitfld.long 0x00 6.--7. " RX_TL , Number of receiver LIN/UART1 FIFO characters" "1,4,8,14" eventfld.long 0x00 2. " TX_FIFO_RST , TX FIFO reset" "No effect,Reset" eventfld.long 0x00 1. " RX_FIFO_RST , RX FIFO reset" "No effect,Reset" bitfld.long 0x00 0. " FIFO_EN , FIFO enable" "Disabled,Enabled" if ((d.l(ad:0xE008A000+0x1C)&0x3)==0x00) group.long 0x1C++0x3 line.long 0x00 "LU1LCR , LIN/UART1 Line Control Register" bitfld.long 0x00 6. " BREAK_CTRL ,Transmission brake enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " PARITY , Parrity select" "ODD,EVEN,Forced '1',Forced '0'" textline " " bitfld.long 0x00 3. " PARITY_EN , Parrity enable" "Disabled,Enabled" bitfld.long 0x00 2. " STOP_BIT , Number of stop bits " "1,1.5" bitfld.long 0x00 0.--1. " WL , Word length select" "5bit,6bit,7bit,8bit" else group.long 0x1C++0x3 line.long 0x00 "LU1LCR , LIN/UART1 Line Control Register" bitfld.long 0x00 6. " BREAK_CTRL ,Transmission brake enable" "Disabled,Enabled" bitfld.long 0x00 4.--5. " PARITY , Parrity select" "ODD,EVEN,Forced '1',Forced '0'" textline " " bitfld.long 0x00 3. " PARITY_EN , Parrity enable" "Disabled,Enabled" bitfld.long 0x00 2. " STOP_BIT , Number of stop bits " "1,2" bitfld.long 0x00 0.--1. " WL , Word length select" "5bit,6bit,7bit,8bit" endif rgroup.long 0x24++0x3 line.long 0x00 "LU1LSR , LIN/UART1 Line Status Register" bitfld.long 0x00 7. " RXFE ,Error in RX FIFO" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty" "No empty,Empty" bitfld.long 0x00 5. " THRE ,Transmitter holding register empty" "No empty,Empty" bitfld.long 0x00 4. " BI ,Break interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " FE ,Framing error enable" "Disabled,Enabled" bitfld.long 0x00 2. " PE ,Parity error enable" "Disabled,Enabled" bitfld.long 0x00 1. " OE ,Overrun error enable" "Disabled,Enabled" bitfld.long 0x00 0. " RDR ,Receiver data ready" "Empty,No empty" group.long 0x2C++0x3 line.long 0x00 "LU1SCR , LIN/UART1 Scratch Pad Register" hexmask.long.byte 0x00 0.--7. 1. " PAD , Readable/Writable byte" group.long 0x40++0x3 line.long 0x00 "LU1TER , LIN/UART1 Transmit Enable Register" bitfld.long 0x00 7. " TXEN , TX enable" "Disabled,Enabled" endif width 0xB tree.end tree.end sif (cpu()!="LPC2917"&&cpu()!="LPC2919") tree.open "I2C (Inter-Integrated Circuit)" tree "I2C 0" base ad:0xE0082000 width 17. group.long 0x00++0x03 line.long 0x00 "I2C0CON,I2C Control Register" setclrfld.long 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "No acknowledge,Acknowledge" setclrfld.long 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " STO ,STOP flag" "No effect,STOP" setclrfld.long 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "No effect,START" textline " " setclrfld.long 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "I2C0STAT,I2C0 Status Register" bitfld.long 0x00 3.--7. " Status ,Actual Status Information About I2C Interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,Reserved,Reserved,Reserved,Reserved,Reserved,No information/SI = 0" group.byte 0x08++0x00 line.byte 0x00 "I2C0DAT,I2C0 Data Register" group.long 0x10++0x03 line.long 0x00 "I2C0SCLH,SCL Duty Cycle Register HIGH" hexmask.long.word 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH Time Period Selection" group.long 0x14++0x03 line.long 0x00 "I2C0SCLL,SCL Duty Cycle Register LOW" hexmask.long.word 0x00 0.--15. 1. " SCLL ,Count for SCL LOW Time Period Selection" group.long 0x1C++0x3 line.long 0x00 "I2CMMCTRL0,I2C0 Monitor mode control register" bitfld.long 0x00 3. " MATCH_ALL ,Select interrupt register match (any address)" "Disabled,Enabled" bitfld.long 0x00 1. " ENA_SCL ,SCL output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MM_ENA ,Monitor mode enable" "Disabled,Enabled" hgroup.byte 0x2C++0x00 hide.byte 0x00 "I2C0DATA_BUFFER,I2C Data buffer register" in group.long 0x0c++0x03 line.long 0x00 "I2C0ADR0,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " Address ,Slave mode address" bitfld.long 0x00 0. " GC ,General Call bit" "Disabled,Enabled" group.long 0x20++0xB line.long 0x0 "I2C0ADR1,I2C Slave Address registers" hexmask.long.byte 0x0 1.--7. 0x2 " Address ,The I2C device address for slave mode" bitfld.long 0x0 0. " GC ,General Call bit" "Disabled,Enabled" line.long 0x4 "I2C0ADR2,I2C Slave Address registers" hexmask.long.byte 0x4 1.--7. 0x2 " Address ,The I2C device address for slave mode" bitfld.long 0x4 0. " GC ,General Call bit" "Disabled,Enabled" line.long 0x8 "I2C0ADR3,I2C Slave Address registers" hexmask.long.byte 0x8 1.--7. 0x2 " Address ,The I2C device address for slave mode" bitfld.long 0x8 0. " GC ,General Call bit" "Disabled,Enabled" group.long 0x30++0xF line.long 0x0 "I2C0MASK0,I2C Mask registers" bitfld.long 0x0 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0x0 6. ",Mask bit" "0,1" bitfld.long 0x0 5. ",Mask bit" "0,1" bitfld.long 0x0 4. ",Mask bit" "0,1" bitfld.long 0x0 3. ",Mask bit" "0,1" bitfld.long 0x0 2. ",Mask bit" "0,1" bitfld.long 0x0 1. ",Mask bit" "0,1" line.long 0x4 "I2C0MASK1,I2C Mask registers" bitfld.long 0x4 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0x4 6. ",Mask bit" "0,1" bitfld.long 0x4 5. ",Mask bit" "0,1" bitfld.long 0x4 4. ",Mask bit" "0,1" bitfld.long 0x4 3. ",Mask bit" "0,1" bitfld.long 0x4 2. ",Mask bit" "0,1" bitfld.long 0x4 1. ",Mask bit" "0,1" line.long 0x8 "I2C0MASK2,I2C Mask registers" bitfld.long 0x8 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0x8 6. ",Mask bit" "0,1" bitfld.long 0x8 5. ",Mask bit" "0,1" bitfld.long 0x8 4. ",Mask bit" "0,1" bitfld.long 0x8 3. ",Mask bit" "0,1" bitfld.long 0x8 2. ",Mask bit" "0,1" bitfld.long 0x8 1. ",Mask bit" "0,1" line.long 0xC "I2C0MASK3,I2C Mask registers" bitfld.long 0xC 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0xC 6. ",Mask bit" "0,1" bitfld.long 0xC 5. ",Mask bit" "0,1" bitfld.long 0xC 4. ",Mask bit" "0,1" bitfld.long 0xC 3. ",Mask bit" "0,1" bitfld.long 0xC 2. ",Mask bit" "0,1" bitfld.long 0xC 1. ",Mask bit" "0,1" width 0xB tree.end tree "I2C 1" base ad:0xE0083000 width 17. group.long 0x00++0x03 line.long 0x00 "I2C1CON,I2C Control Register" setclrfld.long 0x00 2. 0x00 2. 0x18 2. " AA_set/clr ,Assert acknowledge flag" "No acknowledge,Acknowledge" setclrfld.long 0x00 3. 0x00 3. 0x18 3. " SI_set/clr ,I2C interrupt flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " STO ,STOP flag" "No effect,STOP" setclrfld.long 0x00 5. 0x00 5. 0x18 5. " STA_set/clr ,START flag" "No effect,START" textline " " setclrfld.long 0x00 6. 0x00 6. 0x18 6. " I2EN_set/clr ,I2C interface enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "I2C1STAT,I2C1 Status Register" bitfld.long 0x00 3.--7. " Status ,Actual Status Information About I2C Interface" "Bus error/undefined,START transmitted,Repeated START transmitted,SLA+W transmitted/ACK,SLA+W transmitted/NOT ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Arbitration lost SLA+R/W/Data/NOT ACK,SLA+R transmitted/ACK,SLA+R transmitted/NOT ACK,Data received/ACK,Data received/NOT ACK,Own SLA+W received/ACK,Arbitration lost SLA+R/W/Own SLA+W received/ACK,GCA (0x00) received/ACK,Arbitration lost SLA+R/W/GCA received/ACK,Own SLV/DATA received/ACK,Own SLA/DATA received/NOT ACK,General Call/DATA received/ACK,General Call/DATA received/NOT ACK,STOP/repeated START received SLV/REC/SLV/TRX,Own SLA+R received/ACK,Arbitration lost SLA+R/W/Own SLA+R received/ACK,I2DAT transmitted/ACK,I2DAT transmitted/NOT ACK,Last I2DAT transmitted/ACK,Reserved,Reserved,Reserved,Reserved,Reserved,No information/SI = 0" group.byte 0x08++0x00 line.byte 0x00 "I2C1DAT,I2C1 Data Register" group.long 0x10++0x03 line.long 0x00 "I2C1SCLH,SCL Duty Cycle Register HIGH" hexmask.long.word 0x00 0.--15. 1. " SCLH ,Count for SCL HIGH Time Period Selection" group.long 0x14++0x03 line.long 0x00 "I2C1SCLL,SCL Duty Cycle Register LOW" hexmask.long.word 0x00 0.--15. 1. " SCLL ,Count for SCL LOW Time Period Selection" group.long 0x1C++0x3 line.long 0x00 "I2CMMCTRL1,I2C1 Monitor mode control register" bitfld.long 0x00 3. " MATCH_ALL ,Select interrupt register match (any address)" "Disabled,Enabled" bitfld.long 0x00 1. " ENA_SCL ,SCL output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MM_ENA ,Monitor mode enable" "Disabled,Enabled" hgroup.byte 0x2C++0x00 hide.byte 0x00 "I2C1DATA_BUFFER,I2C Data buffer register" in group.long 0x0c++0x03 line.long 0x00 "I2C1ADR0,I2C Slave Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " Address ,Slave mode address" bitfld.long 0x00 0. " GC ,General Call bit" "Disabled,Enabled" group.long 0x20++0xB line.long 0x0 "I2C1ADR1,I2C Slave Address registers" hexmask.long.byte 0x0 1.--7. 0x2 " Address ,The I2C device address for slave mode" bitfld.long 0x0 0. " GC ,General Call bit" "Disabled,Enabled" line.long 0x4 "I2C1ADR2,I2C Slave Address registers" hexmask.long.byte 0x4 1.--7. 0x2 " Address ,The I2C device address for slave mode" bitfld.long 0x4 0. " GC ,General Call bit" "Disabled,Enabled" line.long 0x8 "I2C1ADR3,I2C Slave Address registers" hexmask.long.byte 0x8 1.--7. 0x2 " Address ,The I2C device address for slave mode" bitfld.long 0x8 0. " GC ,General Call bit" "Disabled,Enabled" group.long 0x30++0xF line.long 0x0 "I2C1MASK0,I2C Mask registers" bitfld.long 0x0 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0x0 6. ",Mask bit" "0,1" bitfld.long 0x0 5. ",Mask bit" "0,1" bitfld.long 0x0 4. ",Mask bit" "0,1" bitfld.long 0x0 3. ",Mask bit" "0,1" bitfld.long 0x0 2. ",Mask bit" "0,1" bitfld.long 0x0 1. ",Mask bit" "0,1" line.long 0x4 "I2C1MASK1,I2C Mask registers" bitfld.long 0x4 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0x4 6. ",Mask bit" "0,1" bitfld.long 0x4 5. ",Mask bit" "0,1" bitfld.long 0x4 4. ",Mask bit" "0,1" bitfld.long 0x4 3. ",Mask bit" "0,1" bitfld.long 0x4 2. ",Mask bit" "0,1" bitfld.long 0x4 1. ",Mask bit" "0,1" line.long 0x8 "I2C1MASK2,I2C Mask registers" bitfld.long 0x8 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0x8 6. ",Mask bit" "0,1" bitfld.long 0x8 5. ",Mask bit" "0,1" bitfld.long 0x8 4. ",Mask bit" "0,1" bitfld.long 0x8 3. ",Mask bit" "0,1" bitfld.long 0x8 2. ",Mask bit" "0,1" bitfld.long 0x8 1. ",Mask bit" "0,1" line.long 0xC "I2C1MASK3,I2C Mask registers" bitfld.long 0xC 7. " MASK[7:1] ,Mask bit" "0,1" bitfld.long 0xC 6. ",Mask bit" "0,1" bitfld.long 0xC 5. ",Mask bit" "0,1" bitfld.long 0xC 4. ",Mask bit" "0,1" bitfld.long 0xC 3. ",Mask bit" "0,1" bitfld.long 0xC 2. ",Mask bit" "0,1" bitfld.long 0xC 1. ",Mask bit" "0,1" width 0xB tree.end tree.end endif tree.open "PWM (Pulse Width Modulator)" tree "PWM 0" base ad:0xE00C5000 width 12. group.long 0x00++0x1F line.long 0x00 "MODECTL,PWM 0 mode control register" bitfld.long 0x00 7. " UPD_ENA ,Enables synchronization to the PWM domain" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TRANS_ENA ,Enables transfer to the compare registers" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TRANS_ENA_SEL ,Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL ,Selection of the synchronization source" "Internal,Sync_in" textline " " bitfld.long 0x00 3. " SYNC_OUT_ENA ,Sync_out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RUN_ONCE ,PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET ,Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA ,Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTL,PWM 0 trap control register" bitfld.long 0x04 16. " TRAP_POL ,The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5] ,Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4] ,Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3] ,Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2] ,Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1] ,Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0] ,Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTL,PWM 0 capture control register" bitfld.long 0x08 6.--7. " CAPT_EDGE3 ,Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2 ,Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 2.--3. " CAPT_EDGE1 ,Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 0.--1. " CAPT_EDGE0 ,Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRC,PWM 0 capture source register" bitfld.long 0x0C 6.--7. " CAPT_SRC3 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM0 CAPT3 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 4.--5. " CAPT_SRC2 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM0 CAPT3 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1 ,Select the source of capture channel 2 to trigger capture of the PWM" "PWM0 CAPT1 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 0.--1. " CAPT_SRC0 ,Select the source of capture channel 1 to trigger capture of the PWM" "PWM0 CAPT0 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRL,PWM 0 control register" bitfld.long 0x10 21. " BURST_ENA[5] ,PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4] ,PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3] ,PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2] ,PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1] ,PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0] ,PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5] ,PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4] ,PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3] ,PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2] ,PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1] ,PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0] ,PWM 0 output level for active state" "Low,High" line.long 0x14 "PRD,PWM 0 period register" hexmask.long.word 0x14 0.--15. 1. " PRD ,Period cycle minus 1" line.long 0x18 "PRSC,PWM 0 prescale register" hexmask.long.word 0x18 0.--15. 1. " PRSC ,Prescaler value" line.long 0x1C "SYNDEL,PWM 0 synchronization delay register" hexmask.long.word 0x1C 0.--15. 1. " DLY ,Value in system clock cycles of the delay between the sync_in and sync_out pins" rgroup.long 0x20++0x3 line.long 0x00 "CNT,PWM 0 counter value" hexmask.long.word 0x00 0.--15. 1. " CNT ,PWM counter value" group.long 0x100++0x17 line.long 0x0 "MTCHACT0,PWM 0 match active register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x4 "MTCHACT1,PWM 0 match active register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x8 "MTCHACT2,PWM 0 match active register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0xC "MTCHACT3,PWM 0 match active register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x10 "MTCHACT4,PWM 0 match active register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x14 "MTCHACT5,PWM 0 match active register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,The first (activation) match value" group.long 0x200++0x17 line.long 0x0 "MTCHDEACT0,PWM 0 match deactive register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x4 "MTCHDEACT1,PWM 0 match deactive register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x8 "MTCHDEACT2,PWM 0 match deactive register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0xC "MTCHDEACT3,PWM 0 match deactive register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x10 "MTCHDEACT4,PWM 0 match deactive register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x14 "MTCHDEACT5,PWM 0 match deactive register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" rgroup.long 0x300++0xF line.long 0x0 "CAPT0,PWM 0 capture register" hexmask.long.word 0x0 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x4 "CAPT1,PWM 0 capture register" hexmask.long.word 0x4 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x8 "CAPT2,PWM 0 capture register" hexmask.long.word 0x8 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0xC "CAPT3,PWM 0 capture register" hexmask.long.word 0xC 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" group.long 0xF98++0x7 line.long 0x00 "INT_STATUS,PWM interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EMGY_set/clr ,Trap emergency event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " UD_set/clr ,Update done" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TD_set/clr ,Transfer done" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CO_set/clr ,PWM counter overflow" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,PWM interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " EMGY_set/clr ,Trap emergency event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " UD_set/clr ,Update done" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TD_set/clr ,Transfer done" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CO_set/clr ,PWM counter overflow" "Disabled,Enabled" width 17. group.long 0xFB0++0x7 line.long 0x00 "INT_MTCH_STATUS,Match interrupt status register" setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " MTCHACT5_set/clr , PWM counter value matching MTCHACT0" "No interrupt,Interrupt" line.long 0x04 "INT_MTCH_ENABLE,Match interrupt enable register" setclrfld.long 0x04 11. -0x04 11. -0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "Disabled,Enabled" setclrfld.long 0x04 10. -0x04 10. -0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. -0x04 9. -0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "Disabled,Enabled" setclrfld.long 0x04 8. -0x04 8. -0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. -0x04 7. -0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " MTCHACT0_set/clr , PWM counter value matching MTCHACT0" "Disabled,Enabled" group.long 0xFC8++0x7 line.long 0x00 "INT_CAPT_STATUS,Capture interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " CAPT3_set/clr ,Capture channel 3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " CAPT2_set/clr ,Capture channel 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " CAPT1_set/clr ,Capture channel 1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CAPT0_set/clr ,Capture channel 0" "No interrupt,Interrupt" line.long 0x04 "INT_CAPT_ENABLE,Capture interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " CAPT3_set/clr ,Capture channel 3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " CAPT2_set/clr ,Capture channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " CAPT1_set/clr ,Capture channel 1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CAPT0_set/clr ,Capture channel 0" "Disabled,Enabled" tree "Shadow Registers" width 10. rgroup.long 0x800++0x1F line.long 0x00 "MODECTLS,PWM 0 mode control shadow register" bitfld.long 0x00 5. " TRANS_ENA_SEL_SYNC ,(Shadow)Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL_SYNC ,(Shadow)Selection of the synchronization source" "Sync_in pin,Internal" textline " " bitfld.long 0x00 2. " RUN_ONCE_SYNC ,(Shadow)PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET_SYNC ,(Shadow)Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA_SYNC ,(Shadow)Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTLS,PWM 0 trap control shadow register" bitfld.long 0x04 16. " TRAP_POL_SYNC ,(Shadow)The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5]_SYNC ,(Shadow)Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4]_SYNC ,(Shadow)Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3]_SYNC ,(Shadow)Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2]_SYNC ,(Shadow)Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1]_SYNC ,(Shadow)Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0]_SYNC ,(Shadow)Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTLS,PWM 0 capture control shadow register" bitfld.long 0x08 6.--7. " CAPT_EDGE3_SYNC ,(Shadow)Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2_SYNC ,(Shadow)Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 2.--3. " CAPT_EDGE1_SYNC ,(Shadow)Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 0.--1. " CAPT_EDGE0_SYNC ,(Shadow)Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRCS,PWM 0 capture source shadow register" bitfld.long 0x0C 6.--7. " CAPT_SRC3_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM0 CAPT3 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 4.--5. " CAPT_SRC2_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM0 CAPT3 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1_SYNC ,(Shadow)Select the source of capture channel 2 to trigger capture of the PWM" "PWM0 CAPT1 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 0.--1. " CAPT_SRC0_SYNC ,(Shadow)Select the source of capture channel 1 to trigger capture of the PWM" "PWM0 CAPT0 signal,sync_in signal,PWM0 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRLS,PWM 0 control shadow register" bitfld.long 0x10 21. " BURST_ENA[5]_SHAD ,(Shadow)PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4]_SHAD ,(Shadow)PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3]_SHAD ,(Shadow)PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2]_SHAD ,(Shadow)PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1]_SHAD ,(Shadow)PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0]_SHAD ,(Shadow)PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5]_SHAD ,(Shadow)PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4]_SHAD ,(Shadow)PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3]_SHAD ,(Shadow)PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2]_SHAD ,(Shadow)PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1]_SHAD ,(Shadow)PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0]_SHAD ,(Shadow)PWM 0 output level for active state" "Low,High" line.long 0x14 "PRDS,PWM 0 period shadow register" hexmask.long.word 0x14 0.--15. 1. " PRD_SHAD ,(Shadow)Period cycle minus 1" line.long 0x18 "PRSCS,PWM 0 prescale shadow register" hexmask.long.word 0x18 0.--15. 1. " PRSC_SHAD ,(Shadow)Prescaler value" line.long 0x1C "SYNDELS,PWM 0 synchronization delay shadow register" hexmask.long.word 0x1C 0.--15. 1. " DLY_SHAD ,(Shadow)Value in system clock cycles of the delay between the sync_in and sync_out pins" width 15. rgroup.long 0x900++0x17 line.long 0x0 "MTCHACTS(0),PWM 0 match active shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x4 "MTCHACTS(1),PWM 0 match active shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x8 "MTCHACTS(2),PWM 0 match active shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0xC "MTCHACTS(3),PWM 0 match active shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x10 "MTCHACTS(4),PWM 0 match active shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x14 "MTCHACTS(5),PWM 0 match active shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" group.long 0xA00++0x17 line.long 0x0 "MTCHDEACTS(0),PWM 0 match deactive shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x4 "MTCHDEACTS(1),PWM 0 match deactive shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x8 "MTCHDEACTS(2),PWM 0 match deactive shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0xC "MTCHDEACTS(3),PWM 0 match deactive shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x10 "MTCHDEACTS(4),PWM 0 match deactive shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x14 "MTCHDEACTS(5),PWM 0 match deactive shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" tree.end width 0xB tree.end tree "PWM 1" base ad:0xE00C6000 width 12. group.long 0x00++0x1F line.long 0x00 "MODECTL,PWM 1 mode control register" bitfld.long 0x00 7. " UPD_ENA ,Enables synchronization to the PWM domain" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TRANS_ENA ,Enables transfer to the compare registers" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TRANS_ENA_SEL ,Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL ,Selection of the synchronization source" "Internal,Sync_in" textline " " bitfld.long 0x00 3. " SYNC_OUT_ENA ,Sync_out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RUN_ONCE ,PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET ,Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA ,Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTL,PWM 1 trap control register" bitfld.long 0x04 16. " TRAP_POL ,The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5] ,Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4] ,Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3] ,Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2] ,Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1] ,Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0] ,Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTL,PWM 1 capture control register" bitfld.long 0x08 6.--7. " CAPT_EDGE3 ,Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2 ,Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 2.--3. " CAPT_EDGE1 ,Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 0.--1. " CAPT_EDGE0 ,Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRC,PWM 1 capture source register" bitfld.long 0x0C 6.--7. " CAPT_SRC3 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM1 CAPT3 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 4.--5. " CAPT_SRC2 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM1 CAPT3 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1 ,Select the source of capture channel 2 to trigger capture of the PWM" "PWM1 CAPT1 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 0.--1. " CAPT_SRC0 ,Select the source of capture channel 1 to trigger capture of the PWM" "PWM1 CAPT0 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRL,PWM 1 control register" bitfld.long 0x10 21. " BURST_ENA[5] ,PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4] ,PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3] ,PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2] ,PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1] ,PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0] ,PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5] ,PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4] ,PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3] ,PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2] ,PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1] ,PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0] ,PWM 0 output level for active state" "Low,High" line.long 0x14 "PRD,PWM 1 period register" hexmask.long.word 0x14 0.--15. 1. " PRD ,Period cycle minus 1" line.long 0x18 "PRSC,PWM 1 prescale register" hexmask.long.word 0x18 0.--15. 1. " PRSC ,Prescaler value" line.long 0x1C "SYNDEL,PWM 1 synchronization delay register" hexmask.long.word 0x1C 0.--15. 1. " DLY ,Value in system clock cycles of the delay between the sync_in and sync_out pins" rgroup.long 0x20++0x3 line.long 0x00 "CNT,PWM 1 counter value" hexmask.long.word 0x00 0.--15. 1. " CNT ,PWM counter value" group.long 0x100++0x17 line.long 0x0 "MTCHACT0,PWM 1 match active register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x4 "MTCHACT1,PWM 1 match active register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x8 "MTCHACT2,PWM 1 match active register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0xC "MTCHACT3,PWM 1 match active register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x10 "MTCHACT4,PWM 1 match active register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x14 "MTCHACT5,PWM 1 match active register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,The first (activation) match value" group.long 0x200++0x17 line.long 0x0 "MTCHDEACT0,PWM 1 match deactive register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x4 "MTCHDEACT1,PWM 1 match deactive register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x8 "MTCHDEACT2,PWM 1 match deactive register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0xC "MTCHDEACT3,PWM 1 match deactive register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x10 "MTCHDEACT4,PWM 1 match deactive register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x14 "MTCHDEACT5,PWM 1 match deactive register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" rgroup.long 0x300++0xF line.long 0x0 "CAPT0,PWM 1 capture register" hexmask.long.word 0x0 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x4 "CAPT1,PWM 1 capture register" hexmask.long.word 0x4 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x8 "CAPT2,PWM 1 capture register" hexmask.long.word 0x8 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0xC "CAPT3,PWM 1 capture register" hexmask.long.word 0xC 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" group.long 0xF98++0x7 line.long 0x00 "INT_STATUS,PWM interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EMGY_set/clr ,Trap emergency event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " UD_set/clr ,Update done" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TD_set/clr ,Transfer done" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CO_set/clr ,PWM counter overflow" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,PWM interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " EMGY_set/clr ,Trap emergency event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " UD_set/clr ,Update done" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TD_set/clr ,Transfer done" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CO_set/clr ,PWM counter overflow" "Disabled,Enabled" width 17. group.long 0xFB0++0x7 line.long 0x00 "INT_MTCH_STATUS,Match interrupt status register" setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " MTCHACT5_set/clr , PWM counter value matching MTCHACT0" "No interrupt,Interrupt" line.long 0x04 "INT_MTCH_ENABLE,Match interrupt enable register" setclrfld.long 0x04 11. -0x04 11. -0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "Disabled,Enabled" setclrfld.long 0x04 10. -0x04 10. -0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. -0x04 9. -0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "Disabled,Enabled" setclrfld.long 0x04 8. -0x04 8. -0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. -0x04 7. -0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " MTCHACT0_set/clr , PWM counter value matching MTCHACT0" "Disabled,Enabled" group.long 0xFC8++0x7 line.long 0x00 "INT_CAPT_STATUS,Capture interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " CAPT3_set/clr ,Capture channel 3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " CAPT2_set/clr ,Capture channel 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " CAPT1_set/clr ,Capture channel 1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CAPT0_set/clr ,Capture channel 0" "No interrupt,Interrupt" line.long 0x04 "INT_CAPT_ENABLE,Capture interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " CAPT3_set/clr ,Capture channel 3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " CAPT2_set/clr ,Capture channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " CAPT1_set/clr ,Capture channel 1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CAPT0_set/clr ,Capture channel 0" "Disabled,Enabled" tree "Shadow Registers" width 10. rgroup.long 0x800++0x1F line.long 0x00 "MODECTLS,PWM 1 mode control shadow register" bitfld.long 0x00 5. " TRANS_ENA_SEL_SYNC ,(Shadow)Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL_SYNC ,(Shadow)Selection of the synchronization source" "Sync_in pin,Internal" textline " " bitfld.long 0x00 2. " RUN_ONCE_SYNC ,(Shadow)PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET_SYNC ,(Shadow)Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA_SYNC ,(Shadow)Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTLS,PWM 1 trap control shadow register" bitfld.long 0x04 16. " TRAP_POL_SYNC ,(Shadow)The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5]_SYNC ,(Shadow)Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4]_SYNC ,(Shadow)Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3]_SYNC ,(Shadow)Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2]_SYNC ,(Shadow)Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1]_SYNC ,(Shadow)Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0]_SYNC ,(Shadow)Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTLS,PWM 1 capture control shadow register" bitfld.long 0x08 6.--7. " CAPT_EDGE3_SYNC ,(Shadow)Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2_SYNC ,(Shadow)Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 2.--3. " CAPT_EDGE1_SYNC ,(Shadow)Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 0.--1. " CAPT_EDGE0_SYNC ,(Shadow)Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRCS,PWM 1 capture source shadow register" bitfld.long 0x0C 6.--7. " CAPT_SRC3_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM1 CAPT3 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 4.--5. " CAPT_SRC2_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM1 CAPT3 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1_SYNC ,(Shadow)Select the source of capture channel 2 to trigger capture of the PWM" "PWM1 CAPT1 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 0.--1. " CAPT_SRC0_SYNC ,(Shadow)Select the source of capture channel 1 to trigger capture of the PWM" "PWM1 CAPT0 signal,sync_in signal,PWM1 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRLS,PWM 1 control shadow register" bitfld.long 0x10 21. " BURST_ENA[5]_SHAD ,(Shadow)PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4]_SHAD ,(Shadow)PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3]_SHAD ,(Shadow)PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2]_SHAD ,(Shadow)PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1]_SHAD ,(Shadow)PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0]_SHAD ,(Shadow)PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5]_SHAD ,(Shadow)PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4]_SHAD ,(Shadow)PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3]_SHAD ,(Shadow)PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2]_SHAD ,(Shadow)PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1]_SHAD ,(Shadow)PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0]_SHAD ,(Shadow)PWM 0 output level for active state" "Low,High" line.long 0x14 "PRDS,PWM 1 period shadow register" hexmask.long.word 0x14 0.--15. 1. " PRD_SHAD ,(Shadow)Period cycle minus 1" line.long 0x18 "PRSCS,PWM 1 prescale shadow register" hexmask.long.word 0x18 0.--15. 1. " PRSC_SHAD ,(Shadow)Prescaler value" line.long 0x1C "SYNDELS,PWM 1 synchronization delay shadow register" hexmask.long.word 0x1C 0.--15. 1. " DLY_SHAD ,(Shadow)Value in system clock cycles of the delay between the sync_in and sync_out pins" width 15. rgroup.long 0x900++0x17 line.long 0x0 "MTCHACTS(0),PWM 1 match active shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x4 "MTCHACTS(1),PWM 1 match active shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x8 "MTCHACTS(2),PWM 1 match active shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0xC "MTCHACTS(3),PWM 1 match active shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x10 "MTCHACTS(4),PWM 1 match active shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x14 "MTCHACTS(5),PWM 1 match active shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" group.long 0xA00++0x17 line.long 0x0 "MTCHDEACTS(0),PWM 1 match deactive shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x4 "MTCHDEACTS(1),PWM 1 match deactive shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x8 "MTCHDEACTS(2),PWM 1 match deactive shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0xC "MTCHDEACTS(3),PWM 1 match deactive shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x10 "MTCHDEACTS(4),PWM 1 match deactive shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x14 "MTCHDEACTS(5),PWM 1 match deactive shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" tree.end width 0xB tree.end tree "PWM 2" base ad:0xE00C7000 width 12. group.long 0x00++0x1F line.long 0x00 "MODECTL,PWM 2 mode control register" bitfld.long 0x00 7. " UPD_ENA ,Enables synchronization to the PWM domain" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TRANS_ENA ,Enables transfer to the compare registers" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TRANS_ENA_SEL ,Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL ,Selection of the synchronization source" "Internal,Sync_in" textline " " bitfld.long 0x00 3. " SYNC_OUT_ENA ,Sync_out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RUN_ONCE ,PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET ,Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA ,Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTL,PWM 2 trap control register" bitfld.long 0x04 16. " TRAP_POL ,The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5] ,Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4] ,Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3] ,Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2] ,Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1] ,Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0] ,Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTL,PWM 2 capture control register" bitfld.long 0x08 6.--7. " CAPT_EDGE3 ,Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2 ,Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 2.--3. " CAPT_EDGE1 ,Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 0.--1. " CAPT_EDGE0 ,Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRC,PWM 2 capture source register" bitfld.long 0x0C 6.--7. " CAPT_SRC3 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM2 CAPT3 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 4.--5. " CAPT_SRC2 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM2 CAPT3 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1 ,Select the source of capture channel 2 to trigger capture of the PWM" "PWM2 CAPT1 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 0.--1. " CAPT_SRC0 ,Select the source of capture channel 1 to trigger capture of the PWM" "PWM2 CAPT0 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRL,PWM 2 control register" bitfld.long 0x10 21. " BURST_ENA[5] ,PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4] ,PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3] ,PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2] ,PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1] ,PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0] ,PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5] ,PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4] ,PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3] ,PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2] ,PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1] ,PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0] ,PWM 0 output level for active state" "Low,High" line.long 0x14 "PRD,PWM 2 period register" hexmask.long.word 0x14 0.--15. 1. " PRD ,Period cycle minus 1" line.long 0x18 "PRSC,PWM 2 prescale register" hexmask.long.word 0x18 0.--15. 1. " PRSC ,Prescaler value" line.long 0x1C "SYNDEL,PWM 2 synchronization delay register" hexmask.long.word 0x1C 0.--15. 1. " DLY ,Value in system clock cycles of the delay between the sync_in and sync_out pins" rgroup.long 0x20++0x3 line.long 0x00 "CNT,PWM 2 counter value" hexmask.long.word 0x00 0.--15. 1. " CNT ,PWM counter value" group.long 0x100++0x17 line.long 0x0 "MTCHACT0,PWM 2 match active register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x4 "MTCHACT1,PWM 2 match active register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x8 "MTCHACT2,PWM 2 match active register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0xC "MTCHACT3,PWM 2 match active register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x10 "MTCHACT4,PWM 2 match active register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x14 "MTCHACT5,PWM 2 match active register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,The first (activation) match value" group.long 0x200++0x17 line.long 0x0 "MTCHDEACT0,PWM 2 match deactive register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x4 "MTCHDEACT1,PWM 2 match deactive register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x8 "MTCHDEACT2,PWM 2 match deactive register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0xC "MTCHDEACT3,PWM 2 match deactive register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x10 "MTCHDEACT4,PWM 2 match deactive register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x14 "MTCHDEACT5,PWM 2 match deactive register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" rgroup.long 0x300++0xF line.long 0x0 "CAPT0,PWM 2 capture register" hexmask.long.word 0x0 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x4 "CAPT1,PWM 2 capture register" hexmask.long.word 0x4 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x8 "CAPT2,PWM 2 capture register" hexmask.long.word 0x8 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0xC "CAPT3,PWM 2 capture register" hexmask.long.word 0xC 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" group.long 0xF98++0x7 line.long 0x00 "INT_STATUS,PWM interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EMGY_set/clr ,Trap emergency event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " UD_set/clr ,Update done" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TD_set/clr ,Transfer done" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CO_set/clr ,PWM counter overflow" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,PWM interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " EMGY_set/clr ,Trap emergency event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " UD_set/clr ,Update done" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TD_set/clr ,Transfer done" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CO_set/clr ,PWM counter overflow" "Disabled,Enabled" width 17. group.long 0xFB0++0x7 line.long 0x00 "INT_MTCH_STATUS,Match interrupt status register" setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " MTCHACT5_set/clr , PWM counter value matching MTCHACT0" "No interrupt,Interrupt" line.long 0x04 "INT_MTCH_ENABLE,Match interrupt enable register" setclrfld.long 0x04 11. -0x04 11. -0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "Disabled,Enabled" setclrfld.long 0x04 10. -0x04 10. -0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. -0x04 9. -0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "Disabled,Enabled" setclrfld.long 0x04 8. -0x04 8. -0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. -0x04 7. -0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " MTCHACT0_set/clr , PWM counter value matching MTCHACT0" "Disabled,Enabled" group.long 0xFC8++0x7 line.long 0x00 "INT_CAPT_STATUS,Capture interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " CAPT3_set/clr ,Capture channel 3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " CAPT2_set/clr ,Capture channel 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " CAPT1_set/clr ,Capture channel 1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CAPT0_set/clr ,Capture channel 0" "No interrupt,Interrupt" line.long 0x04 "INT_CAPT_ENABLE,Capture interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " CAPT3_set/clr ,Capture channel 3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " CAPT2_set/clr ,Capture channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " CAPT1_set/clr ,Capture channel 1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CAPT0_set/clr ,Capture channel 0" "Disabled,Enabled" tree "Shadow Registers" width 10. rgroup.long 0x800++0x1F line.long 0x00 "MODECTLS,PWM 2 mode control shadow register" bitfld.long 0x00 5. " TRANS_ENA_SEL_SYNC ,(Shadow)Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL_SYNC ,(Shadow)Selection of the synchronization source" "Sync_in pin,Internal" textline " " bitfld.long 0x00 2. " RUN_ONCE_SYNC ,(Shadow)PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET_SYNC ,(Shadow)Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA_SYNC ,(Shadow)Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTLS,PWM 2 trap control shadow register" bitfld.long 0x04 16. " TRAP_POL_SYNC ,(Shadow)The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5]_SYNC ,(Shadow)Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4]_SYNC ,(Shadow)Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3]_SYNC ,(Shadow)Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2]_SYNC ,(Shadow)Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1]_SYNC ,(Shadow)Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0]_SYNC ,(Shadow)Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTLS,PWM 2 capture control shadow register" bitfld.long 0x08 6.--7. " CAPT_EDGE3_SYNC ,(Shadow)Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2_SYNC ,(Shadow)Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 2.--3. " CAPT_EDGE1_SYNC ,(Shadow)Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 0.--1. " CAPT_EDGE0_SYNC ,(Shadow)Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRCS,PWM 2 capture source shadow register" bitfld.long 0x0C 6.--7. " CAPT_SRC3_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM2 CAPT3 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 4.--5. " CAPT_SRC2_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM2 CAPT3 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1_SYNC ,(Shadow)Select the source of capture channel 2 to trigger capture of the PWM" "PWM2 CAPT1 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 0.--1. " CAPT_SRC0_SYNC ,(Shadow)Select the source of capture channel 1 to trigger capture of the PWM" "PWM2 CAPT0 signal,sync_in signal,PWM2 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRLS,PWM 2 control shadow register" bitfld.long 0x10 21. " BURST_ENA[5]_SHAD ,(Shadow)PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4]_SHAD ,(Shadow)PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3]_SHAD ,(Shadow)PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2]_SHAD ,(Shadow)PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1]_SHAD ,(Shadow)PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0]_SHAD ,(Shadow)PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5]_SHAD ,(Shadow)PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4]_SHAD ,(Shadow)PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3]_SHAD ,(Shadow)PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2]_SHAD ,(Shadow)PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1]_SHAD ,(Shadow)PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0]_SHAD ,(Shadow)PWM 0 output level for active state" "Low,High" line.long 0x14 "PRDS,PWM 2 period shadow register" hexmask.long.word 0x14 0.--15. 1. " PRD_SHAD ,(Shadow)Period cycle minus 1" line.long 0x18 "PRSCS,PWM 2 prescale shadow register" hexmask.long.word 0x18 0.--15. 1. " PRSC_SHAD ,(Shadow)Prescaler value" line.long 0x1C "SYNDELS,PWM 2 synchronization delay shadow register" hexmask.long.word 0x1C 0.--15. 1. " DLY_SHAD ,(Shadow)Value in system clock cycles of the delay between the sync_in and sync_out pins" width 15. rgroup.long 0x900++0x17 line.long 0x0 "MTCHACTS(0),PWM 2 match active shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x4 "MTCHACTS(1),PWM 2 match active shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x8 "MTCHACTS(2),PWM 2 match active shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0xC "MTCHACTS(3),PWM 2 match active shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x10 "MTCHACTS(4),PWM 2 match active shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x14 "MTCHACTS(5),PWM 2 match active shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" group.long 0xA00++0x17 line.long 0x0 "MTCHDEACTS(0),PWM 2 match deactive shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x4 "MTCHDEACTS(1),PWM 2 match deactive shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x8 "MTCHDEACTS(2),PWM 2 match deactive shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0xC "MTCHDEACTS(3),PWM 2 match deactive shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x10 "MTCHDEACTS(4),PWM 2 match deactive shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x14 "MTCHDEACTS(5),PWM 2 match deactive shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" tree.end width 0xB tree.end tree "PWM 3" base ad:0xE00C8000 width 12. group.long 0x00++0x1F line.long 0x00 "MODECTL,PWM 3 mode control register" bitfld.long 0x00 7. " UPD_ENA ,Enables synchronization to the PWM domain" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " TRANS_ENA ,Enables transfer to the compare registers" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TRANS_ENA_SEL ,Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL ,Selection of the synchronization source" "Internal,Sync_in" textline " " bitfld.long 0x00 3. " SYNC_OUT_ENA ,Sync_out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RUN_ONCE ,PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET ,Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA ,Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTL,PWM 3 trap control register" bitfld.long 0x04 16. " TRAP_POL ,The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5] ,Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4] ,Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3] ,Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2] ,Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1] ,Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0] ,Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTL,PWM 3 capture control register" bitfld.long 0x08 6.--7. " CAPT_EDGE3 ,Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2 ,Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 2.--3. " CAPT_EDGE1 ,Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 0.--1. " CAPT_EDGE0 ,Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRC,PWM 3 capture source register" bitfld.long 0x0C 6.--7. " CAPT_SRC3 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM3 CAPT3 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 4.--5. " CAPT_SRC2 ,Select the source of capture channel 3 to trigger capture of the PWM" "PWM3 CAPT3 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1 ,Select the source of capture channel 2 to trigger capture of the PWM" "PWM3 CAPT1 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" bitfld.long 0x0C 0.--1. " CAPT_SRC0 ,Select the source of capture channel 1 to trigger capture of the PWM" "PWM3 CAPT0 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRL,PWM 3 control register" bitfld.long 0x10 21. " BURST_ENA[5] ,PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4] ,PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3] ,PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2] ,PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1] ,PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0] ,PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5] ,PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4] ,PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3] ,PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2] ,PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1] ,PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0] ,PWM 0 output level for active state" "Low,High" line.long 0x14 "PRD,PWM 3 period register" hexmask.long.word 0x14 0.--15. 1. " PRD ,Period cycle minus 1" line.long 0x18 "PRSC,PWM 3 prescale register" hexmask.long.word 0x18 0.--15. 1. " PRSC ,Prescaler value" line.long 0x1C "SYNDEL,PWM 3 synchronization delay register" hexmask.long.word 0x1C 0.--15. 1. " DLY ,Value in system clock cycles of the delay between the sync_in and sync_out pins" rgroup.long 0x20++0x3 line.long 0x00 "CNT,PWM 3 counter value" hexmask.long.word 0x00 0.--15. 1. " CNT ,PWM counter value" group.long 0x100++0x17 line.long 0x0 "MTCHACT0,PWM 3 match active register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x4 "MTCHACT1,PWM 3 match active register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x8 "MTCHACT2,PWM 3 match active register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0xC "MTCHACT3,PWM 3 match active register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x10 "MTCHACT4,PWM 3 match active register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,The first (activation) match value" line.long 0x14 "MTCHACT5,PWM 3 match active register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,The first (activation) match value" group.long 0x200++0x17 line.long 0x0 "MTCHDEACT0,PWM 3 match deactive register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x4 "MTCHDEACT1,PWM 3 match deactive register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x8 "MTCHDEACT2,PWM 3 match deactive register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0xC "MTCHDEACT3,PWM 3 match deactive register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x10 "MTCHDEACT4,PWM 3 match deactive register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" line.long 0x14 "MTCHDEACT5,PWM 3 match deactive register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,The second (deactivation) match value" rgroup.long 0x300++0xF line.long 0x0 "CAPT0,PWM 3 capture register" hexmask.long.word 0x0 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x4 "CAPT1,PWM 3 capture register" hexmask.long.word 0x4 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0x8 "CAPT2,PWM 3 capture register" hexmask.long.word 0x8 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" line.long 0xC "CAPT3,PWM 3 capture register" hexmask.long.word 0xC 0.--15. 1. " CAPT ,The PWM counter value captured at the event programmed on the capture channel pin" group.long 0xF98++0x7 line.long 0x00 "INT_STATUS,PWM interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " EMGY_set/clr ,Trap emergency event" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " UD_set/clr ,Update done" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TD_set/clr ,Transfer done" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CO_set/clr ,PWM counter overflow" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,PWM interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " EMGY_set/clr ,Trap emergency event" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " UD_set/clr ,Update done" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TD_set/clr ,Transfer done" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CO_set/clr ,PWM counter overflow" "Disabled,Enabled" width 17. group.long 0xFB0++0x7 line.long 0x00 "INT_MTCH_STATUS,Match interrupt status register" setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "No interrupt,Interrupt" setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "No interrupt,Interrupt" setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "No interrupt,Interrupt" setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "No interrupt,Interrupt" setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " MTCHACT5_set/clr , PWM counter value matching MTCHACT0" "No interrupt,Interrupt" line.long 0x04 "INT_MTCH_ENABLE,Match interrupt enable register" setclrfld.long 0x04 11. -0x04 11. -0x08 11. " MTCHDEACT5_set/clr , PWM counter value matching MTCHDEACT5" "Disabled,Enabled" setclrfld.long 0x04 10. -0x04 10. -0x08 10. " MTCHDEACT4_set/clr , PWM counter value matching MTCHDEACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. -0x04 9. -0x08 9. " MTCHDEACT3_set/clr , PWM counter value matching MTCHDEACT3" "Disabled,Enabled" setclrfld.long 0x04 8. -0x04 8. -0x08 8. " MTCHDEACT2_set/clr , PWM counter value matching MTCHDEACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. -0x04 7. -0x08 7. " MTCHDEACT1_set/clr , PWM counter value matching MTCHDEACT1" "Disabled,Enabled" setclrfld.long 0x04 6. -0x04 6. -0x08 6. " MTCHDEACT0_set/clr , PWM counter value matching MTCHDEACT0" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " MTCHACT5_set/clr , PWM counter value matching MTCHACT5" "Disabled,Enabled" setclrfld.long 0x04 4. -0x04 4. -0x08 4. " MTCHACT4_set/clr , PWM counter value matching MTCHACT4" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " MTCHACT3_set/clr , PWM counter value matching MTCHACT3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " MTCHACT2_set/clr , PWM counter value matching MTCHACT2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " MTCHACT1_set/clr , PWM counter value matching MTCHACT1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " MTCHACT0_set/clr , PWM counter value matching MTCHACT0" "Disabled,Enabled" group.long 0xFC8++0x7 line.long 0x00 "INT_CAPT_STATUS,Capture interrupt status register" setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " CAPT3_set/clr ,Capture channel 3" "No interrupt,Interrupt" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " CAPT2_set/clr ,Capture channel 2" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " CAPT1_set/clr ,Capture channel 1" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " CAPT0_set/clr ,Capture channel 0" "No interrupt,Interrupt" line.long 0x04 "INT_CAPT_ENABLE,Capture interrupt enable register" setclrfld.long 0x04 3. -0x04 3. -0x08 3. " CAPT3_set/clr ,Capture channel 3" "Disabled,Enabled" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " CAPT2_set/clr ,Capture channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " CAPT1_set/clr ,Capture channel 1" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " CAPT0_set/clr ,Capture channel 0" "Disabled,Enabled" tree "Shadow Registers" width 10. rgroup.long 0x800++0x1F line.long 0x00 "MODECTLS,PWM 3 mode control shadow register" bitfld.long 0x00 5. " TRANS_ENA_SEL_SYNC ,(Shadow)Selection of the enable signal" "MODECTL[TRANS_ENA],High on trans_enable_in pin" textline " " bitfld.long 0x00 4. " SYNC_SEL_SYNC ,(Shadow)Selection of the synchronization source" "Sync_in pin,Internal" textline " " bitfld.long 0x00 2. " RUN_ONCE_SYNC ,(Shadow)PWM counter stops at the end of current cycle" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CNT_RESET_SYNC ,(Shadow)Synchronously reset PWM counter and prescale counter" "No effect,Reset" textline " " bitfld.long 0x00 0. " CNT_ENA_SYNC ,(Shadow)Enables the PWM counter and prescale counter" "Disabled,Enabled" line.long 0x04 "TRPCTLS,PWM 3 trap control shadow register" bitfld.long 0x04 16. " TRAP_POL_SYNC ,(Shadow)The asynchronous trap input activation" "Low/Falling,High/Rising" bitfld.long 0x04 5. " TRAP_ENA[5]_SYNC ,(Shadow)Trap function for the corresponding PWM 5 output" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TRAP_ENA[4]_SYNC ,(Shadow)Trap function for the corresponding PWM 4 output" "Disabled,Enabled" bitfld.long 0x04 3. " TRAP_ENA[3]_SYNC ,(Shadow)Trap function for the corresponding PWM 3 output" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " TRAP_ENA[2]_SYNC ,(Shadow)Trap function for the corresponding PWM 2 output" "Disabled,Enabled" bitfld.long 0x04 1. " TRAP_ENA[1]_SYNC ,(Shadow)Trap function for the corresponding PWM 1 output" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " TRAP_ENA[0]_SYNC ,(Shadow)Trap function for the corresponding PWM 0 output" "Disabled,Enabled" line.long 0x08 "CAPTCTLS,PWM 3 capture control shadow register" bitfld.long 0x08 6.--7. " CAPT_EDGE3_SYNC ,(Shadow)Select the edge of the capture channel 3 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 4.--5. " CAPT_EDGE2_SYNC ,(Shadow)Select the edge of the capture channel 2 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" textline " " bitfld.long 0x08 2.--3. " CAPT_EDGE1_SYNC ,(Shadow)Select the edge of the capture channel 1 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" bitfld.long 0x08 0.--1. " CAPT_EDGE0_SYNC ,(Shadow)Select the edge of the capture channel 0 to trigger capture of the PWM" "Disabled,Rising edge,Falling edge,Both edges" line.long 0x0C "CAPTSRCS,PWM 3 capture source shadow register" bitfld.long 0x0C 6.--7. " CAPT_SRC3_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM3 CAPT3 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 4.--5. " CAPT_SRC2_SYNC ,(Shadow)Select the source of capture channel 3 to trigger capture of the PWM" "PWM3 CAPT3 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 2.--3. " CAPT_SRC1_SYNC ,(Shadow)Select the source of capture channel 2 to trigger capture of the PWM" "PWM3 CAPT1 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" textline " " bitfld.long 0x0C 0.--1. " CAPT_SRC0_SYNC ,(Shadow)Select the source of capture channel 1 to trigger capture of the PWM" "PWM3 CAPT0 signal,sync_in signal,PWM3 TRAP signal,Trans_enable_in signal" line.long 0x10 "CTRLS,PWM 3 control shadow register" bitfld.long 0x10 21. " BURST_ENA[5]_SHAD ,(Shadow)PWM 5 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 20. " BURST_ENA[4]_SHAD ,(Shadow)PWM 4 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " BURST_ENA[3]_SHAD ,(Shadow)PWM 3 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 18. " BURST_ENA[2]_SHAD ,(Shadow)PWM 2 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " BURST_ENA[1]_SHAD ,(Shadow)PWM 1 is mixed with the external carrier input" "Disabled,Enabled" bitfld.long 0x10 16. " BURST_ENA[0]_SHAD ,(Shadow)PWM 0 is mixed with the external carrier input" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " ACT_LVL[5]_SHAD ,(Shadow)PWM 5 output is at a High level for the active state" "Low,High" bitfld.long 0x10 4. " ACT_LVL[4]_SHAD ,(Shadow)PWM 4 output level for active state" "Low,High" textline " " bitfld.long 0x10 3. " ACT_LVL[3]_SHAD ,(Shadow)PWM 3 output level for active state" "Low,High" bitfld.long 0x10 2. " ACT_LVL[2]_SHAD ,(Shadow)PWM 2 output level for active state" "Low,High" textline " " bitfld.long 0x10 1. " ACT_LVL[1]_SHAD ,(Shadow)PWM 1 output level for active state" "Low,High" bitfld.long 0x10 0. " ACT_LVL[0]_SHAD ,(Shadow)PWM 0 output level for active state" "Low,High" line.long 0x14 "PRDS,PWM 3 period shadow register" hexmask.long.word 0x14 0.--15. 1. " PRD_SHAD ,(Shadow)Period cycle minus 1" line.long 0x18 "PRSCS,PWM 3 prescale shadow register" hexmask.long.word 0x18 0.--15. 1. " PRSC_SHAD ,(Shadow)Prescaler value" line.long 0x1C "SYNDELS,PWM 3 synchronization delay shadow register" hexmask.long.word 0x1C 0.--15. 1. " DLY_SHAD ,(Shadow)Value in system clock cycles of the delay between the sync_in and sync_out pins" width 15. rgroup.long 0x900++0x17 line.long 0x0 "MTCHACTS(0),PWM 3 match active shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x4 "MTCHACTS(1),PWM 3 match active shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x8 "MTCHACTS(2),PWM 3 match active shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0xC "MTCHACTS(3),PWM 3 match active shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x10 "MTCHACTS(4),PWM 3 match active shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" line.long 0x14 "MTCHACTS(5),PWM 3 match active shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHACT ,(Shadow)The first (activation) match value" group.long 0xA00++0x17 line.long 0x0 "MTCHDEACTS(0),PWM 3 match deactive shadow register" hexmask.long.word 0x0 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x4 "MTCHDEACTS(1),PWM 3 match deactive shadow register" hexmask.long.word 0x4 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x8 "MTCHDEACTS(2),PWM 3 match deactive shadow register" hexmask.long.word 0x8 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0xC "MTCHDEACTS(3),PWM 3 match deactive shadow register" hexmask.long.word 0xC 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x10 "MTCHDEACTS(4),PWM 3 match deactive shadow register" hexmask.long.word 0x10 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" line.long 0x14 "MTCHDEACTS(5),PWM 3 match deactive shadow register" hexmask.long.word 0x14 0.--15. 1. " MTCHDEACT ,(Shadow)The second (deactivation) match value" tree.end width 0xB tree.end tree.end tree.open "ADC (Analog-to-Digital Converter)" sif (cpu()=="LPC2927"||cpu()=="LPC2929"||cpuis("LPC293*")||cpu()=="LPC2926") tree "ADC 0" base ad:0xE00C2000 width 17. group.long 0x00++0x1F line.long 0x0 "ACC0,ADC channel 0 configuration register" bitfld.long 0x0 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x4 "ACC1,ADC channel 1 configuration register" bitfld.long 0x4 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x8 "ACC2,ADC channel 2 configuration register" bitfld.long 0x8 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0xC "ACC3,ADC channel 3 configuration register" bitfld.long 0xC 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x10 "ACC4,ADC channel 4 configuration register" bitfld.long 0x10 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x14 "ACC5,ADC channel 5 configuration register" bitfld.long 0x14 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x18 "ACC6,ADC channel 6 configuration register" bitfld.long 0x18 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x1C "ACC7,ADC channel 7 configuration register" bitfld.long 0x1C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." group.long 0x100++0x1F line.long 0x0 "COMP0,ADC channel 0 compare register" bitfld.long 0x0 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x0 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x4 "COMP1,ADC channel 1 compare register" bitfld.long 0x4 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x4 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x8 "COMP2,ADC channel 2 compare register" bitfld.long 0x8 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x8 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0xC "COMP3,ADC channel 3 compare register" bitfld.long 0xC 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0xC 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x10 "COMP4,ADC channel 4 compare register" bitfld.long 0x10 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x10 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x14 "COMP5,ADC channel 5 compare register" bitfld.long 0x14 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x14 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x18 "COMP6,ADC channel 6 compare register" bitfld.long 0x18 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x18 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x1C "COMP7,ADC channel 7 compare register" bitfld.long 0x1C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x1C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" rgroup.long 0x200++0x1F line.long 0x0 "ACD0,ADC channel 0 conversion data register" hexmask.long.word 0x0 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x4 "ACD1,ADC channel 1 conversion data register" hexmask.long.word 0x4 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x8 "ACD2,ADC channel 2 conversion data register" hexmask.long.word 0x8 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0xC "ACD3,ADC channel 3 conversion data register" hexmask.long.word 0xC 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x10 "ACD4,ADC channel 4 conversion data register" hexmask.long.word 0x10 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x14 "ACD5,ADC channel 5 conversion data register" hexmask.long.word 0x14 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x18 "ACD6,ADC channel 6 conversion data register" hexmask.long.word 0x18 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x1C "ACD7,ADC channel 7 conversion data register" hexmask.long.word 0x1C 0.--9. 1. " ACD ,Conversion data (voltage)" rgroup.long 0x300++0x3 line.long 0x00 "COMP_STATUS,Compare-status register" bitfld.long 0x00 7. " COMP_STATUS_7 ,Compare match of channel 7" "Not occurred,Occurred" textline " " bitfld.long 0x00 6. " COMP_STATUS_6 ,Compare match of channel 6" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " COMP_STATUS_5 ,Compare match of channel 5" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " COMP_STATUS_4 ,Compare match of channel 4" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " COMP_STATUS_3 ,Compare match of channel 3" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " COMP_STATUS_2 ,Compare match of channel 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " COMP_STATUS_1 ,Compare match of channel 1" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " COMP_STATUS_0 ,Compare match of channel 0" "Not occurred,Occurred" wgroup.long 0x304++0x3 line.long 0x00 "COMP_STATUS_CLR,Compare-status clear register" bitfld.long 0x00 7. " COMP_STATUS_CLR_7 ,Clears the compare match of channel 7" "No effect,Cleared" textline " " bitfld.long 0x00 6. " COMP_STATUS_CLR_6 ,Clears the compare match of channel 6" "No effect,Cleared" textline " " bitfld.long 0x00 5. " COMP_STATUS_CLR_5 ,Clears the compare match of channel 5" "No effect,Cleared" textline " " bitfld.long 0x00 4. " COMP_STATUS_CLR_4 ,Clears the compare match of channel 4" "No effect,Cleared" textline " " bitfld.long 0x00 3. " COMP_STATUS_CLR_3 ,Clears the compare match of channel 3" "No effect,Cleared" textline " " bitfld.long 0x00 2. " COMP_STATUS_CLR_2 ,Clears the compare match of channel 2" "No effect,Cleared" textline " " bitfld.long 0x00 1. " COMP_STATUS_CLR_1 ,Clears the compare match of channel 1" "No effect,Cleared" textline " " bitfld.long 0x00 0. " COMP_STATUS_CLR_0 ,Clears the compare match of channel 0" "No effect,Cleared" group.long 0x400++0xB line.long 0x00 "ADC_CONFIG,ADC configuration register" bitfld.long 0x00 15. " NEGEDGE_START_3 ,Enable ADC starting on the negative edge of start 3" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " POSEDGE_START_3 ,Enable ADC starting on the positive edge of start 3" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " NEGEDGE_START_2 ,Enable ADC starting on the negative edge of start 2" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POSEDGE_START_2 ,Enable ADC starting on the positive edge of start 2" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " NEGEDGE_START_1 ,Enable ADC starting on the negative edge of start 1" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " POSEDGE_START_1 ,Enable ADC starting on the positive edge of start 1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " NEGEDGE_START_0 ,Enable ADC starting on the negative edge of start 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " POSEDGE_START_0 ,Enable ADC starting on the positive edge of start 0" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADC_PD ,Power-down mode" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " ADC_CSCAN ,ADC continuous scan" "Single,Continuous" line.long 0x04 "ADC_CONTROL,ADC control register" bitfld.long 0x04 2. " UPDATE ,Copy the configuration" "No effect,Copy" bitfld.long 0x04 1. " STOP ,Stop ADC conversion" "No effect,Stop" textline " " bitfld.long 0x04 0. " START ,Start ADC conversion" "No effect,Start" line.long 0x08 "ADC_STATUS,ADC status register" bitfld.long 0x08 1. " ADC_CONFIG ,Configuration status" "Older,Loaded" bitfld.long 0x08 0. " ADC_STATUS ,Conversion status" "Not busy,Busy" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " COMPARE_set/clr ,Compare match" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " SCAN_set/clr ,End of scan" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 1. -0x04 1. -0x08 1. " COMPARE_set/clr ,Compare match" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " SCAN_set/clr ,End of scan" "Disabled,Enabled" width 0xB tree.end endif tree "ADC 1" base ad:0xE00C3000 width 17. group.long 0x00++0x3F line.long 0x0 "ACC0,ADC channel 0 configuration register" bitfld.long 0x0 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x4 "ACC1,ADC channel 1 configuration register" bitfld.long 0x4 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x8 "ACC2,ADC channel 2 configuration register" bitfld.long 0x8 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0xC "ACC3,ADC channel 3 configuration register" bitfld.long 0xC 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x10 "ACC4,ADC channel 4 configuration register" bitfld.long 0x10 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x14 "ACC5,ADC channel 5 configuration register" bitfld.long 0x14 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x18 "ACC6,ADC channel 6 configuration register" bitfld.long 0x18 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x1C "ACC7,ADC channel 7 configuration register" bitfld.long 0x1C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x20 "ACC8,ADC channel 8 configuration register" bitfld.long 0x20 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x24 "ACC9,ADC channel 9 configuration register" bitfld.long 0x24 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x28 "ACC10,ADC channel 10 configuration register" bitfld.long 0x28 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x2C "ACC11,ADC channel 11 configuration register" bitfld.long 0x2C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x30 "ACC12,ADC channel 12 configuration register" bitfld.long 0x30 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x34 "ACC13,ADC channel 13 configuration register" bitfld.long 0x34 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x38 "ACC14,ADC channel 14 configuration register" bitfld.long 0x38 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x3C "ACC15,ADC channel 15 configuration register" bitfld.long 0x3C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." group.long 0x100++0x3F line.long 0x0 "COMP0,ADC channel 0 compare register" bitfld.long 0x0 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x0 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x4 "COMP1,ADC channel 1 compare register" bitfld.long 0x4 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x4 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x8 "COMP2,ADC channel 2 compare register" bitfld.long 0x8 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x8 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0xC "COMP3,ADC channel 3 compare register" bitfld.long 0xC 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0xC 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x10 "COMP4,ADC channel 4 compare register" bitfld.long 0x10 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x10 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x14 "COMP5,ADC channel 5 compare register" bitfld.long 0x14 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x14 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x18 "COMP6,ADC channel 6 compare register" bitfld.long 0x18 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x18 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x1C "COMP7,ADC channel 7 compare register" bitfld.long 0x1C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x1C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x20 "COMP8,ADC channel 8 compare register" bitfld.long 0x20 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x20 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x24 "COMP9,ADC channel 9 compare register" bitfld.long 0x24 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x24 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x28 "COMP10,ADC channel 10 compare register" bitfld.long 0x28 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x28 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x2C "COMP11,ADC channel 11 compare register" bitfld.long 0x2C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x2C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x30 "COMP12,ADC channel 12 compare register" bitfld.long 0x30 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x30 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x34 "COMP13,ADC channel 13 compare register" bitfld.long 0x34 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x34 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x38 "COMP14,ADC channel 14 compare register" bitfld.long 0x38 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x38 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x3C "COMP15,ADC channel 15 compare register" bitfld.long 0x3C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x3C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" rgroup.long 0x200++0x3F line.long 0x0 "ACD0,ADC channel 0 conversion data register" hexmask.long.word 0x0 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x4 "ACD1,ADC channel 1 conversion data register" hexmask.long.word 0x4 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x8 "ACD2,ADC channel 2 conversion data register" hexmask.long.word 0x8 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0xC "ACD3,ADC channel 3 conversion data register" hexmask.long.word 0xC 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x10 "ACD4,ADC channel 4 conversion data register" hexmask.long.word 0x10 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x14 "ACD5,ADC channel 5 conversion data register" hexmask.long.word 0x14 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x18 "ACD6,ADC channel 6 conversion data register" hexmask.long.word 0x18 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x1C "ACD7,ADC channel 7 conversion data register" hexmask.long.word 0x1C 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x20 "ACD8,ADC channel 8 conversion data register" hexmask.long.word 0x20 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x24 "ACD9,ADC channel 9 conversion data register" hexmask.long.word 0x24 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x28 "ACD10,ADC channel 10 conversion data register" hexmask.long.word 0x28 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x2C "ACD11,ADC channel 11 conversion data register" hexmask.long.word 0x2C 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x30 "ACD12,ADC channel 12 conversion data register" hexmask.long.word 0x30 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x34 "ACD13,ADC channel 13 conversion data register" hexmask.long.word 0x34 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x38 "ACD14,ADC channel 14 conversion data register" hexmask.long.word 0x38 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x3C "ACD15,ADC channel 15 conversion data register" hexmask.long.word 0x3C 0.--9. 1. " ACD ,Conversion data (voltage)" rgroup.long 0x300++0x3 line.long 0x00 "COMP_STATUS,Compare-status register" bitfld.long 0x00 15. " COMP_STATUS_15 ,Compare match of channel 15" "Not occurred,Occurred" textline " " bitfld.long 0x00 14. " COMP_STATUS_14 ,Compare match of channel 14" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " COMP_STATUS_13 ,Compare match of channel 13" "Not occurred,Occurred" textline " " bitfld.long 0x00 12. " COMP_STATUS_12 ,Compare match of channel 12" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " COMP_STATUS_11 ,Compare match of channel 11" "Not occurred,Occurred" textline " " bitfld.long 0x00 10. " COMP_STATUS_10 ,Compare match of channel 10" "Not occurred,Occurred" textline " " bitfld.long 0x00 9. " COMP_STATUS_9 ,Compare match of channel 9" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " COMP_STATUS_8 ,Compare match of channel 8" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " COMP_STATUS_7 ,Compare match of channel 7" "Not occurred,Occurred" textline " " bitfld.long 0x00 6. " COMP_STATUS_6 ,Compare match of channel 6" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " COMP_STATUS_5 ,Compare match of channel 5" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " COMP_STATUS_4 ,Compare match of channel 4" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " COMP_STATUS_3 ,Compare match of channel 3" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " COMP_STATUS_2 ,Compare match of channel 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " COMP_STATUS_1 ,Compare match of channel 1" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " COMP_STATUS_0 ,Compare match of channel 0" "Not occurred,Occurred" wgroup.long 0x304++0x3 line.long 0x00 "COMP_STATUS_CLR,Compare-status clear register" bitfld.long 0x00 15. " COMP_STATUS_CLR_15 ,Clears the compare match of channel 15" "No effect,Cleared" textline " " bitfld.long 0x00 14. " COMP_STATUS_CLR_14 ,Clears the compare match of channel 14" "No effect,Cleared" textline " " bitfld.long 0x00 13. " COMP_STATUS_CLR_13 ,Clears the compare match of channel 13" "No effect,Cleared" textline " " bitfld.long 0x00 12. " COMP_STATUS_CLR_12 ,Clears the compare match of channel 12" "No effect,Cleared" textline " " bitfld.long 0x00 11. " COMP_STATUS_CLR_11 ,Clears the compare match of channel 11" "No effect,Cleared" textline " " bitfld.long 0x00 10. " COMP_STATUS_CLR_10 ,Clears the compare match of channel 10" "No effect,Cleared" textline " " bitfld.long 0x00 9. " COMP_STATUS_CLR_9 ,Clears the compare match of channel 9" "No effect,Cleared" textline " " bitfld.long 0x00 8. " COMP_STATUS_CLR_8 ,Clears the compare match of channel 8" "No effect,Cleared" textline " " bitfld.long 0x00 7. " COMP_STATUS_CLR_7 ,Clears the compare match of channel 7" "No effect,Cleared" textline " " bitfld.long 0x00 6. " COMP_STATUS_CLR_6 ,Clears the compare match of channel 6" "No effect,Cleared" textline " " bitfld.long 0x00 5. " COMP_STATUS_CLR_5 ,Clears the compare match of channel 5" "No effect,Cleared" textline " " bitfld.long 0x00 4. " COMP_STATUS_CLR_4 ,Clears the compare match of channel 4" "No effect,Cleared" textline " " bitfld.long 0x00 3. " COMP_STATUS_CLR_3 ,Clears the compare match of channel 3" "No effect,Cleared" textline " " bitfld.long 0x00 2. " COMP_STATUS_CLR_2 ,Clears the compare match of channel 2" "No effect,Cleared" textline " " bitfld.long 0x00 1. " COMP_STATUS_CLR_1 ,Clears the compare match of channel 1" "No effect,Cleared" textline " " bitfld.long 0x00 0. " COMP_STATUS_CLR_0 ,Clears the compare match of channel 0" "No effect,Cleared" group.long 0x400++0xB line.long 0x00 "ADC_CONFIG,ADC configuration register" bitfld.long 0x00 15. " NEGEDGE_START_3 ,Enable ADC starting on the negative edge of start 3" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " POSEDGE_START_3 ,Enable ADC starting on the positive edge of start 3" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " NEGEDGE_START_2 ,Enable ADC starting on the negative edge of start 2" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POSEDGE_START_2 ,Enable ADC starting on the positive edge of start 2" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " NEGEDGE_START_1 ,Enable ADC starting on the negative edge of start 1" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " POSEDGE_START_1 ,Enable ADC starting on the positive edge of start 1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " NEGEDGE_START_0 ,Enable ADC starting on the negative edge of start 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " POSEDGE_START_0 ,Enable ADC starting on the positive edge of start 0" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADC_PD ,Power-down mode" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " ADC_CSCAN ,ADC continuous scan" "Single,Continuous" line.long 0x04 "ADC_CONTROL,ADC control register" bitfld.long 0x04 2. " UPDATE ,Copy the configuration" "No effect,Copy" bitfld.long 0x04 1. " STOP ,Stop ADC conversion" "No effect,Stop" textline " " bitfld.long 0x04 0. " START ,Start ADC conversion" "No effect,Start" line.long 0x08 "ADC_STATUS,ADC status register" bitfld.long 0x08 1. " ADC_CONFIG ,Configuration status" "Older,Loaded" bitfld.long 0x08 0. " ADC_STATUS ,Conversion status" "Not busy,Busy" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " COMPARE_set/clr ,Compare match" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " SCAN_set/clr ,End of scan" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 1. -0x04 1. -0x08 1. " COMPARE_set/clr ,Compare match" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " SCAN_set/clr ,End of scan" "Disabled,Enabled" width 0xB tree.end tree "ADC 2" base ad:0xE00C4000 width 17. group.long 0x00++0x3F line.long 0x0 "ACC0,ADC channel 0 configuration register" bitfld.long 0x0 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x4 "ACC1,ADC channel 1 configuration register" bitfld.long 0x4 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x8 "ACC2,ADC channel 2 configuration register" bitfld.long 0x8 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0xC "ACC3,ADC channel 3 configuration register" bitfld.long 0xC 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x10 "ACC4,ADC channel 4 configuration register" bitfld.long 0x10 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x14 "ACC5,ADC channel 5 configuration register" bitfld.long 0x14 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x18 "ACC6,ADC channel 6 configuration register" bitfld.long 0x18 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x1C "ACC7,ADC channel 7 configuration register" bitfld.long 0x1C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x20 "ACC8,ADC channel 8 configuration register" bitfld.long 0x20 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x24 "ACC9,ADC channel 9 configuration register" bitfld.long 0x24 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x28 "ACC10,ADC channel 10 configuration register" bitfld.long 0x28 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x2C "ACC11,ADC channel 11 configuration register" bitfld.long 0x2C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x30 "ACC12,ADC channel 12 configuration register" bitfld.long 0x30 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x34 "ACC13,ADC channel 13 configuration register" bitfld.long 0x34 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x38 "ACC14,ADC channel 14 configuration register" bitfld.long 0x38 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." line.long 0x3C "ACC15,ADC channel 15 configuration register" bitfld.long 0x3C 0.--3. " ACC ,Set the resolution for a channel" "Disabled,Reserved,2-bit,3-bit,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,?..." group.long 0x100++0x3F line.long 0x0 "COMP0,ADC channel 0 compare register" bitfld.long 0x0 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x0 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x4 "COMP1,ADC channel 1 compare register" bitfld.long 0x4 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x4 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x8 "COMP2,ADC channel 2 compare register" bitfld.long 0x8 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x8 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0xC "COMP3,ADC channel 3 compare register" bitfld.long 0xC 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0xC 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x10 "COMP4,ADC channel 4 compare register" bitfld.long 0x10 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x10 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x14 "COMP5,ADC channel 5 compare register" bitfld.long 0x14 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x14 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x18 "COMP6,ADC channel 6 compare register" bitfld.long 0x18 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x18 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x1C "COMP7,ADC channel 7 compare register" bitfld.long 0x1C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x1C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x20 "COMP8,ADC channel 8 compare register" bitfld.long 0x20 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x20 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x24 "COMP9,ADC channel 9 compare register" bitfld.long 0x24 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x24 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x28 "COMP10,ADC channel 10 compare register" bitfld.long 0x28 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x28 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x2C "COMP11,ADC channel 11 compare register" bitfld.long 0x2C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x2C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x30 "COMP12,ADC channel 12 compare register" bitfld.long 0x30 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x30 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x34 "COMP13,ADC channel 13 compare register" bitfld.long 0x34 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x34 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x38 "COMP14,ADC channel 14 compare register" bitfld.long 0x38 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x38 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" line.long 0x3C "COMP15,ADC channel 15 compare register" bitfld.long 0x3C 16.--17. " MATCH ,Compare for values less than or greater than or equal to the compare value" "No comparison,Reserved,Interrupt if less,Interrupt if greater" hexmask.long.word 0x3C 0.--9. 1. " COMP_R ,Compare data with respect to analog input channel" rgroup.long 0x200++0x3F line.long 0x0 "ACD0,ADC channel 0 conversion data register" hexmask.long.word 0x0 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x4 "ACD1,ADC channel 1 conversion data register" hexmask.long.word 0x4 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x8 "ACD2,ADC channel 2 conversion data register" hexmask.long.word 0x8 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0xC "ACD3,ADC channel 3 conversion data register" hexmask.long.word 0xC 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x10 "ACD4,ADC channel 4 conversion data register" hexmask.long.word 0x10 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x14 "ACD5,ADC channel 5 conversion data register" hexmask.long.word 0x14 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x18 "ACD6,ADC channel 6 conversion data register" hexmask.long.word 0x18 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x1C "ACD7,ADC channel 7 conversion data register" hexmask.long.word 0x1C 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x20 "ACD8,ADC channel 8 conversion data register" hexmask.long.word 0x20 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x24 "ACD9,ADC channel 9 conversion data register" hexmask.long.word 0x24 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x28 "ACD10,ADC channel 10 conversion data register" hexmask.long.word 0x28 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x2C "ACD11,ADC channel 11 conversion data register" hexmask.long.word 0x2C 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x30 "ACD12,ADC channel 12 conversion data register" hexmask.long.word 0x30 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x34 "ACD13,ADC channel 13 conversion data register" hexmask.long.word 0x34 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x38 "ACD14,ADC channel 14 conversion data register" hexmask.long.word 0x38 0.--9. 1. " ACD ,Conversion data (voltage)" line.long 0x3C "ACD15,ADC channel 15 conversion data register" hexmask.long.word 0x3C 0.--9. 1. " ACD ,Conversion data (voltage)" rgroup.long 0x300++0x3 line.long 0x00 "COMP_STATUS,Compare-status register" bitfld.long 0x00 15. " COMP_STATUS_15 ,Compare match of channel 15" "Not occurred,Occurred" textline " " bitfld.long 0x00 14. " COMP_STATUS_14 ,Compare match of channel 14" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " COMP_STATUS_13 ,Compare match of channel 13" "Not occurred,Occurred" textline " " bitfld.long 0x00 12. " COMP_STATUS_12 ,Compare match of channel 12" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " COMP_STATUS_11 ,Compare match of channel 11" "Not occurred,Occurred" textline " " bitfld.long 0x00 10. " COMP_STATUS_10 ,Compare match of channel 10" "Not occurred,Occurred" textline " " bitfld.long 0x00 9. " COMP_STATUS_9 ,Compare match of channel 9" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " COMP_STATUS_8 ,Compare match of channel 8" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " COMP_STATUS_7 ,Compare match of channel 7" "Not occurred,Occurred" textline " " bitfld.long 0x00 6. " COMP_STATUS_6 ,Compare match of channel 6" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " COMP_STATUS_5 ,Compare match of channel 5" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " COMP_STATUS_4 ,Compare match of channel 4" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " COMP_STATUS_3 ,Compare match of channel 3" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " COMP_STATUS_2 ,Compare match of channel 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " COMP_STATUS_1 ,Compare match of channel 1" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " COMP_STATUS_0 ,Compare match of channel 0" "Not occurred,Occurred" wgroup.long 0x304++0x3 line.long 0x00 "COMP_STATUS_CLR,Compare-status clear register" bitfld.long 0x00 15. " COMP_STATUS_CLR_15 ,Clears the compare match of channel 15" "No effect,Cleared" textline " " bitfld.long 0x00 14. " COMP_STATUS_CLR_14 ,Clears the compare match of channel 14" "No effect,Cleared" textline " " bitfld.long 0x00 13. " COMP_STATUS_CLR_13 ,Clears the compare match of channel 13" "No effect,Cleared" textline " " bitfld.long 0x00 12. " COMP_STATUS_CLR_12 ,Clears the compare match of channel 12" "No effect,Cleared" textline " " bitfld.long 0x00 11. " COMP_STATUS_CLR_11 ,Clears the compare match of channel 11" "No effect,Cleared" textline " " bitfld.long 0x00 10. " COMP_STATUS_CLR_10 ,Clears the compare match of channel 10" "No effect,Cleared" textline " " bitfld.long 0x00 9. " COMP_STATUS_CLR_9 ,Clears the compare match of channel 9" "No effect,Cleared" textline " " bitfld.long 0x00 8. " COMP_STATUS_CLR_8 ,Clears the compare match of channel 8" "No effect,Cleared" textline " " bitfld.long 0x00 7. " COMP_STATUS_CLR_7 ,Clears the compare match of channel 7" "No effect,Cleared" textline " " bitfld.long 0x00 6. " COMP_STATUS_CLR_6 ,Clears the compare match of channel 6" "No effect,Cleared" textline " " bitfld.long 0x00 5. " COMP_STATUS_CLR_5 ,Clears the compare match of channel 5" "No effect,Cleared" textline " " bitfld.long 0x00 4. " COMP_STATUS_CLR_4 ,Clears the compare match of channel 4" "No effect,Cleared" textline " " bitfld.long 0x00 3. " COMP_STATUS_CLR_3 ,Clears the compare match of channel 3" "No effect,Cleared" textline " " bitfld.long 0x00 2. " COMP_STATUS_CLR_2 ,Clears the compare match of channel 2" "No effect,Cleared" textline " " bitfld.long 0x00 1. " COMP_STATUS_CLR_1 ,Clears the compare match of channel 1" "No effect,Cleared" textline " " bitfld.long 0x00 0. " COMP_STATUS_CLR_0 ,Clears the compare match of channel 0" "No effect,Cleared" group.long 0x400++0xB line.long 0x00 "ADC_CONFIG,ADC configuration register" bitfld.long 0x00 15. " NEGEDGE_START_3 ,Enable ADC starting on the negative edge of start 3" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " POSEDGE_START_3 ,Enable ADC starting on the positive edge of start 3" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " NEGEDGE_START_2 ,Enable ADC starting on the negative edge of start 2" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " POSEDGE_START_2 ,Enable ADC starting on the positive edge of start 2" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " NEGEDGE_START_1 ,Enable ADC starting on the negative edge of start 1" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " POSEDGE_START_1 ,Enable ADC starting on the positive edge of start 1" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " NEGEDGE_START_0 ,Enable ADC starting on the negative edge of start 0" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " POSEDGE_START_0 ,Enable ADC starting on the positive edge of start 0" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADC_PD ,Power-down mode" "Enabled,Disabled" textline " " bitfld.long 0x00 0. " ADC_CSCAN ,ADC continuous scan" "Single,Continuous" line.long 0x04 "ADC_CONTROL,ADC control register" bitfld.long 0x04 2. " UPDATE ,Copy the configuration" "No effect,Copy" bitfld.long 0x04 1. " STOP ,Stop ADC conversion" "No effect,Stop" textline " " bitfld.long 0x04 0. " START ,Start ADC conversion" "No effect,Start" line.long 0x08 "ADC_STATUS,ADC status register" bitfld.long 0x08 1. " ADC_CONFIG ,Configuration status" "Older,Loaded" bitfld.long 0x08 0. " ADC_STATUS ,Conversion status" "Not busy,Busy" group.long 0xFE0++0x7 line.long 0x00 "INT_STATUS,Interrupt status register" setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " COMPARE_set/clr ,Compare match" "No interrupt,Interrupt" setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " SCAN_set/clr ,End of scan" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Interrupt enable register" setclrfld.long 0x04 1. -0x04 1. -0x08 1. " COMPARE_set/clr ,Compare match" "Disabled,Enabled" setclrfld.long 0x04 0. -0x04 0. -0x08 0. " SCAN_set/clr ,End of scan" "Disabled,Enabled" width 0xB tree.end tree.end sif (cpu()!="LPC2917"&&cpu()!="LPC2919") tree "QEI (Quadrature Encoder Interface)" base ad:0xE00C9000 width 12. wgroup.long 0x00++0x3 line.long 0x00 "QEICON,QEI Control Register" bitfld.long 0x00 3. " RESI ,Reset index counter" "No effect,Reset" bitfld.long 0x00 2. " RESV ,Reset velocity" "No effect,Reset" textline " " bitfld.long 0x00 1. " RESPI ,Reset position counter on index" "No effect,Reset" bitfld.long 0x00 0. " RESP ,Reset position counter" "No effect,Reset" group.long 0x04++0x3 line.long 0x00 "QEICONF,QEI Configuration Register" bitfld.long 0x00 3. " INVINX ,Invert Index" "Not inverted,Inverted" bitfld.long 0x00 2. " CAPMODE ,Capture Mode" "Only PhA,PhA/PhB" textline " " bitfld.long 0x00 1. " SIGMODE ,Signal Mode" "PhA/PhB quad,PhA-Dir/PhB-Clk" bitfld.long 0x00 0. " DIRINV ,Direction invert" "Not inverted,Inverted" rgroup.long 0x08++0x3 line.long 0x00 "QEISTAT,Encoder Status Register" bitfld.long 0x00 0. " DIR ,Direction bit" "Forward,Reverse" rgroup.long 0xC++0x3 line.long 0x00 "QEIPOS,QEI Position Register" group.long 0x10++0xF line.long 0x00 "QEIMAXPOS,QEI Maximum Position Register" line.long 0x04 "CMPOS0,Position Compare Register 0" line.long 0x08 "CMPOS1,Position Compare Register 1" line.long 0x0C "CMPOS2,Position Compare Register 2" rgroup.long 0x20++0x3 line.long 0x00 "INXCNT,Index Count Register" group.long 0x24++0x7 line.long 0x00 "INXCMP,Index compare register" line.long 0x04 "QEILOAD,Velocity timer reload register" rgroup.long 0x2C++0xB line.long 0x00 "QEITIME,Velocity timer register" line.long 0x04 "QEIVEL,Velocity counter register" line.long 0x08 "QEICAP,Velocity capture register" group.long 0x38++0x7 line.long 0x00 "VELCOMP,Velocity compare register" line.long 0x04 "FILTER,Digital filter register" group.long 0xFE0++0x7 line.long 0x00 "QEIINTSTAT,QEI Interrupt Status Register" setclrfld.long 0x00 12. 0x0C 12. 0x08 12. " POS2REV_Int_set/clr ,Combined position 2 and revolution count interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 11. 0x0C 11. 0x08 11. " POS1REV_Int_set/clr ,Combined position 1 and revolution count interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 10. 0x0C 10. 0x08 10. " POS0REV_Int_set/clr ,Combined position 0 and revolution count interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 9. 0x0C 9. 0x08 9. " REV_Int_set/clr ,The index compare value is equal to the current index count" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 8. 0x0C 8. 0x08 8. " POS2_Int_set/clr ,The position 2 compare value is equal to the current position" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 7. 0x0C 7. 0x08 7. " POS1_Int_set/clr ,The position 1 compare value is equal to the current position" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 6. 0x0C 6. 0x08 6. " POS0_Int_set/clr ,The position 0 compare value is equal to the current position" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 5. 0x0C 5. 0x08 5. " ENCLK_Int_set/clr ,Encoder clock pulse was detected" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 4. 0x0C 4. 0x08 4. " ERR_Int_set/clr ,Encoder phase error was detected" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 3. 0x0C 3. 0x08 3. " DIR_Int_set/clr ,Change of direction was detected" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " VELC_Int_set/clr ,Captured velocity is less than compare velocity" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " TIM_Int_set/clr ,Velocity timer overflow occured" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " INX_Int_set/clr ,Index pulse was detected" "No interrupt,Interrupt" line.long 0x04 "QEIIE,QEI Interrupt Enable Register" setclrfld.long 0x04 12. -0x04 12. -0x08 12. " POS2REV_Int_set/clr ,Combined position 2 and revolution count interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. -0x04 11. -0x08 11. " POS1REV_Int_set/clr ,Combined position 1 and revolution count interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. -0x04 10. -0x08 10. " POS0REV_Int_set/clr ,Combined position 0 and revolution count interrupt" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. -0x04 9. -0x08 9. " REV_Int_set/clr ,The index compare value is equal to the current index count" "Disabled,Enabled" textline " " setclrfld.long 0x04 8. -0x04 8. -0x08 8. " POS2_Int_set/clr ,The position 2 compare value is equal to the current position" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. -0x04 7. -0x08 7. " POS1_Int_set/clr ,The position 1 compare value is equal to the current position" "Disabled,Enabled" textline " " setclrfld.long 0x04 6. -0x04 6. -0x08 6. " POS0_Int_set/clr ,The position 0 compare value is equal to the current position" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. -0x04 5. -0x08 5. " ENCLK_Int_set/clr ,Encoder clock pulse was detected" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. -0x04 4. -0x08 4. " ERR_Int_set/clr ,Encoder phase error was detected" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. -0x04 3. -0x08 3. " DIR_Int_set/clr ,Change of direction was detected" "Disabled,Enabled" textline " " setclrfld.long 0x04 2. -0x04 2. -0x08 2. " VELC_Int_set/clr ,Captured velocity is less than compare velocity" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " TIM_Int_set/clr ,Velocity timer overflow occured" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " INX_Int_set/clr ,Index pulse was detected" "Disabled,Enabled" width 0xB tree.end endif tree.open "FMC (Flash Memory Controller)" base ad:0x20200000 width 8. tree "Flash" group.long 0x00++0x03 line.long 0x00 "FCTR,Flash Control register" bitfld.long 0x00 15. " FS_LOADREQ ,Data load request" "Not requested,Requestred" bitfld.long 0x00 14. " FS_CACHECLR ,Buffer-line clear" "No effect,All bits set" textline " " bitfld.long 0x00 13. " FS_CACHEBYP ,Buffering bypass" "Buffered,Bypass" bitfld.long 0x00 12. " FS_PROGREQ ,Programming request" "No effect,Requested" textline " " bitfld.long 0x00 11. " FS_RLS ,Select sector latches for reading" "Flash array,Sector latches" bitfld.long 0x00 10. " FS_PDL ,Preset data latches" "No effect,All bits set" textline " " bitfld.long 0x00 9. " FS_PD ,Power-down" "No effect,Power-down" bitfld.long 0x00 7. " FS_WPB ,Program and erase protection" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " FS_ISS ,Index-sector selection" "Flash array,Index sector" bitfld.long 0x00 5. " FS_RLD ,Read data latches" "Flash array,Data latches" textline " " bitfld.long 0x00 4. " FS_DCR ,DC-read mode" "Synchronous,Asynchronous" bitfld.long 0x00 2. " FS_WEB ,Program and erase enable" "Enabled,Disabled" textline " " bitfld.long 0x00 1. " FS_WRE ,Program and erase selection" "Erase,Program" bitfld.long 0x00 0. " FS_CS ,Flash memory chip-select" "Standby,Active" group.long 0x08++0x07 line.long 0x00 "FPTR,Flash memory program-time register" bitfld.long 0x00 15. " EN_T ,Program-timer enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--14. 1. " TR ,Program timer" line.long 0x04 "FTCTR,FLASH test control register" bitfld.long 0x04 29. " FS_BYPASS_R ,Connected to FLASH memory pin BYPASS_R" "Low,High" bitfld.long 0x04 28. " FS_BYPASS_W ,Connected to FLASH memory pin BYPASS_W" "Low,High" ; rgroup.long 0x04++0x03 ; line.long 0x00 "F_STAT,Flash Status register" ; bitfld.long 0x00 0. " FS_DONE ,Programming cycle done" "Not done,Done" ; bitfld.long 0x00 1. " FS_PROGGNT ,Flash bus lock grant" "Not granted,Granted" ; textline " " ; bitfld.long 0x00 2. " FS_RDY ,Flash ready indication" "Busy,Ready" ; bitfld.long 0x00 5. " FS_ERR ,Flash read bit error detection" "No error,Error" group.long 0x10++0x03 line.long 0x00 "FBWST,Flash bridge wait-states register" bitfld.long 0x00 15. " CACHE2EN ,Dual buffering enable" "Disabled,Enabled" bitfld.long 0x00 14. " SPECALWAYS ,Speculative reading" "Single,Always" textline " " hexmask.long.byte 0x00 0.--7. 1. " WST ,Number of wait-states" group.long 0x1C++0x03 line.long 0x00 "FCRA,Flash Clock Divider register" hexmask.long.word 0x00 0.--11. 1. " FCRA ,Clock divider setting" width 15. group.long 0x20++0x7 line.long 0x00 "FMSSTART,Flash-memory BIST start-address register" hexmask.long.tbyte 0x00 0.--16. 1. " FMSSTART ,BIST start address" line.long 0x04 "FMSSTOP,Flash-memory BIST stop-address register" bitfld.long 0x04 17. " MISR_START ,BIST signature generation initialization" "No effect,Enabled" hexmask.long.tbyte 0x04 0.--16. 1. " FMSSTOP ,BIST stop address divided by 16" rgroup.long 0x28++0x13 line.long 0x00 "FMS16,Flash 16-bit signature register" hexmask.long.word 0x00 0.--15. 1. " FMS16 ,Flash BIST 16-bit signature" line.long 0x4 "FMSW0[31:0],Flash-memory BIST 128-bit signature register (bits 31 to 0)" line.long 0x8 "FMSW1[63:32],Flash-memory BIST 128-bit signature register (bits 63 to 32)" line.long 0xC "FMSW2[95:64],Flash-memory BIST 128-bit signature register (bits 95 to 64)" line.long 0x10 "FMSW3[127:96],Flash-memory BIST 128-bit signature register (bits 127 to 96)" sif (cpu()=="LPC2917"||cpu()=="LPC2919") group.long 0xFE0++0x07 line.long 0x00 "INT_STATUS,Flash Interrupt Status register" setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " END_OF_MISR_set/clr ,BIST signature generation has finished" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " END_OF_BURN_set/clr ,Page burning has finished" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " END_OF_ERASE_set/clr ,EErasing of one or more sectors has finished" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Flash Interrupt Enable register" setclrfld.long 0x04 2. -0x04 2. -0x08 2. " END_OF_MISR_set/clr ,BIST signature generation has finished" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " END_OF_BURN_set/clr ,Page burning has finished" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " END_OF_ERASE_set/clr ,Erasing of one or more sectors has finished" "Disabled,Enabled" textline " " endif sif (cpu()!="LPC2917"&&cpu()!="LPC2919") group.long 0xFE0++0x07 line.long 0x00 "INT_STATUS,Flash Interrupt Status register" setclrfld.long 0x00 28. 0x0C 28. 0x08 28. " END_OF_PROG_set/clr ,Program operation has finished for EEPROM" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 27. 0x0C 27. 0x08 27. " END_OF_BIST_set/clr ,BIST operation has finished (EEPROM)" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 26. 0x0C 26. 0x08 26. " END_OF_RDWR_set/clr ,Read/write operation has finished (EEPROM)" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 2. 0x0C 2. 0x08 2. " END_OF_MISR_set/clr ,BIST signature generation has finished" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 1. 0x0C 1. 0x08 1. " END_OF_BURN_set/clr ,Page burning has finished" "No interrupt,Interrupt" textline " " setclrfld.long 0x00 0. 0x0C 0. 0x08 0. " END_OF_ERASE_set/clr ,Erasing of one or more sectors has finished" "No interrupt,Interrupt" line.long 0x04 "INT_ENABLE,Flash Interrupt Enable register" setclrfld.long 0x04 28. -0x04 28. -0x08 28. " END_OF_PROG_set/clr ,Program operation has finished for EEPROM" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. -0x04 27. -0x08 27. " END_OF_BIST_set/clr ,BIST operation has finished (EEPROM)" "Disabled,Enabled" textline " " setclrfld.long 0x04 26. -0x04 26. -0x08 26. " END_OF_RDWR_set/clr ,Read/write operation has finished (EEPROM)" "Disabled,Enabled" textline " " setclrfld.long 0x04 2. -0x04 2. -0x08 2. " END_OF_MISR_set/clr ,BIST signature generation has finished" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. -0x04 1. -0x08 1. " END_OF_BURN_set/clr ,Page burning has finished" "Disabled,Enabled" textline " " setclrfld.long 0x04 0. -0x04 0. -0x08 0. " END_OF_ERASE_set/clr ,Erasing of one or more sectors has finished" "Disabled,Enabled" textline " " endif tree.end sif (cpu()!="LPC2917"&&cpu()!="LPC2919") tree "EEPROM" group.long 0x80++0x7 line.long 0x00 "EECMD,EEPROM command register" bitfld.long 0x00 4. " PAR_ACCESS ,Parallel access (erase/program)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RDPREFETCH ,Read data pre-fetch" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--2. " CMD ,Command" "8-bit read,16-bit read,32-bit read,8-bit write,16-bit write,32-bit write,Erase/program page,?..." line.long 0x04 "EEADDR,EEPROM address register" hexmask.long.word 0x04 0.--13. 1. " ADDR ,Address" wgroup.long 0x88++0x3 line.long 0x0 "EEWDATA,EEPROM write data register" rgroup.long 0x8C++03 line.long 0x0 "EERDATA,EEPROM read data register" group.long 0x90++0x13 line.long 0x0 "EEESTATE,EEPROM wait state register" hexmask.long.byte 0x00 16.--23. 1. " PHASE3 ,Wait states 3 (minus 1 encoded)" textline " " hexmask.long.byte 0x00 8.--15. 1. " PHASE2 ,Wait states 2 (minus 1 encoded)" textline " " hexmask.long.byte 0x00 0.--7. 1. " PHASE1 ,Wait states 1 (minus 1 encoded)" line.long 0x04 "EECLKDIV,EEPROM clock divider register" hexmask.long.word 0x04 0.--15. 1. " CLKDIV ,Division factor (minus 1 encoded)" line.long 0x08 "EEPWRDWN,EEPROM power down/DCM register" bitfld.long 0x08 0. " PWRDWN ,Power down mode" "No power down,Power down" line.long 0x0C "EEMSSTART,EEPROM BIST start address register" hexmask.long.word 0x0C 0.--13. 1. " STARTA ,BIST start address" line.long 0x10 "EEMSSTOP,EEPROM BIST stop address register" bitfld.long 0x10 31. " STRTBIST ,BIST start" "No effect,Start" textline " " bitfld.long 0x10 30. " DEVSEL ,BIST device select" "Multiple (total mem space),Single" textline " " hexmask.long.word 0x10 0.--13. 1. " STOPA ,BIST stop address" rgroup.long 0xA4++0x3 line.long 0x00 "EEMSSIG,EEPROM signature register" hexmask.long.word 0x00 16.--31. 1. " PARITY_SIG ,BIST 16-bit signature calculated from only the parity bits of the data bytes" textline " " hexmask.long.word 0x00 0.--15. 1. " DATA_SIG ,BIST 16-bit signature calculated from only the data bytes" tree.end endif width 0xB tree.end sif (cpu()!="LPC2917"&&cpu()!="LPC2919") tree.open "GPDMA (General Purpose Direct Memory Access)" tree "General DMA Registers" base ad:0xE0140000 width 19. rgroup.long 0x00++0x7 line.long 0x0 "DMACIntStat,DMA Interrupt Status Register" bitfld.long 0x0 7. " IntStat7 ,DMA channel 7 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 6. " IntStat6 ,DMA channel 6 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " IntStat5 ,DMA channel 5 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " IntStat4 ,DMA channel 4 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " IntStat3 ,DMA channel 3 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " IntStat2 ,DMA channel 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " IntStat1 ,DMA channel 1 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " IntStat0 ,DMA channel 0 interrupt" "No interrupt,Interrupt" line.long 0x4 "DMACIntTCStat,DMA Interrupt Terminal Count Request Status Register" bitfld.long 0x4 7. " IntTCStat7 ,DMA channel 7 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 6. " IntTCStat6 ,DMA channel 6 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 5. " IntTCStat5 ,DMA channel 5 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 4. " IntTCStat4 ,DMA channel 4 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 3. " IntTCStat3 ,DMA channel 3 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 2. " IntTCStat2 ,DMA channel 2 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 1. " IntTCStat1 ,DMA channel 1 terminal count interrupt request" "No interrupt,Interrupt" textline " " bitfld.long 0x4 0. " IntTCStat0 ,DMA channel 0 terminal count interrupt request" "No interrupt,Interrupt" wgroup.long 0x08++0x3 line.long 0x0 "DMACIntTCClear,DMA Interrupt Terminal Count Request Clear Register" bitfld.long 0x0 7. " IntTCClear7 ,DMA channel 7 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 6. " IntTCClear6 ,DMA channel 6 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 5. " IntTCClear5 ,DMA channel 5 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 4. " IntTCClear4 ,DMA channel 4 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 3. " IntTCClear3 ,DMA channel 3 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 2. " IntTCClear2 ,DMA channel 2 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 1. " IntTCClear1 ,DMA channel 1 terminal count interrupt request clear" "No effect,Clear" textline " " bitfld.long 0x0 0. " IntTCClear0 ,DMA channel 0 terminal count interrupt request clear" "No effect,Clear" rgroup.long 0x0C++0x3 line.long 0x0 "DMACIntErrStat,DMA Interrupt Error Status Register" bitfld.long 0x0 7. " IntErrStat7 ,DMA channel 7 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 6. " IntErrStat6 ,DMA channel 6 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 5. " IntErrStat5 ,DMA channel 5 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 4. " IntErrStat4 ,DMA channel 4 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 3. " IntErrStat3 ,DMA channel 3 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 2. " IntErrStat2 ,DMA channel 2 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 1. " IntErrStat1 ,DMA channel 1 interrupt error status" "No error,Error" textline " " bitfld.long 0x0 0. " IntErrStat0 ,DMA channel 0 interrupt error status" "No error,Error" wgroup.long 0x10++0x3 line.long 0x0 "DMACIntErrClr,DMA Interrupt Error Clear Register" bitfld.long 0x0 7. " IntErrClr7 ,DMA channel 7 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 6. " IntErrClr6 ,DMA channel 6 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 5. " IntErrClr5 ,DMA channel 5 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 4. " IntErrClr4 ,DMA channel 4 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 3. " IntErrClr3 ,DMA channel 3 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 2. " IntErrClr2 ,DMA channel 2 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 1. " IntErrClr1 ,DMA channel 1 interrupt error clear" "No effect,Clear" textline " " bitfld.long 0x0 0. " IntErrClr0 ,DMA channel 0 interrupt error clear" "No effect,Clear" rgroup.long 0x14++0xB line.long 0x0 "DMACRawIntTCStat,DMA Raw Interrupt Terminal Count Status Register" bitfld.long 0x0 7. " RawIntTCStat7 ,DMA channel 7 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 6. " RawIntTCStat6 ,DMA channel 6 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 5. " RawIntTCStat5 ,DMA channel 5 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " RawIntTCStat4 ,DMA channel 4 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 3. " RawIntTCStat3 ,DMA channel 3 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " RawIntTCStat2 ,DMA channel 2 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 1. " RawIntTCStat1 ,DMA channel 1 terminal count interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " RawIntTCStat0 ,DMA channel 0 terminal count interrupt status" "No interrupt,Interrupt" line.long 0x4 "DMACRawIntErrStat,DMA Raw Error Interrupt Status Register" bitfld.long 0x4 7. " RawIntErrStat7 ,DMA channel 7 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 6. " RawIntErrStat6 ,DMA channel 6 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 5. " RawIntErrStat5 ,DMA channel 5 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 4. " RawIntErrStat4 ,DMA channel 4 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 3. " RawIntErrStat3 ,DMA channel 3 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 2. " RawIntErrStat2 ,DMA channel 2 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 1. " RawIntErrStat1 ,DMA channel 1 raw interrupt error status" "No error,Error" textline " " bitfld.long 0x4 0. " RawIntErrStat0 ,DMA channel 0 raw interrupt error status" "No error,Error" line.long 0x8 "DMACEnbldChns,DMA Enabled Channel Register" bitfld.long 0x8 7. " EnabledChannel7 ,DMA channel 7 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 6. " EnabledChannel6 ,DMA channel 6 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 5. " EnabledChannel5 ,DMA channel 5 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 4. " EnabledChannel4 ,DMA channel 4 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 3. " EnabledChannel3 ,DMA channel 3 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 2. " EnabledChannel2 ,DMA channel 2 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 1. " EnabledChannel1 ,DMA channel 1 enable status" "Disabled,Enabled" textline " " bitfld.long 0x8 0. " EnabledChannel0 ,DMA channel 0 enable status" "Disabled,Enabled" group.long 0x20++0x17 line.long 0x0 "DMACSoftBReq,DMA Software Burst Request Register" bitfld.long 0x0 15. " SoftBReq15 ,DMA burst request for line 15" "No effect,Requested" textline " " bitfld.long 0x0 14. " SoftBReq14 ,DMA burst request for line 14" "No effect,Requested" textline " " bitfld.long 0x0 13. " SoftBReq13 ,DMA burst request for line 13" "No effect,Requested" textline " " bitfld.long 0x0 12. " SoftBReq12 ,DMA burst request for line 12" "No effect,Requested" textline " " bitfld.long 0x0 11. " SoftBReq11 ,DMA burst request for line 11" "No effect,Requested" textline " " bitfld.long 0x0 10. " SoftBReq10 ,DMA burst request for line 10" "No effect,Requested" textline " " bitfld.long 0x0 9. " SoftBReq9 ,DMA burst request for line 9" "No effect,Requested" textline " " bitfld.long 0x0 8. " SoftBReq8 ,DMA burst request for line 8" "No effect,Requested" textline " " bitfld.long 0x0 7. " SoftBReq7 ,DMA burst request for line 7" "No effect,Requested" textline " " bitfld.long 0x0 6. " SoftBReq6 ,DMA burst request for line 6" "No effect,Requested" textline " " bitfld.long 0x0 5. " SoftBReq5 ,DMA burst request for line 5" "No effect,Requested" textline " " bitfld.long 0x0 4. " SoftBReq4 ,DMA burst request for line 4" "No effect,Requested" textline " " bitfld.long 0x0 3. " SoftBReq3 ,DMA burst request for line 3" "No effect,Requested" textline " " bitfld.long 0x0 2. " SoftBReq2 ,DMA burst request for line 2" "No effect,Requested" textline " " bitfld.long 0x0 1. " SoftBReq1 ,DMA burst request for line 1" "No effect,Requested" textline " " bitfld.long 0x0 0. " SoftBReq0 ,DMA burst request for line 0" "No effect,Requested" line.long 0x4 "DMACSoftSReq,DMA Software Single Request Register" bitfld.long 0x4 15. " SoftSReq15 ,DMA single transfer request for line 15" "No effect,Requested" textline " " bitfld.long 0x4 14. " SoftSReq14 ,DMA single transfer request for line 14" "No effect,Requested" textline " " bitfld.long 0x4 13. " SoftSReq13 ,DMA single transfer request for line 13" "No effect,Requested" textline " " bitfld.long 0x4 12. " SoftSReq12 ,DMA single transfer request for line 12" "No effect,Requested" textline " " bitfld.long 0x4 11. " SoftSReq11 ,DMA single transfer request for line 11" "No effect,Requested" textline " " bitfld.long 0x4 10. " SoftSReq10 ,DMA single transfer request for line 10" "No effect,Requested" textline " " bitfld.long 0x4 9. " SoftSReq9 ,DMA single transfer request for line 9" "No effect,Requested" textline " " bitfld.long 0x4 8. " SoftSReq8 ,DMA single transfer request for line 8" "No effect,Requested" textline " " bitfld.long 0x4 7. " SoftSReq7 ,DMA single transfer request for line 7" "No effect,Requested" textline " " bitfld.long 0x4 6. " SoftSReq6 ,DMA single transfer request for line 6" "No effect,Requested" textline " " bitfld.long 0x4 5. " SoftSReq5 ,DMA single transfer request for line 5" "No effect,Requested" textline " " bitfld.long 0x4 4. " SoftSReq4 ,DMA single transfer request for line 4" "No effect,Requested" textline " " bitfld.long 0x4 3. " SoftSReq3 ,DMA single transfer request for line 3" "No effect,Requested" textline " " bitfld.long 0x4 2. " SoftSReq2 ,DMA single transfer request for line 2" "No effect,Requested" textline " " bitfld.long 0x4 1. " SoftSReq1 ,DMA single transfer request for line 1" "No effect,Requested" textline " " bitfld.long 0x4 0. " SoftSReq0 ,DMA single transfer request for line 0" "No effect,Requested" line.long 0x8 "DMACSoftLBReq,DMA Software Last Burst Requested Register" bitfld.long 0x8 15. " SoftLBReq15 ,DMA last burst request for line 15" "No effect,Requested" textline " " bitfld.long 0x8 14. " SoftLBReq14 ,DMA last burst request for line 14" "No effect,Requested" textline " " bitfld.long 0x8 13. " SoftLBReq13 ,DMA last burst request for line 13" "No effect,Requested" textline " " bitfld.long 0x8 12. " SoftLBReq12 ,DMA last burst request for line 12" "No effect,Requested" textline " " bitfld.long 0x8 11. " SoftLBReq11 ,DMA last burst request for line 11" "No effect,Requested" textline " " bitfld.long 0x8 10. " SoftLBReq10 ,DMA last burst request for line 10" "No effect,Requested" textline " " bitfld.long 0x8 9. " SoftLBReq9 ,DMA last burst request for line 9" "No effect,Requested" textline " " bitfld.long 0x8 8. " SoftLBReq8 ,DMA last burst request for line 8" "No effect,Requested" textline " " bitfld.long 0x8 7. " SoftLBReq7 ,DMA last burst request for line 7" "No effect,Requested" textline " " bitfld.long 0x8 6. " SoftLBReq6 ,DMA last burst request for line 6" "No effect,Requested" textline " " bitfld.long 0x8 5. " SoftLBReq5 ,DMA last burst request for line 5" "No effect,Requested" textline " " bitfld.long 0x8 4. " SoftLBReq4 ,DMA last burst request for line 4" "No effect,Requested" textline " " bitfld.long 0x8 3. " SoftLBReq3 ,DMA last burst request for line 3" "No effect,Requested" textline " " bitfld.long 0x8 2. " SoftLBReq2 ,DMA last burst request for line 2" "No effect,Requested" textline " " bitfld.long 0x8 1. " SoftLBReq1 ,DMA last burst request for line 1" "No effect,Requested" textline " " bitfld.long 0x8 0. " SoftLBReq0 ,DMA last burst request for line 0" "No effect,Requested" line.long 0xC "DMACSoftLSReq,DMA Software Last Single Requested Register" bitfld.long 0xC 15. " SoftLSReq15 ,DMA last single transfer request for line 15" "No effect,Requested" textline " " bitfld.long 0xC 14. " SoftLSReq14 ,DMA last single transfer request for line 14" "No effect,Requested" textline " " bitfld.long 0xC 13. " SoftLSReq13 ,DMA last single transfer request for line 13" "No effect,Requested" textline " " bitfld.long 0xC 12. " SoftLSReq12 ,DMA last single transfer request for line 12" "No effect,Requested" textline " " bitfld.long 0xC 11. " SoftLSReq11 ,DMA last single transfer request for line 11" "No effect,Requested" textline " " bitfld.long 0xC 10. " SoftLSReq10 ,DMA last single transfer request for line 10" "No effect,Requested" textline " " bitfld.long 0xC 9. " SoftLSReq9 ,DMA last single transfer request for line 9" "No effect,Requested" textline " " bitfld.long 0xC 8. " SoftLSReq8 ,DMA last single transfer request for line 8" "No effect,Requested" textline " " bitfld.long 0xC 7. " SoftLSReq7 ,DMA last single transfer request for line 7" "No effect,Requested" textline " " bitfld.long 0xC 6. " SoftLSReq6 ,DMA last single transfer request for line 6" "No effect,Requested" textline " " bitfld.long 0xC 5. " SoftLSReq5 ,DMA last single transfer request for line 5" "No effect,Requested" textline " " bitfld.long 0xC 4. " SoftLSReq4 ,DMA last single transfer request for line 4" "No effect,Requested" textline " " bitfld.long 0xC 3. " SoftLSReq3 ,DMA last single transfer request for line 3" "No effect,Requested" textline " " bitfld.long 0xC 2. " SoftLSReq2 ,DMA last single transfer request for line 2" "No effect,Requested" textline " " bitfld.long 0xC 1. " SoftLSReq1 ,DMA last single transfer request for line 1" "No effect,Requested" textline " " bitfld.long 0xC 0. " SoftLSReq0 ,DMA last single transfer request for line 0" "No effect,Requested" line.long 0x10 "DMACConfig,DMA Configuration Register" bitfld.long 0x10 2. " M1 ,AHB Master 1 endianness configuration" "Little-endian,Big-endian" textline " " bitfld.long 0x10 1. " M0 ,AHB Master 0 endianness configuration" "Little-endian,Big-endian" textline " " bitfld.long 0x10 0. " E ,DMA controller enable" "Disabled,Enabled" line.long 0x14 "DMACSync,DMA Synchronization Register" bitfld.long 0x14 15. " DMACSync15 ,Synchronization logic for request line 15 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " DMACSync14 ,Synchronization logic for request line 14 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " DMACSync13 ,Synchronization logic for request line 13 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " DMACSync12 ,Synchronization logic for request line 12 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " DMACSync11 ,Synchronization logic for request line 11 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " DMACSync10 ,Synchronization logic for request line 10 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 9. " DMACSync9 ,Synchronization logic for request line 9 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 8. " DMACSync8 ,Synchronization logic for request line 8 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " DMACSync7 ,Synchronization logic for request line 7 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " DMACSync6 ,Synchronization logic for request line 6 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " DMACSync5 ,Synchronization logic for request line 5 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " DMACSync4 ,Synchronization logic for request line 4 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " DMACSync3 ,Synchronization logic for request line 3 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " DMACSync2 ,Synchronization logic for request line 2 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " DMACSync1 ,Synchronization logic for request line 1 signal enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " DMACSync0 ,Synchronization logic for request line 0 signal enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 0 Registers" base ad:0xE0140100 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC0SrcAddr,DMA Channel 0 Source Address Register" line.long 0x4 "DMACC0DestAddr,DMA Channel 0 Destination Address Register" line.long 0x8 "DMACC0LLI,DMA Channel 0 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC0Control,DMA channel 0 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC0Config,Channel 0 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 1 Registers" base ad:0xE0140120 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC1SrcAddr,DMA Channel 1 Source Address Register" line.long 0x4 "DMACC1DestAddr,DMA Channel 1 Destination Address Register" line.long 0x8 "DMACC1LLI,DMA Channel 1 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC1Control,DMA channel 1 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC1Config,Channel 1 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 2 Registers" base ad:0xE0140140 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC2SrcAddr,DMA Channel 2 Source Address Register" line.long 0x4 "DMACC2DestAddr,DMA Channel 2 Destination Address Register" line.long 0x8 "DMACC2LLI,DMA Channel 2 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC2Control,DMA channel 2 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC2Config,Channel 2 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 3 Registers" base ad:0xE0140160 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC3SrcAddr,DMA Channel 3 Source Address Register" line.long 0x4 "DMACC3DestAddr,DMA Channel 3 Destination Address Register" line.long 0x8 "DMACC3LLI,DMA Channel 3 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC3Control,DMA channel 3 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC3Config,Channel 3 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 4 Registers" base ad:0xE0140180 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC4SrcAddr,DMA Channel 4 Source Address Register" line.long 0x4 "DMACC4DestAddr,DMA Channel 4 Destination Address Register" line.long 0x8 "DMACC4LLI,DMA Channel 4 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC4Control,DMA channel 4 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC4Config,Channel 4 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 5 Registers" base ad:0xE01401A0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC5SrcAddr,DMA Channel 5 Source Address Register" line.long 0x4 "DMACC5DestAddr,DMA Channel 5 Destination Address Register" line.long 0x8 "DMACC5LLI,DMA Channel 5 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC5Control,DMA channel 5 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC5Config,Channel 5 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 6 Registers" base ad:0xE01401C0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC6SrcAddr,DMA Channel 6 Source Address Register" line.long 0x4 "DMACC6DestAddr,DMA Channel 6 Destination Address Register" line.long 0x8 "DMACC6LLI,DMA Channel 6 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC6Control,DMA channel 6 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC6Config,Channel 6 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree "DMA Channel 7 Registers" base ad:0xE01401E0 width 16. group.long 0x00++0x13 line.long 0x0 "DMACC7SrcAddr,DMA Channel 7 Source Address Register" line.long 0x4 "DMACC7DestAddr,DMA Channel 7 Destination Address Register" line.long 0x8 "DMACC7LLI,DMA Channel 7 Linked List Item Register" hexmask.long 0x8 2.--31. 0x4 " LLI ,Address for next linked list item" textline " " bitfld.long 0x8 0. " LM ,AHB master select for loading next LLI" "Master 0,Master 1" line.long 0xC "DMACC7Control,DMA channel 7 control Register" bitfld.long 0xC 31. " I ,Terminal count interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0xC 30. " Prot3 ,Access cacheable" "Not cacheable,Cacheable" textline " " bitfld.long 0xC 29. " Prot2 ,Access bufferable" "Not bufferable,Bufferable" textline " " bitfld.long 0xC 28. " Prot1 ,Access mode" "User,Privileged" textline " " bitfld.long 0xC 27. " DI ,Destination increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 26. " SI ,Source increment after each transfer" "Not incremented,Incremented" textline " " bitfld.long 0xC 25. " D ,Destination AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 24. " S ,Source AHB master select" "Master 0,Master 1" textline " " bitfld.long 0xC 21.--23. " DWidth ,Destination transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 18.--20. " SWidth ,Source transfer width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0xC 15.--17. " DBSize ,Destination burst size" "1,4,8,16,32,64,128,256" textline " " bitfld.long 0xC 12.--14. " SBSize ,Source burst size" "1,4,8,16,32,64,128,256" textline " " hexmask.long.word 0xC 0.--11. 1. " TransferSize ,Transfer size" line.long 0x10 "DMACC7Config,Channel 7 Configuration Register" bitfld.long 0x10 18. " H ,Halt" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " A ,Active" "Inactive,Active" textline " " bitfld.long 0x10 16. " L ,Locked transfers enable" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " ITC ,Terminal count interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x10 14. " IE ,Interrupt error mask" "Masked,Not masked" textline " " bitfld.long 0x10 11.--13. " FlowCntrl ,Flow control and transfer type" "DMA/Memory to memory,DMA/Memory to peripheral,DMA/Peripheral to memory,DMA/Src peripheral to Dest Peripheral,Dest Periph./Src Periph. to Dest Periph.,Peripherial/Memory to Peripheral,Peripherial/Peripherial to Memory,Src Periph./Src Periph. to Dest Periph." textline " " bitfld.long 0x10 6.--10. " DestPeripheral ,Destination peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 1.--5. " SrcPeripheral ,Source peripheral" "SPI0 Tx,SPI0 Rx,SPI1 Tx,SPI1 Rx,SPI2 Tx,SPI2 Rx,UART0 Tx,UART0 Rx,UART1 Tx,UART1 Rx,?..." textline " " bitfld.long 0x10 0. " E ,Channel enable" "Disabled,Enabled" width 0xB tree.end tree.end endif endif else base vm:0x00000000 wgroup 0x00++0x00 textline "" textline "Please choose the appropriate CPU" endif textline ""