; --------------------------------------------------------------------------------
; @Title: A1156 On-Chip Peripherals
; @Props: Released
; @Author: GAC
; @Changelog: 2006-10-24 GAC
; @Manufacturer: ARM - ARM Ltd.
; @Doc: ARM1156T2F-S_TechnicalReferenceManual.pdf
;   ARM1156T2-S_TechnicalReferenceManual.pdf
; @Core: ARM1156
; @Chip:
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pera1156.per 16305 2023-06-28 11:47:37Z pegold $

config 16. 8.
width 0x0b
ASSERT VERSION.BUILD.BASE()>=80109.

sif PER.isNOTIFICATION()
base AVM:0x00000000
wgroup AVM:0x00++0
textline " Peripheral File Notification - "
button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()"
textline " ---------------------------------------------------------------"
textline " The peripheral file for this SoC cannot be displayed.          "
textline " Possible reasons are:                                          "
textline " - it is missing in the local installation or under development "
textline " - it is confidential                                           "
textline "                                                                "
textline " As fallback only the core registers are shown.                 "
textline " Please check    www.lauterbach.com/scripts.html                "
textline " or contact      support@lauterbach.com .                       "
textline "                                                                "
endif
width 0x8
; --------------------------------------------------------------------------------
;    Identification registers
; --------------------------------------------------------------------------------
tree "ID Registers"
rgroup c15:0x0--0x0
line.long 0x0 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL     ,Implementer code"
bitfld.long 0x0 20.--23.  "           VAR      ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19.  "           ARCH     , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
textline "                 "
hexmask.long.word 0x0 4.--15. 0x1 " PART     ,Primary Part Number"
bitfld.long 0x0 0.--3. "         REV      ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup c15:0x0400++0x00
line.long 0x00 "MPUTR,MPU Type Register"
hexmask.long.byte 0x00 16.--23. 1. " IR           ,Instruction region"
hexmask.long.byte 0x00 8.--15. 1. "             DR ,Data region"
textline "                 "
bitfld.long 0x00 0. " S            ,Specifies the type of MPU regions in the processor" "Unified,?..."
rgroup c15:0x0010++0x00
line.long 0x00 "PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. " STATE3       ,Indicates support for Thumb-2TM execution environment" "Not supported,?..."
bitfld.long 0x00 8.--11. "      STATE2     ,Indicates support for Java extension interface" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " STATE1       ,Indicates type of Thumb encoding that the processor supports" "Reserved,Reserved,Reserved,Thumb and Thumb-2,?..."
bitfld.long 0x00 0.--3. "  STATE0     ,Indicates support for 32-bit ARM instruction set" "Reserved,32-bit ARM,?..."
rgroup c15:0x0110++0x00
line.long 0x00 "PFR1,Processor Feature Register 1"
bitfld.long 0x00 4.--7. " SE           ,Security extension" "Not supported,?..."
bitfld.long 0x00 0.--3. "      PM         ,Programmer's model" "Reserved,ARMv4,?..."
rgroup c15:0x0210++0x00
line.long 0x00 "DFR0,Debug Feature Register 0"
bitfld.long 0x00 8.--11. " TEPDM        ,Indicates the type of embedded processor debug model that the processor supports" "Not supported,?..."
bitfld.long 0x00 4.--7. "      SDM        ,Indicates the type of Secure debug model that the processor supports" "Not supported,?..."
textline "                 "
bitfld.long 0x00 0.--3. " APDM         ,Indicates the type of applications processor debug model that the processor supports" "Reserved,Reserved,v6,?..."
rgroup c15:0x0310++0x00
line.long 0x00 "AFR0,Auxiliary Feature Register 0"
rgroup c15:0x0410++0x00
line.long 0x00 "MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 24.--27. " FCSE         ,Indicates support for FCSE" "Not supported,?..."
bitfld.long 0x00 20.--23. "      ARMV6      ,Indicates support for the ARMv6 Auxiliary Control Register" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 16.--19. " TCM          ,Indicates support for TCM and associated DMA" "Reserved,Reserved,TCM/not DMA,?..."
bitfld.long 0x00 12.--15. "        CCDMAA     ,Indicates support for cache coherency with DMA agent/shared memory" "Not supported,?..."
textline "                 "
bitfld.long 0x00 8.--11. " CCCPUA       ,Indicates support for cache coherency support with CPU agent/shared memory" "Not supported,?..."
bitfld.long 0x00 4.--7. "      PMSA       ,Indicates support for PMSA" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 0.--3. " VMSA         ,Indicates support for Virtual Memory System Architecture (VMSA)" "Not supported,?..."
rgroup c15:0x0510++0x00
line.long 0x00 "MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. " BTB          ,Indicates support for branch target buffer" "Not supported,?..."
bitfld.long 0x00 24.--27. "      TCODA      ,Indicates support for test and clean operations on data cache/Harvard or unified architecture" "Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " LOCUA        ,Indicates support for level one cache/all maintenance operations/unified architecture" "Not supported,?..."
bitfld.long 0x00 16.--19. "      LOCHA      ,Indicates support for level one cache/all maintenance operations/Harvard architecture" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " LOCLMOSWUA   ,Indicates support for level one cache line maintenance operations by Set Way/unified architecture" "Not supported,?..."
bitfld.long 0x00 8.--11. "      LOCLMOSWHA ,Indicates support for level one cache line maintenance operations by Set Way/Harvard architecture" "Reserved,Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " LOCLMOVAUA   ,Indicates support for level one cache line maintenance operations by VA/unified architecture" "Not supported,?..."
bitfld.long 0x00 0.--3. "      LOCLMOVAHA ,Indicates support for level one cache line maintenance operations by VA/Harvard architecture" "Reserved,Reserved,Supported,?..."
rgroup c15:0x0610++0x00
line.long 0x00 "MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WIS          ,Indicates support for wait for interrupt stalling" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "          MBO        ,Indicates support for memory barrier operations" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 16.--19. " TLBMOUA      ,Indicates support for TLB maintenance operations/unified architecture" "Not supported,?..."
bitfld.long 0x00 12.--15. "      TLBMOHA    ,Indicates support for TLB maintenance operations/Harvard architecture" "Not supported,?..."
textline "                 "
bitfld.long 0x00 8.--11. " CMROHA       ,Indicates support for cache maintenance range operations/Harvard architecture" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "          BFCROHA    ,Indicates support for background prefetch cache range operations/Harvard architecture" "Not supported,?..."
textline "                 "
bitfld.long 0x00 0.--3. " FPCROHA      ,Indicates support for foreground prefetch cache range operations/Harvard architecture" "Not supported,?..."
rgroup c15:0x0710++0x00
line.long 0x00 "MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 4.--7. " LTCLMOVAUA   ,Indicates support for level two cache line maintenance operations with VA/unified architecture" "Not supported,?..."
bitfld.long 0x00 0.--3. "      LTCLMOPAUA ,Indicates support for level two cache line maintenance operations with PA/unified architecture" "Not supported,?..."
rgroup c15:0x0020++0x00
line.long 0x00 "ISFAR0,Instruction Set Feature Attribute Register 0"
bitfld.long 0x00 24.--27. " DIVI         ,Indicates support for divide instructions" "Not supported,?..."
bitfld.long 0x00 20.--23. "      DEBI       ,Indicates support for debug instructions" "Reserved,BKPT,?..."
textline "                 "
bitfld.long 0x00 16.--19. " CI           ,Indicates support for coprocessor instructions" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "          CCBI       ,Indicates support for combined compare and branch instructions" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 8.--11. " BI           ,Indicates support for bitfield instructions" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "          BCI        ,Indicates support for bit counting instructions" "Reserved,CLZ,?..."
textline "                 "
bitfld.long 0x00 0.--3. " ALSI         ,Indicates support for atomic load and store instructions" "Reserved,SWP and SWPB,?..."
rgroup c15:0x0120++0x00
line.long 0x00 "ISFAR1,Instruction Set Feature Attribute Register 1"
bitfld.long 0x00 28.--31. " JI   ,Indicates support for Jazelle instructions" "Reserved,BXJ and J,?..."
bitfld.long 0x00 24.--27. "             INTERI ,Indicates support for interworking instructions" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " IMI  ,Indicates support for immediate instructions" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "             ITI    ,Indicates support for if then instructions" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " SZEI ,Indicates support for sign or zero extend instructions" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "             E2I    ,Indicates support for exception 2 instructions" "Reserved,SRS RFE CPS,?..."
textline "                 "
bitfld.long 0x00 4.--7. " E1I  ,Indicates support for exception 1 instructions" "Reserved,LDM(2) LDM(3) STM(2),?..."
bitfld.long 0x00 0.--3. "  ECI    ,Indicates support for endianness control instructions" "Reserved,SETEND and E,?..."
rgroup c15:0x0220++0x00
line.long 0x00 "ISFAR2,Instruction Set Feature Attribute Register 2"
bitfld.long 0x00 28.--31. " RI   ,Indicates support for reversal instructions" "Reserved,Reserved,REV REV16 REVSH RBIT,?..."
bitfld.long 0x00 24.--27. "  PSRI   ,Indicates support for PSR instructions" "Reserved,MRS and MSR,?..."
textline "                 "
bitfld.long 0x00 20.--23. " AUMI ,Indicates support for advanced unsigned multiply instructions" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "             ASMI   ,Indicates support for advanced signed multiply instructions" "Reserved,Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " MI   ,Indicates support for multiply instructions" "Reserved,Reserved,MLA and MLS,?..."
bitfld.long 0x00 8.--11. "           MAII   ,Indicates support for multi-access interruptible instructions" "Reserved,LDM and STM,?..."
textline "                 "
bitfld.long 0x00 4.--7. " MHI  ,Indicates support for memory hint instructions" "Reserved,PLD,?..."
bitfld.long 0x00 0.--3. "              LSI    ,Indicates support for load and store instructions" "Reserved,LDRD and STRD,?..."
rgroup c15:0x0320++0x00
line.long 0x00 "ISFAR3,Instruction Set Feature Attribute Register 3"
bitfld.long 0x00 28.--31. " T2EEE  ,Indicates support for Thumb-2 execution environment extensions" "Not supported,?..."
bitfld.long 0x00 24.--27. "    TNOPI ,Indicates support for true NOP instructions" "Reserved,NOP32 NOP16,?..."
textline "                 "
bitfld.long 0x00 20.--23. " TCI    ,Indicates support for Thumb copy instructions" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        TBI   ,Indicates support for table branch instructions" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " SPI    ,Indicates support for synchronization primitive instructions" "Reserved,LDREX and STREX,?..."
bitfld.long 0x00 8.--11. "  SWII  ,Indicates support for SWI instructions" "Reserved,SWI,?..."
textline "                 "
bitfld.long 0x00 4.--7. " SIMDI  ,Indicates support for Single Instruction Multiple Data (SIMD) instructions" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        SI    ,Indicates support for saturate instructions" "Reserved,Supported,?..."
rgroup c15:0x0420++0x00
line.long 0x00 "ISFAR4,Instruction Set Feature Attribute Register 4"
bitfld.long 0x00 12.--15. " SMII   ,Indicates support for SMI instructions" "Not supported,?..."
bitfld.long 0x00 8.--11. "    WI    ,Indicates support for writeback instructions" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " WSI    ,Indicates support for with shift instructions" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        UI    ,Indicates support for Unprivileged instructions" "Reserved,Reserved,Supported,?..."
rgroup c15:0x0520++0x00
line.long 0x00 "ISFAR5,Instruction Set Feature Attribute Register 5"
tree.end
width 0x8
tree "System control and configuration"
group c15:0x0001--0x0001
line.long 0x0 "CR,Control Register"
bitfld.long 0x00 30. " TE  ,Determines the state that the processor enters exceptions" "ARM,Thumb"
bitfld.long 0x00 27. "    NMI ,Determines the state of the non-maskable bit that is set by a configuration pin FIQISNMI" "Compatible,Only clear"
bitfld.long 0x0 25. "   EE  ,Exception Endianess" "Little ,Big"
bitfld.long 0x0 24. "  VE  ,Vector Enable" "Fixed,VIC"
textline "                 "
bitfld.long 0x0 22. " U   ,Unaligned Data Access Operations" "Disable,Enable"
bitfld.long 0x0 21. "  FI  ,Fast Interrupts" "Disable,Enable"
textline "                 "
bitfld.long 0x0 15. " L4  ,Compatible to Software Version 4" "No,Yes"
bitfld.long 0x0 14. "      RR  ,Round Robin Replacement" "Random,Round robin"
bitfld.long 0x0 13. "  V  ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000"
textline "                 "
bitfld.long 0x0 12. " I   ,Level one Instruction Cache" "Disable,Enable"
bitfld.long 0x0 11. "  Z   ,Program flow prediction" "Disable,Enable"
textline "                 "
bitfld.long 0x0 0x7 " B   ,Endianism" "Little,Big"
bitfld.long 0x0 0x2 "   C   ,Data Cache" "Disable,Enable"
bitfld.long 0x0 0x1 "  A   ,Alignment Fault Check" "Disable,Enable"
bitfld.long 0x0 0x0 "  M   ,MPU" "Disable,Enable"
group c15:0x0101--0x0101
line.long 0x00 "ACR,Auxiliary Control Register"
bitfld.long 0x00 9. " NS  ,Override Shared attribute in Normal/Non Cacheable data regions when the MPU is disabled or not present" "Shared,Not Shared"
bitfld.long 0x00 8. "            BC  ,Enables or disables the dynamic branch pattern cache if program flow prediction is enabled by Z bit/bit 11 of CP15 Register c1" "Disable,Enable"
textline "                 "
bitfld.long 0x00 7. " BL  ,Enables or disables the dynamic branch predictor loop cache if program flow prediction is enabled by Z bit/bit 11 of CP15 Register c1" "Disable,Enable"
bitfld.long 0x00 6. "  IR  ,Enables or disables instruction cache reload on a parity error if PE/bit 2 is set" "Disable,Enable"
bitfld.long 0x00 5. "  RV  ,Enables or disables block transfer cache operations" "Enable,Disable"
bitfld.long 0x00 4. "  RA  ,Enables or disables clean entire data cache" "Enable,Disable"
textline "                 "
bitfld.long 0x00 3. " FE  ,Enables or disables branch folding within the prefetch unit if program flow prediction is enabled by Z bit/bit 11 of CP15 Register c1" "Disable,Enable"
bitfld.long 0x00 2. "  PE  ,Enables or disables the generation and checking of parity information for the Instruction and Data caches" "Disable,Enable"
bitfld.long 0x00 1. "  DB  ,Enables or disables the use of the Dynamic Predictor if program flow prediction is enabled by Z bit/bit 11 of CP15 Register" "Disable,Enable"
bitfld.long 0x00 0. "  RS  ,Enables or disables the use of the return stack if program flow prediction is enabled by Z bit/bit 11 of CP15 Register c1" "Disable,Enable"
group c15:0x201--0x201
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 26.--27. " CP13    ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 24.--25. "  CP12    ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 22.--23. " CP11    ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 20.--21. "  CP10    ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 18.--19. " CP9     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 16.--17. "  CP8     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 14.--15. " CP7     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 12.--13. "  CP6     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 10.--11. " CP5     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 8.--9. "  CP4     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 6.--7. " CP3     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 4.--5. "  CP2     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 2.--3. " CP1     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 0.--1. "  CP0     ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
tree.end
width 0x8
tree "MPU configuration and control"
group c15:0x0001--0x0001
line.long 0x0 "CR,Control Register"
bitfld.long 0x00 30. " TE  ,Determines the state that the processor enters exceptions" "ARM,Thumb"
bitfld.long 0x00 27. "    NMI ,Determines the state of the non-maskable bit that is set by a configuration pin FIQISNMI" "Compatible,Only clear"
bitfld.long 0x0 25. "   EE  ,Exception Endianess" "Little ,Big"
bitfld.long 0x0 24. "  VE  ,Vector Enable" "Fixed,VIC"
textline "                 "
bitfld.long 0x0 22. " U   ,Unaligned Data Access Operations" "Disable,Enable"
bitfld.long 0x0 21. "  FI  ,Fast Interrupts" "Disable,Enable"
textline "                 "
bitfld.long 0x0 15. " L4  ,Compatible to Software Version 4" "No,Yes"
bitfld.long 0x0 14. "      RR  ,Round Robin Replacement" "Random,Round robin"
bitfld.long 0x0 13. "  V  ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000"
textline "                 "
bitfld.long 0x0 12. " I   ,Level one Instruction Cache" "Disable,Enable"
bitfld.long 0x0 11. "  Z   ,Program flow prediction" "Disable,Enable"
textline "                 "
bitfld.long 0x0 0x7 " B   ,Endianism" "Little,Big"
bitfld.long 0x0 0x2 "   C   ,Data Cache" "Disable,Enable"
bitfld.long 0x0 0x1 "  A   ,Alignment Fault Check" "Disable,Enable"
bitfld.long 0x0 0x0 "  M   ,MPU" "Disable,Enable"
textline " "
group c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 11. " RW           ,Indicates what type of access caused the abort" "Read,Write"
bitfld.long 0x00 0.--3. 10. 12. " SA_SB_STATUS ,Indicates the Type of fault generated" "Background,Alignment,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,PEDA,Reserved,Reserved,Reserved,Reserved,Permission,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IEDA,Reserved,IPEE,PPEE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,PESA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IESA,?..."
group c15:0x0006++0x00
line.long 0x00 "FAR,Fault Address Register"
group c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 0.--3. 10. 12. " SA_SB_STATUS ,Indicates the Type of fault generated" "Background,Alignment,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,PEDA,Reserved,Reserved,Reserved,Reserved,Permission,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IEDA,Reserved,IPEE,PPEE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,PESA,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IESA,?..."
group c15:0x0206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
group c15:0x0106++0x00
line.long 0x00 "WFAR,Watchpoint Fault Address Register"
textline " "
group c15:0x0016++0x00
line.long 0x00 "RBAR,Region Base Address Register"
hexmask.long 0x00 5.--31. 0x20 " BA           ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER,Region Size and Enable Register"
bitfld.long 0x00 1.--5. " RS           ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR,Region Access Control Register"
bitfld.long 0x00 12. " XN           ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "            AP ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
textline "                 "
bitfld.long 0x00 3.--5. " TEX          ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "            S  ,Share" "Non-Shared,Shared"
textline "                 "
bitfld.long 0x00 1. " C            ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "   B  ,Bufferable" "Non-Bufferable,Bufferable"
group c15:0x0026++0x00
line.long 0x00 "MRNR,Memory Region Number Register"
bitfld.long 0x00 0.--3. " Region       ,Defines the group of registers to be accessed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
group c15:0x010d++0x00
line.long 0x00 "PIDR,Process ID Register"
hexmask.long 0x00 0.--31. 1. " PROCID ,PROCID"
tree "MPU regions"
group c15:0x0016++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RBAR0,Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER0,Region Size and Enable Register 0"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR0,Region Access Control Register 0"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RBAR1,Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER1,Region Size and Enable Register 1"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR1,Region Access Control Register 1"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RBAR2,Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER2,Region Size and Enable Register 2"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR2,Region Access Control Register 2"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RBAR3,Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER3,Region Size and Enable Register 3"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR3,Region Access Control Register 3"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RBAR4,Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER4,Region Size and Enable Register 4"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR4,Region Access Control Register 4"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RBAR5,Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER5,Region Size and Enable Register 5"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR5,Region Access Control Register 5"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RBAR6,Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER6,Region Size and Enable Register 6"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR6,Region Access Control Register 6"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RBAR7,Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER7,Region Size and Enable Register 7"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR7,Region Access Control Register 7"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RBAR8,Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER8,Region Size and Enable Register 8"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR8,Region Access Control Register 8"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RBAR9,Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER9,Region Size and Enable Register 9"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR9,Region Access Control Register 9"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RBAR10,Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER10,Region Size and Enable Register 10"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR10,Region Access Control Register 10"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RBAR11,Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER11,Region Size and Enable Register 11"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR11,Region Access Control Register 11"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xC
line.long 0x00 "RBAR12,Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER12,Region Size and Enable Register 12"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR12,Region Access Control Register 12"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xD
line.long 0x00 "RBAR13,Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER13,Region Size and Enable Register 13"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR13,Region Access Control Register 13"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xE
line.long 0x00 "RBAR14,Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER14,Region Size and Enable Register 14"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR14,Region Access Control Register 14"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xF
line.long 0x00 "RBAR15,Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " BA  ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER15,Region Size and Enable Register 15"
bitfld.long 0x00 1.--5. " RS  ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "  EN      ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR15,Region Access Control Register 15"
bitfld.long 0x00 12. " XN  ,Execute never" "All,No"
bitfld.long 0x00 8.--10. "  AP  ,Access permission" "All fault,Privileged,Writes in User faults,Full,Reserved,Privileged read,Privileged/User read,?..."
bitfld.long 0x00 3.--5. "  TEX  ,Type extension" "000,001,010,011,100,101,110,111"
bitfld.long 0x00 2. "  S  ,Share" "Non-Shared,Shared"
bitfld.long 0x00 1. "  C  ,Cachable" "Non-Cachable,Cachable"
bitfld.long 0x00 0. "  B  ,Bufferable" "Non-Bufferable,Bufferable"
textline " "
tree.end
tree.end
width 0x6
tree "Cache configuration and control"
group c15:0x0009++0X00
line.long 0x00 "DCLR,Data Cache Lockdown Register"
bitfld.long 0x00 3. " L3 ,Locks cache way 3" "Not locked,Locked"
bitfld.long 0x00 2. "  L2 ,Locks cache way 2" "Not locked,Locked"
bitfld.long 0x00 1. "  L1 ,Locks cache way 1" "Not locked,Locked"
bitfld.long 0x00 0. "  L0 ,Locks cache way 0" "Not locked,Locked"
group c15:0x0109++0x00
line.long 0x00 "ICLR,Instruction Cache Lockdown Register"
bitfld.long 0x00 3. " L3 ,Locks cache way 3" "Not locked,Locked"
bitfld.long 0x00 2. "  L2 ,Locks cache way 2" "Not locked,Locked"
bitfld.long 0x00 1. "  L1 ,Locks cache way 1" "Not locked,Locked"
bitfld.long 0x00 0. "  L0 ,Locks cache way 0" "Not locked,Locked"
rgroup c15:0x0100++0x00
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 25.--28. " CTYPE ,Cache type" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x00 24. "     S    ,Specifies whether the cache is a unified cache or separate instruction and data caches" "Unified,Separate"
bitfld.long 0x00 18.--20. "  DSIZE ,Data cache size" "Reserved,1KB,2KB,4KB,8KB,16KB,32KB,64KB"
bitfld.long 0x00 15.--17. "  DASSOC ,Data cache associativity" "1-way,2-way,4-way,?..."
textline "               "
bitfld.long 0x00 14. " DM    ,The data multiplier bit" "Present,Absent"
bitfld.long 0x00 12.--13. "  DLEN ,Data cache line length" "Reserved,Reserved,8 words,?..."
bitfld.long 0x00 6.--8. "  ISIZE ,Instruction cache size" "Reserved,1KB,2KB,4KB,8KB,16KB,32KB,64KB"
bitfld.long 0x00 3.--5. "  IASSOC ,The Iassoc field indicates the instruction cache associativity" "1-way,2-way,4-way,?..."
textline "               "
bitfld.long 0x00 2. " IM    ,The instruction multiplier bit" "Present,Absent"
bitfld.long 0x00 0.--1. "  ILEN ,Instruction cache line length" "Reserved,Reserved,8 words,?..."
group c15:0x0107++0x00
line.long 0x00 "COR,Cache Operations Register"
rgroup c15:0x06a7++0x00
line.long 0x00 "CDSR,Cache Dirty Status Register"
bitfld.long 0x00 0. " C     ,Cache Dirty/Clean" "Clean,Dirty"
tree.end
width 0x8
tree "TCM configuration and control"
rgroup c15:0x0200++0x00
line.long 0x00 "TCMSR,TCM Status Register"
bitfld.long 0x00 16.--18. " DTCM ,Specifies the number of DTCM banks implemented" "Reserved,1,?..."
bitfld.long 0x00 0.--2. "  ITCM ,Specifies the number of I TCM banks implemented" "Reserved,1,?..."
group c15:0x0019++0x00
line.long 0x00 "DTCMRR,Data TCM Region Register"
hexmask.long.tbyte 0x00 12.--31. 0x1000 " BA ,Base address"
bitfld.long 0x00 2.--6. "  SIZE ,Size" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,?..."
bitfld.long 0x00 0. "  EN ,Enable" "Disabled,Enabled"
group c15:0x0119++0x00
line.long 0x00 "ITCMRR,Instruction TCM Region Register"
hexmask.long.tbyte 0x00 12.--31. 0x1000 " BA ,Base address"
bitfld.long 0x00 2.--6. "  SIZE ,Size" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,?..."
bitfld.long 0x00 0. "  EN ,Enable" "Disabled,Enabled"
tree.end
width 0x6
tree "System performance monitor"
group c15:0x00cf++0x00
line.long 0x00 "PMCR,Performance Monitor Control Register"
bitfld.long 0x00 30. " FCC       ,Enable and disable clock counter FIQ interrupt" "Disabled,Enabled"
bitfld.long 0x00 29. "          FC1       ,Enable and disable performance counter 1 FIQ interrupt reporting" "Disabled,Enabled"
bitfld.long 0x00 28. "     FC0 ,Enable and disable performance counter 0 FIQ interrupt reporting" "Disabled,Enabled"
textline "               "
hexmask.long.byte 0x00 20.--27. 1. " EVTCOUNT0 ,Identifies the source of events for Count Registers"
hexmask.long.byte 0x00 12.--19. 1. "                EVTCOUNT1 ,Identifies the source of events for Count Registers"
bitfld.long 0x00 11. "           X   ,Enable Export of the events to the event bus to an external monitoring block such as the ETM to trace events" "Disabled,Enabled"
textline "               "
bitfld.long 0x00 10. " OCC       ,Cycle Counter Register overflow flag" "No overflow,Overflow"
eventfld.long 0x00 9. "       OC1       ,Count Register 1 overflow flag" "No overflow,Overflow"
eventfld.long 0x00 8. "  OC0 ,Count Register 0 overflow flag" "No overflow,Overflow"
textline "               "
bitfld.long 0x00 6. " ICC       ,Used to enable and disable Cycle Counter interrupt reporting" "Disabled,Enabled"
bitfld.long 0x00 5. "          IC1       ,Enable and disable Cycle Counter 1 interrupt reporting" "Disabled,Enabled"
bitfld.long 0x00 4. "     IC0 ,Enable and disable Count Register 0 interrupt reporting" "Disabled,Enabled"
textline "               "
bitfld.long 0x00 3. " D         ,Cycle count divider" "Every cycle,Every 64th cycle"
bitfld.long 0x00 2. "  C         ,Cycle Counter Register Reset" "No action,Reset"
bitfld.long 0x00 1. "    P   ,Count Register 1 and Count Register 0 Reset" "No action,Reset"
textline "               "
bitfld.long 0x00 0. " E         ,Enable all counters" "Disabled,Enabled"
group c15:0x02cf++0x00
line.long 0x00 "CR0,Count Register 0"
hexmask.long 0x00 0.--31. 1. " CV ,Count value"
group c15:0x03cf++0x00
line.long 0x00 "CR1,Count Register 1"
hexmask.long 0x00 0.--31. 1. " CV ,Count value"
group c15:0x01cf++0x00
line.long 0x00 "CCR,Cycle Counter Register"
hexmask.long 0x00 0.--31. 1. " CV ,Count value"
tree.end
width 0x7
tree "Cache debug and software test access"
group c15:0x700f++0x00
line.long 0x00 "CDCR,Cache Debug Control Register"
bitfld.long 0x00 2. " WT ,Defines write-through behavior for regions marked as write-back" "Not forced,Forced"
bitfld.long 0x00 1. "  IL ,Enables or disables Instruction cache linefill" "Enabled,Disabled"
bitfld.long 0x00 0. "  DL ,Enables or disables data cache linefill" "Enabled,Disabled"
group c15:0x30cf++0x00
line.long 0x00 "DCMVR,Data Cache Master Valid Register"
group c15:0x300f++0x00
line.long 0x00 "DCDR,Data Cache Debug Register"
rgroup c15:0x310f++0x00
line.long 0x00 "ICDR,Instruction Cache Debug Register"
group c15:0x308f++0x00
line.long 0x00 "ICMVR,Instruction Cache Master Valid Register"
tree.end
width 0x6
tree "Debug"
rgroup c14:0x0000++0x00
line.long 0x00 "DIDR,Debug ID Register"
bitfld.long 0x00 28.--31. " WRP      ,Number of Watchpoint Register Pairs (WRPs)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 24.--27. "        BRP     ,Number of Breakpoint Register Pairs (BRPs)" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline "               "
bitfld.long 0x00 20.--23. " CONTEXT  ,Number of Breakpoint Register Pairs with Context ID comparison capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "        VERSION ,Debug architecture version" "Reserved,V6,?..."
textline "               "
bitfld.long 0x00 12.--15. " REVISION ,Debug architecture revision" "0,?..."
bitfld.long 0x00 4.--7. "  VARIANT ,Implementation-defined variant number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "               "
bitfld.long 0x00 0.--3. " REVISION ,Implementation-defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group c14:0x0010++0x00
line.long 0x00 "DSCR,Debug Status and Control Register"
bitfld.long 0x00 30. " RDTRFULL    ,The rDTRfull flag" "Empty,Full"
bitfld.long 0x00 29. "         WDTRFULL ,The wDTRfull flag" "Empty,Full"
textline "               "
bitfld.long 0x00 15. " MDME        ,The Monitor debug-mode enable bit" "Disabled,Enabled"
bitfld.long 0x00 14. "      MS       ,Mode select bit" "Monitor,Halt"
textline "               "
bitfld.long 0x00 13. " ARM         ,Execute ARM instruction enable bit" "Disabled,Enabled"
bitfld.long 0x00 12. "      COMMS    ,User mode access to communications channel control bit" "Enabled,Disabled"
textline "               "
bitfld.long 0x00 11. " INTERRUPTS  ,Interrupts bit" "Enabled,Disabled"
bitfld.long 0x00 10. "      DBGACK   ,DbgAck bit" "No effect,High"
textline "               "
bitfld.long 0x00 9. " DBGNOPWRDWN ,Powerdown disable" "Low,High"
bitfld.long 0x00 7. "          SIDA     ,Sticky imprecise Data Aborts bit" "Not occurred,Occurred"
textline "               "
bitfld.long 0x00 6. " SPDA        ,Sticky precise Data Abort bit" "Not occurred,Occurred"
bitfld.long 0x00 2.--5. "  ENTRY    ,Method of entry bits" "Halt DBGTAP,Breakpoint,Watchpoint,BKPT,EDBGRQ,Vector catch,Data-side abort,Instruction-side abort,?..."
textline "               "
bitfld.long 0x00 1. " CR          ,Core restarted bit" "Not exited,Exited"
bitfld.long 0x00 0. "    CH       ,Core halted bit" "Normal,Debug"
group c14:0x0070++0x00
line.long 0x00 "VCR,Vector Catch Register"
bitfld.long 0x00 7. " FIQ   ,Vector catch enable/FIQ" "Disabled,Enabled"
bitfld.long 0x00 6. "     IRQ       ,Vector catch enable/IRQ" "Disabled,Enabled"
textline "               "
bitfld.long 0x00 4. " DA    ,Data Abort" "Not aborted,Aborted"
bitfld.long 0x00 3. "  PA        ,Prefetch Abort" "Not aborted,Aborted"
textline "               "
bitfld.long 0x00 2. " SVC   ,Vector catch enable/SVC" "Disabled,Enabled"
bitfld.long 0x00 1. "     UNDEFINED ,Vector catch enable/Undefined Instruction" "Disabled,Enabled"
textline "               "
bitfld.long 0x00 0. " RESET ,Vector catch enable/Reset" "Disabled,Enabled"
group c14:0x0050++0x00
line.long 0x00 "DTR,Data Transfer Register"
hexmask.long 0x00 0.--31. 1. " Data  ,Read/Write data transfer"
tree.end
tree "Breakpoints"
group c14:0x0400++0x00
line.long 0x00 "BVR0,Breakpoint Value Register 0"
hexmask.long 0x00 0.--31. 1. " BA ,Breakpoint address"
group c14:0x0500++0x00
line.long 0x00 "BCR0,Breakpoint Control Register 0"
bitfld.long 0x00 21.--22. " M ,Comparing Against BVR[31:3]/BCR[8:5]" "Bus instruction/BVR and BCR,CP15 context ID/BVR,Bus instruction/BVR and BCR,?..."
bitfld.long 0x00 20. "  E ,Link Enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "  LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "  BAS ,Byte address select" "No breakpoint,BVR[31:2]:+0,BVR[31:2]:+1,BVR[31:2]:+0/1,BVR[31:2]:+2,BVR[31:2]:+0/2,BVR[31:2]:+1/2,BVR[31:2]:+0/1/2,BVR[31:2]:+3,BVR[31:2]:+0/3,BVR[31:2]:+1/3,BVR[31:2]:+0/1/3,BVR[31:2]:+2/3,BVR[31:2]:+0/2/3,BVR[31:2]:+1/2/3,BVR[31:2]:+0/1/2/3"
textline "               "
bitfld.long 0x00 1.--2. " Priv ,Privileged mode control" "Reserved,Privileged,User,Privileged/User"
bitfld.long 0x00 0. "              B ,Breakpoint enable" "Disabled,Enabled"
group c14:0x0410++0x00
line.long 0x00 "BVR1,Breakpoint Value Register 1"
hexmask.long 0x00 0.--31. 1. " BA ,Breakpoint address"
group c14:0x0510++0x00
line.long 0x00 "BCR1,Breakpoint Control Register 1"
bitfld.long 0x00 21.--22. " M ,Comparing Against BVR[31:3]/BCR[8:5]" "Bus instruction/BVR and BCR,CP15 context ID/BVR,Bus instruction/BVR and BCR,?..."
bitfld.long 0x00 20. "  E ,Link Enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "  LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "  BAS ,Byte address select" "No breakpoint,BVR[31:2]:+0,BVR[31:2]:+1,BVR[31:2]:+0/1,BVR[31:2]:+2,BVR[31:2]:+0/2,BVR[31:2]:+1/2,BVR[31:2]:+0/1/2,BVR[31:2]:+3,BVR[31:2]:+0/3,BVR[31:2]:+1/3,BVR[31:2]:+0/1/3,BVR[31:2]:+2/3,BVR[31:2]:+0/2/3,BVR[31:2]:+1/2/3,BVR[31:2]:+0/1/2/3"
textline "               "
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Privileged/User"
bitfld.long 0x00 0. "              B ,Breakpoint enable" "Disabled,Enabled"
group c14:0x0420++0x00
line.long 0x00 "BVR2,Breakpoint Value Register 2"
hexmask.long 0x00 0.--31. 1. " BA ,Breakpoint address"
group c14:0x0520++0x00
line.long 0x00 "BCR2,Breakpoint Control Register 2"
bitfld.long 0x00 21.--22. " M ,Comparing Against BVR[31:3]/BCR[8:5]" "Bus instruction/BVR and BCR,CP15 context ID/BVR,Bus instruction/BVR and BCR,?..."
bitfld.long 0x00 20. "  E ,Link Enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "  LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "  BAS ,Byte address select" "No breakpoint,BVR[31:2]:+0,BVR[31:2]:+1,BVR[31:2]:+0/1,BVR[31:2]:+2,BVR[31:2]:+0/2,BVR[31:2]:+1/2,BVR[31:2]:+0/1/2,BVR[31:2]:+3,BVR[31:2]:+0/3,BVR[31:2]:+1/3,BVR[31:2]:+0/1/3,BVR[31:2]:+2/3,BVR[31:2]:+0/2/3,BVR[31:2]:+1/2/3,BVR[31:2]:+0/1/2/3"
textline "               "
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Privileged/User"
bitfld.long 0x00 0. "              B ,Breakpoint enable" "Disabled,Enabled"
group c14:0x0430++0x00
line.long 0x00 "BVR3,Breakpoint Value Register 3"
hexmask.long 0x00 0.--31. 1. " BA ,Breakpoint address"
group c14:0x0530++0x00
line.long 0x00 "BCR3,Breakpoint Control Register 3"
bitfld.long 0x00 21.--22. " M ,Comparing Against BVR[31:3]/BCR[8:5]" "Bus instruction/BVR and BCR,CP15 context ID/BVR,Bus instruction/BVR and BCR,?..."
bitfld.long 0x00 20. "  E ,Link Enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "  LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "  BAS ,Byte address select" "No breakpoint,BVR[31:2]:+0,BVR[31:2]:+1,BVR[31:2]:+0/1,BVR[31:2]:+2,BVR[31:2]:+0/2,BVR[31:2]:+1/2,BVR[31:2]:+0/1/2,BVR[31:2]:+3,BVR[31:2]:+0/3,BVR[31:2]:+1/3,BVR[31:2]:+0/1/3,BVR[31:2]:+2/3,BVR[31:2]:+0/2/3,BVR[31:2]:+1/2/3,BVR[31:2]:+0/1/2/3"
textline "               "
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Privileged/User"
bitfld.long 0x00 0. "              B ,Breakpoint enable" "Disabled,Enabled"
group c14:0x0440++0x00
line.long 0x00 "BVR4,Breakpoint Value Register 4"
hexmask.long 0x00 0.--31. 1. " BA ,Breakpoint address"
group c14:0x0540++0x00
line.long 0x00 "BCR4,Breakpoint Control Register 4"
bitfld.long 0x00 21.--22. " M ,Comparing Against BVR[31:3]/BCR[8:5]" "Bus instruction/BVR and BCR,CP15 context ID/BVR,Bus instruction/BVR and BCR,?..."
bitfld.long 0x00 20. "  E ,Link Enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "  LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "  BAS ,Byte address select" "No breakpoint,BVR[31:2]:+0,BVR[31:2]:+1,BVR[31:2]:+0/1,BVR[31:2]:+2,BVR[31:2]:+0/2,BVR[31:2]:+1/2,BVR[31:2]:+0/1/2,BVR[31:2]:+3,BVR[31:2]:+0/3,BVR[31:2]:+1/3,BVR[31:2]:+0/1/3,BVR[31:2]:+2/3,BVR[31:2]:+0/2/3,BVR[31:2]:+1/2/3,BVR[31:2]:+0/1/2/3"
textline "               "
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Privileged/User"
bitfld.long 0x00 0. "              B ,Breakpoint enable" "Disabled,Enabled"
group c14:0x0450++0x00
line.long 0x00 "BVR5,Breakpoint Value Register 5"
hexmask.long 0x00 0.--31. 1. " BA ,Breakpoint address"
group c14:0x0550++0x00
line.long 0x00 "BCR5,Breakpoint Control Register 5"
bitfld.long 0x00 21.--22. " M ,Comparing Against BVR[31:3]/BCR[8:5]" "Bus instruction/BVR and BCR,CP15 context ID/BVR,Bus instruction/BVR and BCR,?..."
bitfld.long 0x00 20. "  E ,Link Enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "  LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "  BAS ,Byte address select" "No breakpoint,BVR[31:2]:+0,BVR[31:2]:+1,BVR[31:2]:+0/1,BVR[31:2]:+2,BVR[31:2]:+0/2,BVR[31:2]:+1/2,BVR[31:2]:+0/1/2,BVR[31:2]:+3,BVR[31:2]:+0/3,BVR[31:2]:+1/3,BVR[31:2]:+0/1/3,BVR[31:2]:+2/3,BVR[31:2]:+0/2/3,BVR[31:2]:+1/2/3,BVR[31:2]:+0/1/2/3"
textline "               "
bitfld.long 0x00 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Privileged/User"
bitfld.long 0x00 0. "              B ,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Watchpoints"
group c14:0x0600++0x00
line.long 0x00 "WVR0,Watchpoint Value Register 0"
hexmask.long 0x00 2.--31. 0x04 " WA ,Watchpoint address"
group c14:0x0700++0x00
line.long 0x00 "WCR0,Watchpoint Control Register 0"
bitfld.long 0x00 20. " E ,Linking enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "    LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "        BAS ,Byte address select" "No watchpoint,WVR[31:2]:+0,WVR[31:2]:+1,WVR[31:2]:+0/1,WVR[31:2]:+2,WVR[31:2]:+0/2,WVR[31:2]:+1/2,WVR[31:2]:+0/1/2,WVR[31:2]:+3,WVR[31:2]:+0/3,WVR[31:2]:+1/3,WVR[31:2]:+0/1/3,WVR[31:2]:+2/3,WVR[31:2]:+0/2/3,WVR[31:2]:+1/2/3,WVR[31:2]:+0/1/2/3"
bitfld.long 0x00 3.--4. "  L/S ,Determines what type of access the watchpoint can act on" "Reserved,Load,Store,Either"
textline "               "
bitfld.long 0x00 1.--2. " Priv ,Determines what type of access privilege the watchpoint acts on" "Reserved,Privileged,User,Either"
bitfld.long 0x00 0. "  W    ,Watchpoint enable" "Disabled,Enabled"
group c14:0x0610++0x00
line.long 0x00 "WVR1,Watchpoint Value Register 1"
hexmask.long 0x00 2.--31. 0x04 " WA ,Watchpoint address"
group c14:0x0710++0x00
line.long 0x00 "WCR1,Watchpoint Control Register 1"
bitfld.long 0x00 20. " E ,Linking enable" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "    LBRP ,Linked BRP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--8. "        BAS ,Byte address select" "No watchpoint,WVR[31:2]:+0,WVR[31:2]:+1,WVR[31:2]:+0/1,WVR[31:2]:+2,WVR[31:2]:+0/2,WVR[31:2]:+1/2,WVR[31:2]:+0/1/2,WVR[31:2]:+3,WVR[31:2]:+0/3,WVR[31:2]:+1/3,WVR[31:2]:+0/1/3,WVR[31:2]:+2/3,WVR[31:2]:+0/2/3,WVR[31:2]:+1/2/3,WVR[31:2]:+0/1/2/3"
bitfld.long 0x00 3.--4. "  L/S ,Determines what type of access the watchpoint can act on" "Reserved,Load,Store,Either"
textline "               "
bitfld.long 0x00 1.--2. " Priv ,Determines what type of access privilege the watchpoint acts on" "Reserved,Privileged,User,Either"
bitfld.long 0x00 0. "  W    ,Watchpoint enable" "Disabled,Enabled"
group c14:0x0060++0x00
line.long 0x00 "WFAR,Watchpoint Fault Address Register"
tree.end
width 0xB
textline ""