; -------------------------------------------------------------------------------- ; @Title: ARM1136J-S and ARM1136JF-S on chip peripherals ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chip: ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pera1136.per 16305 2023-06-28 11:47:37Z pegold $ config 16. 8. width 8. ASSERT VERSION.BUILD.BASE()>=80109. sif PER.isNOTIFICATION() base AVM:0x00000000 wgroup AVM:0x00++0 textline " Peripheral File Notification - " button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()" textline " ---------------------------------------------------------------" textline " The peripheral file for this SoC cannot be displayed. " textline " Possible reasons are: " textline " - it is missing in the local installation or under development " textline " - it is confidential " textline " " textline " As fallback only the core registers are shown. " textline " Please check www.lauterbach.com/scripts.html " textline " or contact support@lauterbach.com . " textline " " endif width 0x8 ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- tree "ID Registers" rgroup c15:0x0--0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup c15:0x100--0x100 line.long 0x0 "CTYPE,Cache Type Register" bitfld.long 0x0 25.--28. " CTYPE ,Cache type" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " S ,Unified or Separate Instruction Cache" "Unified,Separate" textline " " bitfld.long 0x0 23. " DP ,Restriction on page allocation for bits [13:12] of the Virtual Address" "No restriction,Restriction" bitfld.long 0x0 18.--20. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k" bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "Reserved,Reserved,4-way,?..." bitfld.long 0x0 14. " DM ,Data multiplier bit" "0,1" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "Reserved,Reserved,32 bytes,?..." textline " " bitfld.long 0x0 11. " IP ,Restriction on page allocation for bits [1:0] of the Virtual Address" "No restriction,Restriction" bitfld.long 0x0 6.--8. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k" bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "Reserved,Reserved,4-way,?..." bitfld.long 0x0 2. " IM ,Instruction multiplier bit" "0,1" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "Reserved,Reserved,32 bytes,?..." rgroup c15:0x200--0x200 line.long 0x0 "TCMS,TCM Status Register" bitfld.long 0x0 16.--18. " DTCM ,Number of Data TCMs Implemented" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. " ITCM ,Number of Instruction TCMs Implemented" "0,1,2,3,4,5,6,7" rgroup c15:0x300--0x300 line.long 0x0 "TLBT,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ITLBLOCK ,Specifies the Number of Instruction TLB Lockable Entries" hexmask.long.byte 0x0 8.--15. 0x1 " DTLBLOCK ,Specifies the Number of Unified or Data TLB Lockable Entries" bitfld.long 0x0 0. " U ,Unified or Separate Instruction TLBs" "Unified,Separate" tree.end tree "System Configuration and Control" group c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable" bitfld.long 0x0 28. " TRE ,TEX Remap Enable" "Disable,Enable" bitfld.long 0x0 25. " EE ,Exception Endianess" "Little,Big" bitfld.long 0x0 24. " VE ,Vector Enable" "Fixed,VIC" textline " " bitfld.long 0x0 23. " XP ,Extended pagetable configuration" "Subpages,ARMv6" bitfld.long 0x0 22. " U ,Unaligned Data Access Operations" "Disable,Enable" bitfld.long 0x0 21. " FI ,Fast Interrupts" "Disable,Enable" bitfld.long 0x0 18. " IT ,Global Instruction TCM enable/disable" "No,Yes" textline " " bitfld.long 0x0 16. " DT ,Global Data TCM enable/disable" "No,Yes" bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "No,Yes" bitfld.long 0x0 14. " RR ,Round Robin Replacement" "Random,Round robin" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Level one Instruction Cache" "Disable,Enable" bitfld.long 0x0 11. " Z ,Program flow prediction" "Disable,Enable" bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable" textline " " bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable" bitfld.long 0x0 7. " B ,Endianism" "Little,Big" bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Alignment Fault Check" "Disable,Enable" textline " " bitfld.long 0x0 0. " M ,MMU" "Disable,Enable" group c15:0x101--0x101 line.long 0x0 "ACR,Auxiliary Control Register" bitfld.long 0x0 6. " CZ ,Restrict cache size" "Normal,Limited" bitfld.long 0x0 5. " RV ,Disable Block Transfer Cache Operations" "Enable,Disable" bitfld.long 0x0 4. " RA ,Disable Clean Entire Data Cache" "Enable,Disable" bitfld.long 0x0 3. " TR ,MicroTLB Random Replacement" "Round robin,Random" textline " " bitfld.long 0x0 2. " SB ,Static Branch Prediction Enable" "Disable,Enable" bitfld.long 0x0 1. " DB ,Dynamic Branch Prediction Enable" "Disable,Enable" bitfld.long 0x0 0. " RS ,Return Stack Enable" "Disable,Enable" group c15:0x201--0x201 line.long 0x0 "CACR,Coprocessor Access Control Register" bitfld.long 0x0 26.--27. " CP13 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 24.--25. " CP12 ,Coprocesor Access Control" "Denied,Priv,Res,Full" textline " " bitfld.long 0x0 22.--23. " CP11 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 18.--19. " CP9 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 16.--17. " CP8 ,Coprocesor Access Control" "Denied,Priv,Res,Full" textline " " bitfld.long 0x0 14.--15. " CP7 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 12.--13. " CP6 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 10.--11. " CP5 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 8.--9. " CP4 ,Coprocesor Access Control" "Denied,Priv,Res,Full" textline " " bitfld.long 0x0 6.--7. " CP3 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 4.--5. " CP2 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 2.--3. " CP1 ,Coprocesor Access Control" "Denied,Priv,Res,Full" bitfld.long 0x0 0.--1. " CP0 ,Coprocesor Access Control" "Denied,Priv,Res,Full" tree.end tree "Memory Management Unit" width 0x8 group c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable" bitfld.long 0x0 28. " TRE ,TEX Remap Enable" "Disable,Enable" bitfld.long 0x0 25. " EE ,Exception Endianess" "Little,Big" bitfld.long 0x0 24. " VE ,Vector Enable" "Fixed,VIC" textline " " bitfld.long 0x0 23. " XP ,Extended pagetable configuration" "Subpages,ARMv6" bitfld.long 0x0 22. " U ,Unaligned Data Access Operations" "Disable,Enable" bitfld.long 0x0 21. " FI ,Fast Interrupts" "Disable,Enable" bitfld.long 0x0 18. " IT ,Global Instruction TCM enable/disable" "No,Yes" textline " " bitfld.long 0x0 16. " DT ,Global Data TCM enable/disable" "No,Yes" bitfld.long 0x0 15. " L4 ,Compatible to Software Version 4" "No,Yes" bitfld.long 0x0 14. " RR ,Round Robin Replacement" "Random,Round robin" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Vectors" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Level one Instruction Cache" "Disable,Enable" bitfld.long 0x0 11. " Z ,Program flow prediction" "Disable,Enable" bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable" textline " " bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable" bitfld.long 0x0 7. " B ,Endianism" "Little,Big" bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Alignment Fault Check" "Disable,Enable" textline " " bitfld.long 0x0 0. " M ,MMU" "Disable,Enable" group c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address" bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Copyback/allocated,Writethrough/not allocated,Copyback/not allocated" textline " " bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable" group c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address" bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Copyback/allocated,Writethrough/not allocated,Copyback/not allocated" textline " " bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" bitfld.long 0x00 0. " C ,Page Table Walk Inner Cacheable" "Noncacheable,Cacheable" group c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "16KB,8KB,4KB,2KB,1KB,512-byte,256-byte,128-byte" textline " " group c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " rgroup c15:0x5--0x5 line.long 0x0 "DFSR,Data Fault Status Register" bitfld.long 0x0 11. " RW ,Indicates what Type of Access Caused the Abort" "Read,Write" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 10. " STATUS ,Status" "Reserved,Alignment,Debug event,Access section flag,Cache maintenance,Translation section,Access page flag,Translation page,Precise external abort,Domain section,Reserved,Domain page,ext_abort_on_trans_l1,Permission section,ext_abort_on_trans_l2,Permission page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Imprecise external abort,?..." group c15:0x6--0x6 line.long 0x0 "DFAR,Data Fault Address Register" hexmask.long 0x0 0.--31. 0x1 " MVA ,Modified Virtual Address of Fault Address" rgroup c15:0x105--0x105 line.long 0x0 "IFSR,Instruction Fault Status Register" bitfld.long 0x0 0x0--0x3 " STATUS ,Type of fault generated" "Reserved,Alignment,Debug event,Access section flag,Reserved,Translation section,Access page flag,Translation page,Precise external abort,Domain section,Reserved,Domain page,ext_abort_on_trans_l1,Permission section,ext_abort_on_trans_l2,Permission page" group c15:0x106--0x106 line.long 0x0 "IFAR,Instruction Fault Address Register" hexmask.long 0x0 0.--31. 0x1 " MVA ,Modified Virtual Address of Fault Address" textline "" wgroup c15:0x058--0x058 line.long 0x0 "TLBOR,TLB Operations Register" hexmask.long 0x0 12.--31. 0x1000 " MVA ,Modified Virtual Address" hexmask.long.byte 0x0 0.--7. 1. " ASID ,ASID" group c15:0xa--0xa line.long 0x0 "TLBLR,TLB Lockdown Register" bitfld.long 0x0 26.--28. " VICTIM ,Entry in the lockdown region" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown" textline "" group c15:0x02f--0x02f line.long 0x0 "DTMRR,Data Memory Remap Register" bitfld.long 0x0 23.--24. " OWB ,Outer Write-Back, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 21.--22. " OWT ,Outer Write-Trough, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 19.--20. " OWBWA ,Outer Write-Back, Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 17.--18. " ONC ,Outer Noncachable" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 16. " SH ,Shared Bit" "No,Yes" textline " " bitfld.long 0x0 15. " NSH ,Not Shared Bit" "No,Yes" bitfld.long 0x0 12.--14. " IWB ,Inner Write-back" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 9.--11. " IWT ,Inner Write-Through" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 6.--8. " Dev , Device" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 3.--5. " SO ,Strongly Ordered" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 0.--2. " INC ,Inner Noncachable" "NC,SO,Res,Dev,Res,Res,WT,WB" group c15:0x12f--0x12f line.long 0x0 "IMRR,Instruction Memory Remap Register" bitfld.long 0x0 23.--24. " OWB ,Outer Write-Back, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 21.--22. " OWT ,Outer Write-Trough, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 19.--20. " OWBWA ,Outer Write-Back, Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 17.--18. " ONC ,Outer Noncachable" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 16. " SH ,Shared Bit" "No,Yes" textline " " bitfld.long 0x0 15. " NSH ,Not Shared Bit" "No,Yes" bitfld.long 0x0 12.--14. " IWB ,Inner Write-back" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 9.--11. " IWT ,Inner Write-Through" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 6.--8. " Dev , Device" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 3.--5. " SO ,Strongly Ordered" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 0.--2. " INC ,Inner Noncachable" "NC,SO,Res,Dev,Res,Res,WT,WB" group c15:0x42f--0x42f line.long 0x0 "PPMRR,Peripheral Port Memory Remap Register" hexmask.long 0x00 12.--31. 0x1000 " BA ,Base Address" bitfld.long 0x00 0.--4. " Size ,Ssize of the memory region that is to be remapped to be used by the peripheral port" "0KB,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,b01011,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,?..." textline "" group c15:0xd--0xd line.long 0x0 "FCSEPID,FCSE PID Register" hexmask.long.byte 0x0 25.--31. 0x1 " FCSEPID ,Specific process for fast context switch" group c15:0x10d--0x10d line.long 0x0 "CIDR,Context ID Register" hexmask.long 0x0 8.--31. 0x1 " PROCID ,Process ID" hexmask.long.byte 0x0 0.--7. 0x1 " ASID ,The ASID Value" group c15:0x20d--0x20d line.long 0x00 "URWTPID,User Read/Write Thread and Process ID Register" group c15:0x30d--0x30d line.long 0x00 "UROTPID,User Read Only Thread and Process ID Register" group c15:0x40d--0x40d line.long 0x00 "POTPID,Privileged Only Thread and Process ID Register" tree.end tree "Cache Configuration and Control" group c15:0x009--0x009 line.long 0x0 "DCLR,Data Cache Lockdown Register" bitfld.long 0x0 3. " L3 , Cache Lockdown" "Free,Locked" bitfld.long 0x0 2. " L2 , Cache Lockdown" "Free,Locked" bitfld.long 0x0 1. " L1 , Cache Lockdown" "Free,Locked" bitfld.long 0x0 0. " L0 , Cache Lockdown" "Free,Locked" group c15:0x109--0x109 line.long 0x0 "ICLR,Instruction Cache Lockdown Register" bitfld.long 0x0 3. " L3 , Cache Lockdown" "Free,Locked" bitfld.long 0x0 2. " L2 , Cache Lockdown" "Free,Locked" bitfld.long 0x0 1. " L1 , Cache Lockdown" "Free,Locked" bitfld.long 0x0 0. " L0 , Cache Lockdown" "Free,Locked" group c15:0x107--0x107 line.long 0x0 "COR,Cache Operations Register" hexmask.long 0x0 0.--31. 0x1 " COV ,Cache Operations Value" tree.end tree "TCM Configuration and Control" group c15:0x019--0x019 line.long 0x0 "DTCMR,Data TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BA ,Base Address (physical address)" bitfld.long 0x0 2.--6. " S ,Indicates the size of the TCM" "0 KB,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,?..." bitfld.long 0x0 1. " SC ,Is TCM Enabled as SmartCache" "No,Yes" bitfld.long 0x0 0. " En ,Indicates if TCM is Enabled" "Dis,Ena" group c15:0x119--0x119 line.long 0x0 "ITCMR,Instruction TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BA ,Base Address (physical address)" bitfld.long 0x0 2.--6. " S ,Indicates the Size of the TCM" "0 KB,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,?..." bitfld.long 0x0 1. " SC ,Is TCM Enabled as SmartCache" "No,Yes" bitfld.long 0x0 0. " En ,Indicates if TCM is Enabled" "Dis,Ena" tree.end tree "DMA Control" rgroup c15:0x10b--0x10b line.long 0x0 "DMAISQR,DMA Identification and Status Queued Register" bitfld.long 0x0 1. " CQ1 , DMA Channel 1 Queued" "No,Yes" bitfld.long 0x0 0. " CQ0 , DMA Channel 0 Queued" "No,Yes" rgroup c15:0x20b--0x20b line.long 0x0 "DMAISRR,DMA Identification and Status Running Register" bitfld.long 0x0 1. " CR1 , DMA Channel 1 Running" "No,Yes" bitfld.long 0x0 0. " CR0 , DMA Channel 0 Running" "No,Yes" rgroup c15:0x30b--0x30b line.long 0x0 "DMAISIR,DMA Identification and Status Interrupting Register" bitfld.long 0x0 1. " CR1 , DMA Channel 1 Interrupting" "No,Yes" bitfld.long 0x0 0. " CR0 , DMA Channel 0 Interrupting" "No,Yes" group c15:0x23b--0x23b line.long 0x0 "DMAECR,DMA Enable Clear Register" bitfld.long 0x0 1. " CE1 , DMA Channel 1 Enable Clear" "No,Yes" bitfld.long 0x0 0. " CE0 , DMA Channel 0 Enable Clear" "No,Yes" group c15:0x22f--0x22f line.long 0x0 "DMRR,DMA Memory Remap Register" bitfld.long 0x0 23.--24. " OWB ,Outer Write-Back, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 21.--22. " OWT ,Outer Write-Trough, No Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 19.--20. " OWBWA ,Outer Write-Back, Write on Allocate" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 17.--18. " ONC ,Outer Noncachable" "NC,WBWA,WTNWA,WBNWA" bitfld.long 0x0 16. " SH ,Shared Bit" "No,Yes" textline " " bitfld.long 0x0 15. " NSH ,Not Shared Bit" "No,Yes" bitfld.long 0x0 12.--14. " IWB ,Inner Write-back" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 9.--11. " IWT ,Inner Write-Through" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 6.--8. " Dev , Device" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 3.--5. " SO ,Strongly Ordered" "NC,SO,Res,Dev,Res,Res,WT,WB" bitfld.long 0x0 0.--2. " INC ,Inner Noncachable" "NC,SO,Res,Dev,Res,Res,WT,WB" group c15:0x02b--0x02b line.long 0x0 "DMACNR,DMA Channel Number Register" bitfld.long 0x0 0. " CN ,DMA Channel Number" "0,1" rgroup c15:0x8b--0x8b line.long 0x0 "DMACSR, DMA Channel Status Register" bitfld.long 0x0 12. " BP ,DMA Parameter Bit" "Acc,Ina" bitfld.long 0x0 7.--11. " ES ,The External Address Error Status bits" "NoErr,NoErr,NoErr,NoErr,NoErr,NoErr,NoErr,NoErr,Res,UDE,Res,Res,Res,Res,Res,Res,Res,Res,Res,AFS,Res,TFS,AFP,TFP,Res,DFS,ExtAb,DFP,ExtAbF,PFS,ExtAbS,PFP" bitfld.long 0x0 2.--6. " IS ,The Ixternal Address Error Status bits" "Res,Res,Res,Res,Res,Res,Res,Res,TCM out of range,Res,Res,Res,Res,Res,Res,Res,Res,Res,Res,AFS,Res,TFS,AFP,TFP,Res,DFS,Res,DFP,ExtAbF,PFS,ExtAbS,PFP" bitfld.long 0x0 0.--1. " Status ,The Status Bits" "Idle,Queued,Running,CompErr" group c15:0xfb--0xfb line.long 0x0 "DMACIDR,DMA Context ID Register" hexmask.long 0x0 8.--31. 0x1 " PROCID ,Process ID value" hexmask.long.byte 0x0 0.--7. 0x1 " ASID ,ASID of the current process and identifies the current ASID" group c15:0x4b--0x4b line.long 0x0 "DMACR, DMA Control Register" bitfld.long 0x0 31. " TR ,Target TCM" "Data,Instr" bitfld.long 0x0 30. " DT ,Direction of Transfer" "FrLvl,ToLvl" bitfld.long 0x0 29. " IC ,Interrupt on Completion" "No,Yes" bitfld.long 0x0 28. " IE ,Interrupt on Error" "No,Yes" bitfld.long 0x0 27. " FT ,Full Transfer" "TCM,All" textline " " bitfld.long 0x0 26. " UM ,User Mode" "Priv,User" hexmask.long.word 0x0 8.--19. 0x1 " ST ,Stride in Bytes" bitfld.long 0x0 0.--1. " TS ,Transaction Size" "Byte,Halfword,Word,Doubleword" group c15:0x03b--0x03b line.long 0x0 "DMAESR,DMA Enable Stop Register" bitfld.long 0x0 1. " CE1 , DMA Channel 1 Enable Stop" "No,Yes" bitfld.long 0x0 0. " CE0 , DMA Channel 0 Enable Stop" "No,Yes" group c15:0x13b--0x13b line.long 0x0 "DMAESTR,DMA Enable Start Register" bitfld.long 0x0 1. " CE1 , DMA Channel 1 Enable Start" "No,Yes" bitfld.long 0x0 0. " CE0 , DMA Channel 0 Enable Start" "No,Yes" group c15:0x6b--0x6b line.long 0x0 "DMAESAR,DMA External Start Address Register" hexmask.long 0x0 0.--31. 0x1 " ADR ,DMA External Start Address" rgroup c15:0xb--0xb line.long 0x0 "DMAISPR,DMA Identification and Status Present Register" bitfld.long 0x0 1. " CP1 , DMA Channel 1 Present" "No,Yes" bitfld.long 0x0 0. " CP0 , DMA Channel 0 Present" "No,Yes" group c15:0x7b--0x7b line.long 0x0 "DMAIEAR,DMA Internal End Address Register" hexmask.long 0x0 0.--31. 0x1 " ADR ,DMA Internal End Address" group c15:0x5b--0x5b line.long 0x0 "DMAISAR,DMA Internal Start Address Register" hexmask.long 0x0 0.--31. 0x1 " ADR ,DMA Internal Start Address" group c15:0x01b--0x01b line.long 0x0 "DMAUAR,DMA User Accessibility Register" bitfld.long 0x0 1. " CU1 , DMA Channel 1 User Accessible" "No,Yes" bitfld.long 0x0 0. " CU0 , DMA Channel 0 User Accessible" "No,Yes" tree.end tree "System Performance Monitoring" group c15:0xcf--0xcf line.long 0x0 "PMNC,Performance Monitor Control Register" hexmask.long.byte 0x0 20.--27. 0x1 " EvtCount0 ,Identifies the Source of Events for Count Register 0" hexmask.long.byte 0x0 12.--19. 0x1 " EvtCount1 ,Identifies the Source of Events for Count Register 1" bitfld.long 0x0 11. " X ,Enable Export of the Events to the Event Bus" "Dis,Ena" textline " " bitfld.long 0x0 10. " CCR ,Cycle Count Register overflow flag" "Not occurred,Occurred" bitfld.long 0x0 9. " CR1 ,Count Register 1 overflow flag" "Not occurred,Occurred" bitfld.long 0x0 8. " CR0 ,Count Register 0 overflow flag" "Not occurred,Occurred" textline " " bitfld.long 0x0 6. " ECC ,Enable Cycle Counter interrupt" "Dis,Ena" bitfld.long 0x0 5. " EC1 ,Enable Counter Register 1 interrupt" "Dis,Ena" bitfld.long 0x0 4. " EC0 ,Enable Counter Register 0 interrupt" "Dis,Ena" textline " " bitfld.long 0x0 3. " D ,Cycle Count Divider" "Every,64th" bitfld.long 0x0 2. " C ,Cycle Counter Register Reset on Write" "Noact,Reset" bitfld.long 0x0 1. " P ,Count Register Reset on Write" "Noact,Reset" bitfld.long 0x0 0. " E ,Enable All Three Counters" "Dis,Ena" group c15:0x2cf--0x2cf line.long 0x0 "CR0,Count Register 0" hexmask.long 0x0 0.--31. 0x1 " CR0 ,Counter Nr 0" group c15:0x3cf--0x3cf line.long 0x0 "CR1,Count Register 1" hexmask.long 0x0 0.--31. 0x1 " CR1 ,Counter Nr 1" group c15:0x1cf--0x1cf line.long 0x0 "CCR,Cycle Counter Register" hexmask.long 0x0 0.--31. 0x1 " CCR ,Cycle Counter" tree.end tree "Debug Access to Caches and TLBs" group c15:0x700f--0x700f line.long 0x0 "CDCR,Cache Debug Control Register" bitfld.long 0x0 2. " WT , Write-Through enable flag" "Dis,Ena" bitfld.long 0x0 1. " IL , Instruction cache Linefill disable flag" "Ena,Dis" bitfld.long 0x0 0. " DL , Data cache Linefill disable flag" "Ena,Dis" wgroup c15:0x302f--0x302f line.long 0x0 "DTRRO,Data Tag RAM Read Operation Register" hexmask.long 0x0 5.--31. 0x1 " SETWAY ,Set/Way" group c15:0x30cf--0x30cf line.long 0x0 "DCMVR,Data Cache Master Valid Register" hexmask.long 0x0 0.--31. 0x1 " DCMV ,Data Cache Master Valid" rgroup c15:0x310f--0x310f line.long 0x0 "DBCR,Instruction Debug Cache Register" hexmask.long 0x0 10.--31. 0x1 " TAG ,Tag Address" bitfld.long 0x0 1.--2. " Dirty ,Dirty Bits" "00,01,10,11" bitfld.long 0x0 0. " Valid ,Valid Bit" "No,Yes" rgroup c15:0x300f--0x300f line.long 0x0 "DBCR,Data Debug Cache Register" hexmask.long 0x0 10.--31. 0x1 " TAG ,Tag Address" bitfld.long 0x0 1.--2. " Dirty ,Dirty Bits" "00,01,10,11" bitfld.long 0x0 0. " Valid ,Valid Bit" "No,Yes" group c15:0x308f--0x308f line.long 0x0 "ICMVR,Instruction Cache Master Valid Register" hexmask.long 0x0 0.--31. 0x1 " ICMV ,Instruction Cache Master Valid" group c15:0x30ef--0x30ef line.long 0x0 "DSCMVR,Data SmartCache Master Valid Register" hexmask.long 0x0 0.--31. 0x1 " DSCMV ,Data SmartCache Master Valid" group c15:0x30af--0x30af line.long 0x0 "ISCMVR,Instruction SmartCache Master Valid Register" hexmask.long 0x0 0.--31. 0x1 " ISCMV ,Instruction SmartCache Master Valid" rgroup c15:0x507f--0x507f line.long 0x0 "DMTLBAR,Data MicroTLB Attribute Register" bitfld.long 0x0 25. " SPV ,Subpage Valid" "No,Yes" bitfld.long 0x0 5.--8. " Domain ,Domain number of the TLB entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 1.--3. " RGN ,Region Type" "Noncacheable,Strongly ordered,Reserved,Device,Reserved,Reserved,Inner WT,Inner WB" bitfld.long 0x0 0. " S ,Shared Attribute" "0,1" group c15:0x504f--0x504f line.long 0x0 "DMTLBI,Data MicroTLB Index Register" bitfld.long 0x0 0.--3. " IDX ,Micro TLB Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup c15:0x506f--0x506f line.long 0x0 "DMTLBPA,Data MicroTLB PA Register" hexmask.long 0x0 10.--31. 0x400 " PA ,Physical Address" bitfld.long 0x0 6.--9. " SZ ,Region Size" "1MB section,Res,Res,Res,Res,Res,Res,Res,64KB page,Res,Res,Res,16KB subpage,Res,4KB page,1KB subpage" bitfld.long 0x0 4.--5. " XRGN ,Extended Region Type" "NC,WBWA,WTNWA,WBNWA" textline " " bitfld.long 0x0 1.--3. " AP ,Access Permission" "No access,Supervisor only,No user write,Full access,Domain fault encoded,Supervisor read only,Supervisor/User read only,?..." bitfld.long 0x0 0. " V ,Valid Bit" "No,Yes" rgroup c15:0x505f--0x505f line.long 0x0 "DMTLBVA,Data MicroTLB VA Register" hexmask.long 0x0 10.--31. 0x400 " VA ,Virtual Address" hexmask.long.word 0x0 0.--9. 0x1 " PROCESS ,Memory space identifier" wgroup c15:0x314f--0x314f line.long 0x0 "ICDRRO,Instruction Cache Data RAM Read Operations Register" hexmask.long 0x0 5.--31. 0x1 " SETWAY ,Set/Way" bitfld.long 0x0 2.--4. " WIL ,Word in Line" "0,1,2,3,4,5,6,7" rgroup c15:0x517f--0x517f line.long 0x0 "IMTLBAR,Instruction MicroTLB Attribute Register" bitfld.long 0x0 25. " SPV ,Subpage Valid" "No,Yes" bitfld.long 0x0 5.--8. " Domain ,Domain number of the TLB entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 4. " XN ,Execute Never Attribute" "No,Yes" textline " " bitfld.long 0x0 1.--3. " RGN ,Region Type" "Noncacheable,Strongly ordered,Reserved,Device,Reserved,Reserved,Inner WT,Inner WB" bitfld.long 0x0 0. " S ,Shared Attribute" "0,1" group c15:0x514f--0x514f line.long 0x0 "IMTLBI,Instruction MicroTLB Index Register" bitfld.long 0x0 0.--3. " IDX ,Micro TLB Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup c15:0x516f--0x516f line.long 0x0 "IMTLBPA,Instruction MicroTLB PA Register" hexmask.long 0x0 10.--31. 0x400 " PA ,Physical Address" bitfld.long 0x0 6.--9. " SZ ,Region Size" "1MB section,Res,Res,Res,Res,Res,Res,Res,64KB page,Res,Res,Res,16KB subpage,Res,4KB page,1KB subpage" bitfld.long 0x0 4.--5. " XRGN ,Extended Region Type" "NC,WBAW,WTNAW,WB" textline " " bitfld.long 0x0 1.--3. " AP ,Access Permission" "No access,Supervisor only,No user write,Full access,Domain fault encoded,Supervisor read only,Supervisor/User read only,?..." bitfld.long 0x0 0. " V ,Valid Bit" "No,Yes" rgroup c15:0x515f--0x515f line.long 0x0 "IMTLBVA,Instruction MicroTLB VA Register" hexmask.long 0x0 10.--31. 0x400 " VA ,Virtual Address" hexmask.long.word 0x0 0.--9. 0x1 " PROCESS ,Memory Space Identifier" wgroup c15:0x312f--0x312f line.long 0x0 "ITRRO,Instruction Tag RAM Read Operation Register" hexmask.long 0x0 5.--31. 0x1 " SETWAY ,Set/Way" group c15:0x527f--0x527f line.long 0x0 "MTLBAR,Main TLB Attribute Register" bitfld.long 0x0 30.--31. " AP3 ,Subpage Access Permissions" "All fault/Supervisor RO/Supervisor|User RO/UNP,Supervisor,Supervisor full,Full" textline " " bitfld.long 0x0 28.--29. " AP2 ,Subpage Access Permissions" "All fault/Supervisor RO/Supervisor|User RO/UNP,Supervisor,Supervisor full,Full" textline " " bitfld.long 0x0 26.--27. " AP1 ,Subpage Access Permissions" "All fault/Supervisor RO/Supervisor|User RO/UNP,Supervisor,Supervisor full,Full" textline " " bitfld.long 0x0 25. " SPV ,Subpage Valid" "No,Yes" bitfld.long 0x0 5.--8. " Domain ,Domain number of the TLB entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 4. " XN ,Execute Never Attribute" "No,Yes" bitfld.long 0x0 1.--3. " RGN ,Region Type" "Noncacheable,Strongly ordered,Reserved,Device,Reserved,Reserved,Inner WT,Inner WB" bitfld.long 0x0 0. " S ,Shared Attribute" "0,1" wgroup c15:0x524f--0x524f line.long 0x0 "RMTLBER,Read Main TLB Entry Register" bitfld.long 0x0 31. " L ,Lockable Region" "Set,Lock" bitfld.long 0x0 0.--5. " IDX[0:5] ,Entry in the main TLB to access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup c15:0x544f--0x544f line.long 0x0 "WMTLBER,Write Main TLB Entry Register" bitfld.long 0x0 31. " L ,Lockable Region" "Set,Lock" bitfld.long 0x0 0.--5. " IDX[0:5] ,Entry in the main TLB to access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group c15:0x526f--0x526f line.long 0x0 "MTLBPA,Main TLB PA Register" hexmask.long 0x0 10.--31. 0x400 " PA ,Physical Address" bitfld.long 0x0 6.--9. " SZ ,Region Size" "1MB section,16MB supersection,Res,Res,Res,Res,Res,Res,64KB page,Res,Res,Res,Res,Res,4KB page,Res" bitfld.long 0x0 4.--5. " XRGN ,Extended Region Type" "NC,WBAW,WTNAW,WB" textline " " bitfld.long 0x0 1.--3. " AP ,Access Permission" "No access,Supervisor only,No user write,Full access,Domain fault encoded,Supervisor read only,Supervisor/User read only,?..." bitfld.long 0x0 0. " V ,Valid Bit" "No,Yes" group c15:0x525f--0x525f line.long 0x0 "MTLBVA,Main TLB VA Register" hexmask.long 0x0 10.--31. 0x400 " VA ,Virtual Address" hexmask.long.word 0x0 0.--9. 0x1 " PROCESS ,Memory Space Identifier" group c15:0x701f--0x701f line.long 0x0 "TLBDCR,TLB Debug Control Register" bitfld.long 0x0 7. " IMM ,Instruction Main TLB Match" "Ena,Dis" bitfld.long 0x0 6. " DMM ,Data Main TLB Match" "Ena,Dis" bitfld.long 0x0 5. " IML ,Instruction Main TLB Load" "Ena,Dis" bitfld.long 0x0 4. " DML ,Data Main TLB Load" "Ena,Dis" bitfld.long 0x0 3. " IUM ,Instruction MicroTLB Match" "Ena,Dis" bitfld.long 0x0 2. " DUM ,Data MicroTLB Match" "Ena,Dis" bitfld.long 0x0 1. " IUL ,Instruction MicroTLB Load and Flush" "Ena,Dis" bitfld.long 0x0 0. " DUL ,Data MicroTLB Load and Flush" "Ena,Dis" group c15:0x50ef--0x50ef line.long 0x00 "RMTLBMVR,Read Main TLB Master Valid Register" hexmask.long 0x00 0.--31. 1. " RMTLBMV ,Read Main TLB Master Valid" group c15:0x51ef--0x51ef line.long 0x00 "WMTLBMVR,Write Main TLB Master Valid Register" hexmask.long 0x00 0.--31. 1. " WMTLBMV ,Write Main TLB Master Valid" tree.end width 11. config 16. 8. width 8. tree "Debug Register" rgroup c14:0x00--0x00 line.long 0x0 "DIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Res,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " Context ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group c14:0x10--0x10 line.long 0x0 "DSCR,Debug Status and Control Register" bitfld.long 0x0 30. " rDTRfull ,rDTR Buffer Full Flag (core read)" "Empty,Full" bitfld.long 0x0 29. " wDTRfull ,wDTR Buffer Full Flag (core write)" "Empty,Full" bitfld.long 0x0 15. " MONITOR ,Monitor Mode Enable" "Disabled,Enabled" bitfld.long 0x0 14. " MODE ,Mode Select" "Monitor,Halt" textline " " bitfld.long 0x0 13. " ARM ,Execute ARM Instruction in ITR" "Disabled,Enabled" bitfld.long 0x0 12. " COMMS ,User Mode Access to Comms Channel Disable" "Enabled,Disabled" bitfld.long 0x0 11. " INTDIS ,Interrupts Disable" "Enabled,Disabled" textline " " bitfld.long 0x0 10. " DBGACK ,Force DBGACK Signal High" "No,Yes" bitfld.long 0x0 9. " DbgNoPwrdwn ,Powerdown Disable" "Enabled,Disabled" bitfld.long 0x0 7. " IABORT ,Sticky Imprecise Data Abort" "No,Yes" bitfld.long 0x0 6. " PABORT ,Sticky Precise Data Abort" "No,Yes" textline " " bitfld.long 0x0 2.--5. " ENTRY ,Method of Entry" "Halt,Breakpoint,Watchpoint,BKPT,EDBGRQ,Vector,DAbort,IAbort,?..." bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "No,Yes" bitfld.long 0x0 0. " HALTED ,Core Halted" "No,Yes" group c14:0x50--0x50 line.long 0x00 "DTR,Data Transfer Register" group c14:0x70--0x70 line.long 0x0 "VCR,Vector Catch Register" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled" bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" tree.end tree "Breakpoints" group c14:0x400--0x400 line.long 0x0 "BVR0,Breakpoint Value Register 0" hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address" group c14:0x500--0x500 line.long 0x0 "BCR0,Breakpoint Control Register 0" bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x410--0x410 line.long 0x0 "BVR1,Breakpoint Value Register 1" hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address" group c14:0x510--0x510 line.long 0x0 "BCR1,Breakpoint Control Register 1" bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x420--0x420 line.long 0x0 "BVR2,Breakpoint Value Register 2" hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address" group c14:0x520--0x520 line.long 0x0 "BCR2,Breakpoint Control Register 2" bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x430--0x430 line.long 0x0 "BVR3,Breakpoint Value Register 3" hexmask.long 0x0 2.--31. 0x4 " IVA ,Breakpoint address" group c14:0x530--0x530 line.long 0x0 "BCR3,Breakpoint Control Register 3" bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x440--0x440 line.long 0x0 "BVR4,Breakpoint Value Register 4" group c14:0x540--0x540 line.long 0x0 "BCR4,Breakpoint Control Register 4" bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x450--0x450 line.long 0x0 "BVR5,Breakpoint Value Register 5" group c14:0x550--0x550 line.long 0x0 "BCR5,Breakpoint Control Register 5" bitfld.long 0x0 21. " M ,Meaning of the associated BVR" "Address,ContextID" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " B ,Breakpoint Enable" "Disabled,Enabled" tree.end width 8. tree "Watchpoints" group c14:0x600--0x600 line.long 0x0 "WVR0,Watchpoint Value Register 0" hexmask.long 0x0 2.--31. 0x4 " WADD ,Watchpoint Address" group c14:0x700--0x700 line.long 0x0 "WCR0,Watchpoint Control Register 0" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store Access" "Reserved,Load,Store,Load/Store" bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " W ,Watchpoint Enable" "Disabled,Enabled" group c14:0x610--0x610 line.long 0x0 "WVR1,Watchpoint Value Register 1" hexmask.long 0x0 2.--31. 0x4 " WADD ,Watchpoint Address" group c14:0x710--0x710 line.long 0x0 "WCR1,Watchpoint Control Register 1" bitfld.long 0x0 20. " E ,Enable Linking" "Disabled,Enabled" bitfld.long 0x0 16.--19. " Linked ,Linked BRP" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 8. " Byte3 ,Byte 3 Access Control" "No,Yes" bitfld.long 0x0 7. " Byte2 ,Byte 2 Access Control" "No,Yes" bitfld.long 0x0 6. " Byte1 ,Byte 1 Access Control" "No,Yes" bitfld.long 0x0 5. " Byte0 ,Byte 0 Access Control" "No,Yes" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store Access" "Reserved,Load,Store,Load/Store" bitfld.long 0x0 1.--2. " S ,Supervisor Access" "Reserved,Privileged,User,Priv/User" bitfld.long 0x0 0. " W ,Watchpoint Enable" "Disabled,Enabled" tree.end width 11. textline ""