; -------------------------------------------------------------------------------- ; @Title: TegraX1 Specific Menu ; @Props: Released ; @Author: KOB, SIK ; @Changelog: 2017-09-08 KOB ; 2018-05-29 SIK ; @Manufacturer: NVIDIA - NVIDIA Corporation ; @Core: Cortex-A57, CortexA53 ; @Chip: TEGRAX1 ; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: mentegrax1.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( if CORENAME()=="CORTEXA57" ( popup "[:chip]Core Registers (Cortex-A57)" ( menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,ID Registers""" menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,System Control and Configuration""" menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Memory Management Unit""" menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,System Performance Monitor""" menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,System Timer Registers""" menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Generic Interrupt Controller CPU Interface""" separator menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Debug Registers""" separator menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers[AArch64]" "per , ""Core Registers (Cortex-A57),AArch64,Watchpoint Control Registers""" separator menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,ID Registers""" menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,System Control and Configuration""" menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Memory Management Unit""" menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,System Performance Monitor""" menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,System Timer Registers""" menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Generic Interrupt Controller CPU Interface""" separator menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Debug Registers""" separator menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers[AArch32]" "per , ""Core Registers (Cortex-A57),AArch32,Watchpoint Control Registers""" separator menuitem "[:chip]Interrupt Controller (GIC-400)" "per , ""Core Registers (Cortex-A57),Interrupt Controller (GIC-400)""" ) ) if CORENAME()=="CORTEXA53" ( popup "[:chip]Core Registers (Cortex-A53)" ( menuitem "[:chip]ID Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,ID Registers""" menuitem "[:chip]System Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration""" menuitem "[:chip]Memory Management Unit[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit""" menuitem "[:chip]Virtualization Extensions[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor""" menuitem "[:chip]System Timer Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers""" menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface""" separator menuitem "[:chip]Debug Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers""" separator menuitem "[:chip]Breakpoint Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers[AArch64]" "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers""" separator menuitem "[:chip]ID Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,ID Registers""" menuitem "[:chip]System Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration""" menuitem "[:chip]Memory Management Unit[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit""" menuitem "[:chip]Virtualization Extensions[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions""" menuitem "[:chip]Cache Control and Configuration[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration""" menuitem "[:chip]System Performance Monitor[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor""" menuitem "[:chip]System Timer Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers""" menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface""" separator menuitem "[:chip]Debug Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers""" separator menuitem "[:chip]Breakpoint Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers[AArch32]" "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers""" separator menuitem "[:chip]Interrupt Controller (GIC-400)" "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-400)""" ) ) separator menuitem "Interrupt Controller" "per , ""Interrupt Controller""" popup "Semaphores" ( menuitem "Arbitration Semaphores" "per , ""Semaphores,Arbitration Semaphores""" menuitem "Resource Semaphores" "per , ""Semaphores,Resource Semaphores""" ) menuitem "Clock And Reset Controller" "per , ""Clock And Reset Controller""" menuitem "Closed-Loop Dynamic Voltage and Frequency Scaling" "per , ""Closed-Loop Dynamic Voltage and Frequency Scaling""" menuitem "Atomics" "per , ""Atomics""" popup "Timers" ( menuitem "NVIDIA Timers" "per , ""Timers,NVIDIA Timers""" menuitem "Fixed Time Base Registers" "per , ""Timers,Fixed Time Base Registers""" menuitem "Watchdog Timers" "per , ""Timers,Watchdog Timers""" menuitem "Timer Shared Interrupt Status" "per , ""Timers,Timer Shared Interrupt Status""" ) popup "GPIO Controller/Pin MUX" ( menuitem "GPIO 1" "per , ""GPIO Controller/Pin MUX,GPIO 1""" menuitem "GPIO 2" "per , ""GPIO Controller/Pin MUX,GPIO 2""" menuitem "GPIO 3" "per , ""GPIO Controller/Pin MUX,GPIO 3""" menuitem "GPIO 4" "per , ""GPIO Controller/Pin MUX,GPIO 4""" menuitem "GPIO 5" "per , ""GPIO Controller/Pin MUX,GPIO 5""" menuitem "GPIO 6" "per , ""GPIO Controller/Pin MUX,GPIO 6""" menuitem "GPIO 7" "per , ""GPIO Controller/Pin MUX,GPIO 7""" menuitem "GPIO 8" "per , ""GPIO Controller/Pin MUX,GPIO 8""" menuitem "VGPIO Registers" "per , ""GPIO Controller/Pin MUX,VGPIO Registers""" menuitem "Pinmux Registers" "per , ""GPIO Controller/Pin MUX,Pinmux Registers""" ) menuitem "Activity Monitor" "per , ""Activity Monitor""" menuitem "Real-Time Clock" "per , ""Real-Time Clock""" popup "Power Management Controller" ( menuitem "PMC Registers" "per , ""Power Management Controller,PMC Registers""" menuitem "PMC Counter 0" "per , ""Power Management Controller,PMC Counter 0""" menuitem "PMC Counter 1" "per , ""Power Management Controller,PMC Counter 1""" menuitem "Secure Boot Control" "per , ""Power Management Controller,Secure Boot Control""" menuitem "Exception Vector Pointers" "per , ""Power Management Controller,Exception Vector Pointers""" ) popup "Host Subsystem" ( menuitem "Channel 0" "per , ""Host Subsystem,Channel 0""" menuitem "Channel 1" "per , ""Host Subsystem,Channel 1""" menuitem "Channel 2" "per , ""Host Subsystem,Channel 2""" menuitem "Channel 3" "per , ""Host Subsystem,Channel 3""" menuitem "Channel 4" "per , ""Host Subsystem,Channel 4""" menuitem "Channel 5" "per , ""Host Subsystem,Channel 5""" menuitem "Channel 6" "per , ""Host Subsystem,Channel 6""" menuitem "Channel 7" "per , ""Host Subsystem,Channel 7""" menuitem "Channel 8" "per , ""Host Subsystem,Channel 8""" menuitem "Channel 9" "per , ""Host Subsystem,Channel 9""" menuitem "Channel 10" "per , ""Host Subsystem,Channel 10""" menuitem "Channel 11" "per , ""Host Subsystem,Channel 11""" ) menuitem "Video Image Compositor" "per , ""Video Image Compositor""" menuitem "CPU Complex" "per , ""CPU Complex""" menuitem "Flow Controller" "per , ""Flow Controller""" popup "Memory Controller" ( menuitem "MC0" "per , ""Memory Controller,MC0""" menuitem "EMC0" "per , ""Memory Controller,EMC0""" menuitem "MC1" "per , ""Memory Controller,MC1""" menuitem "EMC1" "per , ""Memory Controller,EMC1""" ) menuitem "AHB Controller" "per , ""AHB Controller""" popup "APB" ( menuitem "APB Control" "per , ""APB,APB Control""" menuitem "SATA Aux" "per , ""APB,SATA Aux""" menuitem "DAC/DAP" "per , ""APB,DAC/DAP""" menuitem "AP Control" "per , ""APB,AP Control""" menuitem "APB DMA Controller" "per , ""APB,APB DMA Controller""" ) popup "USB" ( menuitem "USB 1" "per , ""USB,USB 1""" menuitem "USB 2" "per , ""USB,USB 2""" menuitem "XUSB" "per , ""USB,XUSB""" ) popup "Audio Processing Engine" ( menuitem "AXBAR" "per , ""Audio Processing Engine,AXBAR""" menuitem "SFC" "per , ""Audio Processing Engine,SFC""" menuitem "I2S" "per , ""Audio Processing Engine,I2S""" menuitem "SPDIF" "per , ""Audio Processing Engine,SPDIF""" menuitem "AMX" "per , ""Audio Processing Engine,AMX""" menuitem "ADX" "per , ""Audio Processing Engine,ADX""" menuitem "Audio Bridge" "per , ""Audio Processing Engine,Audio Bridge""" menuitem "OPE" "per , ""Audio Processing Engine,OPE""" menuitem "PEQ" "per , ""Audio Processing Engine,PEQ""" menuitem "DMIC" "per , ""Audio Processing Engine,DMIC""" menuitem "AHC" "per , ""Audio Processing Engine,AHC""" menuitem "AMC" "per , ""Audio Processing Engine,AMC""" menuitem "AFC" "per , ""Audio Processing Engine,AFC""" menuitem "MVC" "per , ""Audio Processing Engine,MVC""" menuitem "ADMA" "per , ""Audio Processing Engine,ADMA""" menuitem "ADMAIF" "per , ""Audio Processing Engine,ADMAIF""" menuitem "AGIC" "per , ""Audio Processing Engine,AGIC""" menuitem "MIXER" "per , ""Audio Processing Engine,MIXER""" menuitem "MBDRC" "per , ""Audio Processing Engine,MBDRC""" menuitem "ADSP Peripheral" "per , ""Audio Processing Engine,ADSP Peripheral""" menuitem "Audio Miscellaneous" "per , ""Audio Processing Engine,Audio Miscellaneous""" ) popup "Display Controller" ( menuitem "Display Controller Registers" "per , ""Display Controller,Display Controller Registers""" menuitem "Display A" "per , ""Display Controller,Display A""" menuitem "Display B" "per , ""Display Controller,Display B""" menuitem "WIN" "per , ""Display Controller,WIN""" menuitem "WINBUF" "per , ""Display Controller,WINBUF""" ) menuitem "Display Interfaces: MIPI-DSI" "per , ""Display Interfaces: MIPI-DSI""" popup "HDMI Display Port" ( menuitem "SOR0" "per , ""HDMI Display Port,SOR0""" menuitem "SOR1" "per , ""HDMI Display Port,SOR1""" menuitem "DCP KFUSE Control Registers" "per , ""HDMI Display Port,DCP KFUSE Control Registers""" menuitem "HDA Registers" "per , ""HDMI Display Port,HDA Registers""" menuitem "DPAUX0 Registers" "per , ""HDMI Display Port,DPAUX0 Registers""" menuitem "DPAUX1 Registers" "per , ""HDMI Display Port,DPAUX1 Registers""" ) menuitem "HDMI CEC" "per , ""HDMI CEC""" menuitem "MIPI-CSI Camera serial interface" "per , ""MIPI-CSI Camera serial interface""" menuitem "MIPI D-PHY CALIBRATION" "per , ""MIPI D-PHY CALIBRATION""" popup "Video Input" ( menuitem "VI Registers" "per , ""Video Input,VI Registers""" menuitem "VI I2C Registers" "per , ""Video Input,VI I2C Registers""" ) popup "SD/MMC Controller" ( menuitem "SDMMC-1" "per , ""SD/MMC Controller,SDMMC-1""" menuitem "SDMMC-2" "per , ""SD/MMC Controller,SDMMC-2""" menuitem "SDMMC-3" "per , ""SD/MMC Controller,SDMMC-3""" menuitem "SDMMC-4" "per , ""SD/MMC Controller,SDMMC-4""" ) popup "SATA Controller" ( menuitem "IPFS registers" "per , ""SATA Controller,IPFS registers""" menuitem "SATA Configuration space" "per , ""SATA Controller,SATA Configuration space""" menuitem "DMA Control Registers" "per , ""SATA Controller,DMA Control Registers""" menuitem "AUX Registers" "per , ""SATA Controller,AUX Registers""" ) popup "PCIe" ( menuitem "PCIE_A1 Registers" "per , ""PCIe,PCIE_A1 Registers""" menuitem "PCIE_A2 Registers" "per , ""PCIe,PCIE_A2 Registers""" menuitem "PCIE_A3 Registers" "per , ""PCIe,PCIE_A3 Registers""" ) popup "I2C Controller" ( menuitem "I2C" "per , ""I2C Controller,I2C""" menuitem "I2C2" "per , ""I2C Controller,I2C2""" menuitem "I2C3" "per , ""I2C Controller,I2C3""" menuitem "I2C4" "per , ""I2C Controller,I2C4""" menuitem "I2C5" "per , ""I2C Controller,I2C5""" menuitem "I2C6" "per , ""I2C Controller,I2C6""" ) popup "UART Controller" ( menuitem "UART-A" "per , ""UART Controller,UART-A""" menuitem "UART-B" "per , ""UART Controller,UART-B""" menuitem "UART-C" "per , ""UART Controller,UART-C""" menuitem "UART-D" "per , ""UART Controller,UART-D""" ) popup "SPI Controller" ( menuitem "2B-1" "per , ""SPI Controller,2B-1""" menuitem "2B-2" "per , ""SPI Controller,2B-2""" menuitem "2B-3" "per , ""SPI Controller,2B-3""" menuitem "2B-4" "per , ""SPI Controller,2B-4""" ) menuitem "Quad SPI" "per , ""Quad SPI""" menuitem "PWM Controller" "per , ""PWM Controller""" popup "THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER" ( menuitem "SOC_THERM" "per , ""THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER,SOC_THERM""" menuitem "FUSE_THERM" "per , ""THERMAL SENSOR AND THERMAL THROTTLING CONTROLLER,FUSE_THERM""" ) menuitem "Boot and Power Management Processor Lite" "per , ""Boot and Power Management Processor Lite""" ) )