; -------------------------------------------------------------------------------- ; @Title: STM32L412 Specific Menu ; @Props: Released ; @Author: DAB, NEJ ; @Changelog: 2022-03-25 DAB ; 2023-09-14 NEJ ; @Manufacturer: STM - ST Microelectronics N.V. ; @Core: Cortex-M4F ; @Chip: STM32L412C8, STM32L412K8, STM32L412R8, STM32L412T8, ; STM32L412CB, STM32L412KB, STM32L412RB, STM32L412TB, ; STM32L422CB, STM32L422KB, STM32L422RB, STM32L422TB ; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menstm32l412.men 16640 2023-09-21 10:18:51Z kwisniewski $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M4F)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M4F),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M4F),Memory Protection Unit""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller""" menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M4F),Floating-point Unit""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M4F),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator popup "ADC;Analog-to-Digital Converter" ( menuitem "ADC1" "per , ""ADC (Analog-to-Digital Converters),ADC1""" menuitem "ADC2" "per , ""ADC (Analog-to-Digital Converters),ADC2""" menuitem "ADC12_COMMON" "per , ""ADC (Analog-to-Digital Converters),ADC12_COMMON""" ) menuitem "COMP;Comparator" "per , ""COMP (Comparator)""" menuitem "CRC;Cyclic Redundancy Check Calculation Unit" "per , ""CRC (Cyclic Redundancy Check Calculation Unit)""" menuitem "CRS;Clock Recovery System" "per , ""CRS (Clock Recovery System)""" menuitem "DBGMCU;MCU Debug Component" "per , ""DBGMCU (MCU Debug Component)""" popup "DMA;Direct Memory Access Controller" ( menuitem "DMA1" "per , ""DMA (Direct Memory Access Controller),DMA1""" menuitem "DMA2" "per , ""DMA (Direct Memory Access Controller),DMA2""" ) menuitem "EXTI;External Interrupt/Event Controller" "per , ""EXTI (External Interrupt/Event Controller)""" menuitem "FIREWALL" "per , ""FIREWALL""" menuitem "FLASH" "per , ""FLASH""" popup "GPIO;General Purpose I/O Ports and Peripheral I/O Lines" ( menuitem "GPIOA" "per , ""GPIO (General Purpose I/O Ports and Peripheral I/O Lines),GPIOA""" menuitem "GPIOB" "per , ""GPIO (General Purpose I/O Ports and Peripheral I/O Lines),GPIOB""" menuitem "GPIOC" "per , ""GPIO (General Purpose I/O Ports and Peripheral I/O Lines),GPIOC""" menuitem "GPIOD" "per , ""GPIO (General Purpose I/O Ports and Peripheral I/O Lines),GPIOD""" menuitem "GPIOH" "per , ""GPIO (General Purpose I/O Ports and Peripheral I/O Lines),GPIOH""" ) popup "I2C;Inter-Integrated Circuit" ( menuitem "I2C1" "per , ""I2C (Inter-Integrated Circuit),I2C1""" menuitem "I2C2" "per , ""I2C (Inter-Integrated Circuit),I2C2""" menuitem "I2C3" "per , ""I2C (Inter-Integrated Circuit),I2C3""" ) menuitem "IWDG;Independent Watchdog" "per , ""IWDG (Independent Watchdog)""" popup "LPTIM;Low Power Timer" ( menuitem "LPTIM1" "per , ""LPTIM (Low Power Timer),LPTIM1""" menuitem "LPTIM2" "per , ""LPTIM (Low Power Timer),LPTIM2""" ) menuitem "OPAMP;Operational Amplifiers" "per , ""OPAMP (Operational Amplifiers)""" menuitem "PWR;Power Control" "per , ""PWR (Power Control)""" menuitem "QUADSPI;QuadSPI Interface" "per , ""QUADSPI (QuadSPI Interface)""" menuitem "RCC;Reset and Clock Control" "per , ""RCC (Reset and Clock Control)""" menuitem "RNG;Random Number Generator" "per , ""RNG (Random Number Generator)""" menuitem "RTC;Real-Time Counter" "per , ""RTC (Real-Time Counter)""" popup "SPI;Serial Peripheral Interface/Inter-IC Sound" ( menuitem "SPI1" "per , ""SPI (Serial Peripheral Interface/Inter-IC Sound),SPI1""" menuitem "SPI2" "per , ""SPI (Serial Peripheral Interface/Inter-IC Sound),SPI2""" ) menuitem "SYSCFG;System Configuration Controller" "per , ""SYSCFG (System Configuration Controller)""" popup "TIM;Advanced-Timers" ( menuitem "TIM1" "per , ""TIM (Advanced-Timers),TIM1""" menuitem "TIM2" "per , ""TIM (Advanced-Timers),TIM2""" menuitem "TIM6" "per , ""TIM (Advanced-Timers),TIM6""" menuitem "TIM15" "per , ""TIM (Advanced-Timers),TIM15""" menuitem "TIM16" "per , ""TIM (Advanced-Timers),TIM16""" ) menuitem "TSC;Touch Sensing Controller" "per , ""TSC (Touch Sensing Controller)""" popup "USART;Universal Synchronous Asynchronous Receiver/Transmitter" ( menuitem "LPUART1" "per , ""USART (Universal Synchronous Asynchronous Receiver/Transmitter),LPUART1""" menuitem "USART1" "per , ""USART (Universal Synchronous Asynchronous Receiver/Transmitter),USART1""" menuitem "USART2" "per , ""USART (Universal Synchronous Asynchronous Receiver/Transmitter),USART2""" menuitem "USART3" "per , ""USART (Universal Synchronous Asynchronous Receiver/Transmitter),USART3""" ) menuitem "USB;Universal Serial Bus" "per , ""USB (Universal Serial Bus)""" menuitem "WWDG;System Window Watchdog" "per , ""WWDG (System Window Watchdog)""" ) )