; -------------------------------------------------------------------------------- ; @Title: RSL10 Specific Menu ; @Props: Released ; @Author: DOR, DAS, CEZ ; @Changelog: 2019-11-12 DOR ; @Manufacturer: ON - ON Semiconductor ; @Core: Cortex-M3 ; @Chip: RSL10 ; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menrsl10.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M3)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M3),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M3),Memory Protection Unit""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M3),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "SOCI;SoC Identification" "per , ""SOCI (SoC Identification)""" popup "CM3;ARM CM3 Processor" ( menuitem "LC;Loop Cache" "per , ""CM3 (ARM CM3 Processor),LC (Loop Cache)""" menuitem "IPP;IP Protection" "per , ""CM3 (ARM CM3 Processor),IPP (IP Protection)""" menuitem "ACC;Activity Counters" "per , ""CM3 (ARM CM3 Processor),ACC (Activity Counters)""" ) menuitem "LPDSP32;LPDSP32 Processor" "per , ""LPDSP32 (LPDSP32 Processor)""" popup "PWR;Power" ( menuitem "IPSV;Internal Power Supply Voltages" "per , ""PWR (Power),IPSV (Internal Power Supply Voltages)""" menuitem "PM;Power Modes" "per , ""PWR (Power),PM (Power Modes)""" menuitem "RST;Resets" "per , ""PWR (Power),RST (Resets)""" menuitem "ATS;Analog Test Signals" "per , ""PWR (Power),ATS (Analog Test Signals)""" ) popup "CLK;Clocking" ( menuitem "CGEN;CLock Generation" "per , ""CLK (Clocking),CGEN (Clock Generation)""" menuitem "CDIS;Clock Distribution" "per , ""CLK (Clocking),CDIS (Clock Distribution)""" menuitem "CDET;Clock Detection" "per , ""CLK (Clocking),CDET (Clock Detection)""" ) popup "MEM;Memory" ( menuitem "MEMR;Memory Registers" "per , ""MEM (Memory),MEMR (Memory Registers)""" menuitem "FMR;Flash Memory Registers" "per , ""MEM (Memory),FMR (Flash Memory Registers)""" ) popup "RFFE;RF Front-End" ( menuitem "RFOVR;RF Front-End Overview" "per , ""RFFE (RF Front-End),RFOVR (RF Front-End Overview)""" menuitem "RFFER;RF Front-End Registers" "per , ""RFFE (RF Front-End),RFFER (RF Front-End Registers)""" ) menuitem "BLE-BB;Bluetooth Low Energy Baseband" "per , ""BLE-BB (Bluetooth Low Energy Baseband)""" menuitem "DIO;Digital Input/Output" "per , ""DIO (Digital Input/Output)""" popup "EDI;External Digital Interfaces" ( menuitem "ADC;Analog-To-Digital Converter" "per , ""EDI (External Digital Interfaces),ADC (Analog-To-Digital Converter)""" menuitem "I2C;Inter-Integrated Circuit" "per , ""EDI (External Digital Interfaces),I2C (Inter-Integrated Circuit)""" menuitem "PCM;Pulse Code Modulation" "per , ""EDI (External Digital Interfaces),PCM (Pulse Code Modulation)""" menuitem "PWM;Pulse Width Modulation" "per , ""EDI (External Digital Interfaces),PWM (Pulse Width Modulation)""" popup "SPI;Serial Peripheral Interfaces" ( menuitem "SPI0" "per , ""EDI (External Digital Interfaces),SPI (Serial Peripheral Interfaces),SPI0""" menuitem "SPI1" "per , ""EDI (External Digital Interfaces),SPI (Serial Peripheral Interfaces),SPI1""" ) menuitem "UART;Universal Asynchronous Receiver-Transmitter Interfaces" "per , ""EDI (External Digital Interfaces),UART (Universal Asynchronous Receiver-Transmitter Interfaces)""" ) popup "PERIPH;Peripherals" ( menuitem "CRC;Cyclic Redundancy Check Generator" "per , ""PERIPH (Peripherals),CRC (Cyclic Redundancy Check Generator)""" popup "DMA;Direct Memory Access" ( menuitem "Channel 0" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 0""" menuitem "Channel 1" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 1""" menuitem "Channel 2" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 2""" menuitem "Channel 3" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 3""" menuitem "Channel 4" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 4""" menuitem "Channel 5" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 5""" menuitem "Channel 6" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 6""" menuitem "Channel 7" "per , ""PERIPH (Peripherals),DMA (Direct Memory Access),Channel 7""" ) popup "Timers" ( menuitem "Timer 0" "per , ""PERIPH (Peripherals),Timers,Timer 0""" menuitem "Timer 1" "per , ""PERIPH (Peripherals),Timers,Timer 1""" menuitem "Timer 2" "per , ""PERIPH (Peripherals),Timers,Timer 2""" menuitem "Timer 3" "per , ""PERIPH (Peripherals),Timers,Timer 3""" ) menuitem "WDT;Watchdog Timer" "per , ""PERIPH (Peripherals),WDT (Watchdog Timer)""" ) popup "AUD;Audio" ( menuitem "DMIC;Digital Microphone Inputs" "per , ""AUD (Audio),DMIC (Digital Microphone Inputs)""" menuitem "OD;Output Drivers" "per , ""AUD (Audio),OD (Output Drivers)""" menuitem "ASCC;Audio Sink Clock Counters" "per , ""AUD (Audio),ASCC (Audio Sink Clock Counters)""" menuitem "ASRC;Asynchronous Sample Rate Converter" "per , ""AUD (Audio),ASRC (Asynchronous Sample Rate Converter)""" ) ) )