; -------------------------------------------------------------------------------- ; @Title: CY8C4XXX Specific Menu ; @Props: Released ; @Author: BFG ; @Changelog: 2017-07-25 BFG ; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation ; @Core: Cortex-M0P ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menpsoc.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M0+)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M0+),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M0+),Debug,Core Debug""" menuitem "[:chip]BPU;Breakpoint Unit" "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "AROUTE" "per , ""AROUTE""" popup "CNT" ( menuitem "CNT 0" "per , ""CNT (TCPWM - Individual Counter),CNT 0""" menuitem "CNT 1" "per , ""CNT (TCPWM - Individual Counter),CNT 1""" menuitem "CNT 2" "per , ""CNT (TCPWM - Individual Counter),CNT 2""" menuitem "CNT 3" "per , ""CNT (TCPWM - Individual Counter),CNT 3""" if (!cpuis("CY8C4A24*")) ( menuitem "CNT 4" "per , ""CNT (TCPWM - Individual Counter),CNT 4""" menuitem "CNT 5" "per , ""CNT (TCPWM - Individual Counter),CNT 5""" menuitem "CNT 6" "per , ""CNT (TCPWM - Individual Counter),CNT 6""" menuitem "CNT 7" "per , ""CNT (TCPWM - Individual Counter),CNT 7""" ) ) menuitem "CPUSS" "per , ""CPUSS (CPU Sub System)""" if (cpu()!="CY8C4A24PVI-431"&&cpu()!="CY8C4A24AZI-433"&&cpu()!="CY8C4A25PVI-471"&&cpu()!="CY8C4A25FNI-473"&&cpu()!="CY8C4A25LQI-473"&&cpu()!="CY8C4A25AZI-473"&&cpu()!="CY8C4A45PVI-471"&&cpu()!="CY8C4A45FNI-473"&&cpu()!="CY8C4A45LQI-473"&&cpu()!="CY8C4A45AZI-473") ( menuitem "CSD" "per , ""CSD (CapSense Sigma Delta)""" ) popup "CTB" ( menuitem "CTB 0" "per , ""CTB,CTB 0""" menuitem "CTB 1" "per , ""CTB,CTB 1""" ) if (cpuis("CY8C4A45*")) ( popup "Direct-Memory Access" ( menuitem "DMAC" "per , ""DMAC (Direct-Memory Access)""" popup "Descriptor" ( menuitem "Direct-Memory Access Descriptor" "per , ""DMAC (Direct-Memory Access),Direct-Memory Access Descriptor""" ) ) ) menuitem "DSAB" "per , ""DSAB (Deep Sleep Amplifier Bias)""" popup "GPIO" ( menuitem "GPIO" "per , ""GPIO (General Purpose Input/Output)""" popup "GPIO - PS" ( menuitem "PRT0" "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT0""" menuitem "PRT1" "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT1""" menuitem "PRT2" "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT2""" menuitem "PRT3" "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT3""" if (cpu()!="CY8C4A24PVI-431"&&cpu()!="CY8C4A24PVI-441"&&cpu()!="CY8C4A25PVI-471"&&cpu()!="CY8C4A25PVI-481"&&cpu()!="CY8C4A45PVI-471"&&cpu()!="CY8C4A45PVI-481") ( menuitem "PRT4" "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT4""" ) menuitem "PRT5" "per , ""GPIO (General Purpose Input/Output),Port Specific,PRT5""" ) ) popup "HSIOM" ( menuitem "HSIOM" "per , ""HSIOM (High Speed IO Matrix)""" popup "HSIOM - PS" ( menuitem "Port Specific" "per , ""HSIOM (High Speed IO Matrix),Port Specific,Port Specific""" ) ) if (cpu()!="CY8C4A24PVI-431"&&cpu()!="CY8C4A24AZI-433"&&cpu()!="CY8C4A25PVI-471"&&cpu()!="CY8C4A25FNI-473"&&cpu()!="CY8C4A25LQI-473"&&cpu()!="CY8C4A25AZI-473"&&cpu()!="CY8C4A45PVI-471"&&cpu()!="CY8C4A45FNI-473"&&cpu()!="CY8C4A45LQI-473"&&cpu()!="CY8C4A45AZI-473") ( menuitem "LCD" "per , ""LCD""" ) menuitem "LPCOMP" "per , ""LPCOMP (Low Power Comparator)""" menuitem "PASS MMIO" "per , ""PASS MMIO (Programmable Analog Sub System Memory Mapped IO)""" menuitem "PERI" "per , ""PERI (Clock Dividers and Peripheral Interconnect)""" menuitem "PRGIO_PRT0" "per , ""PRGIO_PRT0""" menuitem "SAR" "per , ""SAR (Successive Approximation Register)""" popup "SCB" ( menuitem "SCB0" "per , ""SCB (Serial Communication Block),SCB0""" menuitem "SCB1" "per , ""SCB (Serial Communication Block),SCB1""" if (!cpuis("CY8C4A24*")) ( menuitem "SCB2" "per , ""SCB (Serial Communication Block),SCB2""" ) ) menuitem "SFLASH" "per , ""SFLASH (Supervisory Flash)""" menuitem "SPCIF" "per , ""SPCIF (System Performance Controller Interface)""" menuitem "SRSS" "per , ""SRSS (System Resources Sub System)""" menuitem "TCPWM" "per , ""TCPWM (Timer Counter PWM)""" menuitem "PERITGC" "per , ""PERITGC (PERI Trigger Group Control)""" menuitem "UAB" "per , ""UAB (Universal Analog Block)""" menuitem "WCO" "per , ""WCO (Watch Crystal Oscillator)""" ) )