; -------------------------------------------------------------------------------- ; @Title: iMX31 Specific Menu ; @Props: Released ; @Author: MAL ; @Changelog: 2013-03-07 MAL ; @Manufacturer: NXP ; @Core: ARM1136JF-S ; @Chip: IMX31 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menmcimx31.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "ARM Core Registers" ( menuitem "Memory Management Unit" "per , ""ARM Core Registers,Memory Management Unit""" menuitem "Overall System Configuration and Control" "per , ""ARM Core Registers,Overall System Configuration and Control""" menuitem "Cache Configuration and Control" "per , ""ARM Core Registers,Cache Configuration and Control""" menuitem "TCM Configuration and Control" "per , ""ARM Core Registers,TCM Configuration and Control""" menuitem "DMA Control" "per , ""ARM Core Registers,DMA Control""" menuitem "System Performance Monitoring" "per , ""ARM Core Registers,System Performance Monitoring""" menuitem "Debug Access to Caches and TLB" "per , ""ARM Core Registers,Debug Access to Caches and TLB""" menuitem "Debug Register" "per , ""ARM Core Registers,Debug Register""" menuitem "Breakpoints" "per , ""ARM Core Registers,Breakpoints""" menuitem "Watchpoints" "per , ""ARM Core Registers,Watchpoints""" ) separator menuitem "CCM (Clock Control Module)" "per , ""CCM (Clock Control Module)""" menuitem "IOMUXC (IOMUX Controller)" "per , ""IOMUXC (IOMUX Controller)""" menuitem "1-Wire (1-Wire Interface)" "per , ""1-Wire (1-Wire Interface)""" popup "AIPS (AHB-Lite 2.v6 to IP Bus Interface)" ( menuitem "AIPS 1" "per , ""AIPS (AHB-Lite 2.v6 to IP Bus Interface),AIPS 1""" menuitem "AIPS 2" "per , ""AIPS (AHB-Lite 2.v6 to IP Bus Interface),AIPS 2""" ) menuitem "L2CC (L2 Cache Controller)" "per , ""L2CC (L2 Cache Controller)""" menuitem "EVTMON (ARM11 Event Monitor)" "per , ""EVTMON (ARM11 Event Monitor)""" menuitem "AVIC (ARM1136JF-S Interrupt Controller)" "per , ""AVIC (ARM1136JF-S Interrupt Controller)""" menuitem "MAX (Multi-Layer AHB Crossbar Switch)" "per , ""MAX (Multi-Layer AHB Crossbar Switch)""" menuitem "ATA (Advanced Technology Attachment)" "per , ""ATA (Advanced Technology Attachment)""" menuitem "AUDMUX (Digital Audio Mux)" "per , ""AUDMUX (Digital Audio Mux)""" popup "CSPI (Configurable Serial Peripheral Interface)" ( menuitem "CSPI 1" "per , ""CSPI (Configurable Serial Peripheral Interface),CSPI 1""" menuitem "CSPI 2" "per , ""CSPI (Configurable Serial Peripheral Interface),CSPI 2""" menuitem "CSPI 3" "per , ""CSPI (Configurable Serial Peripheral Interface),CSPI 3""" ) popup "EPIT (Enhanced Periodic Interrupt Timer)" ( menuitem "EPIT 1" "per , ""EPIT (Enhanced Periodic Interrupt Timer),EPIT 1""" menuitem "EPIT 2" "per , ""EPIT (Enhanced Periodic Interrupt Timer),EPIT 2""" ) menuitem "FIRI (Fast Infrared Interface)" "per , ""FIRI (Fast Infrared Interface)""" menuitem "GPT (General Purpose Timer)" "per , ""GPT (General Purpose Timer)""" popup "I2C (Inter-Integrated Circuit)" ( menuitem "I2C 1" "per , ""I2C (Inter-Integrated Circuit),I2C 1""" menuitem "I2C 2" "per , ""I2C (Inter-Integrated Circuit),I2C 2""" menuitem "I2C 3" "per , ""I2C (Inter-Integrated Circuit),I2C 3""" ) popup "IPU (Image Processing Unit)" ( menuitem "CSPI Common Registers" "per , ""Image Processing Unit,CSPI Common Registers""" menuitem "CSI Registers" "per , ""Image Processing Unit,CSI Registers""" menuitem "IC Registers" "per , ""Image Processing Unit,IC Registers""" menuitem "PF Registers" "per , ""Image Processing Unit,PF Registers""" menuitem "IDMAC Registers" "per , ""Image Processing Unit,IDMAC Registers""" menuitem "SDC Registers" "per , ""Image Processing Unit,SDC Registers""" menuitem "ADC Registers" "per , ""Image Processing Unit,ADC Registers""" menuitem "DI Registers" "per , ""Image Processing Unit,DI Registers""" ) menuitem "KPP (Keypad Port)" "per , ""KPP (Keypad Port)""" menuitem "MSHC (Memory Stick Host Controller)" "per , ""MSHC (Memory Stick Host Controller)""" menuitem "PWM (Pulse-Width Modulator)" "per , ""PWM (Pulse-Width Modulator)""" menuitem "RTC (Real Time Clock)" "per , ""RTC (Real Time Clock)""" menuitem "SDHC (Secured Digital Host Controller)" "per , ""SDHC (Secured Digital Host Controller)""" menuitem "SDMA (Smart Direct Memory Access)" "per , ""SDMA (Smart Direct Memory Access)""" menuitem "SIM (Subscriber Identification Module)" "per , ""SIM (Subscriber Identification Module)""" popup "SSI (Synchronous Serial Interface)" ( menuitem "SSI 1" "per , ""SSI (Synchronous Serial Interface),SSI 1""" menuitem "SSI 2" "per , ""SSI (Synchronous Serial Interface),SSI 2""" ) popup "UART (Universal Asynchronous Receiver/Transmitter)" ( menuitem "UART 1" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 1""" menuitem "UART 2" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 2""" menuitem "UART 3" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 3""" menuitem "UART 4" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 4""" menuitem "UART 5" "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART 5""" ) menuitem "USBOTG (USB On-The-Go)" "per , ""USBOTG (USB On-The-Go)""" menuitem "WDOG (Watchdog Timer)" "per , ""WDOG (Watchdog Timer)""" menuitem "ESDCTL (Enhanced SDRAM Controller)" "per , ""ESDCTL (Enhanced SDRAM Controller)""" menuitem "WEIM (Wireless External Interface Module)" "per , ""WEIM (Wireless External Interface Module)""" menuitem "NANDFC (NAND Flash Controller)" "per , ""NANDFC (NAND Flash Controller)""" menuitem "PCMCIA (Personal Computer Memory Card International Association Controller)" "per , ""PCMCIA (Personal Computer Memory Card International Association Controller)""" menuitem "M3IF (Multi-Master Memory Interface)" "per , ""M3IF (Multi-Master Memory Interface)""" menuitem "GPIO (General Purpose Input/Output)" "per , ""GPIO (General Purpose Input/Output)""" ) )