; --------------------------------------------------------------------------------
; @Title: M471 Specific Menu
; @Props: Released
; @Author: KWI, DAB
; @Changelog: 2020-10-07 KWI
;             2022-01-24 DAB
; @Manufacturer: NUVOTON - Nuvoton Technology Corp.
; @Core: Cortex-M4
; @Chip: M471KI8AE, M471QG7AE, M471QG8AE, M471QI8AE, M471R1G7AE, M471R1I8AE,
;        M471VG7AE, M471VG8AE, M471VI8AE
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menm471.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "ACMP01"       "per , ""ACMP (ACMP Register Map)"""
popup "BPWM (BPWM Register Map)"
(
menuitem "BPWM0"    "per , ""BPWM (BPWM Register Map),BPWM0"""
menuitem "BPWM1"    "per , ""BPWM (BPWM Register Map),BPWM1"""
)
menuitem "CIR0"         "per , ""CIR0 (CIR0 Register Map)"""
menuitem "CLK"          "per , ""CLK (CLK Register Map)"""
menuitem "CRC"          "per , ""CRC (CRC Register Map)"""
menuitem "DAC"          "per , ""DAC (DAC Register Map)"""
menuitem "DFMC"         "per , ""DFMC (DFMC Register Map)"""
menuitem "EADC"         "per , ""EADC (EADC Register Map)"""
popup "EPWM (EPWM Register Map)"
(
menuitem "EPWM0"    "per , ""EPWM (EPWM Register Map),EPWM0"""
menuitem "EPWM1"    "per , ""EPWM (EPWM Register Map),EPWM1"""
)
menuitem "FMC"          "per , ""FMC (FMC Register Map)"""
menuitem "GPIO"         "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"""
popup "I2C (Inter-Integrated Circuit)"
(
menuitem "I2C0"     "per , ""I2C (Inter-Integrated Circuit),I2C0"""
menuitem "I2C1"     "per , ""I2C (Inter-Integrated Circuit),I2C1"""
)
menuitem "NMI"          "per , ""NMI (NMI Register Map)"""
menuitem "NVIC"         "per , ""NVIC (NVIC Register Map)"""
menuitem "PDMA"         "per , ""PDMA (PDMA Register Map)"""
menuitem "PRNG"         "per , ""PRNG (PRNG Register Map)"""
menuitem "RTC"          "per , ""RTC (Real-time Counter)"""
popup "SPI (SPI Register Map)"
(
menuitem "SPI0"     "per , ""SPI (SPI Register Map),SPI0"""
menuitem "SPI1"     "per , ""SPI (SPI Register Map),SPI1"""
)
menuitem "SYS"          "per , ""SYS (SYS Register Map)"""
menuitem "SCS"          "per , ""SYST_SCR (SYST_SCR Register Map)"""
popup "TIMER (Timer/Counter)"
(
menuitem "TMR01"    "per , ""TIMER (Timer/Counter),TMR01"""
menuitem "TMR23"    "per , ""TIMER (Timer/Counter),TMR23"""
)
popup "UART (Universal Asynchronous Receiver/Transmitter)"
(
menuitem "UART0"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART0"""
menuitem "UART1"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART1"""
menuitem "UART2"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART2"""
menuitem "UART3"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART3"""
menuitem "UART4"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART4"""
menuitem "UART5"    "per , ""UART (Universal Asynchronous Receiver/Transmitter),UART5"""
)
menuitem "WDT"          "per , ""WDT (Watchdog Timer Unit)"""
menuitem "WWDT"         "per , ""WWDT (WWDT Register Map)"""
)
)