; --------------------------------------------------------------------------------
; @Title: LPC40xx Specific Menu
; @Props: Released
; @Author: ASK, TPP
; @Changelog: 2013-11-05
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-M4
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menlpc40xx.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (corename()=="CORTEXM4F")
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
else
(
popup "[:chip]Core Registers (Cortex-M4)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4),Nested Vectored Interrupt Controller"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
separator
menuitem "SYSCON"           "per , ""SYSCON (System Control)"""
menuitem "FLASH"            "per , ""FLASH (Flash Accelerator)"""
menuitem "NVIC"             "per , ""NVIC (Nested Vectored Interrupt Controller)"""
menuitem "IOCON"            "per , ""IOCON (I/O Control)"""
menuitem "GPIO"             "per , ""GPIO (General Purpose Input/Output)"""
if !cpuis("LPC4072*")&&!cpuis("LPC4074*")&&!cpuis("LPC4078FBD80")&&!cpuis("LPC4078FBD100")
(
menuitem "EMC"          "per , ""EMC (External Memory Controller)"""
)
if (cpu()=="LPC4076FBD144")||(cpu()=="LPC4076FET180")||(cpu()=="LPC4078FBD100")||(cpu()=="LPC4078FBD144")||(cpu()=="LPC4078FBD208")||(cpu()=="LPC4078FBD80")||(cpu()=="LPC4078FET180")||(cpu()=="LPC4078FET208")||(cpu()=="LPC4088FBD144")||(cpu()=="LPC4088FBD208")||(cpu()=="LPC4088FET180")||(cpu()=="LPC4088FET208")
(
menuitem "Ethernet"     "per , ""Ethernet"""
)
if cpuis("LPC4088*")
(
menuitem "LCD"          "per , ""LCD (LCD Controller)"""
)
menuitem "USB DEV"          "per , ""USB DEV (Universal Serial Bus)"""
if !cpuis("LPC4072*")&&!cpuis("LPC4074*")
(
menuitem "USB HOST"     "per , ""USB Host (Universal Serial Bus)"""
menuitem "USB OTG"      "per , ""USB OTG (Universal Serial Bus On-The-Go)"""
)
menuitem "SDC"              "per , ""SDC (SD Card interface)"""
menuitem "UART"             "per , ""UART (Universal Asynchronous Receiver and Transmitter)"""
menuitem "CAN"              "per , ""CAN (Controller Area Network)"""
menuitem "SSP"              "per , ""SSP (Synchronous Serial Port)"""
menuitem "I2C"              "per , ""I2C (Interface)"""
menuitem "I2S"              "per , ""I2S (Interface)"""
menuitem "Timers"           "per , ""Timer Counter"""
menuitem "STT"              "per , ""STT (System Tick Timer)"""
menuitem "PWM"              "per , ""PWM (Pulse Width Modulators)"""
menuitem "MCPWM"            "per , ""MCPWM (Motor Control Pulse Width Modulators)"""
if !cpuis("LPC4072*")&&!cpuis("LPC4074*")
(
menuitem "QEI"          "per , ""QEI (Quadrature Encoder Interface)"""
)
menuitem "RTC"              "per , ""RTC (Real Time Clock)"""
menuitem "EMR"              "per , ""EMR (Event Monitor/Recorder)"""
menuitem "WWDT"             "per , ""WWDT (Windowed Watchdog Timer)"""
menuitem "ADC"              "per , ""ADC (Analog-to-Digital Converter)"""
menuitem "DAC"              "per , ""DAC (Digital-to-Analog Converter)"""
if !cpuis("LPC4072*")&&!cpuis("LPC4074*")
(
menuitem "CMP"          "per , ""CMP (Comparators)"""
)
menuitem "GPDMA"            "per , ""GPDMA (General Purpose DMA Controller)"""
menuitem "CRC"              "per , ""CRC (Cyclic Redundancy Check)"""
menuitem "EEPROM"           "per , ""EEPROM Memory"""
menuitem "Debug"                        "per , ""Debug"""
)
)