; --------------------------------------------------------------------------------
; @Title: KMx Specific Menu
; @Props: Released
; @Author: SZM, BCA
; @Changelog: 2018-04-04 BCA
; @Manufacturer: NXP - NXP Semiconductors
; @Chip: MKM14Z128CHH5,MKM14Z64CHH5,MKM33Z128CLH5,MKM33Z128CLL5
;        MKM33Z64CLH5,MKM33Z64CLL5,MKM34Z128CLL5,MKM14Z128ACHH5
;        MKM14Z128ACHH5R,MKM14Z64ACHH5,MKM33Z128ACLH5,MKM33Z128ACLH5R
;        MKM33Z128CLH5R,MKM33Z64ACLL5,MKM33Z64ACLL5R,MKM33Z64ACLH5
;        MKM33Z128ACLL5,MKM34Z128ACLL5,MKM34Z128ACLL5R,MKM33Z64CLL5R
;        MKM14Z128CHH5R,MKM34Z256VLL7,MKM34Z256VLL7R,MKM34Z256VLQ7
; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menkinetism.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M0+)"
(
menuitem "[:chip]System Control"                                  "per , ""Core Registers (Cortex-M0+),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                      "per , ""Core Registers (Cortex-M0+),Memory Protection Unit (MPU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"       "per , ""Core Registers (Cortex-M0+),Nested Vectored Interrupt Controller (NVIC)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                  "per , ""Core Registers (Cortex-M0+),Debug,Core Debug"""
menuitem "[:chip]BPU;Breakpoint Unit"                         "per , ""Core Registers (Cortex-M0+),Debug,Breakpoint Unit (BPU)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"          "per , ""Core Registers (Cortex-M0+),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
popup "Ports"
(
menuitem "PORTA"        "per , ""PORT (Port control and interrupts),PORTA"""
if !cpuis("MKM14Z128CHH5*")&&!cpuis("MKM14Z64CHH5")&&!cpuis("MKM14Z128ACHH5*")&&!cpuis("MKM14Z64ACHH5")
(
menuitem "PORTB"        "per , ""PORT (Port control and interrupts),PORTB"""
menuitem "PORTC"        "per , ""PORT (Port control and interrupts),PORTC"""
menuitem "PORTD"        "per , ""PORT (Port control and interrupts),PORTD"""
)
menuitem "PORTE"            "per , ""PORT (Port control and interrupts),PORTE"""
menuitem "PORTF"            "per , ""PORT (Port control and interrupts),PORTF"""
menuitem "PORTG"            "per , ""PORT (Port control and interrupts),PORTG"""
if !cpuis("MKM33Z128CLH5*")&&!cpuis("MKM33Z64CLH5")&&!cpuis("MKM33Z128ACLH5*")&&!cpuis("MKM33Z64ACLH5")
(
menuitem "PORTH"        "per , ""PORT (Port control and interrupts),PORTH"""
)
menuitem "PORTI"            "per , ""PORT (Port control and interrupts),PORTI"""
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
if cpuis("MKM34Z256VLQ7")
(
menuitem "PORTJ"    "per , ""PORT (Port control and interrupts),PORTJ"""
menuitem "PORTK"    "per , ""PORT (Port control and interrupts),PORTK"""
menuitem "PORTL"    "per , ""PORT (Port control and interrupts),PORTL"""
)
menuitem "PORTM"        "per , ""PORT (Port control and interrupts),PORTM"""
)
)
menuitem "SIM"                  "per , ""SIM (System Integration Module)"""
menuitem "MCM"                  "per , ""MCM (Miscellaneous Control Module)"""
menuitem "RCM"                  "per , ""RCM (Reset Control Module)"""
menuitem "SMC"                  "per , ""SMC (System Mode Controller)"""
menuitem "XBAR"                 "per , ""XBAR (Inter-Peripheral Crossbar Switch)"""
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "MMAU"             "per , ""MMAU (Memory Mapped Arithmetic Unit)"""
)
menuitem "LLWU"                 "per , ""LLWU (Low-Leakage Wakeup Unit)"""
popup "DMAC"
(
menuitem "CHANNEL 0"        "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 0"""
menuitem "CHANNEL 1"        "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 1"""
menuitem "CHANNEL 2"        "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 2"""
menuitem "CHANNEL 3"        "per , ""DMAC (Direct Memory Access Controller Module),CHANNEL 3"""
)
menuitem "DMAMUX"               "per , ""DMAMUX (Direct Memory Access Multiplexer)"""
menuitem "AIPS-Lite"            "per , ""AIPS-Lite (Peripheral Bridge)"""
menuitem "MPU"                  "per , ""MPU (Memory Protection Unit)"""
menuitem "PMC"                  "per , ""PMC (Power Management Controller)"""
menuitem "WDOG"                 "per , ""WDOG (Watchdog Timer)"""
menuitem "EWM"                  "per , ""EWM (External Watchdog Monitor)"""
menuitem "AFE"                  "per , ""AFE (Analog Front End)"""
popup "ADC"
(
menuitem "COMMON"           "per , ""ADC (Analog-to-Digital Converter),COMMON"""
menuitem "CHANNEL A"        "per , ""ADC (Analog-to-Digital Converter),CHANNEL A"""
menuitem "CHANNEL B"        "per , ""ADC (Analog-to-Digital Converter),CHANNEL B"""
menuitem "CHANNEL C"        "per , ""ADC (Analog-to-Digital Converter),CHANNEL C"""
menuitem "CHANNEL D"        "per , ""ADC (Analog-to-Digital Converter),CHANNEL D"""
)
popup "CMP"
(
menuitem "CHANNEL 0"        "per , ""CMP (Comparator),CHANNEL 0"""
menuitem "CHANNEL 1"        "per , ""CMP (Comparator),CHANNEL 1"""
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "CHANNEL 2"    "per , ""CMP (Comparator),CHANNEL 2"""
)
)
menuitem "VREF"                 "per , ""VREF (Voltage Reference)"""
menuitem "MCG"                  "per , ""MCG (Multipurpose Clock Generator)"""
menuitem "OSC"                  "per , ""OSC (Oscillator)"""
menuitem "IRTC"                 "per , ""IRTC (Independent Real Time Clock)"""
menuitem "LPTMR"                "per , ""LPTMR (Low-Power Timer)"""
popup "PIT"
(
menuitem "PIT 0"            "per , ""PIT (Periodic Interrupt Timer),PIT 0"""
menuitem "PIT 1"            "per , ""PIT (Periodic Interrupt Timer),PIT 1"""
)
popup "TMR"
(
menuitem "TIMER 0"          "per , ""TMR (Quad Timer),TIMER 0"""
menuitem "TIMER 1"          "per , ""TMR (Quad Timer),TIMER 1"""
menuitem "TIMER 2"          "per , ""TMR (Quad Timer),TIMER 2"""
menuitem "TIMER 3"          "per , ""TMR (Quad Timer),TIMER 3"""
)
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "PDB"              "per , ""PDB (Programmable Delay Block)"""
)
popup "I2C"
(
menuitem "I2C 0"            "per , ""I2C (Inter-Integrated Circuit),I2C 0"""
if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "I2C 1"        "per , ""I2C (Inter-Integrated Circuit),I2C 1"""
)
)
popup "SPI"
(
menuitem "SPI 0"            "per , ""SPI (Serial Peripheral Interface),SPI 0"""
menuitem "SPI 1"            "per , ""SPI (Serial Peripheral Interface),SPI 1"""
)
popup "UART"
(
menuitem "MODULE 0"         "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 0"""
menuitem "MODULE 1"         "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 1"""
menuitem "MODULE 2"         "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 2"""
menuitem "MODULE 3"         "per , ""UART (Universal Asynchronous Receiver/Transmitter),MODULE 3"""
)
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "LPUART"           "per , ""Low-Power Universal Asynchronous Receiver/Transmitter (LPUART)"""
menuitem "MMCAU"            "per , ""MMCAU (Memory Mapped Cryptographic Acceleration Unit)"""
)
menuitem "CRC"                  "per , ""CRC (Cyclic Redundancy Check)"""
menuitem "RNGA"                 "per , ""RNGA (Random Number Generator Accelerator)"""
if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "SLCD"             "per , ""SLCD (LCD Controller)"""
)
popup "GPIO"
(
menuitem "GPIOA"            "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO A"""
if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5*")||cpuis("MKM34Z128CLL5")||cpuis("MKM33Z128CLH5*")||cpuis("MKM33Z64CLH5")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")
(
menuitem "GPIOB"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO B"""
menuitem "GPIOC"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO C"""
menuitem "GPIOD"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO D"""
)
menuitem "GPIOE"            "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO E"""
menuitem "GPIOF"            "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO F"""
menuitem "GPIOG"            "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO G"""
if cpuis("MKM33Z128CLL5")||cpuis("MKM33Z64CLL5")||cpuis("MKM34Z128CLL5")||cpuis("MKM14Z128CHH5")||cpuis("MKM14Z64CHH5")||cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM14Z128CHH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "GPIOH"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO H"""
)
menuitem "GPIOI"            "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO I"""
if cpuis("MKM34Z256VLQ7")
(
menuitem "GPIOJ"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO J"""
menuitem "GPIOK"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO K"""
menuitem "GPIOL"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO L"""
)
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
menuitem "GPIOM"        "per , ""GPIO (General-Purpose Input/Output),GPIO,GPIO M"""
)
)
if cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
popup "FGPIO"
(
menuitem "FGPIOA"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOA"""
menuitem "FGPIOB"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOB"""
menuitem "FGPIOC"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOC"""
menuitem "FGPIOD"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOD"""
menuitem "FGPIOE"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOE"""
menuitem "FGPIOF"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOF"""
menuitem "FGPIOG"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOG"""
menuitem "FGPIOH"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOH"""
menuitem "FGPIOI"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOI"""
if cpuis("MKM34Z256VLQ7")
(
menuitem "FGPIOJ"   "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOJ"""
menuitem "FGPIOK"   "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOK"""
menuitem "FGPIOL"   "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOL"""
)
menuitem "FGPIOM"       "per , ""GPIO (General-Purpose Input/Output),FGPIO,FGPIOM"""
)
)
if cpuis("MKM14Z128ACHH5*")||cpuis("MKM14Z64ACHH5")||cpuis("MKM33Z128ACLH5*")||cpuis("MKM33Z64ACLH5*")||cpuis("MKM33Z64ACLL5*")||cpuis("MKM33Z128ACLL5")||cpuis("MKM34Z128ACLL5*")||cpuis("MKM33Z64CLL5*")||cpuis("MKM14Z128CHH5*")||cpuis("MKM34Z256VLL7*")||cpuis("MKM34Z256VLQ7")
(
popup "MTB"
(
menuitem "MTB_RAM"      "per , ""MTB (Micro Trace Buffer),MTB_RAM"""
menuitem "MTB_DWT"      "per , ""MTB (Micro Trace Buffer),MTB_DWT"""
menuitem "ROM"          "per , ""MTB (Micro Trace Buffer),ROM"""
)
)
menuitem "FTFA"                 "per , ""FTFA (Flash Memory Module)"""
)
)