; --------------------------------------------------------------------------------
; @Title: IMX8ULP Specific Menu
; @Props: Released
; @Author: KWI, KMB, JON
; @Changelog: 2020-07-30 KWI
;             2020-10-15 KWI
;             2021-04-07 KWI
;             2021-08-11 KMB
;             2022-01-25 JON
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-A35, Cortex-M33F
; @Chip: IMX8UD3, IMX8UD3-CM33, IMX8UD5, IMX8UD5-CM33,
;        IMX8UD7, IMX8UD7-CM33, IMX8US3, IMX8US3-CM33,
;        IMX8US5, IMX8US5-CM33
; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menimx8ulp.men 17486 2024-02-13 16:49:15Z jhuang $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (CORENAME()=="CORTEXA35")
(
popup "[:chip]Core Registers (Cortex-A35)"
(
menuitem "[:chip]ID Registers[AArch64]"                                     "per , ""Core Registers (Cortex-A35),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"                 "per , ""Core Registers (Cortex-A35),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                           "per , ""Core Registers (Cortex-A35),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                        "per , ""Core Registers (Cortex-A35),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"                  "per , ""Core Registers (Cortex-A35),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                       "per , ""Core Registers (Cortex-A35),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                           "per , ""Core Registers (Cortex-A35),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller System Registers[AArch64]"    "per , ""Core Registers (Cortex-A35),AArch64,Generic Interrupt Controller System Registers"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                                  "per , ""Core Registers (Cortex-A35),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                             "per , ""Core Registers (Cortex-A35),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch64]"                     "per , ""Core Registers (Cortex-A35),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                                     "per , ""Core Registers (Cortex-A35),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"                 "per , ""Core Registers (Cortex-A35),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                           "per , ""Core Registers (Cortex-A35),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                        "per , ""Core Registers (Cortex-A35),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"                  "per , ""Core Registers (Cortex-A35),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                       "per , ""Core Registers (Cortex-A35),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                           "per , ""Core Registers (Cortex-A35),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller System Registers[AArch32]"    "per , ""Core Registers (Cortex-A35),AArch32,Generic Interrupt Controller System Registers"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                                  "per , ""Core Registers (Cortex-A35),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                             "per , ""Core Registers (Cortex-A35),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch32]"                     "per , ""Core Registers (Cortex-A35),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-500)"                            "per , ""Core Registers (Cortex-A35),Interrupt Controller (GIC-500)"""
)
)
else
(
popup "[:chip]Core Registers (Cortex-M33F)"
(
menuitem "[:chip]System Control"                                   "per , ""Core Registers (Cortex-M33F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                       "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)"""
menuitem "[:chip]SAU;Security Attribution Unit"                    "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"        "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)"""
menuitem "[:chip]FPU;Floating-point Unit"                          "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                   "per , ""Core Registers (Cortex-M33F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"          "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"           "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
separator
popup "ADC"
(
menuitem "ADC0"                                 "per , ""ADC,ADC0"""
menuitem "ADC1"                                 "per , ""ADC,ADC1"""
)
popup "AHB_ADDR_REMAP"
(
menuitem "ADDR_REMAP0"                          "per , ""AHB_ADDR_REMAP,ADDR_REMAP0"""
menuitem "ADDR_REMAP1"                          "per , ""AHB_ADDR_REMAP,ADDR_REMAP1"""
)
popup "AXBS"
(
menuitem "AXBS0"                                "per , ""AXBS,AXBS0"""
menuitem "AXBS1"                                "per , ""AXBS,AXBS1"""
)
menuitem "BBNSM"                                    "per , ""BBNSM"""
popup "CAC (XCACHE)"
(
menuitem "CACHE64_CTRL0"                        "per , ""CAC (XCACHE),CACHE64_CTRL0"""
menuitem "CACHE64_CTRL1"                        "per , ""CAC (XCACHE),CACHE64_CTRL1"""
)
menuitem "CAN0"                                     "per , ""CAN"""
menuitem "CASPER"                                   "per , ""CASPER"""
popup "CGC (AD_CGC)"
(
menuitem "CGC_AD"                               "per , ""CGC (AD_CGC),CGC_AD"""
menuitem "CGC_LPAV"                             "per , ""CGC (AD_CGC),CGC_LPAV"""
menuitem "CGC_RTD"                              "per , ""CGC (AD_CGC),CGC_RTD"""
)
popup "CMC (CMC1)"
(
menuitem "CMC_AD"                               "per , ""CMC (CMC1),CMC_AD"""
menuitem "CMC_LPAC"                             "per , ""CMC (CMC1),CMC_LPAC"""
menuitem "CMC_RTD"                              "per , ""CMC (CMC1),CMC_RTD"""
)
popup "CMP"
(
menuitem "CMP0"                                 "per , ""CMP,CMP0"""
menuitem "CMP1"                                 "per , ""CMP,CMP1"""
)
menuitem "MIPI_CSI2RX"                              "per , ""CSI_PHY_REG (CSI2_RX)"""
popup "DAC"
(
menuitem "DAC0"                                 "per , ""DAC,DAC0"""
menuitem "DAC1"                                 "per , ""DAC,DAC1"""
)
menuitem "LCDIF"                                    "per , ""DCNANO (LCDIF)"""
menuitem "MIPI_DSI"                                 "per , ""DSI_HOST"""
menuitem "DSI_REG__DSI_HOST_APB_PKT_IF"             "per , ""DSI_HOST_APB_PKT_IF"""
menuitem "DSI_REG__DSI_HOST_DBI_INTFC"              "per , ""DSI_HOST_DBI_INTFC"""
menuitem "DSI_REG__DSI_HOST_DPI_INTFC"              "per , ""DSI_HOST_DPI_INTFC"""
menuitem "DSI_REG__DSI_HOST_NXP_IP2B_DPHY_INTFC"    "per , ""DSI_HOST_NXP_IP2B_DPHY_INTFC"""
menuitem "DMA0"                                     "per , ""EDMA0_MP (DMA MP)"""
menuitem "DMA0_TCD"                                 "per , ""EDMA0_TCD (DMA TCD)"""
menuitem "DMA1"                                     "per , ""EDMA1_MP (DMA MP)"""
menuitem "DMA1_TCD"                                 "per , ""EDMA1_TCD (DMA TCD)"""
menuitem "DMA2"                                     "per , ""EDMA2_MP (DMA MP)"""
menuitem "DMA2_TCD"                                 "per , ""EDMA2_TCD (DMA TCD)"""
menuitem "ENET"                                     "per , ""ENET (Ethernet MAC)"""
if cpuis("IMX8UD3-CM33")||cpuis("IMX8UD3")||cpuis("IMX8UD7")||cpuis("IMX8UD7-CM33")||cpuis("IMX8US3")||cpuis("IMX8US3-CM33")
(
menuitem "EPDC"                                 "per , ""EPDC,EPDC"""
)
menuitem "EWM0"                                     "per , ""EWM"""
popup "FLEXIO"
(
menuitem "FLEXIO0"                              "per , ""FLEXIO,FLEXIO0"""
menuitem "FLEXIO1"                              "per , ""FLEXIO,FLEXIO1"""
)
popup "FLEXSPI (FlexSPI)"
(
menuitem "FLEXSPI0"                             "per , ""FLEXSPI (FlexSPI),FLEXSPI0"""
menuitem "FLEXSPI1"                             "per , ""FLEXSPI (FlexSPI),FLEXSPI1"""
menuitem "FLEXSPI2"                             "per , ""FLEXSPI (FlexSPI),FLEXSPI2"""
)
popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)"
(
menuitem "GPIOA"                                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOA"""
menuitem "GPIOB"                                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOB"""
menuitem "GPIOC"                                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOC"""
menuitem "GPIOD"                                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOD"""
menuitem "GPIOE"                                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOE"""
menuitem "GPIOF"                                "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),GPIOF"""
)
popup "I3C"
(
menuitem "I3C0"                                 "per , ""I3C,I3C0"""
menuitem "I3C1"                                 "per , ""I3C,I3C1"""
menuitem "I3C2"                                 "per , ""I3C,I3C2"""
)
popup "IOMUX (IOMUXC rtd)"
(
menuitem "IOMUXC0"                              "per , ""IOMUX (IOMUXC rtd),IOMUXC0"""
menuitem "IOMUXC1"                              "per , ""IOMUX (IOMUXC rtd),IOMUXC1"""
)
menuitem "ISI0"                                     "per , ""ISI (ISI Memory Map)"""
menuitem "LPDDR"                                    "per , ""LPDDR (DATABAHN_REGS)"""
popup "LPI2C"
(
menuitem "LPI2C0"                               "per , ""LPI2C,LPI2C0"""
menuitem "LPI2C1"                               "per , ""LPI2C,LPI2C1"""
menuitem "LPI2C2"                               "per , ""LPI2C,LPI2C2"""
menuitem "LPI2C3"                               "per , ""LPI2C,LPI2C3"""
menuitem "LPI2C4"                               "per , ""LPI2C,LPI2C4"""
menuitem "LPI2C5"                               "per , ""LPI2C,LPI2C5"""
menuitem "LPI2C6"                               "per , ""LPI2C,LPI2C6"""
menuitem "LPI2C7"                               "per , ""LPI2C,LPI2C7"""
)
popup "LPIT"
(
menuitem "LPIT0"                                "per , ""LPIT,LPIT0"""
menuitem "LPIT1"                                "per , ""LPIT,LPIT1"""
)
popup "LPSPI"
(
menuitem "LPSPI0"                               "per , ""LPSPI,LPSPI0"""
menuitem "LPSPI1"                               "per , ""LPSPI,LPSPI1"""
menuitem "LPSPI2"                               "per , ""LPSPI,LPSPI2"""
menuitem "LPSPI3"                               "per , ""LPSPI,LPSPI3"""
menuitem "LPSPI4"                               "per , ""LPSPI,LPSPI4"""
menuitem "LPSPI5"                               "per , ""LPSPI,LPSPI5"""
)
popup "LPTMR"
(
menuitem "LPTMR0"                               "per , ""LPTMR,LPTMR0"""
menuitem "LPTMR1"                               "per , ""LPTMR,LPTMR1"""
)
popup "LPUART"
(
menuitem "LPUART0"                              "per , ""LPUART,LPUART0"""
menuitem "LPUART1"                              "per , ""LPUART,LPUART1"""
menuitem "LPUART2"                              "per , ""LPUART,LPUART2"""
menuitem "LPUART3"                              "per , ""LPUART,LPUART3"""
menuitem "LPUART4"                              "per , ""LPUART,LPUART4"""
menuitem "LPUART5"                              "per , ""LPUART,LPUART5"""
menuitem "LPUART6"                              "per , ""LPUART,LPUART6"""
menuitem "LPUART7"                              "per , ""LPUART,LPUART7"""
)
menuitem "MCM"                                      "per , ""MCM"""
menuitem "MIPI_CSI_CSR"                             "per , ""MIPI_CSI_CSR (MIPI CSI CSR module)"""
menuitem "MRT0"                                     "per , ""MRT (Multi-Rate Timer (MRT))"""
popup "MU (MUA)"
(
if cpuis("IMX8UD3-CM33")||cpuis("IMX8UD5-CM33")||cpuis("IMX8UD7-CM33")||cpuis("IMX8US3-CM33")||cpuis("IMX8US5-CM33")
(
menuitem "MU0_MUA"                          "per , ""MU (MUA),MU0_MUA"""
)
if cpuis("IMX8UD3")||cpuis("IMX8UD5")||cpuis("IMX8UD7")||cpuis("IMX8US3")||cpuis("IMX8US5")
(
menuitem "MU0_MUB"                          "per , ""MU (MUA),MU0_MUB"""
)
if cpuis("IMX8UD3-CM33")||cpuis("IMX8UD5-CM33")||cpuis("IMX8UD7-CM33")||cpuis("IMX8US3-CM33")||cpuis("IMX8US5-CM33")
(
menuitem "MU1_MUA"                          "per , ""MU (MUA),MU1_MUA"""
)
if cpuis("IMX8UD3")||cpuis("IMX8UD5")||cpuis("IMX8UD7")||cpuis("IMX8US3")||cpuis("IMX8US5")
(
menuitem "MU1_MUB"                          "per , ""MU (MUA),MU1_MUB"""
)
if cpuis("IMX8UD3-CM33")||cpuis("IMX8UD5-CM33")||cpuis("IMX8UD7-CM33")||cpuis("IMX8US3-CM33")||cpuis("IMX8US5-CM33")
(
menuitem "MU2_MUA"                          "per , ""MU (MUA),MU2_MUA"""
)
if cpuis("IMX8UD3")||cpuis("IMX8UD5")||cpuis("IMX8UD7")||cpuis("IMX8US3")||cpuis("IMX8US5")
(
menuitem "MU2_MUB"                          "per , ""MU (MUA),MU2_MUB"""
)
if cpuis("IMX8UD3-CM33")||cpuis("IMX8UD5-CM33")||cpuis("IMX8UD7-CM33")||cpuis("IMX8US3-CM33")||cpuis("IMX8US5-CM33")
(
menuitem "MU3_MUA"                          "per , ""MU (MUA),MU3_MUA"""
)
if cpuis("IMX8UD3")||cpuis("IMX8UD5")||cpuis("IMX8UD7")||cpuis("IMX8US3")||cpuis("IMX8US5")
(
menuitem "MU3_MUB"                          "per , ""MU (MUA),MU3_MUB"""
)
)
menuitem "OCOTP_CTRL"                               "per , ""OCOTP_CTRL (OCOTP Controller)"""
popup "PCC"
(
menuitem "PCC0"                                 "per , ""PCC,PCC0"""
menuitem "PCC1"                                 "per , ""PCC,PCC1"""
menuitem "PCC2"                                 "per , ""PCC,PCC2"""
menuitem "PCC3"                                 "per , ""PCC,PCC3"""
menuitem "PCC4"                                 "per , ""PCC,PCC4"""
menuitem "PCC5"                                 "per , ""PCC,PCC5"""
)
menuitem "PDM"                                      "per , ""PDM (Pulse Density Modulation (Digital Microphone) Interface)"""
popup "PHY (USBPHY)"
(
menuitem "USB0_PHY"                             "per , ""PHY (USBPHY),USB0_PHY"""
menuitem "USB1_PHY"                             "per , ""PHY (USBPHY),USB1_PHY"""
)
menuitem "POWERQ"                                   "per , ""POWERQ (PowerQuad)"""
menuitem "PXP"                                      "per , ""PXP"""
popup "SAI"
(
menuitem "SAI0"                                 "per , ""SAI,SAI0"""
menuitem "SAI1"                                 "per , ""SAI,SAI1"""
menuitem "SAI2"                                 "per , ""SAI,SAI2"""
menuitem "SAI3"                                 "per , ""SAI,SAI3"""
menuitem "SAI4"                                 "per , ""SAI,SAI4"""
menuitem "SAI5"                                 "per , ""SAI,SAI5"""
menuitem "SAI6"                                 "per , ""SAI,SAI6"""
menuitem "SAI7"                                 "per , ""SAI,SAI7"""
)
popup "SEMA42"
(
menuitem "SEMA42_0"                             "per , ""SEMA42,SEMA42_0"""
menuitem "SEMA42_1"                             "per , ""SEMA42,SEMA42_1"""
menuitem "SEMA42_2"                             "per , ""SEMA42,SEMA42_2"""
)
popup "SFA (Signal Frequency Analyser)"
(
menuitem "SFA0"                                 "per , ""SFA (Signal Frequency Analyser),SFA0"""
menuitem "SFA1"                                 "per , ""SFA (Signal Frequency Analyser),SFA1"""
menuitem "SFA2"                                 "per , ""SFA (Signal Frequency Analyser),SFA2"""
)
popup "SIM (APD_SIM)"
(
menuitem "SIM_AD"                               "per , ""SIM (APD_SIM),SIM_AD"""
menuitem "SIM_LPAV"                             "per , ""SIM (APD_SIM),SIM_LPAV"""
menuitem "SIM_RTD"                              "per , ""SIM (APD_SIM),SIM_RTD"""
)
menuitem "SPDIF"                                    "per , ""SPDIF (Sony/Philips Digital Interface)"""
popup "SYSPM"
(
menuitem "SYSPM0"                               "per , ""SYSPM,SYSPM0"""
menuitem "SYSPM1"                               "per , ""SYSPM,SYSPM1"""
)
popup "TPM"
(
menuitem "TPM0"                                 "per , ""TPM,TPM0"""
menuitem "TPM1"                                 "per , ""TPM,TPM1"""
menuitem "TPM2"                                 "per , ""TPM,TPM2"""
menuitem "TPM3"                                 "per , ""TPM,TPM3"""
menuitem "TPM4"                                 "per , ""TPM,TPM4"""
menuitem "TPM5"                                 "per , ""TPM,TPM5"""
menuitem "TPM6"                                 "per , ""TPM,TPM6"""
menuitem "TPM7"                                 "per , ""TPM,TPM7"""
menuitem "TPM8"                                 "per , ""TPM,TPM8"""
)
menuitem "TRDC"                                     "per , ""TRDC"""
popup "TRGMUX_ (TRGMUX)"
(
menuitem "TRGMUX0"                              "per , ""TRGMUX_ (TRGMUX),TRGMUX0"""
menuitem "TRGMUX1"                              "per , ""TRGMUX_ (TRGMUX),TRGMUX1"""
)
popup "TSTMR (TIMESTAMP)"
(
menuitem "TSTMR0__TIMESTAMP0"                   "per , ""TSTMR (TIMESTAMP),TSTMR0__TIMESTAMP0"""
menuitem "TSTMR1__TIMESTAMP0"                   "per , ""TSTMR (TIMESTAMP),TSTMR1__TIMESTAMP0"""
)
menuitem "USB_XBAR"                                 "per , ""USB_XBAR (USB)"""
menuitem "USBNC_XBAR"                               "per , ""USB_XBARNC (USBNC)"""
menuitem "USB0"                                     "per , ""USB0C (USB)"""
menuitem "USBNC0"                                   "per , ""USB0NC (USBNC)"""
menuitem "USB1"                                     "per , ""USB1C (USB)"""
menuitem "USBNC1"                                   "per , ""USB1NC (USBNC)"""
popup "USBDCD"
(
menuitem "USBDCD0"                              "per , ""USBDCD,USBDCD0"""
menuitem "USBDCD1"                              "per , ""USBDCD,USBDCD1"""
)
popup "USDHC (Ultra Secured Digital Host Controller)"
(
menuitem "USDHC0"                               "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC0"""
menuitem "USDHC1"                               "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC1"""
menuitem "USDHC2"                               "per , ""USDHC (Ultra Secured Digital Host Controller),USDHC2"""
)
popup "WDOG (Watchdog Timer Unit)"
(
menuitem "WDOG0"                                "per , ""WDOG (Watchdog Timer Unit),WDOG0"""
menuitem "WDOG1"                                "per , ""WDOG (Watchdog Timer Unit),WDOG1"""
menuitem "WDOG2"                                "per , ""WDOG (Watchdog Timer Unit),WDOG2"""
menuitem "WDOG3"                                "per , ""WDOG (Watchdog Timer Unit),WDOG3"""
menuitem "WDOG4"                                "per , ""WDOG (Watchdog Timer Unit),WDOG4"""
menuitem "WDOG5"                                "per , ""WDOG (Watchdog Timer Unit),WDOG5"""
)
popup "WUU"
(
menuitem "WUU0"                                 "per , ""WUU,WUU0"""
menuitem "WUU1"                                 "per , ""WUU,WUU1"""
)
menuitem "XRDC"                                     "per , ""XRDC"""
)
)