; -------------------------------------------------------------------------------- ; @Title: CY8C5XXX Specific Menu ; @Props: Released ; @Author: ADI, FIL ; @Changelog: 2010-01-25 ; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation ; @Core: Cortex-M3 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: mency8c5xxx.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M3)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M3),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M3),Memory Protection Unit""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M3),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "SRAM" "per , ""SRAM""" menuitem "CLKDIST" "per , ""CLKDIST""" menuitem "FASTCLK" "per , ""FASTCLK""" menuitem "SLOWCLK" "per , ""SLOWCLK""" menuitem "BOOST" "per , ""BOOST""" menuitem "PWRSYS" "per , ""PWRSYS (Power system)""" menuitem "PM" "per , ""PM (Power management)""" popup "PICU" ( menuitem "PICU 0" "per , ""PICU (Ports interrupt control),PICU 0""" menuitem "PICU 1" "per , ""PICU (Ports interrupt control),PICU 1""" menuitem "PICU 2" "per , ""PICU (Ports interrupt control),PICU 2""" menuitem "PICU 3" "per , ""PICU (Ports interrupt control),PICU 3""" menuitem "PICU 4" "per , ""PICU (Ports interrupt control),PICU 4""" menuitem "PICU 5" "per , ""PICU (Ports interrupt control),PICU 5""" menuitem "PICU 6" "per , ""PICU (Ports interrupt control),PICU 6""" menuitem "PICU 12" "per , ""PICU (Ports interrupt control),PICU 12""" menuitem "PICU 15" "per , ""PICU (Ports interrupt control),PICU 15""" ) popup "CMP" ( menuitem "Miscellaneous" "per , ""CMP (Comparator),Miscellaneous""" menuitem "CMP 0" "per , ""CMP (Comparator),CMP 0""" menuitem "CMP 1" "per , ""CMP (Comparator),CMP 1""" if (!cpuis("CY8C524*")) ( menuitem "CMP 2" "per , ""CMP (Comparator),CMP 2""" menuitem "CMP 3" "per , ""CMP (Comparator),CMP 3""" ) ) if (!cpuis("CY8C524*")) ( popup "DAC" ( menuitem "DAC 0" "per , ""DAC,DAC 0""" menuitem "DAC 1" "per , ""DAC,DAC 1""" if (!cpuis("CY8C538*")) ( menuitem "DAC 2" "per , ""DAC,DAC 2""" menuitem "DAC 3" "per , ""DAC,DAC 3""" ) ) ) menuitem "NPUMP" "per , ""NPUMP (Negative Pump Trim)""" popup "SAR" ( menuitem "SAR 0" "per , ""SAR,SAR 0""" if (cpuis("CY8C548*")) ( menuitem "SAR 1" "per , ""SAR,SAR 1""" ) ) popup "ABUF" ( menuitem "ABUF 0" "per , ""ABUF (Analog Buffer),ABUF 0""" menuitem "ABUF 1" "per , ""ABUF (Analog Buffer),ABUF 1""" menuitem "ABUF 2" "per , ""ABUF (Analog Buffer),ABUF 2""" menuitem "ABUF 3" "per , ""ABUF (Analog Buffer),ABUF 3""" ) menuitem "ILO" "per , ""ILO (Internal Low-speed Oscillator)""" menuitem "X32" "per , ""X32""" menuitem "IMO" "per , ""IMO (Internal Main Oscillator)""" menuitem "XMHZ" "per , ""XMHZ""" menuitem "MLOGIC" "per , ""MLOGIC""" menuitem "RESET" "per , ""RESET""" menuitem "SPC" "per , ""SPC (System performance controller)""" menuitem "CACHE" "per , ""CACHE""" menuitem "I2C" "per , ""I2C (I2C controller)""" menuitem "DEC" "per , ""DEC (Decimator)""" popup "TMR" ( menuitem "TMR 0" "per , ""TMR,TMR 0""" menuitem "TMR 1" "per , ""TMR,TMR 1""" menuitem "TMR 2" "per , ""TMR,TMR 2""" menuitem "TMR 3" "per , ""TMR,TMR 3""" ) popup "PRT" ( menuitem "PRT 0" "per , ""PRT (Ports interrupt control),PRT 0""" menuitem "PRT 1" "per , ""PRT (Ports interrupt control),PRT 1""" menuitem "PRT 2" "per , ""PRT (Ports interrupt control),PRT 2""" menuitem "PRT 3" "per , ""PRT (Ports interrupt control),PRT 3""" menuitem "PRT 4" "per , ""PRT (Ports interrupt control),PRT 4""" menuitem "PRT 5" "per , ""PRT (Ports interrupt control),PRT 5""" menuitem "PRT 6" "per , ""PRT (Ports interrupt control),PRT 6""" menuitem "PRT 12" "per , ""PRT (Ports interrupt control),PRT 12""" menuitem "PRT 15" "per , ""PRT (Ports interrupt control),PRT 15""" ) menuitem "EMIF" "per , ""EMIF (External memory interface control registers)""" if (!cpuis("CY8C524*")) ( popup "SC" ( menuitem "Miscellaneous" "per , ""SC (Switched Capacitor),Miscellaneous""" menuitem "SC 0" "per , ""SC (Switched Capacitor),SC 0""" menuitem "SC 1" "per , ""SC (Switched Capacitor),SC 1""" if (!cpuis("CY8C538*")) ( menuitem "SC 2" "per , ""SC (Switched Capacitor),SC 2""" menuitem "SC 3" "per , ""SC (Switched Capacitor),SC 3""" ) ) ) popup "LUT" ( menuitem "Miscellaneous" "per , ""LUT,Miscellaneous""" menuitem "LUT 0" "per , ""LUT,LUT 0""" menuitem "LUT 1" "per , ""LUT,LUT 1""" menuitem "LUT 2" "per , ""LUT,LUT 2""" menuitem "LUT 3" "per , ""LUT,LUT 3""" ) menuitem "LCDDAC" "per , ""LCDDAC""" menuitem "BG" "per , ""BG (Bandgap)""" menuitem "CAPS" "per , ""CAPS (Capsense)""" menuitem "PUMP" "per , ""PUMP (Pump Configuration)""" popup "LPF" ( menuitem "LPF 0" "per , ""LPF (Low Pass Filter Control),LPF 0""" menuitem "LPF 1" "per , ""LPF (Low Pass Filter Control),LPF 1""" ) menuitem "ANAIF" "per , ""ANAIF""" menuitem "TFAULT" "per , ""TFAULT (Timing Fault)""" if (cpuis("CY8C558*")) ( menuitem "DSM" "per , ""DSM (Delta Sigma Modulator)""" ) menuitem "BUS" "per , ""BUS (Bus)""" menuitem "DFT" "per , ""DFT""" menuitem "USB" "per , ""USB (USB controller)""" popup "B" ( menuitem "B 0" "per , ""B,B 0""" menuitem "B 1" "per , ""B,B 1""" ) menuitem "PHUB" "per , ""PHUB (PHUB configuration)""" if (cpu()!="CY8C5245") ( popup "CAN" ( menuitem "CSR" "per , ""CAN,CSR""" menuitem "TX Registers" "per , ""CAN,TX Registers""" menuitem "RX Registers" "per , ""CAN,RX Registers""" ) ) if (cpuis("CY8C55*")||cpuis("CY8C54*")) ( menuitem "DFB" "per , ""DFB (Digital filter block)""" ) popup "DSI" ( menuitem "DSI 0" "per , ""DSI,DSI 0""" menuitem "DSI 1" "per , ""DSI,DSI 1""" menuitem "DSI 2" "per , ""DSI,DSI 2""" menuitem "DSI 3" "per , ""DSI,DSI 3""" menuitem "DSI 4" "per , ""DSI,DSI 4""" menuitem "DSI 5" "per , ""DSI,DSI 5""" menuitem "DSI 6" "per , ""DSI,DSI 6""" menuitem "DSI 7" "per , ""DSI,DSI 7""" menuitem "DSI 8" "per , ""DSI,DSI 8""" menuitem "DSI 9" "per , ""DSI,DSI 9""" menuitem "DSI 12" "per , ""DSI,DSI 12""" menuitem "DSI 13" "per , ""DSI,DSI 13""" ) popup "BCTL" ( menuitem "BCTL 0" "per , ""BCTL,BCTL 0""" menuitem "BCTL 1" "per , ""BCTL,BCTL 1""" ) menuitem "IDMUX" "per , ""IDMUX""" menuitem "SFR_USER" "per , ""SFR_USER (General purpose I/Os)""" menuitem "P3BA" "per , ""P3BA""" menuitem "PANTHER" "per , ""PANTHER""" menuitem "EXTMEM" "per , ""EXTMEM (External Memory Interface)""" ) )