; --------------------------------------------------------------------------------
; @Title: ATSAMA5 Specific Menu
; @Props: Released
; @Author: RAF, DRD, ZUO, MMK, KMB, ASK, KOL
; @Changelog: 2013-03-13 RAF
;             2014-09-16 DRD
;             2015-01-19 ZUO
;             2015-12-11 MMK
;             2016-12-12 KMB
;             2017-12-29 KOL
; @Manufacturer: ATMEL - Atmel Corporation
; @Core: Cortex-A5
; @Chip: ATSAMA5D21, ATSAMA5D22, ATSAMA5D23, ATSAMA5D24, ATSAMA5D26, ATSAMA5D27,
;        ATSAMA5D28, ATSAMA5D31, ATSAMA5D33, ATSAMA5D34, ATSAMA5D35, ATSAMA5D36,
;        ATSAMA5D41, ATSAMA5D42, ATSAMA5D43, ATSAMA5D44
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menatsama5.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-A5)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-A5),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-A5),System Control and Configuration"""
menuitem "[:chip]Memory Management Unit"            "per , ""Core Registers (Cortex-A5),Memory Management Unit"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-A5),Cache Control and Configuration"""
menuitem "[:chip]L2 Preload Engine"                 "per , ""Core Registers (Cortex-A5),L2 Preload Engine"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-A5),System Performance Monitor"""
menuitem "[:chip]Debug"                             "per , ""Core Registers (Cortex-A5),Debug"""
)
separator
; menuitem "BSC"              "per , ""BSC (Boot Sequence Controller)"""
if (cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44")||cpuis("ATSAMA5D2?"))
(
menuitem "L2CC"         "per , ""L2CC (L2 Cache Controller)"""
)
menuitem "AXIMX"            "per , ""AXIMX (AXI Bus Matrix)"""
menuitem "MATRIX"           "per , ""MATRIX (Bus Matrix)"""
menuitem "SFR"              "per , ""SFR (Special Function Registers)"""
if cpuis("ATSAMA5D2?")
(
menuitem "SFRBU"        "per , ""SFRBU (Special Function Registers Backup)"""
)
menuitem "AIC"              "per , ""AIC (Advanced Interrupt Controller)"""
menuitem "WDT"              "per , ""WDT (Watchdog Timer)"""
menuitem "RSTC"             "per , ""RSTC (Reset Controller)"""
menuitem "SHDWC"            "per , ""SHDWC (Shutdown Controller)"""
if cpuis("ATSAMA5D3*")
(
menuitem "GPBR"         "per , ""GPBR (General Purpose Backup Registers)"""
)
menuitem "PIT"              "per , ""PIT (Periodic Interval Timer)"""
menuitem "RTC"              "per , ""RTC (Real-time Clock)"""
menuitem "SCKC"             "per , ""SCKC (Slow Clock Controller)"""
if (cpuis("ATSAMA5D3*"))
(
menuitem "FUSE"         "per , ""FUSE (Fuse Controller)"""
)
if cpuis("ATSAMA5D2?")
(
menuitem "RXLP"         "per , ""RXLP (Low Power Asynchronous Receiver)"""
)
if cpuis("ATSAMA5D2?")
(
menuitem "ACC"          "per , ""ACC (Analog Comparator Controller)"""
)
if (cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44")||cpuis("ATSAMA5D2?"))
(
menuitem "SFC"          "per , ""SFC (Secure Fuse Controller)"""
)
menuitem "PMC"              "per , ""PMC (Power Management Controller)"""
menuitem "PIO"              "per , ""PIO (Parallel Input/Output Controller)"""
menuitem "MPDDRC"           "per , ""MPDDRC (Multi-port DDR-SDRAM Controller)"""
menuitem "SMC"              "per , ""SMC (Static Memory Controller)"""
if (cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44"))||cpuis("ATSAMA5D2?")
(
menuitem "XDMAC"        "per , ""XDMAC (Extensible DMA Controller)"""
)
else
(
menuitem "DMAC"         "per , ""DMAC (DMA Controller)"""
)
if (cpu()=="ATSAMA5D31"||cpu()=="ATSAMA5D33"||cpu()=="ATSAMA5D34"||cpu()=="ATSAMA5D36")||(cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44")||cpuis("ATSAMA5D2?"))
(
menuitem "LCDC"         "per , ""LCDC (AHB LCD Controller)"""
)
if !cpuis("ATSAMA5D2?")||(cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44"))
(
menuitem "ISI"          "per , ""ISI (Image Sensor Interface)"""
)
menuitem "UDPHS"            "per , ""UDPHS (USB High Speed Device Port)"""
popup "UHPHS"
(
menuitem "EHCI"         "per , ""UHPHS (USB Host High Speed Port),EHCI"""
menuitem "OHCI"         "per , ""UHPHS (USB Host High Speed Port),OHCI"""
)
if (cpu()=="ATSAMA5D33"||cpu()=="ATSAMA5D34"||cpu()=="ATSAMA5D35"||cpu()=="ATSAMA5D36")
(
menuitem "GMAC"         "per , ""GMAC (Gigabit Ethernet MAC)"""
)
if cpuis("ATSAMA5D2?")||(cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44"))
(
menuitem "GMAC"         "per , ""GMAC (Ethernet MAC)"""
)
if (cpuis("ATSAMA5D31")||cpuis("ATSAMA5D35")||cpuis("ATSAMA5D36"))
(
menuitem "EMAC"         "per , ""EMAC (Ethernet MAC 10/100)"""
)
if cpuis("ATSAMA5D2?")
(
menuitem "CLASSD"       "per , ""CLASSD (Audio Class D Amplifier)"""
menuitem "I2SC"         "per , ""I2SC (Inter-IC Sound Controller)"""
)
if !cpuis("ATSAMA5D2?")
(
menuitem "HSMCI"        "per , ""HSMCI (High Speed MultiMedia Card Interface)"""
)
menuitem "SPI"              "per , ""SPI (Serial Peripheral Interface)"""
if cpuis("ATSAMA5D2?")
(
menuitem "TWIHS"        "per , ""TWIHS (Two-wire Interface)"""
)
else
(
menuitem "TWI"          "per , ""TWI (Two-wire Interface)"""
)
menuitem "SSC"              "per , ""SSC (Synchronous Serial Controller)"""
if !cpuis("ATSAMA5D2?")
(
menuitem "DBGU"         "per , ""DBGU (Debug Unit)"""
)
if cpuis("ATSAMA5D2?")
(
menuitem "FLEXCOM"      "per , ""FLEXCOM (Flexible Serial Communication Controller)"""
)
if (cpu()=="ATSAMA5D31"||cpu()=="ATSAMA5D35"||cpu()=="ATSAMA5D36")||(cpuis("ATSAMA5D41")||cpuis("ATSAMA5D42")||cpuis("ATSAMA5D43")||cpuis("ATSAMA5D44"))||cpuis("ATSAMA5D2?")
(
menuitem "UART"         "per , ""UART (Universal Asynchronous Receiver Transmitter)"""
)
if !cpuis("ATSAMA5D2?")
(
menuitem "USART"        "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter)"""
)
if cpuis("ATSAMA5D2?")
(
menuitem "QSPI"         "per , ""QSPI (Quad SPI Interface)"""
menuitem "SDMMC"        "per , ""SDMMC (Secure Digital Multimedia Card Controller)"""
menuitem "ISC"          "per , ""ISC (Image Sensor Controller)"""
)
if (cpuis("ATSAMA5D34")||cpuis("ATSAMA5D35")||cpuis("ATSAMA5D36"))
(
menuitem "CAN"          "per , ""CAN (Controller Area Network)"""
)
if (cpuis("ATSAMA5D22")||cpuis("ATSAMA5D23")||cpuis("ATSAMA5D27")||cpuis("ATSAMA5D28"))
(
menuitem "MCAN"         "per , ""MCAN (Controller Area Network)"""
)
if !cpuis("ATSAMA5D2?")
(
menuitem "SMD"          "per , ""SMD (Software Modem Device)"""
)
menuitem "TC"               "per , ""TC (Timer/Counter)"""
if cpuis("ATSAMA5D2?")
(
menuitem "PDMIC"        "per , ""PDMIC (Pulse Density Modulation Interface Controller)"""
)
menuitem "PWM"              "per , ""PWM (Pulse Width Modulation Controller)"""
menuitem "ADC"              "per , ""ADC (Analog-to-Digital Converter)"""
menuitem "TRNG"             "per , ""TRNG (True Random Number Generator)"""
menuitem "AES"              "per , ""AES (Advanced Encryption Standard)"""
menuitem "TDES"             "per , ""TDES (Triple Data Encryption Standard)"""
menuitem "SHA"              "per , ""SHA (Secure Hash Algorithm)"""
if (cpuis("ATSAMA5D4*")||cpuis("ATSAMA5D22")||cpuis("ATSAMA5D23")||cpuis("ATSAMA5D24")||cpuis("ATSAMA5D27")||cpuis("ATSAMA5D28"))
(
menuitem "AESB"         "per , ""AESB (Advanced Encryption Standard Bridge)"""
menuitem "ICM"          "per , ""ICM (Integrity Check Monitor)"""
)
if (cpuis("ATSAMA5D21")||cpuis("ATSAMA5D26"))
(
menuitem "ICM"          "per , ""ICM (Integrity Check Monitor)"""
)
)
)