; -------------------------------------------------------------------------------- ; @Title: SPINAND(Serial NAND) Flash Program script for LS1028A ; @Description: ; ; SRAM: 0x18010000 ; FlexSPI(controller) Base: 0x20c0000 ; SPINAND: MT29F4G01ABBFD (Micron, 4Gb, 4096/256) ; ; Prerequisites: ; * connect Debug Cable/Combiprobe to DUT_JTAG JTAG using LA-3770 ; ; @Keywords: ARM, Cortex-A72, LS1028A, QorIQ, FlexSPI, SPINAND, MT29F4G01 ; @Author: JIM ; @Board: X-LX1028A-RDB ; @Chip: LS1028A ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: ls1028-spinand.cmm 12049 2023-04-20 12:32:16Z bschroefel $ LOCAL &arg1 ENTRY &arg1 &arg1=STRing.UPpeR("&arg1") // for example "PREPAREONLY" &FLEXSPI_BASE=0x20c0000 ;FLEXSPI0 controller base address ; -------------------------------------------------------------------------------- ; Check prerequisites IF VERSION.BUILD.BASE()<107716. ( PRINT %ERROR "Please use more recent Software! Contact support@lauterbach.com." ENDDO ) ; -------------------------------------------------------------------------------- ; initialize and start the debugger RESet SYStem.RESet SYStem.CPU LS1028A SYStem.Option WaitDAPPWR 5.s ; poll DAP???PWRACK for 5.s SYStem.JtagClock 10MHz CORE.ASSIGN 1. Trace.DISable SYStem.Up IF !SYStem.Up() ( ; -------------------------------------------------------------------------------- ; initialize and start the debugger RESet SYStem.RESet SYStem.CPU LS1028A SYStem.Option HRCWOVerRide off SYStem.Option TRST off SYStem.Option EnReset ON SYStem.Option NoPRCRReset ON Trace.DISable SYStem.JtagClock 10MHz CORE.ASSIGN 1. ; ; temporarily override the RCW. The RCW is fetched while the boot phase and defines initial ; pinmux/serdes/qspi/nor/nand/... configurations. ; The RCW override requires to reset the SoC. Two methods are supported. ; Method 1: EnReset OFF && HRCWOVerRide ON /PORESET - do not assert the nReset line, issue a JTAG based PORESET ; Method 2: EnReset ON && HRCWOVerRide ON - assert the nReset line ; Steps - Override RCW completely ; * set EnReset & HRCWOVerRide - Method 2 only ; * switch to SYStem.Mode Prepare ; * write the RCW_SRC value HARDCODED to EDBG:0x42001080 ; * write the RCW itself to EDBG:0x42001000 onwards ; * ensure in RCW[9]/EDBG:0x42001020 the BOOT_LOC is OCRAM, PBI_LENGTH = 0x0, no Bootcore Holdoff is set ; * switch to SYStem.Up ; The following RCW is used to connect to the CPU even if the flash is empty SYStem.Option EnReset ON SYStem.Option HRCWOVerRide ON SYStem.Mode.Prepare ; override RCW_SRC = Hardcoded Data.Set EDBG:0x42001080 %Long 0x0 ; override the RCW itself - values as discovered as from LS1028A hardcoded Data.Set EDBG:0x42001080 %Long 0x0 ; RCW_SRC = HARDCODED Data.Set EDBG:0x42001000 %Long 0x34003410 Data.Set EDBG:0x42001004 %Long 0x34343434 Data.Set EDBG:0x42001008 %Long 0x34343434 Data.Set EDBG:0x4200100c %Long 0x00343434 Data.Set EDBG:0x42001010 %Long 0x00000000 Data.Set EDBG:0x42001014 %Long 0x92890000 Data.Set EDBG:0x42001018 %Long 0x0030C804 Data.Set EDBG:0x4200101c %Long 0x00000000 ; BOOTLOC = OCRAM, PBI_LENGTH = 0x0, no Bootcore Holdoff, Data.Set EDBG:0x42001020 %Long 0x00000150 Data.Set EDBG:0x42001024 %Long 0x00002580 Data.Set EDBG:0x42001028 %Long 0x00000000 Data.Set EDBG:0x4200102c %Long 0x00000000 Data.Set EDBG:0x42001030 %Long 0x00000000 Data.Set EDBG:0x42001034 %Long 0x00000400 Data.Set EDBG:0x42001038 %Long 0x00000000 Data.Set EDBG:0x4200103c %Long 0x00000060 Data.Set EDBG:0x42001040 %Long 0x00000000 Data.Set EDBG:0x42001044 %Long 0x00000000 Data.Set EDBG:0x42001048 %Long 0x00000000 Data.Set EDBG:0x4200104c %Long 0x00000000 Data.Set EDBG:0x42001050 %Long 0x00000000 Data.Set EDBG:0x42001054 %Long 0x00000000 Data.Set EDBG:0x42001058 %Long 0x00000000 Data.Set EDBG:0x4200105c %Long 0x00000000 Data.Set EDBG:0x42001060 %Long 0x00000000 Data.Set EDBG:0x42001064 %Long 0x00000000 Data.Set EDBG:0x42001068 %Long 0x00026000 Data.Set EDBG:0x4200106c %Long 0x00000000 Data.Set EDBG:0x42001070 %Long 0x00000000 Data.Set EDBG:0x42001074 %Long 0x00000000 Data.Set EDBG:0x42001078 %Long 0x00000000 Data.Set EDBG:0x4200107c %Long 0x00000000 ; SYStem.Up ) Register.Set M 0x5 ;EL1h GOSUB FLEXSPIconfig GOSUB READ_ID_TEST LOCAL &pdd &pdd=OS.PresentDemoDirectory() FLASHFILE.RESet //FLASHFILE.CONFIG FLASHFILE.CONFIG &FLEXSPI_BASE 0x10000000 //the is larger than 2 pages+stack_size if dualport program //FLASHFILE.TARGET FLASHFILE.TARGET 0x18010000++0x1FFF EAXI:0x18012000++0x2FFF &pdd/flash/byte/spinand4k8_flexspi.bin /KEEP /DualPort /STACKSIZE 0x300 FLASHFILE.GETID //End of the test prepareonly IF "&arg1"=="PREPAREONLY" ENDDO FLASHFILE.DUMP 0x0 //Unlock FLASH ;FLASHFILE.UNLOCK 0x0--0xFFFFFF //Erase FLASH ;FLASHFILE.ERASE 0x0--0xFFFFF //Write ;FLASHFILE.LOAD * 0x0 ;FLASHFILE.LOAD * 0x0 /ComPare ;verify ENDDO ; -------------------------------------------------------------------------------- FLEXSPIconfig: ( //unlock Data.Set A:&FLEXSPI_BASE+0x018 %LE %Long 0x5AF05AF0 Data.Set A:&FLEXSPI_BASE+0x01C %LE %Long 2 //controller init Data.Set A:&FLEXSPI_BASE+0x000 %LE %Long 0xFFFF8000 Data.Set A:&FLEXSPI_BASE+0x004 %LE %Long 0xFFFFFFFF Data.Set A:&FLEXSPI_BASE+0x008 %LE %Long 0x200001F7 Data.Set A:&FLEXSPI_BASE+0x00C %LE %Long 0x58 Data.Set A:&FLEXSPI_BASE+0x020 %LE %Long 0x80000000 Data.Set A:&FLEXSPI_BASE+0x024 %LE %Long 0x80000000 Data.Set A:&FLEXSPI_BASE+0x028 %LE %Long 0x80000000 Data.Set A:&FLEXSPI_BASE+0x060 %LE %Long 0x00200000 Data.Set A:&FLEXSPI_BASE+0x060 %LE %Long 0x40000 ; 0x40000 * 0x400(KB unit size) = 2Gb Flash_A0 size reserved Data.Set A:&FLEXSPI_BASE+0x064 %LE %Long 0x40000 ; 0x40000 * 0x400(KB unit size) = 2Gb Flash_A1 size. Data.Set A:&FLEXSPI_BASE+0x068 %LE %Long 0x40000 Data.Set A:&FLEXSPI_BASE+0x06C %LE %Long 0x40000 //timing Data.Set A:&FLEXSPI_BASE+0x070 %LE %Long 0x00000063 Data.Set A:&FLEXSPI_BASE+0x074 %LE %Long 0x00000063 Data.Set A:&FLEXSPI_BASE+0x078 %LE %Long 0x00000063 Data.Set A:&FLEXSPI_BASE+0x07C %LE %Long 0x00000063 Data.Set A:&FLEXSPI_BASE+0x080 %LE %Long 0x00000900 Data.Set A:&FLEXSPI_BASE+0x084 %LE %Long 0x00000900 Data.Set A:&FLEXSPI_BASE+0x088 %LE %Long 0x00000900 Data.Set A:&FLEXSPI_BASE+0x08C %LE %Long 0x00000900 Data.Set A:&FLEXSPI_BASE+0x0B8 %LE %Long 0x100|0x1 ; water marker level 64.*8 , reset assert 0x1 Data.Set A:&FLEXSPI_BASE+0x0BC %LE %Long 0x100|0x1 ; water marker level 64.*8 , reset assert 0x1 Data.Set A:&FLEXSPI_BASE+0x0C0 %LE %Long 0x0100 Data.Set A:&FLEXSPI_BASE+0x0C4 %LE %Long 0x0100 //LUT0 for read the spi memory data to the AHB //FAST READ Quad I/O ; Data.Set A:&FLEXSPI_BASE+0x200 %LE %Long 0x0A1804EB ; Data.Set A:&FLEXSPI_BASE+0x204 %LE %Long 0x26043206 ; Data.Set A:&FLEXSPI_BASE+0x208 %LE %Long 0x00 ; Data.Set A:&FLEXSPI_BASE+0x20C %LE %Long 0x00 //Normal Read Mode ; Data.Set A:&FLEXSPI_BASE+0x200 %LE %Long 0x08180403 ; Data.Set A:&FLEXSPI_BASE+0x204 %LE %Long 0x00002404 ; Data.Set A:&FLEXSPI_BASE+0x208 %LE %Long 0x00 ; Data.Set A:&FLEXSPI_BASE+0x20C %LE %Long 0x00 //AHB update automatically even though the window size is < 1KB Data.Set A:&FLEXSPI_BASE+0x00C %LE %Long Data.Long(A:&FLEXSPI_BASE+0x00C)&~0x20 RETURN ) READ_ID_TEST: ( PRINT "READ_ID_TEST..." Data.Set ASD:&FLEXSPI_BASE+0x80 %LE %Long 0x80000900 ;FLASHCR2 Data.Set ASD:&FLEXSPI_BASE+0x14 %LE %Long -1 ;INTR clear ;Data.Set A:&FLEXSPI_BASE+0xB8 %Long 0x1 ;IPRXFCR ;Data.Set A:&FLEXSPI_BASE+0xBC %Long 0x1 ;IPTXFCR Data.Set A:&FLEXSPI_BASE+0x250 %LE %Long 0x2404049F ;readid with 4 bytes READ data Data.Set A:&FLEXSPI_BASE+0x254 %LE %Long 0x0 ; Data.Set A:&FLEXSPI_BASE+0x258 %LE %Long 0x0 ; Data.Set A:&FLEXSPI_BASE+0x25c %LE %Long 0x0 ; Data.Set A:&FLEXSPI_BASE+0x0A0 %LE %Long 0x10000000 ;SFAR, XSPI_CS1 Data.Set A:&FLEXSPI_BASE+0x0A4 %LE %Long (5.<<16.)|0x4 Data.Set A:&FLEXSPI_BASE+0x0B0 %LE %Long 1 ;start PRINT "1st 0x" Data.Long(A:&FLEXSPI_BASE+0x100)&0xFF " (Manufacturer)" PRINT "2nd 0x" (Data.Long(A:&FLEXSPI_BASE+0x100)>>8.)&0xFF " (Device ID)" PRINT "3rd 0x" (Data.Long(A:&FLEXSPI_BASE+0x100)>>16.)&0xFF PRINT "4th 0x" Data.Long(A:&FLEXSPI_BASE+0x100)>>24. RETURN )