; -------------------------------------------------------------------------------- ; @Title: RA6M2 On-Chip Peripherals ; @Props: Released ; @Author: NEJ ; @Changelog: 2022-05-19 NEJ ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: SVD generated (SVD2PER 1.8.0), based on: R7FA2A1AB.svd (Ver. 1.2) ; @Core: Cortex-M4F ; @Chip: R7FA6M2AD2CLK, R7FA6M2AD3CFB, R7FA6M2AD3CFP, R7FA6M2AD3CLK, ; R7FA6M2AF2CLK, R7FA6M2AF3CFB, R7FA6M2AF3CFP, R7FA6M2AF3CLK ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perra6m2.per 14816 2022-05-20 10:12:08Z kwisniewski $ tree.close "Core Registers (Cortex-M4F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes" bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes" textline " " bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes" group.long 0x10++0x0B line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x08 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending" bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x07 line.long 0x00 "HFSR,Hard Fault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted" bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" width 10. tree "Feature Registers" rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM4F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" textline " " bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" textline " " bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" textline " " bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x07 line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." textline " " bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." textline " " bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x07 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline "" line.long 0x04 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region" hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" textline " " rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count Register" line.long 0x08 "DWT_CPICNT,CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end autoindent.on center tree tree "ACMPHS (High-Speed Analog Comparator)" repeat 6. (list 0. 1. 2. 3. 4. 5.) (list ad:0x40085000 ad:0x40085100 ad:0x40085200 ad:0x40085300 ad:0x40085400 ad:0x40085500) tree "ACMPHS$1" base $2 group.byte 0x00++0x00 line.byte 0x00 "CMPCTL,Comparator Control Register" bitfld.byte 0x00 7. "HCMPON,Comparator operation control" "0: Operation stopped (the comparator outputs a..,1: Operation enabled (input to the comparator.." bitfld.byte 0x00 5.--6. "CDFS,Noise filter selection" "0: Noise filter not used,1: Noise filter sampling frequency is 2^3/PCLKB,2: Noise filter sampling frequency is 2^4/PCLKB,3: Noise filter sampling frequency is 2^5/PCLKB" newline bitfld.byte 0x00 3.--4. "CEG,Selection of valid edge (Edge selector)" "0: No edge selection,1: Rising edge selection,2: Falling edge selection,3: Both-edge selection" bitfld.byte 0x00 2. "CSTEN,Interrupt Select" "0: Output via the Edge selector,1: Direct output" newline bitfld.byte 0x00 1. "COE,Comparator output enable" "0: Comparator output disabled (the output signal..,1: Comparator output enabled" bitfld.byte 0x00 0. "CINV,Comparator output polarity selection" "0: Comparator output not inverted,1: Comparator output inverted" group.byte 0x04++0x00 line.byte 0x00 "CMPSEL0,Comparator Input Select Register" bitfld.byte 0x00 0.--3. "CMPSEL,Comparator input selection" "0: No input,1: IVCMP0 selected,2: IVCMP1 selected,?,4: IVCMP2 selected,?,?,?,8: IVCMP3 selected,?..." group.byte 0x08++0x00 line.byte 0x00 "CMPSEL1,Comparator Reference Voltage Select Register" bitfld.byte 0x00 0.--3. "CRVS,Reference voltage selection" "0: No reference voltage,1: IVREF0 selected,2: IVREF1 selected,?,4: IVREF2 selected,?,?,?,8: IVREF3 selected,?..." rgroup.byte 0x0C++0x00 line.byte 0x00 "CMPMON,Comparator Output Monitor Register" bitfld.byte 0x00 0. "CMPMON,Comparator output monitor" "0: Comparator output Low,1: Comparator output High" group.byte 0x10++0x00 line.byte 0x00 "CPIOC,Comparator Output Control Register" bitfld.byte 0x00 7. "VREFEN,Internal Vref enable" "0: Internal Vref disable,1: Internal Vref enable" bitfld.byte 0x00 0. "CPOE,Comparator output selection" "0: VCOUT pin output of the comparator is..,1: VCOUT pin output of the comparator is enabled" tree.end repeat.end tree.end tree "ADC (12-bit A/D Converter)" tree "ADC0" base ad:0x4005C000 group.word 0x00++0x01 line.word 0x00 "ADCSR,A/D Control Register" bitfld.word 0x00 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process,1: Starts A/D conversion process" bitfld.word 0x00 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,2: Continuous scan mode,3: Setting prohibited" newline bitfld.word 0x00 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.." bitfld.word 0x00 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.." newline bitfld.word 0x00 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection" bitfld.word 0x00 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables S12GBADI0 interrupt generation upon..,1: Enables S12GBADI0 interrupt generation upon.." newline bitfld.word 0x00 0.--4. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x04++0x01 line.word 0x00 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x00 7. "ANSA07,AN007 Select" "0: AN007 is not subjected to conversion,1: AN007 is subjected to conversion" bitfld.word 0x00 6. "ANSA06,AN006 Select" "0: AN006 is not subjected to conversion,1: AN006 is subjected to conversion" newline bitfld.word 0x00 5. "ANSA05,AN005 Select" "0: AN005 is not subjected to conversion,1: AN005 is subjected to conversion" bitfld.word 0x00 4. "ANSA04,AN004 Select" "0: AN004 is not subjected to conversion,1: AN004 is subjected to conversion" newline bitfld.word 0x00 3. "ANSA03,AN003 Select" "0: AN003 is not subjected to conversion,1: AN003 is subjected to conversion" bitfld.word 0x00 2. "ANSA02,AN002 Select" "0: AN002 is not subjected to conversion,1: AN002 is subjected to conversion" newline bitfld.word 0x00 1. "ANSA01,AN001 Select" "0: AN001 is not subjected to conversion,1: AN001 is subjected to conversion" bitfld.word 0x00 0. "ANSA00,AN000 Select" "0: AN000 is not subjected to conversion,1: AN000 is subjected to conversion" group.word 0x06++0x01 line.word 0x00 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x00 4. "ANSA20,AN020 Select" "0: AN020 is not subjected to conversion,1: AN020 is subjected to conversion" bitfld.word 0x00 3. "ANSA19,AN019 Select" "0: AN019 is not subjected to conversion,1: AN019 is subjected to conversion" newline bitfld.word 0x00 2. "ANSA18,AN018 Select" "0: AN018 is not subjected to conversion,1: AN018 is subjected to conversion" bitfld.word 0x00 1. "ANSA17,AN017 Select" "0: AN017 is not subjected to conversion,1: AN017 is subjected to conversion" newline bitfld.word 0x00 0. "ANSA16,AN016 Select" "0: AN016 is not subjected to conversion,1: AN016 is subjected to conversion" group.word 0x08++0x01 line.word 0x00 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x00 7. "ADS07,A/D-Converted Value Addition/Average Channel AN007 Select" "0: AN007 is not selected,1: AN007 is selected" bitfld.word 0x00 6. "ADS06,A/D-Converted Value Addition/Average Channel AN006 Select" "0: AN006 is not selected,1: AN006 is selected" newline bitfld.word 0x00 5. "ADS05,A/D-Converted Value Addition/Average Channel AN005 Select" "0: AN005 is not selected,1: AN005 is selected" bitfld.word 0x00 4. "ADS04,A/D-Converted Value Addition/Average Channel AN004 Select" "0: AN004 is not selected,1: AN004 is selected" newline bitfld.word 0x00 3. "ADS03,A/D-Converted Value Addition/Average Channel AN003 Select" "0: AN003 is not selected,1: AN003 is selected" bitfld.word 0x00 2. "ADS02,A/D-Converted Value Addition/Average Channel AN002 Select" "0: AN002 is not selected,1: AN002 is selected" newline bitfld.word 0x00 1. "ADS01,A/D-Converted Value Addition/Average Channel AN001 Select" "0: AN001 is not selected,1: AN001 is selected" bitfld.word 0x00 0. "ADS00,A/D-Converted Value Addition/Average Channel AN000 Select" "0: AN000 is not selected,1: AN000 is selected" group.word 0x0A++0x01 line.word 0x00 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x00 4. "ADS20,A/D-Converted Value Addition/Average Channel AN020 Select" "0: AN020 is not selected,1: AN020 is selected" bitfld.word 0x00 3. "ADS19,A/D-Converted Value Addition/Average Channel AN019 Select" "0: AN019 is not selected,1: AN019 is selected" newline bitfld.word 0x00 2. "ADS18,A/D-Converted Value Addition/Average Channel AN018 Select" "0: AN018 is not selected,1: AN018 is selected" bitfld.word 0x00 1. "ADS17,A/D-Converted Value Addition/Average Channel AN017 Select" "0: AN017 is not selected,1: AN017 is selected" newline bitfld.word 0x00 0. "ADS16,A/D-Converted Value Addition/Average Channel AN016 Select" "0: AN016 is not selected,1: AN016 is selected" group.byte 0x0C++0x00 line.byte 0x00 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x00 7. "AVEE,Average mode enable bit.Note: The AVEE bit converts twice and only when converting it four times is effective" "0: Disabled,1: Enabled" bitfld.byte 0x00 0.--2. "ADC,Addition frequency selection bit.NOTE: AVEE bit is valid at the only setting of ADC[2:0] bits = 001b or 011b" "0: 1-time conversion (no addition same as normal..,1: 2-time conversion (addition once),2: 3-time conversion (addition twice),3: 4-time conversion (addition three times),?,5: 16-time conversion (addition 15 times) can be..,?..." group.word 0x0E++0x01 line.word 0x00 "ADCER,A/D Control Extended Register" bitfld.word 0x00 15. "ADRFMT,A/D Data Register Format Select" "0: Flush-right is selected for the A/D data..,1: Flush-left is selected for the A/D data.." bitfld.word 0x00 11. "DIAGM,Self-Diagnosis Enable" "0: Disables self-diagnosis of ADC12,1: Enables self-diagnosis of ADC12" newline bitfld.word 0x00 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage" bitfld.word 0x00 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: When the self-diagnosis fixation mode is..,1: The self-diagnosis by using the voltage of 0V,2: The self-diagnosis by using the voltage of..,3: The self-diagnosis by using the voltage of.." newline bitfld.word 0x00 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disables automatic clearing,1: Enables automatic clearing" bitfld.word 0x00 1.--2. "ADPRC,A/D Conversion Accuracy Specify" "0: A/D conversion is performed with 12-bit..,1: A/D conversion is performed with 10-bit..,2: A/D conversion is performed with 8-bit accuracy,3: Setting prohibited" group.word 0x10++0x01 line.word 0x00 "ADSTRGR,A/D Conversion Start Trigger Select Register" bitfld.word 0x00 8.--13. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.word 0x12++0x01 line.word 0x00 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x00 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: The internal reference voltage is not selected,1: The internal reference voltage is selected.." bitfld.word 0x00 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: The temperature sensor output is not selected,1: The temperature sensor output is not selected.." newline bitfld.word 0x00 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: The internal reference voltage is not selected,1: The internal reference voltage is selected.." bitfld.word 0x00 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: The temperature sensor output is not selected,1: The temperature sensor output is selected" newline bitfld.word 0x00 1. "OCSAD,Internal Reference Voltage A/D converted Value Addition/Average Mode Select" "0: Internal reference voltage A/D-converted..,1: Internal reference voltage A/D-converted.." bitfld.word 0x00 0. "TSSAD,Temperature Sensor Output A/D converted Value Addition/Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.." group.word 0x14++0x01 line.word 0x00 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x00 7. "ANSB07,AN007 Select" "0: AN007 is not subjected to conversion,1: AN007 is subjected to conversion" bitfld.word 0x00 6. "ANSB06,AN006 Select" "0: AN006 is not subjected to conversion,1: AN006 is subjected to conversion" newline bitfld.word 0x00 5. "ANSB05,AN005 Select" "0: AN005 is not subjected to conversion,1: AN005 is subjected to conversion" bitfld.word 0x00 4. "ANSB04,AN004 Select" "0: AN004 is not subjected to conversion,1: AN004 is subjected to conversion" newline bitfld.word 0x00 3. "ANSB03,AN003 Select" "0: AN003 is not subjected to conversion,1: AN003 is subjected to conversion" bitfld.word 0x00 2. "ANSB02,AN002 Select" "0: AN002 is not subjected to conversion,1: AN002 is subjected to conversion" newline bitfld.word 0x00 1. "ANSB01,AN001 Select" "0: AN001 is not subjected to conversion,1: AN001 is subjected to conversion" bitfld.word 0x00 0. "ANSB00,AN000 Select" "0: AN000 is not subjected to conversion,1: AN000 is subjected to conversion" group.word 0x16++0x01 line.word 0x00 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x00 4. "ANSB20,AN020 Select" "0: AN020 is not subjected to conversion,1: AN020 is subjected to conversion" bitfld.word 0x00 3. "ANSB19,AN019 Select" "0: AN019 is not subjected to conversion,1: AN019 is subjected to conversion" newline bitfld.word 0x00 2. "ANSB18,AN018 Select" "0: AN018 is not subjected to conversion,1: AN018 is subjected to conversion" bitfld.word 0x00 1. "ANSB17,AN017 Select" "0: AN017 is not subjected to conversion,1: AN017 is subjected to conversion" newline bitfld.word 0x00 0. "ANSB16,AN016 Select" "0: AN016 is not subjected to conversion,1: AN016 is subjected to conversion" rgroup.word 0x18++0x01 line.word 0x00 "ADDBLDR,A/D Data Duplication Register" hexmask.word 0x00 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode" rgroup.word 0x1A++0x01 line.word 0x00 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x00 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output" rgroup.word 0x1C++0x01 line.word 0x00 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x00 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage" rgroup.word 0x1E++0x01 line.word 0x00 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x00 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has never been executed since..,1: Self-diagnosis using the voltage of 0 V has..,2: Self-diagnosis using the voltage of reference..,3: Self-diagnosis using the voltage of reference.." hexmask.word 0x00 0.--11. 1. "AD,A/D-converted value (right-justified)NOTE: Unused bits in the AD bit field are fixed 0" repeat 13. (strings "0" "1" "2" "3" "4" "5" "6" "7" "" "" "" "" "" )(list 0x0 0x2 0x4 0x6 0x8 0xA 0xC 0xE 0x20 0x22 0x24 0x26 0x28 ) rgroup.word ($2+0x20)++0x01 line.word 0x00 "ADDR$1,A/D Data Register" hexmask.word 0x00 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion" repeat.end group.word 0x66++0x01 line.word 0x00 "ADSHCR,A/D Sample and Hold Circuit Control Register" bitfld.word 0x00 10. "SHANS2,AN002 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit,1: Use the sample-and-hold circuit" bitfld.word 0x00 9. "SHANS1,AN001 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit,1: Use the sample-and-hold circuit" newline bitfld.word 0x00 8. "SHANS0,AN000 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit,1: Use the sample-and-hold circuit" hexmask.word.byte 0x00 0.--7. 1. "SSTSH,Channel-Dedicated Sample-and-Hold Circuit Sampling Time Setting Set the sampling time (4 to 255 states)" group.byte 0x7A++0x00 line.byte 0x00 "ADDISCR,A/D Disconnection Detection Control Register" bitfld.byte 0x00 4. "CHARGE,Selection of Precharge or Discharge" "0: Discharge,1: Precharge" bitfld.byte 0x00 0.--3. "ADNDIS,The charging time" "0: Disconnection detection is disabled,1: Setting prohibited,?..." group.byte 0x7C++0x00 line.byte 0x00 "ADSHMSR,A/D Sample and Hold Operation Mode Select Register" bitfld.byte 0x00 0. "SHMD,Channel-Dedicated Sample-and-Hold Circuit Operation Mode Select" "0: Sampling by channel-dedicated sample-and-hold..,1: Sampling by channel-dedicated sample-and-hold.." group.word 0x80++0x01 line.word 0x00 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x00 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit" "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously.." bitfld.word 0x00 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after.." newline bitfld.word 0x00 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode)" "0: Operation is without group A priority control,1: Operation is with group A priority control" rgroup.word 0x84++0x01 line.word 0x00 "ADDBLDRA,A/D Data Duplication Register A" hexmask.word 0x00 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode" rgroup.word 0x86++0x01 line.word 0x00 "ADDBLDRB,A/D Data Duplication Register B" hexmask.word 0x00 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode" rgroup.byte 0x8C++0x00 line.byte 0x00 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register" bitfld.byte 0x00 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met,1: Window B comparison conditions are met" bitfld.byte 0x00 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met,1: Window A comparison conditions are met" newline bitfld.byte 0x00 0. "MONCOMB,Combination result monitorThis bit indicates the combination result.This bit is valid when both window A operation and window B operation are enabled" "0: Window A / window B composite conditions are..,1: Window A / window B composite conditions are.." group.word 0x90++0x01 line.word 0x00 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x00 15. "CMPAIE,Compare A Interrupt Enable" "0: S12ADCMPAIi interrupt is disabled when..,1: S12ADCMPAIi interrupt is enabled when.." bitfld.word 0x00 14. "WCMPE,Window Function Setting" "0: Window function is disabled,1: Window function is enabled" newline bitfld.word 0x00 13. "CMPBIE,Compare B Interrupt Enable" "0: S12ADCMPBIi interrupt is disabled when..,1: S12ADCMPBIi interrupt is enabled when.." bitfld.word 0x00 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled,1: Compare window A operation is enabled" newline bitfld.word 0x00 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled,1: Compare window B operation is enabled" bitfld.word 0x00 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)" "0: S12ADWMELC is output when window A comparison..,1: S12ADWMELC is output when window A comparison..,2: S12ADWMELC is output when window A comparison..,3: Setting prohibited" group.byte 0x92++0x00 line.byte 0x00 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" bitfld.byte 0x00 1. "CMPOCA,Internal reference voltage Compare selection bit" "0: Excludes the internal reference voltage from..,1: Includes the internal reference voltage in.." bitfld.byte 0x00 0. "CMPTSA,Temperature sensor output Compare selection bit" "0: Excludes the temperature sensor output from..,1: Includes the temperature sensor output in the.." group.byte 0x93++0x00 line.byte 0x00 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register" bitfld.byte 0x00 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.." bitfld.byte 0x00 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.." group.word 0x94++0x01 line.word 0x00 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x00 7. "CMPCHA07,Compare Window A Channel AN007 Select" "0: Disable compare function for AN007,1: Enable compare function for AN007" bitfld.word 0x00 6. "CMPCHA06,Compare Window A Channel AN006 Select" "0: Disable compare function for AN006,1: Enable compare function for AN006" newline bitfld.word 0x00 5. "CMPCHA05,Compare Window A Channel AN005 Select" "0: Disable compare function for AN005,1: Enable compare function for AN005" bitfld.word 0x00 4. "CMPCHA04,Compare Window A Channel AN004 Select" "0: Disable compare function for AN004,1: Enable compare function for AN004" newline bitfld.word 0x00 3. "CMPCHA03,Compare Window A Channel AN003 Select" "0: Disable compare function for AN003,1: Enable compare function for AN003" bitfld.word 0x00 2. "CMPCHA02,Compare Window A Channel AN002 Select" "0: Disable compare function for AN002,1: Enable compare function for AN002" newline bitfld.word 0x00 1. "CMPCHA01,Compare Window A Channel AN001 Select" "0: Disable compare function for AN001,1: Enable compare function for AN001" bitfld.word 0x00 0. "CMPCHA00,Compare Window A Channel AN000 Select" "0: Disable compare function for AN000,1: Enable compare function for AN000" group.word 0x96++0x01 line.word 0x00 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x00 4. "CMPCHA20,AN020 Select" "0: Excludes AN020 from the compare window A..,1: Includes AN020 from the compare window A.." bitfld.word 0x00 3. "CMPCHA19,AN019 Select" "0: Excludes AN019 from the compare window A..,1: Includes AN019 from the compare window A.." newline bitfld.word 0x00 2. "CMPCHA18,AN018 Select" "0: Excludes AN018 from the compare window A..,1: Includes AN018 from the compare window A.." bitfld.word 0x00 1. "CMPCHA17,AN017 Select" "0: Excludes AN017 from the compare window A..,1: Includes AN017 from the compare window A.." newline bitfld.word 0x00 0. "CMPCHA16,AN016 Select" "0: Excludes AN016 from the compare window A..,1: Includes AN016 from the compare window A.." group.word 0x98++0x01 line.word 0x00 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x00 7. "CMPLCHA07,Comparison condition of AN007" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 6. "CMPLCHA06,Comparison condition of AN006" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 5. "CMPLCHA05,Comparison condition of AN005" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 4. "CMPLCHA04,Comparison condition of AN004" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 3. "CMPLCHA03,Comparison condition of AN003" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 2. "CMPLCHA02,Comparison condition of AN002" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 1. "CMPLCHA01,Comparison condition of AN001" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 0. "CMPLCHA00,Comparison condition of AN000" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." group.word 0x9A++0x01 line.word 0x00 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1" bitfld.word 0x00 4. "CMPLCHA20,Comparison condition of AN020" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 3. "CMPLCHA19,Comparison condition of AN019" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 2. "CMPLCHA18,Comparison condition of AN018" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 1. "CMPLCHA17,Comparison condition of AN017" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 0. "CMPLCHA16,Comparison condition of AN016" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." group.word 0x9C++0x01 line.word 0x00 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used" group.word 0x9E++0x01 line.word 0x00 "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used" group.word 0xA0++0x01 line.word 0x00 "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0" bitfld.word 0x00 7. "CMPSTCHA07,Compare window A flag of AN007" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 6. "CMPSTCHA06,Compare window A flag of AN006" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 5. "CMPSTCHA05,Compare window A flag of AN005" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 4. "CMPSTCHA04,Compare window A flag of AN004" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 3. "CMPSTCHA03,Compare window A flag of AN003" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 2. "CMPSTCHA02,Compare window A flag of AN002" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 1. "CMPSTCHA01,Compare window A flag of AN001" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 0. "CMPSTCHA00,Compare window A flag of AN000" "0: Comparison conditions are not met,1: Comparison conditions are met" group.word 0xA2++0x01 line.word 0x00 "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1" bitfld.word 0x00 4. "CMPSTCHA20,Compare window A flag of AN020" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 3. "CMPSTCHA19,Compare window A flag of AN019" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 2. "CMPSTCHA18,Compare window A flag of AN018" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 1. "CMPSTCHA17,Compare window A flag of AN017" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 0. "CMPSTCHA16,Compare window A flag of AN016" "0: Comparison conditions are not met,1: Comparison conditions are met" group.byte 0xA4++0x00 line.byte 0x00 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register" bitfld.byte 0x00 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.byte 0x00 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result" "0: Comparison conditions are not met,1: Comparison conditions are met" group.byte 0xA6++0x00 line.byte 0x00 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register" bitfld.byte 0x00 7. "CMPLB,Compare window B Compare condition setting bit" "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.." bitfld.byte 0x00 0.--5. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected" "0: AN000,1: AN001,2: AN002,3: AN003,4: AN004,5: AN005,6: AN006,7: AN007,?,?,?,?,?,?,?,?,16: AN016,17: AN017,18: AN018,19: AN019,20: AN020,?,?,?,?,?,?,?,?,?,?,?,32: Temperature sensor,33: Internal reference voltage,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: No channel is selected" group.word 0xA8++0x01 line.word 0x00 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B" group.word 0xAA++0x01 line.word 0x00 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B" group.byte 0xAC++0x00 line.byte 0x00 "ADCMPBSR,A/D Compare Function Window B Status Register" bitfld.byte 0x00 0. "CMPSTB,Compare window B flag.It is a status flag that shows the comparative result of CH (AN000-AN007 AN016-AN020 temperature sensor and internal reference voltage) made the object of window B relation condition" "0: Comparison conditions are not met,1: Comparison conditions are met" group.byte 0xDD++0x00 line.byte 0x00 "ADSSTRL,A/D Sampling State Register L" hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (AN016-AN020)" group.byte 0xDE++0x00 line.byte 0x00 "ADSSTRT,A/D Sampling State Register T" hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (temperature sensor output)" group.byte 0xDF++0x00 line.byte 0x00 "ADSSTRO,A/D Sampling State Register O" hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)" repeat 8. (strings "00" "01" "02" "03" "04" "05" "06" "07" )(list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 ) group.byte ($2+0xE0)++0x00 line.byte 0x00 "ADSSTR$1,A/D Sampling State Register" hexmask.byte 0x00 0.--7. 1. "SST,Sampling time setting" repeat.end group.word 0x1A0++0x01 line.word 0x00 "ADPGACR,A/D Programmable Gain Amplifier Control Register" bitfld.word 0x00 11. "P002GEN,PGA P002 gain setting and enable bit" "0: The gain setting is invalidated (AIN is not..,1: The gain setting is effectively done (AIN is.." bitfld.word 0x00 10. "P002ENAMP,Amplifier enable bit for PGA P002" "0: The amplifier in PGA is not used,1: The amplifier in PGA is used" newline bitfld.word 0x00 9. "P002SEL1,The amplifier passing is enable for PGA P002" "0: By way of the amplifier in PGA,1: Note 1 that by way of amplifier in PGA" bitfld.word 0x00 8. "P002SEL0,A through amplifier is enable for PGA P002" "0: Not through the PGA in amplifier,1: I will through in the PGA amplifier" newline bitfld.word 0x00 7. "P001GEN,PGA P001 gain setting and enable bit" "0: The gain setting is invalidated (AIN is not..,1: The gain setting is effectively done (AIN is.." bitfld.word 0x00 6. "P001ENAMP,Amplifier enable bit for PGA P001" "0: The amplifier in PGA is not used,1: The amplifier in PGA is used" newline bitfld.word 0x00 5. "P001SEL1,The amplifier passing is enable for PGA P001" "0: By way of the amplifier in PGA,1: Note 1 that by way of amplifier in PGA" bitfld.word 0x00 4. "P001SEL0,A through amplifier is enable for PGA P001" "0: Not through the PGA in amplifier,1: I will through in the PGA amplifier" newline bitfld.word 0x00 3. "P000GEN,PGA P000 gain setting and enable bit" "0: The gain setting is invalidated (AIN is not..,1: The gain setting is effectively done (AIN is.." bitfld.word 0x00 2. "P000ENAMP,Amplifier enable bit for PGA P000" "0: The amplifier in PGA is not used,1: The amplifier in PGA is used" newline bitfld.word 0x00 1. "P000SEL1,The amplifier passing is enable for PGA P000" "0: By way of the amplifier in PGA,1: Note 1 that by way of amplifier in PGA" bitfld.word 0x00 0. "P000SEL0,A through amplifier is enable for PGA P000" "0: Not through the PGA in amplifier,1: I will through in the PGA amplifier" group.word 0x1A2++0x01 line.word 0x00 "ADPGAGS0,A/D Programmable Gain Amplifier Gain Setting Register 0" bitfld.word 0x00 8.--11. "P002GAIN,PGA P002 gain setting bit.The gain magnification of (ADPGSDCR0.P002GEN=0b) when the shingle end is input and each PGA P002 is set" "0: x 2.000 (ADPGADDCR0.P002DEN=0),1: x 2.500 (ADPGADDCR0.P002DEN=0) / x 1.500..,2: x 2.667 (ADPGADDCR0.P002DEN=0),3: x 2.857 (ADPGADDCR0.P002DEN=0),4: x 3.077 (ADPGADDCR0.P002DEN=0),5: x 3.333 (ADPGADDCR0.P002DEN=0) / x 2.333..,6: x 3.636 (ADPGADDCR0.P002DEN=0),7: x 4.000 (ADPGADDCR0.P002DEN=0),8: x 4.444 (ADPGADDCR0.P002DEN=0),9: x 5.000 (ADPGADDCR0.P002DEN=0) / x 4.00..,10: x 5.714 (ADPGADDCR0.P002DEN=0),11: x 6.667 (ADPGADDCR0.P002DEN=0) / x 5.667..,12: x 8.000 (ADPGADDCR0.P002DEN=0),13: x 10.000 (ADPGADDCR0.P002DEN=0),14: x 13.333 (ADPGADDCR0.P002DEN=0),15: x 1.000 (for offset measurement).." bitfld.word 0x00 4.--7. "P001GAIN,PGA P001 gain setting bit.The gain magnification of (ADPGSDCR0.P001GEN=0b) when the shingle end is input and each PGA P001 is set" "0: x 2.000 (ADPGADDCR0.P001DEN=0),1: x 2.500 (ADPGADDCR0.P001DEN=0) / x 1.500..,2: x 2.667 (ADPGADDCR0.P001DEN=0),3: x 2.857 (ADPGADDCR0.P001DEN=0),4: x 3.077 (ADPGADDCR0.P001DEN=0),5: x 3.333 (ADPGADDCR0.P001DEN=0) / x 2.333..,6: x 3.636 (ADPGADDCR0.P001DEN=0),7: x 4.000 (ADPGADDCR0.P001DEN=0),8: x 4.444 (ADPGADDCR0.P001DEN=0),9: x 5.000 (ADPGADDCR0.P001DEN=0) / x 4.00..,10: x 5.714 (ADPGADDCR0.P001DEN=0),11: x 6.667 (ADPGADDCR0.P001DEN=0) / x 5.667..,12: x 8.000 (ADPGADDCR0.P001DEN=0),13: x 10.000 (ADPGADDCR0.P001DEN=0),14: x 13.333 (ADPGADDCR0.P001DEN=0),15: x 1.000 (for offset measurement).." newline bitfld.word 0x00 0.--3. "P000GAIN,PGA P000 gain setting bit.The gain magnification of (ADPGSDCR0.P000GEN=0b) when the shingle end is input and each PGA P000 is set" "0: x 2.000 (ADPGADDCR0.P000DEN=0),1: x 2.500 (ADPGADDCR0.P000DEN=0) / x 1.500..,2: x 2.667 (ADPGADDCR0.P000DEN=0),3: x 2.857 (ADPGADDCR0.P000DEN=0),4: x 3.077 (ADPGADDCR0.P000DEN=0),5: x 3.333 (ADPGADDCR0.P000DEN=0) / x 2.333..,6: x 3.636 (ADPGADDCR0.P000DEN=0),7: x 4.000 (ADPGADDCR0.P000DEN=0),8: x 4.444 (ADPGADDCR0.P000DEN=0),9: x 5.000 (ADPGADDCR0.P000DEN=0) / x 4.00..,10: x 5.714 (ADPGADDCR0.P000DEN=0),11: x 6.667 (ADPGADDCR0.P000DEN=0) / x 5.667..,12: x 8.000 (ADPGADDCR0.P000DEN=0),13: x 10.000 (ADPGADDCR0.P000DEN=0),14: x 13.333 (ADPGADDCR0.P000DEN=0),15: x 1.000 (for offset measurement).." group.word 0x1B0++0x01 line.word 0x00 "ADPGADCR0,A/D Programmable Gain Amplifier Differential Input Control Register" bitfld.word 0x00 12.--13. "P003DG,P003 Differential Input Gain SettingNOTE: When these bits are used set {P003DEN P003GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" bitfld.word 0x00 11. "P002DEN,P002 Differential Input Enable" "0: Differential input is disabled,1: Differential input is enabled" newline bitfld.word 0x00 8.--9. "P002DG,P002 Differential Input Gain SettingNOTE: When these bits are used set {P002DEN P002GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" bitfld.word 0x00 7. "P001DEN,P001 Differential Input Enable" "0: Differential input is disabled,1: Differential input is enabled" newline bitfld.word 0x00 4.--5. "P001DG,P001 Differential Input Gain SettingNOTE: When these bits are used set {P001DEN P001GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" bitfld.word 0x00 3. "P000DEN,P000 Differential Input Enable" "0: Differential input is disabled,1: Differential input is enabled" newline bitfld.word 0x00 0.--1. "P000DG,P000 Differential Input Gain SettingNOTE: When these bits are used set {P000DEN P000GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" tree.end tree "ADC1" base ad:0x4005C200 group.word 0x00++0x01 line.word 0x00 "ADCSR,A/D Control Register" bitfld.word 0x00 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process,1: Starts A/D conversion process" bitfld.word 0x00 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,2: Continuous scan mode,3: Setting prohibited" newline bitfld.word 0x00 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.." bitfld.word 0x00 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.." newline bitfld.word 0x00 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection" bitfld.word 0x00 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables S12GBADI1 interrupt generation upon..,1: Enables S12GBADI1 interrupt generation upon.." newline bitfld.word 0x00 0.--4. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x04++0x01 line.word 0x00 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x00 7. "ANSA07,AN107 Select" "0: AN107 is not subjected to conversion,1: AN107 is subjected to conversion" bitfld.word 0x00 6. "ANSA06,AN106 Select" "0: AN106 is not subjected to conversion,1: AN106 is subjected to conversion" newline bitfld.word 0x00 5. "ANSA05,AN105 Select" "0: AN105 is not subjected to conversion,1: AN105 is subjected to conversion" bitfld.word 0x00 3. "ANSA03,AN103 Select" "0: AN103 is not subjected to conversion,1: AN103 is subjected to conversion" newline bitfld.word 0x00 2. "ANSA02,AN102 Select" "0: AN102 is not subjected to conversion,1: AN102 is subjected to conversion" bitfld.word 0x00 1. "ANSA01,AN101 Select" "0: AN101 is not subjected to conversion,1: AN101 is subjected to conversion" newline bitfld.word 0x00 0. "ANSA00,AN100 Select" "0: AN100 is not subjected to conversion,1: AN100 is subjected to conversion" group.word 0x06++0x01 line.word 0x00 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x00 3. "ANSA19,AN119 Select" "0: AN119 is not subjected to conversion,1: AN119 is subjected to conversion" bitfld.word 0x00 2. "ANSA18,AN118 Select" "0: AN118 is not subjected to conversion,1: AN118 is subjected to conversion" newline bitfld.word 0x00 1. "ANSA17,AN117 Select" "0: AN117 is not subjected to conversion,1: AN117 is subjected to conversion" bitfld.word 0x00 0. "ANSA16,AN116 Select" "0: AN116 is not subjected to conversion,1: AN116 is subjected to conversion" group.word 0x08++0x01 line.word 0x00 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x00 7. "ADS07,A/D-Converted Value Addition/Average Channel AN107 Select" "0: AN107 is not selected,1: AN107 is selected" bitfld.word 0x00 6. "ADS06,A/D-Converted Value Addition/Average Channel AN106 Select" "0: AN106 is not selected,1: AN106 is selected" newline bitfld.word 0x00 5. "ADS05,A/D-Converted Value Addition/Average Channel AN105 Select" "0: AN105 is not selected,1: AN105 is selected" bitfld.word 0x00 3. "ADS03,A/D-Converted Value Addition/Average Channel AN103 Select" "0: AN103 is not selected,1: AN103 is selected" newline bitfld.word 0x00 2. "ADS02,A/D-Converted Value Addition/Average Channel AN102 Select" "0: AN102 is not selected,1: AN102 is selected" bitfld.word 0x00 1. "ADS01,A/D-Converted Value Addition/Average Channel AN101 Select" "0: AN101 is not selected,1: AN101 is selected" newline bitfld.word 0x00 0. "ADS00,A/D-Converted Value Addition/Average Channel AN100 Select" "0: AN100 is not selected,1: AN100 is selected" group.word 0x0A++0x01 line.word 0x00 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x00 3. "ADS19,A/D-Converted Value Addition/Average Channel AN119 Select" "0: AN119 is not selected,1: AN119 is selected" bitfld.word 0x00 2. "ADS18,A/D-Converted Value Addition/Average Channel AN118 Select" "0: AN118 is not selected,1: AN118 is selected" newline bitfld.word 0x00 1. "ADS17,A/D-Converted Value Addition/Average Channel AN117 Select" "0: AN117 is not selected,1: AN117 is selected" bitfld.word 0x00 0. "ADS16,A/D-Converted Value Addition/Average Channel AN116 Select" "0: AN116 is not selected,1: AN116 is selected" group.byte 0x0C++0x00 line.byte 0x00 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x00 7. "AVEE,Average mode enable bit.Note: The AVEE bit converts twice and only when converting it four times is effective" "0: Disabled,1: Enabled" bitfld.byte 0x00 0.--2. "ADC,Addition frequency selection bit.NOTE: AVEE bit is valid at the only setting of ADC[2:0] bits = 001b or 011b" "0: 1-time conversion (no addition same as normal..,1: 2-time conversion (addition once),2: 3-time conversion (addition twice),3: 4-time conversion (addition three times),?,5: 16-time conversion (addition 15 times) can be..,?..." group.word 0x0E++0x01 line.word 0x00 "ADCER,A/D Control Extended Register" bitfld.word 0x00 15. "ADRFMT,A/D Data Register Format Select" "0: Flush-right is selected for the A/D data..,1: Flush-left is selected for the A/D data.." bitfld.word 0x00 11. "DIAGM,Self-Diagnosis Enable" "0: Disables self-diagnosis of ADC12,1: Enables self-diagnosis of ADC12" newline bitfld.word 0x00 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage" bitfld.word 0x00 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: When the self-diagnosis fixation mode is..,1: The self-diagnosis by using the voltage of 0V,2: The self-diagnosis by using the voltage of..,3: The self-diagnosis by using the voltage of.." newline bitfld.word 0x00 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disables automatic clearing,1: Enables automatic clearing" bitfld.word 0x00 1.--2. "ADPRC,A/D Conversion Accuracy Specify" "0: A/D conversion is performed with 12-bit..,1: A/D conversion is performed with 10-bit..,2: A/D conversion is performed with 8-bit accuracy,3: Setting prohibited" group.word 0x10++0x01 line.word 0x00 "ADSTRGR,A/D Conversion Start Trigger Select Register" bitfld.word 0x00 8.--13. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.word 0x12++0x01 line.word 0x00 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x00 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: The internal reference voltage is not selected,1: The internal reference voltage is selected.." bitfld.word 0x00 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: The temperature sensor output is not selected,1: The temperature sensor output is not selected.." newline bitfld.word 0x00 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: The internal reference voltage is not selected,1: The internal reference voltage is selected.." bitfld.word 0x00 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: The temperature sensor output is not selected,1: The temperature sensor output is selected" newline bitfld.word 0x00 1. "OCSAD,Internal Reference Voltage A/D converted Value Addition/Average Mode Select" "0: Internal reference voltage A/D-converted..,1: Internal reference voltage A/D-converted.." bitfld.word 0x00 0. "TSSAD,Temperature Sensor Output A/D converted Value Addition/Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.." group.word 0x14++0x01 line.word 0x00 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x00 7. "ANSB07,AN107 Select" "0: AN107 is not subjected to conversion,1: AN107 is subjected to conversion" bitfld.word 0x00 6. "ANSB06,AN106 Select" "0: AN106 is not subjected to conversion,1: AN106 is subjected to conversion" newline bitfld.word 0x00 5. "ANSB05,AN105 Select" "0: AN105 is not subjected to conversion,1: AN105 is subjected to conversion" bitfld.word 0x00 3. "ANSB03,AN103 Select" "0: AN103 is not subjected to conversion,1: AN103 is subjected to conversion" newline bitfld.word 0x00 2. "ANSB02,AN102 Select" "0: AN102 is not subjected to conversion,1: AN102 is subjected to conversion" bitfld.word 0x00 1. "ANSB01,AN101 Select" "0: AN101 is not subjected to conversion,1: AN101 is subjected to conversion" newline bitfld.word 0x00 0. "ANSB00,AN100 Select" "0: AN100 is not subjected to conversion,1: AN100 is subjected to conversion" group.word 0x16++0x01 line.word 0x00 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x00 3. "ANSB19,AN119 Select" "0: AN119 is not subjected to conversion,1: AN119 is subjected to conversion" bitfld.word 0x00 2. "ANSB18,AN118 Select" "0: AN118 is not subjected to conversion,1: AN118 is subjected to conversion" newline bitfld.word 0x00 1. "ANSB17,AN117 Select" "0: AN117 is not subjected to conversion,1: AN117 is subjected to conversion" bitfld.word 0x00 0. "ANSB16,AN116 Select" "0: AN116 is not subjected to conversion,1: AN116 is subjected to conversion" rgroup.word 0x18++0x01 line.word 0x00 "ADDBLDR,A/D Data Duplication Register" hexmask.word 0x00 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode" rgroup.word 0x1A++0x01 line.word 0x00 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x00 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output" rgroup.word 0x1C++0x01 line.word 0x00 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x00 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage" rgroup.word 0x1E++0x01 line.word 0x00 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x00 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has never been executed since..,1: Self-diagnosis using the voltage of 0 V has..,2: Self-diagnosis using the voltage of reference..,3: Self-diagnosis using the voltage of reference.." hexmask.word 0x00 0.--11. 1. "AD,A/D-converted value (right-justified)NOTE: Unused bits in the AD bit field are fixed 0" repeat 11. (strings "0" "1" "2" "3" "" "" "" "" "" "" "" )(list 0x0 0x2 0x4 0x6 0xA 0xC 0xE 0x20 0x22 0x24 0x26 ) rgroup.word ($2+0x20)++0x01 line.word 0x00 "ADDR$1,A/D Data Register" hexmask.word 0x00 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion" repeat.end group.word 0x66++0x01 line.word 0x00 "ADSHCR,A/D Sample and Hold Circuit Control Register" bitfld.word 0x00 10. "SHANS2,AN102 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit,1: Use the sample-and-hold circuit" bitfld.word 0x00 9. "SHANS1,AN101 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit,1: Use the sample-and-hold circuit" newline bitfld.word 0x00 8. "SHANS0,AN100 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit,1: Use the sample-and-hold circuit" hexmask.word.byte 0x00 0.--7. 1. "SSTSH,Channel-Dedicated Sample-and-Hold Circuit Sampling Time Setting Set the sampling time (4 to 255 states)" group.byte 0x7A++0x00 line.byte 0x00 "ADDISCR,A/D Disconnection Detection Control Register" bitfld.byte 0x00 4. "CHARGE,Selection of Precharge or Discharge" "0: Discharge,1: Precharge" bitfld.byte 0x00 0.--3. "ADNDIS,The charging time" "0: Disconnection detection is disabled,1: Setting prohibited,?..." group.byte 0x7C++0x00 line.byte 0x00 "ADSHMSR,A/D Sample and Hold Operation Mode Select Register" bitfld.byte 0x00 0. "SHMD,Channel-Dedicated Sample-and-Hold Circuit Operation Mode Select" "0: Sampling by channel-dedicated sample-and-hold..,1: Sampling by channel-dedicated sample-and-hold.." group.word 0x80++0x01 line.word 0x00 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x00 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit" "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously.." bitfld.word 0x00 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after.." newline bitfld.word 0x00 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode)" "0: Operation is without group A priority control,1: Operation is with group A priority control" rgroup.word 0x84++0x01 line.word 0x00 "ADDBLDRA,A/D Data Duplication Register A" hexmask.word 0x00 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode" rgroup.word 0x86++0x01 line.word 0x00 "ADDBLDRB,A/D Data Duplication Register B" hexmask.word 0x00 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode" rgroup.byte 0x8C++0x00 line.byte 0x00 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register" bitfld.byte 0x00 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met,1: Window B comparison conditions are met" bitfld.byte 0x00 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met,1: Window A comparison conditions are met" newline bitfld.byte 0x00 0. "MONCOMB,Combination result monitorThis bit indicates the combination result.This bit is valid when both window A operation and window B operation are enabled" "0: Window A / window B composite conditions are..,1: Window A / window B composite conditions are.." group.word 0x90++0x01 line.word 0x00 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x00 15. "CMPAIE,Compare A Interrupt Enable" "0: S12ADCMPAIi interrupt is disabled when..,1: S12ADCMPAIi interrupt is enabled when.." bitfld.word 0x00 14. "WCMPE,Window Function Setting" "0: Window function is disabled,1: Window function is enabled" newline bitfld.word 0x00 13. "CMPBIE,Compare B Interrupt Enable" "0: S12ADCMPBIi interrupt is disabled when..,1: S12ADCMPBIi interrupt is enabled when.." bitfld.word 0x00 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled,1: Compare window A operation is enabled" newline bitfld.word 0x00 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled,1: Compare window B operation is enabled" bitfld.word 0x00 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)" "0: S12ADWMELC is output when window A comparison..,1: S12ADWMELC is output when window A comparison..,2: S12ADWMELC is output when window A comparison..,3: Setting prohibited" group.byte 0x92++0x00 line.byte 0x00 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" bitfld.byte 0x00 1. "CMPOCA,Internal reference voltage Compare selection bit" "0: Excludes the internal reference voltage from..,1: Includes the internal reference voltage in.." bitfld.byte 0x00 0. "CMPTSA,Temperature sensor output Compare selection bit" "0: Excludes the temperature sensor output from..,1: Includes the temperature sensor output in the.." group.byte 0x93++0x00 line.byte 0x00 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register" bitfld.byte 0x00 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.." bitfld.byte 0x00 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.." group.word 0x94++0x01 line.word 0x00 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x00 5. "CMPCHA05,Compare Window A Channel AN105 Select" "0: Disable compare function for AN105,1: Enable compare function for AN105" bitfld.word 0x00 3. "CMPCHA03,Compare Window A Channel AN103 Select" "0: Disable compare function for AN103,1: Enable compare function for AN103" newline bitfld.word 0x00 2. "CMPCHA02,Compare Window A Channel AN102 Select" "0: Disable compare function for AN102,1: Enable compare function for AN102" bitfld.word 0x00 1. "CMPCHA01,Compare Window A Channel AN101 Select" "0: Disable compare function for AN101,1: Enable compare function for AN101" newline bitfld.word 0x00 0. "CMPCHA00,Compare Window A Channel AN100 Select" "0: Disable compare function for AN100,1: Enable compare function for AN100" group.word 0x96++0x01 line.word 0x00 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x00 4. "CMPCHA20,AN120 Select" "0: Excludes AN120 from the compare window A..,1: Includes AN120 from the compare window A.." bitfld.word 0x00 3. "CMPCHA19,AN119 Select" "0: Excludes AN119 from the compare window A..,1: Includes AN119 from the compare window A.." newline bitfld.word 0x00 2. "CMPCHA18,AN118 Select" "0: Excludes AN118 from the compare window A..,1: Includes AN118 from the compare window A.." bitfld.word 0x00 1. "CMPCHA17,AN117 Select" "0: Excludes AN117 from the compare window A..,1: Includes AN117 from the compare window A.." newline bitfld.word 0x00 0. "CMPCHA16,AN116 Select" "0: Excludes AN116 from the compare window A..,1: Includes AN116 from the compare window A.." group.word 0x98++0x01 line.word 0x00 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x00 7. "CMPLCHA07,Comparison condition of AN107" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 6. "CMPLCHA06,Comparison condition of AN106" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 5. "CMPLCHA05,Comparison condition of AN105" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 3. "CMPLCHA03,Comparison condition of AN103" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 2. "CMPLCHA02,Comparison condition of AN102" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 1. "CMPLCHA01,Comparison condition of AN101" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 0. "CMPLCHA00,Comparison condition of AN100" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." group.word 0x9A++0x01 line.word 0x00 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1" bitfld.word 0x00 3. "CMPLCHA19,Comparison condition of AN119" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 2. "CMPLCHA18,Comparison condition of AN118" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x00 1. "CMPLCHA17,Comparison condition of AN117" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x00 0. "CMPLCHA16,Comparison condition of AN116" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." group.word 0x9C++0x01 line.word 0x00 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used" group.word 0x9E++0x01 line.word 0x00 "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used" group.word 0xA0++0x01 line.word 0x00 "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0" bitfld.word 0x00 7. "CMPSTCHA07,Compare window A flag of AN007" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 6. "CMPSTCHA06,Compare window A flag of AN006" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 5. "CMPSTCHA05,Compare window A flag of AN005" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 3. "CMPSTCHA03,Compare window A flag of AN003" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 2. "CMPSTCHA02,Compare window A flag of AN002" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 1. "CMPSTCHA01,Compare window A flag of AN001" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 0. "CMPSTCHA00,Compare window A flag of AN000" "0: Comparison conditions are not met,1: Comparison conditions are met" group.word 0xA2++0x01 line.word 0x00 "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1" bitfld.word 0x00 3. "CMPSTCHA19,Compare window A flag of AN019" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 2. "CMPSTCHA18,Compare window A flag of AN018" "0: Comparison conditions are not met,1: Comparison conditions are met" newline bitfld.word 0x00 1. "CMPSTCHA17,Compare window A flag of AN017" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.word 0x00 0. "CMPSTCHA16,Compare window A flag of AN016" "0: Comparison conditions are not met,1: Comparison conditions are met" group.byte 0xA4++0x00 line.byte 0x00 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register" bitfld.byte 0x00 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result" "0: Comparison conditions are not met,1: Comparison conditions are met" bitfld.byte 0x00 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result" "0: Comparison conditions are not met,1: Comparison conditions are met" group.byte 0xA6++0x00 line.byte 0x00 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register" bitfld.byte 0x00 7. "CMPLB,Compare window B Compare condition setting bit" "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.." bitfld.byte 0x00 0.--5. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected" "0: AN100,1: AN101,2: AN102,3: AN103,?,5: AN105,6: AN106,7: AN107,?,?,?,?,?,?,?,?,16: AN116,17: AN117,18: AN118,19: AN119,?,?,?,?,?,?,?,?,?,?,?,?,32: Temperature sensor,33: Internal reference voltage,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,63: No channel is selected" group.word 0xA8++0x01 line.word 0x00 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B" group.word 0xAA++0x01 line.word 0x00 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register" hexmask.word 0x00 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B" group.byte 0xAC++0x00 line.byte 0x00 "ADCMPBSR,A/D Compare Function Window B Status Register" bitfld.byte 0x00 0. "CMPSTB,Compare window B flag.It is a status flag that shows the comparative result of CH (AN100-AN103 AN105-AN107 AN116-AN119 temperature sensor and internal reference voltage) made the object of window B relation condition" "0: Comparison conditions are not met,1: Comparison conditions are met" group.byte 0xDD++0x00 line.byte 0x00 "ADSSTRL,A/D Sampling State Register L" hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (AN116-AN119)" group.byte 0xDE++0x00 line.byte 0x00 "ADSSTRT,A/D Sampling State Register T" hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (temperature sensor output)" group.byte 0xDF++0x00 line.byte 0x00 "ADSSTRO,A/D Sampling State Register O" hexmask.byte 0x00 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)" repeat 7. (strings "00" "01" "02" "03" "0" "0" "0" )(list 0x0 0x1 0x2 0x3 0x5 0x6 0x7 ) group.byte ($2+0xE0)++0x00 line.byte 0x00 "ADSSTR$1,A/D Sampling State Register" hexmask.byte 0x00 0.--7. 1. "SST,Sampling time setting" repeat.end group.word 0x1A0++0x01 line.word 0x00 "ADPGACR,A/D Programmable Gain Amplifier Control Register" bitfld.word 0x00 11. "P002GEN,PGA P002 gain setting and enable bit" "0: The gain setting is invalidated (AIN is not..,1: The gain setting is effectively done (AIN is.." bitfld.word 0x00 10. "P002ENAMP,Amplifier enable bit for PGA P002" "0: The amplifier in PGA is not used,1: The amplifier in PGA is used" newline bitfld.word 0x00 9. "P002SEL1,The amplifier passing is enable for PGA P002" "0: By way of the amplifier in PGA,1: Note 1 that by way of amplifier in PGA" bitfld.word 0x00 8. "P002SEL0,A through amplifier is enable for PGA P002" "0: Not through the PGA in amplifier,1: I will through in the PGA amplifier" newline bitfld.word 0x00 7. "P001GEN,PGA P001 gain setting and enable bit" "0: The gain setting is invalidated (AIN is not..,1: The gain setting is effectively done (AIN is.." bitfld.word 0x00 6. "P001ENAMP,Amplifier enable bit for PGA P001" "0: The amplifier in PGA is not used,1: The amplifier in PGA is used" newline bitfld.word 0x00 5. "P001SEL1,The amplifier passing is enable for PGA P001" "0: By way of the amplifier in PGA,1: Note 1 that by way of amplifier in PGA" bitfld.word 0x00 4. "P001SEL0,A through amplifier is enable for PGA P001" "0: Not through the PGA in amplifier,1: I will through in the PGA amplifier" newline bitfld.word 0x00 3. "P000GEN,PGA P000 gain setting and enable bit" "0: The gain setting is invalidated (AIN is not..,1: The gain setting is effectively done (AIN is.." bitfld.word 0x00 2. "P000ENAMP,Amplifier enable bit for PGA P000" "0: The amplifier in PGA is not used,1: The amplifier in PGA is used" newline bitfld.word 0x00 1. "P000SEL1,The amplifier passing is enable for PGA P000" "0: By way of the amplifier in PGA,1: Note 1 that by way of amplifier in PGA" bitfld.word 0x00 0. "P000SEL0,A through amplifier is enable for PGA P000" "0: Not through the PGA in amplifier,1: I will through in the PGA amplifier" group.word 0x1A2++0x01 line.word 0x00 "ADPGAGS0,A/D Programmable Gain Amplifier Gain Setting Register 0" bitfld.word 0x00 8.--11. "P002GAIN,PGA P002 gain setting bit.The gain magnification of (ADPGSDCR0.P002GEN=0b) when the shingle end is input and each PGA P002 is set" "0: x 2.000 (ADPGADDCR0.P002DEN=0),1: x 2.500 (ADPGADDCR0.P002DEN=0) / x 1.500..,2: x 2.667 (ADPGADDCR0.P002DEN=0),3: x 2.857 (ADPGADDCR0.P002DEN=0),4: x 3.077 (ADPGADDCR0.P002DEN=0),5: x 3.333 (ADPGADDCR0.P002DEN=0) / x 2.333..,6: x 3.636 (ADPGADDCR0.P002DEN=0),7: x 4.000 (ADPGADDCR0.P002DEN=0),8: x 4.444 (ADPGADDCR0.P002DEN=0),9: x 5.000 (ADPGADDCR0.P002DEN=0) / x 4.00..,10: x 5.714 (ADPGADDCR0.P002DEN=0),11: x 6.667 (ADPGADDCR0.P002DEN=0) / x 5.667..,12: x 8.000 (ADPGADDCR0.P002DEN=0),13: x 10.000 (ADPGADDCR0.P002DEN=0),14: x 13.333 (ADPGADDCR0.P002DEN=0),15: x 1.000 (for offset measurement).." bitfld.word 0x00 4.--7. "P001GAIN,PGA P001 gain setting bit.The gain magnification of (ADPGSDCR0.P001GEN=0b) when the shingle end is input and each PGA P001 is set" "0: x 2.000 (ADPGADDCR0.P001DEN=0),1: x 2.500 (ADPGADDCR0.P001DEN=0) / x 1.500..,2: x 2.667 (ADPGADDCR0.P001DEN=0),3: x 2.857 (ADPGADDCR0.P001DEN=0),4: x 3.077 (ADPGADDCR0.P001DEN=0),5: x 3.333 (ADPGADDCR0.P001DEN=0) / x 2.333..,6: x 3.636 (ADPGADDCR0.P001DEN=0),7: x 4.000 (ADPGADDCR0.P001DEN=0),8: x 4.444 (ADPGADDCR0.P001DEN=0),9: x 5.000 (ADPGADDCR0.P001DEN=0) / x 4.00..,10: x 5.714 (ADPGADDCR0.P001DEN=0),11: x 6.667 (ADPGADDCR0.P001DEN=0) / x 5.667..,12: x 8.000 (ADPGADDCR0.P001DEN=0),13: x 10.000 (ADPGADDCR0.P001DEN=0),14: x 13.333 (ADPGADDCR0.P001DEN=0),15: x 1.000 (for offset measurement).." newline bitfld.word 0x00 0.--3. "P000GAIN,PGA P000 gain setting bit.The gain magnification of (ADPGSDCR0.P000GEN=0b) when the shingle end is input and each PGA P000 is set" "0: x 2.000 (ADPGADDCR0.P000DEN=0),1: x 2.500 (ADPGADDCR0.P000DEN=0) / x 1.500..,2: x 2.667 (ADPGADDCR0.P000DEN=0),3: x 2.857 (ADPGADDCR0.P000DEN=0),4: x 3.077 (ADPGADDCR0.P000DEN=0),5: x 3.333 (ADPGADDCR0.P000DEN=0) / x 2.333..,6: x 3.636 (ADPGADDCR0.P000DEN=0),7: x 4.000 (ADPGADDCR0.P000DEN=0),8: x 4.444 (ADPGADDCR0.P000DEN=0),9: x 5.000 (ADPGADDCR0.P000DEN=0) / x 4.00..,10: x 5.714 (ADPGADDCR0.P000DEN=0),11: x 6.667 (ADPGADDCR0.P000DEN=0) / x 5.667..,12: x 8.000 (ADPGADDCR0.P000DEN=0),13: x 10.000 (ADPGADDCR0.P000DEN=0),14: x 13.333 (ADPGADDCR0.P000DEN=0),15: x 1.000 (for offset measurement).." group.word 0x1B0++0x01 line.word 0x00 "ADPGADCR0,A/D Programmable Gain Amplifier Differential Input Control Register" bitfld.word 0x00 12.--13. "P003DG,P003 Differential Input Gain SettingNOTE: When these bits are used set {P003DEN P003GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" bitfld.word 0x00 11. "P002DEN,P002 Differential Input Enable" "0: Differential input is disabled,1: Differential input is enabled" newline bitfld.word 0x00 8.--9. "P002DG,P002 Differential Input Gain SettingNOTE: When these bits are used set {P002DEN P002GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" bitfld.word 0x00 7. "P001DEN,P001 Differential Input Enable" "0: Differential input is disabled,1: Differential input is enabled" newline bitfld.word 0x00 4.--5. "P001DG,P001 Differential Input Gain SettingNOTE: When these bits are used set {P001DEN P001GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" bitfld.word 0x00 3. "P000DEN,P000 Differential Input Enable" "0: Differential input is disabled,1: Differential input is enabled" newline bitfld.word 0x00 0.--1. "P000DG,P000 Differential Input Gain SettingNOTE: When these bits are used set {P000DEN P000GEN} to 11b" "0: x 1.5,1: x 2.333,2: x 4.0,3: x 5.667" tree.end tree.end tree "AGT (Asynchronous General Purpose Timer)" repeat 2. (list 0. 1.) (list ad:0x40084000 ad:0x40084100) tree "AGT$1" base $2 group.word 0x00++0x01 line.word 0x00 "AGT,AGT Counter Register" hexmask.word 0x00 0.--15. 1. "AGT,16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register the 16-bit counter is forcibly stopped and set to FFFFH" group.word 0x02++0x01 line.word 0x00 "AGTCMA,AGT Compare Match A Register" hexmask.word 0x00 0.--15. 1. "AGTCMA,AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register set to FFFFH" group.word 0x04++0x01 line.word 0x00 "AGTCMB,AGT Compare Match B Register" hexmask.word 0x00 0.--15. 1. "AGTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register set to FFFFH" group.byte 0x08++0x00 line.byte 0x00 "AGTCR,AGT Control Register" bitfld.byte 0x00 7. "TCMBF,AGT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x00 6. "TCMAF,AGT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x00 5. "TUNDF,AGT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x00 4. "TEDGF,Active edge judgement flag" "0: No active edge received,1: Active edge received" newline bitfld.byte 0x00 2. "TSTOP,AGT count forced stop" "0: no effect,1: The count is forcibly stopped" rbitfld.byte 0x00 1. "TCSTF,AGT count status flag" "0: Count stops,1: Count starts" newline bitfld.byte 0x00 0. "TSTART,AGT count start" "0: Count stops,1: Count starts" group.byte 0x09++0x00 line.byte 0x00 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x00 4.--6. "TCK,AGT count source select" "0: PCLKB,1: PCLKB/8,?,3: PCLKB/2,4: Divided clock LOCO specified by AGTMR2.CKS bit,5: Underflow event signal from AGT,6: Divided clock fSUB specified by AGTMR2.CKS bit,?..." bitfld.byte 0x00 3. "TEDGPL,AGTIO edge polarity select" "0: One edge,1: Both edges" newline bitfld.byte 0x00 0.--2. "TMOD,AGT operating mode select" "0: Timer mode,1: Pulse output mode,2: Event counter mode,3: Pulse width measurement mode,4: Pulse period measurement mode,?..." group.byte 0x0A++0x00 line.byte 0x00 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x00 7. "LPM,AGT Low Power Mode" "0: Normal mode,1: Low Power mode" bitfld.byte 0x00 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 000,1: 001,2: 010,3: 011,4: 1/16,5: 1/32,6: 1/64,7: 1/128" group.byte 0x0C++0x00 line.byte 0x00 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x00 6.--7. "TIOGT,AGTIO count control" "0: Event is always counted,1: Event is counted during polarity period..,?..." bitfld.byte 0x00 4.--5. "TIPF,AGTIO input filter select" "0: No filter,1: Filter sampled at PCLKB,2: Filter sampled at PCLKB/8,3: Filter sampled at PCLKB/32" newline bitfld.byte 0x00 2. "TOE,AGTO output enable" "0: AGTO output disabled (port),1: AGTO output enabled" bitfld.byte 0x00 0. "TEDGSEL,I/O polarity switchFunction varies depending on the operating mode" "0,1" group.byte 0x0D++0x00 line.byte 0x00 "AGTISR,AGT Event Pin Select Register" bitfld.byte 0x00 2. "EEPS,AGTEE polarty selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level.." group.byte 0x0E++0x00 line.byte 0x00 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x00 6. "TOPOLB,AGTOB polarity select" "0: AGTOB Output is started at low,1: AGTOB Output is started at high" bitfld.byte 0x00 5. "TOEB,AGTOB output enable" "0: AGTOB output disabled (port),1: AGTOB output enabled" newline bitfld.byte 0x00 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" bitfld.byte 0x00 2. "TOPOLA,AGTOA polarity select" "0: AGTOA Output is started at low,1: AGTOA Output is started at high" newline bitfld.byte 0x00 1. "TOEA,AGTOA output enable" "0: AGTOA output disabled (port),1: AGTOA output enabled" bitfld.byte 0x00 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" group.byte 0x0F++0x00 line.byte 0x00 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x00 4. "TIES,AGTIO input enable" "0: external event input disable during software..,1: external event input enable during software.." bitfld.byte 0x00 0.--1. "SEL,AGTIO pin select" "0: AGTIO_A can not be used as AGTIO input pin in..,1: Setting prohibited,2: AGTIO_B can be used as AGTIO input pin in..,3: AGTIO_C can be used as AGTIO input pin in.." tree.end repeat.end tree.end tree "AMI (ADC-DAC Interface)" base ad:0x4005F000 group.byte 0xC0++0x00 line.byte 0x00 "DAADUSR,D/A A/D Synchronous Unit Select Register" bitfld.byte 0x00 1. "AMADSEL1,A/D Unit 1 Select" "0: Unit 1 is not selected,1: Unit 1 is selected" tree.end tree "BUS (BUS Control)" base ad:0x40003000 group.word 0x802++0x01 line.word 0x00 "CS0CR,CS0 Control Register" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x812++0x01 line.word 0x00 "CSCR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x822++0x01 line.word 0x00 "CS1CR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x832++0x01 line.word 0x00 "CS2CR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x842++0x01 line.word 0x00 "CS3CR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x852++0x01 line.word 0x00 "CS4CR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x862++0x01 line.word 0x00 "CS5CR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x872++0x01 line.word 0x00 "CS6CR,CS" bitfld.word 0x00 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." bitfld.word 0x00 8. "EMODE,Endian Mode" "0: Little Endian,1: Big Endian" newline bitfld.word 0x00 4.--5. "BSIZE,External Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.word 0x00 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" group.word 0x80A++0x01 line.word 0x00 "CS0REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x81A++0x01 line.word 0x00 "CS1REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x82A++0x01 line.word 0x00 "CS2REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x83A++0x01 line.word 0x00 "CS3REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x84A++0x01 line.word 0x00 "CS4REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x85A++0x01 line.word 0x00 "CS5REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x86A++0x01 line.word 0x00 "CS6REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x87A++0x01 line.word 0x00 "CS7REC,CS" bitfld.word 0x00 8.--11. "WRCV,Write Recovery" "0: No recovery cycle is inserted,?..." bitfld.word 0x00 0.--3. "RRCV,Read Recovery" "0: No recovery cycle is inserted,?..." group.word 0x880++0x01 line.word 0x00 "CSRECEN,CS Recovery Cycle Insertion Enable Register" bitfld.word 0x00 15. "RCVENM7,Multiplexed Bus Recovery Cycle Insertion Enable 7" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 14. "RCVENM6,Multiplexed Bus Recovery Cycle Insertion Enable 6" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 13. "RCVENM5,Multiplexed Bus Recovery Cycle Insertion Enable 5" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 12. "RCVENM4,Multiplexed Bus Recovery Cycle Insertion Enable 4" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 11. "RCVENM3,Multiplexed Bus Recovery Cycle Insertion Enable 3" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 10. "RCVENM2,Multiplexed Bus Recovery Cycle Insertion Enable 2" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 9. "RCVENM1,Multiplexed Bus Recovery Cycle Insertion Enable 1" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 8. "RCVENM0,Multiplexed Bus Recovery Cycle Insertion Enable 0" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 7. "RCVEN7,Separate Bus Recovery Cycle Insertion Enable 7" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 6. "RCVEN6,Separate Bus Recovery Cycle Insertion Enable 6" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 5. "RCVEN5,Separate Bus Recovery Cycle Insertion Enable 5" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 4. "RCVEN4,Separate Bus Recovery Cycle Insertion Enable 4" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 3. "RCVEN3,Separate Bus Recovery Cycle Insertion Enable 3" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 2. "RCVEN2,Separate Bus Recovery Cycle Insertion Enable 2" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" newline bitfld.word 0x00 1. "RCVEN1,Separate Bus Recovery Cycle Insertion Enable 1" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" bitfld.word 0x00 0. "RCVEN0,Separate Bus Recovery Cycle Insertion Enable 0" "0: Recovery cycle insertion is disabled,1: Recovery cycle insertion is enabled" group.word 0x02++0x01 line.word 0x00 "CS0MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x12++0x01 line.word 0x00 "CS1MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x22++0x01 line.word 0x00 "CS2MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x32++0x01 line.word 0x00 "CS3MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x42++0x01 line.word 0x00 "CS4MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x52++0x01 line.word 0x00 "CS5MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x62++0x01 line.word 0x00 "CS6MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.word 0x72++0x01 line.word 0x00 "CS7MOD,CS" bitfld.word 0x00 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" bitfld.word 0x00 9. "PWENB,Page Write Access Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 8. "PRENB,Page Read Access Enable" "0: Disable,1: Enable" bitfld.word 0x00 3. "EWENB,External Wait Enable" "0: Disable,1: Enable" newline bitfld.word 0x00 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" group.long 0x04++0x03 line.long 0x00 "CS0WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x14++0x03 line.long 0x00 "CS1WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x24++0x03 line.long 0x00 "CS2WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x34++0x03 line.long 0x00 "CS3WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x44++0x03 line.long 0x00 "CS4WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x54++0x03 line.long 0x00 "CS5WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x64++0x03 line.long 0x00 "CS6WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x74++0x03 line.long 0x00 "CS7WCR1,CS" bitfld.long 0x00 24.--28. "CSRWAIT,Normal Read Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--20. "CSWWAIT,Normal Write Cycle Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1" "0: No wait is inserted,?..." group.long 0x08++0x03 line.long 0x00 "CS0WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x18++0x03 line.long 0x00 "CS1WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x28++0x03 line.long 0x00 "CS2WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x38++0x03 line.long 0x00 "CS3WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x48++0x03 line.long 0x00 "CS4WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x58++0x03 line.long 0x00 "CS5WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x68++0x03 line.long 0x00 "CS6WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.long 0x78++0x03 line.long 0x00 "CS7WCR2,CS" bitfld.long 0x00 28.--30. "CSON,CS Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 24.--26. "WDON,Write Data Output Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 20.--22. "WRON,WR Assert Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 16.--18. "RDON,RD Assert Wait Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 12.--13. "AWAIT,Address Cycle Wait Select" "0: No wait is inserted,?..." bitfld.long 0x00 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: No wait is inserted,?..." newline bitfld.long 0x00 4.--6. "CSWOFF,Write-Access CS Extension Cycle Select" "0: No wait is inserted,?..." bitfld.long 0x00 0.--2. "CSROFF,Read-Access CS Extension Cycle Select" "0: No wait is inserted,?..." group.byte 0xC00++0x00 line.byte 0x00 "SDCCR,SDC Control Register" bitfld.byte 0x00 4.--5. "BSIZE,SDRAM Bus Width Select" "0: A 16-bit bus space,1: Setting prohibited,2: An 8-bit bus space,3: Setting prohibited" bitfld.byte 0x00 0. "EXENB,Operation Enable" "0: Disable,1: Enable" group.byte 0xC01++0x00 line.byte 0x00 "SDCMOD,SDC Mode Register" bitfld.byte 0x00 0. "EMODE,Endian Mode" "0: Endian order of SDRAM address space is the..,1: Endian order of SDRAM address space is not.." group.byte 0xC02++0x00 line.byte 0x00 "SDAMOD,SDRAM Access Mode Register" bitfld.byte 0x00 0. "BE,Continuous Access Enable" "0: Disable,1: Enable" group.byte 0xC10++0x00 line.byte 0x00 "SDSELF,SDRAM Self-Refresh Control Register" bitfld.byte 0x00 0. "SFEN,SDRAM Self-Refresh Enable" "0: Disable,1: Enable" group.word 0xC14++0x01 line.word 0x00 "SDRFCR,SDRAM Refresh Control Register" bitfld.word 0x00 12.--15. "REFW,Auto-Refresh Cycle/ Self-Refresh Clearing Cycle Count Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.word 0x00 0.--11. 1. "RFC,Auto-Refresh Request Interval Setting" group.byte 0xC16++0x00 line.byte 0x00 "SDRFEN,SDRAM Auto-Refresh Control Register" bitfld.byte 0x00 0. "RFEN,Auto-Refresh Operation Enable" "0: Disable,1: Enable" group.byte 0xC20++0x00 line.byte 0x00 "SDICR,SDRAM Initialization Sequence Control Register" bitfld.byte 0x00 0. "INIRQ,Initialization Sequence Start" "0: Invalid,1: Initialization sequence starts" group.word 0xC24++0x01 line.word 0x00 "SDIR,SDRAM Initialization Register" bitfld.word 0x00 8.--10. "PRC,Initialization Precharge Cycle Count (PRC+3 cycles)" "0,1,2,3,4,5,6,7" bitfld.word 0x00 4.--7. "ARFC,Initialization Auto-Refresh Count" "0: Setting prohibited,?..." newline bitfld.word 0x00 0.--3. "ARFI,Initialization Auto-Refresh Interval (ARFI+3 cycles )" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0xC40++0x00 line.byte 0x00 "SDADR,SDRAM Address Register" bitfld.byte 0x00 0.--1. "MXC,Address Multiplex Select" "0: 8-bit shift,1: 9-bit shift,2: 10-bit shift,3: 11-bit shift" group.long 0xC44++0x03 line.long 0x00 "SDTR,SDRAM Timing Register" bitfld.long 0x00 16.--18. "RAS,Row Active Interval" "0: 1 cycle,1: 2 cycles,2: 3 cycles,3: 4 cycles,4: 5 cycles,5: 6 cycles,6: 7 cycles,7: Setting prohibited" bitfld.long 0x00 12.--13. "RCD,Row Column Latency ( RCD+1 cycles )" "0,1,2,3" newline bitfld.long 0x00 9.--11. "RP,Row Precharge Interval ( RP+1 cycles )" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. "WR,Write Recovery Interval" "0: 1 cycle,1: 2 cycles" newline bitfld.long 0x00 0.--2. "CL,SDRAMC Column Latency" "?,1: 1 cycle,2: 2 cycles,3: 3 cycles,?..." group.word 0xC48++0x01 line.word 0x00 "SDMOD,SDRAM Mode Register" hexmask.word 0x00 0.--14. 1. "MR,Mode Register SettingWriting to these bits: Mode register set command is issued" rgroup.byte 0xC50++0x00 line.byte 0x00 "SDSR,SDRAM Status Register" bitfld.byte 0x00 4. "SRFST,Self-Refresh Transition/Recovery Status" "0: Transition/recovery not in progress,1: Transition/recovery in progress" bitfld.byte 0x00 3. "INIST,Initialization Status" "0: Initialization sequence not in progress,1: Initialization sequence in progress" newline bitfld.byte 0x00 0. "MRSST,Mode Register Setting Status" "0: Mode register setting not in progress,1: Mode register setting in progress" rgroup.long 0x1800++0x03 line.long 0x00 "BUSERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1810++0x03 line.long 0x00 "BUS1ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1820++0x03 line.long 0x00 "BUS2ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1830++0x03 line.long 0x00 "BUS3ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1840++0x03 line.long 0x00 "BUS4ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1850++0x03 line.long 0x00 "BUS5ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1860++0x03 line.long 0x00 "BUS6ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1870++0x03 line.long 0x00 "BUS7ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1880++0x03 line.long 0x00 "BUS8ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x1890++0x03 line.long 0x00 "BUS9ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.long 0x18A0++0x03 line.long 0x00 "BUS10ERRADD,Bus Error Address Register" hexmask.long 0x00 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address" rgroup.byte 0x1804++0x00 line.byte 0x00 "BUSERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1814++0x00 line.byte 0x00 "BUS1ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1824++0x00 line.byte 0x00 "BUS2ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1834++0x00 line.byte 0x00 "BUS3ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1844++0x00 line.byte 0x00 "BUS4ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1854++0x00 line.byte 0x00 "BUS5ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1864++0x00 line.byte 0x00 "BUS6ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1874++0x00 line.byte 0x00 "BUS7ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1884++0x00 line.byte 0x00 "BUS8ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x1894++0x00 line.byte 0x00 "BUS9ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" rgroup.byte 0x18A4++0x00 line.byte 0x00 "BUS10ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. "ERRSTAT,Bus Error StatusWhen bus error assert error flag occurs" "0: No bus error occurred,1: Bus error occurred" bitfld.byte 0x00 0. "ACCSTAT,Error access statusThe status at the time of the error" "0: Read access,1: Write Access" group.word 0x1000++0x01 line.word 0x00 "BUSMCNTM4I,Master Bus Control Register" bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported" group.word 0x1004++0x01 line.word 0x00 "BUSMCNTM4D,Master Bus Control Register" bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported" group.word 0x1008++0x01 line.word 0x00 "BUSMCNTSYS,Master Bus Control Register SYS" bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported" group.word 0x100C++0x01 line.word 0x00 "BUSMCNTDMA,Master Bus Control Register DMA" bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported" group.word 0x1010++0x01 line.word 0x00 "BUSMCNTEDM,Master Bus Control Register" bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported" group.word 0x1014++0x01 line.word 0x00 "BUSMCNTGPX,Master Bus Control Register" bitfld.word 0x00 15. "IERES,Ignore Error Responses" "0: Bus error will be reported,1: Bus error will not be reported" group.word 0x1100++0x01 line.word 0x00 "BUSSCNTFLI,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x1104++0x01 line.word 0x00 "BUSSCNTRAMH,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x1108++0x01 line.word 0x00 "BUSSCNTMBIU,Slave Bus Control Register MBIU" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." repeat 2. (strings "0" "1" )(list 0x00 0x04 ) group.word ($2+0x110C)++0x01 line.word 0x00 "BUSSCNTRAM$1,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." repeat.end group.word 0x1114++0x01 line.word 0x00 "BUSSCNTP0B,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x1118++0x01 line.word 0x00 "BUSSCNTP2B,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x111C++0x01 line.word 0x00 "BUSSCNTP3B,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x1120++0x01 line.word 0x00 "BUSSCNTP4B,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x1128++0x01 line.word 0x00 "BUSSCNTP6B,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x112C++0x01 line.word 0x00 "BUSSCNTP7B,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." group.word 0x1130++0x01 line.word 0x00 "BUSSCNTFBU,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." repeat 2. (strings "" "2" )(list 0x00 0x04 ) group.word ($2+0x1134)++0x01 line.word 0x00 "BUSSCNTEXT$1,Slave Bus Control Register $1" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." repeat.end group.word 0x113C++0x01 line.word 0x00 "BUSSCNTGPX,Slave Bus Control Register" bitfld.word 0x00 8. "EWRES,Early Write ResponseWhether the next write request is accepted or not until a response for the write transaction comes back" "0: Not accepted,1: Accepted but error response is ignored" bitfld.word 0x00 4.--5. "ARBMET,Arbitration MethodSpecify the priority between groups" "0: fixed priority,1: round-robin,?..." tree.end tree "CAC (Clock Frequency Accuracy Measurement Circuit)" base ad:0x40044600 group.byte 0x00++0x00 line.byte 0x00 "CACR0,CAC Control Register 0" bitfld.byte 0x00 0. "CFME,Clock Frequency Measurement Enable" "0: Disable,1: Enable" group.byte 0x01++0x00 line.byte 0x00 "CACR1,CAC Control Register 1" bitfld.byte 0x00 6.--7. "EDGES,Valid Edge Select" "0: Rising edge,1: Falling edge,2: Both rising and falling edges,3: Setting prohibited" bitfld.byte 0x00 4.--5. "TCSS,Measurement Target Clock Frequency Division Ratio Select" "0: No division,1: x 1/4 clock,2: x 1/8 clock,3: x 1/32 clock" newline bitfld.byte 0x00 1.--3. "FMCS,Measurement Target Clock Select" "0: Main clock,1: Sub-clock,2: HOCO clock,3: MOCO clock,4: LOCO clock,5: Peripheral module clock(PCLKB),6: IWDTCLK clock,7: Setting prohibited" bitfld.byte 0x00 0. "CACREFE,CACREF Pin Input Enable" "0: Disable,1: Enable" group.byte 0x02++0x00 line.byte 0x00 "CACR2,CAC Control Register 2" bitfld.byte 0x00 6.--7. "DFS,Digital Filter Selection" "0: Digital filtering is disabled,1: The sampling clock for the digital filter is..,2: The sampling clock for the digital filter is..,3: The sampling clock for the digital filter is.." bitfld.byte 0x00 4.--5. "RCDS,Measurement Reference Clock Frequency Division Ratio Select" "0: 1/32 clock,1: 1/128 clock,2: 1/1024 clock,3: 1/8192 clock" newline bitfld.byte 0x00 1.--3. "RSCS,Measurement Reference Clock Select" "0: Main clock,1: Sub-clock,2: HOCO clock,3: MOCO clock,4: LOCO clock,5: Peripheral module clock(PCLKB),6: IWDTCLK clock,7: Setting prohibited" bitfld.byte 0x00 0. "RPS,Reference Signal Select" "0: CACREF pin input,1: Internal clock (internally generated signal)" group.byte 0x03++0x00 line.byte 0x00 "CAICR,CAC Interrupt Control Register" bitfld.byte 0x00 6. "OVFFCL,OVFF Clear" "0: No effect on operations,1: Clears the OVFF flag" bitfld.byte 0x00 5. "MENDFCL,MENDF Clear" "0: No effect on operations,1: Clears the MENDF flag" newline bitfld.byte 0x00 4. "FERRFCL,FERRF Clear" "0: No effect on operations,1: Clears the FERRF flag" bitfld.byte 0x00 2. "OVFIE,Overflow Interrupt Request Enable" "0: Disable,1: Enable" newline bitfld.byte 0x00 1. "MENDIE,Measurement End Interrupt Request Enable" "0: Disable,1: Enable" bitfld.byte 0x00 0. "FERRIE,Frequency Error Interrupt Request Enable" "0: Disable,1: Enable" rgroup.byte 0x04++0x00 line.byte 0x00 "CASTR,CAC Status Register" bitfld.byte 0x00 2. "OVFF,Counter Overflow Flag" "0: The counter has not overflowed,1: The counter has overflowed" bitfld.byte 0x00 1. "MENDF,Measurement End Flag" "0: Measurement is in progress,1: Measurement has ended" newline bitfld.byte 0x00 0. "FERRF,Frequency Error Flag" "0: The clock frequency is within the range..,1: The clock frequency has deviated beyond the.." group.word 0x06++0x01 line.word 0x00 "CAULVR,CAC Upper-Limit Value Setting Register" hexmask.word 0x00 0.--15. 1. "CAULVR,CAULVR is a 16-bit readable/writable register that stores the upper-limit value of the frequency" group.word 0x08++0x01 line.word 0x00 "CALLVR,CAC Lower-Limit Value Setting Register" hexmask.word 0x00 0.--15. 1. "CALLVR,CALLVR is a 16-bit readable/writable register that stores the lower-limit value of the frequency" rgroup.word 0x0A++0x01 line.word 0x00 "CACNTBR,CAC Counter Buffer Register" hexmask.word 0x00 0.--15. 1. "CACNTBR,CACNTBR is a 16-bit read-only register that retains the counter value at the time a valid reference signal edge is input" tree.end tree "CAN (CAN Module)" repeat 2. (list 0. 1.) (list ad:0x40050000 ad:0x40051000) tree "CAN$1" base $2 group.long 0x200++0x03 line.long 0x00 "MB0_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x210++0x03 line.long 0x00 "MB1_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x220++0x03 line.long 0x00 "MB2_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x230++0x03 line.long 0x00 "MB3_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x240++0x03 line.long 0x00 "MB4_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x250++0x03 line.long 0x00 "MB5_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x260++0x03 line.long 0x00 "MB6_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x270++0x03 line.long 0x00 "MB7_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x280++0x03 line.long 0x00 "MB8_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x290++0x03 line.long 0x00 "MB9_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x2A0++0x03 line.long 0x00 "MB10_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x2B0++0x03 line.long 0x00 "MB11_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x2C0++0x03 line.long 0x00 "MB12_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x2D0++0x03 line.long 0x00 "MB13_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x2E0++0x03 line.long 0x00 "MB14_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x2F0++0x03 line.long 0x00 "MB15_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x300++0x03 line.long 0x00 "MB16_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x310++0x03 line.long 0x00 "MB17_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x320++0x03 line.long 0x00 "MB18_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x330++0x03 line.long 0x00 "MB19_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x340++0x03 line.long 0x00 "MB20_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x350++0x03 line.long 0x00 "MB21_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x360++0x03 line.long 0x00 "MB22_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x370++0x03 line.long 0x00 "MB23_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x380++0x03 line.long 0x00 "MB24_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x390++0x03 line.long 0x00 "MB25_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x3A0++0x03 line.long 0x00 "MB26_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x3B0++0x03 line.long 0x00 "MB27_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x3C0++0x03 line.long 0x00 "MB28_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x3D0++0x03 line.long 0x00 "MB29_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x3E0++0x03 line.long 0x00 "MB30_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.long 0x3F0++0x03 line.long 0x00 "MB31_ID,Mailbox Register" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" group.word 0x204++0x01 line.word 0x00 "MB0_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x214++0x01 line.word 0x00 "MB1_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x224++0x01 line.word 0x00 "MB2_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x234++0x01 line.word 0x00 "MB3_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x244++0x01 line.word 0x00 "MB4_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x254++0x01 line.word 0x00 "MB5_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x264++0x01 line.word 0x00 "MB6_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x274++0x01 line.word 0x00 "MB7_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x284++0x01 line.word 0x00 "MB8_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x294++0x01 line.word 0x00 "MB9_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x2A4++0x01 line.word 0x00 "MB10_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x2B4++0x01 line.word 0x00 "MB11_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x2C4++0x01 line.word 0x00 "MB12_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x2D4++0x01 line.word 0x00 "MB13_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x2E4++0x01 line.word 0x00 "MB14_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x2F4++0x01 line.word 0x00 "MB15_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x304++0x01 line.word 0x00 "MB16_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x314++0x01 line.word 0x00 "MB17_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x324++0x01 line.word 0x00 "MB18_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x334++0x01 line.word 0x00 "MB19_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x344++0x01 line.word 0x00 "MB20_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x354++0x01 line.word 0x00 "MB21_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x364++0x01 line.word 0x00 "MB22_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x374++0x01 line.word 0x00 "MB23_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x384++0x01 line.word 0x00 "MB24_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x394++0x01 line.word 0x00 "MB25_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x3A4++0x01 line.word 0x00 "MB26_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x3B4++0x01 line.word 0x00 "MB27_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x3C4++0x01 line.word 0x00 "MB28_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x3D4++0x01 line.word 0x00 "MB29_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x3E4++0x01 line.word 0x00 "MB30_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.word 0x3F4++0x01 line.word 0x00 "MB31_DL,Mailbox Register" bitfld.word 0x00 0.--3. "DLC,Data Length Code" "0: Data length = 0 byte,1: Data length = 1 byte,2: Data length = 2 bytes,3: Data length = 3 bytes,4: Data length = 4 bytes,5: Data length = 5 bytes,6: Data length = 6 bytes,7: Data length = 7 bytes,?..." group.byte 0x206++0x00 line.byte 0x00 "MB0_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x216++0x00 line.byte 0x00 "MB1_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x226++0x00 line.byte 0x00 "MB2_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x236++0x00 line.byte 0x00 "MB3_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x246++0x00 line.byte 0x00 "MB4_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x256++0x00 line.byte 0x00 "MB5_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x266++0x00 line.byte 0x00 "MB6_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x276++0x00 line.byte 0x00 "MB7_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x286++0x00 line.byte 0x00 "MB8_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x296++0x00 line.byte 0x00 "MB9_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x2A6++0x00 line.byte 0x00 "MB10_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x2B6++0x00 line.byte 0x00 "MB11_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x2C6++0x00 line.byte 0x00 "MB12_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x2D6++0x00 line.byte 0x00 "MB13_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x2E6++0x00 line.byte 0x00 "MB14_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x2F6++0x00 line.byte 0x00 "MB15_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x306++0x00 line.byte 0x00 "MB16_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x316++0x00 line.byte 0x00 "MB17_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x326++0x00 line.byte 0x00 "MB18_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x336++0x00 line.byte 0x00 "MB19_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x346++0x00 line.byte 0x00 "MB20_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x356++0x00 line.byte 0x00 "MB21_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x366++0x00 line.byte 0x00 "MB22_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x376++0x00 line.byte 0x00 "MB23_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x386++0x00 line.byte 0x00 "MB24_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x396++0x00 line.byte 0x00 "MB25_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x3A6++0x00 line.byte 0x00 "MB26_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x3B6++0x00 line.byte 0x00 "MB27_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x3C6++0x00 line.byte 0x00 "MB28_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x3D6++0x00 line.byte 0x00 "MB29_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x3E6++0x00 line.byte 0x00 "MB30_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x3F6++0x00 line.byte 0x00 "MB31_D0,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA0,Data Bytes 0.DATA0 store the transmitted or received CAN message data" group.byte 0x207++0x00 line.byte 0x00 "MB0_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x217++0x00 line.byte 0x00 "MB1_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x227++0x00 line.byte 0x00 "MB2_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x237++0x00 line.byte 0x00 "MB3_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x247++0x00 line.byte 0x00 "MB4_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x257++0x00 line.byte 0x00 "MB5_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x267++0x00 line.byte 0x00 "MB6_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x277++0x00 line.byte 0x00 "MB7_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x287++0x00 line.byte 0x00 "MB8_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x297++0x00 line.byte 0x00 "MB9_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x2A7++0x00 line.byte 0x00 "MB10_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x2B7++0x00 line.byte 0x00 "MB11_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x2C7++0x00 line.byte 0x00 "MB12_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x2D7++0x00 line.byte 0x00 "MB13_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x2E7++0x00 line.byte 0x00 "MB14_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x2F7++0x00 line.byte 0x00 "MB15_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x307++0x00 line.byte 0x00 "MB16_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x317++0x00 line.byte 0x00 "MB17_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x327++0x00 line.byte 0x00 "MB18_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x337++0x00 line.byte 0x00 "MB19_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x347++0x00 line.byte 0x00 "MB20_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x357++0x00 line.byte 0x00 "MB21_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x367++0x00 line.byte 0x00 "MB22_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x377++0x00 line.byte 0x00 "MB23_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x387++0x00 line.byte 0x00 "MB24_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x397++0x00 line.byte 0x00 "MB25_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x3A7++0x00 line.byte 0x00 "MB26_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x3B7++0x00 line.byte 0x00 "MB27_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x3C7++0x00 line.byte 0x00 "MB28_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x3D7++0x00 line.byte 0x00 "MB29_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x3E7++0x00 line.byte 0x00 "MB30_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x3F7++0x00 line.byte 0x00 "MB31_D1,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA1,Data Bytes 1DATA1 store the transmitted or received CAN message data" group.byte 0x208++0x00 line.byte 0x00 "MB0_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x218++0x00 line.byte 0x00 "MB1_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x228++0x00 line.byte 0x00 "MB2_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x238++0x00 line.byte 0x00 "MB3_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x248++0x00 line.byte 0x00 "MB4_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x258++0x00 line.byte 0x00 "MB5_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x268++0x00 line.byte 0x00 "MB6_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x278++0x00 line.byte 0x00 "MB7_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x288++0x00 line.byte 0x00 "MB8_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x298++0x00 line.byte 0x00 "MB9_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x2A8++0x00 line.byte 0x00 "MB10_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x2B8++0x00 line.byte 0x00 "MB11_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x2C8++0x00 line.byte 0x00 "MB12_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x2D8++0x00 line.byte 0x00 "MB13_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x2E8++0x00 line.byte 0x00 "MB14_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x2F8++0x00 line.byte 0x00 "MB15_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x308++0x00 line.byte 0x00 "MB16_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x318++0x00 line.byte 0x00 "MB17_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x328++0x00 line.byte 0x00 "MB18_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x338++0x00 line.byte 0x00 "MB19_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x348++0x00 line.byte 0x00 "MB20_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x358++0x00 line.byte 0x00 "MB21_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x368++0x00 line.byte 0x00 "MB22_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x378++0x00 line.byte 0x00 "MB23_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x388++0x00 line.byte 0x00 "MB24_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x398++0x00 line.byte 0x00 "MB25_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x3A8++0x00 line.byte 0x00 "MB26_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x3B8++0x00 line.byte 0x00 "MB27_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x3C8++0x00 line.byte 0x00 "MB28_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x3D8++0x00 line.byte 0x00 "MB29_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x3E8++0x00 line.byte 0x00 "MB30_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x3F8++0x00 line.byte 0x00 "MB31_D2,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA2,Data Bytes 2DATA2 store the transmitted or received CAN message data" group.byte 0x209++0x00 line.byte 0x00 "MB0_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x219++0x00 line.byte 0x00 "MB1_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x229++0x00 line.byte 0x00 "MB2_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x239++0x00 line.byte 0x00 "MB3_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x249++0x00 line.byte 0x00 "MB4_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x259++0x00 line.byte 0x00 "MB5_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x269++0x00 line.byte 0x00 "MB6_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x279++0x00 line.byte 0x00 "MB7_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x289++0x00 line.byte 0x00 "MB8_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x299++0x00 line.byte 0x00 "MB9_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x2A9++0x00 line.byte 0x00 "MB10_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x2B9++0x00 line.byte 0x00 "MB11_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x2C9++0x00 line.byte 0x00 "MB12_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x2D9++0x00 line.byte 0x00 "MB13_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x2E9++0x00 line.byte 0x00 "MB14_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x2F9++0x00 line.byte 0x00 "MB15_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x309++0x00 line.byte 0x00 "MB16_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x319++0x00 line.byte 0x00 "MB17_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x329++0x00 line.byte 0x00 "MB18_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x339++0x00 line.byte 0x00 "MB19_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x349++0x00 line.byte 0x00 "MB20_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x359++0x00 line.byte 0x00 "MB21_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x369++0x00 line.byte 0x00 "MB22_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x379++0x00 line.byte 0x00 "MB23_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x389++0x00 line.byte 0x00 "MB24_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x399++0x00 line.byte 0x00 "MB25_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x3A9++0x00 line.byte 0x00 "MB26_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x3B9++0x00 line.byte 0x00 "MB27_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x3C9++0x00 line.byte 0x00 "MB28_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x3D9++0x00 line.byte 0x00 "MB29_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x3E9++0x00 line.byte 0x00 "MB30_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x3F9++0x00 line.byte 0x00 "MB31_D3,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA3,Data Bytes 3DATA3 store the transmitted or received CAN message data" group.byte 0x20A++0x00 line.byte 0x00 "MB0_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x21A++0x00 line.byte 0x00 "MB1_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x22A++0x00 line.byte 0x00 "MB2_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x23A++0x00 line.byte 0x00 "MB3_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x24A++0x00 line.byte 0x00 "MB4_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x25A++0x00 line.byte 0x00 "MB5_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x26A++0x00 line.byte 0x00 "MB6_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x27A++0x00 line.byte 0x00 "MB7_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x28A++0x00 line.byte 0x00 "MB8_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x29A++0x00 line.byte 0x00 "MB9_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x2AA++0x00 line.byte 0x00 "MB10_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x2BA++0x00 line.byte 0x00 "MB11_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x2CA++0x00 line.byte 0x00 "MB12_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x2DA++0x00 line.byte 0x00 "MB13_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x2EA++0x00 line.byte 0x00 "MB14_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x2FA++0x00 line.byte 0x00 "MB15_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x30A++0x00 line.byte 0x00 "MB16_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x31A++0x00 line.byte 0x00 "MB17_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x32A++0x00 line.byte 0x00 "MB18_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x33A++0x00 line.byte 0x00 "MB19_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x34A++0x00 line.byte 0x00 "MB20_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x35A++0x00 line.byte 0x00 "MB21_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x36A++0x00 line.byte 0x00 "MB22_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x37A++0x00 line.byte 0x00 "MB23_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x38A++0x00 line.byte 0x00 "MB24_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x39A++0x00 line.byte 0x00 "MB25_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x3AA++0x00 line.byte 0x00 "MB26_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x3BA++0x00 line.byte 0x00 "MB27_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x3CA++0x00 line.byte 0x00 "MB28_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x3DA++0x00 line.byte 0x00 "MB29_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x3EA++0x00 line.byte 0x00 "MB30_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x3FA++0x00 line.byte 0x00 "MB31_D4,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA4,Data Bytes 4DATA4 store the transmitted or received CAN message data" group.byte 0x20B++0x00 line.byte 0x00 "MB0_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x21B++0x00 line.byte 0x00 "MB1_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x22B++0x00 line.byte 0x00 "MB2_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x23B++0x00 line.byte 0x00 "MB3_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x24B++0x00 line.byte 0x00 "MB4_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x25B++0x00 line.byte 0x00 "MB5_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x26B++0x00 line.byte 0x00 "MB6_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x27B++0x00 line.byte 0x00 "MB7_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x28B++0x00 line.byte 0x00 "MB8_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x29B++0x00 line.byte 0x00 "MB9_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x2AB++0x00 line.byte 0x00 "MB10_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x2BB++0x00 line.byte 0x00 "MB11_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x2CB++0x00 line.byte 0x00 "MB12_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x2DB++0x00 line.byte 0x00 "MB13_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x2EB++0x00 line.byte 0x00 "MB14_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x2FB++0x00 line.byte 0x00 "MB15_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x30B++0x00 line.byte 0x00 "MB16_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x31B++0x00 line.byte 0x00 "MB17_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x32B++0x00 line.byte 0x00 "MB18_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x33B++0x00 line.byte 0x00 "MB19_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x34B++0x00 line.byte 0x00 "MB20_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x35B++0x00 line.byte 0x00 "MB21_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x36B++0x00 line.byte 0x00 "MB22_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x37B++0x00 line.byte 0x00 "MB23_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x38B++0x00 line.byte 0x00 "MB24_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x39B++0x00 line.byte 0x00 "MB25_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x3AB++0x00 line.byte 0x00 "MB26_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x3BB++0x00 line.byte 0x00 "MB27_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x3CB++0x00 line.byte 0x00 "MB28_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x3DB++0x00 line.byte 0x00 "MB29_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x3EB++0x00 line.byte 0x00 "MB30_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x3FB++0x00 line.byte 0x00 "MB31_D5,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA5,Data Bytes 5DATA5 store the transmitted or received CAN message data" group.byte 0x20C++0x00 line.byte 0x00 "MB0_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x21C++0x00 line.byte 0x00 "MB1_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x22C++0x00 line.byte 0x00 "MB2_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x23C++0x00 line.byte 0x00 "MB3_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x24C++0x00 line.byte 0x00 "MB4_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x25C++0x00 line.byte 0x00 "MB5_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x26C++0x00 line.byte 0x00 "MB6_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x27C++0x00 line.byte 0x00 "MB7_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x28C++0x00 line.byte 0x00 "MB8_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x29C++0x00 line.byte 0x00 "MB9_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x2AC++0x00 line.byte 0x00 "MB10_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x2BC++0x00 line.byte 0x00 "MB11_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x2CC++0x00 line.byte 0x00 "MB12_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x2DC++0x00 line.byte 0x00 "MB13_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x2EC++0x00 line.byte 0x00 "MB14_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x2FC++0x00 line.byte 0x00 "MB15_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x30C++0x00 line.byte 0x00 "MB16_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x31C++0x00 line.byte 0x00 "MB17_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x32C++0x00 line.byte 0x00 "MB18_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x33C++0x00 line.byte 0x00 "MB19_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x34C++0x00 line.byte 0x00 "MB20_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x35C++0x00 line.byte 0x00 "MB21_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x36C++0x00 line.byte 0x00 "MB22_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x37C++0x00 line.byte 0x00 "MB23_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x38C++0x00 line.byte 0x00 "MB24_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x39C++0x00 line.byte 0x00 "MB25_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x3AC++0x00 line.byte 0x00 "MB26_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x3BC++0x00 line.byte 0x00 "MB27_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x3CC++0x00 line.byte 0x00 "MB28_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x3DC++0x00 line.byte 0x00 "MB29_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x3EC++0x00 line.byte 0x00 "MB30_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x3FC++0x00 line.byte 0x00 "MB31_D6,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA6,Data Bytes 6DATA6 store the transmitted or received CAN message data" group.byte 0x20D++0x00 line.byte 0x00 "MB0_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x21D++0x00 line.byte 0x00 "MB1_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x22D++0x00 line.byte 0x00 "MB2_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x23D++0x00 line.byte 0x00 "MB3_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x24D++0x00 line.byte 0x00 "MB4_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x25D++0x00 line.byte 0x00 "MB5_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x26D++0x00 line.byte 0x00 "MB6_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x27D++0x00 line.byte 0x00 "MB7_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x28D++0x00 line.byte 0x00 "MB8_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x29D++0x00 line.byte 0x00 "MB9_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x2AD++0x00 line.byte 0x00 "MB10_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x2BD++0x00 line.byte 0x00 "MB11_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x2CD++0x00 line.byte 0x00 "MB12_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x2DD++0x00 line.byte 0x00 "MB13_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x2ED++0x00 line.byte 0x00 "MB14_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x2FD++0x00 line.byte 0x00 "MB15_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x30D++0x00 line.byte 0x00 "MB16_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x31D++0x00 line.byte 0x00 "MB17_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x32D++0x00 line.byte 0x00 "MB18_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x33D++0x00 line.byte 0x00 "MB19_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x34D++0x00 line.byte 0x00 "MB20_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x35D++0x00 line.byte 0x00 "MB21_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x36D++0x00 line.byte 0x00 "MB22_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x37D++0x00 line.byte 0x00 "MB23_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x38D++0x00 line.byte 0x00 "MB24_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x39D++0x00 line.byte 0x00 "MB25_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x3AD++0x00 line.byte 0x00 "MB26_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x3BD++0x00 line.byte 0x00 "MB27_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x3CD++0x00 line.byte 0x00 "MB28_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x3DD++0x00 line.byte 0x00 "MB29_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x3ED++0x00 line.byte 0x00 "MB30_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.byte 0x3FD++0x00 line.byte 0x00 "MB31_D7,Mailbox Register" hexmask.byte 0x00 0.--7. 1. "DATA7,Data Bytes 7DATA7 store the transmitted or received CAN message data" group.word 0x20E++0x01 line.word 0x00 "MB0_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x21E++0x01 line.word 0x00 "MB1_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x22E++0x01 line.word 0x00 "MB2_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x23E++0x01 line.word 0x00 "MB3_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x24E++0x01 line.word 0x00 "MB4_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x25E++0x01 line.word 0x00 "MB5_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x26E++0x01 line.word 0x00 "MB6_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x27E++0x01 line.word 0x00 "MB7_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x28E++0x01 line.word 0x00 "MB8_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x29E++0x01 line.word 0x00 "MB9_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x2AE++0x01 line.word 0x00 "MB10_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x2BE++0x01 line.word 0x00 "MB11_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x2CE++0x01 line.word 0x00 "MB12_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x2DE++0x01 line.word 0x00 "MB13_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x2EE++0x01 line.word 0x00 "MB14_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x2FE++0x01 line.word 0x00 "MB15_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x30E++0x01 line.word 0x00 "MB16_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x31E++0x01 line.word 0x00 "MB17_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x32E++0x01 line.word 0x00 "MB18_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x33E++0x01 line.word 0x00 "MB19_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x34E++0x01 line.word 0x00 "MB20_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x35E++0x01 line.word 0x00 "MB21_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x36E++0x01 line.word 0x00 "MB22_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x37E++0x01 line.word 0x00 "MB23_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x38E++0x01 line.word 0x00 "MB24_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x39E++0x01 line.word 0x00 "MB25_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x3AE++0x01 line.word 0x00 "MB26_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x3BE++0x01 line.word 0x00 "MB27_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x3CE++0x01 line.word 0x00 "MB28_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x3DE++0x01 line.word 0x00 "MB29_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x3EE++0x01 line.word 0x00 "MB30_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" group.word 0x3FE++0x01 line.word 0x00 "MB31_TS,Mailbox Register" hexmask.word.byte 0x00 8.--15. 1. "TSH,Time Stamp Lower ByteBits TSH[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" hexmask.word.byte 0x00 0.--7. 1. "TSL,Time Stamp Higher ByteBits TSL[7:0] store the counter value of the time stamp when received messages are stored in the mailbox" repeat 8. (increment 0 1) (increment 0 0x04) group.long ($2+0x400)++0x03 line.long 0x00 "MKR[$1],Mask Register $1" hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" repeat.end repeat 2. (strings "0" "1" )(list 0x00 0x04 ) group.long ($2+0x420)++0x03 line.long 0x00 "FIDCR$1,FIFO Received ID Compare Registers" bitfld.long 0x00 31. "IDE,ID Extension" "0: Standard ID,1: Extended ID" bitfld.long 0x00 30. "RTR,Remote Transmission Request" "0: Data frame,1: Remote frame" newline hexmask.long.word 0x00 18.--28. 1. "SID,Standard ID" hexmask.long.tbyte 0x00 0.--17. 1. "EID,Extended ID" repeat.end group.long 0x428++0x03 line.long 0x00 "MKIVLR,Mask Invalid Register" bitfld.long 0x00 31. "MB31,mailbox 31 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 30. "MB30,mailbox 30 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 29. "MB29,mailbox 29 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 28. "MB28,mailbox 28 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 27. "MB27,mailbox 27 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 26. "MB26,mailbox 26 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 25. "MB25,mailbox 25 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 24. "MB24,mailbox 24 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 23. "MB23,mailbox 23 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 22. "MB22,mailbox 22 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 21. "MB21,mailbox 21 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 20. "MB20,mailbox 20 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 19. "MB19,mailbox 19 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 18. "MB18,mailbox 18 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 17. "MB17,mailbox 17 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 16. "MB16,mailbox 16 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 15. "MB15,mailbox 15 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 14. "MB14,mailbox 14 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 13. "MB13,mailbox 13 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 12. "MB12,mailbox 12 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 11. "MB11,mailbox 11 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 10. "MB10,mailbox 10 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 9. "MB9,mailbox 9 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 8. "MB8,mailbox 8 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 7. "MB7,mailbox 7 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 6. "MB6,mailbox 6 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 5. "MB5,mailbox 5 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 4. "MB4,mailbox 4 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 3. "MB3,mailbox 3 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 2. "MB2,mailbox 2 Mask Invalid" "0: Mask valid,1: Mask invalid" newline bitfld.long 0x00 1. "MB1,mailbox 1 Mask Invalid" "0: Mask valid,1: Mask invalid" bitfld.long 0x00 0. "MB0,mailbox 0 Mask Invalid" "0: Mask valid,1: Mask invalid" group.long 0x42C++0x03 line.long 0x00 "MIER,Mailbox Interrupt Enable Register" bitfld.long 0x00 31. "MB31,mailbox 31 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 30. "MB30,mailbox 30 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 29. "MB29,mailbox 29 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 28. "MB28,mailbox 28 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 27. "MB27,mailbox 27 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 26. "MB26,mailbox 26 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 25. "MB25,mailbox 25 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 24. "MB24,mailbox 24 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 23. "MB23,mailbox 23 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 22. "MB22,mailbox 22 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 21. "MB21,mailbox 21 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 20. "MB20,mailbox 20 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 19. "MB19,mailbox 19 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 18. "MB18,mailbox 18 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 17. "MB17,mailbox 17 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 16. "MB16,mailbox 16 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 15. "MB15,mailbox 15 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 14. "MB14,mailbox 14 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 13. "MB13,mailbox 13 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 12. "MB12,mailbox 12 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 11. "MB11,mailbox 11 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 10. "MB10,mailbox 10 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 9. "MB9,mailbox 9 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 8. "MB8,mailbox 8 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 7. "MB7,mailbox 7 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 6. "MB6,mailbox 6 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 5. "MB5,mailbox 5 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 4. "MB4,mailbox 4 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 3. "MB3,mailbox 3 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 2. "MB2,mailbox 2 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 1. "MB1,mailbox 1 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 0. "MB0,mailbox 0 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" group.long 0x42C++0x03 line.long 0x00 "MIER_FIFO,Mailbox Interrupt Enable Register for FIFO Mailbox Mode" bitfld.long 0x00 29. "MB29,Receive FIFO Interrupt Generation Timing Control" "0: Every time reception is completed,1: When the receive FIFO becomes buffer warning.." bitfld.long 0x00 28. "MB28,Receive FIFO Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 25. "MB25,Transmit FIFO Interrupt Generation Timing Control" "0: Every time transmission is completed,1: When the transmit FIFO becomes empty due to.." bitfld.long 0x00 24. "MB24,Transmit FIFO Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 23. "MB23,mailbox 23 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 22. "MB22,mailbox 22 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 21. "MB21,mailbox 21 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 20. "MB20,mailbox 20 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 19. "MB19,mailbox 19 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 18. "MB18,mailbox 18 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 17. "MB17,mailbox 17 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 16. "MB16,mailbox 16 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 15. "MB15,mailbox 15 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 14. "MB14,mailbox 14 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 13. "MB13,mailbox 13 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 12. "MB12,mailbox 12 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 11. "MB11,mailbox 11 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 10. "MB10,mailbox 10 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 9. "MB9,mailbox 9 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 8. "MB8,mailbox 8 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 7. "MB7,mailbox 7 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 6. "MB6,mailbox 6 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 5. "MB5,mailbox 5 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 4. "MB4,mailbox 4 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 3. "MB3,mailbox 3 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 2. "MB2,mailbox 2 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" newline bitfld.long 0x00 1. "MB1,mailbox 1 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" bitfld.long 0x00 0. "MB0,mailbox 0 Interrupt Enable" "0: Interrupt disabled,1: Interrupt enabled" repeat 32. (increment 0 1) (increment 0 0x01) group.byte ($2+0x820)++0x00 line.byte 0x00 "MCTL_TX[$1],Message Control Register for Transmit $1" bitfld.byte 0x00 7. "TRMREQ,Transmit Mailbox Request" "0: Not configured for transmission,1: Configured for transmission" bitfld.byte 0x00 6. "RECREQ,Receive Mailbox Request" "0: Not configured for reception,1: Configured for reception" newline bitfld.byte 0x00 4. "ONESHOT,One-Shot Enable" "0: One-shot reception or one-shot transmission..,1: One-shot reception or one-shot transmission.." bitfld.byte 0x00 2. "TRMABT,Transmission Abort Complete Flag (Transmit mailbox setting enabled)" "0: Transmission has started transmission abort..,1: Transmission abort is completed" newline rbitfld.byte 0x00 1. "TRMACTIVE,Transmission-in-Progress Status Flag (Transmit mailbox setting enabled)" "0: Transmission is pending or transmission is..,1: From acceptance of transmission request to.." bitfld.byte 0x00 0. "SENTDATA,Transmission Complete Flag" "0: Transmission is not completed,1: Transmission is completed" repeat.end repeat 32. (increment 0 1) (increment 0 0x01) group.byte ($2+0x820)++0x00 line.byte 0x00 "MCTL_RX[$1],Message Control Register for Receive $1" bitfld.byte 0x00 7. "TRMREQ,Transmit Mailbox Request" "0: Not configured for transmission,1: Configured for transmission" bitfld.byte 0x00 6. "RECREQ,Receive Mailbox Request" "0: Not configured for reception,1: Configured for reception" newline bitfld.byte 0x00 4. "ONESHOT,One-Shot Enable" "0: One-shot reception or one-shot transmission..,1: One-shot reception or one-shot transmission.." bitfld.byte 0x00 2. "MSGLOST,Message Lost Flag(Receive mailbox setting enabled)" "0: Message is not overwritten or overrun,1: Message is overwritten or overrun" newline rbitfld.byte 0x00 1. "INVALDATA,Reception-in-Progress Status Flag (Receive mailbox setting enabled)" "0: Message valid,1: Message being updated" bitfld.byte 0x00 0. "NEWDATA,Reception Complete Flag" "0: No data has been received or 0 is written to..,1: A new message is being stored or has been.." repeat.end group.word 0x840++0x01 line.word 0x00 "CTLR,Control Register" bitfld.word 0x00 13. "RBOC,Forcible Return From Bus-Off" "0: Nothing occurred,1: Forcible return from bus-off" bitfld.word 0x00 11.--12. "BOM,Bus-Off Recovery Mode by a program request" "0: Normal mode (ISO11898-1 compliant),1: Entry to CAN halt mode automatically at..,2: Entry to CAN halt mode automatically at..,3: Entry to CAN halt mode (during bus-off.." newline bitfld.word 0x00 10. "SLPM,CAN Sleep Mode" "0: Other than CAN sleep mode,1: CAN sleep mode" bitfld.word 0x00 8.--9. "CANM,CAN Operating Mode Select" "0: CAN operation mode,1: CAN reset mode,2: CAN halt mode,3: CAN reset mode (forcible transition)" newline bitfld.word 0x00 6.--7. "TSPS,Time Stamp Prescaler Select" "0: Every bit time,1: Every 2-bit time,2: Every 4-bit time,3: Every 8-bit time" bitfld.word 0x00 5. "TSRC,Time Stamp Counter Reset Command" "0: Nothing occurred,1: Reset" newline bitfld.word 0x00 4. "TPM,Transmission Priority Mode Select" "0: ID priority transmit mode,1: Mailbox number priority transmit mode" bitfld.word 0x00 3. "MLM,Message Lost Mode Select" "0: Overwrite mode,1: Overrun mode" newline bitfld.word 0x00 1.--2. "IDFM,ID Format Mode Select" "0: Standard ID mode.All mailboxes (including..,1: Extended ID mode.All mailboxes (including..,2: Mixed ID mode.All mailboxes (including FIFO..,3: Do not use this combination" bitfld.word 0x00 0. "MBM,CAN Mailbox Mode Select" "0: Normal mailbox mode,1: FIFO mailbox mode" rgroup.word 0x842++0x01 line.word 0x00 "STR,Status Register" bitfld.word 0x00 14. "RECST,Receive Status Flag (receiver)" "0: Bus idle or transmission in progress,1: Reception in progress" bitfld.word 0x00 13. "TRMST,Transmit Status Flag (transmitter)" "0: Bus idle or reception in progress,1: Transmission in progress or in bus-off state" newline bitfld.word 0x00 12. "BOST,Bus-Off Status Flag" "0: Not in bus-off state,1: In bus-off state" bitfld.word 0x00 11. "EPST,Error-Passive Status Flag" "0: Not in error-passive state,1: In error-passive state" newline bitfld.word 0x00 10. "SLPST,CAN Sleep Status Flag" "0: Not in CAN sleep mode,1: In CAN sleep mode" bitfld.word 0x00 9. "HLTST,CAN Halt Status Flag" "0: Not in CAN halt mode,1: In CAN halt mode" newline bitfld.word 0x00 8. "RSTST,CAN Reset Status Flag" "0: Not in CAN reset mode,1: In CAN reset mode" bitfld.word 0x00 7. "EST,Error Status Flag" "0: No error occurred,1: Error occurred" newline bitfld.word 0x00 6. "TABST,Transmission Abort Status Flag" "0: No mailbox with TRMABT bit = 1,1: Mailbox(es) with TRMABT bit = 1" bitfld.word 0x00 5. "FMLST,FIFO Mailbox Message Lost Status Flag" "0: RFMLF bit = 0,1: RFMLF bit = 1" newline bitfld.word 0x00 4. "NMLST,Normal Mailbox Message Lost Status Flag" "0: No mailbox with MSGLOST bit = 1,1: Mailbox(es) with MSGLOST bit = 1" bitfld.word 0x00 3. "TFST,Transmit FIFO Status Flag" "0: Transmit FIFO is full,1: Transmit FIFO is not full" newline bitfld.word 0x00 2. "RFST,Receive FIFO Status Flag" "0: No message in receive FIFO (empty),1: Message in receive FIFO" bitfld.word 0x00 1. "SDST,SENTDATA Status Flag" "0: No mailbox with SENTDATA bit = 1,1: Mailbox(es) with SENTDATA bit = 1" newline bitfld.word 0x00 0. "NDST,NEWDATA Status Flag" "0: No mailbox with NEWDATA bit = 1,1: Mailbox(es) with NEWDATA bit = 1" group.long 0x844++0x03 line.long 0x00 "BCR,Bit Configuration Register" bitfld.long 0x00 28.--31. "TSEG1,Time Segment 1 Control" "0: Setting prohibited,1: Setting prohibited,2: Setting prohibited,3: 0011,4: 0100,5: 0101,6: 0110,7: 0111,8: 1000,9: 10 Tq,10: 11 Tq,11: 12 Tq,12: 13 Tq,13: 14 Tq,14: 15 Tq,15: 16 Tq" hexmask.long.word 0x00 16.--25. 1. "BRP,Prescaler Division Ratio Select" newline bitfld.long 0x00 12.--13. "SJW,Resynchronization Jump Width Control" "0: 1 Tq,1: 2 Tq,2: 3 Tq,3: 4 Tq" bitfld.long 0x00 8.--10. "TSEG2,Time Segment 2 Control" "0: Setting prohibited,1: 2 Tq,2: 3 Tq,3: 4 Tq,4: 5 Tq,5: 6 Tq,6: 7 Tq,7: 8 Tq" newline bitfld.long 0x00 0. "CCLKS,CAN Clock Source Selection" "0: PCLK (generated by the PLL clock),1: CANMCLK (generated by the main clock)" group.byte 0x848++0x00 line.byte 0x00 "RFCR,Receive FIFO Control Register" rbitfld.byte 0x00 7. "RFEST,Receive FIFO Empty Status Flag" "0: Unread message in receive FIFO,1: No unread message in receive FIFO" rbitfld.byte 0x00 6. "RFWST,Receive FIFO Buffer Warning Status Flag" "0: Receive FIFO is not buffer warning,1: Receive FIFO is buffer warning (3 unread.." newline rbitfld.byte 0x00 5. "RFFST,Receive FIFO Full Status Flag" "0: Receive FIFO is not full,1: Receive FIFO is full (4 unread messages)" bitfld.byte 0x00 4. "RFMLF,Receive FIFO Message Lost Flag" "0: No receive FIFO message lost has occurred,1: Receive FIFO message lost has occurred" newline rbitfld.byte 0x00 1.--3. "RFUST,Receive FIFO Unread Message Number Status" "0: No unread message,1: 1 unread message,2: 2 unread messages,3: 3 unread messages,4: 4 unread messages,?..." bitfld.byte 0x00 0. "RFE,Receive FIFO Enable" "0: Receive FIFO disabled,1: Receive FIFO enabled" wgroup.byte 0x849++0x00 line.byte 0x00 "RFPCR,Receive FIFO Pointer Control Register" hexmask.byte 0x00 0.--7. 1. "RFPCR,The CPU-side pointer for the receive FIFO is incremented by writing FFh to RFPCR" group.byte 0x84A++0x00 line.byte 0x00 "TFCR,Transmit FIFO Control Register" rbitfld.byte 0x00 7. "TFEST,Transmit FIFO Empty Status" "0: Unsent message in transmit FIFO,1: No unsent message in transmit FIFO" rbitfld.byte 0x00 6. "TFFST,Transmit FIFO Full Status" "0: Transmit FIFO is not full,1: Transmit FIFO is full (4 unsent messages)" newline rbitfld.byte 0x00 1.--3. "TFUST,Transmit FIFO Unsent Message Number Status" "0: No unsent message,1: 1 unsent message,2: 2 unsent messages,3: 3 unsent messages,4: 4 unsent messages,?..." bitfld.byte 0x00 0. "TFE,Transmit FIFO Enable" "0: Transmit FIFO disabled,1: Transmit FIFO enabled" wgroup.byte 0x84B++0x00 line.byte 0x00 "TFPCR,Transmit FIFO Pointer Control Register" hexmask.byte 0x00 0.--7. 1. "TFPCR,The CPU-side pointer for the transmit FIFO is incremented by writing FFh to TFPCR" group.byte 0x84C++0x00 line.byte 0x00 "EIER,Error Interrupt Enable Register" bitfld.byte 0x00 7. "BLIE,Bus Lock Interrupt Enable" "0: Bus lock interrupt disabled,1: Bus lock interrupt enabled" bitfld.byte 0x00 6. "OLIE,Overload Frame Transmit Interrupt Enable" "0: Overload frame transmit interrupt disabled,1: Overload frame transmit interrupt enabled" newline bitfld.byte 0x00 5. "ORIE,Overrun Interrupt Enable" "0: Receive overrun interrupt disabled,1: Receive overrun interrupt enabled" bitfld.byte 0x00 4. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-off recovery interrupt disabled,1: Bus-off recovery interrupt enabled" newline bitfld.byte 0x00 3. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-off entry interrupt disabled,1: Bus-off entry interrupt enabled" bitfld.byte 0x00 2. "EPIE,Error-Passive Interrupt Enable" "0: Error-passive interrupt disabled,1: Error-passive interrupt enabled" newline bitfld.byte 0x00 1. "EWIE,Error-Warning Interrupt Enable" "0: Error-warning interrupt disabled,1: Error-warning interrupt enabled" bitfld.byte 0x00 0. "BEIE,Bus Error Interrupt Enable" "0: Bus error interrupt disabled,1: Bus error interrupt enabled" group.byte 0x84D++0x00 line.byte 0x00 "EIFR,Error Interrupt Factor Judge Register" bitfld.byte 0x00 7. "BLIF,Bus Lock Detect Flag" "0: No bus lock detected,1: Bus lock detected" bitfld.byte 0x00 6. "OLIF,Overload Frame Transmission Detect Flag" "0: No overload frame transmission detected,1: Overload frame transmission detected" newline bitfld.byte 0x00 5. "ORIF,Receive Overrun Detect Flag" "0: No receive overrun detected,1: Receive overrun detected" bitfld.byte 0x00 4. "BORIF,Bus-Off Recovery Detect Flag" "0: No bus-off recovery detected,1: Bus-off recovery detected" newline bitfld.byte 0x00 3. "BOEIF,Bus-Off Entry Detect Flag" "0: No bus-off entry detected,1: Bus-off entry detected" bitfld.byte 0x00 2. "EPIF,Error-Passive Detect Flag" "0: No error-passive detected,1: Error-passive detected" newline bitfld.byte 0x00 1. "EWIF,Error-Warning Detect Flag" "0: No error-warning detected,1: Error-warning detected" bitfld.byte 0x00 0. "BEIF,Bus Error Detect Flag" "0: No bus error detected,1: Bus error detected" rgroup.byte 0x84E++0x00 line.byte 0x00 "RECR,Receive Error Count Register" hexmask.byte 0x00 0.--7. 1. "RECR,Receive error count functionRECR increments or decrements the counter value according to the error status of the CAN module during reception" rgroup.byte 0x84F++0x00 line.byte 0x00 "TECR,Transmit Error Count Register" hexmask.byte 0x00 0.--7. 1. "TECR,Transmit error count functionTECR increments or decrements the counter value according to the error status of the CAN module during transmission" group.byte 0x850++0x00 line.byte 0x00 "ECSR,Error Code Store Register" bitfld.byte 0x00 7. "EDPM,Error Display Mode Select" "0: Output of first detected error code,1: Output of accumulated error code" bitfld.byte 0x00 6. "ADEF,ACK Delimiter Error Flag" "0: No ACK delimiter error detected,1: ACK delimiter error detected" newline bitfld.byte 0x00 5. "BE0F,Bit Error (dominant) Flag" "0: No bit error (dominant) detected,1: Bit error (dominant) detected" bitfld.byte 0x00 4. "BE1F,Bit Error (recessive) Flag" "0: No bit error (recessive) detected,1: Bit error (recessive) detected" newline bitfld.byte 0x00 3. "CEF,CRC Error Flag" "0: No CRC error detected,1: CRC error detected" bitfld.byte 0x00 2. "AEF,ACK Error Flag" "0: No ACK error detected,1: ACK error detected" newline bitfld.byte 0x00 1. "FEF,Form Error Flag" "0: No form error detected,1: Form error detected" bitfld.byte 0x00 0. "SEF,Stuff Error Flag" "0: No stuff error detected,1: Stuff error detected" group.byte 0x851++0x00 line.byte 0x00 "CSSR,Channel Search Support Register" hexmask.byte 0x00 0.--7. 1. "CSSR,When the value for the channel search is input the channel number is output to MSSR" rgroup.byte 0x852++0x00 line.byte 0x00 "MSSR,Mailbox Search Status Register" bitfld.byte 0x00 7. "SEST,Search Result Status" "0: Search result found,1: No search result" bitfld.byte 0x00 0.--4. "MBNST,Search Result Mailbox Number Status These bits output the smallest mailbox number that is searched in each mode of MSMR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x853++0x00 line.byte 0x00 "MSMR,Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. "MBSM,Mailbox Search Mode Select" "0: Receive mailbox search mode,1: Transmit mailbox search mode,2: Message lost search mode,3: Channel search mode" rgroup.word 0x854++0x01 line.word 0x00 "TSR,Time Stamp Register" hexmask.word 0x00 0.--15. 1. "TSR,Free-running counter value for the time stamp function" group.word 0x856++0x01 line.word 0x00 "AFSR,Acceptance Filter Support Register" hexmask.word 0x00 0.--15. 1. "AFSR,After the standard ID of a received message is written the value converted for data table search can be" group.byte 0x858++0x00 line.byte 0x00 "TCR,Test Control Register" bitfld.byte 0x00 1.--2. "TSTM,CAN Test Mode Select" "0: Other than CAN test mode,1: Listen-only mode,2: Self-test mode 0 (external loopback),3: Self-test mode 1 (internal loopback)" bitfld.byte 0x00 0. "TSTE,CAN Test Mode Enable" "0: CAN test mode disabled,1: CAN test mode enabled" tree.end repeat.end tree.end tree "CRC (CRC Calculator)" base ad:0x40074000 group.byte 0x00++0x00 line.byte 0x00 "CRCCR0,CRC Control Register0" bitfld.byte 0x00 7. "DORCLR,CRCDOR Register Clear" "0: No effect,1: Clears the CRCDOR register" bitfld.byte 0x00 6. "LMS,CRC Calculation Switching" "0: Generates CRC for LSB first communication,1: Generates CRC for MSB first communication" bitfld.byte 0x00 0.--2. "GPS,CRC Generating Polynomial Switching" "0: No calculation is executed,1: 8-bit CRC-8 (X8 + X2 + X + 1),2: 16-bit CRC-16 (X16 + X15 + X2 + 1),3: 16-bit CRC-CCITT (X16 + X12 + X5 + 1),4: 32-bit CRC-32..,5: 32-bit CRC-32C (X32+X28+X27+X26+..,?..." group.byte 0x01++0x00 line.byte 0x00 "CRCCR1,CRC Control Register1" bitfld.byte 0x00 7. "CRCSEN,Snoop enable bit" "0: Disabled,1: Enabled" bitfld.byte 0x00 6. "CRCSWR,Snoop-on-write/read switch bit" "0: Snoop-on-read,1: Snoop-on" group.long 0x04++0x03 line.long 0x00 "CRCDIR,CRC Data Input Register" hexmask.long 0x00 0.--31. 1. "CRCDIR,Calculation input Data (Case of CRC-32 CRC-32C )" group.byte 0x04++0x00 line.byte 0x00 "CRCDIR_BY,CRC Data Input Register (byte access)" hexmask.byte 0x00 0.--7. 1. "CRCDIR_BY,Calculation input Data ( Case of CRC-8 CRC-16 or CRC-CCITT )" group.long 0x08++0x03 line.long 0x00 "CRCDOR,CRC Data Output Register" hexmask.long 0x00 0.--31. 1. "CRCDOR,Calculation output Data (Case of CRC-32 CRC-32C )" group.word 0x08++0x01 line.word 0x00 "CRCDOR_HA,CRC Data Output Register (halfword access)" hexmask.word 0x00 0.--15. 1. "CRCDOR_HA,Calculation output Data (Case of CRC-16 or CRC-CCITT )" group.byte 0x08++0x00 line.byte 0x00 "CRCDOR_BY,CRC Data Output Register(byte access)" hexmask.byte 0x00 0.--7. 1. "CRCDOR_BY,Calculation output Data (Case of CRC-8 )" group.word 0x0C++0x01 line.word 0x00 "CRCSAR,Snoop Address Register" hexmask.word 0x00 0.--13. 1. "CRCSA,snoop address bitSet the I/O register address to snoop" tree.end tree "CTSU (Capacitive Touch Sensing Unit)" base ad:0x40081000 group.byte 0x00++0x00 line.byte 0x00 "CTSUCR0,CTSU Control Register 0" bitfld.byte 0x00 7. "CTSUTXVSEL,CTSU Transmission power supply selection" "0: Select Vcc,1: Select internal logic power supply" bitfld.byte 0x00 4. "CTSUINIT,CTSU Control Block Initialization" "0: Writing a 0 has no effect this bit is read as 0,1: initializes the CTSU control block and.." newline bitfld.byte 0x00 2. "CTSUSNZ,CTSU Wait State Power-Saving Enable" "0: Power-saving function during wait state is..,1: Power-saving function during wait state is.." bitfld.byte 0x00 1. "CTSUCAP,CTSU Measurement Operation Start Trigger Select" "0: Software trigger,1: External trigger" newline bitfld.byte 0x00 0. "CTSUSTRT,CTSU Measurement Operation Start" "0: Measurement operation stops,1: Measurement operation starts" group.byte 0x01++0x00 line.byte 0x00 "CTSUCR1,CTSU Control Register 1" bitfld.byte 0x00 6.--7. "CTSUMD,CTSU Measurement Mode Select" "0: Self-capacitance single scan mode,1: Self-capacitance multi-scan mode,2: Mutual capacitance simple scan mode,3: Mutual capacitance full scan mode" bitfld.byte 0x00 4.--5. "CTSUCLK,CTSU Operating Clock Select" "0: PCLK,1: PCLK/2 (PCLK divided by 2),2: PCLK/2 (PCLK divided by 4),3: Setting prohibited" newline bitfld.byte 0x00 3. "CTSUATUNE1,CTSU Power Supply Capacity Adjustment" "0: Normal output,1: High-current output" bitfld.byte 0x00 1. "CTSUCSW,CTSU LPF Capacitance Charging Control" "0: Turned off capacitance switch,1: Turned on capacitance switch" newline bitfld.byte 0x00 0. "CTSUPON,CTSU Power Supply Enable" "0: Powered off the CTSU,1: Powered on the CTSU" group.byte 0x02++0x00 line.byte 0x00 "CTSUSDPRS,CTSU Synchronous Noise Reduction Setting Register" bitfld.byte 0x00 6. "CTSUSOFF,CTSU High-Pass Noise Reduction Function Off Setting" "0: High-pass noise reduction function turned on,1: High-pass noise reduction function turned off" bitfld.byte 0x00 4.--5. "CTSUPRMODE,CTSU Base Period and Pulse Count Setting" "0: 510 pulses,1: 126 pulses,2: 62 pulses (recommended setting value),3: Setting prohibited" newline bitfld.byte 0x00 0.--3. "CTSUPRRATIO,CTSU Measurement Time and Pulse Count AdjustmentRecommended setting: 3 (0011b)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x03++0x00 line.byte 0x00 "CTSUSST,CTSU Sensor Stabilization Wait Control Register" hexmask.byte 0x00 0.--7. 1. "CTSUSST,CTSU Sensor Stabilization Wait ControlNOTE: The value of these bits should be fixed to 00010000b" group.byte 0x04++0x00 line.byte 0x00 "CTSUMCH0,CTSU Measurement Channel Register 0" bitfld.byte 0x00 0.--4. "CTSUMCH0,CTSU Measurement Channel 0.Note1: Writing to these bits is only enabled in self-capacitance single scan mode (CTSUCR1.CTSUMD[1:0] bits = 00b).Note2: If the value of CTSUMCH0 was set to b'11111 in mode other than self-capacitor single scan mode.." "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.byte 0x05++0x00 line.byte 0x00 "CTSUMCH1,CTSU Measurement Channel Register 1" bitfld.byte 0x00 0.--4. "CTSUMCH1,CTSU Measurement Channel 1 Note1: If the value of CTSUMCH1 was set to b'11111 the measurement is stopped" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x06++0x00 line.byte 0x00 "CTSUCHAC0,CTSU Channel Enable Control Register 0" hexmask.byte 0x00 0.--7. 1. "CTSUCHAC0,CTSU Channel Enable Control 0.0: Not measurement target1: Measurement targetNote: CTSUCHAC0[0] corresponds to TS00 and CTSUCHAC0[7] corresponds to TS07" group.byte 0x07++0x00 line.byte 0x00 "CTSUCHAC1,CTSU Channel Enable Control Register 1" hexmask.byte 0x00 0.--7. 1. "CTSUCHAC1,CTSU Channel Enable Control 1.0: Not measurement target1: Measurement targetNote: CTSUCHAC1[0] corresponds to TS08 and CTSUCHAC1[7] corresponds to TS15" group.byte 0x08++0x00 line.byte 0x00 "CTSUCHAC2,CTSU Channel Enable Control Register 2" group.byte 0x0B++0x00 line.byte 0x00 "CTSUCHTRC0,CTSU Channel Transmit/Receive Control Register 0" abitfld.byte 0x00 0.--7. "CTSUCHTRC0,CTSU Channel Transmit/Receive Control 0CTSUCHTRC0[0] corresponds to TS00 and CTSUCHTRC0[7] corresponds to TS07" "0x00=0: Reception /,0x01=1: Transmission )" group.byte 0x0C++0x00 line.byte 0x00 "CTSUCHTRC1,CTSU Channel Transmit/Receive Control Register 1" abitfld.byte 0x00 0.--7. "CTSUCHTRC1,CTSU Channel Transmit/Receive Control 1CTSUCHTRC1[0] corresponds to TS08 and CTSUCHTRC1[7] corresponds to TS15" "0x00=0: Reception /,0x01=1: Transmission )" group.byte 0x0D++0x00 line.byte 0x00 "CTSUCHTRC2,CTSU Channel Transmit/Receive Control Register 2" group.byte 0x10++0x00 line.byte 0x00 "CTSUDCLKC,CTSU High-Pass Noise Reduction Control Register" bitfld.byte 0x00 4.--5. "CTSUSSCNT,CTSU Diffusion Clock Mode ControlNOTE: This bit should be set to 11b" "0,1,2,3" bitfld.byte 0x00 0.--1. "CTSUSSMOD,CTSU Diffusion Clock Mode SelectNOTE: This bit should be set to 00b" "0,1,2,3" group.byte 0x11++0x00 line.byte 0x00 "CTSUST,CTSU Status Register" rbitfld.byte 0x00 7. "CTSUPS,CTSU Mutual Capacitance Status Flag" "0: First measurement,1: Second measurement" bitfld.byte 0x00 6. "CTSUROVF,CTSU Reference Counter Overflow Flag" "0: No overflow,1: An overflow" newline bitfld.byte 0x00 5. "CTSUSOVF,CTSU Sensor Counter Overflow Flag" "0: No overflow,1: An overflow" rbitfld.byte 0x00 4. "CTSUDTSR,CTSU Data Transfer Status Flag" "0: Measurement result has been,1: Measurement result has not been" newline rbitfld.byte 0x00 0.--2. "CTSUSTC,CTSU Measurement Status Counter" "0: Status 0,1: Status 1,2: Status 2,3: Status 3,4: Status 4,5: Status 5,?..." group.word 0x12++0x01 line.word 0x00 "CTSUSSC,CTSU High-Pass Noise Reduction Spectrum Diffusion Control Register" bitfld.word 0x00 8.--11. "CTSUSSDIV,CTSU Spectrum Diffusion Frequency Division Setting" "0: 4.00 <= fb,1: 2.00 <= fb < 4.00,2: 1.33 <= fb < 2.00,3: 1.00 <= fb < 1.33,4: 0.80 <= fb < 1.00,5: 0.67 <= fb < 0.80,6: 0.57 <= fb < 0.67,7: 0.50 <= fb < 0.57,8: 0.44 <= fb < 0.50,9: 0.40 <= fb < 0.44,10: 0.36 <= fb < 0.40,11: 0.33 <= fb < 0.36,12: 0.31 <= fb < 0.33,13: 0.29 <= fb < 0.31,14: 0.27 <= fb < 0.29,15: fb < 0.27" group.word 0x14++0x01 line.word 0x00 "CTSUSO0,CTSU Sensor Offset Register 0" bitfld.word 0x00 10.--15. "CTSUSNUM,CTSU Measurement Count Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.word 0x00 0.--9. 1. "CTSUSO,CTSU Sensor Offset AdjustmentCurrent offset amount is CTSUSO ( 0 to 1023 )" group.word 0x16++0x01 line.word 0x00 "CTSUSO1,CTSU Sensor Offset Register 1" bitfld.word 0x00 13.--14. "CTSUICOG,CTSU ICO Gain Adjustment" "0: 100% gain,1: 66% gain,2: 50% gain,3: 40% gain" bitfld.word 0x00 8.--12. "CTSUSDPA,CTSU Base Clock SettingOperating clock divided by ( CTSUSDPA + 1 ) x 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.word.byte 0x00 0.--7. 1. "CTSURICOA,CTSU Reference ICO Current AdjustmentCurrent offset amount is CTSUSO ( 0 to 255 )" rgroup.word 0x18++0x01 line.word 0x00 "CTSUSC,CTSU Sensor Counter" hexmask.word 0x00 0.--15. 1. "CTSUSC,CTSU Sensor CounterThese bits indicate the measurement result of the CTSU" rgroup.word 0x1A++0x01 line.word 0x00 "CTSURC,CTSU Reference Counter" hexmask.word 0x00 0.--15. 1. "CTSURC,CTSU Reference Counter" rgroup.word 0x1C++0x01 line.word 0x00 "CTSUERRS,CTSU Error Status Register" bitfld.word 0x00 15. "CTSUICOMP,TSCAP Voltage Error Monitor" "0: Normal TSCAP voltage,1: Abnormal TSCAP voltage" tree.end tree "DAC12 (12-bit D/A Converter)" base ad:0x4005E000 repeat 2. (strings "0" "1" )(list 0x0 0x2 ) group.word ($2+0x00)++0x01 line.word 0x00 "DADR$1,D/A Data Register" hexmask.word 0x00 0.--15. 1. "DADR,D/A Data RegisterNOTE: When DADPR.DPSEL = 0 the high-order 4 bits are fixed to" repeat.end group.byte 0x04++0x00 line.byte 0x00 "DACR,D/A Control Register" bitfld.byte 0x00 7. "DAOE1,D/A Output Enable 1" "0: Analog output of channel 1 (DA1) is disabled,1: D/A conversion of channel 1 is enabled" bitfld.byte 0x00 6. "DAOE0,D/A Output Enable 0" "0: Analog output of channel 0 (DA0) is disabled,1: D/A conversion of channel 0 is enabled" newline bitfld.byte 0x00 5. "DAE,D/A Enable" "0: D/A conversion is independently controlled on..,1: D/A conversion on channels 0 and 1 is.." group.byte 0x05++0x00 line.byte 0x00 "DADPR,DADRm Format Select Register" bitfld.byte 0x00 7. "DPSEL,DADRm Format Select" "0: Right justified format,1: Left justified format" group.byte 0x06++0x00 line.byte 0x00 "DAADSCR,D/A-A/D Synchronous Start Control Register" bitfld.byte 0x00 7. "DAADST,D/A-A/D Synchronous Conversion" "0: D/A converter operation does not synchronize..,1: D/A converter operation synchronizes with A/D.." group.byte 0x08++0x00 line.byte 0x00 "DAAMPCR,D/A Output Amplifier Control Register" bitfld.byte 0x00 7. "DAAMP1,Amplifier Control 1" "0: Output amplifier of channel 1 is not used,1: Output amplifier of channel 1 is used" bitfld.byte 0x00 6. "DAAMP0,Amplifier Control 0" "0: Output amplifier of channel 0 is not used,1: Output amplifier of channel 0 is used" group.byte 0x101C++0x00 line.byte 0x00 "DAASWCR,D/A Amplifier Stabilization Wait Control Register" bitfld.byte 0x00 7. "DAASW1,D/A Amplifier Stabilization Wait 1" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.." bitfld.byte 0x00 6. "DAASW0,D/A Amplifier Stabilization Wait 0" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.." tree.end tree "DBG (Debug Function)" base ad:0x4001B000 rgroup.long 0x00++0x03 line.long 0x00 "DBGSTR,Debug Status Register" bitfld.long 0x00 29. "CDBGPWRUPACK,Debug power-up acknowledge" "0: Debug power-up request is not acknowledged,1: Debug power-up request is acknowledged" bitfld.long 0x00 28. "CDBGPWRUPREQ,Debug power-up request" "0: OCD is not requesting debug power-up,1: OCD is requesting debug power-up" group.long 0x10++0x03 line.long 0x00 "DBGSTOPCR,Debug Stop Control Register" bitfld.long 0x00 25. "DBGSTOP_RECCR,Mask bit for RAM ECC error reset/interrupt" "0: Enable RAM ECC error reset/interrupt,1: Mask RAM ECC error reset/interrupt" bitfld.long 0x00 24. "DBGSTOP_RPER,Mask bit for RAM parity error reset/interrupt" "0: Enable RAM parity error reset/interrupt,1: Mask RAM parity error reset/interrupt" newline bitfld.long 0x00 16.--18. "DBGSTOP_LVD,b18: Mask bit for LVD2 reset/interrupt (0:enable / 1:Mask)b17: Mask bit for LVD1 reset/interrupt (0:enable / 1:Mask)b16: Mask bit for LVD0 reset (0:enable / 1:Mask)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 1. "DBGSTOP_WDT,Mask bit for WDT reset/interrupt" "0: Mask WDT reset/interrupt,1: Enable WDT reset" newline bitfld.long 0x00 0. "DBGSTOP_IWDT,Mask bit for IWDT reset/interrupt" "0: Mask IWDT reset/interrupt,1: Enable IWDT reset" group.long 0x20++0x03 line.long 0x00 "TRACECTR,Trace Control Register" bitfld.long 0x00 31. "ENETBFULL,Enable bit for halt request by ETB full" "0: ETB full does not cause CPU halt,1: ETB full cause CPU halt" tree.end tree "DMA (DMAC Module Activation)" base ad:0x40005200 group.byte 0x00++0x00 line.byte 0x00 "DMAST,DMA Module Activation Register" bitfld.byte 0x00 0. "DMST,DMAC Operation Enable" "0: DMAC activation is disabled,1: DMAC activation is enabled" tree.end tree "DMAC (Direct Memory Access Controller)" repeat 8. (list 0. 1. 2. 3. 4. 5. 6. 7.) (list ad:0x40005000 ad:0x40005040 ad:0x40005080 ad:0x400050C0 ad:0x40005100 ad:0x40005140 ad:0x40005180 ad:0x400051C0) tree "DMAC$1" base $2 group.long 0x00++0x03 line.long 0x00 "DMSAR,DMA Source Address Register" hexmask.long 0x00 0.--31. 1. "DMSAR,Specifies the transfer source start address" group.long 0x04++0x03 line.long 0x00 "DMDAR,DMA Destination Address Register" hexmask.long 0x00 0.--31. 1. "DMDAR,Specifies the transfer destination start address" group.long 0x08++0x03 line.long 0x00 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x00 16.--25. 1. "DMCRAH,Upper bits of transfer count" hexmask.long.word 0x00 0.--15. 1. "DMCRAL,Lower bits of transfer count" group.word 0x0C++0x01 line.word 0x00 "DMCRB,DMA Block Transfer Count Register" hexmask.word 0x00 0.--15. 1. "DMCRB,Specifies the number of block transfer operations or repeat transfer operations" group.word 0x10++0x01 line.word 0x00 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x00 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,2: Block transfer,3: Setting prohibited" bitfld.word 0x00 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or..,1: Specify source as the repeat area or block area,2: Do not specify repeat area or block area,3: Setting prohibited" newline bitfld.word 0x00 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,2: 32 bits,3: Setting prohibited" bitfld.word 0x00 0.--1. "DCTG,Transfer Request Source Select" "0: Software,1: Interrupts from peripheral modules or..,?..." group.byte 0x13++0x00 line.byte 0x00 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x00 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x00 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x00 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x00 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x00 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable" group.word 0x14++0x01 line.word 0x00 "DMAMD,DMA Address Mode Register" bitfld.word 0x00 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,2: Incremented address,3: Decremented address" bitfld.word 0x00 8.--12. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x00 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,2: Incremented address,3: Decremented address" bitfld.word 0x00 0.--4. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x18++0x03 line.long 0x00 "DMOFR,DMA Offset Register" hexmask.long 0x00 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination" group.byte 0x1C++0x00 line.byte 0x00 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x00 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" group.byte 0x1D++0x00 line.byte 0x00 "DMREQ,DMA Software Start Register" bitfld.byte 0x00 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started..,1: Do not clear SWREQ bit after DMA transfer is.." bitfld.byte 0x00 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer" group.byte 0x1E++0x00 line.byte 0x00 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x00 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended,1: DMAC is operating" bitfld.byte 0x00 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred" newline bitfld.byte 0x00 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." tree.end repeat.end tree.end tree "DOC (Data Operation Circuit)" base ad:0x40054100 group.byte 0x00++0x00 line.byte 0x00 "DOCR,DOC Control Register" bitfld.byte 0x00 6. "DOPCFCL,DOPCF Clear" "0: Maintains the DOPCF flag state,1: Clears the DOPCF flag" rbitfld.byte 0x00 5. "DOPCF,Data Operation Circuit FlagIndicates the result of an operation" "0,1" bitfld.byte 0x00 2. "DCSEL,Detection Condition Select" "0: DOPCF is set when data mismatch is detected,1: DOPCF is set when data match is detected" bitfld.byte 0x00 0.--1. "OMS,Operating Mode Select" "0: Data comparison mode,1: Data addition mode,2: Data subtraction mode,3: Setting prohibited" group.word 0x02++0x01 line.word 0x00 "DODIR,DOC Data Input Register" hexmask.word 0x00 0.--15. 1. "DODIR,16-bit read-write register in which 16-bit data for use in the operations are stored" group.word 0x04++0x01 line.word 0x00 "DODSR,DOC Data Setting Register" hexmask.word 0x00 0.--15. 1. "DODSR,This register stores 16-bit data for use as a reference in data comparison mode" tree.end tree "DTC (Data Transfer Controller)" base ad:0x40005400 group.byte 0x00++0x00 line.byte 0x00 "DTCCR,DTC Control Register" bitfld.byte 0x00 4. "RRS,DTC Transfer Information Read Skip Enable" "0: Do not skip transfer information read,1: Skip transfer information read when vector.." group.long 0x04++0x03 line.long 0x00 "DTCVBR,DTC Vector Base Register" hexmask.long 0x00 0.--31. 1. "DTCVBR,DTC Vector Base Address.Note: A value cannot be set in the lower-order 10 bits" group.byte 0x0C++0x00 line.byte 0x00 "DTCST,DTC Module Start Register" bitfld.byte 0x00 0. "DTCST,DTC Module Start" "0: DTC module stop,1: DTC module start" rgroup.word 0x0E++0x01 line.word 0x00 "DTCSTS,DTC Status Register" bitfld.word 0x00 15. "ACT,DTC Active Flag" "0: DTC transfer operation is not in progress,1: DTC transfer operation is in progress" hexmask.word.byte 0x00 0.--7. 1. "VECN,DTC-Activating Vector Number MonitoringThese bits indicate the vector number for the activating source when DTC transfer is in progress.The value is only valid if DTC transfer is in progress (the value of the ACT flag is 1)" tree.end tree "EDMAC0 (DMA Controller for the Ethernet Controller Channel 0)" base ad:0x40064000 group.long 0x00++0x03 line.long 0x00 "EDMR,EDMAC Mode Register" bitfld.long 0x00 6. "DE,Big Endian Mode/Little Endian ModeNOTE: This setting applies to data for the transmit/receive buffer" "0: Big endian mode,1: Little endian mode" bitfld.long 0x00 4.--5. "DL,Transmit/Receive DescriptorLength" "0: 16 bytes,1: 32 bytes,2: 64 bytes,3: 16 bytes" newline bitfld.long 0x00 0. "SWR,Software Reset" "0: no effect,1: the corresponding channels of the EDMAC and.." group.long 0x08++0x03 line.long 0x00 "EDTRR,EDMAC Transmit Request Register" bitfld.long 0x00 0. "TR,Transmit Request" "0: no effect,1: When 1 is written the EDMAC reads the.." group.long 0x10++0x03 line.long 0x00 "EDRRR,EDMAC Receive Request Register" bitfld.long 0x00 0. "RR,Receive Request" "0: Receive function is disabled,1: Receive descriptor is read and the receive.." group.long 0x18++0x03 line.long 0x00 "TDLAR,Transmit Descriptor List Start Address Register" hexmask.long 0x00 0.--31. 1. "TDLAR,The start address of the transmit descriptor list is set" group.long 0x20++0x03 line.long 0x00 "RDLAR,Receive Descriptor List Start Address Register" hexmask.long 0x00 0.--31. 1. "RDLAR,The start address of the receive descriptor list is set" group.long 0x28++0x03 line.long 0x00 "EESR,ETHERC/EDMAC Status Register" eventfld.long 0x00 30. "TWB,Write-Back Complete Flag" "0: Write-back has not been completed or no..,1: Write-back to the transmit descriptor has.." eventfld.long 0x00 26. "TABT,Transmit Abort Detect Flag" "0: Frame transmission has not been aborted or no..,1: Frame transmission has been aborted" newline eventfld.long 0x00 25. "RABT,Receive Abort Detect Flag" "0: Frame reception has not been aborted or no..,1: Frame reception has been aborted" eventfld.long 0x00 24. "RFCOF,Receive Frame Counter Overflow Flag" "0: Receive frame counter has not overflowed,1: Receive frame counter has overflowed" newline eventfld.long 0x00 23. "ADE,Address Error Flag" "0: Invalid memory address has not been detected..,1: Invalid memory address has been detected" rbitfld.long 0x00 22. "ECI,ETHERC Status Register Source FlagNOTE: When the source in the ETHERCn.ECSR register is cleared the ECI flag is also cleared" "0: ETHERC status interrupt source has not been..,1: ETHERC status interrupt source has been.." newline eventfld.long 0x00 21. "TC,Frame Transfer Complete Flag" "0: Transfer have not been completed or no..,1: All frames indicated by the transmit.." eventfld.long 0x00 20. "TDE,Transmit Descriptor Empty Flag" "0: The EDMAC detects that the transmit..,1: The EDMAC detects that the transmit.." newline eventfld.long 0x00 19. "TFUF,Transmit FIFO Underflow Flag" "0: Underflow has not occurred,1: Underflow has occurred" eventfld.long 0x00 18. "FR,Frame Receive Flag" "0: Frame has not been received,1: Frame has been received" newline eventfld.long 0x00 17. "RDE,Receive Descriptor Empty Flag" "0: The EDMAC detects that the receive descriptor..,1: The EDMAC detects that the receive descriptor.." eventfld.long 0x00 16. "RFOF,Receive FIFO Overflow Flag" "0: Overflow has not occurred,1: Overflow has occurred" newline eventfld.long 0x00 11. "CND,Carrier Not Detect Flag" "0: A carrier has been detected when transmission..,1: A carrier has not been detected during.." eventfld.long 0x00 10. "DLC,Loss of Carrier Detect Flag" "0: Loss of carrier has not been detected,1: Loss of carrier has been detected during.." newline eventfld.long 0x00 9. "CD,Late Collision Detect Flag" "0: Late collision has not been detected,1: Late collision has been detected during frame.." eventfld.long 0x00 8. "TRO,Transmit Retry Over Flag" "0: Transmit retry-over condition has not been..,1: Transmit retry-over condition has been detected" newline eventfld.long 0x00 7. "RMAF,Multicast Address Frame Receive Flag" "0: Multicast address frame has not been received,1: Multicast address frame has been received" eventfld.long 0x00 4. "RRF,Alignment Error Flag" "0: Alignment error has not been detected,1: Alignment error has been detected" newline eventfld.long 0x00 3. "RTLF,Frame-Too-Long Error Flag" "0: Frame-too-long error has not been detected,1: Frame-too-long error has been detected" eventfld.long 0x00 2. "RTSF,Frame-Too-Short Error Flag" "0: Frame-too-short error has not been detected,1: Frame-too-short error has been detected" newline eventfld.long 0x00 1. "PRE,PHY-LSI Receive Error Flag" "0: PHY-LSI receive error has not been detected,1: PHY-LSI receive error has been detected" eventfld.long 0x00 0. "CERF,CRC Error Flag" "0: CRC error has not been detected,1: CRC error has been detected" group.long 0x30++0x03 line.long 0x00 "EESIPR,ETHERC/EDMAC Status Interrupt Enable Register" bitfld.long 0x00 30. "TWBIP,Write-Back Complete Interrupt Request Enable" "0: Write-back complete interrupt request is..,1: Write-back complete interrupt request is.." bitfld.long 0x00 26. "TABTIP,Transmit Abort Detect Interrupt Request Enable" "0: Transmit abort detect interrupt request is..,1: Transmit abort detect interrupt request is.." newline bitfld.long 0x00 25. "RABTIP,Receive Abort Detect Interrupt Request Enable" "0: Receive abort detect interrupt request is..,1: Receive abort detect interrupt request is.." bitfld.long 0x00 24. "RFCOFIP,Receive Frame Counter Overflow Interrupt Request Enable" "0: Receive frame counter overflow interrupt..,1: Receive frame counter overflow interrupt.." newline bitfld.long 0x00 23. "ADEIP,Address Error Interrupt Request Enable" "0: Address error interrupt request is disabled,1: Address error interrupt request is enabled" bitfld.long 0x00 22. "ECIIP,ETHERC Status Register Source Interrupt Request Enable" "0: ETHERC status interrupt request is disabled,1: ETHERC status interrupt request is enabled" newline bitfld.long 0x00 21. "TCIP,Frame Transfer Complete Interrupt Request Enable" "0: Frame transmission complete interrupt request..,1: Frame transmission complete interrupt request.." bitfld.long 0x00 20. "TDEIP,Transmit Descriptor Empty Interrupt Request Enable" "0: Transmit descriptor empty interrupt request..,1: Transmit descriptor empty interrupt request.." newline bitfld.long 0x00 19. "TFUFIP,Transmit FIFO Underflow Interrupt Request Enable" "0: Underflow interrupt request is disabled,1: Underflow interrupt request is enabled" bitfld.long 0x00 18. "FRIP,Frame Receive Interrupt Request Enable" "0: Frame reception interrupt request is disabled,1: Frame reception interrupt request is enabled" newline bitfld.long 0x00 17. "RDEIP,Receive Descriptor Empty Interrupt Request Enable" "0: Receive descriptor empty interrupt request is..,1: Receive descriptor empty interrupt request is.." bitfld.long 0x00 16. "RFOFIP,Receive FIFO Overflow Interrupt Request Enable" "0: Overflow interrupt request is disabled,1: Overflow interrupt request is enabled" newline bitfld.long 0x00 11. "CNDIP,Carrier Not Detect Interrupt Request Enable" "0: Carrier not detect interrupt request is..,1: Carrier not detect interrupt request is enabled" bitfld.long 0x00 10. "DLCIP,Loss of Carrier Detect Interrupt Request Enable" "0: Loss of carrier detect interrupt request is..,1: Loss of carrier detect interrupt request is.." newline bitfld.long 0x00 9. "CDIP,Late Collision Detect Interrupt Request Enable" "0: Late collision detect interrupt request is..,1: Late collision detect interrupt request is.." bitfld.long 0x00 8. "TROIP,Transmit Retry Over Interrupt Request Enable" "0: Transmit retry over interrupt request is..,1: Transmit retry over interrupt request is.." newline bitfld.long 0x00 7. "RMAFIP,Multicast Address Frame Receive Interrupt Request Enable" "0: Multicast address frame receive interrupt..,1: Multicast address frame receive interrupt.." bitfld.long 0x00 4. "RRFIP,Alignment Error Interrupt Request Enable" "0: Alignment error interrupt request is disabled,1: Alignment error interrupt request is enabled" newline bitfld.long 0x00 3. "RTLFIP,Frame-Too-Long Error Interrupt Request Enable" "0: Frame-too-long error interrupt request is..,1: Frame-too-long error interrupt request is.." bitfld.long 0x00 2. "RTSFIP,Frame-Too-Short Error Interrupt Request Enable" "0: Frame-too-short error interrupt request is..,1: Frame-too-short error interrupt request is.." newline bitfld.long 0x00 1. "PREIP,PHY-LSI Receive Error Interrupt Request Enable" "0: PHY-LSI receive error interrupt request is..,1: PHY-LSI receive error interrupt request is.." bitfld.long 0x00 0. "CERFIP,CRC Error Interrupt Request Enable" "0: CRC error interrupt request is disabled,1: CRC error interrupt request is enabled" group.long 0x38++0x03 line.long 0x00 "TRSCER,ETHERC/EDMAC Transmit/Receive Status Copy Enable Register" bitfld.long 0x00 7. "RMAFCE,RMAF Flag Copy Enable" "0: The EDMACn.EESR.RMAF flag status is reflected..,1: The EDMACn.EESR.RMAF flag status is not.." bitfld.long 0x00 4. "RRFCE,RRF Flag Copy Enable" "0: The EDMACn.EESR.RRF flag status is reflected..,1: The EDMACn.EESR.RRF flag status is not.." group.long 0x40++0x03 line.long 0x00 "RMFCR,Missed-Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. "MFC,Missed-Frame CounterThese bits indicate the number of frames that are discarded and not transferred to the receive buffer during reception" group.long 0x48++0x03 line.long 0x00 "TFTR,Transmit FIFO Threshold Register" abitfld.long 0x00 0.--10. "TFT,Transmit FIFO Threshold00Dh to" "0x00D=13: 52 bytes,0x040=64: 256 bytes,0x100=256: 1024 bytes,0x200=512: 2048 bytes" group.long 0x50++0x03 line.long 0x00 "FDR,Transmit FIFO Threshold Register" bitfld.long 0x00 8.--12. "TFD,Receive FIFO Depth" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,15: 4096 bytes,?..." bitfld.long 0x00 0.--4. "RFD,Transmit FIFO Depth" "?,?,?,?,?,?,?,7: 2048 bytes,?..." group.long 0x58++0x03 line.long 0x00 "RMCR,Receive Method Control Register" bitfld.long 0x00 0. "RNR,Receive Request Reset" "0: EDRRR.RR bit (receive request bit) is set to..,1: EDRRR.RR bit (receive request bit) is not set.." group.long 0x64++0x03 line.long 0x00 "TFUCR,Transmit FIFO Underflow Counter" hexmask.long.word 0x00 0.--15. 1. "UNDER,Transmit FIFO Underflow CountThese bits indicate how many times the transmit FIFO has underflowed" group.long 0x68++0x03 line.long 0x00 "RFOCR,Receive FIFO Overflow Counter" hexmask.long.word 0x00 0.--15. 1. "OVER,Receive FIFO Overflow CountThese bits indicate how many times the receive FIFO has overflowed" group.long 0x6C++0x03 line.long 0x00 "IOSR,Independent Output Signal Setting Register" bitfld.long 0x00 0. "ELB,External Loopback Mode" "0: The ETn_EXOUT pin outputs low,1: The ETn_EXOUT pin outputs high" group.long 0x70++0x03 line.long 0x00 "FCFTR,Flow Control Start FIFO Threshold Setting Register" bitfld.long 0x00 16.--18. "RFFO,Receive FIFO Frame PAUSE Output Threshold(When ((RFFO+1)x2) receive frames have been stored in the receive FIFO.)" "0: When 2 receive frames have been stored in the..,1: When 4 receive frames have been stored in the..,2: When 6 receive frames have been stored in the..,3: When 8 receive frames have been stored in the..,4: When 10 receive frames have been stored in..,5: When 12 receive frames have been stored in..,6: When 14 receive frames have been stored in..,7: When 16 receive frames have been stored in.." bitfld.long 0x00 0.--2. "RFDO,Receive FIFO Data PAUSE Output Threshold(When (RFDO+1)x256-32 bytes of data is stored in the receive FIFO.)" "0: When 224 ( 256 - 32) bytes of data is stored..,1: When 480 ( 512 - 32) bytes of data is stored..,2: When 736 ( 768 - 32) bytes of data is stored..,3: When 992 (1024 - 32) bytes of data is stored..,4: When 1248 (1280 - 32) bytes of data is stored..,5: When 1504 (1536 - 32) bytes of data is stored..,6: When 1760 (1792 - 32) bytes of data is stored..,7: When 2016 (2048 - 32) bytes of data is stored.." group.long 0x78++0x03 line.long 0x00 "RPADIR,Receive Data Padding Insert Register" bitfld.long 0x00 16.--17. "PADS,Padding Size" "0: No padding is inserted,1: 1 byte is inserted,2: 2 bytes are inserted,3: 3 bytes are inserted" bitfld.long 0x00 0.--5. "PADR,Padding Slot" "0: Padding is inserted at the head of received..,?..." group.long 0x7C++0x03 line.long 0x00 "TRIMD,Transmit Interrupt Setting Register" bitfld.long 0x00 4. "TIM,Transmit Interrupt Mode" "0: Transmission complete interrupt mode,1: Write-back complete interrupt mode" bitfld.long 0x00 0. "TIS,Transmit Interrupt EnableSet the EESR.TWB flag to 1 in the mode selected by the TIM bit to notify an interrupt" "0: Transmit Interrupt is disabled,1: Transmit Interrupt is enabled" rgroup.long 0xC8++0x03 line.long 0x00 "RBWAR,Receive Buffer Write Address Register" hexmask.long 0x00 0.--31. 1. "RBWAR,Receive Buffer Write Address RegisterThe RBWAR register indicates the last address that the EDMAC has written data to when writing to the receive buffer.Refer to the address indicated by the RBWAR register to recognize which address in the receive.." rgroup.long 0xCC++0x03 line.long 0x00 "RDFAR,Receive Descriptor Fetch Address Register" hexmask.long 0x00 0.--31. 1. "RDFAR,Receive Descriptor Fetch Address RegisterThe RDFAR register indicates the start address of the last fetched receive descriptor when the EDMAC fetches descriptor information from the receive descriptor.Refer to the address indicated by the RDFAR.." rgroup.long 0xD4++0x03 line.long 0x00 "TBRAR,Transmit Buffer Read Address Register" hexmask.long 0x00 0.--31. 1. "TBRAR,Transmit Buffer Read Address RegisterThe TBRAR register indicates the last address that the EDMAC has read data from when reading data from the transmit buffer.Refer to the address indicated by the TBRAR register to recognize which address in the.." rgroup.long 0xD8++0x03 line.long 0x00 "TDFAR,Transmit Descriptor Fetch Address Register" hexmask.long 0x00 0.--31. 1. "TDFAR,Transmit Descriptor Fetch Address RegisterThe TDFAR register indicates the start address of the last fetched transmit descriptor when the EDMAC fetches descriptor information from the transmit descriptor.Refer to the address indicated by the TDFAR.." tree.end tree "ELC (Event Link Controller)" base ad:0x40041000 group.byte 0x00++0x00 line.byte 0x00 "ELCR,Event Link Controller Register" bitfld.byte 0x00 7. "ELCON,All Event Link Enable" "0: Disable ELC function,1: Enable ELC function" repeat 2. (strings "0" "1" )(list 0x0 0x2 ) group.byte ($2+0x02)++0x00 line.byte 0x00 "ELSEGR$1,Event Link Software Event Generation Register" bitfld.byte 0x00 7. "WI,ELSEGR Register Write Disable" "0: Enable writes to ELSEGR register,1: Disable writes to ELSEGR register" bitfld.byte 0x00 6. "WE,SEG Bit Write Enable" "0: Disable writes to SEG bit,1: Enable writes to SEG bit" bitfld.byte 0x00 0. "SEG,Software Event Generation" "0: Normal operation,1: Generate a software event" repeat.end repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x4 0x8 0xC 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.word ($2+0x10)++0x01 line.word 0x00 "ELSR$1,Event Link Setting Register" hexmask.word 0x00 0.--8. 1. "ELS,Event Link Select" repeat.end repeat 3. (strings "16" "17" "18" )(list 0x0 0x4 0x8 ) group.word ($2+0x50)++0x01 line.word 0x00 "ELSR$1,Event Link Setting Register" hexmask.word 0x00 0.--8. 1. "ELS,Event Link Select" repeat.end tree.end tree "ETHERC0 (Ethernet Controller Channel 0)" base ad:0x40064100 group.long 0x00++0x03 line.long 0x00 "ECMR,ETHERC Mode Register" bitfld.long 0x00 20. "TPC,PAUSE Frame Transmit" "0: PAUSE frame is transmitted even during a..,1: PAUSE frame is not transmitted during a PAUSE.." bitfld.long 0x00 19. "ZPF,0 Time PAUSE Frame Enable" "0: PAUSE frame that contains the pause_time..,1: PAUSE frame that contains the pause_time.." newline bitfld.long 0x00 18. "PFR,PAUSE Frame Receive Mode" "0: PAUSE frame is not transferred to the EDMAC,1: PAUSE frame is transferred to the EDMAC" bitfld.long 0x00 17. "RXF,Receive Flow Control Operating Mode" "0: PAUSE frame detection is disabled,1: PAUSE frame detection is enabled" newline bitfld.long 0x00 16. "TXF,Transmit Flow Control Operating Mode" "0: Automatic PAUSE frame transmission is..,1: Automatic PAUSE frame transmission is.." bitfld.long 0x00 12. "PRCEF,CRC Error Frame Receive Mode" "0: EDMAC is notified of a CRC error,1: EDMAC is not notified of a CRC error" newline bitfld.long 0x00 9. "MPDE,Magic Packet Detection Enable" "0: Magic Packet detection is disabled,1: Magic Packet detection is enabled" bitfld.long 0x00 6. "RE,Reception Enable" "0: Receive function is disabled,1: Receive function is enabled" newline bitfld.long 0x00 5. "TE,Transmission Enable" "0: Transmit function is disabled,1: Transmit function is enabled" bitfld.long 0x00 3. "ILB,Internal Loopback Mode" "0: Normal data transmission or reception is..,1: Data is looped back in the ETHERC when.." newline bitfld.long 0x00 2. "RTM,Bit Rate" "0: 10 Mbps,1: 100 Mbps" bitfld.long 0x00 1. "DM,Duplex Mode" "0: Half-duplex mode,1: Full-duplex mode" newline bitfld.long 0x00 0. "PRM,Promiscuous Mode" "0: Promiscuous mode is disabled,1: Promiscuous mode is enabled" group.long 0x08++0x03 line.long 0x00 "RFLR,Receive Frame Maximum Length Register" hexmask.long.word 0x00 0.--11. 1. "RFL,Receive Frame Maximum LengthThe set value becomes the maximum frame length" group.long 0x10++0x03 line.long 0x00 "ECSR,ETHERC Status Register" eventfld.long 0x00 5. "BFR,Continuous Broadcast Frame Reception Flag" "0: Continuous reception of broadcast frames has..,1: Continuous reception of broadcast frames has.." eventfld.long 0x00 4. "PSRTO,PAUSE Frame Retransmit Over Flag" "0: PAUSE frame retransmit count has not reached..,1: PAUSE frame retransmit count has reached the.." newline eventfld.long 0x00 2. "LCHNG,LCHNG Link Signal Change Flag" "0: Change in the ETn_LINKSTA signal has not been..,1: Change in the ETn_LINKSTA signal has been.." eventfld.long 0x00 1. "MPD,Magic Packet Detect Flag" "0: Magic Packet has not been detected,1: Magic Packet has been detected" newline eventfld.long 0x00 0. "ICD,False Carrier Detect Flag" "0: PHY-LSI has not detected a false carrier on..,1: PHY-LSI has detected a false carrier on the.." group.long 0x18++0x03 line.long 0x00 "ECSIPR,ETHERC Interrupt Enable Register" bitfld.long 0x00 5. "BFSIPR,Continuous Broadcast Frame Reception Interrupt Enable" "0: Notification of continuous broadcast frame..,1: Notification of continuous broadcast frame.." bitfld.long 0x00 4. "PSRTOIP,PAUSE Frame Retransmit Over Interrupt Enable" "0: Notification of PAUSE frame retransmit over..,1: Notification of PAUSE frame retransmit over.." newline bitfld.long 0x00 2. "LCHNGIP,LINK Signal Change Interrupt Enable" "0: Notification of ETn_LINKSTA signal change..,1: Notification of ETn_LINKSTA signal change.." bitfld.long 0x00 1. "MPDIP,Magic Packet Detect Interrupt Enable" "0: Notification of the Magic Packet detect..,1: Notification of the Magic Packet detect.." newline bitfld.long 0x00 0. "ICDIP,False Carrier Detect Interrupt Enable" "0: Notification of the false carrier detect..,1: Notification of the false carrier detect.." group.long 0x20++0x03 line.long 0x00 "PIR,PHY Interface Register" rbitfld.long 0x00 3. "MDI,MII/RMII Management Data-InThis bit indicates the level of the ETn_MDIO pin" "0,1" bitfld.long 0x00 2. "MDO,MII/RMII Management Data-OutThe MDO bit value is output from the ETn_MDIO pin when the MMD bit is 1 (write)" "0,1" newline bitfld.long 0x00 1. "MMD,MII/RMII Management Mode" "0: ,1: " bitfld.long 0x00 0. "MDC,MII/RMII Management Data ClockThe MDC bit value is output from the ETn_MDC pin to supply the management data clock to the MII or RMII" "0,1" rgroup.long 0x28++0x03 line.long 0x00 "PSR,PHY Status Register" bitfld.long 0x00 0. "LMON,ETn_LINKSTA Pin Status FlagThe link status can be read by connecting the link signal output from the PHY-LSI to the ETn_LINKSTA pin" "0,1" group.long 0x40++0x03 line.long 0x00 "RDMLR,Random Number Generation Counter Upper Limit Setting Register" hexmask.long.tbyte 0x00 0.--19. 1. "RMD,Random Number Generation Counter" group.long 0x50++0x03 line.long 0x00 "IPGR,IPG Register" bitfld.long 0x00 0.--4. "IPG,Interpacket Gap Range: 16bit time(0x00) - 140bit time(0x1F)" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,20: 96 bit time (initial value),?..." group.long 0x54++0x03 line.long 0x00 "APR,Automatic PAUSE Frame Register" hexmask.long.word 0x00 0.--15. 1. "AP,Automatic PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is automatically transmitted" wgroup.long 0x58++0x03 line.long 0x00 "MPR,Manual PAUSE Frame Register" hexmask.long.word 0x00 0.--15. 1. "MP,Manual PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is manually transmitted" rgroup.long 0x60++0x03 line.long 0x00 "RFCF,Received PAUSE Frame Counter" hexmask.long.byte 0x00 0.--7. 1. "RPAUSE,Received PAUSE Frame CountNumber of received PAUSE frames" group.long 0x64++0x03 line.long 0x00 "TPAUSER,PAUSE Frame Retransmit Count Setting Register" hexmask.long.word 0x00 0.--15. 1. "TPAUSE,Automatic PAUSE Frame Retransmit Setting" rgroup.long 0x68++0x03 line.long 0x00 "TPAUSECR,PAUSE Frame Retransmit Counter" group.long 0x6C++0x03 line.long 0x00 "BCFRR,Broadcast Frame Receive Count Setting Register" hexmask.long.word 0x00 0.--15. 1. "BCF,Broadcast Frame Continuous Receive Count Setting" group.long 0xC0++0x03 line.long 0x00 "MAHR,MAC Address Upper Bit Register" hexmask.long 0x00 0.--31. 1. "MAHR,MAC Address Upper Bit RegisterThe MAHR register sets the upper 32 bits (b47 to b16) of the 48-bit MAC address" group.long 0xC8++0x03 line.long 0x00 "MALR,MAC Address Lower Bit Register" hexmask.long.word 0x00 0.--15. 1. "MALR,MAC Address Lower Bit RegisterThe MALR register sets the lower 16 bits of the 48-bit MAC address" group.long 0xD0++0x03 line.long 0x00 "TROCR,Transmit Retry Over Counter Register" hexmask.long 0x00 0.--31. 1. "TROCR,Transmit Retry Over Counter RegisterThe TROCR register is a counter indicating the number of frames that fail to be retransmitted" group.long 0xD4++0x03 line.long 0x00 "CDCR,Late Collision Detect Counter Register" group.long 0xD8++0x03 line.long 0x00 "LCCR,Lost Carrier Counter Register" hexmask.long 0x00 0.--31. 1. "LCCR,Lost Carrier Counter RegisterThe LCCR register is a counter indicating the number of times a loss of carrier is detected during frame transmission" group.long 0xDC++0x03 line.long 0x00 "CNDCR,Carrier Not Detect Counter Register" hexmask.long 0x00 0.--31. 1. "CNDCR,Carrier Not Detect Counter RegisterThe CNDCR register is a counter indicating the number of times a carrier is not detected during preamble transmission" group.long 0xE4++0x03 line.long 0x00 "CEFCR,CRC Error Frame Receive Counter Register" hexmask.long 0x00 0.--31. 1. "CEFCR,CRC Error Frame Receive Counter RegisterThe CEFCR register is a counter indicating the number of received frames where a CRC error has been detected" group.long 0xE8++0x03 line.long 0x00 "FRECR,Frame Receive Error Counter Register" hexmask.long 0x00 0.--31. 1. "FRECR,Frame Receive Error Counter RegisterThe FRECR register is a counter indicating the number of times a frame receive error has occurred" group.long 0xEC++0x03 line.long 0x00 "TSFRCR,Too-Short Frame Receive Counter Register" hexmask.long 0x00 0.--31. 1. "TSFRCR,Too-Short Frame Receive Counter RegisterThe TSFRCR register is a counter indicating the number of times a short frame that is shorter than 64 bytes has been received" group.long 0xF0++0x03 line.long 0x00 "TLFRCR,Too-Long Frame Receive Counter Register" hexmask.long 0x00 0.--31. 1. "TLFRCR,Too-Long Frame Receive Counter RegisterThe TLFRCR register is a counter indicating the number of times a long frame that is longer than the RFLR register value has been received" group.long 0xF4++0x03 line.long 0x00 "RFCR,Received Alignment Error Frame Counter Register" hexmask.long 0x00 0.--31. 1. "RFCR,Received Alignment Error Frame Counter RegisterThe RFCR register is a counter indicating the number of times a frame has been received with the alignment error (frame is not an integral number of octets)" group.long 0xF8++0x03 line.long 0x00 "MAFCR,Multicast Address Frame Receive Counter Register" hexmask.long 0x00 0.--31. 1. "MAFCR,Multicast Address Frame Receive Counter RegisterThe MAFCR register is a counter indicating the number of times a frame where the multicast address is set has been received" tree.end tree "FCACHE (Flash Cache)" base ad:0x4001C000 group.word 0x100++0x01 line.word 0x00 "FCACHEE,Flash Cache Enable Register" bitfld.word 0x00 0. "FCACHEEN,FCACHE Enable" "0: FCACHE is disabled,1: FCACHE is enabled" group.word 0x104++0x01 line.word 0x00 "FCACHEIV,Flash Cache Invalidate Register" bitfld.word 0x00 0. "FCACHEIV,FCACHE Invalidation" "0: (Read)not in progress / (Write) no effect,1: (Read)in progress /(Write) Starting Cache.." group.byte 0x11C++0x00 line.byte 0x00 "FLWT,Flash Wait Cycle Register" bitfld.byte 0x00 0.--2. "FLWT,Flash Wait Cycle" "0: 0 wait (ICLK<=80MHz),1: 1 wait (80MHz < ICLK <=160MHz),2: 2 waits (160MHz < ICLK <=240MHz),?..." tree.end tree "GPT_ODC (PWM Delay Generation Circuit)" base ad:0x4007B000 group.word 0x00++0x01 line.word 0x00 "GTDLYCR,PWM Output Delay Control Register" bitfld.word 0x00 1. "DLYRST,PWM Delay Generation Circuit Reset" "0: Normal operation,1: Reset" bitfld.word 0x00 0. "DLLEN,DLL Operation Enable" "0: Disable DLL operation,1: Enable DLL operation" group.word 0x02++0x01 line.word 0x00 "GTDLYCR2,PWM Output Delay Control Register2" bitfld.word 0x00 11. "DLYEN3,PWM Delay Generation Circuit enable for channel 3" "0: Enable delay generation circuit of channel 3,1: Disable delay generation circuit of channel 3" bitfld.word 0x00 10. "DLYEN2,PWM Delay Generation Circuit enable for channel 2" "0: Enable delay generation circuit of channel 2,1: Disable delay generation circuit of channel 2" newline bitfld.word 0x00 9. "DLYEN1,PWM Delay Generation Circuit enable for channel 1" "0: Enable delay generation circuit of channel 1,1: Disable delay generation circuit of channel 1" bitfld.word 0x00 8. "DLYEN0,PWM Delay Generation Circuit enable for channel 0" "0: Enable delay generation circuit of channel 0,1: Disable delay generation circuit of channel 0" newline bitfld.word 0x00 3. "DLYBS3,PWM Delay Generation Circuit bypass for channel 3" "0: Bypass delay generation circuit of channel 3,1: Do not bypass delay generation circuit of.." bitfld.word 0x00 2. "DLYBS2,PWM Delay Generation Circuit bypass for channel 2" "0: Bypass delay generation circuit of channel 2,1: Do not bypass delay generation circuit of.." newline bitfld.word 0x00 1. "DLYBS1,PWM Delay Generation Circuit bypass for channel 1" "0: Bypass delay generation circuit of channel 1,1: Do not bypass delay generation circuit of.." bitfld.word 0x00 0. "DLYBS0,PWM Delay Generation Circuit bypass for channel 0" "0: Bypass delay generation circuit of channel 0,1: Do not bypass delay generation circuit of.." group.word 0x18++0x01 line.word 0x00 "GTDLYR0A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x1C++0x01 line.word 0x00 "GTDLYR1A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x20++0x01 line.word 0x00 "GTDLYR2A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x24++0x01 line.word 0x00 "GTDLYR3A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x1A++0x01 line.word 0x00 "GTDLYR0B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x1E++0x01 line.word 0x00 "GTDLYR1B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x22++0x01 line.word 0x00 "GTDLYR2B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x26++0x01 line.word 0x00 "GTDLYR3B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Rising Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x28++0x01 line.word 0x00 "GTDLYF0A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x2C++0x01 line.word 0x00 "GTDLYF1A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x30++0x01 line.word 0x00 "GTDLYF2A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x34++0x01 line.word 0x00 "GTDLYF3A,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnA Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x2A++0x01 line.word 0x00 "GTDLYF0B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x2E++0x01 line.word 0x00 "GTDLYF1B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x32++0x01 line.word 0x00 "GTDLYF2B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." group.word 0x36++0x01 line.word 0x00 "GTDLYF3B,GTIOC" bitfld.word 0x00 0.--4. "DLY,GTIOCnB Output Falling Edge Delay Setting" "0: No delay on rising edges,?..." tree.end tree "GPT_OPS (Output Phase Switching Controller)" base ad:0x40078FF0 group.long 0x00++0x03 line.long 0x00 "OPSCR,Output Phase Switching Control Register" bitfld.long 0x00 30.--31. "NFCS,External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" bitfld.long 0x00 29. "NFEN,External Input Noise Filter Enable" "0: Do not use a noise filter to the external input,1: Use a noise filter to the external input" bitfld.long 0x00 26. "GODF,Group output disable function" "0: This bit function is ignored,1: Group disable will clear OPSCR.EN Bit" newline bitfld.long 0x00 24.--25. "GRP,Output disabled source selection" "0: Select Group A output disable source,1: Select Group B output disable source,2: Select Group C output disable source,3: Select Group D output disable source" bitfld.long 0x00 21. "ALIGN,Input phase alignment" "0: Input phase is aligned to PCLK,1: Input phase is aligned PWM" bitfld.long 0x00 20. "RV,Output phase rotation direction reversal" "0: U/V/W-Phase output,1: Output to reverse the V / W-phase" newline bitfld.long 0x00 19. "INV,Invert-Phase Output Control" "0: Positive Logic (Active High)output,1: Negative Logic (Active Low)output" bitfld.long 0x00 18. "N,Negative-Phase Output (N) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)" bitfld.long 0x00 17. "P,Positive-Phase Output (P) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)" newline bitfld.long 0x00 16. "FB,External Feedback Signal EnableThis bit selects the input phase from the software settings and external input" "0: Select the external input,1: Select the soft setting(OPSCR.UF VF WF)" bitfld.long 0x00 8. "EN,Enable-Phase Output Control" "0: Not Output(Hi-Z external terminals),1: Output" rbitfld.long 0x00 6. "W,Input W-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)" "0,1" newline rbitfld.long 0x00 5. "V,Input V-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)" "0,1" rbitfld.long 0x00 4. "U,Input U-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKOPSCR.FB=1:Software settings (UF/VF/WF)" "0,1" bitfld.long 0x00 2. "WF,Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1" "0,1" newline bitfld.long 0x00 1. "VF,Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1" "0,1" bitfld.long 0x00 0. "UF,Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1" "0,1" tree.end tree "GPT (General Purpose Timer)" repeat 6. (list 328. 329. 3210. 3211. 3212. 3213.) (list ad:0x40078800 ad:0x40078900 ad:0x40078A00 ad:0x40078B00 ad:0x40078C00 ad:0x40078D00) tree "GPT$1" base $2 group.long 0x00++0x03 line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.byte 0x00 8.--15. 1. "PRKEY,GTWP Key Code" bitfld.long 0x00 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" group.long 0x04++0x03 line.long 0x00 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x00 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3213.GTCNT counter starts (write) /.." bitfld.long 0x00 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3212.GTCNT counter starts (write) /.." newline bitfld.long 0x00 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3211.GTCNT counter starts (write) /.." bitfld.long 0x00 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3210.GTCNT counter starts (write) /.." newline bitfld.long 0x00 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT329.GTCNT counter starts (write) / Counter.." bitfld.long 0x00 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT328.GTCNT counter starts (write) / Counter.." newline bitfld.long 0x00 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E7.GTCNT counter starts (write) /.." bitfld.long 0x00 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E6.GTCNT counter starts (write) /.." newline bitfld.long 0x00 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E5.GTCNT counter starts (write) /.." bitfld.long 0x00 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E4.GTCNT counter starts (write) /.." newline bitfld.long 0x00 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH3.GTCNT counter starts (write) /.." bitfld.long 0x00 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH2.GTCNT counter starts (write) /.." newline bitfld.long 0x00 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH1.GTCNT counter starts (write) /.." bitfld.long 0x00 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH0.GTCNT counter starts (write) /.." group.long 0x08++0x03 line.long 0x00 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x00 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3213.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3212.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3211.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3210.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT329.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT328.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E7.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E6.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E5.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E4.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH3.GTCNT counter stops (write) /.." bitfld.long 0x00 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH2.GTCNT counter stops (write) /.." newline bitfld.long 0x00 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH1.GTCNT counter stops (write) /.." bitfld.long 0x00 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH0.GTCNT counter stops (write) /.." wgroup.long 0x0C++0x03 line.long 0x00 "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x00 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GPT3213.GTCNT counter clears" bitfld.long 0x00 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GPT3212.GTCNT counter clears" newline bitfld.long 0x00 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GPT3211.GTCNT counter clears" bitfld.long 0x00 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GPT3210.GTCNT counter clears" newline bitfld.long 0x00 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GPT329.GTCNT counter clears" bitfld.long 0x00 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GPT328.GTCNT counter clears" newline bitfld.long 0x00 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GPT32E7.GTCNT counter clears" bitfld.long 0x00 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GPT32E6.GTCNT counter clears" newline bitfld.long 0x00 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GPT32E5.GTCNT counter clears" bitfld.long 0x00 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GPT32E4.GTCNT counter clears" newline bitfld.long 0x00 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GPT32EH3.GTCNT counter clears" bitfld.long 0x00 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GPT32EH2.GTCNT counter clears" newline bitfld.long 0x00 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GPT32EH1.GTCNT counter clears" bitfld.long 0x00 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GPT32EH0.GTCNT counter clears" group.long 0x10++0x03 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" bitfld.long 0x00 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input" newline bitfld.long 0x00 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input" bitfld.long 0x00 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" newline bitfld.long 0x00 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" bitfld.long 0x00 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input" newline bitfld.long 0x00 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input" bitfld.long 0x00 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input" newline bitfld.long 0x00 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input" bitfld.long 0x00 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x00 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x00 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x00 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x00 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." group.long 0x14++0x03 line.long 0x00 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x00 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" bitfld.long 0x00 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELCH event inpu" newline bitfld.long 0x00 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" bitfld.long 0x00 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" newline bitfld.long 0x00 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" bitfld.long 0x00 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" newline bitfld.long 0x00 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" bitfld.long 0x00 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" newline bitfld.long 0x00 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" bitfld.long 0x00 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x00 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x00 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x00 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x00 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." group.long 0x18++0x03 line.long 0x00 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x00 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" bitfld.long 0x00 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" newline bitfld.long 0x00 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" bitfld.long 0x00 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" newline bitfld.long 0x00 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" bitfld.long 0x00 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" newline bitfld.long 0x00 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" bitfld.long 0x00 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" newline bitfld.long 0x00 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" bitfld.long 0x00 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x00 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x00 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x00 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x00 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." group.long 0x1C++0x03 line.long 0x00 "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x00 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input" bitfld.long 0x00 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input" newline bitfld.long 0x00 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input" bitfld.long 0x00 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" newline bitfld.long 0x00 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" bitfld.long 0x00 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input" newline bitfld.long 0x00 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input" bitfld.long 0x00 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input" newline bitfld.long 0x00 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." newline bitfld.long 0x00 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." bitfld.long 0x00 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." newline bitfld.long 0x00 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." bitfld.long 0x00 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." group.long 0x20++0x03 line.long 0x00 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x00 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input" bitfld.long 0x00 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input" newline bitfld.long 0x00 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input" bitfld.long 0x00 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input" newline bitfld.long 0x00 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input" bitfld.long 0x00 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input" newline bitfld.long 0x00 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input" bitfld.long 0x00 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input" newline bitfld.long 0x00 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." newline bitfld.long 0x00 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." bitfld.long 0x00 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." newline bitfld.long 0x00 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." bitfld.long 0x00 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" bitfld.long 0x00 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input" newline bitfld.long 0x00 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input" bitfld.long 0x00 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input" newline bitfld.long 0x00 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input" bitfld.long 0x00 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input" newline bitfld.long 0x00 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" bitfld.long 0x00 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input" newline bitfld.long 0x00 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." newline bitfld.long 0x00 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." bitfld.long 0x00 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." newline bitfld.long 0x00 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." bitfld.long 0x00 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input" bitfld.long 0x00 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input" newline bitfld.long 0x00 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input" bitfld.long 0x00 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" newline bitfld.long 0x00 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input" bitfld.long 0x00 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" newline bitfld.long 0x00 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input" bitfld.long 0x00 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input" newline bitfld.long 0x00 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." newline bitfld.long 0x00 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." bitfld.long 0x00 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." newline bitfld.long 0x00 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." bitfld.long 0x00 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." group.long 0x2C++0x03 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. "TPCS,Timer Prescaler Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64,4: PCLK/256,5: PCLK/1024,?..." bitfld.long 0x00 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,2: Setting prohibited,3: Setting prohibited,4: Triangle-wave PWM mode 1 (32-bit transfer at..,5: Triangle-wave PWM mode 2 (32-bit transfer at..,6: Triangle-wave PWM mode 3 (64-bit transfer at..,7: Setting prohibited" newline bitfld.long 0x00 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" group.long 0x30++0x03 line.long 0x00 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x00 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.." bitfld.long 0x00 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x00 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,2: GTIOCB pin duty 0percent,3: GTIOCB pin duty 100percent" bitfld.long 0x00 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.." newline bitfld.long 0x00 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x00 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,2: GTIOCA pin duty 0 percent,3: GTIOCA pin duty 100 percent" newline bitfld.long 0x00 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x00 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" group.long 0x34++0x03 line.long 0x00 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x00 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" bitfld.long 0x00 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x00 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,2: Set GTIOCB pin to 0 on output disable,3: Set GTIOCB pin to 1 on output disable" bitfld.long 0x00 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" newline bitfld.long 0x00 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting.." bitfld.long 0x00 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" newline bitfld.long 0x00 16.--20. "GTIOB,GTIOCB Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High" bitfld.long 0x00 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" newline bitfld.long 0x00 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin" bitfld.long 0x00 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,2: Set GTIOCA pin to 0 on output disable,3: Set GTIOCA pin to 1 on output disable" newline bitfld.long 0x00 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x00 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting.." newline bitfld.long 0x00 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops" bitfld.long 0x00 0.--4. "GTIOA,GTIOCA Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High" group.long 0x38++0x03 line.long 0x00 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x00 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable..,1: Enable same time output level low disable.." bitfld.long 0x00 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable.." newline bitfld.long 0x00 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,2: Select Group C output disable request,3: Select Group D output disable request" group.long 0x3C++0x03 line.long 0x00 "GTST,General PWM Timer Status Register" rbitfld.long 0x00 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at..,1: GTIOCA pin and GTIOCB pin output 0 at the.." rbitfld.long 0x00 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at..,1: GTIOCA pin and GTIOCB pin output 1 at the.." newline rbitfld.long 0x00 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated" rbitfld.long 0x00 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up" newline bitfld.long 0x00 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred,1: An underflow (trough) has occurred" bitfld.long 0x00 6. "TCPFO,Overflow Flag" "0: No overflow (crest) has occurred,1: An overflow (crest) has occurred" newline bitfld.long 0x00 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated" bitfld.long 0x00 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated" newline bitfld.long 0x00 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated" bitfld.long 0x00 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated" newline bitfld.long 0x00 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x00 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0" "0: no effect,1: Forcibly performs buffer transfer of GTCCRA.." bitfld.long 0x00 20.--21. "PR,GTPR Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTPBR --> GTPR),?..." newline bitfld.long 0x00 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRB <--> GTCCRE),2: Double buffer operation (GTCCRB <--> GTCCRE..,3: Double buffer operation (GTCCRB <--> GTCCRE.." bitfld.long 0x00 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRA <--> GTCCRC),2: Double buffer operation (GTCCRA <--> GTCCRC..,3: Double buffer operation (GTCCRA <--> GTCCRC.." newline bitfld.long 0x00 1. "BD1,GTPR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation" bitfld.long 0x00 0. "BD2,GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation" group.long 0x48++0x03 line.long 0x00 "GTCNT,General PWM Timer Counter" hexmask.long 0x00 0.--31. 1. "GTCNT,Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x00 0.--31. 1. "GTCCRA,Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x00 0.--31. 1. "GTCCRB,Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0x00 0.--31. 1. "GTCCRC,Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x00 0.--31. 1. "GTCCRE,Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x00 0.--31. 1. "GTCCRD,Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x00 0.--31. 1. "GTCCRF,Compare Capture Register F" group.long 0x64++0x03 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x00 0.--31. 1. "GTPR,Cycle Setting Register" group.long 0x68++0x03 line.long 0x00 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x00 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x88++0x03 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD,1: Use GTDVU and GTDVD to set the compare match.." group.long 0x8C++0x03 line.long 0x00 "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x00 0.--31. 1. "GTDVU,Dead Time Value Register U" tree.end repeat.end tree.end tree "GPT32E (General PWM Timer (32-bit Enhanced))" repeat 4. (list 4. 5. 6. 7.) (list ad:0x40078400 ad:0x40078500 ad:0x40078600 ad:0x40078700) tree "GPT32E$1" base $2 group.long 0x00++0x03 line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.byte 0x00 8.--15. 1. "PRKEY,GTWP Key Code" bitfld.long 0x00 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" group.long 0x04++0x03 line.long 0x00 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x00 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3213.GTCNT counter starts (write) /.." bitfld.long 0x00 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3212.GTCNT counter starts (write) /.." newline bitfld.long 0x00 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3211.GTCNT counter starts (write) /.." bitfld.long 0x00 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3210.GTCNT counter starts (write) /.." newline bitfld.long 0x00 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT329.GTCNT counter starts (write) / Counter.." bitfld.long 0x00 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT328.GTCNT counter starts (write) / Counter.." newline bitfld.long 0x00 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E7.GTCNT counter starts (write) /.." bitfld.long 0x00 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E6.GTCNT counter starts (write) /.." newline bitfld.long 0x00 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E5.GTCNT counter starts (write) /.." bitfld.long 0x00 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E4.GTCNT counter starts (write) /.." newline bitfld.long 0x00 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH3.GTCNT counter starts (write) /.." bitfld.long 0x00 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH2.GTCNT counter starts (write) /.." newline bitfld.long 0x00 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH1.GTCNT counter starts (write) /.." bitfld.long 0x00 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH0.GTCNT counter starts (write) /.." group.long 0x08++0x03 line.long 0x00 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x00 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3213.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3212.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3211.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3210.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT329.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT328.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E7.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E6.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E5.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E4.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH3.GTCNT counter stops (write) /.." bitfld.long 0x00 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH2.GTCNT counter stops (write) /.." newline bitfld.long 0x00 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH1.GTCNT counter stops (write) /.." bitfld.long 0x00 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH0.GTCNT counter stops (write) /.." wgroup.long 0x0C++0x03 line.long 0x00 "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x00 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GPT3213.GTCNT counter clears" bitfld.long 0x00 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GPT3212.GTCNT counter clears" newline bitfld.long 0x00 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GPT3211.GTCNT counter clears" bitfld.long 0x00 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GPT3210.GTCNT counter clears" newline bitfld.long 0x00 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GPT329.GTCNT counter clears" bitfld.long 0x00 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GPT328.GTCNT counter clears" newline bitfld.long 0x00 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GPT32E7.GTCNT counter clears" bitfld.long 0x00 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GPT32E6.GTCNT counter clears" newline bitfld.long 0x00 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GPT32E5.GTCNT counter clears" bitfld.long 0x00 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GPT32E4.GTCNT counter clears" newline bitfld.long 0x00 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GPT32EH3.GTCNT counter clears" bitfld.long 0x00 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GPT32EH2.GTCNT counter clears" newline bitfld.long 0x00 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GPT32EH1.GTCNT counter clears" bitfld.long 0x00 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GPT32EH0.GTCNT counter clears" group.long 0x10++0x03 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" bitfld.long 0x00 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input" newline bitfld.long 0x00 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input" bitfld.long 0x00 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" newline bitfld.long 0x00 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" bitfld.long 0x00 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input" newline bitfld.long 0x00 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input" bitfld.long 0x00 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input" newline bitfld.long 0x00 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input" bitfld.long 0x00 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x00 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x00 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x00 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x00 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." group.long 0x14++0x03 line.long 0x00 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x00 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" bitfld.long 0x00 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" newline bitfld.long 0x00 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" bitfld.long 0x00 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" newline bitfld.long 0x00 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" bitfld.long 0x00 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" newline bitfld.long 0x00 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" bitfld.long 0x00 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" newline bitfld.long 0x00 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" bitfld.long 0x00 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x00 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x00 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x00 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x00 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." group.long 0x18++0x03 line.long 0x00 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x00 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" bitfld.long 0x00 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" newline bitfld.long 0x00 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" bitfld.long 0x00 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" newline bitfld.long 0x00 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" bitfld.long 0x00 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" newline bitfld.long 0x00 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" bitfld.long 0x00 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" newline bitfld.long 0x00 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" bitfld.long 0x00 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x00 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x00 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x00 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x00 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." group.long 0x1C++0x03 line.long 0x00 "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x00 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input" bitfld.long 0x00 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input" newline bitfld.long 0x00 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input" bitfld.long 0x00 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" newline bitfld.long 0x00 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" bitfld.long 0x00 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input" newline bitfld.long 0x00 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input" bitfld.long 0x00 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input" newline bitfld.long 0x00 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." newline bitfld.long 0x00 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." bitfld.long 0x00 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." newline bitfld.long 0x00 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." bitfld.long 0x00 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." group.long 0x20++0x03 line.long 0x00 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x00 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input" bitfld.long 0x00 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input" newline bitfld.long 0x00 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input" bitfld.long 0x00 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input" newline bitfld.long 0x00 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input" bitfld.long 0x00 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input" newline bitfld.long 0x00 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input" bitfld.long 0x00 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input" newline bitfld.long 0x00 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." newline bitfld.long 0x00 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." bitfld.long 0x00 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." newline bitfld.long 0x00 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." bitfld.long 0x00 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" bitfld.long 0x00 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input" newline bitfld.long 0x00 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input" bitfld.long 0x00 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input" newline bitfld.long 0x00 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input" bitfld.long 0x00 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input" newline bitfld.long 0x00 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" bitfld.long 0x00 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input" newline bitfld.long 0x00 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." newline bitfld.long 0x00 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." bitfld.long 0x00 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." newline bitfld.long 0x00 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." bitfld.long 0x00 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input" bitfld.long 0x00 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input" newline bitfld.long 0x00 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input" bitfld.long 0x00 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" newline bitfld.long 0x00 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input" bitfld.long 0x00 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" newline bitfld.long 0x00 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input" bitfld.long 0x00 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input" newline bitfld.long 0x00 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." newline bitfld.long 0x00 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." bitfld.long 0x00 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." newline bitfld.long 0x00 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." bitfld.long 0x00 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." group.long 0x2C++0x03 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. "TPCS,Timer Prescaler Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64,4: PCLK/256,5: PCLK/1024,?..." bitfld.long 0x00 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,2: Setting prohibited,3: Setting prohibited,4: Triangle-wave PWM mode 1 (32-bit transfer at..,5: Triangle-wave PWM mode 2 (32-bit transfer at..,6: Triangle-wave PWM mode 3 (64-bit transfer at..,7: Setting prohibited" newline bitfld.long 0x00 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" group.long 0x30++0x03 line.long 0x00 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x00 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.." bitfld.long 0x00 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x00 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,2: GTIOCB pin duty 0percent,3: GTIOCB pin duty 100percent" bitfld.long 0x00 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.." newline bitfld.long 0x00 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x00 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,2: GTIOCA pin duty 0 percent,3: GTIOCA pin duty 100 percent" newline bitfld.long 0x00 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x00 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" group.long 0x34++0x03 line.long 0x00 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x00 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" bitfld.long 0x00 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x00 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,2: Set GTIOCB pin to 0 on output disable,3: Set GTIOCB pin to 1 on output disable" bitfld.long 0x00 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" newline bitfld.long 0x00 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting.." bitfld.long 0x00 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" newline bitfld.long 0x00 16.--20. "GTIOB,GTIOCB Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High" bitfld.long 0x00 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" newline bitfld.long 0x00 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin" bitfld.long 0x00 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,2: Set GTIOCA pin to 0 on output disable,3: Set GTIOCA pin to 1 on output disable" newline bitfld.long 0x00 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x00 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting.." newline bitfld.long 0x00 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops" bitfld.long 0x00 0.--4. "GTIOA,GTIOCA Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High" group.long 0x38++0x03 line.long 0x00 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x00 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable..,1: Enable same time output level low disable.." bitfld.long 0x00 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable.." newline bitfld.long 0x00 28. "GRPDTE,Dead Time Error Output Disable Request Enable" "0: Disable dead time error output disable request,1: Enable dead time error output disable request" bitfld.long 0x00 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,2: Select Group C output disable request,3: Select Group D output disable request" newline bitfld.long 0x00 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" bitfld.long 0x00 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" newline bitfld.long 0x00 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" bitfld.long 0x00 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" group.long 0x3C++0x03 line.long 0x00 "GTST,General PWM Timer Status Register" rbitfld.long 0x00 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at..,1: GTIOCA pin and GTIOCB pin output 0 at the.." rbitfld.long 0x00 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at..,1: GTIOCA pin and GTIOCB pin output 1 at the.." newline rbitfld.long 0x00 28. "DTEF,Dead Time Error Flag" "0: No dead time error has occurred,1: A dead time error has occurred" rbitfld.long 0x00 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated" newline rbitfld.long 0x00 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up" rbitfld.long 0x00 8.--10. "ITCNT,GTCIV/GTCIU Interrupt Skipping Count Counter(Counter for counting the number of times a timer interrupt has been skipped.)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred,1: An underflow (trough) has occurred" bitfld.long 0x00 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred,1: An overflow (crest) has occurred" newline bitfld.long 0x00 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated" bitfld.long 0x00 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated" newline bitfld.long 0x00 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated" bitfld.long 0x00 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated" newline bitfld.long 0x00 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x00 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB -->.." bitfld.long 0x00 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0" "0: No transfer,1: Transfer at crest,2: Transfer at trough,3: Transfer at both crest and trough" newline bitfld.long 0x00 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA -->.." bitfld.long 0x00 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0" "0: No transfer,1: Transfer at crest,2: Transfer at trough,3: Transfer at both crest and trough" newline bitfld.long 0x00 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0" "0: no effect,1: Forcibly performs buffer transfer of GTCCRA.." bitfld.long 0x00 20.--21. "PR,GTPR Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTPBR --> GTPR),2: Double buffer operation (GTPDBR --> GTPBR -->..,3: Double buffer operation (GTPDBR --> GTPBR -->.." newline bitfld.long 0x00 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRB <--> GTCCRE),2: Double buffer operation (GTCCRB <--> GTCCRE..,3: Double buffer operation (GTCCRB <--> GTCCRE.." bitfld.long 0x00 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRA <--> GTCCRC),2: Double buffer operation (GTCCRA <--> GTCCRC..,3: Double buffer operation (GTCCRA <--> GTCCRC.." newline bitfld.long 0x00 0.--3. "BD,BD[3]: GTDV Buffer Operation DisableBD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?..." group.long 0x44++0x03 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. "ADTBL,GTADTRB A/D Converter Start Request Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 12. "ADTAL,GTADTRA A/D Converter Start Request Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." newline bitfld.long 0x00 8.--10. "IVTT,GPT_OVF/GPT_UDF Interrupt Skipping Count Select" "0: No skipping,1: Skipping count of 1,2: Skipping count of 2,3: Skipping count of 3,4: Skipping count of 4,5: Skipping count of 5,6: Skipping count of 6,7: Skipping count of 7" bitfld.long 0x00 6.--7. "IVTC,GPT_OVF/GPT_UDF Interrupt Skipping Function Select" "0: Do not perform skipping,1: Count and skip both overflow and underflow..,2: Count and skip both overflow and underflow..,3: Count and skip both overflow and underflow.." newline bitfld.long 0x00 5. "ITLF,GTCCRF Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 4. "ITLE,GTCCRE Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." newline bitfld.long 0x00 3. "ITLD,GTCCRD Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 2. "ITLC,GTCCRC Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." newline bitfld.long 0x00 1. "ITLB,GTCCRB Compare Match/Input Capture Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 0. "ITLA,GTCCRA Compare Match/Input Capture Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." group.long 0x48++0x03 line.long 0x00 "GTCNT,General PWM Timer Counter" hexmask.long 0x00 0.--31. 1. "GTCNT,Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x00 0.--31. 1. "GTCCRA,Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x00 0.--31. 1. "GTCCRB,Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0x00 0.--31. 1. "GTCCRC,Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x00 0.--31. 1. "GTCCRE,Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x00 0.--31. 1. "GTCCRD,Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x00 0.--31. 1. "GTCCRF,Compare Capture Register F" group.long 0x64++0x03 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x00 0.--31. 1. "GTPR,Cycle Setting Register" group.long 0x68++0x03 line.long 0x00 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x00 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x6C++0x03 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" hexmask.long 0x00 0.--31. 1. "GTPDBR,Cycle Setting Double-Buffer Register" group.long 0x70++0x03 line.long 0x00 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x00 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0x00 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x00 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x00 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x00 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x00 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x03 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. "TDFER,GTDVD Setting" "0: Set GTDVU and GTDVD separately,1: Automatically set the value written to GTDVU.." bitfld.long 0x00 5. "TDBDE,GTDVD Buffer Operation Enable" "0: Disable GTDVD buffer operation,1: Enable GTDVD buffer operation" newline bitfld.long 0x00 4. "TDBUE,GTDVU Buffer Operation Enable" "0: Disable GTDVU buffer operation,1: Enable GTDVU buffer operation" bitfld.long 0x00 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD,1: Use GTDVU and GTDVD to set the compare match.." group.long 0x8C++0x03 line.long 0x00 "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x00 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0x90++0x03 line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" hexmask.long 0x00 0.--31. 1. "GTDVD,Dead Time Value Register D" group.long 0x94++0x03 line.long 0x00 "GTDBU,General PWM Timer Dead Time Buffer Register U" hexmask.long 0x00 0.--31. 1. "GTDVU,Dead Time Buffer Register U" group.long 0x98++0x03 line.long 0x00 "GTDBD,General PWM Timer Dead Time Buffer Register D" hexmask.long 0x00 0.--31. 1. "GTDBD,Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. "SOS,Output Protection Function Status" "0: Normal operation,1: Protected state (GTCCRA = 0 is set during..,2: Protected state (GTCCRA >= GTPR is set during..,3: Protected state (GTCCRA >= GTPR is set during.." group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. "SOTR,Output Protection Function Temporary Release" "0: Do not release protected state,1: Release protected state" tree.end repeat.end tree.end tree "GPT32EH (General PWM Timer (32-bit Enhanced High Resolution))" repeat 4. (list 0. 1. 2. 3.) (list ad:0x40078000 ad:0x40078100 ad:0x40078200 ad:0x40078300) tree "GPT32EH$1" base $2 group.long 0x00++0x03 line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.byte 0x00 8.--15. 1. "PRKEY,GTWP Key Code" bitfld.long 0x00 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" group.long 0x04++0x03 line.long 0x00 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x00 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3213.GTCNT counter starts (write) /.." bitfld.long 0x00 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3212.GTCNT counter starts (write) /.." newline bitfld.long 0x00 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3211.GTCNT counter starts (write) /.." bitfld.long 0x00 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT3210.GTCNT counter starts (write) /.." newline bitfld.long 0x00 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT329.GTCNT counter starts (write) / Counter.." bitfld.long 0x00 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT328.GTCNT counter starts (write) / Counter.." newline bitfld.long 0x00 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E7.GTCNT counter starts (write) /.." bitfld.long 0x00 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E6.GTCNT counter starts (write) /.." newline bitfld.long 0x00 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E5.GTCNT counter starts (write) /.." bitfld.long 0x00 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32E4.GTCNT counter starts (write) /.." newline bitfld.long 0x00 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH3.GTCNT counter starts (write) /.." bitfld.long 0x00 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH2.GTCNT counter starts (write) /.." newline bitfld.long 0x00 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH1.GTCNT counter starts (write) /.." bitfld.long 0x00 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter stop (read),1: GPT32EH0.GTCNT counter starts (write) /.." group.long 0x08++0x03 line.long 0x00 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x00 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3213.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3212.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3211.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT3210.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT329.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT328.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E7.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E6.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E5.GTCNT counter stops (write) / Counter.." bitfld.long 0x00 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32E4.GTCNT counter stops (write) / Counter.." newline bitfld.long 0x00 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH3.GTCNT counter stops (write) /.." bitfld.long 0x00 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH2.GTCNT counter stops (write) /.." newline bitfld.long 0x00 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH1.GTCNT counter stops (write) /.." bitfld.long 0x00 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit)" "0: No effect (write) / counter running (read),1: GPT32EH0.GTCNT counter stops (write) /.." wgroup.long 0x0C++0x03 line.long 0x00 "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x00 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GPT3213.GTCNT counter clears" bitfld.long 0x00 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GPT3212.GTCNT counter clears" newline bitfld.long 0x00 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GPT3211.GTCNT counter clears" bitfld.long 0x00 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GPT3210.GTCNT counter clears" newline bitfld.long 0x00 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GPT329.GTCNT counter clears" bitfld.long 0x00 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GPT328.GTCNT counter clears" newline bitfld.long 0x00 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GPT32E7.GTCNT counter clears" bitfld.long 0x00 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GPT32E6.GTCNT counter clears" newline bitfld.long 0x00 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GPT32E5.GTCNT counter clears" bitfld.long 0x00 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GPT32E4.GTCNT counter clears" newline bitfld.long 0x00 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GPT32EH3.GTCNT counter clears" bitfld.long 0x00 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GPT32EH2.GTCNT counter clears" newline bitfld.long 0x00 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GPT32EH1.GTCNT counter clears" bitfld.long 0x00 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GPT32EH0.GTCNT counter clears" group.long 0x10++0x03 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" bitfld.long 0x00 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input" newline bitfld.long 0x00 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input" bitfld.long 0x00 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" newline bitfld.long 0x00 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" bitfld.long 0x00 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input" newline bitfld.long 0x00 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input" bitfld.long 0x00 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input" newline bitfld.long 0x00 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input" bitfld.long 0x00 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x00 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x00 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x00 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x00 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x00 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x00 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." group.long 0x14++0x03 line.long 0x00 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x00 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" bitfld.long 0x00 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" newline bitfld.long 0x00 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" bitfld.long 0x00 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" newline bitfld.long 0x00 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" bitfld.long 0x00 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" newline bitfld.long 0x00 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" bitfld.long 0x00 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" newline bitfld.long 0x00 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" bitfld.long 0x00 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x00 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x00 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x00 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x00 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." bitfld.long 0x00 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x00 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." group.long 0x18++0x03 line.long 0x00 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x00 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" bitfld.long 0x00 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" newline bitfld.long 0x00 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" bitfld.long 0x00 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" newline bitfld.long 0x00 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" bitfld.long 0x00 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" newline bitfld.long 0x00 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" bitfld.long 0x00 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" newline bitfld.long 0x00 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" bitfld.long 0x00 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x00 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x00 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x00 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x00 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x00 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x00 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." group.long 0x1C++0x03 line.long 0x00 "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x00 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input" bitfld.long 0x00 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input" newline bitfld.long 0x00 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input" bitfld.long 0x00 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" newline bitfld.long 0x00 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" bitfld.long 0x00 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input" newline bitfld.long 0x00 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input" bitfld.long 0x00 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input" newline bitfld.long 0x00 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." newline bitfld.long 0x00 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." bitfld.long 0x00 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." newline bitfld.long 0x00 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." bitfld.long 0x00 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0x00 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge..,1: Enable counter count up on the falling edge.." bitfld.long 0x00 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge..,1: Enable counter count up on the rising edge of.." group.long 0x20++0x03 line.long 0x00 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x00 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input" bitfld.long 0x00 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input" newline bitfld.long 0x00 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input" bitfld.long 0x00 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input" newline bitfld.long 0x00 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input" bitfld.long 0x00 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input" newline bitfld.long 0x00 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input" bitfld.long 0x00 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input" newline bitfld.long 0x00 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." newline bitfld.long 0x00 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." bitfld.long 0x00 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." newline bitfld.long 0x00 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." bitfld.long 0x00 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." newline bitfld.long 0x00 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling..,1: Enable counter count down on the falling edge.." bitfld.long 0x00 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge..,1: Enable counter count down on the rising edge.." group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" bitfld.long 0x00 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input" newline bitfld.long 0x00 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input" bitfld.long 0x00 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input" newline bitfld.long 0x00 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input" bitfld.long 0x00 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input" newline bitfld.long 0x00 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" bitfld.long 0x00 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input" newline bitfld.long 0x00 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." newline bitfld.long 0x00 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." bitfld.long 0x00 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." newline bitfld.long 0x00 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." bitfld.long 0x00 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." newline bitfld.long 0x00 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling..,1: Enable GTCCRA input capture on the falling.." bitfld.long 0x00 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising..,1: Enable GTCCRA input capture on the rising.." group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input" bitfld.long 0x00 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input" newline bitfld.long 0x00 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input" bitfld.long 0x00 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" newline bitfld.long 0x00 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input" bitfld.long 0x00 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" newline bitfld.long 0x00 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input" bitfld.long 0x00 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input" newline bitfld.long 0x00 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." newline bitfld.long 0x00 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." bitfld.long 0x00 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." newline bitfld.long 0x00 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." bitfld.long 0x00 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." newline bitfld.long 0x00 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling..,1: Enable GTCCRB input capture on the falling.." bitfld.long 0x00 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising..,1: Enable GTCCRB input capture on the rising.." group.long 0x2C++0x03 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. "TPCS,Timer Prescaler Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64,4: PCLK/256,5: PCLK/1024,?..." bitfld.long 0x00 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,2: Setting prohibited,3: Setting prohibited,4: Triangle-wave PWM mode 1 (32-bit transfer at..,5: Triangle-wave PWM mode 2 (32-bit transfer at..,6: Triangle-wave PWM mode 3 (64-bit transfer at..,7: Setting prohibited" newline bitfld.long 0x00 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" group.long 0x30++0x03 line.long 0x00 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x00 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.." bitfld.long 0x00 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x00 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,2: GTIOCB pin duty 0percent,3: GTIOCB pin duty 100percent" bitfld.long 0x00 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100..,1: Apply masked compare match output value to.." newline bitfld.long 0x00 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x00 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,2: GTIOCA pin duty 0 percent,3: GTIOCA pin duty 100 percent" newline bitfld.long 0x00 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x00 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" group.long 0x34++0x03 line.long 0x00 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x00 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" bitfld.long 0x00 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x00 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,2: Set GTIOCB pin to 0 on output disable,3: Set GTIOCB pin to 1 on output disable" bitfld.long 0x00 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" newline bitfld.long 0x00 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting.." bitfld.long 0x00 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" newline bitfld.long 0x00 16.--20. "GTIOB,GTIOCB Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High" bitfld.long 0x00 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLK/1,1: PCLK/4,2: PCLK/16,3: PCLK/64" newline bitfld.long 0x00 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin" bitfld.long 0x00 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,2: Set GTIOCA pin to 0 on output disable,3: Set GTIOCA pin to 1 on output disable" newline bitfld.long 0x00 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x00 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting.." newline bitfld.long 0x00 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops" bitfld.long 0x00 0.--4. "GTIOA,GTIOCA Pin Function Select" "0: Initial output is Low,1: Initial output is Low,2: Initial output is Low,3: Initial output is Low,4: Initial output is Low,5: Initial output is Low,6: Initial output is Low,7: Initial output is Low,8: Initial output is Low,9: Initial output is Low,10: Initial output is Low,11: Initial output is Low,12: Initial output is Low,13: Initial output is Low,14: Initial output is Low,15: Initial output is Low,16: Initial output is High,17: Initial output is High,18: Initial output is High,19: Initial output is High,20: Initial output is High,21: Initial output is High,22: Initial output is High,23: Initial output is High,24: Initial output is High,25: Initial output is High,26: Initial output is High,27: Initial output is High,28: Initial output is High,29: Initial output is High,30: Initial output is High,31: Initial output is High" group.long 0x38++0x03 line.long 0x00 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x00 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable..,1: Enable same time output level low disable.." bitfld.long 0x00 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable.." newline bitfld.long 0x00 28. "GRPDTE,Dead Time Error Output Disable Request Enable" "0: Disable dead time error output disable request,1: Enable dead time error output disable request" bitfld.long 0x00 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,2: Select Group C output disable request,3: Select Group D output disable request" newline bitfld.long 0x00 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" bitfld.long 0x00 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" newline bitfld.long 0x00 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" bitfld.long 0x00 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request" group.long 0x3C++0x03 line.long 0x00 "GTST,General PWM Timer Status Register" rbitfld.long 0x00 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at..,1: GTIOCA pin and GTIOCB pin output 0 at the.." rbitfld.long 0x00 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at..,1: GTIOCA pin and GTIOCB pin output 1 at the.." newline rbitfld.long 0x00 28. "DTEF,Dead Time Error Flag" "0: No dead time error has occurred,1: A dead time error has occurred" rbitfld.long 0x00 24. "ODF,Output Disable Flag" "0: No output disable request is generated,1: An output disable request is generated" newline rbitfld.long 0x00 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up" rbitfld.long 0x00 8.--10. "ITCNT,GTCIV/GTCIU Interrupt Skipping Count Counter(Counter for counting the number of times a timer interrupt has been skipped.)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred,1: An underflow (trough) has occurred" bitfld.long 0x00 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred,1: An overflow (crest) has occurred" newline bitfld.long 0x00 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated,1: A compare match of GTCCRF is generated" bitfld.long 0x00 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated,1: A compare match of GTCCRE is generated" newline bitfld.long 0x00 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated,1: A compare match of GTCCRD is generated" bitfld.long 0x00 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated,1: A compare match of GTCCRC is generated" newline bitfld.long 0x00 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x00 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB -->.." bitfld.long 0x00 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0" "0: No transfer,1: Transfer at crest,2: Transfer at trough,3: Transfer at both crest and trough" newline bitfld.long 0x00 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA -->.." bitfld.long 0x00 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0" "0: No transfer,1: Transfer at crest,2: Transfer at trough,3: Transfer at both crest and trough" newline bitfld.long 0x00 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0" "0: no effect,1: Forcibly performs buffer transfer of GTCCRA.." bitfld.long 0x00 20.--21. "PR,GTPR Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTPBR --> GTPR),2: Double buffer operation (GTPDBR --> GTPBR -->..,3: Double buffer operation (GTPDBR --> GTPBR -->.." newline bitfld.long 0x00 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRB <--> GTCCRE),2: Double buffer operation (GTCCRB <--> GTCCRE..,3: Double buffer operation (GTCCRB <--> GTCCRE.." bitfld.long 0x00 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Buffer operation is not performed,1: Single buffer operation (GTCCRA <--> GTCCRC),2: Double buffer operation (GTCCRA <--> GTCCRC..,3: Double buffer operation (GTCCRA <--> GTCCRC.." newline bitfld.long 0x00 0.--3. "BD,BD[3]: GTDV Buffer Operation DisableBD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?..." group.long 0x44++0x03 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. "ADTBL,GTADTRB A/D Converter Start Request Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 12. "ADTAL,GTADTRA A/D Converter Start Request Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." newline bitfld.long 0x00 8.--10. "IVTT,GPT_OVF/GPT_UDF Interrupt Skipping Count Select" "0: No skipping,1: Skipping count of 1,2: Skipping count of 2,3: Skipping count of 3,4: Skipping count of 4,5: Skipping count of 5,6: Skipping count of 6,7: Skipping count of 7" bitfld.long 0x00 6.--7. "IVTC,GPT_OVF/GPT_UDF Interrupt Skipping Function Select" "0: Do not perform skipping,1: Count and skip both overflow and underflow..,2: Count and skip both overflow and underflow..,3: Count and skip both overflow and underflow.." newline bitfld.long 0x00 5. "ITLF,GTCCRF Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 4. "ITLE,GTCCRE Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." newline bitfld.long 0x00 3. "ITLD,GTCCRD Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 2. "ITLC,GTCCRC Compare Match Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." newline bitfld.long 0x00 1. "ITLB,GTCCRB Compare Match/Input Capture Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." bitfld.long 0x00 0. "ITLA,GTCCRA Compare Match/Input Capture Interrupt Link" "0: Do not link with GPTn_OVF/GPTn_UDF interrupt..,1: Link with GPTn_OVF/GPTn_UDF interrupt.." group.long 0x48++0x03 line.long 0x00 "GTCNT,General PWM Timer Counter" hexmask.long 0x00 0.--31. 1. "GTCNT,Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x00 0.--31. 1. "GTCCRA,Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x00 0.--31. 1. "GTCCRB,Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0x00 0.--31. 1. "GTCCRC,Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x00 0.--31. 1. "GTCCRE,Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x00 0.--31. 1. "GTCCRD,Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x00 0.--31. 1. "GTCCRF,Compare Capture Register F" group.long 0x64++0x03 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x00 0.--31. 1. "GTPR,Cycle Setting Register" group.long 0x68++0x03 line.long 0x00 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x00 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x6C++0x03 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" hexmask.long 0x00 0.--31. 1. "GTPDBR,Cycle Setting Double-Buffer Register" group.long 0x70++0x03 line.long 0x00 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x00 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0x00 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x00 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x00 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x00 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x00 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x03 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. "TDFER,GTDVD Setting" "0: Set GTDVU and GTDVD separately,1: Automatically set the value written to GTDVU.." bitfld.long 0x00 5. "TDBDE,GTDVD Buffer Operation Enable" "0: Disable GTDVD buffer operation,1: Enable GTDVD buffer operation" newline bitfld.long 0x00 4. "TDBUE,GTDVU Buffer Operation Enable" "0: Disable GTDVU buffer operation,1: Enable GTDVU buffer operation" bitfld.long 0x00 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD,1: Use GTDVU and GTDVD to set the compare match.." group.long 0x8C++0x03 line.long 0x00 "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x00 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0x90++0x03 line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" hexmask.long 0x00 0.--31. 1. "GTDVD,Dead Time Value Register D" group.long 0x94++0x03 line.long 0x00 "GTDBU,General PWM Timer Dead Time Buffer Register U" hexmask.long 0x00 0.--31. 1. "GTDVU,Dead Time Buffer Register U" group.long 0x98++0x03 line.long 0x00 "GTDBD,General PWM Timer Dead Time Buffer Register D" hexmask.long 0x00 0.--31. 1. "GTDBD,Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. "SOS,Output Protection Function Status" "0: Normal operation,1: Protected state (GTCCRA = 0 is set during..,2: Protected state (GTCCRA >= GTPR is set during..,3: Protected state (GTCCRA >= GTPR is set during.." group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. "SOTR,Output Protection Function Temporary Release" "0: Do not release protected state,1: Release protected state" tree.end repeat.end tree.end tree "ICU (Interrupt Controller)" base ad:0x40006000 repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF ) group.byte ($2+0x00)++0x00 line.byte 0x00 "IRQCR$1,IRQ Control Register" bitfld.byte 0x00 7. "FLTEN,IRQ Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled" bitfld.byte 0x00 4.--5. "FCLKSEL,IRQ Digital Filter Sampling Clock" "0: PCLKB,1: PCLKB/8,2: PCLKB/32,3: PCLKB/64" newline bitfld.byte 0x00 0.--1. "IRQMD,IRQ Detection Sense Select" "0: Falling edge,1: Rising edge,2: Rising and falling edges,3: Low level" repeat.end rgroup.word 0x140++0x01 line.word 0x00 "NMISR,Non-Maskable Interrupt Status Register" bitfld.word 0x00 12. "SPEST,MPU Stack Error Interrupt Status Flag" "0: MPU Stack Error interrupt is not requested,1: MPU Stack Error interrupt is requested" bitfld.word 0x00 11. "BUSMST,MPU Bus Master Error Interrupt Status Flag" "0: MPU Bus Master Error interrupt is not requested,1: MPU Bus Master Error interrupt is requested" newline bitfld.word 0x00 10. "BUSSST,MPU Bus Slave Error Interrupt Status Flag" "0: MPU Bus Slave Error interrupt is not requested,1: MPU Bus Slave Error interrupt is requested" bitfld.word 0x00 9. "RECCST,RAM ECC Error Interrupt Status Flag" "0: RAM ECC Error interrupt is not requested,1: RAM ECC Error interrupt is requested" newline bitfld.word 0x00 8. "RPEST,RAM Parity Error Interrupt Status Flag" "0: RAM Parity Error interrupt is not requested,1: RAM Parity Error interrupt is requested" bitfld.word 0x00 7. "NMIST,NMI Status Flag" "0: NMI pin interrupt is not requested,1: NMI pin interrupt is requested" newline bitfld.word 0x00 6. "OSTST,Oscillation Stop Detection Interrupt Status Flag" "0: Oscillation stop detection interrupt is not..,1: Oscillation stop detection interrupt is.." bitfld.word 0x00 3. "LVD2ST,Voltage-Monitoring 2 Interrupt Status Flag" "0: Voltage-monitoring 2 interrupt is not requested,1: Voltage-monitoring 2 interrupt is requested" newline bitfld.word 0x00 2. "LVD1ST,Voltage-Monitoring 1 Interrupt Status Flag" "0: Voltage-monitoring 1 interrupt is not requested,1: Voltage-monitoring 1 interrupt is requested" bitfld.word 0x00 1. "WDTST,WDT Underflow/Refresh Error Status Flag" "0: WDT underflow/refresh error interrupt is not..,1: WDT underflow/refresh error interrupt is.." newline bitfld.word 0x00 0. "IWDTST,IWDT Underflow/Refresh Error Status Flag" "0: IWDT underflow/refresh error interrupt is not..,1: IWDT underflow/refresh error interrupt is.." group.word 0x120++0x01 line.word 0x00 "NMIER,Non-Maskable Interrupt Enable Register" bitfld.word 0x00 12. "SPEEN,MPU Stack Error Interrupt Enable" "0: MPU Stack Error interrupt is disabled,1: MPU Stack Error interrupt is enabled" bitfld.word 0x00 11. "BUSMEN,MPU Bus Master Error Interrupt Enable" "0: MPU Bus Master Error interrupt is disabled,1: MPU Bus Master Error interrupt is enabled" newline bitfld.word 0x00 10. "BUSSEN,MPU Bus Slave Error Interrupt Enable" "0: MPU Bus Slave Error interrupt is disabled,1: MPU Bus Slave Error interrupt is enabled" bitfld.word 0x00 9. "RECCEN,RAM ECC Error Interrupt Enable" "0: RAM ECC Error interrupt is disabled,1: RAM ECC Error interrupt is enabled" newline bitfld.word 0x00 8. "RPEEN,RAM Parity Error Interrupt Enable" "0: RAM Parity Error interrupt is disabled,1: RAM Parity Error interrupt is enabled" bitfld.word 0x00 7. "NMIEN,NMI Pin Interrupt Enable" "0: NMI pin interrupt is disabled,1: NMI pin interrupt is enabled" newline bitfld.word 0x00 6. "OSTEN,Oscillation Stop Detection Interrupt Enable" "0: Oscillation stop detection interrupt is..,1: Oscillation stop detection interrupt is enabled" bitfld.word 0x00 3. "LVD2EN,Voltage-Monitoring 2 Interrupt Enable" "0: Voltage-monitoring 2 interrupt is disabled,1: Voltage-monitoring 2 interrupt is enabled" newline bitfld.word 0x00 2. "LVD1EN,Voltage-Monitoring 1 Interrupt Enable" "0: Voltage-monitoring 1 interrupt is disabled,1: Voltage-monitoring 1 interrupt is enabled" bitfld.word 0x00 1. "WDTEN,WDT Underflow/Refresh Error Interrupt Enable" "0: WDT underflow/refresh error interrupt is..,1: WDT underflow/refresh error interrupt is.." newline bitfld.word 0x00 0. "IWDTEN,IWDT Underflow/Refresh Error Interrupt Enable" "0: IWDT underflow/refresh error interrupt is..,1: IWDT underflow/refresh error interrupt is.." wgroup.word 0x130++0x01 line.word 0x00 "NMICLR,Non-Maskable Interrupt Status Clear Register" bitfld.word 0x00 12. "SPECLR,SPEST Clear" "0: No effect,1: Clear the NMISR.SPEST flag" bitfld.word 0x00 11. "BUSMCLR,BUSMST Clear" "0: No effect,1: Clear the NMISR.BUSMST flag" newline bitfld.word 0x00 10. "BUSSCLR,BUSSST Clear" "0: No effect,1: Clear the NMISR.BUSSST flag" bitfld.word 0x00 9. "RECCCLR,RECCST Clear" "0: No effect,1: Clear the NMISR.RECCST flag" newline bitfld.word 0x00 8. "RPECLR,RPEST Clear" "0: No effect,1: Clear the NMISR.RPEST flag" bitfld.word 0x00 7. "NMICLR,NMIST Clear" "0: No effect,1: Clear the NMISR.NMIST flag" newline bitfld.word 0x00 6. "OSTCLR,OSTST Clear" "0: No effect,1: Clear the NMISR.OSTST flag" bitfld.word 0x00 3. "LVD2CLR,LVD2ST Clear" "0: No effect,1: Clear the NMISR.LVD2ST flag" newline bitfld.word 0x00 2. "LVD1CLR,LVD1ST Clear" "0: No effect,1: Clear the NMISR.LVD1ST flag" bitfld.word 0x00 1. "WDTCLR,WDTST Clear" "0: No effect,1: Clear the NMISR.WDTST flag" newline bitfld.word 0x00 0. "IWDTCLR,IWDTST Clear" "0: No effect,1: Clear the NMISR.IWDTST flag" group.byte 0x100++0x00 line.byte 0x00 "NMICR,NMI Pin Interrupt Control Register" bitfld.byte 0x00 7. "NFLTEN,NMI Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled" bitfld.byte 0x00 4.--5. "NFCLKSEL,NMI Digital Filter Sampling Clock" "0: PCLKB,1: PCLKB/8,2: PCLKB/32,3: PCLKB/64" newline bitfld.byte 0x00 0. "NMIMD,NMI Detection Set" "0: Falling edge,1: Rising edge" repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.long ($2+0x300)++0x03 line.long 0x00 "IELSR$1,INT Event Link Setting Register" bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." newline hexmask.long.word 0x00 0.--8. 1. "IELS,Event selection to NVIC" repeat.end repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.long ($2+0x340)++0x03 line.long 0x00 "IELSR$1,INT Event Link Setting Register" bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." newline hexmask.long.word 0x00 0.--8. 1. "IELS,Event selection to NVIC" repeat.end repeat 16. (strings "32" "33" "34" "35" "36" "37" "38" "39" "40" "41" "42" "43" "44" "45" "46" "47" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.long ($2+0x380)++0x03 line.long 0x00 "IELSR$1,INT Event Link Setting Register" bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." newline hexmask.long.word 0x00 0.--8. 1. "IELS,Event selection to NVIC" repeat.end repeat 16. (strings "48" "49" "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "60" "61" "62" "63" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.long ($2+0x3C0)++0x03 line.long 0x00 "IELSR$1,INT Event Link Setting Register" bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." newline hexmask.long.word 0x00 0.--8. 1. "IELS,Event selection to NVIC" repeat.end repeat 16. (strings "64" "65" "66" "67" "68" "69" "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.long ($2+0x400)++0x03 line.long 0x00 "IELSR$1,INT Event Link Setting Register" bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." newline hexmask.long.word 0x00 0.--8. 1. "IELS,Event selection to NVIC" repeat.end repeat 16. (strings "80" "81" "82" "83" "84" "85" "86" "87" "88" "89" "90" "91" "92" "93" "94" "95" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C 0x20 0x24 0x28 0x2C 0x30 0x34 0x38 0x3C ) group.long ($2+0x440)++0x03 line.long 0x00 "IELSR$1,INT Event Link Setting Register" bitfld.long 0x00 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" bitfld.long 0x00 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." newline hexmask.long.word 0x00 0.--8. 1. "IELS,Event selection to NVIC" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x04 0x08 0x0C 0x10 0x14 0x18 0x1C ) group.long ($2+0x280)++0x03 line.long 0x00 "DELSR$1,DMAC Event Link Setting Register" bitfld.long 0x00 16. "IR,Interrupt Status Flag for DMAC" "0: No interrupt request is generated,1: An interrupt request is generated ( 1 write.." hexmask.long.word 0x00 0.--8. 1. "DELS,DMAC Event Link Select" repeat.end group.word 0x200++0x01 line.word 0x00 "SELSR0,SYS Event Link Setting Register" hexmask.word 0x00 0.--8. 1. "SELS,SYS Event Link Select" group.long 0x1A0++0x03 line.long 0x00 "WUPEN,Wake Up interrupt enable register" bitfld.long 0x00 31. "IIC0WUPEN,IIC0 address match interrupt S/W standby returns enable bit" "0: S/W standby returns by IIC0 address match..,1: S/W standby returns by IIC0 address match.." bitfld.long 0x00 30. "AGT1CBWUPEN,AGT1 compare match B interrupt S/W standby returns enable bit" "0: S/W standby returns by AGT1 compare match B..,1: S/W standby returns by AGT1 compare match B.." newline bitfld.long 0x00 29. "AGT1CAWUPEN,AGT1 compare match A interrupt S/W standby returns enable bit" "0: S/W standby returns by AGT1 compare match A..,1: S/W standby returns by AGT1 compare match A.." bitfld.long 0x00 28. "AGT1UDWUPEN,AGT1 underflow interrupt S/W standby returns enable bit" "0: S/W standby returns by AGT1 underflow..,1: S/W standby returns by AGT1 underflow.." newline bitfld.long 0x00 27. "USBFSWUPEN,USBFS interrupt S/W standby returns enable bit" "0: S/W standby returns by USBFS interrupt is..,1: S/W standby returns by USBFS interrupt is.." bitfld.long 0x00 26. "USBHSWUPEN,USBHS interrupt S/W standby returns enable bit" "0: S/W standby returns by USBHS interrupt is..,1: S/W standby returns by USBHS interrupt is.." newline bitfld.long 0x00 25. "RTCPRDWUPEN,RCT period interrupt S/W standby returns enable bit" "0: S/W standby returns by RTC period interrupt..,1: S/W standby returns by RTC period interrupt.." bitfld.long 0x00 24. "RTCALMWUPEN,RTC alarm interrupt S/W standby returns enable bit" "0: S/W standby returns by RTC alarm interrupt is..,1: S/W standby returns by RTC alarm interrupt is.." newline bitfld.long 0x00 22. "ACMPHS0WUPEN,ACMPHS0 interrupt S/W standby returns enable bit" "0: S/W standby returns by ACMPHS0 interrupt is..,1: S/W standby returns by ACMPHS0 interrupt is.." bitfld.long 0x00 19. "LVD2WUPEN,LVD2 interrupt S/W standby returns enable bit" "0: S/W standby returns by LVD2 interrupt is..,1: S/W standby returns by LVD2 interrupt is.." newline bitfld.long 0x00 18. "LVD1WUPEN,LVD1 interrupt S/W standby returns enable bit" "0: S/W standby returns by LVD1 interrupt is..,1: S/W standby returns by LVD1 interrupt is.." bitfld.long 0x00 17. "KEYWUPEN,Key interrupt S/W standby returns enable bit" "0: S/W standby returns by KEY interrupt is..,1: S/W standby returns by KEY interrupt is enabled" newline bitfld.long 0x00 16. "IWDTWUPEN,IWDT interrupt S/W standby returns enable bit" "0: S/W standby returns by IWDT interrupt is..,1: S/W standby returns by IWDT interrupt is.." bitfld.long 0x00 15. "IRQWUPEN15,IRQ15 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ15 interrupt is..,1: S/W standby returns by IRQ15 interrupt is.." newline bitfld.long 0x00 14. "IRQWUPEN14,IRQ14 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ14 interrupt is..,1: S/W standby returns by IRQ14 interrupt is.." bitfld.long 0x00 13. "IRQWUPEN13,IRQ13 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ13 interrupt is..,1: S/W standby returns by IRQ13 interrupt is.." newline bitfld.long 0x00 12. "IRQWUPEN12,IRQ12 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ12 interrupt is..,1: S/W standby returns by IRQ12 interrupt is.." bitfld.long 0x00 11. "IRQWUPEN11,IRQ11 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ11 interrupt is..,1: S/W standby returns by IRQ11 interrupt is.." newline bitfld.long 0x00 10. "IRQWUPEN10,IRQ10 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ10 interrupt is..,1: S/W standby returns by IRQ10 interrupt is.." bitfld.long 0x00 9. "IRQWUPEN9,IRQ9 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ9 interrupt is..,1: S/W standby returns by IRQ9 interrupt is.." newline bitfld.long 0x00 8. "IRQWUPEN8,IRQ8 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ8 interrupt is..,1: S/W standby returns by IRQ8 interrupt is.." bitfld.long 0x00 7. "IRQWUPEN7,IRQ7 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ7 interrupt is..,1: S/W standby returns by IRQ7 interrupt is.." newline bitfld.long 0x00 6. "IRQWUPEN6,IRQ6 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ6 interrupt is..,1: S/W standby returns by IRQ6 interrupt is.." bitfld.long 0x00 5. "IRQWUPEN5,IRQ5 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ5 interrupt is..,1: S/W standby returns by IRQ5 interrupt is.." newline bitfld.long 0x00 4. "IRQWUPEN4,IRQ4 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ4 interrupt is..,1: S/W standby returns by IRQ4 interrupt is.." bitfld.long 0x00 3. "IRQWUPEN3,IRQ3 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ3 interrupt is..,1: S/W standby returns by IRQ3 interrupt is.." newline bitfld.long 0x00 2. "IRQWUPEN2,IRQ2 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ2 interrupt is..,1: S/W standby returns by IRQ2 interrupt is.." bitfld.long 0x00 1. "IRQWUPEN1,IRQ1 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ1 interrupt is..,1: S/W standby returns by IRQ1 interrupt is.." newline bitfld.long 0x00 0. "IRQWUPEN0,IRQ0 interrupt S/W standby returns enable bit" "0: S/W standby returns by IRQ0 interrupt is..,1: S/W standby returns by IRQ0 interrupt is.." tree.end tree "IIC (Inter-Integrated Circuit)" tree "IIC0" base ad:0x40053000 group.byte 0x00++0x00 line.byte 0x00 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x00 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)" bitfld.byte 0x00 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset,1: Initiates the RIIC reset or internal reset" newline bitfld.byte 0x00 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle,1: Outputs an extra SCL clock cycle" bitfld.byte 0x00 4. "SOWP,SCLO/SDAO Write Protect" "0: Enables a value to be written in SCLO bit and..,1: Disables a value to be written in SCLO bit.." newline bitfld.byte 0x00 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low,1: (Read)The RIIC has released the SCLn pin" bitfld.byte 0x00 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low,1: (Read)The RIIC has released the SDAn pin./.." newline rbitfld.byte 0x00 1. "SCLI,SCL Line Monitor" "0: SCLn line is low,1: SCLn line is high" rbitfld.byte 0x00 0. "SDAI,SDA Line Monitor" "0: SDAn line is low,1: SDAn line is high" group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state),1: The I2C bus is occupied (bus busy state)" bitfld.byte 0x00 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode" newline bitfld.byte 0x00 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x00 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued" "0: Does not request to issue a stop condition,1: Requests to issue a stop condition" newline bitfld.byte 0x00 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition" "0: Does not request to issue a restart condition,1: Requests to issue a restart condition" bitfld.byte 0x00 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)" "0: Does not request to issue a start condition,1: Requests to issue a start condition" group.byte 0x02++0x00 line.byte 0x00 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x00 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in..,1: Enables writing to the MST and TRS bits in.." bitfld.byte 0x00 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,2: PCLKB/4 clock,3: PCLKB/8 clock,4: PCLKB/16 clock,5: PCLKB/32 clock,6: PCLKB/64 clock,7: PCLKB/128 clock" newline bitfld.byte 0x00 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0]..,1: Disables a value to be written in the BC[2:0].." bitfld.byte 0x00 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,2: 3 bits,3: 4 bits,4: 5 bits,5: 6 bits,6: 7 bits,7: 8 bits" group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is..,1: The internal reference clock divided by 2.." bitfld.byte 0x00 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC..,2: 2 fIIC cycles (ICMR2.DLCS=0) / 3 or 4 fIIC..,3: 3 fIIC cycles (ICMR2.DLCS=0) / 5 or 6 fIIC..,4: 4 fIIC cycles (ICMR2.DLCS=0) / 7 or 8 fIIC..,5: 5 fIIC cycles (ICMR2.DLCS=0) / 9 or 10 fIIC..,6: 6 fIIC cycles (ICMR2.DLCS=0) / 11 or 12 fIIC..,7: 7 fIIC cycles (ICMR2.DLCS=0) / 13 or 14 fIIC.." newline bitfld.byte 0x00 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." bitfld.byte 0x00 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x00 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected,1: Short mode is selected" group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected,1: The SMBus is selected" bitfld.byte 0x00 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle.." newline bitfld.byte 0x00 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of..,1: The RDRF flag is set at the rising edge of.." bitfld.byte 0x00 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled,1: Modification of the ACKBT bit is enabled" newline bitfld.byte 0x00 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x00 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." newline bitfld.byte 0x00 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one fIIC cycle is filtered out..,1: Noise of up to two fIIC cycles is filtered..,2: Noise of up to three fIIC cycles is filtered..,3: Noise of up to four fIIC cycles is filtered.." group.byte 0x05++0x00 line.byte 0x00 "ICFER,I2C Bus Function Enable Register" bitfld.byte 0x00 7. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit is used for the..,1: An Fm+ slope control circuit is used for the.." bitfld.byte 0x00 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used,1: An SCL synchronous circuit is used" newline bitfld.byte 0x00 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used,1: A digital noise filter circuit is used" bitfld.byte 0x00 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during..,1: Transfer operation is suspended during NACK.." newline bitfld.byte 0x00 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled,1: Slave arbitration-lost detection is enabled" bitfld.byte 0x00 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." newline bitfld.byte 0x00 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled,1: Master arbitration-lost detection is enabled" bitfld.byte 0x00 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled,1: The timeout function is enabled" group.byte 0x06++0x00 line.byte 0x00 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x00 7. "HOAE,Host Address Enable" "0: Host address detection is disabled,1: Host address detection is enabled" bitfld.byte 0x00 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled,1: Device-ID address detection is enabled" newline bitfld.byte 0x00 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled,1: General call address detection is enabled" bitfld.byte 0x00 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled,1: Slave address in SARL2 and SARU2 is enabled" newline bitfld.byte 0x00 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled,1: Slave address in SARL1 and SARU1 is enabled" bitfld.byte 0x00 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled,1: Slave address in SARL0 and SARU0 is enabled" group.byte 0x07++0x00 line.byte 0x00 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x00 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request (TXI)..,1: Transmit data empty interrupt request (TXI).." bitfld.byte 0x00 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (TEI) is..,1: Transmit end interrupt request (TEI) is enabled" newline bitfld.byte 0x00 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request (RXI) is..,1: Receive data full interrupt request (RXI) is.." bitfld.byte 0x00 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.." newline bitfld.byte 0x00 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request..,1: Stop condition detection interrupt request.." bitfld.byte 0x00 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.." newline bitfld.byte 0x00 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.." bitfld.byte 0x00 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled,1: Timeout interrupt request (TMOI) is enabled" group.byte 0x08++0x00 line.byte 0x00 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x00 7. "HOA,Host Address Detection Flag" "0: Host address is not detected,1: Host address is detected" bitfld.byte 0x00 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected,1: Device-ID command is detected" newline bitfld.byte 0x00 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected,1: General call address is detected" bitfld.byte 0x00 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected,1: Slave address 2 is detected" newline bitfld.byte 0x00 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected,1: Slave address 1 is detected" bitfld.byte 0x00 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected,1: Slave address 0 is detected" group.byte 0x09++0x00 line.byte 0x00 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data,1: ICDRT contains no transmit data" bitfld.byte 0x00 6. "TEND,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" newline bitfld.byte 0x00 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data,1: ICDRR contains receive data" bitfld.byte 0x00 4. "NACKF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.byte 0x00 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected,1: Stop condition is detected" bitfld.byte 0x00 2. "START,Start Condition Detection Flag" "0: Start condition is not detected,1: Start condition is detected" newline bitfld.byte 0x00 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" bitfld.byte 0x00 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 ) group.byte ($2+0x0A)++0x00 line.byte 0x00 "SARL$1,Slave Address Register L" hexmask.byte 0x00 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 ) group.byte ($2+0x0B)++0x00 line.byte 0x00 "SARU$1,Slave Address Register U" bitfld.byte 0x00 2. "SVA9,10-Bit Address(bit9)" "0,1" bitfld.byte 0x00 1. "SVA8,10-Bit Address(bit8)" "0,1" newline bitfld.byte 0x00 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected,1: The 10-bit address format is selected" repeat.end group.byte 0x10++0x00 line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x00 0.--4. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x11++0x00 line.byte 0x00 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x00 0.--4. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x12++0x00 line.byte 0x00 "ICDRT,I2C Bus Transmit Data Register" hexmask.byte 0x00 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data" rgroup.byte 0x13++0x00 line.byte 0x00 "ICDRR,I2C Bus Receive Data Register" hexmask.byte 0x00 0.--7. 1. "ICDRR,8-bit register that stores the received data" group.byte 0x16++0x00 line.byte 0x00 "ICWUR,I2C Bus Wake Up Unit Register" bitfld.byte 0x00 7. "WUE,Wake Up function Enable" "0: Wake-up function is disabled,1: Wake-up function is enabled" bitfld.byte 0x00 6. "WUIE,Wake Up Interrupt Request Enable" "0: Wake Up Interrupt Request (WUI) is disabled,1: Wake Up Interrupt Request (WUI) is enabled" newline bitfld.byte 0x00 5. "WUF,Wake-Up Event Occurrence Flag" "0: Slave address match during Wake-Up function,1: Slave address not match during Wake-Up function" bitfld.byte 0x00 4. "WUACK,Asynchronous/Synchronous Operation State Flag" "0: State of synchronous operation,1: State of asynchronous operation" newline bitfld.byte 0x00 0. "WUAFA,Wake-Up Analog Filter Additional Selection" "0: Do not add the Wake Up analog filter,1: Add the Wake Up analog filter" rgroup.byte 0x17++0x00 line.byte 0x00 "ICWUR2,I2C Bus Wake Up Unit Register 2" bitfld.byte 0x00 2. "WUSYF,Wake-Up function synchronous operation status flag" "0: IIC asynchronous circuit enable condition,1: IIC synchronous circuit enable condition" bitfld.byte 0x00 1. "WUASYF,Wake-Up function asynchronous operation status flag" "0: IIC synchronous circuit enable condition,1: IIC asynchronous circuit enable condition" newline bitfld.byte 0x00 0. "WUSEN,Wake-Up function synchronous enable" "0: IIC asynchronous circuit enable,1: IIC synchronous circuit enable" tree.end repeat 2. (list 1. 2.) (list ad:0x40053100 ad:0x40053200) tree "IIC$1" base $2 group.byte 0x00++0x00 line.byte 0x00 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x00 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)" bitfld.byte 0x00 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset,1: Initiates the RIIC reset or internal reset" newline bitfld.byte 0x00 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle,1: Outputs an extra SCL clock cycle" bitfld.byte 0x00 4. "SOWP,SCLO/SDAO Write Protect" "0: Enables a value to be written in SCLO bit and..,1: Disables a value to be written in SCLO bit.." newline bitfld.byte 0x00 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low,1: (Read)The RIIC has released the SCLn pin" bitfld.byte 0x00 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low,1: (Read)The RIIC has released the SDAn pin./.." newline rbitfld.byte 0x00 1. "SCLI,SCL Line Monitor" "0: SCLn line is low,1: SCLn line is high" rbitfld.byte 0x00 0. "SDAI,SDA Line Monitor" "0: SDAn line is low,1: SDAn line is high" group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state),1: The I2C bus is occupied (bus busy state)" bitfld.byte 0x00 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode" newline bitfld.byte 0x00 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x00 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued" "0: Does not request to issue a stop condition,1: Requests to issue a stop condition" newline bitfld.byte 0x00 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition" "0: Does not request to issue a restart condition,1: Requests to issue a restart condition" bitfld.byte 0x00 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)" "0: Does not request to issue a start condition,1: Requests to issue a start condition" group.byte 0x02++0x00 line.byte 0x00 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x00 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in..,1: Enables writing to the MST and TRS bits in.." bitfld.byte 0x00 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,2: PCLKB/4 clock,3: PCLKB/8 clock,4: PCLKB/16 clock,5: PCLKB/32 clock,6: PCLKB/64 clock,7: PCLKB/128 clock" newline bitfld.byte 0x00 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0]..,1: Disables a value to be written in the BC[2:0].." bitfld.byte 0x00 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,2: 3 bits,3: 4 bits,4: 5 bits,5: 6 bits,6: 7 bits,7: 8 bits" group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is..,1: The internal reference clock divided by 2.." bitfld.byte 0x00 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC..,2: 2 fIIC cycles (ICMR2.DLCS=0) / 3 or 4 fIIC..,3: 3 fIIC cycles (ICMR2.DLCS=0) / 5 or 6 fIIC..,4: 4 fIIC cycles (ICMR2.DLCS=0) / 7 or 8 fIIC..,5: 5 fIIC cycles (ICMR2.DLCS=0) / 9 or 10 fIIC..,6: 6 fIIC cycles (ICMR2.DLCS=0) / 11 or 12 fIIC..,7: 7 fIIC cycles (ICMR2.DLCS=0) / 13 or 14 fIIC.." newline bitfld.byte 0x00 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." bitfld.byte 0x00 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x00 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected,1: Short mode is selected" group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected,1: The SMBus is selected" bitfld.byte 0x00 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle.." newline bitfld.byte 0x00 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of..,1: The RDRF flag is set at the rising edge of.." bitfld.byte 0x00 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled,1: Modification of the ACKBT bit is enabled" newline bitfld.byte 0x00 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x00 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." newline bitfld.byte 0x00 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one fIIC cycle is filtered out..,1: Noise of up to two fIIC cycles is filtered..,2: Noise of up to three fIIC cycles is filtered..,3: Noise of up to four fIIC cycles is filtered.." group.byte 0x05++0x00 line.byte 0x00 "ICFER,I2C Bus Function Enable Register" bitfld.byte 0x00 7. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit is used for the..,1: An Fm+ slope control circuit is used for the.." bitfld.byte 0x00 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used,1: An SCL synchronous circuit is used" newline bitfld.byte 0x00 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used,1: A digital noise filter circuit is used" bitfld.byte 0x00 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during..,1: Transfer operation is suspended during NACK.." newline bitfld.byte 0x00 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled,1: Slave arbitration-lost detection is enabled" bitfld.byte 0x00 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." newline bitfld.byte 0x00 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled,1: Master arbitration-lost detection is enabled" bitfld.byte 0x00 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled,1: The timeout function is enabled" group.byte 0x06++0x00 line.byte 0x00 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x00 7. "HOAE,Host Address Enable" "0: Host address detection is disabled,1: Host address detection is enabled" bitfld.byte 0x00 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled,1: Device-ID address detection is enabled" newline bitfld.byte 0x00 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled,1: General call address detection is enabled" bitfld.byte 0x00 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled,1: Slave address in SARL2 and SARU2 is enabled" newline bitfld.byte 0x00 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled,1: Slave address in SARL1 and SARU1 is enabled" bitfld.byte 0x00 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled,1: Slave address in SARL0 and SARU0 is enabled" group.byte 0x07++0x00 line.byte 0x00 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x00 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request (TXI)..,1: Transmit data empty interrupt request (TXI).." bitfld.byte 0x00 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (TEI) is..,1: Transmit end interrupt request (TEI) is enabled" newline bitfld.byte 0x00 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request (RXI) is..,1: Receive data full interrupt request (RXI) is.." bitfld.byte 0x00 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.." newline bitfld.byte 0x00 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request..,1: Stop condition detection interrupt request.." bitfld.byte 0x00 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.." newline bitfld.byte 0x00 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.." bitfld.byte 0x00 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled,1: Timeout interrupt request (TMOI) is enabled" group.byte 0x08++0x00 line.byte 0x00 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x00 7. "HOA,Host Address Detection Flag" "0: Host address is not detected,1: Host address is detected" bitfld.byte 0x00 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected,1: Device-ID command is detected" newline bitfld.byte 0x00 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected,1: General call address is detected" bitfld.byte 0x00 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected,1: Slave address 2 is detected" newline bitfld.byte 0x00 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected,1: Slave address 1 is detected" bitfld.byte 0x00 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected,1: Slave address 0 is detected" group.byte 0x09++0x00 line.byte 0x00 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data,1: ICDRT contains no transmit data" bitfld.byte 0x00 6. "TEND,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" newline bitfld.byte 0x00 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data,1: ICDRR contains receive data" bitfld.byte 0x00 4. "NACKF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.byte 0x00 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected,1: Stop condition is detected" bitfld.byte 0x00 2. "START,Start Condition Detection Flag" "0: Start condition is not detected,1: Start condition is detected" newline bitfld.byte 0x00 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" bitfld.byte 0x00 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 ) group.byte ($2+0x0A)++0x00 line.byte 0x00 "SARL$1,Slave Address Register L" hexmask.byte 0x00 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 ) group.byte ($2+0x0B)++0x00 line.byte 0x00 "SARU$1,Slave Address Register U" bitfld.byte 0x00 2. "SVA9,10-Bit Address(bit9)" "0,1" bitfld.byte 0x00 1. "SVA8,10-Bit Address(bit8)" "0,1" newline bitfld.byte 0x00 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected,1: The 10-bit address format is selected" repeat.end group.byte 0x10++0x00 line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x00 0.--4. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x11++0x00 line.byte 0x00 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x00 0.--4. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x12++0x00 line.byte 0x00 "ICDRT,I2C Bus Transmit Data Register" hexmask.byte 0x00 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data" rgroup.byte 0x13++0x00 line.byte 0x00 "ICDRR,I2C Bus Receive Data Register" hexmask.byte 0x00 0.--7. 1. "ICDRR,8-bit register that stores the received data" tree.end repeat.end tree.end tree "IRDA (Infrared Data Association)" base ad:0x40070F00 group.byte 0x00++0x00 line.byte 0x00 "IRCR,IrDA Control Register" bitfld.byte 0x00 7. "IRE,IrDA Enable" "0: Serial I/O pins are used for normal serial..,1: Serial I/O pins are used for IrDA data.." bitfld.byte 0x00 3. "IRTXINV,IRTXD Polarity Switching" "0: Data to be transmitted is output to IRTXD as is,1: Data to be transmitted is output to IRTXD.." newline bitfld.byte 0x00 2. "IRRXINV,IRRXD Polarity Switching" "0: IRRXD input is used as received data as is,1: IRRXD input is used as received data after.." tree.end tree "IWDT (Independent Watchdog Timer)" base ad:0x40044400 group.byte 0x00++0x00 line.byte 0x00 "IWDTRR,IWDT Refresh Register" hexmask.byte 0x00 0.--7. 1. "IWDTRR,The counter is refreshed by writing 0x00 and then writing 0xFF to this register" group.word 0x04++0x01 line.word 0x00 "IWDTSR,IWDT Status Register" bitfld.word 0x00 15. "REFEF,Refresh Error Flag" "0: Refresh error not occurred,1: Refresh error occurred" bitfld.word 0x00 14. "UNDFF,Underflow Flag" "0: Underflow not occurred,1: Underflow occurred" hexmask.word 0x00 0.--13. 1. "CNTVAL,Counter ValueValue counted by the counter" tree.end tree "KINT (Key Interrupt Function)" base ad:0x40080000 group.byte 0x00++0x00 line.byte 0x00 "KRCTL,KEY Return Control Register" bitfld.byte 0x00 7. "KRMD,Usage of Key Interrupt Flags(KR0 to KR7)" "0: Do not use key interrupt flags,1: Use key interrupt flags" bitfld.byte 0x00 0. "KREG,Detection Edge Selection (KRF0 to KRF7)" "0: Falling edge,1: Rising edge" group.byte 0x04++0x00 line.byte 0x00 "KRF,KEY Return Flag Register" bitfld.byte 0x00 7. "KRF7,Key interrupt flag 7" "0: No interrupt detected,1: Interrupt detected" bitfld.byte 0x00 6. "KRF6,Key interrupt flag 6" "0: No interrupt detected,1: Interrupt detected" bitfld.byte 0x00 5. "KRF5,Key interrupt flag 5" "0: No interrupt detected,1: Interrupt detected" newline bitfld.byte 0x00 4. "KRF4,Key interrupt flag 4" "0: No interrupt detected,1: Interrupt detected" bitfld.byte 0x00 3. "KRF3,Key interrupt flag 3" "0: No interrupt detected,1: Interrupt detected" bitfld.byte 0x00 2. "KRF2,Key interrupt flag 2" "0: No interrupt detected,1: Interrupt detected" newline bitfld.byte 0x00 1. "KRF1,Key interrupt flag 1" "0: No interrupt detected,1: Interrupt detected" bitfld.byte 0x00 0. "KRF0,Key interrupt flag 0" "0: No interrupt detected,1: Interrupt detected" group.byte 0x08++0x00 line.byte 0x00 "KRM,KEY Return Mode Register" bitfld.byte 0x00 7. "KRM7,Key interrupt mode control 7" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" bitfld.byte 0x00 6. "KRM6,Key interrupt mode control 6" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" bitfld.byte 0x00 5. "KRM5,Key interrupt mode control 5" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" newline bitfld.byte 0x00 4. "KRM4,Key interrupt mode control 4" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" bitfld.byte 0x00 3. "KRM3,Key interrupt mode control 3" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" bitfld.byte 0x00 2. "KRM2,Key interrupt mode control 2" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" newline bitfld.byte 0x00 1. "KRM1,Key interrupt mode control 1" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" bitfld.byte 0x00 0. "KRM0,Key interrupt mode control 0" "0: Does not detect key interrupt signal,1: Detect key interrupt signal" tree.end tree "MMF (Memory Mirror Function)" base ad:0x40001000 group.long 0x00++0x03 line.long 0x00 "MMSFR,MemMirror Special Function Register" hexmask.long.byte 0x00 24.--31. 1. "KEY,MMSFR Key Code" hexmask.long.word 0x00 7.--22. 1. "MEMMIRADDR,Specifies the memory mirror address.NOTE: A value cannot be set in the low-order 7 bits" group.long 0x04++0x03 line.long 0x00 "MMEN,MemMirror Enable Register" hexmask.long.byte 0x00 24.--31. 1. "KEY,MMEN Key Code" bitfld.long 0x00 0. "EN,Memory Mirror Function Enable" "0: Memory Mirror Function is disabled,1: Memory Mirror Function is enabled" tree.end tree "MMPU (Bus Master MPU)" base ad:0x40000000 group.word 0x00++0x01 line.word 0x00 "MMPUCTLA,Bus Master MPU Control Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 1. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset" bitfld.word 0x00 0. "ENABLE,Master Group enable" "0: Master Group is disabled,1: Master Group is enabled" group.word 0x400++0x01 line.word 0x00 "MMPUCTLB,Bus Master MPU Control Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 1. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset" bitfld.word 0x00 0. "ENABLE,Master Group enable" "0: Master Group is disabled,1: Master Group is enabled" group.word 0x800++0x01 line.word 0x00 "MMPUCTLC,Bus Master MPU Control Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 1. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset" bitfld.word 0x00 0. "ENABLE,Master Group enable" "0: Master Group is disabled,1: Master Group is enabled" repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 ) group.word ($2+0x200)++0x01 line.word 0x00 "MMPUACA$1,Group A Region" bitfld.word 0x00 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x00 1. "RP,Read protection" "0: Read permission,1: Read protection" bitfld.word 0x00 0. "ENABLE,Region enable" "0: Group m Region n unit is disabled,1: Group m Region n unit is enabled" repeat.end repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 ) group.word ($2+0x300)++0x01 line.word 0x00 "MMPUACA$1,Group A Region" bitfld.word 0x00 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x00 1. "RP,Read protection" "0: Read permission,1: Read protection" bitfld.word 0x00 0. "ENABLE,Region enable" "0: Group m Region n unit is disabled,1: Group m Region n unit is enabled" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 ) group.word ($2+0x600)++0x01 line.word 0x00 "MMPUACB$1,Group B Region" bitfld.word 0x00 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x00 1. "RP,Read protection" "0: Read permission,1: Read protection" bitfld.word 0x00 0. "ENABLE,Region enable" "0: Group m Region n unit is disabled,1: Group m Region n unit is enabled" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 ) group.word ($2+0xA00)++0x01 line.word 0x00 "MMPUACC$1,Group C Region" bitfld.word 0x00 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x00 1. "RP,Read protection" "0: Read permission,1: Read protection" bitfld.word 0x00 0. "ENABLE,Region enable" "0: Group m Region n unit is disabled,1: Group m Region n unit is enabled" repeat.end repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 ) group.long ($2+0x204)++0x03 line.long 0x00 "MMPUSA$1,Group A Region" hexmask.long 0x00 0.--31. 1. "MMPUSA,Address where the region starts for use in region determination.NOTE: The low-order 2 bits are fixed to 0" repeat.end repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 ) group.long ($2+0x304)++0x03 line.long 0x00 "MMPUSA$1,Group A Region" hexmask.long 0x00 0.--31. 1. "MMPUSA,Address where the region starts for use in region determination.NOTE: The low-order 2 bits are fixed to 0" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 ) group.long ($2+0x604)++0x03 line.long 0x00 "MMPUSB$1,Group B Region" hexmask.long 0x00 0.--31. 1. "MMPUSB,Address where the region starts for use in region determination.NOTE: The low-order 2 bits are fixed to 0" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 ) group.long ($2+0xA04)++0x03 line.long 0x00 "MMPUSC$1,Group C Region" hexmask.long 0x00 0.--31. 1. "MMPUSC,Address where the region starts for use in region determination.NOTE: The low-order 2 bits are fixed to 0" repeat.end repeat 16. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 ) group.long ($2+0x208)++0x03 line.long 0x00 "MMPUEA$1,Group A Region" hexmask.long 0x00 0.--31. 1. "MMPUEA,Region end address registerAddress where the region end for use in region determination.NOTE: The low-order 2 bits are fixed to 1" repeat.end repeat 16. (strings "16" "17" "18" "19" "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "30" "31" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xA0 0xB0 0xC0 0xD0 0xE0 0xF0 ) group.long ($2+0x308)++0x03 line.long 0x00 "MMPUEA$1,Group A Region" hexmask.long 0x00 0.--31. 1. "MMPUEA,Region end address registerAddress where the region end for use in region determination.NOTE: The low-order 2 bits are fixed to 1" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 ) group.long ($2+0x608)++0x03 line.long 0x00 "MMPUEB$1,Group B Region" hexmask.long 0x00 0.--31. 1. "MMPUEB,Region end address registerAddress where the region end for use in region determination.NOTE: The low-order 2 bits are fixed to 1" repeat.end repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 ) group.long ($2+0xA08)++0x03 line.long 0x00 "MMPUEC$1,Group C Region" hexmask.long 0x00 0.--31. 1. "MMPUEC,Region end address registerAddress where the region end for use in region determination.NOTE: The low-order 2 bits are fixed to 1" repeat.end group.word 0x102++0x01 line.word 0x00 "MMPUPTA,Group A Protection of Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "PROTECT,Protection of register(MMPUSAn MMPUEAn and MMPUACAn)" "0: All Bus Master MPU Group A register writing..,1: All Bus Master MPU Group A register writing.." group.word 0x502++0x01 line.word 0x00 "MMPUPTB,Group B Protection of Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "PROTECT,Protection of register(MMPUSBn MMPUEBn and MMPUACBn)" "0: All Bus Master MPU Group B register writing..,1: All Bus Master MPU Group B register writing.." group.word 0x902++0x01 line.word 0x00 "MMPUPTC,Group C protection of register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "PROTECT,Protection of register (MMPUSCn MMPUECn and MMPUACCn)" "0: All Bus Master MPU Group C register writing..,1: All Bus Master MPU Group C register writing.." tree.end tree "MSTP (Module Stop Control)" base ad:0x40047000 group.long 0x00++0x03 line.long 0x00 "MSTPCRB,Module Stop Control Register B" bitfld.long 0x00 31. "MSTPB31,Serial Communication Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 30. "MSTPB30,Serial Communication Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 29. "MSTPB29,Serial Communication Interface 2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 28. "MSTPB28,Serial Communication Interface 3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 27. "MSTPB27,Serial Communication Interface 4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 26. "MSTPB26,Serial Communication Interface 5 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 25. "MSTPB25,Serial Communication Interface 6 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 24. "MSTPB24,Serial Communication Interface 7 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 23. "MSTPB23,Serial Communication Interface 8 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 22. "MSTPB22,Serial Communication Interface 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 19. "MSTPB19,Serial Peripheral Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 18. "MSTPB18,Serial Peripheral Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 15. "MSTPB15,ETHERC0 and EDMAC0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 13. "MSTPB13,EPTPC and PTPEDMAC Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 12. "MSTPB12,Universal Serial Bus 2.0 HS Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 11. "MSTPB11,Universal Serial Bus 2.0 FS Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 9. "MSTPB9,I2C Bus Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 8. "MSTPB8,I2C Bus Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 7. "MSTPB7,I2C Bus Interface 2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 6. "MSTPB6,Queued Serial Peripheral Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 5. "MSTPB5,IrDA Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 2. "MSTPB2,RCAN0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 1. "MSTPB1,RCAN1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" group.long 0x04++0x03 line.long 0x00 "MSTPCRC,Module Stop Control Register C" bitfld.long 0x00 31. "MSTPC31,TSIP Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 14. "MSTPC14,Event Link Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 13. "MSTPC13,Data Operation Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 12. "MSTPC12,Synchronous Digital Hierarchy/ Multi Media Card 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 11. "MSTPC11,Synchronous Digital Hierarchy/ Multi Media Card 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 9. "MSTPC9,Sampling Rate Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 8. "MSTPC8,Synchronous Serial Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 7. "MSTPC7,Synchronous Serial Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 6. "MSTPC6,2DG engine Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 5. "MSTPC5,JPEG codec engine Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 4. "MSTPC4,Grafic LCD Controler Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 3. "MSTPC3,Capacitive Touch Sensing Unit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 2. "MSTPC2,Parallel Data Capture Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 1. "MSTPC1,CRC Calculator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 0. "MSTPC0,CAC Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" group.long 0x08++0x03 line.long 0x00 "MSTPCRD,Module Stop Control Register D" bitfld.long 0x00 28. "MSTPD28,Comparator-OC0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 27. "MSTPD27,Comparator-OC1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 26. "MSTPD26,Comparator-OC2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 25. "MSTPD25,Comparator-OC3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 24. "MSTPD24,Comparator-OC4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 23. "MSTPD23,Comparator-OC5 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 22. "MSTPD22,Temperature Sensor Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 20. "MSTPD20,D/A Converter 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 16. "MSTPD16,12-bit A/D Converter 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 15. "MSTPD15,12-bit A/D Converter 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 14. "MSTPD14,PGI Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 6. "MSTPD6,GPT ch13-ch8 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 5. "MSTPD5,GPT ch7-ch0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 3. "MSTPD3,AGT0 Module StopNote: AGT0 is in the module stop state when the count source is either of PCLKB PCLKB/2 or PCLKB/8" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 2. "MSTPD2,AGT1 Module StopNote: AGT1 is in the module stop state when the count source is either of PCLKB PCLKB/2 or PCLKB/8" "0: Cancel the module-stop state,1: Enter the module-stop state" tree.end tree "PDC (Parallel Data Capture Unit)" base ad:0x40094000 group.long 0x00++0x03 line.long 0x00 "PCCR0,PDC Control Register 0" bitfld.long 0x00 14. "EDS,Endian Select" "0: Little endian,1: Big endian" bitfld.long 0x00 11.--13. "PCKDIV,PCKO Frequency Division Ratio Select" "0: PCKO/2,1: PCKO/4,2: PCKO/6,3: PCKO/8,4: PCKO/10,5: PCKO/12,6: PCKO/14,7: PCKO/16" newline bitfld.long 0x00 10. "PCKOE,PCKO Output Enable" "0: PCKO output is disabled (fixed to the high..,1: PCKO output is enabled" bitfld.long 0x00 9. "HERIE,Horizontal Byte Number Setting Error Interrupt Enable" "0: Generation of horizontal byte number setting..,1: Generation of horizontal byte number setting.." newline bitfld.long 0x00 8. "VERIE,Vertical Line Number Setting Error Interrupt Enable" "0: Generation of vertical line number setting..,1: Generation of vertical line number setting.." bitfld.long 0x00 7. "UDRIE,Underrun Interrupt Enable" "0: Generation of underrun interrupt requests is..,1: Generation of underrun interrupt requests is.." newline bitfld.long 0x00 6. "OVIE,Overrun Interrupt Enable" "0: Generation of overrun interrupt requests is..,1: Generation of overrun interrupt requests is.." bitfld.long 0x00 5. "FEIE,Frame End Interrupt Enable" "0: Generation of frame end interrupt requests is..,1: Generation of frame end interrupt requests is.." newline bitfld.long 0x00 4. "DFIE,Receive Data Ready Interrupt Enable" "0: Generation of receive data ready interrupt..,1: Generation of receive data ready interrupt.." bitfld.long 0x00 3. "PRST,PDC Reset" "0: PDC reset is not applied,1: PDC is reset" newline bitfld.long 0x00 2. "HPS,HSYNC Signal Polarity Select" "0: HSYNC signal is active high,1: HSYNC signal is active low" bitfld.long 0x00 1. "VPS,VSYNC Signal Polarity Select" "0: VSYNC signal is active high,1: VSYNC signal is active low" newline bitfld.long 0x00 0. "PCKE,Channel 0 GTCNT Count Clear" "0: Operations for reception are stopped,1: Operations for reception are ongoing" group.long 0x04++0x03 line.long 0x00 "PCCR1,PDC Control Register 1" bitfld.long 0x00 0. "PCE,PDC Operation Enable" "0: Operations for reception are disabled,1: Operations for reception are enabled" group.long 0x08++0x03 line.long 0x00 "PCSR,PDC Status Register" bitfld.long 0x00 6. "HERF,Horizontal Byte Number Setting Error Flag" "0: Horizontal byte number setting error has not..,1: Horizontal byte number setting error has been.." bitfld.long 0x00 5. "VERF,Vertical Line Number Setting Error Flag" "0: Vertical line number setting error has not..,1: Vertical line number setting error has been.." newline bitfld.long 0x00 4. "UDRF,Underrun Flag" "0: Underrun has not been generated,1: Underrun has been generated" bitfld.long 0x00 3. "OVRF,Overrun Flag" "0: FIFO overrun has not been generated,1: FIFO overrun has been generated" newline bitfld.long 0x00 2. "FEF,Frame End Flag" "0: Frame end has not been generated,1: Frame end has been generated" rbitfld.long 0x00 1. "FEMPF,FIFO Empty Flag" "0: FIFO is not empty,1: FIFO is empty" newline rbitfld.long 0x00 0. "FBSY,Frame Busy Flag" "0: Operations for reception are stopped,1: Operations for reception are ongoing" rgroup.long 0x0C++0x03 line.long 0x00 "PCMONR,PDC Pin Monitor Register" bitfld.long 0x00 1. "HSYNC,HSYNC Signal Status Flag" "0: HSYNC signal is at the low level,1: HSYNC signal is at the high level" bitfld.long 0x00 0. "VSYNC,VSYNC Signal Status Flag" "0: VSYNC signal is at the low level,1: VSYNC signal is at the high level" rgroup.long 0x10++0x03 line.long 0x00 "PCDR,PDC Receive Data Register" hexmask.long 0x00 0.--31. 1. "PCDR,The PDC includes a 32-bit-wide 22-stage FIFO for the storage of captured data" group.long 0x14++0x03 line.long 0x00 "VCR,Vertical Capture Register" hexmask.long.word 0x00 16.--27. 1. "VSZ,Vertical Capture Size Number of lines to be captured" hexmask.long.word 0x00 0.--11. 1. "VST,Vertical Capture Start Line PositionNumber of the line where capture is to start" group.long 0x18++0x03 line.long 0x00 "HCR,Horizontal Capture Register" hexmask.long.word 0x00 16.--27. 1. "HSZ,Horizontal Capture Size Number of bytes to capture horizontally" hexmask.long.word 0x00 0.--11. 1. "HST,Horizontal Capture Start Byte Position Horizontal position in bytes where capture is to start" tree.end tree "PFS (Pmn Pin Function Control Register)" base ad:0x40040800 group.long 0x00++0x03 line.long 0x00 "P000PFS,P000 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x02++0x01 line.word 0x00 "P000PFS_HA,P000 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x03++0x00 line.byte 0x00 "P000PFS_BY,P000 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x04++0x03 line.long 0x00 "P00%sPFS,P00%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x06++0x01 line.word 0x00 "P00%sPFS_HA,P00%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x07++0x00 line.byte 0x00 "P00%sPFS_BY,P00%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x20++0x03 line.long 0x00 "P00%sPFS,P00%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x22++0x01 line.word 0x00 "P00%sPFS_HA,P00%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x23++0x00 line.byte 0x00 "P00%sPFS_BY,P00%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x38++0x03 line.long 0x00 "P0%sPFS,P0%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x3A++0x01 line.word 0x00 "P0%sPFS_HA,P0%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x3B++0x00 line.byte 0x00 "P0%sPFS_BY,P0%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x40++0x03 line.long 0x00 "P100PFS,P100 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x42++0x01 line.word 0x00 "P100PFS_HA,P100 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x43++0x00 line.byte 0x00 "P100PFS_BY,P100 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x44++0x03 line.long 0x00 "P10%sPFS,P10%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x46++0x01 line.word 0x00 "P10%sPFS_HA,P10%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x47++0x00 line.byte 0x00 "P10%sPFS_BY,P10%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x60++0x03 line.long 0x00 "P108PFS,P108 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x62++0x01 line.word 0x00 "P108PFS_HA,P108 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x63++0x00 line.byte 0x00 "P108PFS_BY,P108 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x64++0x03 line.long 0x00 "P109PFS,P109 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x66++0x01 line.word 0x00 "P109PFS_HA,P109 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x67++0x00 line.byte 0x00 "P109PFS_BY,P109 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x68++0x03 line.long 0x00 "P110PFS,P110 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x6A++0x01 line.word 0x00 "P110PFS_HA,P110 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x6B++0x00 line.byte 0x00 "P110PFS_BY,P110 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x6C++0x03 line.long 0x00 "P1%sPFS,P1%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x6E++0x01 line.word 0x00 "P1%sPFS_HA,P1%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x6F++0x00 line.byte 0x00 "P1%sPFS_BY,P1%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x80++0x03 line.long 0x00 "P200PFS,P200 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x82++0x01 line.word 0x00 "P200PFS_HA,P200 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x83++0x00 line.byte 0x00 "P200PFS_BY,P200 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x84++0x03 line.long 0x00 "P201PFS,P201 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x86++0x01 line.word 0x00 "P201PFS_HA,P201 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x87++0x00 line.byte 0x00 "P201PFS_BY,P201 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x88++0x03 line.long 0x00 "P20%sPFS,P20%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x8A++0x01 line.word 0x00 "P20%sPFS_HA,P20%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x8B++0x00 line.byte 0x00 "P20%sPFS_BY,P20%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0xA8++0x03 line.long 0x00 "P2%sPFS,P2%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0xAA++0x01 line.word 0x00 "P2%sPFS_HA,P2%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0xAB++0x00 line.byte 0x00 "P2%sPFS_BY,P2%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0xC0++0x03 line.long 0x00 "P300PFS,P300 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0xC2++0x01 line.word 0x00 "P300PFS_HA,P300 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0xC3++0x00 line.byte 0x00 "P300PFS_BY,P300 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0xC4++0x03 line.long 0x00 "P30%sPFS,P30%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0xC6++0x01 line.word 0x00 "P30%sPFS_HA,P30%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0xC7++0x00 line.byte 0x00 "P30%sPFS_BY,P30%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0xE8++0x03 line.long 0x00 "P3%sPFS,P3%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0xEA++0x01 line.word 0x00 "P3%sPFS_HA,P30%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0xEB++0x00 line.byte 0x00 "P3%sPFS_BY,P30%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x100++0x03 line.long 0x00 "P40%sPFS,P40%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x102++0x01 line.word 0x00 "P40%sPFS_HA,P40%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x103++0x00 line.byte 0x00 "P40%sPFS_BY,P40%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x128++0x03 line.long 0x00 "P4%sPFS,P4%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" bitfld.long 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" newline bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" newline bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x12A++0x01 line.word 0x00 "P4%sPFS_HA,P4%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 13. "EOF,Event on Falling" "0: Do not care,1: Detect falling edge" newline bitfld.word 0x00 12. "EOR,Event on Rising" "0: Do not care,1: Detect rising edge" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x12B++0x00 line.byte 0x00 "P4%sPFS_BY,P4%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x140++0x03 line.long 0x00 "P50%sPFS,P50%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x142++0x01 line.word 0x00 "P50%sPFS_HA,P50%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x143++0x00 line.byte 0x00 "P50%sPFS_BY,P50%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x16C++0x03 line.long 0x00 "P5%sPFS,P5%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x16E++0x01 line.word 0x00 "P5%sPFS_HA,P5%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x16F++0x00 line.byte 0x00 "P5%sPFS_BY,P5%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x180++0x03 line.long 0x00 "P60%sPFS,P60%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x182++0x01 line.word 0x00 "P60%sPFS_HA,P60%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x183++0x00 line.byte 0x00 "P60%sPFS_BY,P60%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x1A8++0x03 line.long 0x00 "P6%sPFS,P6%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x1AA++0x01 line.word 0x00 "P6%sPFS_HA,P6%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x1AB++0x00 line.byte 0x00 "P6%sPFS_BY,P6%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x1C0++0x03 line.long 0x00 "P70%sPFS,P70%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x1C2++0x01 line.word 0x00 "P70%sPFS_HA,P70%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x1C3++0x00 line.byte 0x00 "P70%sPFS_BY,P70%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x200++0x03 line.long 0x00 "P80%sPFS,P80%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x202++0x01 line.word 0x00 "P80%sPFS_HA,P80%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x203++0x00 line.byte 0x00 "P80%sPFS_BY,P80%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x240++0x03 line.long 0x00 "P90%sPFS,P90%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x242++0x01 line.word 0x00 "P90%sPFS_HA,P90%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x243++0x00 line.byte 0x00 "P90%sPFS_BY,P90%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x254++0x03 line.long 0x00 "P90%sPFS,P90%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x256++0x01 line.word 0x00 "P90%sPFS_HA,P90%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x257++0x00 line.byte 0x00 "P90%sPFS_BY,P90%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x280++0x03 line.long 0x00 "PA0%sPFS,PA0%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x282++0x01 line.word 0x00 "PA0%sPFS_HA,PA0%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x283++0x00 line.byte 0x00 "PA0%sPFS_BY,PA0%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x2A0++0x03 line.long 0x00 "PA0%sPFS,PA0%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x2A2++0x01 line.word 0x00 "PA0%sPFS_HA,PA0%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x2A3++0x00 line.byte 0x00 "PA0%sPFS_BY,PA0%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x2A8++0x03 line.long 0x00 "PA10PFS,PA10 Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x2AA++0x01 line.word 0x00 "PA10PFS_HA,PA10 Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x2AB++0x00 line.byte 0x00 "PA10PFS_BY,PA10 Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x2C0++0x03 line.long 0x00 "PB0%sPFS,PB0%s Pin Function Control Register" bitfld.long 0x00 24.--28. "PSEL,Port Function SelectThese bits select the peripheral function" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin,1: Uses the pin as an I/O port for peripheral.." bitfld.long 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" newline bitfld.long 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.long 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" bitfld.long 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.long 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" rbitfld.long 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" newline bitfld.long 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x2C2++0x01 line.word 0x00 "PB0%sPFS_HA,PB0%s Pin Function Control Register" bitfld.word 0x00 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x00 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" bitfld.word 0x00 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,2: Setting prohibited,3: High-drive output" newline bitfld.word 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.word 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.word 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x2C3++0x00 line.byte 0x00 "PB0%sPFS_BY,PB0%s Pin Function Control Register" bitfld.byte 0x00 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" bitfld.byte 0x00 4. "PCR,Pull-up Control" "0: Disables an input pull-up,1: Enables an input pull-up" bitfld.byte 0x00 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x00 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x00 0. "PODR,Port Output Data" "0: Low output,1: High output" tree.end tree "PMISC (Miscellaneous Port Control Register)" base ad:0x40040D00 group.byte 0x00++0x00 line.byte 0x00 "PFENET,Ethernet Control Register" bitfld.byte 0x00 4. "PHYMODE0,Ethernet Mode Setting ch0" "0: RMII mode (ETHERC channel 0),1: MII mode (ETHERC channel 0)" group.byte 0x03++0x00 line.byte 0x00 "PWPR,Write-Protect Register" bitfld.byte 0x00 7. "BOWI,PFSWE Bit Write Disable" "0: Writing to the PFSWE bit is enabled,1: Writing to the PFSWE bit is disabled" bitfld.byte 0x00 6. "PFSWE,PFS Register Write Enable" "0: Writing to the PFS register is disabled,1: Writing to the PFS register is enabled" tree.end tree "POEG (Port Output Enable Module for GPT)" base ad:0x40042000 group.long 0x00++0x03 line.long 0x00 "POEGGA,POEG Group" bitfld.long 0x00 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three..,1: Sampling GTETRG pin input level for three..,2: Sampling GTETRG pin input level for three..,3: Sampling GTETRG pin input level for three.." bitfld.long 0x00 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled" newline bitfld.long 0x00 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed" rbitfld.long 0x00 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0,1: GTETRG input after filtering is 1" newline bitfld.long 0x00 13. "CDRE5,Comparator Disable Request Enable 5Note: Can be modified only once after a reset" "0: A disable request of comparator 5 disabled,1: A disable request of comparator 5 enabled" bitfld.long 0x00 12. "CDRE4,Comparator Disable Request Enable 4Note: Can be modified only once after a reset" "0: A disable request of comparator 4 disabled,1: A disable request of comparator 4 enabled" newline bitfld.long 0x00 11. "CDRE3,Comparator Disable Request Enable 3Note: Can be modified only once after a reset" "0: A disable request of comparator 3 disabled,1: A disable request of comparator 3 enabled" bitfld.long 0x00 10. "CDRE2,Comparator Disable Request Enable 2Note: Can be modified only once after a reset" "0: A disable request of comparator 2 disabled,1: A disable request of comparator 2 enabled" newline bitfld.long 0x00 9. "CDRE1,Comparator Disable Request Enable 1Note: Can be modified only once after a reset" "0: A disable request of comparator 1 disabled,1: A disable request of comparator 1 enabled" bitfld.long 0x00 8. "CDRE0,Comparator Disable Request Enable 0Note: Can be modified only once after a reset" "0: A disable request of comparator 0 disabled,1: A disable request of comparator 0 enabled" newline bitfld.long 0x00 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 5. "IOCE,Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset" "0: Disable output-disable requests from GPT..,1: Enable output-disable requests from GPT.." newline bitfld.long 0x00 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.." bitfld.long 0x00 3. "SSF,Software Stop Flag" "0: A output-disable request from software has..,1: A output-disable request from software has.." newline bitfld.long 0x00 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 1. "IOCF,Real Time Overcurrent Detection Flag" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.." newline bitfld.long 0x00 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin..,1: A output-disable request from the GTETRG pin.." group.long 0x100++0x03 line.long 0x00 "POEGGB,POEG Group" bitfld.long 0x00 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three..,1: Sampling GTETRG pin input level for three..,2: Sampling GTETRG pin input level for three..,3: Sampling GTETRG pin input level for three.." bitfld.long 0x00 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled" newline bitfld.long 0x00 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed" rbitfld.long 0x00 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0,1: GTETRG input after filtering is 1" newline bitfld.long 0x00 13. "CDRE5,Comparator Disable Request Enable 5Note: Can be modified only once after a reset" "0: A disable request of comparator 5 disabled,1: A disable request of comparator 5 enabled" bitfld.long 0x00 12. "CDRE4,Comparator Disable Request Enable 4Note: Can be modified only once after a reset" "0: A disable request of comparator 4 disabled,1: A disable request of comparator 4 enabled" newline bitfld.long 0x00 11. "CDRE3,Comparator Disable Request Enable 3Note: Can be modified only once after a reset" "0: A disable request of comparator 3 disabled,1: A disable request of comparator 3 enabled" bitfld.long 0x00 10. "CDRE2,Comparator Disable Request Enable 2Note: Can be modified only once after a reset" "0: A disable request of comparator 2 disabled,1: A disable request of comparator 2 enabled" newline bitfld.long 0x00 9. "CDRE1,Comparator Disable Request Enable 1Note: Can be modified only once after a reset" "0: A disable request of comparator 1 disabled,1: A disable request of comparator 1 enabled" bitfld.long 0x00 8. "CDRE0,Comparator Disable Request Enable 0Note: Can be modified only once after a reset" "0: A disable request of comparator 0 disabled,1: A disable request of comparator 0 enabled" newline bitfld.long 0x00 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 5. "IOCE,Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset" "0: Disable output-disable requests from GPT..,1: Enable output-disable requests from GPT.." newline bitfld.long 0x00 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.." bitfld.long 0x00 3. "SSF,Software Stop Flag" "0: A output-disable request from software has..,1: A output-disable request from software has.." newline bitfld.long 0x00 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 1. "IOCF,Real Time Overcurrent Detection Flag" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.." newline bitfld.long 0x00 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin..,1: A output-disable request from the GTETRG pin.." group.long 0x200++0x03 line.long 0x00 "POEGGC,POEG Group" bitfld.long 0x00 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three..,1: Sampling GTETRG pin input level for three..,2: Sampling GTETRG pin input level for three..,3: Sampling GTETRG pin input level for three.." bitfld.long 0x00 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled" newline bitfld.long 0x00 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed" rbitfld.long 0x00 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0,1: GTETRG input after filtering is 1" newline bitfld.long 0x00 13. "CDRE5,Comparator Disable Request Enable 5Note: Can be modified only once after a reset" "0: A disable request of comparator 5 disabled,1: A disable request of comparator 5 enabled" bitfld.long 0x00 12. "CDRE4,Comparator Disable Request Enable 4Note: Can be modified only once after a reset" "0: A disable request of comparator 4 disabled,1: A disable request of comparator 4 enabled" newline bitfld.long 0x00 11. "CDRE3,Comparator Disable Request Enable 3Note: Can be modified only once after a reset" "0: A disable request of comparator 3 disabled,1: A disable request of comparator 3 enabled" bitfld.long 0x00 10. "CDRE2,Comparator Disable Request Enable 2Note: Can be modified only once after a reset" "0: A disable request of comparator 2 disabled,1: A disable request of comparator 2 enabled" newline bitfld.long 0x00 9. "CDRE1,Comparator Disable Request Enable 1Note: Can be modified only once after a reset" "0: A disable request of comparator 1 disabled,1: A disable request of comparator 1 enabled" bitfld.long 0x00 8. "CDRE0,Comparator Disable Request Enable 0Note: Can be modified only once after a reset" "0: A disable request of comparator 0 disabled,1: A disable request of comparator 0 enabled" newline bitfld.long 0x00 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 5. "IOCE,Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset" "0: Disable output-disable requests from GPT..,1: Enable output-disable requests from GPT.." newline bitfld.long 0x00 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.." bitfld.long 0x00 3. "SSF,Software Stop Flag" "0: A output-disable request from software has..,1: A output-disable request from software has.." newline bitfld.long 0x00 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 1. "IOCF,Real Time Overcurrent Detection Flag" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.." newline bitfld.long 0x00 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin..,1: A output-disable request from the GTETRG pin.." group.long 0x300++0x03 line.long 0x00 "POEGGD,POEG Group" bitfld.long 0x00 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three..,1: Sampling GTETRG pin input level for three..,2: Sampling GTETRG pin input level for three..,3: Sampling GTETRG pin input level for three.." bitfld.long 0x00 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled" newline bitfld.long 0x00 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed" rbitfld.long 0x00 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0,1: GTETRG input after filtering is 1" newline bitfld.long 0x00 13. "CDRE5,Comparator Disable Request Enable 5Note: Can be modified only once after a reset" "0: A disable request of comparator 5 disabled,1: A disable request of comparator 5 enabled" bitfld.long 0x00 12. "CDRE4,Comparator Disable Request Enable 4Note: Can be modified only once after a reset" "0: A disable request of comparator 4 disabled,1: A disable request of comparator 4 enabled" newline bitfld.long 0x00 11. "CDRE3,Comparator Disable Request Enable 3Note: Can be modified only once after a reset" "0: A disable request of comparator 3 disabled,1: A disable request of comparator 3 enabled" bitfld.long 0x00 10. "CDRE2,Comparator Disable Request Enable 2Note: Can be modified only once after a reset" "0: A disable request of comparator 2 disabled,1: A disable request of comparator 2 enabled" newline bitfld.long 0x00 9. "CDRE1,Comparator Disable Request Enable 1Note: Can be modified only once after a reset" "0: A disable request of comparator 1 disabled,1: A disable request of comparator 1 enabled" bitfld.long 0x00 8. "CDRE0,Comparator Disable Request Enable 0Note: Can be modified only once after a reset" "0: A disable request of comparator 0 disabled,1: A disable request of comparator 0 enabled" newline bitfld.long 0x00 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 5. "IOCE,Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset" "0: Disable output-disable requests from GPT..,1: Enable output-disable requests from GPT.." newline bitfld.long 0x00 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset" "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.." bitfld.long 0x00 3. "SSF,Software Stop Flag" "0: A output-disable request from software has..,1: A output-disable request from software has.." newline bitfld.long 0x00 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x00 1. "IOCF,Real Time Overcurrent Detection Flag" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.." newline bitfld.long 0x00 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin..,1: A output-disable request from the GTETRG pin.." tree.end tree "PORT (Port Control Registers)" tree "PORT0" base ad:0x40040000 group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" hexmask.long.word 0x00 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x00 0.--15. 1. "PDR,Pmn Direction" group.word 0x00++0x01 line.word 0x00 "PODR,Output data register" hexmask.word 0x00 0.--15. 1. "PODR,Pmn Output Data" group.word 0x02++0x01 line.word 0x00 "PDR,Data direction register" hexmask.word 0x00 0.--15. 1. "PDR,Pmn Direction" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" hexmask.long.word 0x00 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x06++0x01 line.word 0x00 "PIDR,Input data register" hexmask.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" hexmask.long.word 0x00 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x00 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x08++0x01 line.word 0x00 "PORR,Output reset register" hexmask.word 0x00 0.--15. 1. "PORR,Pmn Output Reset" wgroup.word 0x0A++0x01 line.word 0x00 "POSR,Output set register" hexmask.word 0x00 0.--15. 1. "POSR,Pmn Output Set" tree.end repeat 4. (list 1. 2. 3. 4.) (list ad:0x40040020 ad:0x40040040 ad:0x40040060 ad:0x40040080) tree "PORT$1" base $2 group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" hexmask.long.word 0x00 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x00 0.--15. 1. "PDR,Pmn Direction" group.word 0x00++0x01 line.word 0x00 "PODR,Output data register" hexmask.word 0x00 0.--15. 1. "PODR,Pmn Output Data" group.word 0x02++0x01 line.word 0x00 "PDR,Data direction register" hexmask.word 0x00 0.--15. 1. "PDR,Pmn Direction" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" hexmask.long.word 0x00 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x04++0x01 line.word 0x00 "EIDR,Event input data register" hexmask.word 0x00 0.--15. 1. "EIDR,Pmn Event Input Data" rgroup.word 0x06++0x01 line.word 0x00 "PIDR,Input data register" hexmask.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" hexmask.long.word 0x00 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x00 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x08++0x01 line.word 0x00 "PORR,Output set register" hexmask.word 0x00 0.--15. 1. "PORR,Pmn Output Reset" wgroup.word 0x0A++0x01 line.word 0x00 "POSR,Output reset register" hexmask.word 0x00 0.--15. 1. "POSR,Pmn Output Set" group.long 0x0C++0x03 line.long 0x00 "PCNTR4,Port Control Register 4" hexmask.long.word 0x00 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x00 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0x0C++0x01 line.word 0x00 "EORR,Event output set register" hexmask.word 0x00 0.--15. 1. "EORR,Pmn Event Output Reset" group.word 0x0E++0x01 line.word 0x00 "EOSR,Event output reset register" hexmask.word 0x00 0.--15. 1. "EOSR,Pmn Event Output Set" tree.end repeat.end repeat 5. (list 5. 6. 7. 8. 9.) (list ad:0x400400A0 ad:0x400400C0 ad:0x400400E0 ad:0x40040100 ad:0x40040120) tree "PORT$1" base $2 group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" hexmask.long.word 0x00 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x00 0.--15. 1. "PDR,Pmn Direction" group.word 0x00++0x01 line.word 0x00 "PODR,Output data register" hexmask.word 0x00 0.--15. 1. "PODR,Pmn Output Data" group.word 0x02++0x01 line.word 0x00 "PDR,Data direction register" hexmask.word 0x00 0.--15. 1. "PDR,Pmn Direction" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" hexmask.long.word 0x00 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x06++0x01 line.word 0x00 "PIDR,Input data register" hexmask.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" hexmask.long.word 0x00 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x00 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x08++0x01 line.word 0x00 "PORR,Output reset register" hexmask.word 0x00 0.--15. 1. "PORR,Pmn Output Reset" wgroup.word 0x0A++0x01 line.word 0x00 "POSR,Output set register" hexmask.word 0x00 0.--15. 1. "POSR,Pmn Output Set" tree.end repeat.end tree "PORTA" base ad:0x40040140 group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" hexmask.long.word 0x00 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x00 0.--15. 1. "PDR,Pmn Direction" group.word 0x00++0x01 line.word 0x00 "PODR,Output data register" hexmask.word 0x00 0.--15. 1. "PODR,Pmn Output Data" group.word 0x02++0x01 line.word 0x00 "PDR,Data direction register" hexmask.word 0x00 0.--15. 1. "PDR,Pmn Direction" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" hexmask.long.word 0x00 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x06++0x01 line.word 0x00 "PIDR,Input data register" hexmask.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" hexmask.long.word 0x00 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x00 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x08++0x01 line.word 0x00 "PORR,Output reset register" hexmask.word 0x00 0.--15. 1. "PORR,Pmn Output Reset" wgroup.word 0x0A++0x01 line.word 0x00 "POSR,Output set register" hexmask.word 0x00 0.--15. 1. "POSR,Pmn Output Set" tree.end tree "PORTB" base ad:0x40040160 group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" hexmask.long.word 0x00 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x00 0.--15. 1. "PDR,Pmn Direction" group.word 0x00++0x01 line.word 0x00 "PODR,Output data register" hexmask.word 0x00 0.--15. 1. "PODR,Pmn Output Data" group.word 0x02++0x01 line.word 0x00 "PDR,Data direction register" hexmask.word 0x00 0.--15. 1. "PDR,Pmn Direction" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" hexmask.long.word 0x00 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x06++0x01 line.word 0x00 "PIDR,Input data register" hexmask.word 0x00 0.--15. 1. "PIDR,Pmn Input Data" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" hexmask.long.word 0x00 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x00 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x08++0x01 line.word 0x00 "PORR,Output reset register" hexmask.word 0x00 0.--15. 1. "PORR,Pmn Output Reset" wgroup.word 0x0A++0x01 line.word 0x00 "POSR,Output set register" hexmask.word 0x00 0.--15. 1. "POSR,Pmn Output Set" tree.end tree.end tree "QSPI (Queued Synchronous Peripheral Interface)" base ad:0x64000000 group.long 0x00++0x03 line.long 0x00 "SFMSMD,Transfer Mode Control Register" bitfld.long 0x00 15. "SFMCCE,Read instruction code selection" "0: Default instruction code set for each..,1: Instruction code written in the SFMSIC register" bitfld.long 0x00 11. "SFMOSW,Setup time adjustment for serial transmission" "0: Does not extend the low-level width of SCK at..,1: Extends the low-level width of SCK by 1*PCLKA.." newline bitfld.long 0x00 10. "SFMOHW,Hold time adjustment for serial transmission" "0: Does not extend the high-level width of SCK..,1: Extends the high-level width of SCK by.." bitfld.long 0x00 9. "SFMOEX,Extension of the I/O buffer output enable signal for the serial interface" "0: Does not extend the output enable signal,1: Extends the output enable signal by 1*QSPCLK" newline bitfld.long 0x00 8. "SFMMD3,SPI mode selection" "0: SPI mode 0,1: SPI mode 3" bitfld.long 0x00 7. "SFMPAE,Selection of the function for stopping prefetch at locations other than on byte boundaries" "0: Disables prefetch stopping at locations other..,1: Enables prefetch stopping at locations other.." newline bitfld.long 0x00 6. "SFMPFE,Selection of the prefetch function" "0: Disables prefetch,1: Enables prefetch" bitfld.long 0x00 4.--5. "SFMSE,Selection of the prefetch function" "0: Does not extend QSSL,1: Extends QSSL by 33*QSPCLK,2: Extends QSSL by 129*QSPCLK,3: Extends QSSL infinitely" newline bitfld.long 0x00 0.--2. "SFMRM,Serial interface read mode selection" "0: Standard,1: Fast,2: Fast Read Dual Output,3: Fast Read Dual I/O,4: Fast Read Quad Output,5: Fast Read Quad I/O,6: Setting prohibited,7: Setting prohibited" group.long 0x04++0x03 line.long 0x00 "SFMSSC,Chip Selection Control Register" bitfld.long 0x00 5. "SFMSLD,QSSL signal output timing selection" "0: Outputs QSSL 0.5*SCK before the first rising..,1: Outputs QSSL 1.5*SCK before the first rising.." bitfld.long 0x00 4. "SFMSHD,QSSL signal release timing selection" "0: Releases QSSL 0.5*SCK after the last rising..,1: Releases QSSL 1.5*SCK after the last rising.." newline bitfld.long 0x00 0.--3. "SFMSW,Selection of a minimum high-level width of the QSSL signal" "0: 1 x QSPCLK,1: 2 x QSPCLK,2: 3 x QSPCLK,3: 4 x QSPCLK,4: 5 x QSPCLK,5: 6 x QSPCLK,6: 7 x QSPCLK,7: 8 x QSPCLK,8: 9 x QSPCLK,9: 10 x QSPCLK,10: 11 x QSPCLK,11: 12 x QSPCLK,12: 13 x QSPCLK,13: 14 x QSPCLK,14: 15 x QSPCLK,15: 16 x QSPCLK" group.long 0x08++0x03 line.long 0x00 "SFMSKC,Clock Control Register" bitfld.long 0x00 5. "SFMDTY,Selection of a duty ratio correction function for the SCK signal" "0: Serial interface reference cycle selection (*..,1: Delays the rising of the SCK signal by.." bitfld.long 0x00 0.--4. "SFMDV,Serial interface reference cycle selection (* Pay attention to the irregularity.)NOTE: When PCLKA multiplied by an odd number is selected the high-level width of the SCK signal is longer than the low-level width by 1 x PCLKA before duty ratio.." "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,16: 18 x PCLKA,17: 20 x PCLKA,18: 22 x PCLKA,19: 24 x PCLKA,20: 26 x PCLKA,21: 28 x PCLKA,22: 30 x PCLKA,23: 32 x PCLKA,24: 34 x PCLKA,25: 36 x PCLKA,26: 38 x PCLKA,27: 40 x PCLKA,28: 42 x PCLKA,29: 44 x PCLKA,30: 46 x PCLKA,31: 48 x PCLKA" rgroup.long 0x0C++0x03 line.long 0x00 "SFMSST,Status Register" bitfld.long 0x00 7. "PFOFF,Prefetch function operation state" "0: The prefetch function is operating,1: The prefetch function is not enabled or is.." bitfld.long 0x00 6. "PFFUL,Prefetch buffer state" "0: The prefetch buffer has a free space,1: The prefetch buffer is full" newline bitfld.long 0x00 0.--4. "PFCNT,Number of bytes of prefetched dataRange" "0: Nodata has been prefetched,?..." group.long 0x10++0x03 line.long 0x00 "SFMCOM,Communication Port Register" hexmask.long.byte 0x00 0.--7. 1. "SFMD,Port for direct communication with the SPI bus.Input/output to and from this port is converted to an SPI bus cycle" group.long 0x14++0x03 line.long 0x00 "SFMCMD,Communication Mode Control Register" bitfld.long 0x00 0. "DCOM,Selection of a mode of communication with the SPI bus" "0: ROM access mode,1: Direct communication mode" group.long 0x18++0x03 line.long 0x00 "SFMCST,Communication Status Register" rbitfld.long 0x00 7. "EROMR,Status of ROM access detection in the direct communication modeNOTE: Writing of 0 only is possible" "0: ROM access is not detected in direct..,1: ROM access is detected in direct.." rbitfld.long 0x00 0. "COMBSY,SPI bus cycle completion state in direct communication" "0: There is no serial transfer being processed,1: There is a serial transfer being processed" group.long 0x20++0x03 line.long 0x00 "SFMSIC,Instruction Code Register" hexmask.long.byte 0x00 0.--7. 1. "SFMCIC,Serial ROM instruction code to substitute" group.long 0x24++0x03 line.long 0x00 "SFMSAC,Address Mode Control Register" bitfld.long 0x00 4. "SFM4BC,Selection of a default instruction code when Serial Interface address width is selected 4 bytes" "0: Does not use 4 Byte address read Instruction..,1: Use 4 Byte address read Instruction code" bitfld.long 0x00 0.--1. "SFMAS,Selection the number of address bits of the serial interface" "0: 1byte,1: 2bytes,2: 3bytes,3: 4 bytes" group.long 0x28++0x03 line.long 0x00 "SFMSDC,Dummy Cycle Control Register" hexmask.long.byte 0x00 8.--15. 1. "SFMXD,Mode data for serial ROM" bitfld.long 0x00 7. "SFMXEN,XIP mode permission" "0: XIP mode is prohibited,1: XIP mode is permitted" newline rbitfld.long 0x00 6. "SFMXST,XIP mode status" "0: Normal (non-XIP) mode is operating,1: XIP mode is operating" bitfld.long 0x00 0.--3. "SFMDN,Selection of the number of dummy cycles of Fast Read instructions" "0: Default dummy cycles of each instruction,?..." group.long 0x30++0x03 line.long 0x00 "SFMSPC,SPI Protocol Control Register" bitfld.long 0x00 4. "SFMSDE,Selection of the minimum time of input output switch when Dual SPI protocol or Quad SPI protocol is selected" "0: Does not allocate minimum switch time,1: Allocate the minimum switch time equivalent.." bitfld.long 0x00 0.--1. "SFMSPI,Selection of SPI protocolNOTE: Serial ROM's SPI protocol is required to be set by software separately" "0: Extended SPI protocol,1: Dual SPI protocol,2: Quad SPI protocol,3: Setting prohibited" group.long 0x34++0x03 line.long 0x00 "SFMPMD,Port Control Register" bitfld.long 0x00 2. "SFMWPL,Specify level of WP pin" "0: Low level,1: High level" group.long 0x804++0x03 line.long 0x00 "SFMCNT1,External QSPI Address Register 1" bitfld.long 0x00 26.--31. "QSPI_EXT,BANK Switching AddressWhen accessing from 0x6000_0000 to 0x63FF_FFFF Addres bus is Set QSPI_EXT[5:0] to high-order 6bits of SHADDR[31:0]NOTE: Setting 6'h3F is prihibited" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end tree "RTC (Real-time Counter)" base ad:0x40044000 rgroup.byte 0x00++0x00 line.byte 0x00 "R64CNT,64-Hz Counter" bitfld.byte 0x00 6. "F1HZ,1Hz" "0,1" bitfld.byte 0x00 5. "F2HZ,2Hz" "0,1" newline bitfld.byte 0x00 4. "F4HZ,4Hz" "0,1" bitfld.byte 0x00 3. "F8HZ,8Hz" "0,1" newline bitfld.byte 0x00 2. "F16HZ,16Hz" "0,1" bitfld.byte 0x00 1. "F32HZ,32Hz" "0,1" newline bitfld.byte 0x00 0. "F64HZ,64Hz" "0,1" group.byte 0x02++0x00 line.byte 0x00 "RSECCNT,Second Counter" bitfld.byte 0x00 4.--6. "SEC10,10-Second Count Counts from 0 to 5 for 60-second counting" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 0.--3. "SEC1,1-Second Count Counts from 0 to 9 every second" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x02++0x00 line.byte 0x00 "BCNT0,Binary Counter 0" hexmask.byte 0x00 0.--7. 1. "BCNT0,The BCNT0 counter is a readable/writable 32-bit binary counter b7 to b0" group.byte 0x04++0x00 line.byte 0x00 "RMINCNT,Minute Counter" bitfld.byte 0x00 4.--6. "MIN10,10-Minute Count Counts from 0 to 5 for 60-minute counting" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 0.--3. "MIN1,1-Minute Count Counts from 0 to 9 every minute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x04++0x00 line.byte 0x00 "BCNT1,Binary Counter 1" hexmask.byte 0x00 0.--7. 1. "BCNT1,The BCNT1 counter is a readable/writable 32-bit binary counter b15 to b8" group.byte 0x06++0x00 line.byte 0x00 "RHRCNT,Hour Counter" bitfld.byte 0x00 6. "PM,Time Counter Setting for a.m./p.m" "0: a.m,1: p.m" bitfld.byte 0x00 4.--5. "HR10,10-Hour Count Counts from 0 to 2 once per carry from the ones place" "0,1,2,3" newline bitfld.byte 0x00 0.--3. "HR1,1-Hour Count Counts from 0 to 9 once per hour" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x06++0x00 line.byte 0x00 "BCNT2,Binary Counter 2" hexmask.byte 0x00 0.--7. 1. "BCNT2,The BCNT2 counter is a readable/writable 32-bit binary counter b23 to b16" group.byte 0x08++0x00 line.byte 0x00 "RWKCNT,Day-of-Week Counter" bitfld.byte 0x00 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,2: Tuesday,3: Wednesday,4: Thursday,5: Friday,6: Saturday,7: Setting Prohibited" group.byte 0x08++0x00 line.byte 0x00 "BCNT3,Binary Counter 3" hexmask.byte 0x00 0.--7. 1. "BCNT3,The BCNT3 counter is a readable/writable 32-bit binary counter b31 to b24" group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. "DATE10,10-Day Count Counts from 0 to 3 once per carry from the ones place" "0,1,2,3" bitfld.byte 0x00 0.--3. "DATE1,1-Day Count Counts from 0 to 9 once per day" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x0C++0x00 line.byte 0x00 "RMONCNT,Month Counter" bitfld.byte 0x00 4. "MON10,10-Month Count Counts from 0 to 1 once per carry from the ones place" "0,1" bitfld.byte 0x00 0.--3. "MON1,1-Month Count Counts from 0 to 9 once per month" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word 0x0E++0x01 line.word 0x00 "RYRCNT,Year Counter" bitfld.word 0x00 4.--7. "YR10,10-Year Count Counts from 0 to 9 once per carry from ones place" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "YR1,1-Year Count Counts from 0 to 9 once per year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x10++0x00 line.byte 0x00 "RSECAR,Second Alarm Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." bitfld.byte 0x00 4.--6. "SEC10,10-Seconds Value for the tens place of seconds" "0,1,2,3,4,5,6,7" newline bitfld.byte 0x00 0.--3. "SEC1,1-Second Value for the ones place of seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x10++0x00 line.byte 0x00 "BCNT0AR,Binary Counter 0 Alarm Register" hexmask.byte 0x00 0.--7. 1. "BCNT0AR,he BCNT0AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b7 to b0" group.byte 0x12++0x00 line.byte 0x00 "RMINAR,Minute Alarm Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." bitfld.byte 0x00 4.--6. "MIN10,10-Minute Count Value for the tens place of minutes" "0,1,2,3,4,5,6,7" newline bitfld.byte 0x00 0.--3. "MIN1,1-Minute Count Value for the ones place of minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x12++0x00 line.byte 0x00 "BCNT1AR,Binary Counter 1 Alarm Register" hexmask.byte 0x00 0.--7. 1. "BCNT1AR,he BCNT1AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b15 to b8" group.byte 0x14++0x00 line.byte 0x00 "RHRAR,Hour Alarm Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." bitfld.byte 0x00 6. "PM,Time Counter Setting for a.m./p.m" "0: a.m,1: p.m" newline bitfld.byte 0x00 4.--5. "HR10,10-Hour Count Value for the tens place of hours" "0,1,2,3" bitfld.byte 0x00 0.--3. "HR1,1-Hour Count Value for the ones place of hours" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x14++0x00 line.byte 0x00 "BCNT2AR,Binary Counter 2 Alarm Register" hexmask.byte 0x00 0.--7. 1. "BCNT2AR,The BCNT2AR counter is a readable/writable 32-bit binary counter b23 to b16" group.byte 0x16++0x00 line.byte 0x00 "RWKAR,Day-of-Week Alarm Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." bitfld.byte 0x00 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,2: Tuesday,3: Wednesday,4: Thursday,5: Friday,6: Saturday,7: Setting Prohibited" group.byte 0x16++0x00 line.byte 0x00 "BCNT3AR,Binary Counter 3 Alarm Register" hexmask.byte 0x00 0.--7. 1. "BCNT3AR,The BCNT3AR counter is a readable/writable 32-bit binary counter b31 to b24" group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." bitfld.byte 0x00 4.--5. "DATE10,10 Days Value for the tens place of days" "0,1,2,3" newline bitfld.byte 0x00 0.--3. "DATE1,1 Day Value for the ones place of days" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x18++0x00 line.byte 0x00 "BCNT0AER,Binary Counter 0 Alarm Enable Register" hexmask.byte 0x00 0.--7. 1. "ENB,The BCNT0AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b7 to b0" group.byte 0x1A++0x00 line.byte 0x00 "RMONAR,Month Alarm Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." bitfld.byte 0x00 4. "MON10,10 Months Value for the tens place of months" "0,1" newline bitfld.byte 0x00 0.--3. "MON1,1 Month Value for the ones place of months" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x1A++0x00 line.byte 0x00 "BCNT1AER,Binary Counter 1 Alarm Enable Register" hexmask.byte 0x00 0.--7. 1. "ENB,The BCNT1AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b15 to b8" group.word 0x1C++0x01 line.word 0x00 "RYRAR,Year Alarm Register" bitfld.word 0x00 4.--7. "YR10,10 Years Value for the tens place of years" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--3. "YR1,1 Year Value for the ones place of years" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word 0x1C++0x01 line.word 0x00 "BCNT2AER,Binary Counter 2 Alarm Enable Register" hexmask.word.byte 0x00 0.--7. 1. "ENB,The BCNT2AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b23 to b16" group.byte 0x1E++0x00 line.byte 0x00 "RYRAREN,Year Alarm Enable Register" bitfld.byte 0x00 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the.." group.byte 0x1E++0x00 line.byte 0x00 "BCNT3AER,Binary Counter 3 Alarm Enable Register" hexmask.byte 0x00 0.--7. 1. "ENB,The BCNT3AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b31 to b24" group.byte 0x22++0x00 line.byte 0x00 "RCR1,RTC Control Register 1" bitfld.byte 0x00 4.--7. "PES,Periodic Interrupt Select" "?,?,?,?,?,?,6: A periodic interrupt is generated every 1/256..,7: A periodic interrupt is generated every 1/128..,8: A periodic interrupt is generated every 1/64..,9: A periodic interrupt is generated every 1/32..,10: A periodic interrupt is generated every 1/16..,11: A periodic interrupt is generated every 1/8..,12: A periodic interrupt is generated every 1/4..,13: A periodic interrupt is generated every 1/2..,14: A periodic interrupt is generated every 1..,15: A periodic interrupt is generated every 2.." bitfld.byte 0x00 3. "RTCOS,RTCOUT Output Select" "0: RTCOUT outputs 1 Hz,1: RTCOUT outputs 64 Hz" newline bitfld.byte 0x00 2. "PIE,Periodic Interrupt Enable" "0: A periodic interrupt request is disabled,1: A periodic interrupt request is enabled" bitfld.byte 0x00 1. "CIE,Carry Interrupt Enable" "0: A carry interrupt request is disabled,1: A carry interrupt request is enabled" newline bitfld.byte 0x00 0. "AIE,Alarm Interrupt Enable" "0: An alarm interrupt request is disabled,1: An alarm interrupt request is enabled" group.byte 0x24++0x00 line.byte 0x00 "RCR2,RTC Control Register 2" bitfld.byte 0x00 7. "CNTMD,Count Mode Select" "0: The calendar count mode,1: The binary count mode" bitfld.byte 0x00 6. "HR24,Hours Mode" "0: The RTC operates in 12-hour mode,1: The RTC operates in 24-hour mode" newline bitfld.byte 0x00 5. "AADJP,Automatic Adjustment Period Select (When the LOCO clock is selected the setting of this bit is disabled.)" "0: The RADJ.ADJ[5:0] setting value is adjusted..,1: The RADJ.ADJ[5:0] setting value is adjusted.." bitfld.byte 0x00 4. "AADJE,Automatic Adjustment Enable (When the LOCO clock is selected the setting of this bit is disabled.)" "0: Automatic adjustment is disabled,1: Automatic adjustment is enabled" newline bitfld.byte 0x00 3. "RTCOE,RTCOUT Output Enable" "0: RTCOUT output disabled,1: RTCOUT output enabled" bitfld.byte 0x00 2. "ADJ30,30-Second Adjustment" "0: Writing is invalid.(write) / In normal time..,1: 30-second adjustment is executed.(write) /.." newline bitfld.byte 0x00 1. "RESET,RTC Software Reset" "0: Writing is invalid.(write) / In normal time..,1: The prescaler and the target registers for.." bitfld.byte 0x00 0. "START,Start" "0: Prescaler and time counter are stopped,1: Prescaler and time counter operate normally" group.byte 0x28++0x00 line.byte 0x00 "RCR4,RTC Control Register 4" bitfld.byte 0x00 0. "RCKSEL,Count Source Select" "0: Sub-clock oscillator is selected,1: LOCO clock oscillator is selected" group.word 0x2A++0x01 line.word 0x00 "RFRH,Frequency Register H" bitfld.word 0x00 0. "RFC16,Frequency Comparison Value (b16) To generate the operating clock from the LOCOclock this bit sets the comparison value of the 128-Hz clock cycle" "0,1" group.word 0x2C++0x01 line.word 0x00 "RFRL,Frequency Register L" hexmask.word 0x00 0.--15. 1. "RFC,Frequency Comparison Value(b15-b0) To generate the operating clock from the main clock this bit sets the comparison value of the 128-Hz clock cycle" group.byte 0x2E++0x00 line.byte 0x00 "RADJ,Time Error Adjustment Register" bitfld.byte 0x00 6.--7. "PMADJ,Plus-Minus" "0: Adjustment is not performed,1: Adjustment is performed by the addition to..,2: Adjustment is performed by the subtraction..,3: Setting prohibited" bitfld.byte 0x00 0.--5. "ADJ,Adjustment Value These bits specify the adjustment value from the prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" repeat 3. (strings "0" "1" "2" )(list 0x0 0x2 0x4 ) group.byte ($2+0x40)++0x00 line.byte 0x00 "RTCCR$1,Time Capture Control Register" bitfld.byte 0x00 4.--5. "TCNF,Time Capture Noise Filter Control" "0: The noise filter is off,1: Setting prohibited,2: The noise filter is on (count source),3: The noise filter is on (count source by.." rbitfld.byte 0x00 2. "TCST,Time Capture Status" "0: No event is detected,1: An event is detected" newline bitfld.byte 0x00 0.--1. "TCCT,Time Capture Control" "0: No event is detected,1: Rising edge is detected,2: Falling edge is detected,3: Both edges are detected" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x52)++0x00 line.byte 0x00 "RSECCP$1,Second Capture Register" bitfld.byte 0x00 4.--6. "SEC10,10-Second Capture Capture value for the tens place of seconds" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 0.--3. "SEC1,1-Second Capture Capture value for the ones place of seconds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x52)++0x00 line.byte 0x00 "BCNT0CP$1,BCNT0 Capture Register" hexmask.byte 0x00 0.--7. 1. "BCNT0CP,BCNT0CP is a read-only register that captures the BCNT0 value when a time capture event is detected" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x54)++0x00 line.byte 0x00 "RMINCP$1,Minute Capture Register" bitfld.byte 0x00 4.--6. "MIN10,10-Minute Capture Capture value for the tens place of minutes" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 0.--3. "MIN1,1-Minute Capture Capture value for the ones place of minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x54)++0x00 line.byte 0x00 "BCNT1CP$1,BCNT1 Capture Register" hexmask.byte 0x00 0.--7. 1. "BCNT1CP,BCNT1CP is a read-only register that captures the BCNT1 value when a time capture event is detected" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x56)++0x00 line.byte 0x00 "RHRCP$1,Hour Capture Register" bitfld.byte 0x00 6. "PM,A.m./p.m" "0: a.m,1: p.m" bitfld.byte 0x00 4.--5. "HR10,10-Minute Capture Capture value for the tens place of minutes" "0,1,2,3" newline bitfld.byte 0x00 0.--3. "HR1,1-Minute Capture Capture value for the ones place of minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x56)++0x00 line.byte 0x00 "BCNT2CP$1,BCNT2 Capture Register" hexmask.byte 0x00 0.--7. 1. "BCNT2CP,BCNT2CP is a read-only register that captures the BCNT2 value when a time capture event is detected" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x5A)++0x00 line.byte 0x00 "RDAYCP$1,Date Capture Register" bitfld.byte 0x00 4.--5. "DATE10,10-Day Capture Capture value for the tens place of minutes" "0,1,2,3" bitfld.byte 0x00 0.--3. "DATE1,1-Day Capture Capture value for the ones place of minutes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x5A)++0x00 line.byte 0x00 "BCNT3CP$1,BCNT3 Capture Register" hexmask.byte 0x00 0.--7. 1. "BCNT3CP,BCNT3CP is a read-only register that captures the BCNT3 value when a time capture event is detected" repeat.end repeat 3. (strings "0" "1" "2" )(list 0x0 0x10 0x20 ) rgroup.byte ($2+0x5C)++0x00 line.byte 0x00 "RMONCP$1,Month Capture Register" bitfld.byte 0x00 4. "MON10,10-Month Capture Capture value for the tens place of months" "0,1" bitfld.byte 0x00 0.--3. "MON1,1-Month Capture Capture value for the ones place of months" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat.end tree.end tree "SCI (Serial Communication Interface)" repeat 10. (list 0. 1. 2. 3. 4. 5. 6. 7. 8. 9.) (list ad:0x40070000 ad:0x40070020 ad:0x40070040 ad:0x40070060 ad:0x40070080 ad:0x400700A0 ad:0x400700C0 ad:0x400700E0 ad:0x40070100 ad:0x40070120) tree "SCI$1" base $2 group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register (SCMR.SMIF = 0)" bitfld.byte 0x00 7. "CM,Communications Mode" "0: Asynchronous mode or simple I2C mode,1: Clock synchronous mode" bitfld.byte 0x00 6. "CHR,Character Length(Valid only in asynchronous mode)" "0: Transmit/receive in 9-bit data..,1: Transmit/receive in 9-bit data.." newline bitfld.byte 0x00 5. "PE,Parity Enable(Valid only in asynchronous mode)" "0: Parity bit addition is not performed..,1: The parity bit is added (transmitting) / The.." bitfld.byte 0x00 4. "PM,Parity Mode (Valid only when the PE bit is 1)" "0: Selects even parity,1: Selects odd parity" newline bitfld.byte 0x00 3. "STOP,Stop Bit Length(Valid only in asynchronous mode)" "0: 1 stop bit,1: 2 stop bits" bitfld.byte 0x00 2. "MP,Multi-Processor Mode(Valid only in asynchronous mode)" "0: Multi-processor communications function is..,1: Multi-processor communications function is.." newline bitfld.byte 0x00 0.--1. "CKS,Clock Select" "0: PCLK clock,1: PCLK/4 clock,2: PCLK/16 clock,3: PCLK/64 clock" group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial mode register (SCMR.SMIF = 1)" bitfld.byte 0x00 7. "GM,GSM Mode" "0: Normal mode operation,1: GSM mode operation" bitfld.byte 0x00 6. "BLK,Block Transfer Mode" "0: Normal mode operation,1: Block transfer mode operation" newline bitfld.byte 0x00 5. "PE,Parity Enable(Valid only in asynchronous mode)" "0: Setting Prohibited,1: Set this bit to 1 in smart card interface mode" bitfld.byte 0x00 4. "PM,Parity Mode (Valid only when the PE bit is 1)" "0: Selects even parity,1: Selects odd parity" newline bitfld.byte 0x00 2.--3. "BCP,Stop Bit Length(Valid only in asynchronous mode)" "0: 93 clock cycles(S=93) (SCMR.BCP2=0) / 32..,1: 128 clock cycles(S=128) (SCMR.BCP2=0) / 64..,2: 186 clock cycles(S=186) (SCMR.BCP2=0) / 372..,3: 512 clock cycles(S=512) (SCMR.BCP2=0) / 256.." bitfld.byte 0x00 0.--1. "CKS,Clock Select" "0: PCLK clock,1: PCLK/4 clock,2: PCLK/16 clock,3: PCLK/64 clock" group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" hexmask.byte 0x00 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate" group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register (SCMR.SMIF = 0)" bitfld.byte 0x00 7. "TIE,Transmit Interrupt Enable" "0: TXI interrupt request is disabled,1: TXI interrupt request is enabled" bitfld.byte 0x00 6. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" newline bitfld.byte 0x00 5. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.byte 0x00 4. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" newline bitfld.byte 0x00 3. "MPIE,Multi-Processor Interrupt Enable(Valid in asynchronous mode when SMR.MP = 1)" "0: Normal reception,1: When the data with the multi-processor bit.." bitfld.byte 0x00 2. "TEIE,Transmit End Interrupt Enable" "0: TEI interrupt request is disabled,1: TEI interrupt request is enabled" newline bitfld.byte 0x00 0.--1. "CKE,Clock Enable" "0: The SCKn pin is available for use as an I/O..,1: The clock with the same frequency as the bit..,?..." group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register (SCMR.SMIF =1)" bitfld.byte 0x00 7. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x00 6. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" newline bitfld.byte 0x00 5. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.byte 0x00 4. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" newline bitfld.byte 0x00 3. "MPIE,Multi-Processor Interrupt EnableSet this bit to 0 in smart card interface mode" "0,1" bitfld.byte 0x00 2. "TEIE,Transmit End Interrupt EnableSet this bit to 0 in smart card interface mode" "0,1" newline bitfld.byte 0x00 0.--1. "CKE,Clock Enable" "0: Output disabled(SMR_SMCI.GM=0) / Output fixed..,1: Clock Output,2: Setting prohibited(SMR_SMCI.GM=0) / Output..,3: Setting prohibited(SMR_SMCI.GM=0) / Clock.." group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" hexmask.byte 0x00 0.--7. 1. "TDR,TDR is an 8-bit register that stores transmit data" group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register(SCMR.SMIF = 0 and FCR.FM=0)" bitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.byte 0x00 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" newline bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" bitfld.byte 0x00 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" rbitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed" newline rbitfld.byte 0x00 1. "MPB,Multi-Processor Bit" "0: Data transmission cycles,1: ID transmission cycles" bitfld.byte 0x00 0. "MPBT,Multi-Processor Bit Transfer" "0: Data transmission cycles,1: ID transmission cycles" group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register(SCMR.SMIF = 0 and FCR.FM=1)" bitfld.byte 0x00 7. "TDFE,Transmit FIFO data empty flag" "0: The quantity of transmit data written in FTDR..,1: The quantity of transmit data written in FTDR.." bitfld.byte 0x00 6. "RDF,Receive FIFO data full flag" "0: The quantity of receive data written in FRDR..,1: The quantity of receive data written in FRDR.." newline bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" bitfld.byte 0x00 4. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed" newline bitfld.byte 0x00 0. "DR,Receive Data Ready flag(Valid only in asynchronous mode(including multi-processor) and FIFO selected)" "0: Receiving is in progress or no received data..,1: Next receive data has not been received for a.." group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register(SCMR.SMIF = 1)" bitfld.byte 0x00 7. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.byte 0x00 6. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" newline bitfld.byte 0x00 5. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" bitfld.byte 0x00 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" newline bitfld.byte 0x00 3. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" rbitfld.byte 0x00 2. "TEND,Transmit End Flag" "0: A character is being transmitted,1: Character transfer has been completed" newline rbitfld.byte 0x00 1. "MPB,This bit should be 0 in smart card interface mode" "0,1" bitfld.byte 0x00 0. "MPBT,This bit should be 0 in smart card interface mode" "0,1" rgroup.byte 0x05++0x00 line.byte 0x00 "RDR,Receive Data Register" hexmask.byte 0x00 0.--7. 1. "RDR,RDR is an 8-bit register that stores receive data" group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. "BCP2,Base Clock Pulse 2Selects the number of base clock cycles in combination with the SMR.BCP[1:0] bits" "0: S=93(SMR.BCP[1:0]=00) 128(SMR.BCP[1:0]=01)..,1: S=32(SMR.BCP[1:0]=00) 64(SMR.BCP[1:0]=01).." bitfld.byte 0x00 4. "CHR1,Character Length 1(Only valid in asynchronous mode)" "0: Transmit/receive in 9-bit data length,1: Transmit/receive in 8-bit data.." newline bitfld.byte 0x00 3. "SDIR,Transmitted/Received Data Transfer DirectionNOTE: The setting is invalid and a fixed data length of 8 bits is used in modes other than asynchronous mode.Set this bit to 1 if operation is to be in simple I2C mode" "0: Transfer with LSB first,1: Transfer with MSB first" bitfld.byte 0x00 2. "SINV,Transmitted/Received Data InvertSet this bit to 0 if operation is to be in simple I2C mode" "0: TDR contents are transmitted as they are,1: TDR contents are inverted before being.." newline bitfld.byte 0x00 0. "SMIF,Smart Card Interface Mode Select" "0: Non-smart card interface mode(Asynchronous..,1: Smart card interface mode" group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select(Valid only in asynchronous mode)" "0: The low level on the RXDn pin is detected as..,1: A falling edge on the RXDn pin is detected as.." bitfld.byte 0x00 6. "BGDM,Baud Rate Generator Double-Speed Mode Select(Only valid the CKE[1] bit in SCR is 0 in asynchronous mode)" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x00 5. "NFEN,Digital Noise Filter Function Enable(The NFEN bit should be 0 without simple I2C mode and asynchronous mode.)In asynchronous mode for RXDn input only" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." bitfld.byte 0x00 4. "ABCS,Asynchronous Mode Base Clock Select(Valid only in asynchronous mode)" "0: Selects 16 base clock cycles for 1-bit period,1: Selects 8 base clock cycles for 1-bit period" newline bitfld.byte 0x00 3. "ABCSE,Asynchronous Mode Extended Base Clock Select1(Valid only in asynchronous mode and SCR.CKE[1]=0)" "0: Clock cycles for 1-bit period is decided with..,1: Baud rate is 6 base clock cycles for 1-bit.." bitfld.byte 0x00 2. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled,1: Bit rate modulation function is enabled" group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. "NFCS,Noise Filter Clock Select" "0: The clock signal divided by 1 is used with..,1: The clock signal divided by 1 is used with..,2: The clock signal divided by 2 is used with..,3: The clock signal divided by 4 is used with..,4: The clock signal divided by 8 is used with..,?..." group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. "IICDL,SSDA Delay Output SelectCycles below are of the clock signal from the on-chip baud rate generator" "0: No output delay,?..." bitfld.byte 0x00 0. "IICM,Simple I2C Mode Select" "0: Asynchronous mode Multi-processor mode Clock..,1: Simple I2C mode(SCMR.SMIF=0) / Setting.." group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.byte 0x00 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x00 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts,1: Use reception and transmission interrupts" group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition,2: Output the low level on the SSCLn pin,3: Place the SSCLn pin in the high-impedance state" bitfld.byte 0x00 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition,2: Output the low level on the SSDAn pin,3: Place the SSDAn pin in the high-impedance state" newline bitfld.byte 0x00 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag(When 0 is written to IICSTIF it is cleared to 0.)" "0: There are no requests for generating..,1: A start restart or stop condition is.." bitfld.byte 0x00 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated,1: A stop condition is generated" newline bitfld.byte 0x00 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated,1: A restart condition is generated" bitfld.byte 0x00 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated,1: A start condition is generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. "CKPH,Clock Phase Select" "0: Clock is not delayed,1: Clock is delayed" bitfld.byte 0x00 6. "CKPOL,Clock Polarity Select" "0: Clock polarity is not inverted,1: Clock polarity is inverted" newline bitfld.byte 0x00 4. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" bitfld.byte 0x00 2. "MSS,Master or slave mode selection" "0: Transmission is through the TXDn pin and..,1: Reception is through the TXDn pin and.." newline bitfld.byte 0x00 1. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function..,1: CTS function is enabled" bitfld.byte 0x00 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled,1: SSn# pin function is enabled" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-bit Data Register" hexmask.word 0x00 0.--15. 1. "TDRHL,TDRHL is a 16-bit register that stores transmit data" wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. "MPBT,Multi-processor transfer bit flag(Valid only in asynchronous mode and SMR.MP=1 and FIFO selected)" "0: Data transmission cycles,1: ID transmission cycles" hexmask.word 0x00 0.--8. 1. "TDAT,Serial transmit data (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" wgroup.byte 0x0E++0x00 line.byte 0x00 "FTDRH,Transmit FIFO Data Register H" bitfld.byte 0x00 1. "MPBT,Multi-processor transfer bit flag(Valid only in asynchronous mode and SMR.MP=1 and FIFO selected)" "0: Data transmission cycles,1: ID transmission cycles" bitfld.byte 0x00 0. "TDATH,Serial transmit data (b8) (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" "0,1" wgroup.byte 0x0F++0x00 line.byte 0x00 "FTDRL,Transmit FIFO Data Register L" hexmask.byte 0x00 0.--7. 1. "TDATL,Serial transmit data(b7-b0) (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" rgroup.word 0x10++0x01 line.word 0x00 "RDRHL,Receive 9-bit Data Register" hexmask.word 0x00 0.--15. 1. "RDRHL,RDRHL is an 16-bit register that stores receive data" rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. "RDF,Receive FIFO data full flag(It is same as SSR.RDF)" "0: The quantity of receive data written in FRDRH..,1: The quantity of receive data written in FRDRH.." bitfld.word 0x00 13. "ORER,Overrun error flag(It is same as SSR.ORER)" "0: No overrun error occurred,1: An overrun error has occurred" newline bitfld.word 0x00 12. "FER,Framing error flag" "0: No framing error occurred at the first data..,1: A framing error has occurred at the first.." bitfld.word 0x00 11. "PER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data.." newline bitfld.word 0x00 10. "DR,Receive data ready flag(It is same as SSR.DR)" "0: Receiving is in progress or no received data..,1: Next receive data has not been received for a.." bitfld.word 0x00 9. "MPB,Multi-processor bit flag(Valid only in asynchronous mode with SMR.MP=1 and FIFO selected) It can read multi-processor bit corresponded to serial receive data(RDATA[8:0])" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x00 0.--8. 1. "RDAT,Serial receive data(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" rgroup.byte 0x10++0x00 line.byte 0x00 "FRDRH,Receive FIFO Data Register H" bitfld.byte 0x00 6. "RDF,Receive FIFO data full flag(It is same as SSR.RDF)" "0: The quantity of receive data written in FRDRH..,1: The quantity of receive data written in FRDRH.." bitfld.byte 0x00 5. "ORER,Overrun error flag(It is same as SSR.ORER)" "0: No overrun error occurred,1: An overrun error has occurred" newline bitfld.byte 0x00 4. "FER,Framing error flag" "0: No framing error occurred at the first data..,1: A framing error has occurred at the first.." bitfld.byte 0x00 3. "PER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data.." newline bitfld.byte 0x00 2. "DR,Receive data ready flag(It is same as SSR.DR)" "0: Receiving is in progress or no received data..,1: Next receive data has not been received for a.." bitfld.byte 0x00 1. "MPB,Multi-processor bit flag(Valid only in asynchronous mode with SMR.MP=1 and FIFO selected) It can read multi-processor bit corresponded to serial receive data(RDATA[8:0])" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x00 0. "RDATH,Serial receive data(b8)(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" "0,1" rgroup.byte 0x11++0x00 line.byte 0x00 "FRDRL,Receive FIFO Data Register L" hexmask.byte 0x00 0.--7. 1. "RDATL,Serial receive data(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)NOTE: When reading both of FRDRH register and FRDRL register please read by an order of the FRDRH register and the FRDRL.." group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" hexmask.byte 0x00 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR register" group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. "DCME,Data Compare Match Enable(Valid only in asynchronous mode(including multi-processor)" "0: Address match function is disabled,1: Address match function is enabled" bitfld.byte 0x00 6. "IDSEL,ID frame select Bit(Valid only in asynchronous mode(including multi-processor)" "0: It's always compared data in spite of the..,1: It's compared data when the MPB bit is 1 ( ID.." newline bitfld.byte 0x00 4. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" bitfld.byte 0x00 3. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" newline bitfld.byte 0x00 0. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. "RSTRG,RTS# Output Active Trigger Number Select(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode)" "0: Trigger number 0,?..." bitfld.word 0x00 8.--11. "RTRG,Receive FIFO data trigger number" "0: Trigger number 0,?..." newline bitfld.word 0x00 4.--7. "TTRG,Transmit FIFO data trigger number(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode)" "0: Trigger number 0,?..." bitfld.word 0x00 3. "DRES,Receive data ready error select bit(When detecting a reception data ready the interrupt request is selected.)" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" newline bitfld.word 0x00 2. "TFRST,Transmit FIFO Data Register Reset(Valid only in FCR.FM=1)" "0: The number of data stored in FTDRH and FTDRL..,1: The number of data stored in FTDRH and FTDRL.." bitfld.word 0x00 1. "RFRST,Receive FIFO Data Register Reset(Valid only in FCR.FM=1)" "0: The number of data stored in FRDRH and FRDRL..,1: The number of data stored in FRDRH and FRDRL.." newline bitfld.word 0x00 0. "FM,FIFO Mode Select(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode)" "0: Non-FIFO mode,1: FIFO mode" rgroup.word 0x16++0x01 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. "T,Transmit FIFO Data CountIndicate the quantity of non-transmit data stored in FTDRH and FTDRL(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode while FCR.FM=1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. "R,Receive FIFO Data CountIndicate the quantity of receive data stored in FRDRH and FRDRL(Valid only in asynchronous mode(including multi-processor) or clock synchronous mode while FCR.FM=1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. "PNUM,Parity Error CountIndicates the quantity of data with a parity error among the receive data stored in the receive FIFO data register (FRDRH and FRDRL)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. "FNUM,Framing Error CountIndicates the quantity of data with a framing error among the receive data stored in the receive FIFO data register (FRDRH and FRDRL)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x00 0. "ORER,Overrun Error Flag (Valid only in asynchronous mode(including multi-processor) or clock synchronous mode and FIFO selected)" "0: No overrun error occurred,1: An overrun error has occurred" group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. "CMPD,Compare Match DataCompare data pattern for address match wake-up function" group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. "SPB2IO,Serial port break I/O bit(It's selected whether the value of SPB2DT is output to TxD terminal.)" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD.." bitfld.byte 0x00 1. "SPB2DT,Serial port break data select bit(The output level of TxD terminal is selected when SCR.TE = 0.)" "0: Low level is output in TxD terminal,1: High level is output in TxD terminal" newline rbitfld.byte 0x00 0. "RXDMON,Serial input data monitor bit(The state of the RXD terminal is shown.)" "0: RXD terminal is the Low level,1: RXD terminal is the High level" tree.end repeat.end tree.end tree "SDHI (SD Host Interface)" repeat 2. (list 0. 1.) (list ad:0x40062000 ad:0x40062400) tree "SDHI$1" base $2 group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" bitfld.long 0x00 14.--15. "CMD12AT,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple..,1: CMD12 is not automatically issued at multiple..,2: Setting prohibited,3: Setting prohibited" bitfld.long 0x00 13. "TRSTP,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multiple block transfer" newline bitfld.long 0x00 12. "CMDRW,Write/Read Mode (enabled when the command with data is handled)" "0: Write (SD/MMC host interface -> SD card/MMC),1: Read (SD/MMC host interface <- SD card/MMC)" bitfld.long 0x00 11. "CMDTP,Data Mode (Command Type)" "0: Command does not include data transfer (bc..,1: Command includes data transfer (adtc)" newline bitfld.long 0x00 8.--10. "RSPTP,Mode/Response TypeNOTE: As some commands cannot be used in normal mode see section 1.4.10 Example of SD_CMD Register Setting to select mode/response type" "0: Normal mode The response type and the..,?,?,3: Expansion mode and no response,4: Expansion mode and R1 R5 R6 or R7 response,5: Expansion mode and R1b response,6: Expansion mode and R2 response,7: Expansion mode and R3 or R4 response" bitfld.long 0x00 6.--7. "ACMD,Command Type Select" "0: CMD,1: ACMD,?..." newline bitfld.long 0x00 0.--5. "CMDIDX,Command IndexThese bits specify Command Format[45:40] (command index).[Examples]CMD6: SD_CMD[7:0] = 8'b00_000110CMD18: SD_CMD[7:0] = 8'b00_010010ACMD13: SD_CMD[7:0] = 8'b01_001101" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x08++0x03 line.long 0x00 "SD_ARG,SD Command Argument Register" hexmask.long 0x00 0.--31. 1. "SD_ARG,Argument RegisterSet command format[39:8] (argument)" group.long 0x0C++0x03 line.long 0x00 "SD_ARG1,SD Command Argument Register 1" hexmask.long.word 0x00 0.--15. 1. "SD_ARG1,Argument Register 1Set command format[39:24] (argument)" group.long 0x10++0x03 line.long 0x00 "SD_STOP,Data Stop Register" bitfld.long 0x00 8. "SEC,Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1 CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to.." "0: Disables SD_SECCNT setting value,1: Enables SD_SECCNT setting value" bitfld.long 0x00 0. "STP,Stop- When STP is set to 1 during multiple block transfer CMD12 is issued to halt the transfer through the SD host interface.However if a command sequence is halted because of a communications error or timeout CMD12 is not issued" "0,1" group.long 0x14++0x03 line.long 0x00 "SD_SECCNT,Block Count Register" hexmask.long 0x00 0.--31. 1. "SD_SECCNT,Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1" rgroup.long 0x18++0x03 line.long 0x00 "SD_RSP10,SD Card Response Register 10" hexmask.long 0x00 0.--31. 1. "SD_RSP10,Store the response from the SD card/MMC" rgroup.long 0x1C++0x03 line.long 0x00 "SD_RSP1,SD Card Response Register 1" hexmask.long.word 0x00 0.--15. 1. "SD_RSP1,Store the response from the SD card/MMC" rgroup.long 0x20++0x03 line.long 0x00 "SD_RSP32,SD Card Response Register 32" hexmask.long 0x00 0.--31. 1. "SD_RSP32,Store the response from the SD card/MMC" rgroup.long 0x24++0x03 line.long 0x00 "SD_RSP3,SD Card Response Register 3" hexmask.long.word 0x00 0.--15. 1. "SD_RSP3,Store the response from the SD card/MMC" rgroup.long 0x28++0x03 line.long 0x00 "SD_RSP54,SD Card Response Register 54" hexmask.long 0x00 0.--31. 1. "SD_RSP54,Store the response from the SD card/MMC" rgroup.long 0x2C++0x03 line.long 0x00 "SD_RSP5,SD Card Response Register 5" hexmask.long.word 0x00 0.--15. 1. "SD_RSP5,Store the response from the SD card/MMC" rgroup.long 0x30++0x03 line.long 0x00 "SD_RSP76,SD Card Response Register 76" hexmask.long.tbyte 0x00 0.--23. 1. "SD_RSP76,Store the response from the SD card/MMC" rgroup.long 0x34++0x03 line.long 0x00 "SD_RSP7,SD Card Response Register 7" hexmask.long.byte 0x00 0.--7. 1. "SD_RSP7,Store the response from the SD card/MMC" group.long 0x38++0x03 line.long 0x00 "SD_INFO1,SD Card Interrupt Flag Register 1" rbitfld.long 0x00 10. "SDD3MON,Inticates the SDnDAT3 State" "0: SDnDAT3 is set to 0,1: SDnDAT3 is set to 1" bitfld.long 0x00 9. "SDD3IN,SDnDAT3 Card Insertion" "0: SD card insertion not detected,1: SD card insertion detected" newline bitfld.long 0x00 8. "SDD3RM,SDnDAT3 Card Removal" "0: SD card removal not detected,1: SD card removal detected" rbitfld.long 0x00 7. "SDWPMON,Indicates the SDnWP state" "0: SDnWP is set to 1,1: SDnWP is set to 0" newline rbitfld.long 0x00 5. "SDCDMON,Indicates the SDnCD state" "0: Indicates that Mcycle has elapsed with SDnCD..,1: Indicates that Mcycle has elapsed with SDnCD.." bitfld.long 0x00 4. "SDCDIN,SDnCD Card Insertion" "0: Card insertion not detected,1: Card insertion detected" newline bitfld.long 0x00 3. "SDCDRM,SDnCD Card Removal" "0: Card removal not detected,1: Card removal detected" bitfld.long 0x00 2. "ACEND,Access End" "0: Access end is not detected,1: Access end is detected" newline bitfld.long 0x00 0. "RSPEND,Response End Detection" "0: Response end is not detected,1: Response end is detected" group.long 0x3C++0x03 line.long 0x00 "SD_INFO2,SD Card Interrupt Flag Register 2" bitfld.long 0x00 15. "ILA,Illegal Access Error" "0: Illegal access error not detected,1: Illegal access error detected" rbitfld.long 0x00 14. "CBSY,Command Type Register Busy" "0: A command sequence is being executed,1: A command sequence has been completed" newline rbitfld.long 0x00 13. "SD_CLK_CTRLEN,When a command sequence is started by writing to SD_CMD the CBSY bit is set to 1 and at the same time the SCLKDIVEN bit is set to 0" "0: The SD/MMC bus (CMD DAT) is busy,1: The SD/MMC bus (CMD DAT) is not busy" bitfld.long 0x00 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0,1: Data can be written in SD_BUF0" newline bitfld.long 0x00 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0,1: Data can be read from SD_BUF0" rbitfld.long 0x00 7. "SDD0MON,SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL" "0: SDDAT0 is set to 0,1: SDDAT0 is set to 1" newline bitfld.long 0x00 6. "RSPTO,Response Timeout" "0: Response timeout not detected,1: Response timeout detected" bitfld.long 0x00 5. "ILR,SD_BUF Illegal Read Access" "0: Illegal read access to the SD_BUF register..,1: Illegal read access to the SD_BUF register.." newline bitfld.long 0x00 4. "ILW,SD_BUF Illegal Write Access" "0: Illegal write access to the SD_BUF register..,1: Illegal write access to the SD_BUF register.." bitfld.long 0x00 3. "DTO,Data Timeout" "0: Data timeout not detected,1: Data timeout detected" newline bitfld.long 0x00 2. "ENDE,END Error" "0: End bit error not detected,1: End bit error detected" bitfld.long 0x00 1. "CRCE,CRC Error" "0: CRC error not detected,1: CRC error detected" newline bitfld.long 0x00 0. "CMDE,Command Error" "0: Command error not detected,1: Command error detected" group.long 0x40++0x03 line.long 0x00 "SD_INFO1_MASK,SD_INFO1 Interrupt Mask Register" bitfld.long 0x00 9. "SDD3INM,SDnDAT3 Card Insertion Interrupt Request Mask" "0: SD card insertion interrupt request by the..,1: SD card insertion interrupt request by the.." bitfld.long 0x00 8. "SDD3RMM,SDnDAT3 Card Removal Interrupt Request Mask" "0: SD card removal interrupt request by the..,1: SD card removal interrupt request by the.." newline bitfld.long 0x00 4. "SDCDINM,SDnCD card Insertion Interrupt Request Mask" "0: Card insertion interrupt request by the SDnCD..,1: Card insertion interrupt request by the SDnCD.." bitfld.long 0x00 3. "SDCDRMM,SDnCD card Removal Interrupt Request Mask" "0: Card removal interrupt request by the by the..,1: Card removal interrupt request by the by the.." newline bitfld.long 0x00 2. "ACENDM,Access End Interrupt Request Mask" "0: Access end interrupt request is not masked,1: Access end interrupt request is masked" bitfld.long 0x00 0. "RSPENDM,Response End Interrupt Request Mask" "0: Response end interrupt request is not masked,1: Response end interrupt request is masked" group.long 0x44++0x03 line.long 0x00 "SD_INFO2_MASK,SD_INFO2 Interrupt Mask Register" bitfld.long 0x00 15. "ILAM,Illegal Access Error Interrupt Request Mask" "0: Illegal access error interrupt request not..,1: Illegal access error interrupt request masked" bitfld.long 0x00 9. "BWEM,BWE Interrupt Request Mask" "0: Write enable interrupt request for the SD_BUF..,1: Write enable interrupt request for the SD_BUF.." newline bitfld.long 0x00 8. "BREM,BRE Interrupt Request Mask" "0: Read enable interrupt request for the SD..,1: Read enable interrupt request for the SD.." bitfld.long 0x00 6. "RSPTOM,Response Timeout Interrupt Request Mask" "0: Response timeout interrupt request not masked,1: Response timeout interrupt request masked" newline bitfld.long 0x00 5. "ILRM,SD_BUF Register Illegal Read Interrupt Request Mask" "0: Illegal read detection interrupt request for..,1: Illegal read detection interrupt request for.." bitfld.long 0x00 4. "ILWM,SD_BUF Register Illegal Write Interrupt Request Mask" "0: Illegal write detection interrupt request for..,1: Illegal write detection interrupt request for.." newline bitfld.long 0x00 3. "DTOM,Data Timeout Interrupt Request Mask" "0: Data timeout interrupt request not masked,1: Data timeout interrupt request masked" bitfld.long 0x00 2. "ENDEM,End Bit Error Interrupt Request Mask" "0: End bit detection error interrupt request not..,1: End bit detection error interrupt request.." newline bitfld.long 0x00 1. "CRCEM,CRC Error Interrupt Request Mask" "0: CRC error interrupt request not masked,1: CRC error interrupt request masked" bitfld.long 0x00 0. "CMDEM,Command Error Interrupt Request Mask" "0: Command error interrupt request not masked,1: Command error interrupt request masked" group.long 0x48++0x03 line.long 0x00 "SD_CLK_CTRL,SD Clock Control Register" bitfld.long 0x00 9. "CLKCTRLEN,SD/MMC Clock Output Automatic Control Enable" "0: Automatic control for SD/MMC Clock output is..,1: Automatic control for SD/MMC Clock output is.." bitfld.long 0x00 8. "CLKEN,SD/MMC Clock Output Control Enable" "0: SD/MMC Clock output is disabled,1: SD/MMC Clock output is enabled" newline hexmask.long.byte 0x00 0.--7. 1. "CLKSEL,SDHI Clock Frequency Select" group.long 0x4C++0x03 line.long 0x00 "SD_SIZE,Transfer Data Length Register" hexmask.long.word 0x00 0.--9. 1. "LEN,Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25) the only specifiable transfer data size is 512 bytes" group.long 0x50++0x03 line.long 0x00 "SD_OPTION,SD Card Access Control Option Register" bitfld.long 0x00 15. "WIDTH,Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0" "0: 4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1),1: 1-bit width (WIDTH8=0 or 1 )" bitfld.long 0x00 13. "WIDTH8,Bus Widthsee b15 WIDTH bit" "0,1" newline bitfld.long 0x00 8. "TOUTMASK,Timeout MASKWhen timeout occurs in case of inactivating timeout software reset should be executed to terminate command sequence" "0: Activate Timeout,1: Inactivate Timeout(RSPTO bit and DTO bit of.." bitfld.long 0x00 4.--7. "TOP,Timeout Counter" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,15: Setting prohibited" newline bitfld.long 0x00 0.--3. "CTOP,Card Detect Time Counter" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,15: Setting prohibited" rgroup.long 0x58++0x03 line.long 0x00 "SD_ERR_STS1,SD Error Status Register 1" bitfld.long 0x00 12.--14. "CRCTK,CRC Status TokenStore the CRC status token value (normal value is 010b)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 11. "CRCTKE,CRC Status Token Error" "0: An error has not occured in the CRC status,1: An error has occured in the CRC status" newline bitfld.long 0x00 10. "RDCRCE,Read Data CRC Error" "0: CRC error has detected in read data,1: CRC error has not detected in read data" bitfld.long 0x00 9. "RSPCRCE1,Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPCRCE0" "0: CRC error has not occured,1: CRC error has occured in the response to a.." newline bitfld.long 0x00 8. "RSPCRCE0,Response CRC Error 0NOTE: other than a response to a command issued within a command sequence" "0: A CRC error has not occur in a response,1: A CRC error has occured in a response" bitfld.long 0x00 5. "CRCLENE,CRC Status Token Length Error" "0: An error has not occured in the CRC status..,1: An error has occured in the CRC status length.." newline bitfld.long 0x00 4. "RDLENE,Read Data Length Error" "0: An error has occurred not in the read data..,1: An error has occured in the read data length.." bitfld.long 0x00 3. "RSPLENE1,Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPLENE0" "0: An error has not occurred in the response..,1: An error has occured in the response length.." newline bitfld.long 0x00 2. "RSPLENE0,Response Length Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the response length,1: An error has occured in the response length" bitfld.long 0x00 1. "CMDE1,Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is Indicated in CMDE0" "0: An error has not occurs in the command index..,1: An error has occured in the command index of.." newline bitfld.long 0x00 0. "CMDE0,Command Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the command index..,1: An error has occured in the command index of.." rgroup.long 0x5C++0x03 line.long 0x00 "SD_ERR_STS2,SD Error Status Register 2" bitfld.long 0x00 6. "CRCBSYTO,CRC Status Token Busy Timeout" "0: Not timeout,1: The busy state continues for longer than.." bitfld.long 0x00 5. "CRCTO,CRC Status Token Timeout" "0: Not timeout,1: The CRC status is not received though a.." newline bitfld.long 0x00 4. "RDTO,Read Data Timeout" "0: Not timeout,1: The read data is not received though a longer.." bitfld.long 0x00 3. "BSYTO1,Busy Timeout 1" "0: Not timeout,1: The busy state for longer than N-cycle.." newline bitfld.long 0x00 2. "BSYTO0,Busy Timeout 0" "0: Not timeout,1: The busy state for longer than N-cycle.." bitfld.long 0x00 1. "RSPTO1,Response Timeout 1" "0: Not timeout,1: The response to a command issued within a.." newline bitfld.long 0x00 0. "RSPTO0,Response Timeout 0" "0: Not timeout,1: The response (other than a response to a.." group.long 0x60++0x03 line.long 0x00 "SD_BUF0,SD Buffer Register" hexmask.long 0x00 0.--31. 1. "SD_BUF,SD Buffer RegisterWhen writing to the SD card the write data is written to this register" group.long 0x68++0x03 line.long 0x00 "SDIO_MODE,SDIO Mode Control Register" bitfld.long 0x00 9. "C52PUB,SDIO None AbortNOTE: See manual" "0,1" bitfld.long 0x00 8. "IOABT,SDIO AbortNOTE: See manual" "0,1" newline bitfld.long 0x00 2. "RWREQ,Read Wait Request" "0: Allow SD/MMC to exit read wait state,1: Request for SD/MMC to enter read wait state" bitfld.long 0x00 0. "INTEN,SDIO Mode" "0: Disables the SD host interface to receive..,1: Enables the SD host interface to receive SDIO.." group.long 0x6C++0x03 line.long 0x00 "SDIO_INFO1,SDIO Interrupt Flag Register 1" bitfld.long 0x00 15. "EXWT,EXWT Status FlagNOTE: See manual" "0,1" bitfld.long 0x00 14. "EXPUB52,EXPUB52 Status FlagNOTE: See manual" "0,1" newline bitfld.long 0x00 0. "IOIRQ,SDIO Interrupt Status" "0: SDIO interrupt not accepted,1: SDIO interrupt accepted" group.long 0x70++0x03 line.long 0x00 "SDIO_INFO1_MASK,SDIO_INFO1 Interrupt Mask Register" bitfld.long 0x00 15. "EXWTM,EXWT Interrupt Request Mask Control" "0: EXWT interrupt request not masked,1: EXWT interrupt request masked" bitfld.long 0x00 14. "EXPUB52M,EXPUB52 Interrupt Request Mask Control" "0: EXPUB52 interrupt request not masked,1: EXPUB52 interrupt request masked" newline bitfld.long 0x00 0. "IOIRQM,IOIRQ Interrupt Mask Control" "0: IOIRQ interrupt not masked,1: IOIRQ interrupt masked" group.long 0x1B0++0x03 line.long 0x00 "SD_DMAEN,DMA Mode Enable Register" bitfld.long 0x00 1. "DMAEN,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled,1: The SD_BUF read/write DMA transfer is enabled" group.long 0x1C0++0x03 line.long 0x00 "SOFT_RST,Software Reset Register" bitfld.long 0x00 0. "SDRST,Software Reset of SD I/F Unit" "0: Reset,1: Reset released" group.long 0x1CC++0x03 line.long 0x00 "SDIF_MODE,SD Interface Mode Setting Register" bitfld.long 0x00 8. "NOCHKCR,CRC Check Mask (for MMC test commands)" "0: CRC check is valid,1: CRC check is invalid(CRC16 value is ignored.." group.long 0x1E0++0x03 line.long 0x00 "EXT_SWAP,Swap Control Register" bitfld.long 0x00 7. "BRSWP,SD_BUF0 Swap" "0: The current data are read without swapping,1: Swapping of the positions of the higher- and.." bitfld.long 0x00 6. "BWSWP,SD_BUF0 Swap" "0: The current data are written without swapping,1: Swapping of the positions of the higher- and.." tree.end repeat.end tree.end tree "SMPU (Bus Slave MPU)" base ad:0x40000C00 group.word 0x00++0x01 line.word 0x00 "SMPUCTL,Slave MPU Control Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Key Code This bit is used to enable or disable rewriting of the PROTECT and OAD bit" bitfld.word 0x00 1. "PROTECT,Protection of register" "0: All Bus Slave register writing is possible,1: All Bus Slave register writing is protected" newline bitfld.word 0x00 0. "OAD,Master Group enable" "0: Non-maskable interrupt,1: Internal reset" group.word 0x10++0x01 line.word 0x00 "SMPUMBIU,Access Control Register for MBIU" bitfld.word 0x00 15. "WPSRAMHS,SRAMHS Write Protection" "0: Memory protection for SRAMHS writes from..,1: Memory protection for SRAMHS writes from.." bitfld.word 0x00 14. "RPSRAMHS,SRAMHS Read Protection" "0: Memory protection for SRAMHS reads from..,1: Memory protection for SRAMHS reads from.." newline bitfld.word 0x00 13. "WPFLI,Code Flash Memory Write Protection (Note: This bit is read as 1. The write value should be 1.)" "0: Setting prohibited,1: Memory protection for code flash memory.." bitfld.word 0x00 12. "RPFLI,Code Flash Memory Read Protection" "0: Memory protection for code flash memory reads..,1: Memory protection for code flash memory reads.." newline bitfld.word 0x00 7. "WPGRPC,Master Group C Write protection" "0: Memory protection for master group C writes..,1: Memory protection for master group C writes.." bitfld.word 0x00 6. "RPGRPC,Master Group C Read protection" "0: Memory protection for master group C reads..,1: Memory protection for master group C reads.." newline bitfld.word 0x00 5. "WPGRPB,Master Group B Write protection" "0: Memory protection for master group B writes..,1: Memory protection for master group B writes.." bitfld.word 0x00 4. "RPGRPB,Master Group B Read protection" "0: Memory protection for master group B reads..,1: Memory protection for master group B reads.." newline bitfld.word 0x00 3. "WPGRPA,Master Group A Write protection" "0: Memory protection for master group A writes..,1: Memory protection for master group A writes.." bitfld.word 0x00 2. "RPGRPA,Master Group A Read protection" "0: Memory protection for master group A reads..,1: Memory protection for master group A reads.." group.word 0x14++0x01 line.word 0x00 "SMPUFBIU,Access Control Register for FBIU" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Setting prohibited,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Setting prohibited,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Master group B write of memory protection is..,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Master group B read of memory protection is..,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" repeat 2. (strings "0" "1" )(list 0x0 0x4 ) group.word ($2+0x18)++0x01 line.word 0x00 "SMPUSRAM$1,Access Control Register for SRAM" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Master group C write of memory protection is..,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Master group C read of memory protection is..,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Master group B write of memory protection is..,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Master group B read of memory protection is..,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" repeat.end group.word 0x20++0x01 line.word 0x00 "SMPUP0BIU,Access Control Register for P" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Setting prohibited,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Setting prohibited,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Setting prohibited,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Setting prohibited,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" group.word 0x24++0x01 line.word 0x00 "SMPUP2BIU,Access Control Register for P" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Setting prohibited,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Setting prohibited,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Setting prohibited,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Setting prohibited,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" group.word 0x28++0x01 line.word 0x00 "SMPUP6BIU,Access Control Register for P" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Setting prohibited,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Setting prohibited,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Setting prohibited,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Setting prohibited,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" group.word 0x2C++0x01 line.word 0x00 "SMPUP7BIU,Access Control Register for P" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Setting prohibited,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Setting prohibited,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Setting prohibited,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Setting prohibited,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" repeat 2. (strings "" "2" )(list 0x0 0x4 ) group.word ($2+0x30)++0x01 line.word 0x00 "SMPUEXBIU$1,Access Control Register for EXBIU $1" bitfld.word 0x00 7. "WP_GRPC,Master Group C Write protection" "0: Master group C write of memory protection is..,1: Master group C write of memory protection is.." bitfld.word 0x00 6. "RP_GRPC,Master Group C Read protection" "0: Master group C read of memory protection is..,1: Master group C read of memory protection is.." newline bitfld.word 0x00 5. "WP_GRPB,Master Group B Write protection" "0: Master group B write of memory protection is..,1: Master group B write of memory protection is.." bitfld.word 0x00 4. "RP_GRPB,Master Group B Read protection" "0: Master group B read of memory protection is..,1: Master group B read of memory protection is.." newline bitfld.word 0x00 3. "WP_GRPA,Master Group A Write protection" "0: Master group A write of memory protection is..,1: Master group A write of memory protection is.." bitfld.word 0x00 2. "RP_GRPA,Master Group A Read protection" "0: Master group A read of memory protection is..,1: Master group A read of memory protection is.." newline bitfld.word 0x00 1. "WP_CPU,CPU Write protection" "0: CPU write of memory protection is disabled,1: CPU write of memory protection is enabled" bitfld.word 0x00 0. "RP_CPU,CPU Read protection" "0: CPU read of memory protection is disabled,1: CPU read of memory protection is enabled" repeat.end tree.end tree "SPI (Serial Peripheral Interface)" repeat 2. (list 0. 1.) (list ad:0x40072000 ad:0x40072100) tree "SPI$1" base $2 group.byte 0x00++0x00 line.byte 0x00 "SPCR,SPI Control Register" bitfld.byte 0x00 7. "SPRIE,SPI Receive Buffer Full Interrupt Enable" "0: Disables the generation of SPI receive buffer..,1: Enables the generation of SPI receive buffer.." bitfld.byte 0x00 6. "SPE,SPI Function Enable" "0: Disables the SPI function,1: Enables the SPI function" newline bitfld.byte 0x00 5. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disables the generation of transmit buffer..,1: Enables the generation of transmit buffer.." bitfld.byte 0x00 4. "SPEIE,SPI Error Interrupt Enable" "0: Disables the generation of SPI error..,1: Enables the generation of SPI error interrupt.." newline bitfld.byte 0x00 3. "MSTR,SPI Master/Slave Mode Select" "0: Slave mode,1: Master mode" bitfld.byte 0x00 2. "MODFEN,Mode Fault Error Detection Enable" "0: Disables the detection of mode fault error,1: Enables the detection of mode fault error" newline bitfld.byte 0x00 1. "TXMD,Communications Operating Mode Select" "0: Full-duplex synchronous serial communications,1: Serial communications consisting of only.." bitfld.byte 0x00 0. "SPMS,SPI Mode Select" "0: SPI operation (4-wire method),1: Clock synchronous operation (3-wire method)" group.byte 0x01++0x00 line.byte 0x00 "SSLP,SPI Slave Select Polarity Register" bitfld.byte 0x00 3. "SSL3P,SSL3 Signal Polarity Setting" "0: SSL3 signal is active low,1: SSL3 signal is active high" bitfld.byte 0x00 2. "SSL2P,SSL2 Signal Polarity Setting" "0: SSL2 signal is active low,1: SSL2 signal is active high" newline bitfld.byte 0x00 1. "SSL1P,SSL1 Signal Polarity Setting" "0: SSL1 signal is active low,1: SSL1 signal is active high" bitfld.byte 0x00 0. "SSL0P,SSL0 Signal Polarity Setting" "0: SSL0 signal is active low,1: SSL0 signal is active high" group.byte 0x02++0x00 line.byte 0x00 "SPPCR,RSPI Pin Control Register" bitfld.byte 0x00 5. "MOIFE,MOSI Idle Value Fixing Enable" "0: MOSI output value equals final data from..,1: MOSI output value equals the value set in the.." bitfld.byte 0x00 4. "MOIFV,MOSI Idle Fixed Value" "0: The level output on the MOSIn pin during MOSI..,1: The level output on the MOSIn pin during MOSI.." newline bitfld.byte 0x00 1. "SPLP2,RSPI Loopback 2" "0: Normal mode,1: Loopback mode (data is not inverted for.." bitfld.byte 0x00 0. "SPLP,RSPI Loopback" "0: Normal mode,1: Loopback mode (data is inverted for.." group.byte 0x03++0x00 line.byte 0x00 "SPSR,SPI Status Register" bitfld.byte 0x00 7. "SPRF,SPI Receive Buffer Full Flag" "0: No valid data in SPDR,1: Valid data found in SPDR" bitfld.byte 0x00 5. "SPTEF,SPI Transmit Buffer Empty Flag" "0: Data found in the transmit buffer,1: No data in the transmit buffer" newline bitfld.byte 0x00 4. "UDRF,Underrun Error Flag(When MODF is 0 This bit is invalid.)" "0: A mode fault error occurs (MODF=1),1: An underrun error occurs (MODF=1)" bitfld.byte 0x00 3. "PERF,Parity Error Flag" "0: No parity error occurs,1: A parity error occurs" newline bitfld.byte 0x00 2. "MODF,Mode Fault Error Flag" "0: Neither mode fault error nor underrun error..,1: A mode fault error or an underrun error occurs" rbitfld.byte 0x00 1. "IDLNF,SPI Idle Flag" "0: SPI is in the idle state,1: SPI is in the transfer state" newline bitfld.byte 0x00 0. "OVRF,Overrun Error Flag" "0: No overrun error occurs,1: An overrun error occurs" group.long 0x04++0x03 line.long 0x00 "SPDR,SPI Data Register" hexmask.long 0x00 0.--31. 1. "SPDR,SPDR is the interface with the buffers that hold data for transmission and reception by the RSPI.When accessing in word (SPDCR.SPLW=1) access SPDR" group.word 0x04++0x01 line.word 0x00 "SPDR_HA,SPI Data Register ( halfword access )" hexmask.word 0x00 0.--15. 1. "SPDR_HA,SPDR is the interface with the buffers that hold data for transmission and reception by the RSPI.When accessing in halfword (SPDCR.SPLW=0) access SPDR_HA" group.byte 0x08++0x00 line.byte 0x00 "SPSCR,SPI Sequence Control Register" bitfld.byte 0x00 0.--2. "SPSLN,RSPI Sequence Length SpecificationThe order in which the SPCMD0 to SPCMD07 registers are to be referenced is changed in accordance with the sequence length that is set in these bits" "0: Length 1 SPDMDx x = 0->0->,1: Length 2 SPDMDx x = 0->1->0->,2: Length 3 SPDMDx x = 0->1->2->0->,3: Length 4 SPDMDx x = 0->1->2->3->0->,4: Length 5 SPDMDx x = 0->1->2->3->4->0->,5: Length 6 SPDMDx x = 0->1->2->3->4->5->0->,6: Length 7 SPDMDx x = 0->1->2->3->4->5->6->0->,7: Length 8 SPDMDx x = 0->1->2->3->4->5->6->7->0->" rgroup.byte 0x09++0x00 line.byte 0x00 "SPSSR,SPI Sequence Status Register" bitfld.byte 0x00 4.--6. "SPECM,RSPI Error Command" "0: SPCMD0,1: SPCMD1,2: SPCMD2,3: SPCMD3,4: SPCMD4,5: SPCMD5,6: SPCMD6,7: SPCMD7" bitfld.byte 0x00 0.--2. "SPCP,RSPI Command Pointer" "0: SPCMD0,1: SPCMD1,2: SPCMD2,3: SPCMD3,4: SPCMD4,5: SPCMD5,6: SPCMD6,7: SPCMD7" group.byte 0x0A++0x00 line.byte 0x00 "SPBR,SPI Bit Rate Register" hexmask.byte 0x00 0.--7. 1. "SPR,SPBR sets the bit rate in master mode" group.byte 0x0B++0x00 line.byte 0x00 "SPDCR,SPI Data Control Register" bitfld.byte 0x00 6. "SPBYT,SPI Byte Access Specification" "0: SPDR is accessed in word or longword (SPLW is..,1: SPDR is accessed in byte (SPLW is invalid)" bitfld.byte 0x00 5. "SPLW,SPI Word Access/Halfword Access Specification" "0: SPDR_HA is valid to access in halfwords,1: SPDR is valid (to access in words)" newline bitfld.byte 0x00 4. "SPRDTD,RSPI Receive/Transmit Data Selection" "0: SPDR values are read from the receive buffer,1: SPDR values are read from the transmit buffer.." bitfld.byte 0x00 0.--1. "SPFC,Number of Frames Specification" "0: 1 frame,1: 2 frames,2: 3 frames,3: 4 frames" group.byte 0x0C++0x00 line.byte 0x00 "SPCKD,SPI Clock Delay Register" bitfld.byte 0x00 0.--2. "SCKDL,RSPCK Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,2: 3 RSPCK,3: 4 RSPCK,4: 5 RSPCK,5: 6 RSPCK,6: 7 RSPCK,7: 8 RSPCK" group.byte 0x0D++0x00 line.byte 0x00 "SSLND,SPI Slave Select Negation Delay Register" bitfld.byte 0x00 0.--2. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,2: 3 RSPCK,3: 4 RSPCK,4: 5 RSPCK,5: 6 RSPCK,6: 7 RSPCK,7: 8 RSPCK" group.byte 0x0E++0x00 line.byte 0x00 "SPND,SPI Next-Access Delay Register" bitfld.byte 0x00 0.--2. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 PCLK,1: 2 RSPCK + 2 PCLK,2: 3 RSPCK + 2 PCLK,3: 4 RSPCK + 2 PCLK,4: 5 RSPCK + 2 PCLK,5: 6 RSPCK + 2 PCLK,6: 7 RSPCK + 2 PCLK,7: 8 RSPCK + 2 PCLK" group.byte 0x0F++0x00 line.byte 0x00 "SPCR2,SPI Control Register 2" bitfld.byte 0x00 4. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disables the RSPCK auto-stop function,1: Enables the RSPCK auto-stop function" bitfld.byte 0x00 3. "PTE,Parity Self-Testing" "0: Disables the self-diagnosis function of the..,1: Enables the self-diagnosis function of the.." newline bitfld.byte 0x00 2. "SPIIE,SPI Idle Interrupt Enable" "0: Disables the generation of idle interrupt..,1: Enables the generation of idle interrupt.." bitfld.byte 0x00 1. "SPOE,Parity Mode" "0: Selects even parity for use in transmission..,1: Selects odd parity for use in transmission.." newline bitfld.byte 0x00 0. "SPPE,Parity Enable" "0: Does not add the parity bit to transmit data..,1: Adds the parity bit to transmit data and.." repeat 8. (strings "0" "1" "2" "3" "4" "5" "6" "7" )(list 0x0 0x2 0x4 0x6 0x8 0xA 0xC 0xE ) group.word ($2+0x10)++0x01 line.word 0x00 "SPCMD$1,SPI Command Register" bitfld.word 0x00 15. "SCKDEN,RSPCK Delay Setting Enable" "0: An RSPCK delay of 1 RSPCK,1: An RSPCK delay is equal to the setting of the.." bitfld.word 0x00 14. "SLNDEN,SSL Negation Delay Setting Enable" "0: An SSL negation delay of 1 RSPCK,1: An SSL negation delay is equal to the setting.." newline bitfld.word 0x00 13. "SPNDEN,RSPI Next-Access Delay Enable" "0: A next-access delay of 1 RSPCK + 2 PCLK,1: A next-access delay is equal to the setting.." bitfld.word 0x00 12. "LSBF,RSPI LSB First" "0: MSB first,1: LSB first" newline bitfld.word 0x00 8.--11. "SPB,RSPI Data Length Setting" "0: 20 bits,1: 24 bits,2: 32 bits,3: 32 bits,?,?,?,?,8: 9 bits,9: 10 bits,10: 11 bits,11: 12 bits,12: 13 bits,13: 14 bits,14: 15 bits,15: 16 bits" bitfld.word 0x00 7. "SSLKP,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of..,1: Keep SSL signal level from the end of.." newline bitfld.word 0x00 4.--6. "SSLA,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,2: SSL2,3: SSL3,?..." bitfld.word 0x00 2.--3. "BRDV,Bit Rate Division Setting" "0: These bits select the base bit rate,1: These bits select the base bit rate divided..,2: These bits select the base bit rate divided..,3: These bits select the base bit rate divided.." newline bitfld.word 0x00 1. "CPOL,RSPCK Polarity Setting" "0: RSPCK is low when idle,1: RSPCK is high when idle" bitfld.word 0x00 0. "CPHA,RSPCK Phase Setting" "0: Data sampling on odd edge data variation on..,1: Data variation on odd edge data sampling on.." repeat.end group.byte 0x20++0x00 line.byte 0x00 "SPDCR2,SPI Data Control Register 2" bitfld.byte 0x00 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap Operating Mode disabled,1: Byte Swap Operating Mode enabled" tree.end repeat.end tree.end tree "SPMON (CPU Stack Pointer Monitor)" base ad:0x40000D00 group.word 0x00++0x01 line.word 0x00 "MSPMPUOAD,Stack Pointer Monitor Operation After Detection Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset" group.word 0x04++0x01 line.word 0x00 "MSPMPUCTL,Stack Pointer Monitor Access Control Register" rbitfld.word 0x00 8. "ERROR,SP_main monitor error flag" "0: SP_main has not overflowed or underflowed,1: SP_main has overflowed or underflowed" bitfld.word 0x00 0. "ENABLE,SP_main monitor enable" "0: SP_main monitor is disabled,1: SP_main monitor is enabled" group.word 0x06++0x01 line.word 0x00 "MSPMPUPT,Stack Pointer Monitor Protection Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "PROTECT,Protection of register (MSPMPUAC MSPMPUSA and MSPMPUSE)" "0: Stack Pointer Monitor register writing is..,1: Stack Pointer Monitor register writing is.." group.long 0x08++0x03 line.long 0x00 "MSPMPUSA,Main Stack Pointer Monitor Start Address Register" hexmask.long 0x00 2.--31. 1. "MSPMPUSA,Region start address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00000-0x200FFFFC The low-order 2 bits are fixed to 0" group.long 0x0C++0x03 line.long 0x00 "MSPMPUEA,Main Stack Pointer Monitor End Address Register" hexmask.long 0x00 2.--31. 1. "MSPMPUEA,Region end address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00003-0x200FFFFF The low-order 2 bits are fixed to 1" group.word 0x10++0x01 line.word 0x00 "PSPMPUOAD,Stack Pointer Monitor Operation After Detection Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "OAD,Operation after detection" "0: Non-maskable interrupt,1: Internal reset" group.word 0x14++0x01 line.word 0x00 "PSPMPUCTL,Stack Pointer Monitor Access Control Register" rbitfld.word 0x00 8. "ERROR,SP_process monitor error flag" "0: SP_process has not overflowed or underflowed,1: SP_process has overflowed or underflowed" bitfld.word 0x00 0. "ENABLE,SP_process monitor enable" "0: SP_process monitor is disabled,1: SP_process monitor is enabled" group.word 0x16++0x01 line.word 0x00 "PSPMPUPT,Stack Pointer Monitor Protection Register" hexmask.word.byte 0x00 8.--15. 1. "KEY,Write Keyword The data written to these bits are not stored" bitfld.word 0x00 0. "PROTECT,Protection of register (PSPMPUAC PSPMPUSA and PSPMPUSE)" "0: Stack Pointer Monitor register writing is..,1: Stack Pointer Monitor register writing is.." group.long 0x18++0x03 line.long 0x00 "PSPMPUSA,Process Stack Pointer Monitor Start Address Register" hexmask.long 0x00 2.--31. 1. "PSPMPUSA,Region start address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00000-0x200FFFFC The low-order 2 bits are fixed to 0" group.long 0x1C++0x03 line.long 0x00 "PSPMPUEA,Process Stack Pointer Monitor End Address Register" hexmask.long 0x00 2.--31. 1. "PSPMPUEA,Region end address register Address where the region starts for use in region determination.NOTE: Range: 0x1FF00003-0x200FFFFF The low-order 2 bits are fixed to 1" tree.end tree "SRAM (SRAM Control)" base ad:0x40002000 group.byte 0x00++0x00 line.byte 0x00 "PARIOAD,SRAM Parity Error Operation After Detection Register" bitfld.byte 0x00 0. "OAD,Operation after Detection" "0: Non-maskable interrupt,1: Reset" group.byte 0x04++0x00 line.byte 0x00 "SRAMPRCR,SRAM Protection Register" hexmask.byte 0x00 1.--7. 1. "KW,Write Key Code" bitfld.byte 0x00 0. "SRAMPRCR,Register Write Control" "0: Disable writes to protected registers,1: Enable writes to protected registers" group.byte 0x08++0x00 line.byte 0x00 "SRAMWTSC,RAM Wait State Control Register" bitfld.byte 0x00 3. "SRAM1WTEN,SRAM1 Wait Enable" "0: Not add wait state in read access cycle to..,1: Add wait state in read access cycle to SRAM1" bitfld.byte 0x00 2. "SRAM0WTEN,SRAM0 Wait Enable" "0: Not add wait state in read access cycle to..,1: Add wait state in read access cycle to SRAM0" newline bitfld.byte 0x00 1. "ECCRAMRDWTEN,ECCRAM Read wait enable" "0: Not add wait state in read access cycle to..,1: Add wait state in read access cycle to SRAM0.." group.byte 0xC0++0x00 line.byte 0x00 "ECCMODE,ECCRAM Operating Mode Control Register" bitfld.byte 0x00 0.--1. "ECCMOD,ECC Operating Mode Select" "0: Disable ECC function,1: Setting prohibited,2: Enable ECC function without error checking,3: Enable ECC function with error checking" group.byte 0xC1++0x00 line.byte 0x00 "ECC2STS,ECCRAM 2-Bit Error Status Register" bitfld.byte 0x00 0. "ECC2ERR,ECC 2-Bit Error Status" "0: No 2-bit ECC error occurred,1: 2-bit ECC error occurred" group.byte 0xC2++0x00 line.byte 0x00 "ECC1STSEN,ECCRAM 1-Bit Error Information Update Enable Register" bitfld.byte 0x00 0. "E1STSEN,ECC 1-Bit Error Information Update Enable" "0: Disables updating of the 1-bit ECC error..,1: Enables updating of the 1-bit ECC error.." group.byte 0xC3++0x00 line.byte 0x00 "ECC1STS,ECCRAM 1-Bit Error Status Register" bitfld.byte 0x00 0. "ECC1ERR,ECC 1-Bit Error Status" "0: No 1-bit ECC error occurred,1: 1-bit ECC error occurred" group.byte 0xC4++0x00 line.byte 0x00 "ECCPRCR,ECCRAM Protection Register" hexmask.byte 0x00 1.--7. 1. "KW,Write Key Code" bitfld.byte 0x00 0. "ECCPRCR,ECCRAMETST Register Write Control" "0: Disable writes to protected registers,1: Enable writes to protected registers" group.byte 0xD4++0x00 line.byte 0x00 "ECCETST,ECC Test Control Register" bitfld.byte 0x00 0. "TSTBYP,ECC Bypass Select" "0: ECC bypass disabled,1: ECC bypass enabled" group.byte 0xD8++0x00 line.byte 0x00 "ECCOAD,RAM ECC Error Operation After Detection Register" bitfld.byte 0x00 0. "OAD,Operation after Detection" "0: Non maskable interrupt,1: Internal reset" tree.end tree "SRC (System Reset Controller)" base ad:0x4004DFF0 wgroup.long 0x00++0x03 line.long 0x00 "SRCID,Input Data Register" hexmask.long 0x00 0.--31. 1. "SRCID,SRCID is a 32-bit writ-only register that is used to input the data before sampling rate conversion" rgroup.long 0x04++0x03 line.long 0x00 "SRCOD,Output Data Register" hexmask.long 0x00 0.--31. 1. "SRCOD,SRCOD is a 32-bit read-only register used to output the data after sampling rate conversion" group.word 0x08++0x01 line.word 0x00 "SRCIDCTRL,Input Data Control Register" bitfld.word 0x00 9. "IED,Input Data Endian" "0: Endian formats 1 are the same between the CPU..,1: Endian formats 1 are different between the.." bitfld.word 0x00 8. "IEN,Input FIFO Empty Interrupt Enable" "0: Input FIFO empty interrupt is disabled,1: Input FIFO empty interrupt is enabled" newline bitfld.word 0x00 0.--1. "IFTRG,Input FIFO Data Triggering Number" "0: 00,1: 01,2: 10,3: 11" group.word 0x0A++0x01 line.word 0x00 "SRCODCTRL,Output Data Control Register" bitfld.word 0x00 10. "OCH,Output Data Channel Exchange" "0: Does not exchange the channels (the same..,1: Exchanges the channels (the opposite order.." bitfld.word 0x00 9. "OED,Output Data Endian" "0: Endian formats are the same between the chip..,1: Endian formats are different between the chip.." newline bitfld.word 0x00 8. "OEN,Output Data FIFO Full Interrupt Enable" "0: Output data FIFO full interrupt is disabled,1: Output data FIFO full interrupt is enabled" bitfld.word 0x00 0.--1. "OFTRG,Output FIFO Data Trigger Number" "0: 00,1: 01,2: 10,3: 11" group.word 0x0C++0x01 line.word 0x00 "SRCCTRL,Control Register" bitfld.word 0x00 15. "FICRAE,Filter Coefficient Table Access Enable" "0: Reading/writing to filter coefficient table..,1: Reading/writing to filter coefficient table.." bitfld.word 0x00 13. "CEEN,Conversion End Interrupt Enable" "0: Disables conversion end interrupt requests,1: Enables conversion end interrupt requests" newline bitfld.word 0x00 12. "SRCEN,Module Enable" "0: Disables this module operation,1: Enables this module operation" bitfld.word 0x00 11. "UDEN,Output Data FIFO Underflow Interrupt Enable" "0: Disables output data FIFO underflow interrupt..,1: Enables output data FIFO underflow interrupt.." newline bitfld.word 0x00 10. "OVEN,Output Data FIFO Overwrite Interrupt Enable" "0: Output data FIFO overwrite interrupt is..,1: Output data FIFO overwrite interrupt is enabled" bitfld.word 0x00 9. "FL,Internal Work Memory Flush" "0: no effect,1: starts converting the sampling rate of all.." newline bitfld.word 0x00 8. "CL,Internal Work Memory Clear" "0: no effect,1: Clears the input FIFO output FIFO input.." bitfld.word 0x00 4.--7. "IFS,Input Sampling Rate" "0: 8.0 kHz,1: 11.025 kHz,2: 12.0 kHz,3: Setting prohibited,4: 16.0 kHz,5: 22.05 kHz,6: 24.0 kHz,7: Setting prohibited,8: 32.0 kHz,9: 44.1 kHz,10: 48.0 kHz,?..." newline bitfld.word 0x00 0.--2. "OFS,Output Sampling Rate" "0: 44.1 kHz,1: 48.0 kHz,2: 32.0 kHz,3: Setting prohibited,4: 8.0 kHz ( Valid only when IFS[3:0] =1001b ),5: 16.0 kHz ( Valid only when IFS[3:0] =1001b ),?..." group.word 0x0E++0x01 line.word 0x00 "SRCSTAT,Status Register" rbitfld.word 0x00 11.--15. "OFDN,Output FIFO Data Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.word 0x00 7.--10. "IFDN,Input FIFO Data Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 5. "CEF,Conversion End Flag" "0: All of the output data has not been read out,1: All of the output data has been read out" rbitfld.word 0x00 4. "FLF,Flush Processing Status Flag" "0: Flash processing is completed,1: Flash processing is in progress" newline bitfld.word 0x00 3. "UDF,Output FIFO Underflow Interrupt Request Flag" "0: Output data FIFO has not been read out,1: Output data FIFO has been read out" bitfld.word 0x00 2. "OVF,Output Data FIFO Overwrite Interrupt Request Flag" "0: Next data conversion processing is not..,1: Next data conversion processing is completed" newline bitfld.word 0x00 1. "IINT,Input Data FIFO Empty Interrupt Request Flag" "0: Number of data units in the input FIFO has..,1: Number of data units in the input FIFO has.." bitfld.word 0x00 0. "OINT,Output Data FIFO Full Interrupt Request Flag" "0: Number of data units in the output FIFO has..,1: Number of data units in the output FIFO has.." tree.end tree "SRCRAM (Sampling Rate Converter RAM)" base ad:0x40048000 repeat 5552. (increment 0 1) (increment 0 0x4) group.long ($2+0x00)++0x03 line.long 0x00 "SRCFCTR[$1],Filter Coefficient Table $1" hexmask.long.tbyte 0x00 0.--21. 1. "SRCFCOE,Stores a filter coefficient value" repeat.end tree.end tree "SSIE (Serial Sound Interface Enhanced)" repeat 2. (list 0. 1.) (list ad:0x4004E000 ad:0x4004E100) tree "SSIE$1" base $2 group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 30. "CKS,Oversampling Clock Select" "0: AUDIO_CLK input,1: Setting prohibited" bitfld.long 0x00 29. "TUIEN,Transmit Underflow Interrupt Enable" "0: Disables an underflow interrupt,1: Enables an underflow interrupt" newline bitfld.long 0x00 28. "TOIEN,Transmit Overflow Interrupt Enable" "0: Disables an overflow interrupt,1: Enables an overflow interrupt" bitfld.long 0x00 27. "RUIEN,Receive Underflow Interrupt Enable" "0: Disables an underflow interrupt,1: Enables an underflow interrupt" newline bitfld.long 0x00 26. "ROIEN,Receive Overflow Interrupt Enable" "0: Disables an overflow interrupt,1: Enables an overflow interrupt" bitfld.long 0x00 25. "IIEN,Idle Mode Interrupt Enable" "0: Disables an idle mode interrupt,1: Enables an idle mode interrupt" newline bitfld.long 0x00 22.--23. "CHNL,Channels" "0: One channel,?..." bitfld.long 0x00 19.--21. "DWL,Data Word Length" "0: 8 bits,1: 16 bits,2: 18 bits,3: 20 bits,4: 22 bits,5: 24 bits,?..." newline bitfld.long 0x00 16.--18. "SWL,System Word LengthSet the system word length to the bit clock frequency/2 fs" "0: 8 bits (serial bit clock frequency = 16fs ),1: 16 bits (serial bit clock frequency = 32fs ),2: 24 bits (serial bit clock frequency = 48fs ),3: 32 bits (serial bit clock frequency = 64fs ),?..." bitfld.long 0x00 14. "SWSD,Serial WS Direction NOTE: Only the following settings are allowed: (SCKD SWSD) = (0 0) and (1 1)" "0: Serial word select is input slave mode,1: Serial word select is output master mode" newline bitfld.long 0x00 13. "SCKP,Serial Bit Clock Polarity" "0: SSIWS and SSIDATA change at the SSISCK..,1: SSIWS and SSIDATA change at the SSISCK rising.." bitfld.long 0x00 12. "SWSP,Serial WS Polarity" "0: SSIWS is low for 1st channel high for 2nd..,1: SSIWS is high for 1st channel low for 2nd.." newline bitfld.long 0x00 11. "SPDP,Serial Padding Polarity" "0: Padding bits are low,1: Padding bits are high" bitfld.long 0x00 10. "SDTA,Serial Data Alignment" "0: Transmitting and receiving in the order of..,1: Transmitting and receiving in the order of.." newline bitfld.long 0x00 9. "PDTA,Parallel Data Alignment" "0: The lower bits of parallel data (SSITDR..,1: The upper bits of parallel data (SSITDR.." bitfld.long 0x00 8. "DEL,Serial Data Delay" "0: 1 clock cycle delay between SSIWS and SSIDATA,1: No delay between SSIWS and SSIDATA" newline bitfld.long 0x00 4.--7. "CKDV,Serial Oversampling Clock Division Ratio" "0: 0x0,1: CLK/2,2: CLK/4,3: CLK/8,4: CLK/16,5: CLK/32,6: CLK/64,7: CLK/128,8: CLK/6,9: CLK/12 (These bits are only settable for..,10: CLK/24,11: CLK/48(These bits are only settable for..,12: CLK/96(These bits are only settable for..,?..." bitfld.long 0x00 3. "MUEN,Mute EnableNOTE: When this module is muted the value of outputting serial data is rewritten to 0 but data transmission is not stopped" "0: This module is not muted,1: This module is muted" newline bitfld.long 0x00 1. "TEN,Transmit Enable" "0: Disables the transmit operation,1: Enables the transmit operation" bitfld.long 0x00 0. "REN,Receive Enable" "0: Disables the receive operation,1: Enables the receive operation" group.long 0x04++0x03 line.long 0x00 "SSISR,Status Register" bitfld.long 0x00 29. "TUIRQ,Transmit Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag" "0: No transmit underflow has occurred,1: A transmit underflow has occurred" bitfld.long 0x00 28. "TOIRQ,Transmit Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag" "0: No transmit overflow has occurred,1: A transmit overflow has occurred" newline bitfld.long 0x00 27. "RUIRQ,Receive Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag" "0: No receive underflow has occurred,1: A receive underflow has occurred" bitfld.long 0x00 26. "ROIRQ,Receive Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag" "0: No receive overflow has occurred,1: A receive overflow has occurred" newline rbitfld.long 0x00 25. "IIRQ,Idle Mode Interrupt Status Flag" "0: This module is not in idle state,1: This module is in idle state" rbitfld.long 0x00 5.--6. "TCHNO,Transmit Channel Number" "0,1,2,3" newline rbitfld.long 0x00 4. "TSWNO,Transmit Serial Word Number" "0,1" rbitfld.long 0x00 2.--3. "RCHNO,Receive Channel Number.These bits are read as 00b" "0,1,2,3" newline rbitfld.long 0x00 1. "RSWNO,Receive Serial Word Number" "0,1" rbitfld.long 0x00 0. "IDST,Idle Mode Status Flag" "0: Serial bus is operating,1: The current communication is stopped" group.long 0x10++0x03 line.long 0x00 "SSIFCR,FIFO Control Register" bitfld.long 0x00 31. "AUCKE,Oversampling Clock Enable" "0: The oversampling clock is disabled,1: The oversampling clock is enabled" bitfld.long 0x00 16. "SSIRST,SSI soft ware reset" "0: Clears the SSI software reset,1: initiates the SSI software reset" newline bitfld.long 0x00 6.--7. "TTRG,Transmit Data Trigger Number NOTE: The values in parenthesis are the number of empty stages in SSIFTDR at which the TDE flag is set" "0: 7 (1),1: 6 (2),2: 4 (4),3: 2 (6)" bitfld.long 0x00 4.--5. "RTRG,Receive Data Trigger Number" "0: 00,1: 01,2: 10,3: 11" newline bitfld.long 0x00 3. "TIE,Transmit Interrupt Enable NOTE: TXI can be cleared by clearing either the TDE flag (see the description of the TDE bit for details) or TIE bit" "0: Transmit data empty interrupt (TXI) request..,1: Transmit data empty interrupt (TXI) request.." bitfld.long 0x00 2. "RIE,Receive Interrupt Enable NOTE: RXI can be cleared by clearing either the RDF flag (see the description of the RDF bit for details) or RIE bit" "0: Receive data full interrupt (RXI) request is..,1: Receive data full interrupt (RXI) request is.." newline bitfld.long 0x00 1. "TFRST,Transmit FIFO Data Register Reset" "0: Clears the transmit data FIFO reset,1: Initiates the transmit data FIFO reset" bitfld.long 0x00 0. "RFRST,Receive FIFO Data Register Reset" "0: Clears the receive data FIFO reset,1: Initiates the receive data FIFO reset" group.long 0x14++0x03 line.long 0x00 "SSIFSR,FIFO Status Register" rbitfld.long 0x00 24.--27. "TDC,Transmit Data Indicate Flag(Indicates the number of data units stored in SSIFTDR)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16. "TDE,Transmit Data Empty Flag NOTE: Since the SSIFTDR register is a 32-byte FIFO register the maximum number of bytes that can be written to it while the TDE flag is 1 is" "0: Number of data bytes for transmission in..,1: Number of data bytes for transmission in.." newline rbitfld.long 0x00 8.--11. "RDC,Receive Data Indicate Flag(Indicates the number of data units stored in SSIFRDR)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "RDF,Receive Data Full Flag NOTE: Since the SSIFRDR register is a 32-byte FIFO register the maximum number of data bytes that can be read from it while the RDF flag is 1 is indicated in the RDC[3:0] flags" "0: Number of received data bytes in SSIFRDR is..,1: Number of received data bytes in SSIFRDR is.." wgroup.long 0x18++0x03 line.long 0x00 "SSIFTDR,Transmit FIFO Data Register" hexmask.long 0x00 0.--31. 1. "SSIFTDR,SSIFTDR is a write-only FIFO register consisting of eight stages of 32-bit registers for storing data to be serially transmitted" rgroup.long 0x1C++0x03 line.long 0x00 "SSIFRDR,Receive FIFO Data Register" hexmask.long 0x00 0.--31. 1. "SSIFRDR,SSIFRDR is a read-only FIFO register consisting of eight stages of 32-bit registers for storing serially received data" group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 9. "BCKASTP,Whether to Enable Stopping BCK Output When SSIE is in Idle Status" "0: Always outputs BCK to the SSIBCK pin,1: Automatically controls output of BCK to the.." bitfld.long 0x00 8. "LRCONT,Whether to Enable LRCK/FS Continuation" "0: Disables LRCK/FS continuation,1: Enables LRCK/FS continuation" newline bitfld.long 0x00 0.--1. "OMOD,Audio Format Select" "0: I2S format,1: TDM format,2: Monaural format,3: Setting prohibited" group.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. "TDES,TDE Setting Condition Select" "0: SSIFTDR has one stage or more free space,1: SSIFTDR has two stages or more free space..,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: SSIFTDR has thirty-one stages or more free..,31: SSIFTDR has thirty-two stages or more free.." bitfld.long 0x00 0.--4. "RDFS,RDF Setting Condition Select" "0: SSIFRDR has one stage or more data size,1: SSIFRDR has two stages or more data size (snip),?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,30: SSIFRDR has thirty-one stages or more data..,31: SSIFRDR has thirty-two stages or more data.." tree.end repeat.end tree.end tree "SYSTEM (System Control)" base ad:0x4001E000 group.long 0x20++0x03 line.long 0x00 "SCKDIVCR,System Clock Division Control Register" bitfld.long 0x00 28.--30. "FCK,Flash IF Clock (FCLK) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." bitfld.long 0x00 24.--26. "ICK,System Clock (ICLK) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." newline bitfld.long 0x00 16.--18. "BCK,External Bus Clock (BCLK) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." bitfld.long 0x00 12.--14. "PCKA,Peripheral Module Clock A (PCLKA) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." newline bitfld.long 0x00 8.--10. "PCKB,Peripheral Module Clock B (PCLKB) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." bitfld.long 0x00 4.--6. "PCKC,Peripheral Module Clock C (PCLKC) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." newline bitfld.long 0x00 0.--2. "PCKD,Peripheral Module Clock D (PCLKD) Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,?..." group.byte 0x24++0x00 line.byte 0x00 "SCKDIVCR2,System Clock Division Control Register 2" bitfld.byte 0x00 4.--6. "UCK,USB Clock (UCLK) Select" "?,?,2: 010,3: 011,4: 100,?..." group.byte 0x26++0x00 line.byte 0x00 "SCKSCR,System Clock Source Control Register" bitfld.byte 0x00 0.--2. "CKSEL,Clock Source Select" "0: HOCO,1: MOCO,2: LOCO,3: Main clock oscillator,4: Sub-clock oscillator,5: 101,?..." group.word 0x28++0x01 line.word 0x00 "PLLCCR,PLL Clock Control Register" bitfld.word 0x00 8.--13. "PLLMUL,PLL Frequency Multiplication Factor Select [PLL Frequency Multiplication Factor] = (PLLUMUL+1) / 2 Range" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,19: x10.0,20: x10.5,21: x11.0,?,?,?,?,?,?,28: x14.5,29: x15.0,30: x15.5,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,58: x29.5,59: x30.0,?..." bitfld.word 0x00 4. "PLSRCSEL,PLL Clock Source Select" "0: Main clock oscillator,1: HOCO" newline bitfld.word 0x00 0.--1. "PLIDIV,PLL Input Frequency Division Ratio Select" "0: 00,1: 01,2: 10,3: Setting prohibited" group.byte 0x2A++0x00 line.byte 0x00 "PLLCR,PLL Control Register" bitfld.byte 0x00 0. "PLLSTP,PLL Stop Control" "0: Operate the PLL,1: Stop the PLL" group.byte 0x30++0x00 line.byte 0x00 "BCKCR,External Bus Clock Control Register" bitfld.byte 0x00 0. "BCLKDIV,BCLK Pin Output Select" "0: BCLK,1: BCLK/2" group.byte 0x32++0x00 line.byte 0x00 "MOSCCR,Main Clock Oscillator Control Register" bitfld.byte 0x00 0. "MOSTP,Main Clock Oscillator Stop" "0: Main clock oscillator is operating,1: Main clock oscillator is stopped" group.byte 0x36++0x00 line.byte 0x00 "HOCOCR,High-Speed On-Chip Oscillator Control Register" bitfld.byte 0x00 0. "HCSTP,HOCO Stop" "0: Operate the HOCO clock,1: Stop the HOCO clock" group.byte 0x38++0x00 line.byte 0x00 "MOCOCR,Middle-Speed On-Chip Oscillator Control Register" bitfld.byte 0x00 0. "MCSTP,MOCO Stop" "0: Operate the MOCO clock,1: Stop the MOCO clock" group.byte 0x39++0x00 line.byte 0x00 "FLLCR1,FLL Control Register 1" bitfld.byte 0x00 0. "FLLEN,FLL Enable" "0: FLL function is disabled,1: FLL function is enabled" group.word 0x3A++0x01 line.word 0x00 "FLLCR2,FLL Control Register 2" hexmask.word 0x00 0.--10. 1. "FLLCNTL,FLL Multiplication ControlMultiplication ratio of the FLL reference clock select" rgroup.byte 0x3C++0x00 line.byte 0x00 "OSCSF,Oscillation Stabilization Flag Register" bitfld.byte 0x00 5. "PLLSF,PLL Clock Oscillation Stabilization Flag" "0: PLL clock is stopped or is not yet stable,1: PLL clock is stable so is available for use.." bitfld.byte 0x00 3. "MOSCSF,Main Clock Oscillation Stabilization Flag" "0: Main clock oscillator is stopped (MOSTP = 1)..,1: Main clock oscillator is stable so is.." newline bitfld.byte 0x00 0. "HOCOSF,HOCO Clock Oscillation Stabilization FlagNOTE: The HOCOSF bit value after a reset is 1 when the OFS1.HOCOEN bit is 0" "0: HOCO clock is stopped or is not yet stable,1: HOCO clock is stable so is available for use.." group.byte 0x3E++0x00 line.byte 0x00 "CKOCR,Clock Out Control Register" bitfld.byte 0x00 7. "CKOEN,Clock out enable" "0: Disable clock out,1: Enable clock out" bitfld.byte 0x00 4.--6. "CKODIV,Clock out input frequency Division Select" "0: 000,1: 001,2: 010,3: 011,4: 100,5: 101,6: 110,7: /128" newline bitfld.byte 0x00 0.--2. "CKOSEL,Clock out source select" "0: HOCO,1: MOCO,2: LOCO,3: MOSC,4: SOSC,?..." group.byte 0x3F++0x00 line.byte 0x00 "TRCKCR,Trace Clock Control Register" bitfld.byte 0x00 7. "TRCKEN,Trace Clock operating Enable" "0: Disable operation,1: Enable operation" bitfld.byte 0x00 0.--3. "TRCK,Trace Clock operating frequency select" "0: 0000,1: 0001,2: 0010,?..." group.byte 0x40++0x00 line.byte 0x00 "OSTDCR,Oscillation Stop Detection Control Register" bitfld.byte 0x00 7. "OSTDE,Oscillation Stop Detection Function Enable" "0: Disable oscillation stop detection function,1: Enable oscillation stop detection function" bitfld.byte 0x00 0. "OSTDIE,Oscillation Stop Detection Interrupt Enable" "0: Disable oscillation stop detection interrupt..,1: Enable oscillation stop detection interrupt.." group.byte 0x41++0x00 line.byte 0x00 "OSTDSR,Oscillation Stop Detection Status Register" bitfld.byte 0x00 0. "OSTDF,Oscillation Stop Detection Flag" "0: Main clock oscillation stop not detected,1: Main clock oscillation stop detected" group.byte 0x52++0x00 line.byte 0x00 "EBCKOCR,External Bus Clock Output Control Register" bitfld.byte 0x00 0. "EBCKOEN,BCLK Pin Output Control" "0: Disable EBCLK pin output (fixed high),1: Enable EBCLK pin output" group.byte 0x53++0x00 line.byte 0x00 "SDCKOCR,SDRAM Clock Output Control Register" bitfld.byte 0x00 0. "SDCKOEN,SDCLK Pin Output Control" "0: Disable SDCLK pin output (fixed high),1: Enable SDCLK pin output" group.byte 0x61++0x00 line.byte 0x00 "MOCOUTCR,MOCO User Trimming Control Register" abitfld.byte 0x00 0.--7. "MOCOUTRM,MOCO User Trimming" "0x00=0: Center Code,0x01=1: +1,0x7D=125: +125,0x7E=126: +126,0x7F=127: +127These bits,0x80=128: -128,0x81=129: -127,0x82=130: -126,0xFF=255: -1" group.byte 0x62++0x00 line.byte 0x00 "HOCOUTCR,HOCO User Trimming Control Register" abitfld.byte 0x00 0.--7. "HOCOUTRM,HOCO User Trimming" "0x00=0: Center Code,0x01=1: +1,0x7D=125: +125,0x7E=126: +126,0x7F=127: +127These bits,0x80=128: -128,0x81=129: -127,0x82=130: -126,0xFF=255: -1" group.byte 0x413++0x00 line.byte 0x00 "MOMCR,Main Clock Oscillator Mode Oscillation Control Register" bitfld.byte 0x00 7. "AUTODRVEN,Main Clock Oscillator Drive Capability Auto Switching Enable" "0: Disable,1: Enable" bitfld.byte 0x00 6. "MOSEL,Main Clock Oscillator Switching" "0: Resonator,1: External clock input" newline bitfld.byte 0x00 4.--5. "MODRV0,Main Clock Oscillator Drive Capability 0 Switching" "0: 20MHz to 24MHz,1: 16MHz to 20MHz,2: 8MHz to 16MHz,3: 8MHz" group.byte 0x480++0x00 line.byte 0x00 "SOSCCR,Sub-clock oscillator control register" bitfld.byte 0x00 0. "SOSTP,Sub-Clock Oscillator Stop" "0: Operate the sub-clock oscillator,1: Stop the sub-clock oscillator" group.byte 0x481++0x00 line.byte 0x00 "SOMCR,Sub Clock Oscillator Mode Control Register" bitfld.byte 0x00 1. "SODRV1,Sub Clock Oscillator Drive Capability Switching" "0: Standard,1: Middle" group.byte 0x490++0x00 line.byte 0x00 "LOCOCR,Low-Speed On-Chip Oscillator Control Register" bitfld.byte 0x00 0. "LCSTP,LOCO Stop" "0: Operate the LOCO clock,1: Stop the LOCO clock" group.byte 0x492++0x00 line.byte 0x00 "LOCOUTCR,LOCO User Trimming Control Register" abitfld.byte 0x00 0.--7. "LOCOUTRM,LOCO User Trimming" "0x00=0: Center Code,0x01=1: +1,0x7D=125: +125,0x7E=126: +126,0x7F=127: +127These bits,0x80=128: -128,0x81=129: -127,0x82=130: -126,0xFF=255: -1" group.byte 0xA2++0x00 line.byte 0x00 "MOSCWTCR,Main Clock Oscillator Wait Control Register" bitfld.byte 0x00 0.--3. "MSTS,Main clock oscillator wait time setting" "?,1: Wait time = 35 cycles (133.5 ?s),2: Wait time = 67 cycles (255.6 ?s),3: Wait time = 131 cycles (499.7 ?s),4: Wait time = 259 cycles (988.0 ?s),5: Wait time = 547 cycles (2086.6 ?s) (value..,6: Wait time = 1059 cycles (4039.8 ?s),7: Wait time = 2147 cycles (8190.2 ?s),8: Wait time = 4291 cycles (16368.9 ?s),9: Wait time = 8163 cycles (31139.4 ?s),?..." group.byte 0xA5++0x00 line.byte 0x00 "HOCOWTCR,High-speed on-chip oscillator wait control register" bitfld.byte 0x00 0.--2. "HSTS,HOCO wait time settingWaiting time (sec) = setting of the HSTS[2:0] bits/fLOCO(Trimmed) + 3/fLOC(Untrimmed)" "0,1,2,3,4,5,6,7" group.word 0x0C++0x01 line.word 0x00 "SBYCR,Standby Control Register" bitfld.word 0x00 15. "SSBY,Software Standby" "0: Sleep mode,1: Software Standby mode (DPSBYCR.DPSBY=0) /.." bitfld.word 0x00 14. "OPE,Output Port Enable" "0: In software standby mode or deep software..,1: In software standby mode or deep software.." group.long 0x1C++0x03 line.long 0x00 "MSTPCRA,Module Stop Control Register A" bitfld.long 0x00 22. "MSTPA22,DMA Controller/Data Transfer Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 7. "MSTPA7,Standny RAM Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 6. "MSTPA6,ECCRAM Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 5. "MSTPA5,High-Speed RAM Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x00 1. "MSTPA1,RAM1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x00 0. "MSTPA0,RAM0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" group.byte 0x92++0x00 line.byte 0x00 "SNZCR,Snooze Control Register" bitfld.byte 0x00 7. "SNZE,Snooze Mode Enable" "0: Disable Snooze Mode,1: Enable Snooze Mode" bitfld.byte 0x00 1. "SNZDTCEN,DTC Enable in Snooze Mode" "0: Disable DTC operation,1: Enable DTC operation" newline bitfld.byte 0x00 0. "RXDREQEN,RXD0 Snooze Request Enable NOTE: Do not set to 1 other than in asynchronous mode" "0: Ignore RXD0 falling edge in Standby mode,1: Accept RXD0 falling edge in Standby mode as a.." group.byte 0x94++0x00 line.byte 0x00 "SNZEDCR,Snooze End Control Register" bitfld.byte 0x00 7. "SCI0UMTED,SCI0 address unmatch Snooze End EnableNote: Do not set to 1 other than in asynchronous mode" "0: Disable the Snooze End request,1: Enable the Snooze End request" bitfld.byte 0x00 6. "AD1UMTED,AD compare mismatch 1 Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" newline bitfld.byte 0x00 5. "AD1MATED,AD compare match 1 Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" bitfld.byte 0x00 4. "AD0UMTED,AD compare mismatch 0 Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" newline bitfld.byte 0x00 3. "AD0MATED,AD compare match 0 Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" bitfld.byte 0x00 2. "DTCNZRED,Not Last DTC transmission completion Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" newline bitfld.byte 0x00 1. "DTCZRED,Last DTC transmission completion Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" bitfld.byte 0x00 0. "AGT1UNFED,AGT1 underflow Snooze End Enable" "0: Disable the Snooze End request,1: Enable the Snooze End request" group.long 0x98++0x03 line.long 0x00 "SNZREQCR,Snooze Request Control Register" bitfld.long 0x00 30. "SNZREQEN30,Snooze Request Enable 30Enable AGT1 compare match B snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 29. "SNZREQEN29,Snooze Request Enable 29Enable AGT1 compare match A snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 28. "SNZREQEN28,Snooze Request Enable 28Enable AGT1 underflow snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 25. "SNZREQEN25,Snooze Request Enable 25Enable RTC period snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 24. "SNZREQEN24,Snooze Request Enable 24Enable RTC alarm snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 22. "SNZREQEN22,Snooze Request Enable 22Enable Comparator-OC0 snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 17. "SNZREQEN17,Snooze Request Enable 17Enable KR snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 15. "SNZREQEN15,Snooze Request Enable 15Enable IRQ15 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 14. "SNZREQEN14,Snooze Request Enable 14Enable IRQ14 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 13. "SNZREQEN13,Snooze Request Enable 13Enable IRQ13 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 12. "SNZREQEN12,Snooze Request Enable 12Enable IRQ12 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 11. "SNZREQEN11,Snooze Request Enable 11Enable IRQ11 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 10. "SNZREQEN10,Snooze Request Enable 10Enable IRQ10 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 9. "SNZREQEN9,Snooze Request Enable 9Enable IRQ9 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 8. "SNZREQEN8,Snooze Request Enable 8Enable IRQ8 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 7. "SNZREQEN7,Snooze Request Enable 7Enable IRQ7 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 6. "SNZREQEN6,Snooze Request Enable 6Enable IRQ6 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 5. "SNZREQEN5,Snooze Request Enable 5Enable IRQ5 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 4. "SNZREQEN4,Snooze Request Enable 4Enable IRQ4 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 3. "SNZREQEN3,Snooze Request Enable 3Enable IRQ3 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 2. "SNZREQEN2,Snooze Request Enable 2Enable IRQ2 pin snooze request" "0: Disable snooze request,1: Enable snooze request" bitfld.long 0x00 1. "SNZREQEN1,Snooze Request Enable 1Enable IRQ1 pin snooze request" "0: Disable snooze request,1: Enable snooze request" newline bitfld.long 0x00 0. "SNZREQEN0,Snooze Request Enable 0Enable IRQ0 pin snooze request" "0: Disable snooze request,1: Enable snooze request" group.byte 0xA0++0x00 line.byte 0x00 "OPCCR,Operating Power Control Register" rbitfld.byte 0x00 4. "OPCMTSF,Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition" bitfld.byte 0x00 0.--1. "OPCM,Operating Power Control Mode Select" "0: High-speed mode,1: Prohibited,2: Prohibited,3: Low-speed mode" group.byte 0xAA++0x00 line.byte 0x00 "SOPCCR,Sub Operating Power Control Register" rbitfld.byte 0x00 4. "SOPCMTSF,Sub Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition" bitfld.byte 0x00 0. "SOPCM,Sub Operating Power Control Mode Select" "0: Other than Subosc-speed mode,1: Subosc-speed mode" group.byte 0x400++0x00 line.byte 0x00 "DPSBYCR,Deep Standby Control Register" bitfld.byte 0x00 7. "DPSBY,Deep Software Standby" "0: Sleep mode (SBYCR.SSBY=0) / Software Standby..,1: Sleep mode (SBYCR.SSBY=0) / Deep Software.." bitfld.byte 0x00 6. "IOKEEP,I/O Port Retention" "0: When the Deep Software Standby mode is..,1: When the Deep Software Standby mode is.." newline bitfld.byte 0x00 0.--1. "DEEPCUT,Power-Supply Control" "0: Power to the standby RAM Low-speed on-chip..,1: Power to the standby RAM Low-speed on-chip..,2: Setting prohibited,3: Power to the standby RAM Low-speed on-chip.." group.byte 0x402++0x00 line.byte 0x00 "DPSIER0,Deep Standby Interrupt Enable Register 0" bitfld.byte 0x00 7. "DIRQ7E,IRQ7-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 6. "DIRQ6E,IRQ6-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 5. "DIRQ5E,IRQ5-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 4. "DIRQ4E,IRQ4-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 3. "DIRQ3E,IRQ3-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 2. "DIRQ2E,IRQ2-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 1. "DIRQ1E,IRQ1-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 0. "DIRQ0E,IRQ0-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" group.byte 0x403++0x00 line.byte 0x00 "DPSIER1,Deep Standby Interrupt Enable Register 1" bitfld.byte 0x00 6. "DIRQ14E,IRQ14-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 5. "DIRQ13E,IRQ13-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 4. "DIRQ12E,IRQ12-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 3. "DIRQ11E,IRQ11-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 2. "DIRQ10E,IRQ10-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 1. "DIRQ9E,IRQ9-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 0. "DIRQ8E,IRQ8-DS Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" group.byte 0x404++0x00 line.byte 0x00 "DPSIER2,Deep Standby Interrupt Enable Register 2" bitfld.byte 0x00 4. "DNMIE,NMI Pin Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 3. "DRTCAIE,RTC Alarm interrupt Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 2. "DTRTCIIE,RTC Interval interrupt Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 1. "DLVD2IE,LVD2 Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 0. "DLVD1IE,LVD1 Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" group.byte 0x405++0x00 line.byte 0x00 "DPSIER3,Deep Standby Interrupt Enable Register 3" bitfld.byte 0x00 2. "DAGT1IE,AGT1 Underflow Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" bitfld.byte 0x00 1. "DUSBHSIE,USBHS Suspend/Resume Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" newline bitfld.byte 0x00 0. "DUSBFSIE,USBFS Suspend/Resume Deep Standby Cancel Signal Enable" "0: Canceling deep software standby mode is..,1: Canceling deep software standby mode is enabled" group.byte 0x406++0x00 line.byte 0x00 "DPSIFR0,Deep Standby Interrupt Flag Register 0" bitfld.byte 0x00 7. "DIRQ7F,IRQ7-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 6. "DIRQ6F,IRQ6-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 5. "DIRQ5F,IRQ5-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 4. "DIRQ4F,IRQ4-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 3. "DIRQ3F,IRQ3-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 2. "DIRQ2F,IRQ2-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 1. "DIRQ1F,IRQ1-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 0. "DIRQ0F,IRQ0-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0x407++0x00 line.byte 0x00 "DPSIFR1,Deep Standby Interrupt Flag Register 1" bitfld.byte 0x00 6. "DIRQ14F,IRQ14-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 5. "DIRQ13F,IRQ13-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 4. "DIRQ12F,IRQ12-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 3. "DIRQ11F,IRQ11-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 2. "DIRQ10F,IRQ10-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 1. "DIRQ9F,IRQ9-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 0. "DIRQ8F,IRQ8-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0x408++0x00 line.byte 0x00 "DPSIFR2,Deep Standby Interrupt Flag Register 2" bitfld.byte 0x00 4. "DNMIF,NMI Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 3. "DRTCAIF,RTC Alarm interrupt Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 2. "DTRTCIIF,RTC Interval interrupt Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 1. "DLVD2IF,LVD2 Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 0. "DLVD1IF,LVD1 Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0x409++0x00 line.byte 0x00 "DPSIFR3,Deep Standby Interrupt Flag Register 3" bitfld.byte 0x00 2. "DAGT1IF,AGT1 Underflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x00 1. "DUSBHSIF,USBHS Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x00 0. "DUSBFSIF,USBFS Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0x40A++0x00 line.byte 0x00 "DPSIEGR0,Deep Standby Interrupt Edge Register 0" bitfld.byte 0x00 7. "DIRQ7EG,IRQ7-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 6. "DIRQ6EG,IRQ6-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x00 5. "DIRQ5EG,IRQ5-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 4. "DIRQ4EG,IRQ4-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x00 3. "DIRQ3EG,IRQ3-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 2. "DIRQ2EG,IRQ2-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x00 1. "DIRQ1EG,IRQ1-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 0. "DIRQ0EG,IRQ0-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" group.byte 0x40B++0x00 line.byte 0x00 "DPSIEGR1,Deep Standby Interrupt Edge Register 1" bitfld.byte 0x00 6. "DIRQ14EG,IRQ14-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 5. "DIRQ13EG,IRQ13-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x00 4. "DIRQ12EG,IRQ12-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 3. "DIRQ11EG,IRQ11-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x00 2. "DIRQ10EG,IRQ10-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 1. "DIRQ9EG,IRQ9-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x00 0. "DIRQ8EG,IRQ8-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" group.byte 0x40C++0x00 line.byte 0x00 "DPSIEGR2,Deep Standby Interrupt Edge Register 2" bitfld.byte 0x00 4. "DNMIEG,NMI Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x00 1. "DLVD2IEG,LVD2 Edge Select" "0: A cancel request is generated when VCC=Vdet2.." newline bitfld.byte 0x00 0. "DLVD1IEG,LVD1 Edge Select" "0: A cancel request is generated when VCC=Vdet1.." group.byte 0x40E++0x00 line.byte 0x00 "SYOCDCR,System Control OCD Control Register" bitfld.byte 0x00 7. "DBGEN,Debugger Enable bit" "0: On-chip debugger is disabled,1: On-chip debugger is enabled" bitfld.byte 0x00 0. "DOCDF,Deep Standby OCD flag" "0: On-chip debugger is disabled,1: On-chip debugger is enabled" group.byte 0x40F++0x00 line.byte 0x00 "STCONR,Standby Condition Register" bitfld.byte 0x00 0.--1. "STCON,SSTBY condition bit" "0: set this value in case of transferring to..,?,?,3: set this value in case of transferring to.." group.byte 0xE0++0x00 line.byte 0x00 "LVD1CR1,Voltage Monitor" bitfld.byte 0x00 2. "IRQSEL,Voltage Monitor Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt" bitfld.byte 0x00 0.--1. "IDTSEL,Voltage Monitor Interrupt Generation Condition Select" "0: Generate when VCC>=Vdet (rise) is detected,1: Generate when VCC=Vdet (rise) is detected,1: Generate when VCC= Vdet or MON bit is disabled" bitfld.byte 0x00 0. "DET,Voltage Monitor Voltage Change Detection Flag NOTE: Only 0 can be written to this bit" "0: Not detected,1: Vdet1 passage detection" group.byte 0xE3++0x00 line.byte 0x00 "LVD2SR,Voltage Monitor" rbitfld.byte 0x00 1. "MON,Voltage Monitor 1 Signal Monitor Flag" "0: VCC < Vdet,1: VCC >= Vdet or MON bit is disabled" bitfld.byte 0x00 0. "DET,Voltage Monitor Voltage Change Detection Flag NOTE: Only 0 can be written to this bit" "0: Not detected,1: Vdet1 passage detection" group.byte 0x417++0x00 line.byte 0x00 "LVCMPCR,Voltage Monitor Circuit Control Register" bitfld.byte 0x00 6. "LVD2E,Voltage Detection 2 Enable" "0: Voltage detection 2 circuit disabled,1: Voltage detection 2 circuit enabled" bitfld.byte 0x00 5. "LVD1E,Voltage Detection 1 Enable" "0: Voltage detection 1 circuit disabled,1: Voltage detection 1 circuit enabled" group.byte 0x418++0x00 line.byte 0x00 "LVDLVLR,Voltage Detection Level Select Register" bitfld.byte 0x00 5.--7. "LVD2LVL,Voltage Detection 2 Level Select (Standard voltage during fall in voltage)" "?,?,?,?,?,5: 2.99V (Vdet2_1),6: 2.92V (Vdet2_2),7: 2.85V (Vdet2_3)" bitfld.byte 0x00 0.--4. "LVD1LVL,Voltage Detection 1 Level Select (Standard voltage during fall in voltage)" "?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,17: 2.99V (Vdet1_1),18: 2.92V (Vdet1_2),19: 2.85V (Vdet1_3),?..." group.byte 0x41A++0x00 line.byte 0x00 "LVD1CR0,Voltage Monitor" bitfld.byte 0x00 7. "RN,Voltage Monitor Reset Negate Select" "0: Negation follows a stabilization time (tLVD)..,1: Negation follows a stabilization time (tLVD).." bitfld.byte 0x00 6. "RI,Voltage Monitor Circuit Mode Select" "0: Voltage Monitor interrupt during Vdet1 passage,1: Voltage Monitor reset enabled when the.." newline bitfld.byte 0x00 4.--5. "FSAMP,Sampling Clock Select" "0: 1/2 LOCO frequency,1: 1/4 LOCO frequency,2: 1/8 LOCO frequency,3: 1/16 LOCO frequency" bitfld.byte 0x00 2. "CMPE,Voltage Monitor Circuit Comparison Result Output Enable" "0: Disable voltage monitor 1 circuit comparison..,1: Enable voltage monitor 1 circuit comparison.." newline bitfld.byte 0x00 1. "DFDIS,Voltage Monitor Digital Filter Disable Mode Select" "0: Enable digital filter,1: Disable digital filter" bitfld.byte 0x00 0. "RIE,Voltage Monitor Interrupt/Reset Enable" "0: Disable,1: Enable" group.byte 0x41B++0x00 line.byte 0x00 "LVD2CR0,Voltage Monitor" bitfld.byte 0x00 7. "RN,Voltage Monitor Reset Negate Select" "0: Negation follows a stabilization time (tLVD)..,1: Negation follows a stabilization time (tLVD).." bitfld.byte 0x00 6. "RI,Voltage Monitor Circuit Mode Select" "0: Voltage Monitor interrupt during Vdet1 passage,1: Voltage Monitor reset enabled when the.." newline bitfld.byte 0x00 4.--5. "FSAMP,Sampling Clock Select" "0: 1/2 LOCO frequency,1: 1/4 LOCO frequency,2: 1/8 LOCO frequency,3: 1/16 LOCO frequency" bitfld.byte 0x00 2. "CMPE,Voltage Monitor Circuit Comparison Result Output Enable" "0: Disable voltage monitor 1 circuit comparison..,1: Enable voltage monitor 1 circuit comparison.." newline bitfld.byte 0x00 1. "DFDIS,Voltage Monitor Digital Filter Disable Mode Select" "0: Enable digital filter,1: Disable digital filter" bitfld.byte 0x00 0. "RIE,Voltage Monitor Interrupt/Reset Enable" "0: Disable,1: Enable" group.byte 0x4BB++0x00 line.byte 0x00 "VBTICTLR,VBATT Input Control Register" bitfld.byte 0x00 2. "VCH2INEN,RTCIC2 Input Enable" "0: Disabled,1: Enabled" bitfld.byte 0x00 1. "VCH1INEN,RTCIC1 Input Enable" "0: Disabled,1: Enabled" newline bitfld.byte 0x00 0. "VCH0INEN,RTCIC0 Input Enable" "0: Disabled,1: Enabled" repeat 512. (increment 0 1) (increment 0 0x01) group.byte ($2+0x500)++0x00 line.byte 0x00 "VBTBKR[$1],VBATT Backup Register $1" hexmask.byte 0x00 0.--7. 1. "VBTBKR,VBTBKR is a 512-byte readable/writable register to store data powered by VBATT.The value of this register is retained even when VCC is not powered but VBATT is powered.VBTBKR is initialized by VBATT selected voltage power-on-reset" repeat.end group.word 0x3FE++0x01 line.word 0x00 "PRCR,Protect Register" hexmask.word.byte 0x00 8.--15. 1. "PRKEY,PRKEY Key Code" bitfld.word 0x00 3. "PRC3,Enables writing to the registers related to the LVD" "0: Writes protected,1: Writes not protected" newline bitfld.word 0x00 1. "PRC1,Enables writing to the registers related to the operating modes the low power consumption modes and the battery backup function" "0: Writes protected,1: Writes not protected" bitfld.word 0x00 0. "PRC0,Enables writing to the registers related to the clock generation circuit" "0: Writes protected,1: Writes not protected" group.byte 0x410++0x00 line.byte 0x00 "RSTSR0,Reset Status Register 0" bitfld.byte 0x00 7. "DPSRSTF,Deep Software Standby Reset FlagNOTE: Writable only to clear the flag" "0: Deep software standby mode cancelation not..,1: Deep software standby mode cancelation.." bitfld.byte 0x00 3. "LVD2RF,Voltage Monitor 2 Reset Detect FlagNOTE: Writable only to clear the flag" "0: Voltage Monitor 2 reset not detected,1: Voltage Monitor 2 reset detected" newline bitfld.byte 0x00 2. "LVD1RF,Voltage Monitor 1 Reset Detect FlagNOTE: Writable only to clear the flag" "0: Voltage Monitor 1 reset not detected,1: Voltage Monitor 1 reset detected" bitfld.byte 0x00 1. "LVD0RF,Voltage Monitor 0 Reset Detect FlagNOTE: Writable only to clear the flag" "0: Voltage Monitor 0 reset not detected,1: Voltage Monitor 0 reset detected" newline bitfld.byte 0x00 0. "PORF,Power-On Reset Detect FlagNOTE: Writable only to clear the flag" "0: Power-on reset not detected,1: Power-on reset detected" group.byte 0x411++0x00 line.byte 0x00 "RSTSR2,Reset Status Register 2" bitfld.byte 0x00 0. "CWSF,Cold/Warm Start Determination Flag" "0: Cold start,1: Warm start" group.word 0xC0++0x01 line.word 0x00 "RSTSR1,Reset Status Register 1" bitfld.word 0x00 12. "SPERF,SP Error Reset Detect FlagNOTE: Writable only to clear the flag" "0: SP error reset not detected,1: SP error reset detected" bitfld.word 0x00 11. "BUSMRF,Bus Master MPU Reset Detect FlagNOTE: Writable only to clear the flag" "0: Bus Master MPU reset not detected,1: Bus Master MPU reset detected" newline bitfld.word 0x00 10. "BUSSRF,Bus Slave MPU Reset Detect FlagNOTE: Writable only to clear the flag" "0: Bus Slave MPU reset not detected,1: Bus Slave MPU reset detected" bitfld.word 0x00 9. "REERF,RAM ECC Error Reset Detect FlagNOTE: Writable only to clear the flag" "0: RAM ECC error reset not detected,1: RAM ECC error reset detected" newline bitfld.word 0x00 8. "RPERF,RAM Parity Error Reset Detect FlagNOTE: Writable only to clear the flag" "0: RAM parity error reset not detected,1: RAM parity error reset detected" bitfld.word 0x00 2. "SWRF,Software Reset Detect FlagNOTE: Writable only to clear the flag" "0: Software reset not detected,1: Software reset detected" newline bitfld.word 0x00 1. "WDTRF,Watchdog Timer Reset Detect FlagNOTE: Writable only to clear the flag" "0: Watchdog timer reset not detected,1: Watchdog timer reset detected" bitfld.word 0x00 0. "IWDTRF,Independent Watchdog Timer Reset Detect FlagNOTE: Writable only to clear the flag" "0: Independent watchdog timer reset not detected,1: Independent watchdog timer reset detected" group.byte 0x416++0x00 line.byte 0x00 "FWEPROR,Flash P/E Protect Register" bitfld.byte 0x00 0.--1. "FLWE,Flash Programming and Erasure" "0: Prohibits programming and erasure of the code..,1: Permits programming and erasure of the code..,2: Prohibits programming and erasure of the code..,3: Prohibits programming and erasure of the code.." tree.end tree "TSN (Temperature Sensor)" base ad:0x4005D000 group.byte 0x00++0x00 line.byte 0x00 "TSCR,Temperature Sensor Control Register" bitfld.byte 0x00 7. "TSEN,Temperature Sensor Output Enable" "0: Stops the temperature sensor,1: Starts the temperature sensor" bitfld.byte 0x00 4. "TSOE,Temperature Sensor Enable" "0: Disables output from the temperature sensor..,1: Enables output from the temperature sensor to.." tree.end tree "USBFS (USB 2.0 FS Module)" base ad:0x40090000 group.word 0x00++0x01 line.word 0x00 "SYSCFG,System Configuration Control Register" bitfld.word 0x00 10. "SCKE,USB Clock Enable" "0: Stops supplying the clock signal to the USB,1: Enables supplying the clock signal to the USB" bitfld.word 0x00 6. "DCFM,Controller Function Select" "0: Function controller is selected,1: Host controller is selected" newline bitfld.word 0x00 5. "DRPD,D+/D- Line Resistor Control" "0: Pulling down the lines is disabled,1: Pulling down the lines is enabled" bitfld.word 0x00 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled,1: Pulling up the line is enabled" newline bitfld.word 0x00 0. "USBE,USB Operation Enable" "0: USB operation is disabled,1: USB operation is enabled" rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 14.--15. "OVCMON,External USB0_OVRCURA/ USB0_OVRCURB Input Pin MonitorThe OCVMON[1] bit indicates the status of the USBHS_OVRCURA pin" "0,1,2,3" bitfld.word 0x00 6. "HTACT,USB Host Sequencer Status Monitor" "0: Host sequencer of the USB is completely stopped,1: Host sequencer of the USB is not completely.." newline bitfld.word 0x00 5. "SOFEA,Active Monitor When the Host Controller is Selected" "0: SOF output is stopped,1: SOF output is operating" bitfld.word 0x00 2. "IDMON,External ID0 Input Pin Monitor" "0: USB0_ID pin is low,1: USB0_ID pin is high" newline bitfld.word 0x00 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0,1: J-State,2: K-State,3: SE1" group.word 0x08++0x01 line.word 0x00 "DVSTCTR0,Device State Control Register 0" bitfld.word 0x00 11. "HNPBTOA,Host Negotiation Protocol (HNP) Control This bit is used when switching from device B to device A while in OTG mode" "0: Normal Operation,1: Switching from device B to device A is enabled" bitfld.word 0x00 10. "EXICEN,USB0_EXICEN Output Pin Control" "0: External USB0_EXICEN pin outputs low,1: External USB0_EXICEN pin outputs high" newline bitfld.word 0x00 9. "VBUSEN,USB0_VBUSEN Output Pin Control" "0: External USB0_VBUSEN pin outputs low,1: External USB0_VBUSEN pin outputs high" bitfld.word 0x00 8. "WKUP,Wakeup Output" "0: Remote wakeup signal is not output,1: Remote wakeup signal is output" newline bitfld.word 0x00 7. "RWUPE,Wakeup Detection Enable" "0: Downstream port wakeup is disabled,1: Downstream port wakeup is enabled" bitfld.word 0x00 6. "USBRST,USB Bus Reset Output" "0: USB bus reset signal is not output,1: USB bus reset signal is output" newline bitfld.word 0x00 5. "RESUME,Resume Output" "0: Resume signal is not output,1: Resume signal is output" bitfld.word 0x00 4. "UACT,USB Bus Enable" "0: Downstream port is disabled (SOF transmission..,1: Downstream port is enabled (SOF transmission.." newline rbitfld.word 0x00 0.--2. "RHST,USB Bus Reset Status" "0: Communication speed not determined,1: Low-speed connection(When the host controller..,2: Full-speed connection(When the host..,3: Setting prohibited,?..." group.word 0x14++0x01 line.word 0x00 "CFIFO,CFIFO Port Register" hexmask.word 0x00 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits" group.byte 0x14++0x00 line.byte 0x00 "CFIFOL,CFIFO Port Register L" group.word 0x18++0x01 line.word 0x00 "D0FIFO,D0FIFO Port Register" hexmask.word 0x00 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits" group.byte 0x18++0x00 line.byte 0x00 "D0FIFOL,D0FIFO Port Register L" group.word 0x1C++0x01 line.word 0x00 "D1FIFO,D1FIFO Port Register" hexmask.word 0x00 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits" group.byte 0x1C++0x00 line.byte 0x00 "D1FIFOL,D1FIFO Port Register L" group.word 0x20++0x01 line.word 0x00 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time.." rbitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x00 10. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" bitfld.word 0x00 8. "BIGEND,CFIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x00 5. "ISEL,CFIFO Port Access Direction When DCP is Selected" "0: Reading from the buffer memory is selected,1: Writing to the buffer memory is selected" bitfld.word 0x00 0.--3. "CURPIPE,CFIFO Port Access Pipe Specification" "0: DCP (Default control pipe),1: Pipe 1,2: Pipe 2,3: Pipe 3,4: Pipe 4,5: Pipe 5,6: Pipe 6,7: Pipe 7,8: Pipe 8,9: Pipe 9,?..." group.word 0x22++0x01 line.word 0x00 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x00 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled,1: FIFO port access is enabled" hexmask.word 0x00 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data" group.word 0x28++0x01 line.word 0x00 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time.." rbitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x00 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x00 12. "DREQE,DMA/DTC Transfer Request Enable" "0: DMA/DTC transfer request is disabled,1: DMA/DTC transfer request is enabled" newline bitfld.word 0x00 10. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" bitfld.word 0x00 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x00 0.--3. "CURPIPE,FIFO Port Access Pipe Specification" "0: DCP (Default control pipe),1: Pipe 1,2: Pipe 2,3: Pipe 3,4: Pipe 4,5: Pipe 5,6: Pipe 6,7: Pipe 7,8: Pipe 8,9: Pipe 9,?..." group.word 0x2A++0x01 line.word 0x00 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x00 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled,1: FIFO port access is enabled" hexmask.word 0x00 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data" group.word 0x2C++0x01 line.word 0x00 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time.." rbitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x00 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x00 12. "DREQE,DMA/DTC Transfer Request Enable" "0: DMA/DTC transfer request is disabled,1: DMA/DTC transfer request is enabled" newline bitfld.word 0x00 10. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" bitfld.word 0x00 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x00 0.--3. "CURPIPE,FIFO Port Access Pipe Specification" "0: DCP (Default control pipe),1: Pipe 1,2: Pipe 2,3: Pipe 3,4: Pipe 4,5: Pipe 5,6: Pipe 6,7: Pipe 7,8: Pipe 8,9: Pipe 9,?..." group.word 0x2E++0x01 line.word 0x00 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x00 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled,1: FIFO port access is enabled" hexmask.word 0x00 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data" group.word 0x30++0x01 line.word 0x00 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x00 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x32++0x01 line.word 0x00 "INTENB1,Interrupt Enable Register 1" bitfld.word 0x00 15. "OVRCRE,Overcurrent Input Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 14. "BCHGE,USB Bus Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 12. "DTCHE,Disconnection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 11. "ATTCHE,Connection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 6. "EOFERRE,EOF Error Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 5. "SIGNE,Setup Transaction Error Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 4. "SACKE,Setup Transaction Normal Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x36++0x01 line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register" bitfld.word 0x00 9. "PIPE9BRDYE,BRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 8. "PIPE8BRDYE,BRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 7. "PIPE7BRDYE,BRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 6. "PIPE6BRDYE,BRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 5. "PIPE5BRDYE,BRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 4. "PIPE4BRDYE,BRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 3. "PIPE3BRDYE,BRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 2. "PIPE2BRDYE,BRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 1. "PIPE1BRDYE,BRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 0. "PIPE0BRDYE,BRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x38++0x01 line.word 0x00 "NRDYENB,NRDY Interrupt Enable Register" bitfld.word 0x00 9. "PIPE9NRDYE,NRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 8. "PIPE8NRDYE,NRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 7. "PIPE7NRDYE,NRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 6. "PIPE6NRDYE,NRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 5. "PIPE5NRDYE,NRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 4. "PIPE4NRDYE,NRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 3. "PIPE3NRDYE,NRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 2. "PIPE2NRDYE,NRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 1. "PIPE1NRDYE,NRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 0. "PIPE0NRDYE,NRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x3A++0x01 line.word 0x00 "BEMPENB,BEMP Interrupt Enable Register" bitfld.word 0x00 9. "PIPE9BEMPE,BEMP Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 8. "PIPE8BEMPE,BEMP Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 7. "PIPE7BEMPE,BEMP Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 6. "PIPE6BEMPE,BEMP Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 5. "PIPE5BEMPE,BEMP Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 4. "PIPE4BEMPE,BEMP Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 3. "PIPE3BEMPE,BEMP Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 2. "PIPE2BEMPE,BEMP Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 1. "PIPE1BEMPE,BEMP Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 0. "PIPE0BEMPE,BEMP Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x3C++0x01 line.word 0x00 "SOFCFG,SOF Output Configuration Register" bitfld.word 0x00 8. "TRNENSEL,Transaction-Enabled Time Select" "0: For non-low-speed communication,1: For low-speed communication" bitfld.word 0x00 6. "BRDYM,BRDY Interrupt Status Clear Timing" "0: Software clears the status,1: The USB clears the status when data has been.." newline rbitfld.word 0x00 4. "EDGESTS,Edge Interrupt Output Status Monitor" "0: before stopping the clock supply to the USB..,1: the edge interrupt output signal is in the.." group.word 0x40++0x01 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupts are not generated,1: VBUS interrupts are generated" bitfld.word 0x00 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated,1: Resume interrupts are generated" newline bitfld.word 0x00 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated,1: SOF interrupts are generated" bitfld.word 0x00 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are.." newline bitfld.word 0x00 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts..,1: Control transfer stage transition interrupts.." rbitfld.word 0x00 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated,1: BEMP interrupts are generated" newline rbitfld.word 0x00 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated,1: NRDY interrupts are generated" rbitfld.word 0x00 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated,1: BRDY interrupts are generated" newline rbitfld.word 0x00 7. "VBSTS,VBUS Input Status" "0: USB0_VBUS pin is low,1: USB0_VBUS pin is high" rbitfld.word 0x00 4.--6. "DVSQ,Device State" "0: Powered state,1: Default state,2: Address state,3: Configured state,?..." newline bitfld.word 0x00 3. "VALID,USB Request Reception" "0: Setup packet is not received,1: Setup packet is received" rbitfld.word 0x00 0.--2. "CTSQ,Control Transfer Stage" "0: Idle or setup stage,1: Control read data stage,2: Control read status stage,3: Control write data stage,4: Control write status stage,5: Control write (no data) status stage,6: Control transfer sequence error,?..." group.word 0x42++0x01 line.word 0x00 "INTSTS1,Interrupt Status Register 1" bitfld.word 0x00 15. "OVRCR,Overcurrent Input Change Interrupt Status" "0: OVRCR interrupts are not generated,1: OVRCR interrupts are generated" bitfld.word 0x00 14. "BCHG,USB Bus Change Interrupt Status" "0: BCHG interrupts are not generated,1: BCHG interrupts are generated" newline bitfld.word 0x00 12. "DTCH,USB Disconnection Detection Interrupt Status" "0: DTCH interrupts are not generated,1: DTCH interrupts are generated" bitfld.word 0x00 11. "ATTCH,ATTCH Interrupt Status" "0: ATTCH interrupts are not generated,1: ATTCH interrupts are generated" newline bitfld.word 0x00 6. "EOFERR,EOF Error Detection Interrupt Status" "0: EOFERR interrupts are not generated,1: EOFERR interrupts are generated" bitfld.word 0x00 5. "SIGN,Setup Transaction Error Interrupt Status" "0: SIGN interrupts are not generated,1: SIGN interrupts are generated" newline bitfld.word 0x00 4. "SACK,Setup Transaction Normal Response Interrupt Status" "0: SACK interrupts are not generated,1: SACK interrupts are generated" group.word 0x46++0x01 line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register" bitfld.word 0x00 9. "PIPE9BRDY,BRDY Interrupt Status for PIPE9" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 8. "PIPE8BRDY,BRDY Interrupt Status for PIPE8" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 7. "PIPE7BRDY,BRDY Interrupt Status for PIPE7" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 6. "PIPE6BRDY,BRDY Interrupt Status for PIPE6" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 5. "PIPE5BRDY,BRDY Interrupt Status for PIPE5" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 4. "PIPE4BRDY,BRDY Interrupt Status for PIPE4" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 3. "PIPE3BRDY,BRDY Interrupt Status for PIPE3" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 2. "PIPE2BRDY,BRDY Interrupt Status for PIPE2" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 1. "PIPE1BRDY,BRDY Interrupt Status for PIPE1" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 0. "PIPE0BRDY,BRDY Interrupt Status for PIPE0" "0: Interrupts are not generated,1: Interrupts are generated" group.word 0x48++0x01 line.word 0x00 "NRDYSTS,NRDY Interrupt Status Register" bitfld.word 0x00 9. "PIPE9NRDY,NRDY Interrupt Status for PIPE9" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 8. "PIPE8NRDY,NRDY Interrupt Status for PIPE8" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 7. "PIPE7NRDY,NRDY Interrupt Status for PIPE7" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 6. "PIPE6NRDY,NRDY Interrupt Status for PIPE6" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 5. "PIPE5NRDY,NRDY Interrupt Status for PIPE5" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 4. "PIPE4NRDY,NRDY Interrupt Status for PIPE4" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 3. "PIPE3NRDY,NRDY Interrupt Status for PIPE3" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 2. "PIPE2NRDY,NRDY Interrupt Status for PIPE2" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 1. "PIPE1NRDY,NRDY Interrupt Status for PIPE1" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 0. "PIPE0NRDY,NRDY Interrupt Status for PIPE0" "0: Interrupts are not generated,1: Interrupts are generated" group.word 0x4A++0x01 line.word 0x00 "BEMPSTS,BEMP Interrupt Status Register" bitfld.word 0x00 9. "PIPE9BEMP,BEMP Interrupt Status for PIPE9" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 8. "PIPE8BEMP,BEMP Interrupt Status for PIPE8" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 7. "PIPE7BEMP,BEMP Interrupt Status for PIPE7" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 6. "PIPE6BEMP,BEMP Interrupt Status for PIPE6" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 5. "PIPE5BEMP,BEMP Interrupt Status for PIPE5" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 4. "PIPE4BEMP,BEMP Interrupt Status for PIPE4" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 3. "PIPE3BEMP,BEMP Interrupt Status for PIPE3" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 2. "PIPE2BEMP,BEMP Interrupt Status for PIPE2" "0: Interrupts are not generated,1: Interrupts are generated" newline bitfld.word 0x00 1. "PIPE1BEMP,BEMP Interrupt Status for PIPE1" "0: Interrupts are not generated,1: Interrupts are generated" bitfld.word 0x00 0. "PIPE0BEMP,BEMP Interrupt Status for PIPE0" "0: Interrupts are not generated,1: Interrupts are generated" group.word 0x4C++0x01 line.word 0x00 "FRMNUM,Frame Number Register" bitfld.word 0x00 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred" bitfld.word 0x00 14. "CRCE,Receive Data Error" "0: No error,1: An error occurred" newline hexmask.word 0x00 0.--10. 1. "FRNM,Frame NumberLatest frame number" group.word 0x4E++0x01 line.word 0x00 "DVCHGR,Device State Change Register" bitfld.word 0x00 15. "DVCHG,Device State Change" "0: Disables the writing to the..,1: Enables the writing to the.." group.word 0x50++0x01 line.word 0x00 "USBADDR,USB Address Register" bitfld.word 0x00 8.--11. "STSRECOV,Status Recovery" "?,?,?,?,4: Return to the low-speed state (bits..,?,?,?,8: Return to the full-speed state (bits..,9: Return to the full-speed state (bits..,10: Return to the full-speed state (bits..,11: Return to the full-speed state (bits..,?..." hexmask.word.byte 0x00 0.--6. 1. "USBADDR,USB AddressWhen the function controller is selected these bits indicate the USB address assigned by the host when the SET_ADDRESS request is successfully processed" group.word 0x54++0x01 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.byte 0x00 8.--15. 1. "BREQUEST,RequestThese bits store the USB request bRequest value" hexmask.word.byte 0x00 0.--7. 1. "BMREQUESTTYPE,Request TypeThese bits store the USB request bmRequestType value" group.word 0x56++0x01 line.word 0x00 "USBVAL,USB Request Value Register" hexmask.word 0x00 0.--15. 1. "WVALUE,ValueThese bits store the USB request wValue value" group.word 0x58++0x01 line.word 0x00 "USBINDX,USB Request Index Register" hexmask.word 0x00 0.--15. 1. "WINDEX,IndexThese bits store the USB request wIndex value" group.word 0x5A++0x01 line.word 0x00 "USBLENG,USB Request Length Register" hexmask.word 0x00 0.--15. 1. "WLENGTH,LengthThese bits store the USB request wLength value" group.word 0x5C++0x01 line.word 0x00 "DCPCFG,DCP Configuration Register" bitfld.word 0x00 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe continued at the end of transfer,1: Pipe disabled at the end of transfer" bitfld.word 0x00 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction" group.word 0x5E++0x01 line.word 0x00 "DCPMAXP,DCP Maximum Packet Size Register" bitfld.word 0x00 12.--15. "DEVSEL,Device Select" "0: Address 0000,1: Address 0001,2: Address 0010,3: Address 0011,4: Address 0100,5: Address 0101,?..." hexmask.word.byte 0x00 0.--6. 1. "MXPS,Maximum Packet SizeThese bits set the maximum amount of data (maximum packet size) in payloads for the DCP" group.word 0x60++0x01 line.word 0x00 "DCPCTR,DCP Control Register" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access is disabled,1: Buffer access is enabled" bitfld.word 0x00 14. "SUREQ,Setup Token Transmission" "0: Invalid,1: Transmits the setup packet" newline bitfld.word 0x00 11. "SUREQCLR,SUREQ Bit Clear" "0: Invalid,1: Clears the SUREQ bit to 0" bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0" newline bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1" rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1" newline rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: DCP is not used for the transaction,1: DCP is used for the transaction" bitfld.word 0x00 2. "CCPL,Control Transfer End Enable" "0: Invalid,1: Completion of control transfer is enabled" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" group.word 0x64++0x01 line.word 0x00 "PIPESEL,Pipe Window Select Register" bitfld.word 0x00 0.--3. "PIPESEL,Pipe Window Select" "0: No pipe selected,1: PIPE1,2: PIPE2,3: PIPE3,4: PIPE4,5: PIPE5,6: PIPE6,7: PIPE7,8: PIPE8,9: PIPE9,?..." group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer(PIPE1 and PIPE5) /Setting..,2: Setting prohibited(PIPE1 and PIPE5)..,3: Isochronous transfer(PIPE1 and PIPE2).." bitfld.word 0x00 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving..,1: BRDY interrupt upon completion of reading data" newline bitfld.word 0x00 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer" bitfld.word 0x00 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe assignment continued at the end of..,1: Pipe assignment disabled at the end of transfer" newline bitfld.word 0x00 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction" bitfld.word 0x00 0.--3. "EPNUM,Endpoint NumberThese bits specify the endpoint number for the selected pipe.Setting 0000b means unused pipe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word 0x6C++0x01 line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register" bitfld.word 0x00 12.--15. "DEVSEL,Device Select" "0: Address 0000,1: Address 0001,2: Address 0010,3: Address 0011,4: Address 0100,5: Address 0101,?..." hexmask.word 0x00 0.--8. 1. "MXPS,Maximum Packet SizePIPE1 and PIPE2: 1 byte (001h) to 256 bytes (100h)PIPE3 to PIPE5: 8 bytes (008h) 16 bytes (010h) 32 bytes (020h) 64 bytes (040h) (Bits [8:7] and [2:0] are not provided.)PIPE6 to PIPE9: 1 byte (001h) to 64 bytes (040h) (Bits [8:7].." group.word 0x6E++0x01 line.word 0x00 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x00 12. "IFIS,Isochronous IN Buffer Flush" "0: The buffer is not flushed,1: The buffer is flushed" bitfld.word 0x00 0.--2. "IITV,Interval Error Detection IntervalSpecifies the interval error detection timing for the selected pipe in terms of frames which is expressed as nth power of 2" "0,1,2,3,4,5,6,7" group.word 0x70++0x01 line.word 0x00 "PIPECTR,Pipe" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled" bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" group.word 0x72++0x01 line.word 0x00 "PIPE1CTR,Pipe" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled" bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" group.word 0x74++0x01 line.word 0x00 "PIPE2CTR,Pipe" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled" bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" group.word 0x76++0x01 line.word 0x00 "PIPE3CTR,Pipe" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled" bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" group.word 0x78++0x01 line.word 0x00 "PIPE4CTR,Pipe" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled,1: Buffer access by the CPU is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x00 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled,1: Auto response is enabled" bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the..,1: The relevant pipe is used for the transaction" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" repeat 4. (strings "" "" "" "" )(list 0x0 0x2 0x4 0x6 ) group.word ($2+0x7A)++0x01 line.word 0x00 "PIPECTR$1,Pipe $1" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access is disabled,1: Buffer access is enabled" bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear Mode" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled (all.." newline bitfld.word 0x00 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used at the USB bus,1: The relevant pipe is used at the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),2: STALL response,3: STALL response" repeat.end group.word 0x90++0x01 line.word 0x00 "PIPETRE,Pipe" bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared" group.word 0x94++0x01 line.word 0x00 "PIPE1TRE,Pipe" bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared" group.word 0x98++0x01 line.word 0x00 "PIPE2TRE,Pipe" bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared" group.word 0x9C++0x01 line.word 0x00 "PIPE3TRE,Pipe" bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared" group.word 0xA0++0x01 line.word 0x00 "PIPE4TRE,Pipe" bitfld.word 0x00 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled,1: Transaction counter is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared" group.word 0x92++0x01 line.word 0x00 "PIPETRN,Pipe" hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter" group.word 0x96++0x01 line.word 0x00 "PIPE1TRN,Pipe" hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter" group.word 0x9A++0x01 line.word 0x00 "PIPE2TRN,Pipe" hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter" group.word 0x9E++0x01 line.word 0x00 "PIPE3TRN,Pipe" hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter" group.word 0xA2++0x01 line.word 0x00 "PIPE4TRN,Pipe" hexmask.word 0x00 0.--15. 1. "TRNCNT,Transaction Counter" repeat 6. (strings "0" "1" "2" "3" "4" "5" )(list 0x0 0x2 0x4 0x6 0x8 0xA ) group.word ($2+0xD0)++0x01 line.word 0x00 "DEVADD$1,Device Address" bitfld.word 0x00 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDn is not used,1: Low speed,2: Full speed,3: Setting prohibited" repeat.end group.long 0xF0++0x03 line.long 0x00 "PHYSLEW,PHY Cross Point Adjustment Register" bitfld.long 0x00 3. "SLEWF01,Receiver Cross Point Adjustment 01" "0: Reserved,1: Host or device controller mode" bitfld.long 0x00 2. "SLEWF00,Receiver Cross Point Adjustment 00" "0: Reserved,1: Host or device controller mode" newline bitfld.long 0x00 1. "SLEWR01,Receiver Cross Point Adjustment 01" "0: Reserved,1: Host or device controller mode" bitfld.long 0x00 0. "SLEWR00,Receiver Cross Point Adjustment 00" "0: Reserved,1: Host or device controller mode" group.long 0x400++0x03 line.long 0x00 "DPUSR0R,Deep Software Standby USB Transceiver Control/Pin Monitor Register" rbitfld.long 0x00 23. "DVBSTS0,USB VBUS InputIndicates the VBUS input signal of the USB" "0,1" rbitfld.long 0x00 21. "DOVCB0,USB OVRCURB InputIndicates the OVRCURB input signal of the USB" "0,1" newline rbitfld.long 0x00 20. "DOVCA0,USB OVRCURA InputIndicates the OVRCURA input signal of the USB" "0,1" rbitfld.long 0x00 17. "DM0,USB D-InputIndicates the D- input signal of the USB" "0,1" newline rbitfld.long 0x00 16. "DP0,USB0 D+ InputIndicates the D+ input signal of the USB" "0,1" bitfld.long 0x00 4. "FIXPHY0,USB Transceiver Output Fix" "0: The outputs are fixed in normal mode and on..,1: The outputs are fixed on transitions to deep.." newline bitfld.long 0x00 3. "DRPD0,D+/D- Pull-Down Resistor Control" "0: Disables DP/DM pull-down resistor,1: Enables DP/DM pull-down resistor" bitfld.long 0x00 1. "RPUE0,DP Pull-Up Resistor Control" "0: Disables DP pull-up resistor,1: Enables DP pull-up resistor" newline bitfld.long 0x00 0. "SRPC0,USB Single End Receiver Control" "0: Input through the DP and DM inputs is disabled,1: Input through the DP and DM inputs is enabled" group.long 0x404++0x03 line.long 0x00 "DPUSR1R,Deep Software Standby USB Suspend/Resume Interrupt Register" rbitfld.long 0x00 23. "DVBINT0,USB VBUS Interrupt Source Recovery" "0: The system has not returned from deep..,1: The system has returned from deep software.." rbitfld.long 0x00 21. "DOVRCRB0,USB OVRCURB Interrupt Source Recovery" "0: The system has not returned from deep..,1: The system has returned from deep software.." newline rbitfld.long 0x00 20. "DOVRCRA0,USB OVRCURA Interrupt Source Recovery" "0: The system has not returned from deep..,1: The system has returned from deep software.." rbitfld.long 0x00 17. "DMINT0,USB DM Interrupt Source Recovery" "0: The system has not returned from deep..,1: The system has returned from deep software.." newline rbitfld.long 0x00 16. "DPINT0,USB DP Interrupt Source Recovery" "0: The system has not returned from deep..,1: The system has returned from deep software.." bitfld.long 0x00 7. "DVBSE0,USB VBUS Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." newline bitfld.long 0x00 5. "DOVRCRBE0,USB OVRCURB Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x00 4. "DOVRCRAE0,USB OVRCURA Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." newline bitfld.long 0x00 1. "DMINTE0,USB DM Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x00 0. "DPINTE0,USB DP Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." tree.end tree "USBHS (USB 2.0 High-Speed Module)" base ad:0x40060000 group.word 0x00++0x01 line.word 0x00 "SYSCFG,System Configuration Control Register" bitfld.word 0x00 8. "CNEN,Single End Receiver Enable" "0: Single end receiver operation is disabled,1: Single end receiver operation is enabled" bitfld.word 0x00 7. "HSE,High-Speed Operation Enable" "0: High-speed operation is disabled.(When the..,1: High-speed operation is enabled (the.." newline bitfld.word 0x00 6. "DCFM,Controller Function Select" "0: Function controller function is selected,1: Host controller function is selected" bitfld.word 0x00 5. "DRPD,D+/D- Line Resistor Control" "0: Pulling down the line is disabled,1: Pulling down the line is enabled" newline bitfld.word 0x00 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled,1: Pulling up the line is enabled" bitfld.word 0x00 0. "USBE,USB Operation Enable" "0: USB operation is disabled,1: USB operation is enabled" group.word 0x02++0x01 line.word 0x00 "BUSWAIT,CPU Bus Wait Register" bitfld.word 0x00 0.--3. "BWAIT,CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register" bitfld.word 0x00 14.--15. "OVCMON,External USB1_OVRCURA/USB1_OVRCURB Input Pin MonitorThe OCVMON[1] bit indicates the status of the USBHS_OVRCURA pin" "0,1,2,3" bitfld.word 0x00 6. "HTACT,Host Sequencer Status Monitor" "0: Host sequencer is stopped,1: Host sequencer is operating" newline bitfld.word 0x00 5. "SOFEA,SOF Active Monitor While Host Controller Function is Selected" "0: SOF output is stopped,1: SOF output is operating" bitfld.word 0x00 2. "IDMON,ID0 Pin Monitor" "0: ID0 = Low,1: ID0 = High" newline bitfld.word 0x00 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0 (During Low-Speed Operation:only when the..,1: K-State (During Low-Speed Operation:only when..,2: J-State (During Low-Speed Operation:only when..,3: SE1 (During Low-Speed Operation:only when the.." rgroup.word 0x06++0x01 line.word 0x00 "PLLSTA,PLL Status Register" bitfld.word 0x00 0. "PLLLOCK,PLL Lock Flag" "0: PLL is not locked,1: PLL is locked" group.word 0x08++0x01 line.word 0x00 "DVSTCTR0,Device State Control Register 0" bitfld.word 0x00 11. "HNPBTOA,Host Negotiation Protocol (HNP) Control Use this bit when switching from device B to device A in OTGmode" "0,1" bitfld.word 0x00 10. "EXICEN,USBHS_EXICEN Output Pin Control" "0: Output low on external USBHS_EXICEN pin,1: Output high on external USBHS_EXICEN pin" newline bitfld.word 0x00 9. "VBUSEN,USBHS_VBUSEN Output Pin Control" "0: Output low on external USBHS_VBUSEN pin,1: Output high on external USBHS_VBUSEN pin" bitfld.word 0x00 8. "WKUP,Remote Wakeup Output for the Device Controller Operation" "0: Do not output remote wakeup signal,1: Output remote wakeup signal" newline bitfld.word 0x00 7. "RWUPE,Remote Wakeup Detection Enable for the Host Controller Operation" "0: Disable downstream port remote wakeup,1: Enable downstream port remote wakeup" bitfld.word 0x00 6. "USBRST,USB Bus Reset Output for the Host Controller Operation" "0: Do not output USB bus reset signal,1: Output USB bus reset signal" newline bitfld.word 0x00 5. "RESUME,Resume Signal Output for the Host Controller Operation" "0: Do not output resume signal,1: Output resume signal" bitfld.word 0x00 4. "UACT,USB Bus Operation Enable for the Host Controller Operation" "0: Disable downstream port (disable SOF or..,1: Enable downstream port (enable SOF or.." newline rbitfld.word 0x00 0.--2. "RHST,USB Bus Reset Status" "0: Communication speed not determined,1: Low-speed connection(When the host controller..,2: Full-speed connection(When the host..,3: Setting prohibited,?..." group.word 0x0C++0x01 line.word 0x00 "TESTMODE,USB Test Mode Register" bitfld.word 0x00 0.--3. "UTST,Test Mode" "0: Normal operation,1: Test_J TestMode(When the Function Controller..,2: Test_K TestMode(When the Function Controller..,3: Test_SE0_NAK TestMode(When the Function..,4: Test_Packet TestMode(When the Function..,5: Reserved TestMode(When the Function..,6: Reserved TestMode(When the Function..,7: Reserved TestMode(When the Function..,?,9: Test_J TestMode(When the Host Controller..,10: Test_K TestMode(When the Host Controller..,11: Test_SE0_NAK TestMode(When the Host..,12: Test_Packet TestMode(When the Host..,13: Test_Force_EnableTestMode(When the Host..,14: Reserved TestMode(When the Host Controller..,15: Reserved TestMode(When the Host Controller.." group.long 0x14++0x03 line.long 0x00 "CFIFO,CFIFO Port Register" hexmask.long 0x00 0.--31. 1. "FIFOPORT,FIFO Port.Read receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits" group.word 0x14++0x01 line.word 0x00 "CFIFOL,CFIFO Port Register L" group.word 0x16++0x01 line.word 0x00 "CFIFOH,CFIFO Port Register H" group.byte 0x14++0x00 line.byte 0x00 "CFIFOLL,CFIFO Port Register LL" group.byte 0x17++0x00 line.byte 0x00 "CFIFOHH,CFIFO Port Register HH" group.long 0x18++0x03 line.long 0x00 "D0FIFO,D0FIFO Port Register" hexmask.long 0x00 0.--31. 1. "FIFOPORT,FIFO Port Read receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits" group.word 0x18++0x01 line.word 0x00 "D0FIFOL,D0FIFO Port Register L" group.word 0x1A++0x01 line.word 0x00 "D0FIFOH,D0FIFO Port Register H" group.byte 0x18++0x00 line.byte 0x00 "D0FIFOLL,D0FIFO Port Register LL" group.byte 0x1B++0x00 line.byte 0x00 "D0FIFOHH,D0FIFO Port Register HH" group.long 0x1C++0x03 line.long 0x00 "D1FIFO,D1FIFO Port Register" hexmask.long 0x00 0.--31. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits" group.word 0x1C++0x01 line.word 0x00 "D1FIFOL,D1FIFO Port Register L" group.word 0x1E++0x01 line.word 0x00 "D1FIFOH,D1FIFO Port Register H" group.byte 0x1C++0x00 line.byte 0x00 "D1FIFOLL,D1FIFO Port Register LL" group.byte 0x1F++0x00 line.byte 0x00 "D1FIFOHH,D1FIFO Port Register HH" group.word 0x20++0x01 line.word 0x00 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: Clear DTLN[11:0] flags in the FIFO port..,1: Decrement DTLN[11:0] flags each time receive.." bitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: Do not rewind buffer pointer (Writing 0 has..,1: Rewind buffer pointer" newline bitfld.word 0x00 10.--11. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,2: 32-bit width,3: Setting prohibited" bitfld.word 0x00 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x00 5. "ISEL,FIFO Port Access Direction when DCP is Selected" "0: Select reading from the FIFO buffer,1: Select writing to the FIFO buffer" bitfld.word 0x00 0.--3. "CURPIPE,FIFO Port Access Pipe Specification" "0: 0000,1: PIPE1,2: PIPE2,3: PIPE3,4: PIPE4,5: PIPE5,6: PIPE6,7: PIPE7,8: PIPE8,9: PIPE9,?..." group.word 0x28++0x01 line.word 0x00 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x00 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x00 12. "DREQE,UCL_Dx_DREQ Signal Output Enable" "0: Disables the output,1: Enables the output" newline bitfld.word 0x00 10.--11. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,2: 32-bit width,3: Setting prohibited" bitfld.word 0x00 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x00 0.--3. "CURPIPE,FIFO Port Access Pipe Specification" "0: No pipe specified,1: Pipe1,2: Pipe 2,3: Pipe 3,4: Pipe 4,5: Pipe 5,6: Pipe 6,7: Pipe 7,8: Pipe 8,9: Pipe 9,?..." group.word 0x2C++0x01 line.word 0x00 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x00 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x00 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x00 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x00 12. "DREQE,UCL_Dx_DREQ Signal Output Enable" "0: Disables the output,1: Enables the output" newline bitfld.word 0x00 10.--11. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,2: 32-bit width,3: Setting prohibited" bitfld.word 0x00 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x00 0.--3. "CURPIPE,FIFO Port Access Pipe Specification" "0: No pipe specified,1: Pipe 1,2: Pipe 2,3: Pipe 3,4: Pipe 4,5: Pipe 5,6: Pipe 6,7: Pipe 7,8: Pipe 8,9: Pipe 9,?..." group.word 0x22++0x01 line.word 0x00 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side" newline rbitfld.word 0x00 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed" "0: FIFO port access is disabled,1: FIFO port access is enabled" hexmask.word 0x00 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data" group.word 0x2A++0x01 line.word 0x00 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side" newline rbitfld.word 0x00 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed" "0: FIFO port access is disabled,1: FIFO port access is enabled" hexmask.word 0x00 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data" group.word 0x2E++0x01 line.word 0x00 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x00 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x00 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side" newline rbitfld.word 0x00 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed" "0: FIFO port access is disabled,1: FIFO port access is enabled" hexmask.word 0x00 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data" group.word 0x30++0x01 line.word 0x00 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x00 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x32++0x01 line.word 0x00 "INTENB1,Interrupt Enable Register 1" bitfld.word 0x00 15. "OVRCRE,OVRCRE Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 14. "BCHGE,USB Bus Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 12. "DTCHE,Disconnection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 11. "ATTCHE,Connection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 9. "L1RSMENDE,L1 Resume End Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 8. "LPMENDE,LPM Transaction End Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 6. "EOFERRE,EOF Error Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 5. "SIGNE,Setup Transaction Error Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x00 4. "SACKE,Setup Transaction Normal Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x00 0. "PDDETINTE,PDDETINT Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x36++0x01 line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register" hexmask.word 0x00 0.--9. 1. "PIPEBRDYE,BRDY Interrupt Enable for Each Pipe" group.word 0x38++0x01 line.word 0x00 "NRDYENB,NRDY Interrupt Enable Register" hexmask.word 0x00 0.--9. 1. "PIPENRDYE,NRDY Interrupt Enable for Each Pipe" group.word 0x3A++0x01 line.word 0x00 "BEMPENB,BEMP Interrupt Enable Register" hexmask.word 0x00 0.--9. 1. "PIPEBEMPE,BEMP Interrupt Enable for Each Pipe" group.word 0x3C++0x01 line.word 0x00 "SOFCFG,SOF Pin Configuration Register" bitfld.word 0x00 8. "TRNENSEL,Transaction-Enabled Time Select.The transfer efficiency can be improved by setting this bit to 1 if no low-speed device is connected directly or via FS-HUB to the USB port" "0: For non-low-speed communication,1: For low-speed communication" bitfld.word 0x00 6. "BRDYM,PIPEBRDY Interrupt Status Clear Timing.This bit can be set only in the initial setting (before communications).The setting cannot be changed once communication starts" "0: Software clears the status,1: Hardware clears the status when data has been.." newline bitfld.word 0x00 5. "INTL,Interrupt Output Sense Select" "0: Edge sense,1: Level sense" rbitfld.word 0x00 4. "EDGESTS,Interrupt Edge Processing Status Monitor" "0: Interrupt edge processing is not run,1: Interrupt edge processing is running" group.word 0x3E++0x01 line.word 0x00 "PHYSET,PHY Setting Register" bitfld.word 0x00 15. "HSEB,CL-Only Mode" "0: CL-only mode is not activated,1: CL-only mode is activated" bitfld.word 0x00 11. "REPSTART,Forcibly Start Terminating Resistance Adjustment" "0: Terminating resistance adjustment is forcibly..,1: Terminating resistance adjustment is not.." newline bitfld.word 0x00 8.--9. "REPSEL,Terminating Resistance Adjustment Cycle" "0: No cycle is set,1: Adjust terminating resistance at 16-second..,2: Adjust terminating resistance at 64-second..,3: Adjust terminating resistance at 128-second.." bitfld.word 0x00 4.--5. "CLKSEL,Input System Clock Frequency" "0: Setting Prohibited,1: 12 MHz,2: 20 MHz,3: 24 MHz" newline bitfld.word 0x00 3. "CDPEN,Charging Downstream Port Enable" "0: Disable charging downstream port,1: Enable charging downstream port" bitfld.word 0x00 1. "PLLRESET,PLL Reset Control" "0: Disable PLL reset control for UTMI_PHY,1: Enable PLL reset control for UTMI_PHY" newline bitfld.word 0x00 0. "DIRPD,Power-Down Control" "0: Does not enter low-power consumption mode,1: Enter low-power consumption mode" group.word 0x40++0x01 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupt is not generated on detecting..,1: VBUS interrupt is generated on detecting a.." bitfld.word 0x00 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated,1: Resume interrupts are generated" newline bitfld.word 0x00 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated,1: SOF interrupts are generated" bitfld.word 0x00 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are.." newline bitfld.word 0x00 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts..,1: Control transfer stage transition interrupts.." rbitfld.word 0x00 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated,1: BEMP interrupts are not generated" newline rbitfld.word 0x00 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated,1: NRDY interrupts are generated" rbitfld.word 0x00 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated,1: BRDY interrupts are generated" newline rbitfld.word 0x00 7. "VBSTS,VBUS Input Status" "0: The USBHS_VBUS pin is low,1: The USBHS_VBUS pin is high" rbitfld.word 0x00 4.--6. "DVSQ,Device State" "0: Powered state,1: Default state,2: Address state,3: Configured state,?..." newline bitfld.word 0x00 3. "VALID,USB Request Reception" "0: Not detected,1: Setup packet reception" rbitfld.word 0x00 0.--2. "CTSQ,Control Transfer Stage" "0: Idle or setup stage,1: Control read data stage,2: Control read status stage,3: Control write data stage,4: Control write status stage,5: Control write (no data) status stage,6: Control transfer sequence error,7: Setting prohibited" group.word 0x42++0x01 line.word 0x00 "INTSTS1,Interrupt Status Register 1" bitfld.word 0x00 15. "OVRCR,Overcurrent Interrupt Status" "0: OVRCR interrupts are not generated,1: OVRCR interrupts are generated" bitfld.word 0x00 14. "BCHG,USB Bus Change Interrupt Status" "0: BCHG interrupts are not generated,1: BCHG interrupts are generated" newline bitfld.word 0x00 12. "DTCH,USB Disconnection Detection Interrupt Status" "0: DTCH interrupts are not generated,1: DTCH interrupts are generated" bitfld.word 0x00 11. "ATTCH,USB Connection Detection Interrupt Status" "0: ATTCH interrupts are not generated,1: ATTCH interrupts are generated" newline bitfld.word 0x00 9. "L1RSMEND,L1 Resume End Interrupt Status" "0: L1RSMEND interrupts are not generated,1: L1RSMEND interrupts are generated" bitfld.word 0x00 8. "LPMEND,LPM Transaction End Interrupt Status" "0: LPMEND interrupts are not generated,1: LPMEND interrupts are generated" newline bitfld.word 0x00 6. "EOFERR,EOF Error Detection Interrupt Status" "0: EOFERR interrupts are not generated,1: EOFERR interrupts are generated" bitfld.word 0x00 5. "SIGN,Setup Transaction Error Interrupt Status" "0: SIGN interrupts are not generated,1: SIGN interrupts are generated" newline bitfld.word 0x00 4. "SACK,Setup Transaction Normal Response Interrupt Status" "0: SACK interrupts are not generated,1: SACK interrupts are generated" bitfld.word 0x00 0. "PDDETINT,PDDET Detection Interrupt Status" "0: PDDET interrupts are not generated,1: PDDET interrupts are generated" group.word 0x46++0x01 line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register" hexmask.word 0x00 0.--9. 1. "PIPEBRDY,BRDY Interrupt Status for Each Pipe" group.word 0x48++0x01 line.word 0x00 "NRDYSTS,NRDY Interrupt Status Register" hexmask.word 0x00 0.--9. 1. "PIPENRDY,NRDY Interrupt Status for Each Pipe" group.word 0x4A++0x01 line.word 0x00 "BEMPSTS,BEMP Interrupt Status Register" hexmask.word 0x00 0.--9. 1. "PIPEBEMP,BEMP Interrupt Status for Each Pipe" group.word 0x4C++0x01 line.word 0x00 "FRMNUM,Frame Number Register" bitfld.word 0x00 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred" bitfld.word 0x00 14. "CRCE,CRC Error Detection Status" "0: No error,1: An error occurred" newline hexmask.word 0x00 0.--10. 1. "FRNM,Frame Number.Indicate the latest frame number" group.word 0x4E++0x01 line.word 0x00 "UFRMNUM,uFrame Number Register" bitfld.word 0x00 15. "DVCHG,Device State Change" "0: Disables the writing to the..,1: Enables the writing to the.." rbitfld.word 0x00 0.--2. "UFRNM,MicroframeIndicate the microframe number" "0,1,2,3,4,5,6,7" group.word 0x50++0x01 line.word 0x00 "USBADDR,USB Address Register" bitfld.word 0x00 8.--10. "STSRECOV0,Status Recovery" "?,1: Return to the full-speed state(bits..,2: Return to the full-speed state (bits..,3: Return to the full-speed state (bits..,4: Return to the full-speed state (bits..,5: Return to the high-speed state (bits..,6: Return to the high-speed state (bits..,7: Return to the high-speed state (bits.." hexmask.word.byte 0x00 0.--6. 1. "USBADDR,USB Address In device controller mode these flags indicate the USB address assigned by the host when the USBHS processed the SET_ADDRESS request successfully" group.word 0x54++0x01 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.byte 0x00 8.--15. 1. "BREQUEST,USB request bRequest value Finction controller selected : read-only Host controller selected : read" hexmask.word.byte 0x00 0.--7. 1. "BMREQUESTTYPE,USB request bmRequestType value Finction controller selected : read-only Host controller selected : read" group.word 0x56++0x01 line.word 0x00 "USBVAL,USB Request Value Register" hexmask.word 0x00 0.--15. 1. "WVALUE,Value of USB request wValue Finction controller selected : read-only Host controller selected : read" group.word 0x58++0x01 line.word 0x00 "USBINDX,USB Request Index Register" hexmask.word 0x00 0.--15. 1. "WINDEX,Value of USB request wIndex Finction controller selected : read-only Host controller selected : read" group.word 0x5A++0x01 line.word 0x00 "USBLENG,USB Request Length Register" hexmask.word 0x00 0.--15. 1. "WLENGTH,Value of USB request wLength Finction controller selected : read-only Host controller selected : read" group.word 0x5C++0x01 line.word 0x00 "DCPCFG,DCP Configuration Register" bitfld.word 0x00 8. "CNTMD,Continuous Transfer Mode" "0: Non-continuous transfer mode,1: Continuous transfer mode" bitfld.word 0x00 7. "SHTNAK,Pipe Blocking on End of Transfer" "0: The pipe remains open after transfer ends,1: The pipe is blocked after transfer ends" newline bitfld.word 0x00 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction" group.word 0x5E++0x01 line.word 0x00 "DCPMAXP,DCP Maximum Packet Size Register" bitfld.word 0x00 12.--15. "DEVSEL,Device SelectThese bits specify the address of the destination function device for control transfer when the host controller function is selected" "0: Address 0000,1: Address 0001,2: Address 0010,3: Address 0011,4: Address 0100,5: Address 0101,?..." hexmask.word.byte 0x00 0.--6. 1. "MXPS,Maximum Packet SizeThese bits specify the maximum data payload (maximum packet size) for the DCP" group.word 0x60++0x01 line.word 0x00 "DCPCTR,DCP Control Register" rbitfld.word 0x00 15. "BSTS,Buffer Status" "0: Buffer access is disabled,1: Buffer access is enabled" bitfld.word 0x00 14. "SUREQ,SETUP Token Transmission" "0: Writing is ignored,1: Transmits the setup packet" newline bitfld.word 0x00 13. "CSCLR,Split Transaction CSPLIT Status Clear" "0: Writing is ignored,1: Clears the CSSTS bit to 0" rbitfld.word 0x00 12. "CSSTS,Split Transaction COMPLETE SPLIT(CSPLIT) Status" "0: START-SPLIT(SSPLIT) transaction processing is..,1: The CSPLIT transaction processing is in.." newline bitfld.word 0x00 11. "SUREQCLR,SUREQ Bit Clear" "0: Writing is ignored,1: Clears the SUREQ bit to 0" bitfld.word 0x00 8. "SQCLR,Toggle Bit Clear" "0: Writing is ignored,1: Specifies DATA0" newline bitfld.word 0x00 7. "SQSET,Toggle Bit Set" "0: Writing is ignored,1: Specifies DATA1" rbitfld.word 0x00 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1" newline rbitfld.word 0x00 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" bitfld.word 0x00 4. "PINGE,PING Token Issue Enable" "0: Issuing PING token is disabled,1: Normal PING operation" newline bitfld.word 0x00 2. "CCPL,Control Transfer End Enable" "0: Completion of control transfer is disabled,1: Completion of control transfer is enabled" bitfld.word 0x00 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x64++0x01 line.word 0x00 "PIPESEL,Pipe Window Select Register" bitfld.word 0x00 0.--3. "PIPESEL,Pipe Window SelectThese bits specify the pipe for registers at addresses 68H to 6EH" "0: No pipe selected,1: PIPE1,2: PIPE2,3: PIPE3,4: PIPE4,5: PIPE5,6: PIPE6,7: PIPE7,8: PIPE8,9: PIPE9,?..." group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer,2: Interrupt transfer,3: Isochronous transfer" bitfld.word 0x00 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving..,1: BRDY interrupt upon completion of reading data" newline bitfld.word 0x00 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer" bitfld.word 0x00 8. "CNTMD,Continuous Transfer Mode" "0: Discontinuous transfer mode,1: Continuous transfer mode" newline bitfld.word 0x00 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: The pipe is continued at the end of transfer,1: The pipe is disabled at the end of transfer" bitfld.word 0x00 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction" newline bitfld.word 0x00 0.--3. "EPNUM,Endpoint Number" "0: the selected pipe is not used,?..." group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Register" bitfld.word 0x00 10.--14. "BUFSIZE,Buffer Size" "0: 64 bytes,1: 128 bytes,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,?,31: 2 Kbytes" hexmask.word.byte 0x00 0.--7. 1. "BUFNMB,Buffer NumberThese bits specify the FIFO buffer number of the selected pipe (04h to 87h)" group.word 0x6C++0x01 line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register" bitfld.word 0x00 12.--15. "DEVSEL,Device SelectThese bits specify the address of the peripheral device when the host controller function is selected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.word 0x00 0.--10. 1. "MXPS,Maximum Packet SizeThese bits specify the maximum data payload (maximum packet size) for the selected pipe.A size of 1h to 40h bytes can be set for PIPE6 to PIPE9" group.word 0x6E++0x01 line.word 0x00 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x00 12. "IFIS,Isochronous IN Buffer Flush" "0: The buffer is not flushed,1: The buffer is flushed" bitfld.word 0x00 0.--2. "IITV,Interval Error Detection IntervalThese bits specify the transfer interval timing for the selected pipe as n-th power of 2 of the frame timing" "0,1,2,3,4,5,6,7" group.word 0x70++0x01 line.word 0x00 "PIPECTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x72++0x01 line.word 0x00 "PIPE1CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x74++0x01 line.word 0x00 "PIPE2CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x76++0x01 line.word 0x00 "PIPE3CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x78++0x01 line.word 0x00 "PIPE4CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x7A++0x01 line.word 0x00 "PIPE5CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x7C++0x01 line.word 0x00 "PIPE6CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x7E++0x01 line.word 0x00 "PIPE7CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x80++0x01 line.word 0x00 "PIPE8CTR,PIPE Control Register" rbitfld.word 0x00 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe" "0: Buffer access is disabled,1: Buffer access is enabled" rbitfld.word 0x00 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction" "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO.." newline bitfld.word 0x00 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled,1: The CSSTS bit is cleared" rbitfld.word 0x00 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress..,1: CSplit Transaction processing is in progress" newline bitfld.word 0x00 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe" "0: Auto response mode is disabled,1: Auto response mode is enabled (Transmission:.." bitfld.word 0x00 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" newline bitfld.word 0x00 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored,1: Specifies DATA0" bitfld.word 0x00 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored,1: Specifies DATA1" newline rbitfld.word 0x00 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" rbitfld.word 0x00 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus,1: The relevant pipe is in use for the USB bus" newline bitfld.word 0x00 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe" "0: NAK response,1: BUF response (depending on buffer state),2: STALL response,3: STALL response" group.word 0x90++0x01 line.word 0x00 "PIPETRE,PIPE Transaction Counter Enable Register" bitfld.word 0x00 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function" "0: The transaction counter function is disabled,1: The transaction counter function is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0" "0: Invalid,1: The current counter value is cleared" group.word 0x94++0x01 line.word 0x00 "PIPE1TRE,PIPE Transaction Counter Enable Register" bitfld.word 0x00 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function" "0: The transaction counter function is disabled,1: The transaction counter function is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0" "0: Invalid,1: The current counter value is cleared" group.word 0x98++0x01 line.word 0x00 "PIPE2TRE,PIPE Transaction Counter Enable Register" bitfld.word 0x00 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function" "0: The transaction counter function is disabled,1: The transaction counter function is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0" "0: Invalid,1: The current counter value is cleared" group.word 0x9C++0x01 line.word 0x00 "PIPE3TRE,PIPE Transaction Counter Enable Register" bitfld.word 0x00 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function" "0: The transaction counter function is disabled,1: The transaction counter function is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0" "0: Invalid,1: The current counter value is cleared" group.word 0xA0++0x01 line.word 0x00 "PIPE4TRE,PIPE Transaction Counter Enable Register" bitfld.word 0x00 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function" "0: The transaction counter function is disabled,1: The transaction counter function is enabled" bitfld.word 0x00 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0" "0: Invalid,1: The current counter value is cleared" group.word 0x92++0x01 line.word 0x00 "PIPETRN,PIPE Transaction Counter Register" abitfld.word 0x00 0.--15. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB =" "0x0000=0: Indicate the specified number of,0x0001=1: Indicate the number of currently counted" group.word 0x96++0x01 line.word 0x00 "PIPE1TRN,PIPE Transaction Counter Register" abitfld.word 0x00 0.--15. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB =" "0x0000=0: Indicate the specified number of,0x0001=1: Indicate the number of currently counted" group.word 0x9A++0x01 line.word 0x00 "PIPE2TRN,PIPE Transaction Counter Register" abitfld.word 0x00 0.--15. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB =" "0x0000=0: Indicate the specified number of,0x0001=1: Indicate the number of currently counted" group.word 0x9E++0x01 line.word 0x00 "PIPE3TRN,PIPE Transaction Counter Register" abitfld.word 0x00 0.--15. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB =" "0x0000=0: Indicate the specified number of,0x0001=1: Indicate the number of currently counted" group.word 0xA2++0x01 line.word 0x00 "PIPE4TRN,PIPE Transaction Counter Register" abitfld.word 0x00 0.--15. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB =" "0x0000=0: Indicate the specified number of,0x0001=1: Indicate the number of currently counted" repeat 10. (strings "0" "1" "2" "3" "4" "5" "6" "7" "8" "9" )(list 0x0 0x2 0x4 0x6 0x8 0xA 0xC 0xE 0x10 0x12 ) group.word ($2+0xD0)++0x01 line.word 0x00 "DEVADD$1,Device Address Configuration Register" bitfld.word 0x00 11.--14. "UPPHUB,Communication Target Connecting Hub Register" "0: Directly connected to the port of the USBHS,?..." bitfld.word 0x00 8.--10. "HUBPORT,Communication Target Connecting Hub Port" "0: Directly connected to the port of the USBHS,?..." newline bitfld.word 0x00 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDx is not used,1: Low speed,2: Full speed,3: High speed" repeat.end group.word 0xE4++0x01 line.word 0x00 "DEVADDA,Device Address Configuration Register A" bitfld.word 0x00 11.--14. "UPPHUB,Communication Target Connecting Hub Register" "0: Directly connected to the port of the USBHS,?..." bitfld.word 0x00 8.--10. "HUBPORT,Communication Target Connecting Hub Port" "0: Directly connected to the port of the USBHS,?..." newline bitfld.word 0x00 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDA is not used,1: Low speed,2: Full speed,3: High speed" group.word 0x100++0x01 line.word 0x00 "LPCTRL,Low Power Control Register" bitfld.word 0x00 7. "HWUPM,Resume Return Mode Setting" "0: Hardware does not recover while CPU clock..,1: Hardware recovers while CPU clock inactive" group.word 0x102++0x01 line.word 0x00 "LPSTS,Low Power Status Register" bitfld.word 0x00 14. "SUSPENDM,UTMI SuspendM Control" "0: UTMI suspension mode,1: UTMI normal mode" group.word 0x140++0x01 line.word 0x00 "BCCTRL,Battery Charging Control Register" rbitfld.word 0x00 9. "PDDETSTS,PDDET Status" "0: The PDDET pin is at low level,1: The PDDET pin is at high level" rbitfld.word 0x00 8. "CHGDETSTS,CHGDET Status" "0: The CHGDET pin is at low level,1: The CHGDET pin is at high level" newline bitfld.word 0x00 5. "DCPMODE,DCP Mode Control" "0: The RDCP_DAT resistor is disabled,1: The RDCP_DAT resistor is enabled" bitfld.word 0x00 4. "VDMSRCE,VDMSRC Control" "0: The VDM_SRC circuit is disabled,1: The VDM_SRC circuit is enabled" newline bitfld.word 0x00 3. "IDPSINKE,IDPSINK Control" "0: The IDP_SINK circuit is disabled,1: The IDP_SINK circuit is enabled" bitfld.word 0x00 2. "VDPSRCE,VDPSRC Control" "0: The VDP_SRC circuit is disabled,1: The VDP_SRC circuit is enabled" newline bitfld.word 0x00 1. "IDMSINKE,IDMSINK Control" "0: The IDM_SINK circuit is disabled,1: The IDM_SINK circuit is enabled" bitfld.word 0x00 0. "IDPSRCE,IDPSRC Control" "0: The IDP_SRC circuit is disabled,1: The IDP_SRC circuit is enabled" group.word 0x144++0x01 line.word 0x00 "PL1CTRL1,Function L1 Control Register 1" bitfld.word 0x00 14. "L1EXTMD,PHY Control Mode at L1 Return" "0: SUSPENDM is not set by hardware when Host K..,1: SUSPENDM is set by hardware when Host K is.." bitfld.word 0x00 8.--11. "HIRDTHR,L1 Response Negotiation Threshold ValueHIRD threshold value used for L1NEGOMD.The format is the same as the HIRD field in HL1CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.word 0x00 4.--7. "DVSQ,DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0.Indicates the L1 state together with the device state bits DVSQ[2:0]" "0: Powered state,1: Default state,2: Address state,3: Configured state,4: Suspended state,5: Suspended state,6: Suspended state,7: Suspended state,8: L1 state,9: L1 state,10: L1 state,11: L1 state,?..." bitfld.word 0x00 3. "L1NEGOMD,L1 Response Negotiation Control.NOTE: This bit is valid only when the L1RESPMD[1:0] value is 2'b11" "0: When receive HIRD is larger than HIRDTHR[3:0]..,1: When receive HIRD is smaller than.." newline bitfld.word 0x00 1.--2. "L1RESPMD,L1 Response Mode" "0: NYET,1: ACK,2: STALL,3: According to the L1NEGOMD bit" bitfld.word 0x00 0. "L1RESPEN,L1 Response Enable" "0: LPM is not supported,1: LPM is supported" group.word 0x146++0x01 line.word 0x00 "PL1CTRL2,Function L1 Control Register 2" bitfld.word 0x00 12. "RWEMON,RWE Value Monitor" "0: The RWE bit value of the LPM token received..,1: The RWE bit value of the LPM token received.." bitfld.word 0x00 8.--11. "HIRDMON,HIRD Value Monitor" "0: The HIRD field value of the LPM token..,1: The HIRD field value of the LPM token..,?..." group.word 0x148++0x01 line.word 0x00 "HL1CTRL1,Host L1 Control Register 1" rbitfld.word 0x00 1.--2. "L1STATUS,L1 Request Completion Status" "0: ACK received,1: NYET received,2: STALL received,3: Transaction error" bitfld.word 0x00 0. "L1REQ,L1 Transition Request" "0: This bit is cleared to 0 by hardware when the..,1: Set this bit to 1 when requesting a.." group.word 0x14A++0x01 line.word 0x00 "HL1CTRL2,Host L1 Control Register 2" bitfld.word 0x00 15. "BESL,BESL & Alternate HIRDThis bit selects the K-State drive period at the time of L1 Resume" "0,1" bitfld.word 0x00 12. "L1RWE,LPM Token L1 RemoteWake EnableThese bits specify the value to be set in the RWE field of LPM token" "0,1" newline bitfld.word 0x00 8.--11. "HIRD,LPM Token HIRD" "0: 50 us(Setting prohibited(BESL = 0)) / 75..,1: 125 us(BESL = 0) / 100 us(BESL = 1),2: 200 us(BESL = 0) / 150 us(BESL = 1),3: 275 us(BESL = 0) / 250 us(BESL = 1),4: 350 us(BESL = 0) / 350 us(BESL = 1),5: 425 us(BESL = 0) / 450 us(BESL = 1),6: 500 us(BESL = 0) / 950 us(BESL = 1),7: 575 us(BESL = 0) / 1950 us(BESL = 1),8: 650 us(BESL = 0) / 2950 us(BESL = 1),9: 725 us(BESL = 0) / 3950 us(BESL = 1),10: 800 us(BESL = 0) / 4950 us(BESL = 1),11: 875 us(BESL = 0) / 5950 us(BESL = 1),12: 950 us(BESL = 0) / 6950 us(BESL = 1),13: 1025 us(Setting prohibited(BESL = 0)) / 7950..,14: 1100 us(Setting prohibited(BESL = 0)) / 8950..,15: 1175 us(Setting prohibited(BESL = 0)) / 9950.." bitfld.word 0x00 0.--3. "L1ADDR,LPM Token DeviceAddressThese bits specify the value to be set in the ADDR field of LPM token" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x160++0x03 line.long 0x00 "DPUSR0R,Deep Standby USB Transceiver Control/Pin Monitor Register" bitfld.long 0x00 23. "DVBSTSHM,VBUS InputIndicates VBUS input signal on the HS side of USB port" "0,1" bitfld.long 0x00 21. "DOVCBHM,OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port" "0,1" newline bitfld.long 0x00 20. "DOVCAHM,OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port" "0,1" group.long 0x164++0x03 line.long 0x00 "DPUSR1R,Deep Standby USB Suspend/Resume Interrupt Register" rbitfld.long 0x00 23. "DVBSTSH,Indication of Return from VBUS Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby.." rbitfld.long 0x00 21. "DOVCBH,Indication of Return from OVRCURB Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby.." newline rbitfld.long 0x00 20. "DOVCAH,Indication of Return from OVRCURA Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby.." bitfld.long 0x00 7. "DVBSTSHE,VBUS Interrupt Enable/Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.long 0x00 5. "DOVCBHE,OVRCURB Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" bitfld.long 0x00 4. "DOVCAHE,OVRCURA Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" group.word 0x168++0x01 line.word 0x00 "DPUSR2R,Deep Standby USB Suspend/Resume Interrupt Register" bitfld.word 0x00 9. "DMINTE,DM Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" bitfld.word 0x00 8. "DPINTE,DP Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline rbitfld.word 0x00 5. "DMVAL,DM InputIndicates DM input signal on the HS side of USB port" "0,1" rbitfld.word 0x00 4. "DPVAL,DP InputIndicates DP input signal on the HS side of USB port" "0,1" newline rbitfld.word 0x00 1. "DMINT,Indication of Return from DM Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby.." rbitfld.word 0x00 0. "DPINT,Indication of Return from DP Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby.." group.word 0x16A++0x01 line.word 0x00 "DPUSRCR,Deep Standby USB Suspend/Resume Command Register" bitfld.word 0x00 1. "FIXPHYPD,USB Transceiver Control Fix for PLL" "0: Normal mode,1: Go to/Return from deep software standby mode" bitfld.word 0x00 0. "FIXPHY,USB Transceiver Control Fix" "0: Normal mode,1: Go to/Return from deep software standby mode" tree.end tree "WDT (Watchdog Timer Unit)" base ad:0x40044200 group.byte 0x00++0x00 line.byte 0x00 "WDTRR,WDT Refresh Register" hexmask.byte 0x00 0.--7. 1. "WDTRR,WDTRR is an 8-bit register that refreshes the down-counter of the WDT" group.word 0x02++0x01 line.word 0x00 "WDTCR,WDT Control Register" bitfld.word 0x00 12.--13. "RPSS,Window Start Position Selection" "0: 25 percent,1: 50 percent,2: 75 percent,3: 100 percent (window start position is not.." bitfld.word 0x00 8.--9. "RPES,Window End Position Selection" "0: 75 percent,1: 50 percent,2: 25 percent,3: 0 percent (window end position is not.." bitfld.word 0x00 4.--7. "CKS,Clock Division Ratio Selection" "?,1: PCLK/4,?,?,4: PCLK/64,?,6: PCLK/512,7: PCLK/2048,8: PCLK/8192,?,?,?,?,?,?,15: PCLK/128" newline bitfld.word 0x00 0.--1. "TOPS,Timeout Period Selection" "0: 1 024 cycles (03FFh),1: 4 096 cycles (0FFFh),2: 8 192 cycles (1FFFh),3: 16 384 cycles (3FFFh)" group.word 0x04++0x01 line.word 0x00 "WDTSR,WDT Status Register" bitfld.word 0x00 15. "REFEF,Refresh Error Flag" "0: No refresh error occurred,1: Refresh error occurred" bitfld.word 0x00 14. "UNDFF,Underflow Flag" "0: No underflow occurred,1: Underflow occurred" hexmask.word 0x00 0.--13. 1. "CNTVAL,Down-Counter ValueValue counted by the down-counter" group.byte 0x06++0x00 line.byte 0x00 "WDTRCR,WDT Reset Control Register" bitfld.byte 0x00 7. "RSTIRQS,Reset Interrupt Request Selection" "0: Non-maskable interrupt request or interrupt..,1: Reset output is enabled" group.byte 0x08++0x00 line.byte 0x00 "WDTCSTPR,WDT Count Stop Control Register" bitfld.byte 0x00 7. "SLCSTP,Sleep-Mode Count Stop Control" "0: Count stop is disabled,1: Count is stopped at a transition to sleep mode" tree.end autoindent.off newline