; -------------------------------------------------------------------------------- ; @Title: R7FS5 On-Chip Peripherals ; @Props: Released ; @Author: PCC, MRD, PID, PIJ ; @Changelog: 2019-01-29 PID ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: RENESAS-SYNERGY-r01um0009eu0110-synergy-s5d5.pdf (Rev.1.10 2017-07) ; RENESAS-SYNERGY-r01um0004eu0100-synergy-s5d9.pdf (Rev.1.0 2016-11) ; @Core: Cortex-M4F ; @Chip: R7FS5D57C2A01CLK, R7FS5D57C3A01CFB, R7FS5D57C3A01CFP, R7FS5D57A2A01CLK, ; R7FS5D57A3A01CFB, R7FS5D57A3A01CFP, R7FS5D97E2A01CBG, R7FS5D97E3A01CFC, ; R7FS5D97E2A01CLK, R7FS5D97E3A01CFB, R7FS5D97E3A01CFP, R7FS5D97C2A01CBG, ; R7FS5D97C3A01CFC, R7FS5D97C2A01CLK, R7FS5D97C3A01CFB, R7FS5D97C3A01CFP ; @Copyright: (C) 1989-2019 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perr7fs5.per 17736 2024-04-08 09:26:07Z kwisniewski $ tree.close "Core Registers (Cortex-M4F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes" bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes" textline " " bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes" group.long 0x10++0x0B line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x08 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending" bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x07 line.long 0x00 "HFSR,Hard Fault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted" bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" width 10. tree "Feature Registers" rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM4F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" textline " " bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" textline " " bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" textline " " bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x07 line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." textline " " bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." textline " " bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x07 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline "" line.long 0x04 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region" hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0xB else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" textline " " rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count Register" line.long 0x08 "DWT_CPICNT,CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end config 16. 8. tree "MMF (Memory Mirror Function)" base ad:0x40001000 width 7. group.long 0x00++0x07 line.long 0x00 "MMSFR,MemMirror Special Function Register" hexmask.long.byte 0x00 24.--31. 1. " KEY ,MMSFR key code" hexmask.long.tbyte 0x00 7.--22. 0x80 " MEMMIRADDR ,Memory mirror address" line.long 0x04 "MMEN,MemMirror Enable Register" hexmask.long.byte 0x04 24.--31. 1. " KEY ,MMEN key code" bitfld.long 0x04 0. " EN ,Memory mirror function enable" "Disabled,Enabled" width 0x0B tree.end tree "Resets" base ad:0x4001E000 width 8. group.byte 0x410++0x00 line.byte 0x00 "RSTSR0,Reset Status Register 0" bitfld.byte 0x00 7. " DPSRSTF ,Deep software standby reset flag" "No reset,Reset" bitfld.byte 0x00 3. " LVD2RF ,Voltage monitor 2 reset detect flag" "No reset,Reset" newline bitfld.byte 0x00 2. " LVD1RF ,Voltage monitor 1 reset detect flag" "No reset,Reset" bitfld.byte 0x00 1. " LVD0RF ,Voltage monitor 0 reset detect flag" "No reset,Reset" newline bitfld.byte 0x00 0. " PORF ,Power-On reset detect flag" "No reset,Reset" group.word 0xC0++0x01 line.word 0x00 "RSTSR1,Reset Status Register 1" bitfld.word 0x00 12. " SPERF ,SP error reset detect flag" "No reset,Reset" bitfld.word 0x00 11. " BUSMRF ,Bus master MPU error reset detect flag" "No reset,Reset" newline bitfld.word 0x00 10. " BUSSRF ,Bus slave MPU error reset detect flag" "No reset,Reset" bitfld.word 0x00 9. " REERF ,SRAM ECC error reset detect flag" "No reset,Reset" newline bitfld.word 0x00 8. " RPERF ,SRAM parity error reset detect flag" "No reset,Reset" bitfld.word 0x00 2. " SWRF ,Software reset detect flag" "No reset,Reset" newline bitfld.word 0x00 1. " WDTRF ,Watchdog timer reset detect flag" "No reset,Reset" bitfld.word 0x00 0. " IWDTRF ,Independent watchdog timer reset detect flag" "No reset,Reset" group.byte 0x411++0x00 line.byte 0x00 "RSTSR2,Reset Status Register 2" bitfld.byte 0x00 0. " CWSF ,Cold/Warm start determination flag" "Cold,Warm" width 0x0B tree.end tree "Option-Setting Memory" base ad:0x00000000 width 6. rgroup.long 0x400++0x07 line.long 0x00 "OFS0,Option Function Select Register 0" bitfld.long 0x00 30. " WDTSTPCTL ,WDT stop control" "Continue,Stop" bitfld.long 0x00 28. " WDTRSTIRQS ,WDT reset interrupt request select" "NMI,Reset" newline bitfld.long 0x00 26.--27. " WDTRPSS ,WDT window start position select" "25%,50%,75%,100%" bitfld.long 0x00 24.--25. " WDTRPES ,WDT window end position select" "75%,50%,25%,0%" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.long 0x00 20.--23. " WDTCKS ,WDT clock frequency division ratio select" "PCLKB/4,,,PCLKB/64,,,PCLKB/512,PCLKB/2048,PCLKB/8192,,,,,,,PCLKB/128" else bitfld.long 0x00 20.--23. " WDTCKS ,WDT clock frequency division ratio select" "PCLKB/4,PCLKB/64,PCLKB/128,PCLKB/512,PCLKB/2048,PCLKB/8192,?..." endif bitfld.long 0x00 18.--19. " WDTTOPS ,WDT timeout period select" "1024 cycles,4096 cycles,8192 cycles,16384 cycles" newline bitfld.long 0x00 17. " WDTSTRT ,WDT start mode select" "Auto-start,Register-start" bitfld.long 0x00 14. " IWDTSTPCTL ,IWDT stop control" "Continue,Stop" newline bitfld.long 0x00 12. " IWDTRSTIRQS ,IWDT reset interrupt request select" "Interrupts,Resets" bitfld.long 0x00 10.--11. " IWDTRPSS ,IWDT window start position select" "25%,50%,75%,100%" newline bitfld.long 0x00 8.--9. " IWDTRPES ,IWDT window end position select" "75%,50%,25%,0%" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.long 0x00 4.--7. " IWDTCKS ,IWDT-Dedicated clock frequency division ratio select" "1,,1/16,1/32,1/64,1/256,,,,,,,,,,1/128" else bitfld.long 0x00 4.--7. " IWDTCKS ,IWDT-Dedicated clock frequency division ratio select" "1,1/16,1/32,1/64,1/128,1/256,?..." endif newline bitfld.long 0x00 2.--3. " IWDTTOPS ,IWDT timeout period select" "128 cycles,512 cycles,1024 cycles,2048 cycles" bitfld.long 0x00 1. " IWDTSTRT ,IWDT start mode select" "Activate IWDT,Disable IWDT" line.long 0x04 "OFS1,Option Function Select Register 1" bitfld.long 0x04 9.--10. " HOCOFRQ0 ,HOCO frequency setting 0" "16 MHz,18 MHz,20 MHz,?..." bitfld.long 0x04 8. " HOCOEN ,HOCO oscillation enable" "Enabled,Disabled" newline bitfld.long 0x04 2. " LVDAS ,Voltage detection 0 circuit start" "Enabled,Disabled" bitfld.long 0x04 0.--1. " VDSEL0 ,Voltage detection 0 level select" ",2.94 V,2.87 V,2.80 V" sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D9*") rgroup.long 0x40++0x03 line.long 0x00 "AWSC,Access Window Setting Control Register" bitfld.long 0x00 28. " FSPR ,Protection of access window and startup area select function" "Invalid,Valid" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") base ad:0x0100A100 endif rgroup.long 0x64++0x03 line.long 0x00 "AWS,Access Window Setting Register" bitfld.long 0x00 31. " BTFLG ,Startup area select flag" "Exchanged,Not exchanged" hexmask.long.WORD 0x00 16.--26. 1. " FAWE ,Access window end block address" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.long 0x00 15. " FSPR ,Protection of access window and startup area select function" "Invalid,Valid" newline endif hexmask.long.WORD 0x00 0.--10. 1. " FAWS ,Access window start block address" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x50)++0x03 line.long 0x00 "OSIS0,OCD/Serial Programmer ID Setting Register 0" group.long (0x54)++0x03 line.long 0x00 "OSIS1,OCD/Serial Programmer ID Setting Register 1" group.long (0x58)++0x03 line.long 0x00 "OSIS2,OCD/Serial Programmer ID Setting Register 2" group.long (0x5C)++0x03 line.long 0x00 "OSIS3,OCD/Serial Programmer ID Setting Register 3" else group.long (0x50)++0x03 line.long 0x00 "OSIS0,OCD/Serial Programmer ID Setting Register 0" group.long (0x54)++0x03 line.long 0x00 "OSIS1,OCD/Serial Programmer ID Setting Register 1" group.long (0x58)++0x03 line.long 0x00 "OSIS2,OCD/Serial Programmer ID Setting Register 2" endif width 0x0B tree.end tree "LVD (Low Voltage Detection)" base ad:0x4001E000 width 9. if (((per.b(ad:0x4001E3FE+0x3FE))&0x08)==0x08) group.byte 0xE0++0x03 line.byte 0x00 "LVD1CR1,Voltage Monitor 1 Circuit Control Register 1" bitfld.byte 0x00 2. " IRQSEL ,Voltage monitor 1 interrupt type select" "Non-maskable,Maskable" bitfld.byte 0x00 0.--1. " IDTSEL ,Voltage monitor 1 interrupt generation condition select" "Rise,Fall,Fall/Rise,?..." line.byte 0x01 "LVD1SR,Voltage Monitor 1 Circuit Status Register" rbitfld.byte 0x01 1. " MON ,Voltage monitor 1 signal monitor flag" "VCC < Vdet1,VCC >= Vdet1/Disabled" bitfld.byte 0x01 0. " DET ,Voltage monitor 1 voltage change detection flag" "Not detected,Detected" line.byte 0x02 "LVD2CR1,Voltage Monitor 2 Circuit Control Register 1" bitfld.byte 0x02 2. " IRQSEL ,Voltage monitor 2 interrupt type select" "Non-maskable,Maskable" bitfld.byte 0x02 0.--1. " IDTSEL ,Voltage monitor 2 interrupt generation condition select" "Rise,Fall,Fall and Rise,?..." line.byte 0x03 "LVD2SR,Voltage Monitor 2 Circuit Status Register" rbitfld.byte 0x03 1. " MON ,Voltage monitor 2 signal monitor flag" "VCC < Vdet2,VCC >= Vdet2/Disabled" bitfld.byte 0x03 0. " DET ,Voltage monitor 2 voltage change monitor 2 voltage change" "Not detected,Detected" group.byte 0x417++0x00 line.byte 0x00 "LVCMPCR,Voltage Monitor Circuit Control Register" bitfld.byte 0x00 6. " LVD2E ,Voltage detection 2 enable" "Disabled,Enabled" bitfld.byte 0x00 5. " LVD1E ,Voltage detection 1 enable" "Disabled,Enabled" if (((per.b(ad:0x4001E3FE+0x417))&0x60)==0x00) group.byte 0x418++0x00 line.byte 0x00 "LVDLVLR,Voltage Detection Level Select Register" bitfld.byte 0x00 5.--7. " LVD2LVL ,Voltage detection 2 level select" ",,,,,2.99,2.92 V,2.85 V" bitfld.byte 0x00 0.--4. " LVD1LVL ,Voltage detection 1 level select" ",,,,,,,,,,,,,,,,,2.99 V,2.92 V,2.85 V,?..." else rgroup.byte 0x418++0x00 line.byte 0x00 "LVDLVLR,Voltage Detection Level Select Register" bitfld.byte 0x00 5.--7. " LVD2LVL ,Voltage detection 2 level select" ",,,,,2.99,2.92 V,2.85 V" bitfld.byte 0x00 0.--4. " LVD1LVL ,Voltage detection 1 level select" ",,,,,,,,,,,,,,,,,2.99 V,2.92 V,2.85 V,?..." endif group.byte 0x41A++0x01 line.byte 0x00 "LVD1CR0,Voltage Monitor 1 Circuit Control Register 0" bitfld.byte 0x00 7. " RN ,Voltage monitor 1 reset negate select" "VCC > Vdet1,LVD1 reset" bitfld.byte 0x00 6. " RI ,Voltage monitor 1 circuit mode select" "Interrupt,Reset" newline bitfld.byte 0x00 4.--5. " FSAMP ,Sampling clock select" "1/2,1/4,1/8,1/16" bitfld.byte 0x00 2. " CMPE ,Voltage monitor 1 circuit comparison result output enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " DFDIS ,Voltage monitor 1 digital filter disable" "No,Yes" bitfld.byte 0x00 0. " RIE ,Voltage monitor 1 Interrupt/Reset enable" "Disabled,Enabled" line.byte 0x01 "LVD2CR0,Voltage Monitor 2 Circuit Control Register 0" bitfld.byte 0x01 7. " RN ,Voltage monitor 2 reset negate select" "VCC > Vdet2,LVD2 reset" bitfld.byte 0x01 6. " RI ,Voltage monitor 2 circuit mode select" "Interrupt,Reset" newline bitfld.byte 0x01 4.--5. " FSAMP ,Sampling clock select" "1/2,1/4,1/8,1/16" bitfld.byte 0x01 2. " CMPE ,Voltage monitor 2 circuit comparison result output enable" "Disabled,Enabled" newline bitfld.byte 0x01 1. " DFDIS ,Voltage monitor 2 digital filter disable" "No,Yes" bitfld.byte 0x01 0. " RIE ,Voltage monitor 2 Interrupt/Reset enable" "Disabled,Enabled" else rgroup.byte 0xE0++0x00 line.byte 0x00 "LVD1CR1,Voltage Monitor 1 Circuit Control Register 1" bitfld.byte 0x00 2. " IRQSEL ,Voltage monitor 1 interrupt type select" "Non-maskable,Maskable" bitfld.byte 0x00 0.--1. " IDTSEL ,Voltage monitor 1 interrupt generation condition select" "Rise,Fall,Fall and Rise,?..." group.byte 0xE1++0x00 line.byte 0x00 "LVD1SR,Voltage Monitor 1 Circuit Status Register" bitfld.byte 0x00 1. " MON ,Voltage monitor 1 signal monitor flag" "VCC < Vdet1,VCC >= Vdet1/Disabled" bitfld.byte 0x00 0. " DET ,Voltage monitor 1 voltage change detection flag" "Not detected,Detected" rgroup.byte 0xE2++0x00 line.byte 0x00 "LVD2CR1,Voltage Monitor 2 Circuit Control Register 1" bitfld.byte 0x00 2. " IRQSEL ,Voltage monitor 2 interrupt type select" "Non-maskable,Maskable" bitfld.byte 0x00 0.--1. " IDTSEL ,Voltage monitor 2 interrupt generation condition select" "Rise,Fall,Fall and Rise,?..." group.byte 0xE3++0x00 line.byte 0x00 "LVD2SR,Voltage Monitor 2 Circuit Status Register" bitfld.byte 0x00 1. " MON ,Voltage monitor 2 signal monitor flag" "VCC < Vdet2,VCC >= Vdet2/Disabled" bitfld.byte 0x00 0. " DET ,Voltage monitor 2 voltage change monitor 2 voltage change" "Not detected,Crossing detection" group.byte 0x417++0x01 line.byte 0x00 "LVCMPCR,Voltage Monitor Circuit Control Register" bitfld.byte 0x00 6. " LVD2E ,Voltage detection 2 enable" "Disabled,Enabled" bitfld.byte 0x00 5. " LVD1E ,Voltage detection 1 enable" "Disabled,Enabled" rgroup.byte 0x418++0x00 line.byte 0x00 "LVDLVLR,Voltage Detection Level Select Register" bitfld.byte 0x00 5.--7. " LVD2LVL ,Voltage detection 2 level select" "2.99 V,2.92 V,2.85 V,?..." bitfld.byte 0x00 0.--4. " LVD1LVL ,Voltage detection 1 level select" "2.99 V,2.92 V,2.85 V,?..." rgroup.byte 0x41A++0x01 line.byte 0x00 "LVD1CR0,Voltage Monitor 1 Circuit Control Register 0" bitfld.byte 0x00 7. " RN ,Voltage monitor 1 reset negate select" "VCC > Vdet1,LVD1 reset" bitfld.byte 0x00 6. " RI ,Voltage monitor 1 circuit mode select" "Interrupt,Reset" newline bitfld.byte 0x00 4.--5. " FSAMP ,Sampling clock select" "1/2,1/4,1/8,1/16" bitfld.byte 0x00 2. " CMPE ,Voltage monitor 1 circuit comparison result output enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " DFDIS ,Voltage monitor 1 digital filter disable mode select" "No,Yes" bitfld.byte 0x00 0. " RIE ,Voltage monitor 1 Interrupt/Reset enable" "Disabled,Enabled" line.byte 0x01 "LVD2CR0,Voltage Monitor 2 Circuit Control Register 0" bitfld.byte 0x01 7. " RN ,Voltage monitor 2 reset negate select" "VCC > Vdet2,LVD2 reset" bitfld.byte 0x01 6. " RI ,Voltage monitor 2 circuit mode select" "Interrupt,Reset" newline bitfld.byte 0x01 4.--5. " FSAMP ,Sampling clock select" "1/2,1/4,1/8,1/16" bitfld.byte 0x01 2. " CMPE ,Voltage monitor 2 circuit comparison result output enable" "Disabled,Enabled" newline bitfld.byte 0x01 1. " DFDIS ,Voltage monitor 2 digital filter disable mode select" "No,Yes" bitfld.byte 0x01 0. " RIE ,Voltage monitor 2 Interrupt/Reset enable" "Disabled,Enabled" endif width 0x0B tree.end tree "CGC (Clock Generation Circuit)" base ad:0x4001E000 width 11. group.long 0x20++0x03 line.long 0x00 "SCKDIVCR,System Clock Division Control Register" bitfld.long 0x00 28.--30. " FCK ,Flash interface clock select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." bitfld.long 0x00 24.--26. " ICK ,System clock select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." newline bitfld.long 0x00 16.--18. " BCK ,External bus clock select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." bitfld.long 0x00 12.--14. " PCKA ,Peripheral module clock a select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." newline bitfld.long 0x00 8.--10. " PCKB ,Peripheral module clock b select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." bitfld.long 0x00 4.--6. " PCKC ,Peripheral module clock c select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." newline bitfld.long 0x00 0.--2. " PCKD ,Peripheral module clock d select" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,?..." group.byte 0x24++0x00 line.byte 0x00 "SCKDIVCR2,System Clock Division Control Register 2" bitfld.byte 0x00 4.--6. " UCK ,USB clock select" ",,1/3,1/4,1/5,?..." group.byte 0x26++0x00 line.byte 0x00 "SCKSCR,System Clock Source Control Register" bitfld.byte 0x00 0.--2. " CKSEL ,Clock source select" "HOCO,MOCO,LOCO,Main clock,Sub-clock,PLL,?..." group.word 0x28++0x01 line.word 0x00 "PLLCCR,PLL Clock Control Register" bitfld.word 0x00 8.--13. " PLLMUL ,PLL frequency multiplication factor select" ",,,,,,,,,,,,,,,,,,,10.0,10.5,11.0,11.5,12.0,12.5,13.0,13.5,14.0,14.5,15.0,15.5,16.0,16.5,17.0,17.5,18.0,18.5,19.0,19.5,20.0,20.5,21.0,21.5,22.0,22.5,23.0,23.5,24.0,24.5,25.0,25.5,26.0,26.5,27.0,27.5,28.0,28.5,29.0,29.5,30.0,?..." bitfld.word 0x00 4. " PLSRCSEL ,PLL clock source select" "Main clock,HOCO" newline bitfld.word 0x00 0.--1. " PLIDIV ,PLL input frequency division ratio select" "1,1/2,1/3,?..." group.byte 0x2A++0x00 line.byte 0x00 "PLLCR,PLL Control Register" bitfld.byte 0x00 0. " PLLSTP ,PLL stop control" "Not stopped,Stopped" group.byte 0x30++0x00 line.byte 0x00 "BCKCR,External Bus Clock Control Register" bitfld.byte 0x00 0. " BCLKDIV ,EBCLK pin output select" "BCLK,BCLK/2" group.byte 0x32++0x00 line.byte 0x00 "MOSCCR,Main Clock Oscillator Control Register" bitfld.byte 0x00 0. " MOSTP ,Main clock oscillator stop" "Not stopped,Stopped" group.byte 0x480++0x00 line.byte 0x00 "SOSCCR,Subclock Oscillator Control Register" bitfld.byte 0x00 0. " SOSTP ,Sub-Clock oscillator stop" "Not stopped,Stopped" group.byte 0x490++0x00 line.byte 0x00 "LOCOCR,Low-Speed On-Chip Oscillator Control Register" bitfld.byte 0x00 0. " LCSTP ,LOCO stop" "Not stopped,Stopped" group.byte 0x36++0x00 line.byte 0x00 "HOCOCR,High-Speed On-Chip Oscillator Control Register" bitfld.byte 0x00 0. " HCSTP ,HOCO stop" "Not stopped,Stopped" group.byte 0xA5++0x00 line.byte 0x00 "HOCOWTCR,High-Speed On-Chip Oscillator Wait Control Register" bitfld.byte 0x00 0.--2. " HSTS ,HOCO wait time setting" "3/fLOCO,4/fLOCO,5/fLOCO,6/fLOCO,7/fLOCO,8/fLOCO,9/fLOCO,10/fLOCO" group.byte 0x38++0x01 line.byte 0x00 "MOCOCR,Middle-Speed On-Chip Oscillator Control Register" bitfld.byte 0x00 0. " MCSTP ,MOCO stop" "Not stopped,Stopped" line.byte 0x01 "FLLCR1,FLL Control Register 1" bitfld.byte 0x01 0. " FLLEN ,FLL enable" "Disabled,Enabled" group.word 0x3A++0x01 line.word 0x00 "FLLCR2,FLL Control Register 2" hexmask.word 0x00 0.--10. 1. " FLLCNTL ,FLL multiplication control" rgroup.byte 0x3C++0x00 line.byte 0x00 "OSCSF,Oscillation Stabilization Flag Register" bitfld.byte 0x00 5. " PLLSF ,PLL clock oscillation stabilization flag" "Stopped,Stable" bitfld.byte 0x00 3. " MOSCSF ,Main clock oscillation stabilization flag" "Stopped,Stable" newline bitfld.byte 0x00 0. " HOCOSF ,HOCO clock oscillation stabilization flag" "Stopped,Stable" group.byte 0x40++0x01 line.byte 0x00 "OSTDCR,Oscillation Stop Detection Control Register" bitfld.byte 0x00 7. " OSTDE ,Oscillation stop detection function enable" "Disabled,Enabled" bitfld.byte 0x00 0. " OSTDIE ,Oscillation stop detection interrupt enable" "Disabled,Enabled" line.byte 0x01 "OSTDSR,Oscillation Stop Detection Status Register" bitfld.byte 0x01 0. " OSTDF ,Oscillation stop detection flag" "Not detected,Detected" group.byte 0xA2++0x00 line.byte 0x00 "MOSCWTCR,Main Clock Oscillator Wait Control Register" bitfld.byte 0x00 0.--3. " MSTS ,Main clock oscillator wait time setting" ",35 cycles,67 cycles,131 cycles,259 cycles,547 cycles,1059 cycles,2147 cycles,4291 cycles,8163 cycles,?..." group.byte 0x413++0x00 line.byte 0x00 "MOMCR,Main Clock Oscillator Mode Oscillation Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.byte 0x00 7. " AUTODRVEN ,Main clock oscillator drive capability auto switching enable" "Disabled,Enabled" newline endif bitfld.byte 0x00 6. " MOSEL ,Main clock oscillator switching" "Resonator,External clock" bitfld.byte 0x00 4.--5. " MODRV0 ,Main clock oscillator drive capability 0 switching" "20 to 24 MHz,16 to 20 MHz,8 to 16 MHz,8 MHz" if (((per.b(ad:0x4001E000+0x480))&0x01)==0x01) group.byte 0x481++0x00 line.byte 0x00 "SOMCR,Subclock Oscillator Mode Control Register" bitfld.byte 0x00 1. " SODRV1 ,Sub-Clock oscillator drive capability switching" "Standard,Middle" else rgroup.byte 0x481++0x00 line.byte 0x00 "SOMCR,Subclock Oscillator Mode Control Register" bitfld.byte 0x00 1. " SODRV1 ,Sub-Clock oscillator drive capability switching" "Standard,Middle" endif group.byte 0x3E++0x00 line.byte 0x00 "CKOCR,Clock Out Control Register" bitfld.byte 0x00 7. " CKOEN ,Clock out enable" "Disabled,Enabled" bitfld.byte 0x00 4.--6. " CKODIV ,Clock out input frequency division select" "/1,/2,/4,/8,/16,/32,/64,/128" newline bitfld.byte 0x00 0.--2. " CKOSEL ,Clock out source select" "HOCO,MOCO,LOCO,MOSC,SOSC,?..." group.byte 0x52++0x01 line.byte 0x00 "EBCKOCR,External Bus Clock Output Control Register" bitfld.byte 0x00 0. " EBCKOEN ,EBCLK pin output control" "Disabled,Enabled" line.byte 0x01 "SDCKOCR,SDRAM Clock Output Control Register" bitfld.byte 0x01 0. " SDCKOEN ,SDCLK pin output control" "Disabled,Enabled" group.byte 0x492++0x00 line.byte 0x00 "LOCOUTCR,LOCO User Trimming Control Register" group.byte 0x61++0x01 line.byte 0x00 "MOCOUTCR,MOCO User Trimming Control Register" line.byte 0x01 "HOCOUTCR,HOCO User Trimming Control Register" group.byte 0x3F++0x00 line.byte 0x00 "TRCKCR,Trace Clock Control Register" bitfld.byte 0x00 7. " TRCKEN ,Trace clock operation enable" "Disabled,Enabled" bitfld.byte 0x00 0.--3. " TRCK ,Trace clock operating frequency select" "/1,/2,/4,?..." width 0x0B tree.end tree "CAC (Clock Frequency Accuracy Measurement Circuit)" base ad:0x40044600 width 9. group.byte 0x00++0x03 line.byte 0x00 "CACR0,CAC Control Register 0" bitfld.byte 0x00 0. " CFME ,Clock frequency measurement enable" "Disabled,Enabled" line.byte 0x01 "CACR1,CAC Control Register 1" bitfld.byte 0x01 6.--7. " EDGES ,Valid edge select" "Rising,Falling,Rising/Falling,?..." bitfld.byte 0x01 4.--5. " TCSS ,Measurement target clock frequency division ratio select" "/1,/4,/8,/32" newline bitfld.byte 0x01 1.--3. " FMCS ,Measurement target clock select" "Main,Sub,HOCO,MOCO,LOCO,PCLKB,IWDTCLK,?..." bitfld.byte 0x01 0. " CACREFE ,CACREF pin input enable" "Disabled,Enabled" line.byte 0x02 "CACR2,CAC Control Register 2" bitfld.byte 0x02 6.--7. " DFS ,Digital filter select" "Disabled,/1,/4,/16" bitfld.byte 0x02 4.--5. " RCDS ,Measurement reference clock frequency division ratio select" "/32,/128,/1024,/8192" newline bitfld.byte 0x02 1.--3. " RSCS ,Measurement reference clock select" "Main,Sub,HOCO,MOCO,LOCO,PCLKB,IWDTCLK,?..." bitfld.byte 0x02 0. " RPS ,Reference signal select" "CACREF,Internal" line.byte 0x03 "CAICR,CAC Interrupt Control Register" bitfld.byte 0x03 6. " OVFFCL ,OVFF clear" "No effect,Clear" bitfld.byte 0x03 5. " MENDFCL ,MENDF clear" "No effect,Clear" newline bitfld.byte 0x03 4. " FERRFCL ,FERRF clear" "No effect,Clear" bitfld.byte 0x03 2. " OVFIE ,Overflow interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x03 1. " MENDIE ,Measurement end interrupt request enable" "Disabled,Enabled" bitfld.byte 0x03 0. " FERRIE ,Frequency error interrupt request enable" "Disabled,Enabled" rgroup.byte 0x04++0x00 line.byte 0x00 "CASTR,CAC Status Register" bitfld.byte 0x00 2. " OVFF ,Overflow flag" "No overflow,Overflow" bitfld.byte 0x00 1. " MENDF ,Measurement end flag" "In progress,Ended" newline bitfld.byte 0x00 0. " FERRF ,Frequency error flag" "No error,Error" sif (cpuis("R7FS7*")) group.word 0x06++0x05 line.word 0x00 "CAULVR,CAC Upper-Limit Value Setting Register" line.word 0x02 "CALLVR,CAC Lower-Limit Value Setting Register" line.word 0x4 "CACNTBR,CAC Counter Buffer Register" else group.word 0x06++0x03 line.word 0x00 "CAULVR,CAC Upper-Limit Value Setting Register" line.word 0x02 "CALLVR,CAC Lower-Limit Value Setting Register" rgroup.word 0x0A++0x01 line.word 0x00 "CACNTBR,CAC Counter Buffer Register" endif width 0x0B tree.end tree "LPM (Low-Power Modes)" base ad:0x4001E000 width 10. if (((per.w(ad:0x4001E000+0x400))&0x80)==0x80) group.word 0x0C++0x01 line.word 0x0 "SBYCR,Standby Control Register" bitfld.word 0x0 15. " SSBY ,Software standby" "Sleep mode,Deep software standby" bitfld.word 0x0 14. " OPE ,Output port enable" "Disabled,Enabled" else group.word 0x0C++0x01 line.word 0x0 "SBYCR,Standby Control Register" bitfld.word 0x0 15. " SSBY ,Software standby" "Sleep mode,Software Standby mode" bitfld.word 0x0 14. " OPE ,Output port enable" "Disabled,Enabled" endif group.long 0x1C++0x03 line.long 0x0 "MSTPCRA,Module Stop Control Register A" bitfld.long 0x0 22. " MSTPA22 ,DMA Controller/Data transfer controller module stop" "Not stopped,Stopped" bitfld.long 0x0 7. " MSTPA7 ,Standby SRAM module stop" "Not stopped,Stopped" newline bitfld.long 0x0 6. " MSTPA6 ,DED SRAM module stop" "Not stopped,Stopped" bitfld.long 0x0 5. " MSTPA5 ,High-Speed SRAM module stop" "Not stopped,Stopped" newline sif !CPUIS("R7FS5D5*") bitfld.long 0x0 1. " MSTPA1 ,SRAM1 module stop" "Not stopped,Stopped" newline endif bitfld.long 0x0 0. " MSTPA0 ,SRAM0 module stop" "Not stopped,Stopped" group.long (ad:0x40047000+0x00)++0x0B line.long 0x0 "MSTPCRB,Module Stop Control Register B" bitfld.long 0x0 31. " MSTPB31 ,Serial communication interface 0 module stop" "Not stopped,Stopped" bitfld.long 0x0 30. " MSTPB30 ,Serial communication interface 1 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 29. " MSTPB29 ,Serial communication interface 2 module stop" "Not stopped,Stopped" bitfld.long 0x0 28. " MSTPB28 ,Serial communication interface 3 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 27. " MSTPB27 ,Serial communication interface 4 module stop" "Not stopped,Stopped" bitfld.long 0x0 26. " MSTPB26 ,Serial communication interface 5 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 25. " MSTPB25 ,Serial communication interface 6 module stop" "Not stopped,Stopped" bitfld.long 0x0 24. " MSTPB24 ,Serial communication interface 7 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 23. " MSTPB23 ,Serial communication interface 8 module stop" "Not stopped,Stopped" bitfld.long 0x0 22. " MSTPB22 ,Serial communication interface 9 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 19. " MSTPB19 ,Serial peripheral interface 0 module stop" "Not stopped,Stopped" bitfld.long 0x0 18. " MSTPB18 ,Serial peripheral interface 1 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 15. " MSTPB15 ,ETHERC0 and EDMAC0 controller module stop" "Not stopped,Stopped" newline sif (cpu()!="R7FS7G27G3A01CFP")&&!CPUIS("R7FS5D5*")&&!CPUIS("R7FS5D9*") bitfld.long 0x0 14. " MSTPB14 ,ETHERC1 and EDMAC1 module stop" "Not stopped,Stopped" newline endif sif !CPUIS("R7FS5D5*") bitfld.long 0x0 13. " MSTPB13 ,EPTPC and PTPEDMAC module stop" "Not stopped,Stopped" bitfld.long 0x0 12. " MSTPB12 ,Universal serial bus 2.0 HS interface module stop" "Not stopped,Stopped" newline endif bitfld.long 0x0 11. " MSTPB11 ,Universal serial bus 2.0 FS interface module stop module stop" "Not stopped,Stopped" bitfld.long 0x0 9. " MSTPB9 ,I2C bus interface 0 module stop" "Not stopped,Stopped" newline bitfld.long 0x0 8. " MSTPB8 ,I2C bus interface 1 module stop" "Not stopped,Stopped" newline sif (cpu()!="R7FS7G27G3A01CFP") bitfld.long 0x0 7. " MSTPB7 ,I2C bus interface 2 module stop" "Not stopped,Stopped" newline endif bitfld.long 0x0 6. " MSTPB6 ,Quad serial peripheral interface module stop" "Not stopped,Stopped" bitfld.long 0x0 5. " MSTPB5 ,IrDA module stop" "Not stopped,Stopped" newline bitfld.long 0x0 2. " MSTPB2 ,Controller area network 0 module stop" "Not stopped,Stopped" bitfld.long 0x0 1. " MSTPB1 ,Controller area network 1 module stop" "Not stopped,Stopped" line.long 0x4 "MSTPCRC,Module Stop Control Register C" bitfld.long 0x4 31. " MSTPC31 ,SCE7 module stop" "Not stopped,Stopped" bitfld.long 0x4 14. " MSTPC14 ,Event link controller module stop" "Not stopped,Stopped" newline bitfld.long 0x4 13. " MSTPC13 ,Data operation circuit module stop" "Not stopped,Stopped" bitfld.long 0x4 12. " MSTPC12 ,Secure digital host IF/MultiMediaCard 0 module stop" "Not stopped,Stopped" newline bitfld.long 0x4 11. " MSTPC11 ,Secure digital host IF/MultiMediaCard 1 module stop" "Not stopped,Stopped" bitfld.long 0x4 9. " MSTPC9 ,Sampling rate converter module stop" "Not stopped,Stopped" newline bitfld.long 0x4 8. " MSTPC8 ,Synchronous serial interface 0 module stop" "Not stopped,Stopped" newline sif (cpu()!="R7FS7G27G3A01CFP")&&!CPUIS("R7FS5D5*") bitfld.long 0x4 7. " MSTPC7 ,Synchronous serial interface 1 module stop" "Not stopped,Stopped" newline endif sif !CPUIS("R7FS5D5*") bitfld.long 0x4 6. " MSTPC6 ,2D drawing engine module stop" "Not stopped,Stopped" bitfld.long 0x4 5. " MSTPC5 ,JPEG codec engine module stop" "Not stopped,Stopped" newline bitfld.long 0x4 4. " MSTPC4 ,Graphics LCD controller module stop" "Not stopped,Stopped" newline endif bitfld.long 0x4 3. " MSTPC3 ,Capacitive touch sensing unit module stop" "Not stopped,Stopped" newline bitfld.long 0x4 2. " MSTPC2 ,Parallel data capture module stop" "Not stopped,Stopped" bitfld.long 0x4 1. " MSTPC1 ,Cyclic redundancy check calculator module stop" "Not stopped,Stopped" newline bitfld.long 0x4 0. " MSTPC0 ,Clock frequency accuracy measurement circuit module stop" "Not stopped,Stopped" line.long 0x8 "MSTPCRD,Module Stop Control Register D" bitfld.long 0x8 28. " MSTPD28 ,High-Speed analog comparator 0 module stop" "Not stopped,Stopped" bitfld.long 0x8 27. " MSTPD27 ,High-Speed analog comparator 1 module stop" "Not stopped,Stopped" newline bitfld.long 0x8 26. " MSTPD26 ,High-Speed analog comparator 2 module stop" "Not stopped,Stopped" bitfld.long 0x8 25. " MSTPD25 ,High-Speed analog comparator 3 module stop" "Not stopped,Stopped" newline bitfld.long 0x8 24. " MSTPD24 ,High-Speed analog comparator 4 module stop" "Not stopped,Stopped" bitfld.long 0x8 23. " MSTPD23 ,High-Speed analog comparator 5 module stop" "Not stopped,Stopped" newline bitfld.long 0x8 22. " MSTPD22 ,Temperature sensor module stop" "Not stopped,Stopped" bitfld.long 0x8 20. " MSTPD20 ,12-Bit D/A converter module stop" "Not stopped,Stopped" newline bitfld.long 0x8 16. " MSTPD16 ,12-Bit A/D converter 0 module stop" "Not stopped,Stopped" bitfld.long 0x8 15. " MSTPD15 ,12-Bit A/D converter 1 module stop" "Not stopped,Stopped" newline bitfld.long 0x8 14. " MSTPD14 ,Port output enable for GPT module stop" "Not stopped,Stopped" bitfld.long 0x8 6. " MSTPD6 ,General PWM timer 328 to 3213 module stop" "Not stopped,Stopped" newline bitfld.long 0x8 5. " MSTPD5 ,General PWM timer 32EH0 to 32EH3 and 32E4 to 32E7 module stop" "Not stopped,Stopped" bitfld.long 0x8 3. " MSTPD3 ,Asynchronous general purpose timer 0 module stop" "Not stopped,Stopped" newline bitfld.long 0x8 2. " MSTPD2 ,Asynchronous general purpose timer 1 module stop" "Not stopped,Stopped" group.byte 0xA0++0x00 line.byte 0x0 "OPCCR,Operating Power Control Register" rbitfld.byte 0x0 4. " OPCMTSF ,Operating power control mode transition status flag" "Completed,In progress" bitfld.byte 0x0 0.--1. " OPCM ,Operating power control mode select" "High-speed,,,Low-speed" group.byte 0xAA++0x00 line.byte 0x0 "SOPCCR,Sub Operating Power Control Register" sif CPUIS("R7FS5D5*")||CPUIS("R7FS5D9*") rbitfld.byte 0x0 4. " SOPCMTSF ,Sub operating power control mode transition status flag" "Completed,In progress" else bitfld.byte 0x0 4. " SOPCMTSF ,Sub operating power control mode transition status flag" "Completed,In progress" endif bitfld.byte 0x0 0. " SOPCM ,Sub operating power control mode select" "No Subosc-speed,Subosc-speed" group.byte 0x92++0x00 line.byte 0x0 "SNZCR,Snooze Control Register" bitfld.byte 0x0 7. " SNZE ,Snooze mode enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SNZDTCEN ,DTC enable in snooze mode" "Disabled,Enabled" newline bitfld.byte 0x0 0. " RXDREQEN ,RXD0 snooze request enable" "Disabled,Enabled" group.byte 0x94++0x00 line.byte 0x0 "SNZEDCR,Snooze End Control Register" bitfld.byte 0x0 7. " SCI0UMTED ,SCI0 address mismatch snooze end enable" "Disabled,Enabled" bitfld.byte 0x0 6. " AD1UMTED ,AD compare mismatch 1 snooze end enable" "Disabled,Enabled" newline bitfld.byte 0x0 5. " AD1MATED ,AD compare match 1 snooze end enable" "Disabled,Enabled" bitfld.byte 0x0 4. " AD0UMTED ,AD compare mismatch 0 snooze end enable" "Disabled,Enabled" newline bitfld.byte 0x0 3. " AD0MATED ,AD compare match 0 snooze end enable" "Disabled,Enabled" bitfld.byte 0x0 2. " DTCNZRED ,Not last DTC transmission completion snooze end enable" "Disabled,Enabled" newline bitfld.byte 0x0 1. " DTCZRED ,Last DTC transmission completion snooze end enable" "Disabled,Enabled" bitfld.byte 0x0 0. " AGTUNFED ,AGT1 underflow snooze end enable" "Disabled,Enabled" group.long 0x98++0x03 line.long 0x0 "SNZREQCR,Snooze Request Control Register" bitfld.long 0x0 30. " SNZREQEN30 ,Snooze request enable 30" "Disabled,Enabled" bitfld.long 0x0 29. " SNZREQEN29 ,Snooze request enable 29" "Disabled,Enabled" newline bitfld.long 0x0 28. " SNZREQEN28 ,Snooze request enable 28" "Disabled,Enabled" bitfld.long 0x0 25. " SNZREQEN25 ,Snooze request enable 25" "Disabled,Enabled" newline bitfld.long 0x0 24. " SNZREQEN24 ,Snooze request enable 24" "Disabled,Enabled" bitfld.long 0x0 22. " SNZREQEN22 ,Snooze request enable 22" "Disabled,Enabled" newline bitfld.long 0x0 17. " SNZREQEN17 ,Snooze request enable 17" "Disabled,Enabled" bitfld.long 0x0 15. " SNZREQEN15 ,Snooze request enable 15" "Disabled,Enabled" newline bitfld.long 0x0 14. " SNZREQEN14 ,Snooze request enable 14" "Disabled,Enabled" bitfld.long 0x0 13. " SNZREQEN13 ,Snooze request enable 13" "Disabled,Enabled" newline bitfld.long 0x0 12. " SNZREQEN12 ,Snooze request enable 12" "Disabled,Enabled" bitfld.long 0x0 11. " SNZREQEN11 ,Snooze request enable 11" "Disabled,Enabled" newline bitfld.long 0x0 10. " SNZREQEN10 ,Snooze request enable 10" "Disabled,Enabled" bitfld.long 0x0 9. " SNZREQEN9 ,Snooze request enable 9" "Disabled,Enabled" newline bitfld.long 0x0 8. " SNZREQEN8 ,Snooze request enable 8" "Disabled,Enabled" bitfld.long 0x0 7. " SNZREQEN7 ,Snooze request enable 7" "Disabled,Enabled" newline bitfld.long 0x0 6. " SNZREQEN6 ,Snooze request enable 6" "Disabled,Enabled" bitfld.long 0x0 5. " SNZREQEN5 ,Snooze request enable 5" "Disabled,Enabled" newline bitfld.long 0x0 4. " SNZREQEN4 ,Snooze request enable 4" "Disabled,Enabled" bitfld.long 0x0 3. " SNZREQEN3 ,Snooze request enable 3" "Disabled,Enabled" newline bitfld.long 0x0 2. " SNZREQEN2 ,Snooze request enable 2" "Disabled,Enabled" bitfld.long 0x0 1. " SNZREQEN1 ,Snooze request enable 1" "Disabled,Enabled" newline bitfld.long 0x0 0. " SNZREQEN0 ,Snooze request enable 0" "Disabled,Enabled" if (((per.w(ad:0x4001E000+0x0C))&0x8000)==0x8000) group.byte 0x400++0x00 line.byte 0x0 "DPSBYCR,Deep Software Standby Control Register" bitfld.byte 0x0 7. " DPSBY ,Deep software standby" "Software Standby,Deep Software Standby" bitfld.byte 0x0 6. " IOKEEP ,I/O port retention" "Cleared,Not cleared" newline bitfld.byte 0x0 0.--1. " DEEPCUT ,Power-Supply control" "Supply,Do not supply,,Do not supply" else group.byte 0x400++0x00 line.byte 0x0 "DPSBYCR,Deep Software Standby Control Register" bitfld.byte 0x0 7. " DPSBY ,Deep software standby" "Sleep mode,Sleep mode" bitfld.byte 0x0 6. " IOKEEP ,I/O port retention" "Cleared,Not cleared" newline bitfld.byte 0x0 0.--1. " DEEPCUT ,Power-Supply control" "Supply,Do not supply,,Do not supply" endif group.byte 0x402++0x01 line.byte 0x0 "DPSIER0,Deep Software Standby Interrupt Enable Register 0" bitfld.byte 0x0 7. " DIRQ7E ,IRQ7-DS pin enable" "Disabled,Enabled" bitfld.byte 0x0 6. " DIRQ6E ,IRQ6-DS pin enable" "Disabled,Enabled" newline bitfld.byte 0x0 5. " DIRQ5E ,IRQ5-DS pin enable" "Disabled,Enabled" bitfld.byte 0x0 4. " DIRQ4E ,IRQ4-DS pin enable" "Disabled,Enabled" newline bitfld.byte 0x0 3. " DIRQ3E ,IRQ3-DS pin enable" "Disabled,Enabled" bitfld.byte 0x0 2. " DIRQ2E ,IRQ2-DS pin enable" "Disabled,Enabled" newline bitfld.byte 0x0 1. " DIRQ1E ,IRQ1-DS pin enable" "Disabled,Enabled" bitfld.byte 0x0 0. " DIRQ0E ,IRQ0-DS pin enable" "Disabled,Enabled" line.byte 0x1 "DPSIER1,Deep Software Standby Interrupt Enable Register 1" sif !CPUIS("R7FS5D5*")&&!CPUIS("R7FS5D9*") bitfld.byte 0x1 7. " DIRQ15E ,IRQ15-DS pin enable" "Disabled,Enabled" endif sif !CPUIS("R7FS5D5*") bitfld.byte 0x1 6. " DIRQ14E ,IRQ14-DS pin enable" "Disabled,Enabled" newline endif bitfld.byte 0x1 5. " DIRQ13E ,IRQ13-DS pin enable" "Disabled,Enabled" bitfld.byte 0x1 4. " DIRQ12E ,IRQ12-DS pin enable" "Disabled,Enabled" newline bitfld.byte 0x1 3. " DIRQ11E ,IRQ11-DS pin enable" "Disabled,Enabled" bitfld.byte 0x1 2. " DIRQ10E ,IRQ10-DS pin enable" "Disabled,Enabled" newline bitfld.byte 0x1 1. " DIRQ9E ,IRQ9-DS pin enable" "Disabled,Enabled" bitfld.byte 0x1 0. " DIRQ8E ,IRQ8-DS pin enable" "Disabled,Enabled" group.byte 0x404++0x08 line.byte 0x0 "DPSIER2,Deep Software Standby Interrupt Enable Register 2" bitfld.byte 0x0 4. " DNMIE ,NMI pin enable" "Disabled,Enabled" bitfld.byte 0x0 3. " DRTCAIE ,RTC alarm interrupt deep software standby cancel signal enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " DRTCIIE ,RTC interval interrupt deep software standby cancel signal enable" "Disabled,Enabled" bitfld.byte 0x0 1. " DLVD2IE ,LVD2 deep software standby cancel signal enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DLVD1IE ,LVD1 deep software standby cancel signal enable" "Disabled,Enabled" line.byte 0x1 "DPSIER3,Deep Software Standby Interrupt Enable Register 3" sif CPUIS("R7FS5D5*") bitfld.byte 0x1 2. " DAGT1IF ,AGT1 underflow deep software standby cancel flag" "Not generated,Generated" newline else bitfld.byte 0x1 2. " DTA1IE ,AGT1 underflow deep software standby cancel signal enable" "Disabled,Enabled" newline endif sif !CPUIS("R7FS5D5*") bitfld.byte 0x1 1. " DUSBHSIE ,USBHS Suspend/Resume deep software standby cancel signal enable" "Disabled,Enabled" newline endif bitfld.byte 0x1 0. " DUSBFSIE ,USBFS Suspend/Resume deep software standby cancel signal enable" "Disabled,Enabled" line.byte 0x2 "DPSIFR0,Deep Software Standby Interrupt Flag Register 0" bitfld.byte 0x2 7. " DIRQ7F ,IRQ7-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x2 6. " DIRQ6F ,IRQ6-DS deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x2 5. " DIRQ5F ,IRQ5-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x2 4. " DIRQ4F ,IRQ4-DS deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x2 3. " DIRQ3F ,IRQ3-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x2 2. " DIRQ2F ,IRQ2-DS deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x2 1. " DIRQ1F ,IRQ1-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x2 0. " DIRQ0F ,IRQ0-DS deep software standby cancel flag" "Not generated,Generated" line.byte 0x3 "DPSIFR1,Deep Software Standby Interrupt Flag Register 1" sif !CPUIS("R7FS5D5*")&&!CPUIS("R7FS5D9*") bitfld.byte 0x3 7. " DIRQ15F ,IRQ15-DS deep software standby cancel flag" "Not generated,Generated" endif sif !CPUIS("R7FS5D5*") bitfld.byte 0x3 6. " DIRQ14F ,IRQ14-DS deep software standby cancel flag" "Not generated,Generated" newline endif bitfld.byte 0x3 5. " DIRQ13F ,IRQ13-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x3 4. " DIRQ12F ,IRQ12-DS deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x3 3. " DIRQ11F ,IRQ11-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x3 2. " DIRQ10F ,IRQ10-DS deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x3 1. " DIRQ9F ,IRQ9-DS deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x3 0. " DIRQ8F ,IRQ8-DS deep software standby cancel flag" "Not generated,Generated" line.byte 0x4 "DPSIFR2,Deep Software Standby Interrupt Flag Register 2" bitfld.byte 0x4 4. " DNMIF ,NMI deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x4 3. " DRTCAIF ,RTC alarm interrupt deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x4 2. " DRTCIIF ,RTC interval interrupt deep software standby cancel flag" "Not generated,Generated" bitfld.byte 0x4 1. " DLVD2IF ,LVD2 deep software standby cancel flag" "Not generated,Generated" newline bitfld.byte 0x4 0. " DLVD1IF ,LVD1 deep software standby cancel flag" "Not generated,Generated" line.byte 0x5 "DPSIFR3,Deep Software Standby Interrupt Flag Register 3" sif cpuis("R7FS5D5*") bitfld.byte 0x5 2. " DAGT1IF ,AGT1 underflow deep software standby cancel flag" "Not generated,Generated" else bitfld.byte 0x5 2. " DTA1IF ,AGT1 underflow deep software standby cancel flag" "Not generated,Generated" endif newline sif !CPUIS("R7FS5D5*") bitfld.byte 0x5 1. " DUSBHSIF ,USBHS Suspend/Resume deep software standby cancel flag" "Not generated,Generated" newline endif bitfld.byte 0x5 0. " DUSBFSIF ,USBFS Suspend/Resume deep software standby cancel flag" "Not generated,Generated" line.byte 0x6 "DPSIEGR0,Deep Software Standby Interrupt Edge Register 0" bitfld.byte 0x6 7. " DIRQ7EG ,IRQ7-DS pin edge select" "Falling,Rising" bitfld.byte 0x6 6. " DIRQ6EG ,IRQ6-DS pin edge select" "Falling,Rising" newline bitfld.byte 0x6 5. " DIRQ5EG ,IRQ5-DS pin edge select" "Falling,Rising" bitfld.byte 0x6 4. " DIRQ4EG ,IRQ4-DS pin edge select" "Falling,Rising" newline bitfld.byte 0x6 3. " DIRQ3EG ,IRQ3-DS pin edge select" "Falling,Rising" bitfld.byte 0x6 2. " DIRQ2EG ,IRQ2-DS pin edge select" "Falling,Rising" newline bitfld.byte 0x6 1. " DIRQ1EG ,IRQ1-DS pin edge select" "Falling,Rising" bitfld.byte 0x6 0. " DIRQ0EG ,IRQ0-DS pin edge select" "Falling,Rising" line.byte 0x7 "DPSIEGR1,Deep Software Standby Interrupt Edge Register 1" sif !CPUIS("R7FS5D5*")&&!CPUIS("R7FS5D9*") bitfld.byte 0x7 7. " DIRQ15EG ,IRQ15-DS pin edge select" "Falling,Rising" endif sif !CPUIS("R7FS5D5*") bitfld.byte 0x7 6. " DIRQ14EG ,IRQ14-DS pin edge select" "Falling,Rising" newline endif bitfld.byte 0x7 5. " DIRQ13EG ,IRQ13-DS pin edge select" "Falling,Rising" bitfld.byte 0x7 4. " DIRQ12EG ,IRQ12-DS pin edge select" "Falling,Rising" newline bitfld.byte 0x7 3. " DIRQ11EG ,IRQ11-DS pin edge select" "Falling,Rising" bitfld.byte 0x7 2. " DIRQ10EG ,IRQ10-DS pin edge select" "Falling,Rising" newline bitfld.byte 0x7 1. " DIRQ9EG ,IRQ9-DS pin edge select" "Falling,Rising" bitfld.byte 0x7 0. " DIRQ8EG ,IRQ8-DS pin edge select" "Falling,Rising" line.byte 0x8 "DPSIEGR2,Deep Software Standby Interrupt Edge Register 2" bitfld.byte 0x8 4. " DNMIEG ,NMI pin edge select" "Falling,Rising" bitfld.byte 0x8 1. " DLVD2EG ,LVD2 edge select" "Falling,Rising" newline bitfld.byte 0x8 0. " DLVD1EG ,LVD1 edge select" "Falling,Rising" group.byte 0x40E++0x01 line.byte 0x0 "SYOCDCR,System Control OCD Control Register" bitfld.byte 0x0 7. " DBGEN ,Debugger enable bit" "Disabled,Enabled" bitfld.byte 0x0 0. " DOCDF ,Deep software standby OCD flag" "DBIRQ not generated,DBIRQ generated" line.byte 0x1 "STCONR,Standby Condition Register" sif CPUIS("R7FS5D5*")||CPUIS("R7FS5D9*") bitfld.byte 0x1 0.--1. " STCON ,SSTBY condition bit" "Using HOCO,,,Not using HOCO" newline else bitfld.byte 0x1 1. " STCON ,SSTBY condition bit" "0,1" newline endif width 0x0B tree.end tree "BBF (Battery Backup Function)" base ad:0x4001E000 width 10. group.byte 0x500++0x00 line.byte 0x00 "VBTBKR,VBATT Backup Register" button "VBTBKR 0-511" "Data ad:0x4001E500--ad:0x4001E6FF /byte" group.byte 0x4BB++0x00 line.byte 0x00 "VBTICTLR,VBATT Input Control Register" bitfld.byte 0x00 2. " VCH2INEN ,VBATT CH2 input enable" "Disabled,Enabled" bitfld.byte 0x00 1. " VCH1INEN ,VBATT CH1 input enable" "Disabled,Enabled" bitfld.byte 0x00 0. " VCH0INEN ,VBATT CH0 input enable" "Disabled,Enabled" width 0x0B tree.end tree "RWP (Register Write Protection)" base ad:0x4001E3FE width 6. group.word 0x00++0x01 line.word 0x00 "PRCR,Protect Register" hexmask.word.byte 0x00 8.--15. 1. " PRKEY ,PRC Key Code" bitfld.word 0x00 3. " PRC3 ,Enables writing to the registers related to the LVD" "Disabled,Enabled" newline bitfld.word 0x00 1. " PRC1 ,Enables writing to the registers related to the low-power modes and the battery backup function" "Disabled,Enabled" bitfld.word 0x00 0. " PRC0 ,Enables writing to the registers related to the Clock Generation Circuit" "Disabled,Enabled" width 0x0B tree.end tree "ICU (Interrupt Controller Unit)" base ad:0x40006000 width 9. group.byte (0x0)++0x00 line.byte 0x00 "IRQCR0,IRQ Control Register 0" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x1)++0x00 line.byte 0x00 "IRQCR1,IRQ Control Register 1" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x2)++0x00 line.byte 0x00 "IRQCR2,IRQ Control Register 2" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x3)++0x00 line.byte 0x00 "IRQCR3,IRQ Control Register 3" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x4)++0x00 line.byte 0x00 "IRQCR4,IRQ Control Register 4" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x5)++0x00 line.byte 0x00 "IRQCR5,IRQ Control Register 5" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x6)++0x00 line.byte 0x00 "IRQCR6,IRQ Control Register 6" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x7)++0x00 line.byte 0x00 "IRQCR7,IRQ Control Register 7" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x8)++0x00 line.byte 0x00 "IRQCR8,IRQ Control Register 8" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0x9)++0x00 line.byte 0x00 "IRQCR9,IRQ Control Register 9" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0xA)++0x00 line.byte 0x00 "IRQCR10,IRQ Control Register 10" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0xB)++0x00 line.byte 0x00 "IRQCR11,IRQ Control Register 11" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0xC)++0x00 line.byte 0x00 "IRQCR12,IRQ Control Register 12" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0xD)++0x00 line.byte 0x00 "IRQCR13,IRQ Control Register 13" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0xE)++0x00 line.byte 0x00 "IRQCR14,IRQ Control Register 14" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" group.byte (0xF)++0x00 line.byte 0x00 "IRQCR15,IRQ Control Register 15" bitfld.byte 0x00 7. " FLTEN ,IRQi digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " FCLKSEL ,IRQi digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0.--1. " IRQMD ,IRQi detection sense select" "Falling edge,Rising edge,Both edges,Low level" newline group.word 0x140++0x01 line.word 0x00 "NMISR,Non-Maskable Interrupt Status Register" setclrfld.word 0x00 12. -0x20 12. -0x10 12. " SPEST_set/clr ,CPU stack pointer monitor interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x00 11. -0x20 11. -0x10 11. " BUSMST_set/clr ,MPU bus master error interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x00 10. -0x20 10. -0x10 10. " BUSSST_set/clr ,MPU bus slave error interrupt flag" "No interrupt,Interrupt" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") setclrfld.word 0x00 9. -0x20 9. -0x10 9. " RECCST_set/clr ,SRAM ECC error interrupt flag" "No interrupt,Interrupt" else setclrfld.word 0x00 9. -0x20 9. -0x10 9. " RDEDST_set/clr ,SRAM DED error interrupt flag" "No interrupt,Interrupt" endif newline setclrfld.word 0x00 8. -0x20 8. -0x10 8. " RPEST_set/clr ,SRAM parity error interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x00 7. -0x20 7. -0x10 7. " NMIST_set/clr ,NMI flag" "No interrupt,Interrupt" setclrfld.word 0x00 6. -0x20 6. -0x10 6. " OSTST_set/clr ,Main oscillation stop detection interrupt flag" "No interrupt,Interrupt" newline setclrfld.word 0x00 3. -0x20 3. -0x10 3. " LVD2ST_set/clr ,Voltage monitor 2 interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x00 2. -0x20 2. -0x10 2. " LVD1ST_set/clr ,Voltage monitor 1 interrupt flag" "No interrupt,Interrupt" setclrfld.word 0x00 1. -0x20 1. -0x10 1. " WDTST_set/clr ,WDT Underflow/Refresh error flag" "No interrupt,Interrupt" newline setclrfld.word 0x00 0. -0x20 0. -0x10 0. " IWDTST_set/clr ,IWDT Underflow/Refresh error flag" "No interrupt,Interrupt" group.byte 0x100++0x01 line.byte 0x00 "NMICR,NMI Pin Interrupt Control Register" bitfld.byte 0x00 7. " NFLTEN ,NMI digital filter enable" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " NFCLKSEL ,NMI digital filter sampling clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/64" bitfld.byte 0x00 0. " NMIMD ,NMI detection set" "Falling edge,Rising edge" tree "ICU Event Link Setting Registers" group.long (0x300)++0x03 line.long 0x00 "IELSR0,ICU Event Link Setting Register 0" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x304)++0x03 line.long 0x00 "IELSR1,ICU Event Link Setting Register 1" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x308)++0x03 line.long 0x00 "IELSR2,ICU Event Link Setting Register 2" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x30C)++0x03 line.long 0x00 "IELSR3,ICU Event Link Setting Register 3" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x310)++0x03 line.long 0x00 "IELSR4,ICU Event Link Setting Register 4" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x314)++0x03 line.long 0x00 "IELSR5,ICU Event Link Setting Register 5" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x318)++0x03 line.long 0x00 "IELSR6,ICU Event Link Setting Register 6" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x31C)++0x03 line.long 0x00 "IELSR7,ICU Event Link Setting Register 7" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x320)++0x03 line.long 0x00 "IELSR8,ICU Event Link Setting Register 8" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x324)++0x03 line.long 0x00 "IELSR9,ICU Event Link Setting Register 9" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x328)++0x03 line.long 0x00 "IELSR10,ICU Event Link Setting Register 10" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x32C)++0x03 line.long 0x00 "IELSR11,ICU Event Link Setting Register 11" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x330)++0x03 line.long 0x00 "IELSR12,ICU Event Link Setting Register 12" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x334)++0x03 line.long 0x00 "IELSR13,ICU Event Link Setting Register 13" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x338)++0x03 line.long 0x00 "IELSR14,ICU Event Link Setting Register 14" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x33C)++0x03 line.long 0x00 "IELSR15,ICU Event Link Setting Register 15" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x340)++0x03 line.long 0x00 "IELSR16,ICU Event Link Setting Register 16" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x344)++0x03 line.long 0x00 "IELSR17,ICU Event Link Setting Register 17" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x348)++0x03 line.long 0x00 "IELSR18,ICU Event Link Setting Register 18" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x34C)++0x03 line.long 0x00 "IELSR19,ICU Event Link Setting Register 19" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x350)++0x03 line.long 0x00 "IELSR20,ICU Event Link Setting Register 20" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x354)++0x03 line.long 0x00 "IELSR21,ICU Event Link Setting Register 21" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x358)++0x03 line.long 0x00 "IELSR22,ICU Event Link Setting Register 22" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x35C)++0x03 line.long 0x00 "IELSR23,ICU Event Link Setting Register 23" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x360)++0x03 line.long 0x00 "IELSR24,ICU Event Link Setting Register 24" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x364)++0x03 line.long 0x00 "IELSR25,ICU Event Link Setting Register 25" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x368)++0x03 line.long 0x00 "IELSR26,ICU Event Link Setting Register 26" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x36C)++0x03 line.long 0x00 "IELSR27,ICU Event Link Setting Register 27" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x370)++0x03 line.long 0x00 "IELSR28,ICU Event Link Setting Register 28" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x374)++0x03 line.long 0x00 "IELSR29,ICU Event Link Setting Register 29" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x378)++0x03 line.long 0x00 "IELSR30,ICU Event Link Setting Register 30" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x37C)++0x03 line.long 0x00 "IELSR31,ICU Event Link Setting Register 31" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x380)++0x03 line.long 0x00 "IELSR32,ICU Event Link Setting Register 32" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x384)++0x03 line.long 0x00 "IELSR33,ICU Event Link Setting Register 33" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x388)++0x03 line.long 0x00 "IELSR34,ICU Event Link Setting Register 34" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x38C)++0x03 line.long 0x00 "IELSR35,ICU Event Link Setting Register 35" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x390)++0x03 line.long 0x00 "IELSR36,ICU Event Link Setting Register 36" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x394)++0x03 line.long 0x00 "IELSR37,ICU Event Link Setting Register 37" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x398)++0x03 line.long 0x00 "IELSR38,ICU Event Link Setting Register 38" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x39C)++0x03 line.long 0x00 "IELSR39,ICU Event Link Setting Register 39" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3A0)++0x03 line.long 0x00 "IELSR40,ICU Event Link Setting Register 40" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3A4)++0x03 line.long 0x00 "IELSR41,ICU Event Link Setting Register 41" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3A8)++0x03 line.long 0x00 "IELSR42,ICU Event Link Setting Register 42" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3AC)++0x03 line.long 0x00 "IELSR43,ICU Event Link Setting Register 43" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3B0)++0x03 line.long 0x00 "IELSR44,ICU Event Link Setting Register 44" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3B4)++0x03 line.long 0x00 "IELSR45,ICU Event Link Setting Register 45" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3B8)++0x03 line.long 0x00 "IELSR46,ICU Event Link Setting Register 46" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3BC)++0x03 line.long 0x00 "IELSR47,ICU Event Link Setting Register 47" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3C0)++0x03 line.long 0x00 "IELSR48,ICU Event Link Setting Register 48" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3C4)++0x03 line.long 0x00 "IELSR49,ICU Event Link Setting Register 49" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3C8)++0x03 line.long 0x00 "IELSR50,ICU Event Link Setting Register 50" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3CC)++0x03 line.long 0x00 "IELSR51,ICU Event Link Setting Register 51" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3D0)++0x03 line.long 0x00 "IELSR52,ICU Event Link Setting Register 52" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3D4)++0x03 line.long 0x00 "IELSR53,ICU Event Link Setting Register 53" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3D8)++0x03 line.long 0x00 "IELSR54,ICU Event Link Setting Register 54" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3DC)++0x03 line.long 0x00 "IELSR55,ICU Event Link Setting Register 55" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3E0)++0x03 line.long 0x00 "IELSR56,ICU Event Link Setting Register 56" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3E4)++0x03 line.long 0x00 "IELSR57,ICU Event Link Setting Register 57" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3E8)++0x03 line.long 0x00 "IELSR58,ICU Event Link Setting Register 58" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3EC)++0x03 line.long 0x00 "IELSR59,ICU Event Link Setting Register 59" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3F0)++0x03 line.long 0x00 "IELSR60,ICU Event Link Setting Register 60" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3F4)++0x03 line.long 0x00 "IELSR61,ICU Event Link Setting Register 61" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3F8)++0x03 line.long 0x00 "IELSR62,ICU Event Link Setting Register 62" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x3FC)++0x03 line.long 0x00 "IELSR63,ICU Event Link Setting Register 63" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x400)++0x03 line.long 0x00 "IELSR64,ICU Event Link Setting Register 64" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x404)++0x03 line.long 0x00 "IELSR65,ICU Event Link Setting Register 65" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x408)++0x03 line.long 0x00 "IELSR66,ICU Event Link Setting Register 66" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x40C)++0x03 line.long 0x00 "IELSR67,ICU Event Link Setting Register 67" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x410)++0x03 line.long 0x00 "IELSR68,ICU Event Link Setting Register 68" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x414)++0x03 line.long 0x00 "IELSR69,ICU Event Link Setting Register 69" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x418)++0x03 line.long 0x00 "IELSR70,ICU Event Link Setting Register 70" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x41C)++0x03 line.long 0x00 "IELSR71,ICU Event Link Setting Register 71" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x420)++0x03 line.long 0x00 "IELSR72,ICU Event Link Setting Register 72" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x424)++0x03 line.long 0x00 "IELSR73,ICU Event Link Setting Register 73" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x428)++0x03 line.long 0x00 "IELSR74,ICU Event Link Setting Register 74" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x42C)++0x03 line.long 0x00 "IELSR75,ICU Event Link Setting Register 75" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x430)++0x03 line.long 0x00 "IELSR76,ICU Event Link Setting Register 76" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x434)++0x03 line.long 0x00 "IELSR77,ICU Event Link Setting Register 77" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x438)++0x03 line.long 0x00 "IELSR78,ICU Event Link Setting Register 78" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x43C)++0x03 line.long 0x00 "IELSR79,ICU Event Link Setting Register 79" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x440)++0x03 line.long 0x00 "IELSR80,ICU Event Link Setting Register 80" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x444)++0x03 line.long 0x00 "IELSR81,ICU Event Link Setting Register 81" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x448)++0x03 line.long 0x00 "IELSR82,ICU Event Link Setting Register 82" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x44C)++0x03 line.long 0x00 "IELSR83,ICU Event Link Setting Register 83" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x450)++0x03 line.long 0x00 "IELSR84,ICU Event Link Setting Register 84" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x454)++0x03 line.long 0x00 "IELSR85,ICU Event Link Setting Register 85" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x458)++0x03 line.long 0x00 "IELSR86,ICU Event Link Setting Register 86" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x45C)++0x03 line.long 0x00 "IELSR87,ICU Event Link Setting Register 87" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x460)++0x03 line.long 0x00 "IELSR88,ICU Event Link Setting Register 88" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x464)++0x03 line.long 0x00 "IELSR89,ICU Event Link Setting Register 89" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x468)++0x03 line.long 0x00 "IELSR90,ICU Event Link Setting Register 90" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x46C)++0x03 line.long 0x00 "IELSR91,ICU Event Link Setting Register 91" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x470)++0x03 line.long 0x00 "IELSR92,ICU Event Link Setting Register 92" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x474)++0x03 line.long 0x00 "IELSR93,ICU Event Link Setting Register 93" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x478)++0x03 line.long 0x00 "IELSR94,ICU Event Link Setting Register 94" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" group.long (0x47C)++0x03 line.long 0x00 "IELSR95,ICU Event Link Setting Register 95" bitfld.long 0x00 24. " DTCE ,DTC activation enable" "Disabled,Enabled" bitfld.long 0x00 16. " IR ,Interrupt status flag" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " IELS ,ICU event link select" tree.end sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x280)++0x03 line.long 0x00 "DELSR0,DMAC Event Link Setting Register 0" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x280)++0x01 line.word 0x00 "DELSR0,DMAC Event Link Setting Register 0" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x284)++0x03 line.long 0x00 "DELSR1,DMAC Event Link Setting Register 1" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x284)++0x01 line.word 0x00 "DELSR1,DMAC Event Link Setting Register 1" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x288)++0x03 line.long 0x00 "DELSR2,DMAC Event Link Setting Register 2" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x288)++0x01 line.word 0x00 "DELSR2,DMAC Event Link Setting Register 2" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x28C)++0x03 line.long 0x00 "DELSR3,DMAC Event Link Setting Register 3" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x28C)++0x01 line.word 0x00 "DELSR3,DMAC Event Link Setting Register 3" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x290)++0x03 line.long 0x00 "DELSR4,DMAC Event Link Setting Register 4" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x290)++0x01 line.word 0x00 "DELSR4,DMAC Event Link Setting Register 4" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x294)++0x03 line.long 0x00 "DELSR5,DMAC Event Link Setting Register 5" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x294)++0x01 line.word 0x00 "DELSR5,DMAC Event Link Setting Register 5" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x298)++0x03 line.long 0x00 "DELSR6,DMAC Event Link Setting Register 6" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x298)++0x01 line.word 0x00 "DELSR6,DMAC Event Link Setting Register 6" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x29C)++0x03 line.long 0x00 "DELSR7,DMAC Event Link Setting Register 7" bitfld.long 0x00 16. " IR ,Interrupt status flag for DMAC" "No interrupt,Interrupt" hexmask.long.word 0x00 0.--8. 1. " DELS ,DMAC event link select" else group.word (0x29C)++0x01 line.word 0x00 "DELSR7,DMAC Event Link Setting Register 7" hexmask.word 0x00 0.--8. 1. " DELS ,DMAC event link select" endif group.word 0x200++0x01 line.word 0x00 "SELSR0,SYS Event Link Setting Register" hexmask.word 0x00 0.--8. 1. " SELS ,SYS event link select" group.long 0x1A0++0x03 line.long 0x00 "WUPEN,Wake Up Interrupt Enable Register" bitfld.long 0x00 31. " IIC0WUPEN ,IIC0 address match interrupt software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 30. " AGT1CBWUPEN ,AGT1 compare match b interrupt software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 29. " AGT1CAWUPEN ,AGT1 compare match a interrupt software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 28. " AGT1UDWUPEN ,AGT1 underflow interrupt software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " USBFSWUPEN ,USBFS interrupt software standby returns enable" "Disabled,Enabled" sif !cpuis("R7FS5D5*") bitfld.long 0x00 26. " USBHSWUPEN ,USBHS interrupt software standby returns enable" "Disabled,Enabled" endif newline bitfld.long 0x00 25. " RTCPRDWUPEN ,RTC period interrupt software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 24. " RTCALMWUPEN ,RTC alarm interrupt software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 22. " ACMPHS0WUPEN ,ACMPHS0 interrupt software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 19. " LVD2WUPEN ,LVD2 interrupt software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " LVD1WUPEN ,LVD1 interrupt software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 17. " KEYWUPEN ,Key interrupt software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 16. " IWDTWUPEN ,IWDT interrupt software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " IRQWUPEN[15] ,IRQ interrupt 15 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 14. " IRQWUPEN[14] ,IRQ interrupt 14 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 13. " IRQWUPEN[13] ,IRQ interrupt 13 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 12. " IRQWUPEN[12] ,IRQ interrupt 12 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " IRQWUPEN[11] ,IRQ interrupt 11 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 10. " IRQWUPEN[10] ,IRQ interrupt 10 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " IRQWUPEN[9] ,IRQ interrupt 9 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 8. " IRQWUPEN[8] ,IRQ interrupt 8 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " IRQWUPEN[7] ,IRQ interrupt 7 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 6. " IRQWUPEN[6] ,IRQ interrupt 6 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " IRQWUPEN[5] ,IRQ interrupt 5 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 4. " IRQWUPEN[4] ,IRQ interrupt 4 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " IRQWUPEN[3] ,IRQ interrupt 3 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 2. " IRQWUPEN[2] ,IRQ interrupt 2 software standby returns enable" "Disabled,Enabled" newline bitfld.long 0x00 1. " IRQWUPEN[1] ,IRQ interrupt 1 software standby returns enable" "Disabled,Enabled" bitfld.long 0x00 0. " IRQWUPEN[0] ,IRQ interrupt 0 software standby returns enable" "Disabled,Enabled" width 0x0B tree.end tree "Bus" base ad:0x40003000 width 14. group.word (0x802)++0x01 line.word 0x00 "CS0CR,CS0 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x812)++0x01 line.word 0x00 "CS1CR,CS1 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x822)++0x01 line.word 0x00 "CS2CR,CS2 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x832)++0x01 line.word 0x00 "CS3CR,CS3 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x842)++0x01 line.word 0x00 "CS4CR,CS4 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x852)++0x01 line.word 0x00 "CS5CR,CS5 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x862)++0x01 line.word 0x00 "CS6CR,CS6 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" group.word (0x872)++0x01 line.word 0x00 "CS7CR,CS7 Control Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 12. " MPXEN ,Address/Data multiplexed I/O interface select" "Separate bus,Multiplexed I/O" endif bitfld.word 0x00 8. " EMODE ,Endian mode" "Little,Big" bitfld.word 0x00 4.--5. " BSIZE ,External bus width select" "16-bit,,8-bit,?..." bitfld.word 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" newline group.word (0x80A)++0x01 line.word 0x00 "CS0REC,CS0 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x81A)++0x01 line.word 0x00 "CS1REC,CS1 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x82A)++0x01 line.word 0x00 "CS2REC,CS2 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x83A)++0x01 line.word 0x00 "CS3REC,CS3 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x84A)++0x01 line.word 0x00 "CS4REC,CS4 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x85A)++0x01 line.word 0x00 "CS5REC,CS5 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x86A)++0x01 line.word 0x00 "CS6REC,CS6 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word (0x87A)++0x01 line.word 0x00 "CS7REC,CS7 Recovery Cycle Register" bitfld.word 0x00 8.--11. " WRCV ,Write recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.word 0x00 0.--3. " RRCV ,Read recovery" "Disabled,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" group.word 0x880++0x01 line.word 0x00 "CSRECEN,CS Recovery Cycle Insertion Enable Register" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x00 15. " RCVENM7 ,Multiplexed bus recovery cycle insertion enable 7" "Disabled,Enabled" bitfld.word 0x00 14. " RCVENM6 ,Multiplexed bus recovery cycle insertion enable 6" "Disabled,Enabled" bitfld.word 0x00 13. " RCVENM5 ,Multiplexed bus recovery cycle insertion enable 5" "Disabled,Enabled" bitfld.word 0x00 12. " RCVENM4 ,Multiplexed bus recovery cycle insertion enable 4" "Disabled,Enabled" newline bitfld.word 0x00 11. " RCVENM3 ,Multiplexed bus recovery cycle insertion enable 3" "Disabled,Enabled" bitfld.word 0x00 10. " RCVENM2 ,Multiplexed bus recovery cycle insertion enable 2" "Disabled,Enabled" bitfld.word 0x00 9. " RCVENM1 ,Multiplexed bus recovery cycle insertion enable 1" "Disabled,Enabled" bitfld.word 0x00 8. " RCVENM0 ,Multiplexed bus recovery cycle insertion enable 0" "Disabled,Enabled" newline endif bitfld.word 0x00 7. " RCVEN7 ,Separate bus recovery cycle insertion enable 7" "Disabled,Enabled" bitfld.word 0x00 6. " RCVEN6 ,Separate bus recovery cycle insertion enable 6" "Disabled,Enabled" bitfld.word 0x00 5. " RCVEN5 ,Separate bus recovery cycle insertion enable 5" "Disabled,Enabled" bitfld.word 0x00 4. " RCVEN4 ,Separate bus recovery cycle insertion enable 4" "Disabled,Enabled" newline bitfld.word 0x00 3. " RCVEN3 ,Separate bus recovery cycle insertion enable 3" "Disabled,Enabled" bitfld.word 0x00 2. " RCVEN2 ,Separate bus recovery cycle insertion enable 2" "Disabled,Enabled" bitfld.word 0x00 1. " RCVEN1 ,Separate bus recovery cycle insertion enable 1" "Disabled,Enabled" bitfld.word 0x00 0. " RCVEN0 ,Separate bus recovery cycle insertion enable 0" "Disabled,Enabled" group.word (0x2)++0x01 line.word 0x00 "CS0MOD,CS0 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x12)++0x01 line.word 0x00 "CS1MOD,CS1 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x22)++0x01 line.word 0x00 "CS2MOD,CS2 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x32)++0x01 line.word 0x00 "CS3MOD,CS3 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x42)++0x01 line.word 0x00 "CS4MOD,CS4 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x52)++0x01 line.word 0x00 "CS5MOD,CS5 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x62)++0x01 line.word 0x00 "CS6MOD,CS6 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" group.word (0x72)++0x01 line.word 0x00 "CS7MOD,CS7 Mode Register" bitfld.word 0x00 15. " PRMOD ,Page read access mode select" "Normal,External" bitfld.word 0x00 9. " PWENB ,Page write access enable" "Disabled,Enabled" bitfld.word 0x00 8. " PRENB ,Page read access enable" "Disabled,Enabled" bitfld.word 0x00 3. " EWENB ,External wait enable" "Disabled,Enabled" bitfld.word 0x00 0. " WRMOD ,Write access mode select" "Byte,Single" newline if (((per.w(ad:0x40003000+0x4-0x02))&0x300)==0x300) group.long (0x4)++0x03 line.long 0x00 "CS0WCR1,CS0 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x4-0x02))&0x300)==0x200) group.long (0x4)++0x03 line.long 0x00 "CS0WCR1,CS0 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x4-0x02))&0x300)==0x100) group.long (0x4)++0x03 line.long 0x00 "CS0WCR1,CS0 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x4)++0x03 line.long 0x00 "CS0WCR1,CS0 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x14-0x02))&0x300)==0x300) group.long (0x14)++0x03 line.long 0x00 "CS1WCR1,CS1 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x14-0x02))&0x300)==0x200) group.long (0x14)++0x03 line.long 0x00 "CS1WCR1,CS1 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x14-0x02))&0x300)==0x100) group.long (0x14)++0x03 line.long 0x00 "CS1WCR1,CS1 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x14)++0x03 line.long 0x00 "CS1WCR1,CS1 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x24-0x02))&0x300)==0x300) group.long (0x24)++0x03 line.long 0x00 "CS2WCR1,CS2 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x24-0x02))&0x300)==0x200) group.long (0x24)++0x03 line.long 0x00 "CS2WCR1,CS2 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x24-0x02))&0x300)==0x100) group.long (0x24)++0x03 line.long 0x00 "CS2WCR1,CS2 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x24)++0x03 line.long 0x00 "CS2WCR1,CS2 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x34-0x02))&0x300)==0x300) group.long (0x34)++0x03 line.long 0x00 "CS3WCR1,CS3 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x34-0x02))&0x300)==0x200) group.long (0x34)++0x03 line.long 0x00 "CS3WCR1,CS3 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x34-0x02))&0x300)==0x100) group.long (0x34)++0x03 line.long 0x00 "CS3WCR1,CS3 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x34)++0x03 line.long 0x00 "CS3WCR1,CS3 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x44-0x02))&0x300)==0x300) group.long (0x44)++0x03 line.long 0x00 "CS4WCR1,CS4 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x44-0x02))&0x300)==0x200) group.long (0x44)++0x03 line.long 0x00 "CS4WCR1,CS4 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x44-0x02))&0x300)==0x100) group.long (0x44)++0x03 line.long 0x00 "CS4WCR1,CS4 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x44)++0x03 line.long 0x00 "CS4WCR1,CS4 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x54-0x02))&0x300)==0x300) group.long (0x54)++0x03 line.long 0x00 "CS5WCR1,CS5 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x54-0x02))&0x300)==0x200) group.long (0x54)++0x03 line.long 0x00 "CS5WCR1,CS5 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x54-0x02))&0x300)==0x100) group.long (0x54)++0x03 line.long 0x00 "CS5WCR1,CS5 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x54)++0x03 line.long 0x00 "CS5WCR1,CS5 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x64-0x02))&0x300)==0x300) group.long (0x64)++0x03 line.long 0x00 "CS6WCR1,CS6 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x64-0x02))&0x300)==0x200) group.long (0x64)++0x03 line.long 0x00 "CS6WCR1,CS6 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x64-0x02))&0x300)==0x100) group.long (0x64)++0x03 line.long 0x00 "CS6WCR1,CS6 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x64)++0x03 line.long 0x00 "CS6WCR1,CS6 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif if (((per.w(ad:0x40003000+0x74-0x02))&0x300)==0x300) group.long (0x74)++0x03 line.long 0x00 "CS7WCR1,CS7 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x74-0x02))&0x300)==0x200) group.long (0x74)++0x03 line.long 0x00 "CS7WCR1,CS7 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 0.--2. " CSPWWAIT ,Page write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" elif (((per.w(ad:0x40003000+0x74-0x02))&0x300)==0x100) group.long (0x74)++0x03 line.long 0x00 "CS7WCR1,CS7 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 8.--10. " CSPRWAIT ,Page read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x74)++0x03 line.long 0x00 "CS7WCR1,CS7 Wait Control Register 1" bitfld.long 0x00 24.--28. " CSRWAIT ,Normal read cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" bitfld.long 0x00 16.--20. " CSWWAIT ,Normal write cycle wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycle" endif newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.long (0x8)++0x03 line.long 0x00 "CS0WCR2,CS0 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x18)++0x03 line.long 0x00 "CS1WCR2,CS1 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x28)++0x03 line.long 0x00 "CS2WCR2,CS2 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x38)++0x03 line.long 0x00 "CS3WCR2,CS3 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x48)++0x03 line.long 0x00 "CS4WCR2,CS4 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x58)++0x03 line.long 0x00 "CS5WCR2,CS5 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x68)++0x03 line.long 0x00 "CS6WCR2,CS6 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x78)++0x03 line.long 0x00 "CS7WCR2,CS7 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" else group.long (0x8)++0x03 line.long 0x00 "CS0WCR2,CS0 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x18)++0x03 line.long 0x00 "CS1WCR2,CS1 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x28)++0x03 line.long 0x00 "CS2WCR2,CS2 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" group.long (0x38)++0x03 line.long 0x00 "CS3WCR2,CS3 Wait Control Register 2" bitfld.long 0x00 28.--30. " CSON ,CS assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 24.--26. " WDON ,Write data output wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 20.--22. " WRON ,WR assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 16.--18. " RDON ,RD assert wait select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.long 0x00 8.--10. " WDOFF ,Write data output extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 4.--6. " CSWOFF ,Write-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" bitfld.long 0x00 0.--2. " CSROFF ,Read-Access CS extension cycle select" "No wait,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" endif newline group.byte 0xC00++0x01 line.byte 0x00 "SDCCR,SDC Control Register" bitfld.byte 0x00 4.--5. " BSIZE ,SDRAM bus width select" "16-bit,,8-bit,?..." bitfld.byte 0x00 0. " EXENB ,Operation enable" "Disabled,Enabled" line.byte 0x1 "SDCMOD,SDC Mode Register" bitfld.byte 0x1 0. " EMODE ,Endian mode" "Operating mode,Not operating mode" sif !cpuis("R7FS5D5*") group.byte 0xC02++0x00 line.byte 0x00 "SDAMOD,SDRAM Access Mode Register" bitfld.byte 0x00 0. " BE ,Continuous access enable" "Disabled,Enabled" endif group.byte 0xC10++0x00 line.byte 0x00 "SDSELF,SDRAM Self-Refresh Control Register" bitfld.byte 0x00 0. " SFEN ,SDRAM Self-Refresh enable" "Disabled,Enabled" group.word 0xC14++0x01 line.word 0x00 "SDRFCR,SDRAM Refresh Control Register" bitfld.word 0x00 12.--15. " REFW ,Auto-Refresh Cycle/Self-Refresh clearing cycle count setting" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles" hexmask.word 0x00 0.--11. 1. " RFC ,Auto-Refresh request interval setting" group.byte 0xC16++0x00 line.byte 0x00 "SDRFEN,SDRAM Auto-Refresh Control Register" bitfld.byte 0x00 0. " RFEN ,Auto-Refresh operation enable" "Disabled,Enabled" group.byte 0xC20++0x00 line.byte 0x00 "SDICR,SDRAM Initialization Sequence Control Register" bitfld.byte 0x00 0. " INIRQ ,Initialization sequence start" "Not started,Started" group.word 0xC24++0x01 line.word 0x00 "SDIR,SDRAM Initialization Register" bitfld.word 0x00 8.--10. " PRC ,Initialization precharge cycle count" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles" bitfld.word 0x00 4.--7. " ARFC ,Initialization Auto-Refresh count" ",1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,15 times" newline bitfld.word 0x00 0.--3. " ARFI ,Initialization Auto-Refresh interval" "3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles" group.byte 0xC40++0x00 line.byte 0x00 "SDADR,SDRAM Address Register" bitfld.byte 0x00 0.--1. " MXC ,Address multiplex select" "8-bit,9-bit,10-bit,11-bit" group.long 0xC44++0x03 line.long 0x00 "SDTR,SDRAM Timing Register" bitfld.long 0x00 16.--18. " RAS ,Row active interval" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,?..." bitfld.long 0x00 12.--13. " RCD ,Row column latency" "1 cycle,2 cycles,3 cycles,4 cycles" newline bitfld.long 0x00 9.--11. " RP ,Row precharge interval" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 8. " WR ,Write recovery interval" "1 cycles,2 cycles" newline bitfld.long 0x00 0.--2. " CL ,SDRAMC column latency" ",1 cycle,2 cycles,3 cycles,?..." group.word 0xC48++0x01 line.word 0x00 "SDMOD,SDRAM Mode Register" hexmask.word 0x00 0.--14. 1. " MR ,Mode register setting" rgroup.byte 0xC50++0x00 line.byte 0x00 "SDSR,SDRAM Status Register" bitfld.byte 0x00 4. " SRFST ,Self-Refresh Transition/Recovery status" "Not in progress,In progress" bitfld.byte 0x00 3. " INIST ,Initialization status" "Not in progress,In progress" newline bitfld.byte 0x00 0. " MRSST ,Mode register setting status" "Not in progress,In progress" group.word 0x1000++0x01 line.word 0x00 "BUSMCNTM4I,Master Bus Control Register" bitfld.word 0x00 15. " IERES ,Ignore error responses" "Reported,Not reported" sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D9*") bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" endif group.word 0x1004++0x01 line.word 0x00 "BUSMCNTM4D,Master Bus Control Register" bitfld.word 0x00 15. " IERES ,Ignore error responses" "Reported,Not reported" sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D9*") bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" endif group.word 0x1008++0x01 line.word 0x00 "BUSMCNTSYS,Master Bus Control Register" bitfld.word 0x00 15. " IERES ,Ignore error responses" "Reported,Not reported" sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D9*") bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" endif group.word 0x100C++0x01 line.word 0x00 "BUSMCNTDMA,Master Bus Control Register" bitfld.word 0x00 15. " IERES ,Ignore error responses" "Reported,Not reported" sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D9*") bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" endif group.word 0x1010++0x01 line.word 0x00 "BUSMCNTEDM,Master Bus Control Register" bitfld.word 0x00 15. " IERES ,Ignore error responses" "Reported,Not reported" sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D9*") bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" endif sif !cpuis("R7FS5D5*") group.word 0x1014++0x01 line.word 0x00 "BUSMCNTGPX,Master Bus Control Register" bitfld.word 0x00 15. " IERES ,Ignore error responses" "Reported,Not reported" sif !cpuis("R7FS5D9*") bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" endif endif group.word 0x1100++0x01 line.word 0x00 "BUSSCNTFLI,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1104++0x01 line.word 0x00 "BUSSCNTRAMH,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1108++0x01 line.word 0x00 "BUSSCNTMBIU,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x110C++0x01 line.word 0x00 "BUSSCNTRAM0,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1110++0x01 line.word 0x00 "BUSSCNTRAM1,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1114++0x01 line.word 0x00 "BUSSCNTP0B,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1118++0x01 line.word 0x00 "BUSSCNTP2B,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x111C++0x01 line.word 0x00 "BUSSCNTP3B,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1120++0x01 line.word 0x00 "BUSSCNTP4B,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1128++0x01 line.word 0x00 "BUSSCNTP6B,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." sif !cpuis("R7FS5D5*") group.word 0x112C++0x01 line.word 0x00 "BUSSCNTP7B,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." endif group.word 0x1130++0x01 line.word 0x00 "BUSSCNTFBU,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1134++0x01 line.word 0x00 "BUSSCNTEXT,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." group.word 0x1138++0x01 line.word 0x00 "BUSSCNTEXT2,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." sif !cpuis("R7FS5D5*") group.word 0x113C++0x01 line.word 0x00 "BUSSCNTGPX,Slave Bus Control Register" bitfld.word 0x00 8. " EWRES ,Early write response" "Disabled,Enabled" bitfld.word 0x00 4.--5. " ARBMET ,Arbitration method" "Fixed priority,Round-robin,?..." endif sif cpuis("R7FS5D5*") rgroup.long 0x1800++0x03 line.long 0x00 "BUS1ERRADD,Bus Error Address Register" rgroup.long 0x1810++0x03 line.long 0x00 "BUS2ERRADD,Bus Error Address Register" rgroup.long 0x1820++0x03 line.long 0x00 "BUS3ERRADD,Bus Error Address Register" rgroup.long 0x1830++0x03 line.long 0x00 "BUS4ERRADD,Bus Error Address Register" rgroup.long 0x1840++0x03 line.long 0x00 "BUS5ERRADD,Bus Error Address Register" rgroup.byte 0x1804++0x00 line.byte 0x00 "BUS1ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1814++0x00 line.byte 0x00 "BUS2ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1824++0x00 line.byte 0x00 "BUS3ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1834++0x00 line.byte 0x00 "BUS4ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1844++0x00 line.byte 0x00 "BUS5ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" else rgroup.long 0x1800++0x03 line.long 0x00 "BUS1ERRADD,Bus Error Address Register" rgroup.long 0x1810++0x03 line.long 0x00 "BUS2ERRADD,Bus Error Address Register" rgroup.long 0x1820++0x03 line.long 0x00 "BUS3ERRADD,Bus Error Address Register" rgroup.long 0x1830++0x03 line.long 0x00 "BUS4ERRADD,Bus Error Address Register" rgroup.long 0x1840++0x03 line.long 0x00 "BUS5ERRADD,Bus Error Address Register" rgroup.long 0x1850++0x03 line.long 0x00 "BUS6ERRADD,Bus Error Address Register" rgroup.long 0x1860++0x03 line.long 0x00 "BUS7ERRADD,Bus Error Address Register" rgroup.long 0x1870++0x03 line.long 0x00 "BUS8ERRADD,Bus Error Address Register" rgroup.long 0x1880++0x03 line.long 0x00 "BUS9ERRADD,Bus Error Address Register" rgroup.long 0x1890++0x03 line.long 0x00 "BUS10ERRADD,Bus Error Address Register" rgroup.long 0x18A0++0x03 line.long 0x00 "BUS11ERRADD,Bus Error Address Register" rgroup.byte 0x1804++0x00 line.byte 0x00 "BUS1ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1814++0x00 line.byte 0x00 "BUS2ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1824++0x00 line.byte 0x00 "BUS3ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1834++0x00 line.byte 0x00 "BUS4ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1844++0x00 line.byte 0x00 "BUS5ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1854++0x00 line.byte 0x00 "BUS6ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1864++0x00 line.byte 0x00 "BUS7ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1874++0x00 line.byte 0x00 "BUS8ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1884++0x00 line.byte 0x00 "BUS9ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x1894++0x00 line.byte 0x00 "BUS10ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" rgroup.byte 0x18A4++0x00 line.byte 0x00 "BUS11ERRSTAT,Bus Error Status Register" bitfld.byte 0x00 7. " ERRSTAT ,Bus error status" "No error,Error" bitfld.byte 0x00 0. " ACCSTAT ,Error access status" "Write,Read" endif width 0x0B tree.end tree "MPU (Memory Protection Unit)" base ad:0x40000000 width 12. tree "CPU Stack Pointer Monitor" group.long 0xD08++0x07 line.long 0x00 "MSPMPUSA,Main Stack Pointer Monitor Start Address Register" line.long 0x04 "MSPMPUEA,Main Stack Pointer Monitor End Address Register" group.long 0xD18++0x07 line.long 0x00 "PSPMPUSA,Process Stack Pointer Monitor Start Address Register" line.long 0x04 "PSPMPUEA,Process Stack Pointer Monitor End Address Register" group.word 0xD00++0x01 line.word 0x00 "MSPMPUOAD,Stack Pointer Monitor Operation After Detection Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " OAD ,Operation after detection" "Interrupt,Reset" group.word 0xD10++0x01 line.word 0x00 "PSPMPUOAD,Stack Pointer Monitor Operation After Detection Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " OAD ,Operation after detection" "Interrupt,Reset" group.word 0xD04++0x01 line.word 0x00 "MSPMPUCTL,Stack Pointer Monitor Access Control Register" bitfld.word 0x00 8. " ERROR ,Stack pointer monitor error flag" "No error,Error" bitfld.word 0x00 0. " ENABLE ,Stack pointer monitor enable" "Disabled,Enabled" group.word 0xD14++0x01 line.word 0x00 "PSPMPUCTL,Stack Pointer Monitor Access Control Register" bitfld.word 0x00 8. " ERROR ,Stack pointer monitor error flag" "No error,Error" bitfld.word 0x00 0. " ENABLE ,Stack pointer monitor enable" "Disabled,Enabled" group.word 0xD06++0x01 line.word 0x00 "MSPMPUPT,Stack Pointer Monitor Protection Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " PROTECT ,Protection register" "Not protected,Protected" group.word 0xD16++0x01 line.word 0x00 "PSPMPUPT,Stack Pointer Monitor Protection Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " PROTECT ,Protection register" "Not protected,Protected" tree.end tree "Bus Master MPU" sif cpuis("R7FS5*") group.long (0x200+0x4)++0x03 line.long 0x00 "MMPUSA0,Group A Region 0 Start Address Register" group.long (0x200+0x14)++0x03 line.long 0x00 "MMPUSA1,Group A Region 1 Start Address Register" group.long (0x200+0x24)++0x03 line.long 0x00 "MMPUSA2,Group A Region 2 Start Address Register" group.long (0x200+0x34)++0x03 line.long 0x00 "MMPUSA3,Group A Region 3 Start Address Register" group.long (0x200+0x44)++0x03 line.long 0x00 "MMPUSA4,Group A Region 4 Start Address Register" group.long (0x200+0x54)++0x03 line.long 0x00 "MMPUSA5,Group A Region 5 Start Address Register" group.long (0x200+0x64)++0x03 line.long 0x00 "MMPUSA6,Group A Region 6 Start Address Register" group.long (0x200+0x74)++0x03 line.long 0x00 "MMPUSA7,Group A Region 7 Start Address Register" group.long (0x200+0x84)++0x03 line.long 0x00 "MMPUSA8,Group A Region 8 Start Address Register" group.long (0x200+0x94)++0x03 line.long 0x00 "MMPUSA9,Group A Region 9 Start Address Register" group.long (0x200+0xA4)++0x03 line.long 0x00 "MMPUSA10,Group A Region 10 Start Address Register" group.long (0x200+0xB4)++0x03 line.long 0x00 "MMPUSA11,Group A Region 11 Start Address Register" group.long (0x200+0xC4)++0x03 line.long 0x00 "MMPUSA12,Group A Region 12 Start Address Register" group.long (0x200+0xD4)++0x03 line.long 0x00 "MMPUSA13,Group A Region 13 Start Address Register" group.long (0x200+0xE4)++0x03 line.long 0x00 "MMPUSA14,Group A Region 14 Start Address Register" group.long (0x200+0xF4)++0x03 line.long 0x00 "MMPUSA15,Group A Region 15 Start Address Register" group.long (0x200+0x104)++0x03 line.long 0x00 "MMPUSA16,Group A Region 16 Start Address Register" group.long (0x200+0x114)++0x03 line.long 0x00 "MMPUSA17,Group A Region 17 Start Address Register" group.long (0x200+0x124)++0x03 line.long 0x00 "MMPUSA18,Group A Region 18 Start Address Register" group.long (0x200+0x134)++0x03 line.long 0x00 "MMPUSA19,Group A Region 19 Start Address Register" group.long (0x200+0x144)++0x03 line.long 0x00 "MMPUSA20,Group A Region 20 Start Address Register" group.long (0x200+0x154)++0x03 line.long 0x00 "MMPUSA21,Group A Region 21 Start Address Register" group.long (0x200+0x164)++0x03 line.long 0x00 "MMPUSA22,Group A Region 22 Start Address Register" group.long (0x200+0x174)++0x03 line.long 0x00 "MMPUSA23,Group A Region 23 Start Address Register" group.long (0x200+0x184)++0x03 line.long 0x00 "MMPUSA24,Group A Region 24 Start Address Register" group.long (0x200+0x194)++0x03 line.long 0x00 "MMPUSA25,Group A Region 25 Start Address Register" group.long (0x200+0x1A4)++0x03 line.long 0x00 "MMPUSA26,Group A Region 26 Start Address Register" group.long (0x200+0x1B4)++0x03 line.long 0x00 "MMPUSA27,Group A Region 27 Start Address Register" group.long (0x200+0x1C4)++0x03 line.long 0x00 "MMPUSA28,Group A Region 28 Start Address Register" group.long (0x200+0x1D4)++0x03 line.long 0x00 "MMPUSA29,Group A Region 29 Start Address Register" group.long (0x200+0x1E4)++0x03 line.long 0x00 "MMPUSA30,Group A Region 30 Start Address Register" group.long (0x200+0x8)++0x03 line.long 0x00 "MMPUEA0,Group A Region 0 End Address Register" group.long (0x200+0x18)++0x03 line.long 0x00 "MMPUEA1,Group A Region 1 End Address Register" group.long (0x200+0x28)++0x03 line.long 0x00 "MMPUEA2,Group A Region 2 End Address Register" group.long (0x200+0x38)++0x03 line.long 0x00 "MMPUEA3,Group A Region 3 End Address Register" group.long (0x200+0x48)++0x03 line.long 0x00 "MMPUEA4,Group A Region 4 End Address Register" group.long (0x200+0x58)++0x03 line.long 0x00 "MMPUEA5,Group A Region 5 End Address Register" group.long (0x200+0x68)++0x03 line.long 0x00 "MMPUEA6,Group A Region 6 End Address Register" group.long (0x200+0x78)++0x03 line.long 0x00 "MMPUEA7,Group A Region 7 End Address Register" group.long (0x200+0x88)++0x03 line.long 0x00 "MMPUEA8,Group A Region 8 End Address Register" group.long (0x200+0x98)++0x03 line.long 0x00 "MMPUEA9,Group A Region 9 End Address Register" group.long (0x200+0xA8)++0x03 line.long 0x00 "MMPUEA10,Group A Region 10 End Address Register" group.long (0x200+0xB8)++0x03 line.long 0x00 "MMPUEA11,Group A Region 11 End Address Register" group.long (0x200+0xC8)++0x03 line.long 0x00 "MMPUEA12,Group A Region 12 End Address Register" group.long (0x200+0xD8)++0x03 line.long 0x00 "MMPUEA13,Group A Region 13 End Address Register" group.long (0x200+0xE8)++0x03 line.long 0x00 "MMPUEA14,Group A Region 14 End Address Register" group.long (0x200+0xF8)++0x03 line.long 0x00 "MMPUEA15,Group A Region 15 End Address Register" group.long (0x200+0x108)++0x03 line.long 0x00 "MMPUEA16,Group A Region 16 End Address Register" group.long (0x200+0x118)++0x03 line.long 0x00 "MMPUEA17,Group A Region 17 End Address Register" group.long (0x200+0x128)++0x03 line.long 0x00 "MMPUEA18,Group A Region 18 End Address Register" group.long (0x200+0x138)++0x03 line.long 0x00 "MMPUEA19,Group A Region 19 End Address Register" group.long (0x200+0x148)++0x03 line.long 0x00 "MMPUEA20,Group A Region 20 End Address Register" group.long (0x200+0x158)++0x03 line.long 0x00 "MMPUEA21,Group A Region 21 End Address Register" group.long (0x200+0x168)++0x03 line.long 0x00 "MMPUEA22,Group A Region 22 End Address Register" group.long (0x200+0x178)++0x03 line.long 0x00 "MMPUEA23,Group A Region 23 End Address Register" group.long (0x200+0x188)++0x03 line.long 0x00 "MMPUEA24,Group A Region 24 End Address Register" group.long (0x200+0x198)++0x03 line.long 0x00 "MMPUEA25,Group A Region 25 End Address Register" group.long (0x200+0x1A8)++0x03 line.long 0x00 "MMPUEA26,Group A Region 26 End Address Register" group.long (0x200+0x1B8)++0x03 line.long 0x00 "MMPUEA27,Group A Region 27 End Address Register" group.long (0x200+0x1C8)++0x03 line.long 0x00 "MMPUEA28,Group A Region 28 End Address Register" group.long (0x200+0x1D8)++0x03 line.long 0x00 "MMPUEA29,Group A Region 29 End Address Register" group.long (0x200+0x1E8)++0x03 line.long 0x00 "MMPUEA30,Group A Region 30 End Address Register" group.long (0x200+0x0)++0x03 line.long 0x00 "MMPUACA0,Group A Region 0 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x10)++0x03 line.long 0x00 "MMPUACA1,Group A Region 1 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x20)++0x03 line.long 0x00 "MMPUACA2,Group A Region 2 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x30)++0x03 line.long 0x00 "MMPUACA3,Group A Region 3 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x40)++0x03 line.long 0x00 "MMPUACA4,Group A Region 4 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x50)++0x03 line.long 0x00 "MMPUACA5,Group A Region 5 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x60)++0x03 line.long 0x00 "MMPUACA6,Group A Region 6 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x70)++0x03 line.long 0x00 "MMPUACA7,Group A Region 7 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x80)++0x03 line.long 0x00 "MMPUACA8,Group A Region 8 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x90)++0x03 line.long 0x00 "MMPUACA9,Group A Region 9 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xA0)++0x03 line.long 0x00 "MMPUACA10,Group A Region 10 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xB0)++0x03 line.long 0x00 "MMPUACA11,Group A Region 11 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xC0)++0x03 line.long 0x00 "MMPUACA12,Group A Region 12 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xD0)++0x03 line.long 0x00 "MMPUACA13,Group A Region 13 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xE0)++0x03 line.long 0x00 "MMPUACA14,Group A Region 14 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xF0)++0x03 line.long 0x00 "MMPUACA15,Group A Region 15 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x100)++0x03 line.long 0x00 "MMPUACA16,Group A Region 16 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x110)++0x03 line.long 0x00 "MMPUACA17,Group A Region 17 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x120)++0x03 line.long 0x00 "MMPUACA18,Group A Region 18 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x130)++0x03 line.long 0x00 "MMPUACA19,Group A Region 19 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x140)++0x03 line.long 0x00 "MMPUACA20,Group A Region 20 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x150)++0x03 line.long 0x00 "MMPUACA21,Group A Region 21 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x160)++0x03 line.long 0x00 "MMPUACA22,Group A Region 22 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x170)++0x03 line.long 0x00 "MMPUACA23,Group A Region 23 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x180)++0x03 line.long 0x00 "MMPUACA24,Group A Region 24 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x190)++0x03 line.long 0x00 "MMPUACA25,Group A Region 25 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x1A0)++0x03 line.long 0x00 "MMPUACA26,Group A Region 26 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x1B0)++0x03 line.long 0x00 "MMPUACA27,Group A Region 27 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x1C0)++0x03 line.long 0x00 "MMPUACA28,Group A Region 28 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x1D0)++0x03 line.long 0x00 "MMPUACA29,Group A Region 29 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x1E0)++0x03 line.long 0x00 "MMPUACA30,Group A Region 30 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.word 0x00++0x01 line.word 0x00 "MMPUCTLA,Bus Master MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " OAD ,Operation after detection" "Interrupt,Reset" bitfld.word 0x00 0. " ENABLE ,Master group enable" "Disabled,Enabled" group.word 0x102++0x01 line.word 0x00 "MMPUPTA,Group A Protection of Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " PROTECT ,Protection of register" "Not protected,Protected" group.long (0x600+0x4)++0x03 line.long 0x00 "MMPUSB0,Group B Region 0 Start Address Register" group.long (0x600+0x14)++0x03 line.long 0x00 "MMPUSB1,Group B Region 1 Start Address Register" group.long (0x600+0x24)++0x03 line.long 0x00 "MMPUSB2,Group B Region 2 Start Address Register" group.long (0x600+0x34)++0x03 line.long 0x00 "MMPUSB3,Group B Region 3 Start Address Register" group.long (0x600+0x44)++0x03 line.long 0x00 "MMPUSB4,Group B Region 4 Start Address Register" group.long (0x600+0x54)++0x03 line.long 0x00 "MMPUSB5,Group B Region 5 Start Address Register" group.long (0x600+0x64)++0x03 line.long 0x00 "MMPUSB6,Group B Region 6 Start Address Register" group.long (0x600+0x74)++0x03 line.long 0x00 "MMPUSB7,Group B Region 7 Start Address Register" group.long (0x600+0x8)++0x03 line.long 0x00 "MMPUEB0,Group B Region 0 End Address Register" group.long (0x600+0x18)++0x03 line.long 0x00 "MMPUEB1,Group B Region 1 End Address Register" group.long (0x600+0x28)++0x03 line.long 0x00 "MMPUEB2,Group B Region 2 End Address Register" group.long (0x600+0x38)++0x03 line.long 0x00 "MMPUEB3,Group B Region 3 End Address Register" group.long (0x600+0x48)++0x03 line.long 0x00 "MMPUEB4,Group B Region 4 End Address Register" group.long (0x600+0x58)++0x03 line.long 0x00 "MMPUEB5,Group B Region 5 End Address Register" group.long (0x600+0x68)++0x03 line.long 0x00 "MMPUEB6,Group B Region 6 End Address Register" group.long (0x600+0x78)++0x03 line.long 0x00 "MMPUEB7,Group B Region 7 End Address Register" group.long (0x600+0x0)++0x03 line.long 0x00 "MMPUACB0,Group B Region 0 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x10)++0x03 line.long 0x00 "MMPUACB1,Group B Region 1 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x20)++0x03 line.long 0x00 "MMPUACB2,Group B Region 2 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x30)++0x03 line.long 0x00 "MMPUACB3,Group B Region 3 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x40)++0x03 line.long 0x00 "MMPUACB4,Group B Region 4 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x50)++0x03 line.long 0x00 "MMPUACB5,Group B Region 5 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x60)++0x03 line.long 0x00 "MMPUACB6,Group B Region 6 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x600+0x70)++0x03 line.long 0x00 "MMPUACB7,Group B Region 7 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.word 0x400++0x01 line.word 0x00 "MMPUCTLB,Bus Master MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " OAD ,Operation after detection" "Interrupt,Reset" bitfld.word 0x00 0. " ENABLE ,Master group enable" "Disabled,Enabled" group.word 0x502++0x01 line.word 0x00 "MMPUPTB,Group B Protection of Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " PROTECT ,Protection of register" "Not protected,Protected" sif !cpuis("R7FS5D5*") group.long (0xA00+0x4)++0x03 line.long 0x00 "MMPUSC0,Group C Region 0 Start Address Register" group.long (0xA00+0x14)++0x03 line.long 0x00 "MMPUSC1,Group C Region 1 Start Address Register" group.long (0xA00+0x24)++0x03 line.long 0x00 "MMPUSC2,Group C Region 2 Start Address Register" group.long (0xA00+0x34)++0x03 line.long 0x00 "MMPUSC3,Group C Region 3 Start Address Register" group.long (0xA00+0x44)++0x03 line.long 0x00 "MMPUSC4,Group C Region 4 Start Address Register" group.long (0xA00+0x54)++0x03 line.long 0x00 "MMPUSC5,Group C Region 5 Start Address Register" group.long (0xA00+0x64)++0x03 line.long 0x00 "MMPUSC6,Group C Region 6 Start Address Register" group.long (0xA00+0x74)++0x03 line.long 0x00 "MMPUSC7,Group C Region 7 Start Address Register" group.long (0xA00+0x8)++0x03 line.long 0x00 "MMPUEC0,Group C Region 0 End Address Register" group.long (0xA00+0x18)++0x03 line.long 0x00 "MMPUEC1,Group C Region 1 End Address Register" group.long (0xA00+0x28)++0x03 line.long 0x00 "MMPUEC2,Group C Region 2 End Address Register" group.long (0xA00+0x38)++0x03 line.long 0x00 "MMPUEC3,Group C Region 3 End Address Register" group.long (0xA00+0x48)++0x03 line.long 0x00 "MMPUEC4,Group C Region 4 End Address Register" group.long (0xA00+0x58)++0x03 line.long 0x00 "MMPUEC5,Group C Region 5 End Address Register" group.long (0xA00+0x68)++0x03 line.long 0x00 "MMPUEC6,Group C Region 6 End Address Register" group.long (0xA00+0x78)++0x03 line.long 0x00 "MMPUEC7,Group C Region 7 End Address Register" group.long (0xA00+0x0)++0x03 line.long 0x00 "MMPUACC0,Group C Region 0 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x10)++0x03 line.long 0x00 "MMPUACC1,Group C Region 1 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x20)++0x03 line.long 0x00 "MMPUACC2,Group C Region 2 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x30)++0x03 line.long 0x00 "MMPUACC3,Group C Region 3 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x40)++0x03 line.long 0x00 "MMPUACC4,Group C Region 4 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x50)++0x03 line.long 0x00 "MMPUACC5,Group C Region 5 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x60)++0x03 line.long 0x00 "MMPUACC6,Group C Region 6 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0xA00+0x70)++0x03 line.long 0x00 "MMPUACC7,Group C Region 7 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.word 0x800++0x01 line.word 0x00 "MMPUCTLC,Bus Master MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " OAD ,Operation after detection" "Interrupt,Reset" bitfld.word 0x00 0. " ENABLE ,Master group enable" "Disabled,Enabled" group.word 0x902++0x01 line.word 0x00 "MMPUPTC,Group C Protection of Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " PROTECT ,Protection of register" "Not protected,Protected" endif else group.long (0x200+0x4)++0x03 line.long 0x00 "MMPUSA0,Group A Region 0 Start Address Register" group.long (0x200+0x14)++0x03 line.long 0x00 "MMPUSA1,Group A Region 1 Start Address Register" group.long (0x200+0x24)++0x03 line.long 0x00 "MMPUSA2,Group A Region 2 Start Address Register" group.long (0x200+0x34)++0x03 line.long 0x00 "MMPUSA3,Group A Region 3 Start Address Register" group.long (0x200+0x44)++0x03 line.long 0x00 "MMPUSA4,Group A Region 4 Start Address Register" group.long (0x200+0x54)++0x03 line.long 0x00 "MMPUSA5,Group A Region 5 Start Address Register" group.long (0x200+0x64)++0x03 line.long 0x00 "MMPUSA6,Group A Region 6 Start Address Register" group.long (0x200+0x74)++0x03 line.long 0x00 "MMPUSA7,Group A Region 7 Start Address Register" group.long (0x200+0x84)++0x03 line.long 0x00 "MMPUSA8,Group A Region 8 Start Address Register" group.long (0x200+0x94)++0x03 line.long 0x00 "MMPUSA9,Group A Region 9 Start Address Register" group.long (0x200+0xA4)++0x03 line.long 0x00 "MMPUSA10,Group A Region 10 Start Address Register" group.long (0x200+0xB4)++0x03 line.long 0x00 "MMPUSA11,Group A Region 11 Start Address Register" group.long (0x200+0xC4)++0x03 line.long 0x00 "MMPUSA12,Group A Region 12 Start Address Register" group.long (0x200+0xD4)++0x03 line.long 0x00 "MMPUSA13,Group A Region 13 Start Address Register" group.long (0x200+0xE4)++0x03 line.long 0x00 "MMPUSA14,Group A Region 14 Start Address Register" group.long (0x200+0xF4)++0x03 line.long 0x00 "MMPUSA15,Group A Region 15 Start Address Register" group.long (0x200+0x8)++0x03 line.long 0x00 "MMPUEA0,Group A Region 0 End Address Register" group.long (0x200+0x18)++0x03 line.long 0x00 "MMPUEA1,Group A Region 1 End Address Register" group.long (0x200+0x28)++0x03 line.long 0x00 "MMPUEA2,Group A Region 2 End Address Register" group.long (0x200+0x38)++0x03 line.long 0x00 "MMPUEA3,Group A Region 3 End Address Register" group.long (0x200+0x48)++0x03 line.long 0x00 "MMPUEA4,Group A Region 4 End Address Register" group.long (0x200+0x58)++0x03 line.long 0x00 "MMPUEA5,Group A Region 5 End Address Register" group.long (0x200+0x68)++0x03 line.long 0x00 "MMPUEA6,Group A Region 6 End Address Register" group.long (0x200+0x78)++0x03 line.long 0x00 "MMPUEA7,Group A Region 7 End Address Register" group.long (0x200+0x88)++0x03 line.long 0x00 "MMPUEA8,Group A Region 8 End Address Register" group.long (0x200+0x98)++0x03 line.long 0x00 "MMPUEA9,Group A Region 9 End Address Register" group.long (0x200+0xA8)++0x03 line.long 0x00 "MMPUEA10,Group A Region 10 End Address Register" group.long (0x200+0xB8)++0x03 line.long 0x00 "MMPUEA11,Group A Region 11 End Address Register" group.long (0x200+0xC8)++0x03 line.long 0x00 "MMPUEA12,Group A Region 12 End Address Register" group.long (0x200+0xD8)++0x03 line.long 0x00 "MMPUEA13,Group A Region 13 End Address Register" group.long (0x200+0xE8)++0x03 line.long 0x00 "MMPUEA14,Group A Region 14 End Address Register" group.long (0x200+0xF8)++0x03 line.long 0x00 "MMPUEA15,Group A Region 15 End Address Register" group.long (0x200+0x0)++0x03 line.long 0x00 "MMPUACA0,Group A Region 0 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x10)++0x03 line.long 0x00 "MMPUACA1,Group A Region 1 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x20)++0x03 line.long 0x00 "MMPUACA2,Group A Region 2 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x30)++0x03 line.long 0x00 "MMPUACA3,Group A Region 3 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x40)++0x03 line.long 0x00 "MMPUACA4,Group A Region 4 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x50)++0x03 line.long 0x00 "MMPUACA5,Group A Region 5 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x60)++0x03 line.long 0x00 "MMPUACA6,Group A Region 6 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x70)++0x03 line.long 0x00 "MMPUACA7,Group A Region 7 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x80)++0x03 line.long 0x00 "MMPUACA8,Group A Region 8 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0x90)++0x03 line.long 0x00 "MMPUACA9,Group A Region 9 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xA0)++0x03 line.long 0x00 "MMPUACA10,Group A Region 10 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xB0)++0x03 line.long 0x00 "MMPUACA11,Group A Region 11 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xC0)++0x03 line.long 0x00 "MMPUACA12,Group A Region 12 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xD0)++0x03 line.long 0x00 "MMPUACA13,Group A Region 13 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xE0)++0x03 line.long 0x00 "MMPUACA14,Group A Region 14 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.long (0x200+0xF0)++0x03 line.long 0x00 "MMPUACA15,Group A Region 15 access control register" bitfld.long 0x00 2. " WP ,Write protection" "Not protected,Protected" bitfld.long 0x00 1. " RP ,Read protection" "Not protected,Protected" bitfld.long 0x00 0. " ENABLE ,Region enable" "Disabled,Enabled" group.word 0x00++0x01 line.word 0x00 "MMPUCTLA,Bus Master MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " OAD ,Operation after detection" "Interrupt,Reset" bitfld.word 0x00 0. " ENABLE ,Master group enable" "Disabled,Enabled" group.word 0x102++0x01 line.word 0x00 "MMPUPTA,Group A Protection of Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 0. " PROTECT ,Protection of register" "Not protected,Protected" endif tree.end tree "Bus Slave MPU" group.word 0xC10++0x01 line.word 0x00 "SMPUMBIU,Access Control Register for Memory bus 3" sif cpuis("R7FS5*") bitfld.word 0x00 15. " WPSRAMHS ,SRAMHS write protection" "Disabled,Enabled" bitfld.word 0x00 14. " RPSRAMHS ,SRAMHS read protection" "Disabled,Enabled" bitfld.word 0x00 13. " WPFLI ,Code flash memory write protection" "Disabled,Enabled" bitfld.word 0x00 12. " RPFLI ,Code flash memory read protection" "No effect,Enabled" newline sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" group.word 0xC14++0x01 line.word 0x00 "SMPUFBIU,Access Control Register for Internal peripheral bus 9" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC18++0x01 line.word 0x00 "SMPUSRAM0,Access Control Register for Memory bus 4" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC1C++0x01 line.word 0x00 "SMPUSRAM1,Access Control Register for Memory bus 5" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC20++0x01 line.word 0x00 "SMPUP0BIU,Access Control Register for Internal peripheral bus 1" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC24++0x01 line.word 0x00 "SMPUP3BIU,Access Control Register for Internal peripheral bus 3" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC28++0x01 line.word 0x00 "SMPUP7BIU,Access Control Register for Internal peripheral bus 7" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" sif cpuis("R7FS5D9*") group.word 0xC2C++0x01 line.word 0x00 "SMPUP8BIU,Access Control Register for Internal peripheral bus 8" bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" endif group.word 0xC30++0x01 line.word 0x00 "SMPUEXBIU,Access Control Register for CS area" sif cpuis("R7FS5D9*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC34++0x01 line.word 0x00 "SMPUEXBIU2,Access Control Register for QSPI area" sif cpuis("R7FS5D9*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC00++0x01 line.word 0x00 "SMPUCTL,Slave MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " PROTECT ,Protection of register" "Not protected,Protected" bitfld.word 0x00 0. " OAD ,Operation after detection" "Interrupt,Reset" tree.end tree "Security MPU" sif cpuis("R7FS5*") rgroup.long (ad:0x00000400+0x8)++0x03 line.long 0x00 "SECMPUPCS0,Security MPU Program Counter Start Address Register" hexmask.long 0x00 2.--31. 0x04 " SECMPUPCS0 ,Region start address" rgroup.long (ad:0x00000400+0x10)++0x03 line.long 0x00 "SECMPUPCS1,Security MPU Program Counter Start Address Register" hexmask.long 0x00 2.--31. 0x04 " SECMPUPCS1 ,Region start address" rgroup.long (ad:0x00000400+0xC)++0x03 line.long 0x00 "SECMPUPCE0,Security MPU Program Counter End Address Register" hexmask.long 0x00 2.--31. 0x04 " SECMPUPCE0 ,Region end address" rgroup.long (ad:0x00000400+0x14)++0x03 line.long 0x00 "SECMPUPCE1,Security MPU Program Counter End Address Register" hexmask.long 0x00 2.--31. 0x04 " SECMPUPCE1 ,Region end address" rgroup.long (ad:0x00000400+0x18)++0x23 line.long 0x00 "SECMPUS0,Security MPU Region 0 Start Address Register" hexmask.long.tbyte 0x00 2.--23. 0x04 " SECMPUS0 ,Region start address register" line.long 0x04 "SECMPUE0,Security MPU Region 0 End Address Register" hexmask.long.tbyte 0x04 2.--23. 0x04 " SECMPUE0 ,Region end address register" line.long 0x08 "SECMPUS1,Security MPU Region 1 Start Address Register" hexmask.long.tbyte 0x08 2.--23. 0x04 " SECMPUS1 ,Region start address register" line.long 0x0C "SECMPUE1,Security MPU Region 1 End Address Register" hexmask.long.tbyte 0x0C 2.--23. 0x04 " SECMPUE1 ,Region end address register" line.long 0x10 "SECMPUS2,Security MPU Region 2 Start Address Register" hexmask.long.tbyte 0x10 2.--23. 0x04 " SECMPUS2 ,Region start address register" line.long 0x14 "SECMPUE2,Security MPU Region 2 End Address Register" hexmask.long.tbyte 0x14 2.--23. 0x04 " SECMPUE2 ,Region end address register" line.long 0x18 "SECMPUS3,Security MPU Region 3 Start Address Register" hexmask.long.tbyte 0x18 2.--23. 0x04 " SECMPUS3 ,Region start address register" line.long 0x1C "SECMPUE3,Security MPU Region 3 End Address Register" hexmask.long.tbyte 0x1C 2.--23. 0x04 " SECMPUE3 ,Region end address register" rgroup.word (ad:0x00000400+0x38)++0x01 line.word 0x00 "SECMPUAC,Security MPU Access Control Register" bitfld.word 0x00 9. " DISPC1 ,PC region 1 disable" "No,Yes" bitfld.word 0x00 8. " DISPC0 ,PC region 0 disable" "No,Yes" bitfld.word 0x00 3. " DIS3 ,Region 3 disable" "No,Yes" bitfld.word 0x00 2. " DIS2 ,Region 2 disable" "No,Yes" newline bitfld.word 0x00 1. " DIS1 ,Region 1 disable" "No,Yes" bitfld.word 0x00 0. " DIS0 ,Region 0 disable" "No,Yes" else rgroup.long (ad:0x00000400+0x8)++0x03 line.long 0x00 "SECMPUPCS0,Security MPU Program Counter Start Address Register" rgroup.long (ad:0x00000400+0x10)++0x03 line.long 0x00 "SECMPUPCS1,Security MPU Program Counter Start Address Register" rgroup.long (ad:0x00000400+0xC)++0x03 line.long 0x00 "SECMPUPCE0,Security MPU Program Counter End Address Register" rgroup.long (ad:0x00000400+0x14)++0x03 line.long 0x00 "SECMPUPCE1,Security MPU Program Counter End Address Register" rgroup.long (ad:0x00000400+0x18)++0x07 line.long 0x00 "SECMPUS0,Security MPU Region 0 Start Address Register" hexmask.long.tbyte 0x00 0.--23. 0x01 " SECMPUS0 ,Region start address register" line.long 0x04 "SECMPUE0,Security MPU Region 0 End Address Register" hexmask.long.tbyte 0x04 0.--23. 0x01 " SECMPUE0 ,Region end address register" rgroup.word (ad:0x00000400+0x38)++0x01 line.word 0x00 "SECMPUAC,Security MPU Access Control Register" bitfld.word 0x00 9. " DISPC1 ,PC region 1 disable" "No,Yes" bitfld.word 0x00 8. " DISPC0 ,PC region 0 disable" "No,Yes" bitfld.word 0x00 0. " DIS0 ,Region 0 disable" "No,Yes" endif tree.end width 0x0B tree.end tree.open "DMAC (DMA Controller)" tree "Global" base ad:0x40005000 width 7. group.byte 0x200++0x00 line.byte 0x00 "DMAST,DMACA Module Activation Register" bitfld.byte 0x00 0. " DMST ,DMAC operation enable" "Disabled,Enabled" width 0x0B tree.end tree "DMAC 0" base ad:0x40005000 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x40005000+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x40005000+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x40005000+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x40005000+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 1" base ad:0x40005040 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x40005040+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x40005040+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x40005040+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x40005040+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 2" base ad:0x40005080 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x40005080+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x40005080+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x40005080+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x40005080+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 3" base ad:0x400050C0 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x400050C0+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x400050C0+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x400050C0+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x400050C0+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 4" base ad:0x40005100 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x40005100+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x40005100+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x40005100+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x40005100+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 5" base ad:0x40005140 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x40005140+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x40005140+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x40005140+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x40005140+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 6" base ad:0x40005180 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x40005180+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x40005180+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x40005180+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x40005180+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree "DMAC 7" base ad:0x400051C0 width 7. group.long 0x00++0x07 line.long 0x0 "DMSAR,DMA Source Address Register" line.long 0x4 "DMDAR,DMA Destination Address Register" if ((per.l(ad:0x400051C0+0x10)&0xC000)==0x0000) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--15. 1. " DMCRAL ,Lower bits of transfer count" elif ((per.l(ad:0x400051C0+0x10)&0xC000)==(0x4000||0x8000)) group.long 0x08++0x03 line.long 0x0 "DMCRA,DMA Transfer Count Register" hexmask.long.word 0x0 16.--25. 1. " DMCRAH ,Upper bits of transfer count" hexmask.long.word 0x0 0.--9. 1. " DMCRAL ,Lower bits of transfer count" else hgroup.long 0x08++0x03 hide.long 0x00 "DMCRA,DMA Transfer Count Register" endif group.word 0x0C++0x01 line.word 0x0 "DMCRB,DMA Block Transfer Count Register" group.word 0x10++0x01 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. " MD ,Transfer mode select" "Normal transfer,Repeat transfer,Block transfer,?..." bitfld.word 0x0 12.--13. " DTS ,Repeat area select" "Destination,Source,Not specified,?..." newline bitfld.word 0x0 8.--9. " SZ ,Transfer data size select" "8 bits,16 bits,32 bits,?..." bitfld.word 0x0 0.--1. " DCTG ,Transfer request source select" "Software,Interrupts,?..." group.byte 0x13++0x00 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 4. " DTIE ,Transfer end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 3. " ESIE ,Transfer escape end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 2. " RPTIE ,Repeat size end interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SARIE ,Source address extended repeat area overflow interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " DARIE ,Destination address extended repeat area overflow interrupt enable" "Disabled,Enabled" group.word 0x14++0x01 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. " SM ,Source address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 8.--12. " SARA ,Source address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." newline bitfld.word 0x0 6.--7. " DM ,Destination address update mode" "Fixed,Offset addition,Incremented,Decremented" bitfld.word 0x0 0.--4. " DARA ,Destination address extended repeat area" ",2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1 KB,2 KB,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,?..." group.long 0x18++0x03 line.long 0x0 "DMOFR,DMA Offset Register" group.byte 0x1C++0x00 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" bitfld.byte 0x0 0. " DTE ,DMA transfer enable" "Disabled,Enabled" if ((per.b(ad:0x400051C0+0x10)&0x03)==0x00) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" bitfld.byte 0x0 0. " SWREQ ,DMA software start" "Not requested,Requested" elif ((per.b(ad:0x400051C0+0x10)&0x03)==(0x01||0x02||0x03)) group.byte 0x1D++0x00 line.byte 0x0 "DMREQ,DMA Software Start Register" bitfld.byte 0x0 4. " CLRS ,DMA software start bit auto clear select" "Disabled,Enabled" endif group.byte 0x1E++0x00 line.byte 0x0 "DMSTS,DMA Status Register" rbitfld.byte 0x0 7. " ACT ,DMA active flag" "Suspended,Operating" bitfld.byte 0x0 4. " DTIF ,Transfer end interrupt flag" "No interrupt,Interrupt" newline bitfld.byte 0x0 0. " ESIF ,Transfer escape end interrupt flag" "No interrupt,Interrupt" width 0x0B tree.end tree.end tree "DTC (Data Transfer Controller)" base ad:0x40005400 width 8. group.byte 0x00++0x00 line.byte 0x0 "DTCCR,DTC Control Register" bitfld.byte 0x0 4. " RRS ,DTC transfer information read skip enable" "Disabled,Enabled" group.long 0x04++0x03 line.long 0x0 "DTCVBR,DTC Vector Base Register" group.byte 0x0C++0x00 line.byte 0x0 "DTCST,DTC Module Start Register" bitfld.byte 0x0 0. " DTCST ,DTC module start register" "Stopped,Started" rgroup.word 0x0E++0x01 line.word 0x0 "DTCSTS,DTC Status Register" bitfld.word 0x0 15. " ACT ,DTC active flag" "Disabled,Enabled" hexmask.word.byte 0x0 0.--7. 1. " VECN ,DTC-Activating vector number monitoring" width 0x0B tree.end tree "ELC (Event Link Controller)" base ad:0x40041000 width 10. group.byte 0x00++0x00 line.byte 0x0 "ELCR,Event Link Controller Register" bitfld.byte 0x0 7. " ELCON ,All event link enable" "Disabled,Enabled" group.byte 0x02++0x00 line.byte 0x0 "ELSEGR0,Event Link Software Event Generation Register 0" bitfld.byte 0x0 7. " WI ,ELSEGR register write disable" "No,Yes" bitfld.byte 0x0 6. " WE ,SEG bit write enable" "Disabled,Enabled" newline bitfld.byte 0x00 0. " SEG ,Software event generation" "Normal operation,Software event" group.byte 0x04++0x00 line.byte 0x0 "ELSEGR1,Event Link Software Event Generation Register 1" bitfld.byte 0x0 7. " WI ,ELSEGR register write disable" "No,Yes" bitfld.byte 0x0 6. " WE ,SEG bit write enable" "Disabled,Enabled" newline bitfld.byte 0x00 0. " SEG ,Software Event Generation" "Normal operation,Software event" group.word (0x10)++0x01 line.word 0x0 "ELSR0,Event Link Setting Register 0" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x14)++0x01 line.word 0x0 "ELSR1,Event Link Setting Register 1" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x18)++0x01 line.word 0x0 "ELSR2,Event Link Setting Register 2" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x1C)++0x01 line.word 0x0 "ELSR3,Event Link Setting Register 3" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x20)++0x01 line.word 0x0 "ELSR4,Event Link Setting Register 4" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x24)++0x01 line.word 0x0 "ELSR5,Event Link Setting Register 5" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x28)++0x01 line.word 0x0 "ELSR6,Event Link Setting Register 6" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x2C)++0x01 line.word 0x0 "ELSR7,Event Link Setting Register 7" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x30)++0x01 line.word 0x0 "ELSR8,Event Link Setting Register 8" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x34)++0x01 line.word 0x0 "ELSR9,Event Link Setting Register 9" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x38)++0x01 line.word 0x0 "ELSR10,Event Link Setting Register 10" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x3C)++0x01 line.word 0x0 "ELSR11,Event Link Setting Register 11" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x40)++0x01 line.word 0x0 "ELSR12,Event Link Setting Register 12" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x44)++0x01 line.word 0x0 "ELSR13,Event Link Setting Register 13" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x48)++0x01 line.word 0x0 "ELSR14,Event Link Setting Register 14" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x4C)++0x01 line.word 0x0 "ELSR15,Event Link Setting Register 15" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x50)++0x01 line.word 0x0 "ELSR16,Event Link Setting Register 16" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x54)++0x01 line.word 0x0 "ELSR17,Event Link Setting Register 17" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" group.word (0x58)++0x01 line.word 0x0 "ELSR18,Event Link Setting Register 18" hexmask.word 0x0 0.--8. 1. " ELS ,Event link select" width 0x0B tree.end tree.open "I/O Ports" tree "Port 0" base ad:0x40040000 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 31. " PODR15 ,P015 output data" "Low,High" bitfld.long 0x00 30. " PODR14 ,P014 output data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 26. " PODR10 ,P010 output data" "Low,High" newline endif bitfld.long 0x00 25. " PODR09 ,P009 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P008 output data" "Low,High" newline bitfld.long 0x00 23. " PODR07 ,P007 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P006 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P005 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P004 output data" "Low,High" newline bitfld.long 0x00 19. " PODR03 ,P003 output data" "Low,High" bitfld.long 0x00 18. " PODR02 ,P002 output data" "Low,High" bitfld.long 0x00 17. " PODR01 ,P001 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P000 output data" "Low,High" newline bitfld.long 0x00 15. " PDR15 ,P015 direction" "Input,Output" bitfld.long 0x00 14. " PDR14 ,P014 direction" "Input,Output" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 10. " PDR10 ,P010 direction" "Input,Output" newline endif bitfld.long 0x00 9. " PDR09 ,P009 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P008 direction" "Input,Output" bitfld.long 0x00 7. " PDR07 ,P007 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P006 direction" "Input,Output" newline bitfld.long 0x00 5. " PDR05 ,P005 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P004 direction" "Input,Output" bitfld.long 0x00 3. " PDR03 ,P003 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P002 direction" "Input,Output" newline bitfld.long 0x00 1. " PDR01 ,P001 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P000 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 31. " EIDR15 ,P015 event input data" "Low,High" bitfld.long 0x00 30. " EIDR14 ,P014 event input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 26. " EIDR10 ,P010 event input data" "Low,High" newline endif bitfld.long 0x00 25. " EIDR09 ,P009 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P008 event input data" "Low,High" newline bitfld.long 0x00 23. " EIDR07 ,P007 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P006 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P005 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P004 event input data" "Low,High" newline bitfld.long 0x00 19. " EIDR03 ,P003 event input data" "Low,High" bitfld.long 0x00 18. " EIDR02 ,P002 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P001 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P000 event input data" "Low,High" newline bitfld.long 0x00 15. " PIDR15 ,P015 input data" "Low,High" bitfld.long 0x00 14. " PIDR14 ,P014 input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 10. " PIDR10 ,P010 input data" "Low,High" newline endif bitfld.long 0x00 9. " PIDR09 ,P009 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P008 input data" "Low,High" newline bitfld.long 0x00 7. " PIDR07 ,P007 input data" "Low,High" bitfld.long 0x00 6. " PIDR06 ,P006 input data" "Low,High" bitfld.long 0x00 5. " PIDR05 ,P005 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P004 input data" "Low,High" newline bitfld.long 0x00 3. " PIDR03 ,P003 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P002 input data" "Low,High" bitfld.long 0x00 1. " PIDR01 ,P001 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P000 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 31. " PORR15 ,P015 output reset" "No affect,Low" bitfld.long 0x00 30. " PORR14 ,P014 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 26. " PORR10 ,P010 output reset" "No affect,Low" newline endif bitfld.long 0x00 25. " PORR09 ,P009 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P008 output reset" "No affect,Low" newline bitfld.long 0x00 23. " PORR07 ,P007 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P006 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P005 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P004 output reset" "No affect,Low" newline bitfld.long 0x00 19. " PORR03 ,P003 output reset" "No affect,Low" bitfld.long 0x00 18. " PORR02 ,P002 output reset" "No affect,Low" bitfld.long 0x00 17. " PORR01 ,P001 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P000 output reset" "No affect,Low" newline bitfld.long 0x00 15. " POSR15 ,P015 output set" "No affect,High" bitfld.long 0x00 14. " POSR14 ,P014 output set" "No affect,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 10. " POSR10 ,P010 output set" "No affect,High" newline endif bitfld.long 0x00 9. " POSR09 ,P009 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P008 output set" "No affect,High" newline bitfld.long 0x00 7. " POSR07 ,P007 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P006 output set" "No affect,High" bitfld.long 0x00 5. " POSR05 ,P005 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P004 output set" "No affect,High" newline bitfld.long 0x00 3. " POSR03 ,P003 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P002 output set" "No affect,High" bitfld.long 0x00 1. " POSR01 ,P001 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P000 output set" "No affect,High" group.long 0x800++0x03 line.long 0x00 "P000PFS,Port 000 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x804++0x03 line.long 0x00 "P001PFS,Port 001 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x808++0x03 line.long 0x00 "P002PFS,Port 002 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x80C++0x03 line.long 0x00 "P003PFS,Port 003 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x810++0x03 line.long 0x00 "P004PFS,Port 004 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x814++0x03 line.long 0x00 "P005PFS,Port 005 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x818++0x03 line.long 0x00 "P006PFS,Port 006 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x81C++0x03 line.long 0x00 "P007PFS,Port 007 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x820++0x03 line.long 0x00 "P008PFS,Port 008 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") group.long 0x824++0x03 line.long 0x00 "P009PFS,Port 009 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif cpuis("R7FS5D9*CFC")||cpuis("R7FS5D9*CBG") group.long 0x824++0x03 line.long 0x00 "P010PFS,Port 009 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif group.long 0x838++0x03 line.long 0x00 "P014PFS,Port 014 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x83C++0x03 line.long 0x00 "P015PFS,Port 015 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" width 0x0B tree.end tree "Port 1" base ad:0x40040020 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 31. " PODR15 ,P115 output data" "Low,High" bitfld.long 0x00 30. " PODR14 ,P114 output data" "Low,High" bitfld.long 0x00 29. " PODR13 ,P113 output data" "Low,High" bitfld.long 0x00 28. " PODR12 ,P112 output data" "Low,High" newline bitfld.long 0x00 27. " PODR11 ,P111 output data" "Low,High" bitfld.long 0x00 26. " PODR10 ,P110 output data" "Low,High" bitfld.long 0x00 25. " PODR09 ,P109 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P108 output data" "Low,High" newline bitfld.long 0x00 23. " PODR07 ,P107 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P106 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P105 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P104 output data" "Low,High" newline bitfld.long 0x00 19. " PODR03 ,P103 output data" "Low,High" bitfld.long 0x00 18. " PODR02 ,P102 output data" "Low,High" bitfld.long 0x00 17. " PODR01 ,P101 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P100 output data" "Low,High" newline bitfld.long 0x00 15. " PDR15 ,P115 direction" "Input,Output" bitfld.long 0x00 14. " PDR14 ,P114 direction" "Input,Output" bitfld.long 0x00 13. " PDR13 ,P113 direction" "Input,Output" bitfld.long 0x00 12. " PDR12 ,P112 direction" "Input,Output" newline bitfld.long 0x00 11. " PDR11 ,P111 direction" "Input,Output" bitfld.long 0x00 10. " PDR10 ,P110 direction" "Input,Output" bitfld.long 0x00 9. " PDR09 ,P109 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P108 direction" "Input,Output" newline bitfld.long 0x00 7. " PDR07 ,P107 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P106 direction" "Input,Output" bitfld.long 0x00 5. " PDR05 ,P105 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P104 direction" "Input,Output" newline bitfld.long 0x00 3. " PDR03 ,P103 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P102 direction" "Input,Output" bitfld.long 0x00 1. " PDR01 ,P101 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P100 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 31. " EIDR15 ,P115 event input data" "Low,High" bitfld.long 0x00 30. " EIDR14 ,P114 event input data" "Low,High" bitfld.long 0x00 29. " EIDR13 ,P113 event input data" "Low,High" bitfld.long 0x00 28. " EIDR12 ,P112 event input data" "Low,High" newline bitfld.long 0x00 27. " EIDR11 ,P111 event input data" "Low,High" bitfld.long 0x00 26. " EIDR10 ,P110 event input data" "Low,High" bitfld.long 0x00 25. " EIDR09 ,P109 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P108 event input data" "Low,High" newline bitfld.long 0x00 23. " EIDR07 ,P107 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P106 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P105 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P104 event input data" "Low,High" newline bitfld.long 0x00 19. " EIDR03 ,P103 event input data" "Low,High" bitfld.long 0x00 18. " EIDR02 ,P102 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P101 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P100 event input data" "Low,High" newline bitfld.long 0x00 15. " PIDR15 ,P115 input data" "Low,High" bitfld.long 0x00 14. " PIDR14 ,P114 input data" "Low,High" bitfld.long 0x00 13. " PIDR13 ,P113 input data" "Low,High" bitfld.long 0x00 12. " PIDR12 ,P112 input data" "Low,High" newline bitfld.long 0x00 11. " PIDR11 ,P111 input data" "Low,High" bitfld.long 0x00 10. " PIDR10 ,P110 input data" "Low,High" bitfld.long 0x00 9. " PIDR09 ,P109 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P108 input data" "Low,High" newline bitfld.long 0x00 7. " PIDR07 ,P107 input data" "Low,High" bitfld.long 0x00 6. " PIDR06 ,P106 input data" "Low,High" bitfld.long 0x00 5. " PIDR05 ,P105 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P104 input data" "Low,High" newline bitfld.long 0x00 3. " PIDR03 ,P103 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P102 input data" "Low,High" bitfld.long 0x00 1. " PIDR01 ,P101 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P100 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 31. " PORR15 ,P115 output reset" "No affect,Low" bitfld.long 0x00 30. " PORR14 ,P114 output reset" "No affect,Low" bitfld.long 0x00 29. " PORR13 ,P113 output reset" "No affect,Low" bitfld.long 0x00 28. " PORR12 ,P112 output reset" "No affect,Low" newline bitfld.long 0x00 27. " PORR11 ,P111 output reset" "No affect,Low" bitfld.long 0x00 26. " PORR10 ,P110 output reset" "No affect,Low" bitfld.long 0x00 25. " PORR09 ,P109 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P108 output reset" "No affect,Low" newline bitfld.long 0x00 23. " PORR07 ,P107 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P106 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P105 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P104 output reset" "No affect,Low" newline bitfld.long 0x00 19. " PORR03 ,P103 output reset" "No affect,Low" bitfld.long 0x00 18. " PORR02 ,P102 output reset" "No affect,Low" bitfld.long 0x00 17. " PORR01 ,P101 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P100 output reset" "No affect,Low" newline bitfld.long 0x00 15. " POSR15 ,P115 output set" "No affect,High" bitfld.long 0x00 14. " POSR14 ,P114 output set" "No affect,High" bitfld.long 0x00 13. " POSR13 ,P113 output set" "No affect,High" bitfld.long 0x00 12. " POSR12 ,P112 output set" "No affect,High" newline bitfld.long 0x00 11. " POSR11 ,P111 output set" "No affect,High" bitfld.long 0x00 10. " POSR10 ,P110 output set" "No affect,High" bitfld.long 0x00 9. " POSR09 ,P109 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P108 output set" "No affect,High" newline bitfld.long 0x00 7. " POSR07 ,P107 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P106 output set" "No affect,High" bitfld.long 0x00 5. " POSR05 ,P105 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P104 output set" "No affect,High" newline bitfld.long 0x00 3. " POSR03 ,P103 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P102 output set" "No affect,High" bitfld.long 0x00 1. " POSR01 ,P101 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P100 output set" "No affect,High" group.long 0x0C++0x03 line.long 0x00 "PCNTR4,Port Control Register 4" bitfld.long 0x00 31. " EORR15 ,P115 Event output reset" "No affect,Low" bitfld.long 0x00 30. " EORR14 ,P114 Event output reset" "No affect,Low" bitfld.long 0x00 29. " EORR13 ,P113 Event output reset" "No affect,Low" bitfld.long 0x00 28. " EORR12 ,P112 Event output reset" "No affect,Low" newline bitfld.long 0x00 27. " EORR11 ,P111 Event output reset" "No affect,Low" bitfld.long 0x00 26. " EORR10 ,P110 Event output reset" "No affect,Low" bitfld.long 0x00 25. " EORR09 ,P109 Event output reset" "No affect,Low" bitfld.long 0x00 24. " EORR08 ,P108 Event output reset" "No affect,Low" newline bitfld.long 0x00 23. " EORR07 ,P107 Event output reset" "No affect,Low" bitfld.long 0x00 22. " EORR06 ,P106 Event output reset" "No affect,Low" bitfld.long 0x00 21. " EORR05 ,P105 Event output reset" "No affect,Low" bitfld.long 0x00 20. " EORR04 ,P104 Event output reset" "No affect,Low" newline bitfld.long 0x00 19. " EORR03 ,P103 Event output reset" "No affect,Low" bitfld.long 0x00 18. " EORR02 ,P102 Event output reset" "No affect,Low" bitfld.long 0x00 17. " EORR01 ,P101 Event output reset" "No affect,Low" bitfld.long 0x00 16. " EORR00 ,P100 Event output reset" "No affect,Low" newline bitfld.long 0x00 15. " EOSR15 ,P115 Event output set" "No affect,High" bitfld.long 0x00 14. " EOSR14 ,P114 Event output set" "No affect,High" bitfld.long 0x00 13. " EOSR13 ,P113 Event output set" "No affect,High" bitfld.long 0x00 12. " EOSR12 ,P112 Event output set" "No affect,High" newline bitfld.long 0x00 11. " EOSR11 ,P111 Event output set" "No affect,High" bitfld.long 0x00 10. " EOSR10 ,P110 Event output set" "No affect,High" bitfld.long 0x00 9. " EOSR09 ,P109 Event output set" "No affect,High" bitfld.long 0x00 8. " EOSR08 ,P108 Event output set" "No affect,High" newline bitfld.long 0x00 7. " EOSR07 ,P107 Event output set" "No affect,High" bitfld.long 0x00 6. " EOSR06 ,P106 Event output set" "No affect,High" bitfld.long 0x00 5. " EOSR05 ,P105 Event output set" "No affect,High" bitfld.long 0x00 4. " EOSR04 ,P104 Event output set" "No affect,High" newline bitfld.long 0x00 3. " EOSR03 ,P103 Event output set" "No affect,High" bitfld.long 0x00 2. " EOSR02 ,P102 Event output set" "No affect,High" bitfld.long 0x00 1. " EOSR01 ,P101 Event output set" "No affect,High" bitfld.long 0x00 0. " EOSR00 ,P100 Event output set" "No affect,High" sif CPUIS("R7FS5D5*") group.long 0x820++0x03 line.long 0x00 "P100PFS,Port 100 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO0,GTETRGA,GTI0C5B,RXD0/MISO0/SCL0,SCK1,MISOA_A,SCL1_B,KR00,,,D00[A00/D00]/DQ00,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x824++0x03 line.long 0x00 "P101PFS,Port 101 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE0,GTETRGB,GTI0C5A,TXD0/MOSI0/SDA0,CTS1_RTS1/SS1,MOSIA_A,SDA1_B,KR01,,,D01[A01/D01]/DQ01,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x828++0x03 line.long 0x00 "P102PFS,Port 102 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTO0,GTOWLO,GTIOC2B_A,SCK0,,RSPCKA_A,,KR02,,ADTRG0,D02[A02/D02]/DQ02,,,,,CRX0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x82C++0x03 line.long 0x00 "P103PFS,Port 103 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWUP,GTIOC2A_A,CTS0_RTS0/SS0,,SSLA0_A,,KR03,,,D03[A03/D03]/DQ03,,,,,CRX0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x830++0x03 line.long 0x00 "P104PFS,Port 104 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGB,GTIOC1B,RXD8/MISO8/SCL8,,SSLA1_A,,KR04,,,D04[A04/D04]/DQ04,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x834++0x03 line.long 0x00 "P105PFS,Port 105 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGA,GTIOC1A,TXD8/MOSI8/SDA8,,SSLA2_A,,KR05,,,D05[A05/D05]/DQ05,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x838++0x03 line.long 0x00 "P106PFS,Port 106 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOB0,,GTIOC8B,SCK8,,SSLA3_A,,KR06,,,D06[A06/D06]/DQ06,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x83C++0x03 line.long 0x00 "P107PFS,Port 107 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOA0,,GTIOC8A,CTS8_RTS8/SS8,,,,KR07,,,D07[A07/D07]/DQ07,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x840++0x03 line.long 0x00 "P108PFS,Port 108 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TMS/SWDIO,,GTOULO,GTIOC0B_A,,CTS9_RTS9/SS9,SSLB0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x844++0x03 line.long 0x00 "P109PFS,Port 109 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TDO/SWO,,GTOVUP,GTIOC1A_A,,TXD9/MOSI9/SDA9,MOSIB_B,,,CLKOUT,,,,,,,CTX1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x848++0x03 line.long 0x00 "P110PFS,Port 110 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TDI,,GTOCLO,GTIOC1B_A,CTS2_RTS2/SS2,RXD9/MISO9/SCL9,MISOB_B,,,VCOUT,,,,,,,CRX1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x84C++0x03 line.long 0x00 "P111PFS,Port 111 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GIT0C3A_A,SCK2,SCK9,RSPCKB_B,,,,,A05,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x850++0x03 line.long 0x00 "P112PFS,Port 112 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTI0C3B_A,TXD2/MOSI2/SDA2,SCK1,SSLB0_B,,,,,A04,,,,,,,SSIBCK0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x854++0x03 line.long 0x00 "P113PFS,Port 113 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC2A,RXD2/MISO2/SCL2,,,,,,,A03,,,,,,,SSILRCK0/SSIFS0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x858++0x03 line.long 0x00 "P114PFS,Port 114 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC2B,,,,,,,,A02,,,,,,,SSIRXD0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x85C++0x03 line.long 0x00 "P115PFS,Port 115 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC4A,,,,,,,,,A01,,,,,,,SSITXD0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x820++0x03 line.long 0x00 "P100PFS,Port 100 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO0,GTETRGA,GTI0C5B,RXD0/MISO0/SCL0,SCK1,MISOA_A,SCL1_B,KR00,,,D00[A00/D00]/DQ00,,,,,,,,,,,,,,LCD_EXTCLK_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x824++0x03 line.long 0x00 "P101PFS,Port 101 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE0,GTETRGB,GTI0C5A,TXD0/MOSI0/SDA0,CTS1_RTS1/SS1,MOSIA_A,SDA1_B,KR01,,,D01[A01/D01]/DQ01,,,,,,,,,,,,,,LCD_CLK_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x828++0x03 line.long 0x00 "P102PFS,Port 102 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTO0,GTOWLO,GTIOC2B_A,SCK0,,RSPCKA_A,,KR02,,ADTRG0,D02[A02/D02]/DQ02,,,,,CRX0,,,,,,,,,LCD_TCON0_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x82C++0x03 line.long 0x00 "P103PFS,Port 103 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWUP,GTIOC2A_A,CTS0_RTS0/SS0,,SSLA0_A,,KR03,,,D03[A03/D03]/DQ03,,,,,CRX0,,,,,,,,,LCD_TCON1_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x830++0x03 line.long 0x00 "P104PFS,Port 104 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGB,GTIOC1B,RXD8/MISO8/SCL8,,SSLA1_A,,KR04,,,D04[A04/D04]/DQ04,,,,,,,,,,,,,,LCD_TCON2_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x834++0x03 line.long 0x00 "P105PFS,Port 105 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGA,GTIOC1A,TXD8/MOSI8/SDA8,,SSLA2_A,,KR05,,,D05[A05/D05]/DQ05,,,,,,,,,,,,,,LCD_TCON3_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x838++0x03 line.long 0x00 "P106PFS,Port 106 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOB0,,GTIOC8B,SCK8,,SSLA3_A,,KR06,,,D06[A06/D06]/DQ06,,,,,,,,,,,,,,LCD_DATA00_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x83C++0x03 line.long 0x00 "P107PFS,Port 107 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOA0,,GTIOC8A,CTS8_RTS8/SS8,,,,KR07,,,D07[A07/D07]/DQ07,,,,,,,,,,,,,,LCD_DATA01_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x840++0x03 line.long 0x00 "P108PFS,Port 108 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TMS/SWDIO,,GTOULO,GTIOC0B_A,,CTS9_RTS9/SS9,SSLB0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x844++0x03 line.long 0x00 "P109PFS,Port 109 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TDO/SWO,,GTOVUP,GTIOC1A_A,,TXD9/MOSI9/SDA9,MOSIB_B,,,CLKOUT,,,,,,,CTX1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x848++0x03 line.long 0x00 "P110PFS,Port 110 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TDI,,GTOCLO,GTIOC1B_A,CTS2_RTS2/SS2,RXD9/MISO9/SCL9,MISOB_B,,,VCOUT,,,,,,,CRX1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x84C++0x03 line.long 0x00 "P111PFS,Port 111 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GIT0C3A_A,SCK2,SCK9,RSPCKB_B,,,,,A05,,,,,,,,,,,,,,LCD_DATA12_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x850++0x03 line.long 0x00 "P112PFS,Port 112 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTI0C3B_A,TXD2/MOSI2/SDA2,SCK1,SSLB0_B,,,,,A04,,,,,,,SSIBCK0_B,,,,,,,LCD_DATA11_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x854++0x03 line.long 0x00 "P113PFS,Port 113 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC2A,RXD2/MISO2/SCL2,,,,,,,A03,,,,,,,SSILRCK0/SSIFS0_B,,,,,,,LCD_DATA01_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x858++0x03 line.long 0x00 "P114PFS,Port 114 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC2B,,,,,,,,A02,,,,,,,SSIRXD0_B,,,,,,,LCD_DATA09_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x85C++0x03 line.long 0x00 "P115PFS,Port 115 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC4A,,,,,,,,A01,,,,,,,SSITXD0_B,,,,,,,LCD_DATA08_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif width 0x0b tree.end tree "Port 2" base ad:0x40040040 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 30. " PODR14 ,P214 output data" "Low,High" bitfld.long 0x00 29. " PODR13 ,P213 output data" "Low,High" bitfld.long 0x00 28. " PODR12 ,P212 output data" "Low,High" bitfld.long 0x00 27. " PODR11 ,P211 output data" "Low,High" newline bitfld.long 0x00 26. " PODR10 ,P210 output data" "Low,High" bitfld.long 0x00 25. " PODR09 ,P209 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P208 output data" "Low,High" bitfld.long 0x00 23. " PODR07 ,P207 output data" "Low,High" newline bitfld.long 0x00 22. " PODR06 ,P206 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P205 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P204 output data" "Low,High" bitfld.long 0x00 19. " PODR03 ,P203 output data" "Low,High" newline bitfld.long 0x00 18. " PODR02 ,P202 output data" "Low,High" bitfld.long 0x00 17. " PODR01 ,P201 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P200 output data" "Low,High" bitfld.long 0x00 14. " PDR14 ,P214 direction" "Input,Output" newline bitfld.long 0x00 13. " PDR13 ,P213 direction" "Input,Output" bitfld.long 0x00 12. " PDR12 ,P212 direction" "Input,Output" bitfld.long 0x00 11. " PDR11 ,P211 direction" "Input,Output" bitfld.long 0x00 10. " PDR10 ,P210 direction" "Input,Output" newline bitfld.long 0x00 9. " PDR09 ,P209 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P208 direction" "Input,Output" bitfld.long 0x00 7. " PDR07 ,P207 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P206 direction" "Input,Output" newline bitfld.long 0x00 5. " PDR05 ,P205 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P204 direction" "Input,Output" bitfld.long 0x00 3. " PDR03 ,P203 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P202 direction" "Input,Output" newline bitfld.long 0x00 1. " PDR01 ,P201 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P200 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 30. " EIDR14 ,P214 event input data" "Low,High" bitfld.long 0x00 29. " EIDR13 ,P213 event input data" "Low,High" bitfld.long 0x00 28. " EIDR12 ,P212 event input data" "Low,High" bitfld.long 0x00 27. " EIDR11 ,P211 event input data" "Low,High" newline bitfld.long 0x00 26. " EIDR10 ,P210 event input data" "Low,High" bitfld.long 0x00 25. " EIDR09 ,P209 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P208 event input data" "Low,High" bitfld.long 0x00 23. " EIDR07 ,P207 event input data" "Low,High" newline bitfld.long 0x00 22. " EIDR06 ,P206 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P205 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P204 event input data" "Low,High" bitfld.long 0x00 19. " EIDR03 ,P203 event input data" "Low,High" newline bitfld.long 0x00 18. " EIDR02 ,P202 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P201 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P200 event input data" "Low,High" bitfld.long 0x00 14. " PIDR14 ,P214 input data" "Low,High" newline bitfld.long 0x00 13. " PIDR13 ,P213 input data" "Low,High" bitfld.long 0x00 12. " PIDR12 ,P212 input data" "Low,High" bitfld.long 0x00 11. " PIDR11 ,P211 input data" "Low,High" bitfld.long 0x00 10. " PIDR10 ,P210 input data" "Low,High" newline bitfld.long 0x00 9. " PIDR09 ,P209 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P208 input data" "Low,High" bitfld.long 0x00 7. " PIDR07 ,P207 input data" "Low,High" bitfld.long 0x00 6. " PIDR06 ,P206 input data" "Low,High" newline bitfld.long 0x00 5. " PIDR05 ,P205 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P204 input data" "Low,High" bitfld.long 0x00 3. " PIDR03 ,P203 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P202 input data" "Low,High" newline bitfld.long 0x00 1. " PIDR01 ,P201 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P200 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 30. " PORR14 ,P214 output reset" "No affect,Low" bitfld.long 0x00 29. " PORR13 ,P213 output reset" "No affect,Low" bitfld.long 0x00 28. " PORR12 ,P212 output reset" "No affect,Low" bitfld.long 0x00 27. " PORR11 ,P211 output reset" "No affect,Low" newline bitfld.long 0x00 26. " PORR10 ,P210 output reset" "No affect,Low" bitfld.long 0x00 25. " PORR09 ,P209 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P208 output reset" "No affect,Low" bitfld.long 0x00 23. " PORR07 ,P207 output reset" "No affect,Low" newline bitfld.long 0x00 22. " PORR06 ,P206 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P205 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P204 output reset" "No affect,Low" bitfld.long 0x00 19. " PORR03 ,P203 output reset" "No affect,Low" newline bitfld.long 0x00 18. " PORR02 ,P202 output reset" "No affect,Low" bitfld.long 0x00 17. " PORR01 ,P201 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P200 output reset" "No affect,Low" bitfld.long 0x00 14. " POSR14 ,P214 output set" "No affect,High" newline bitfld.long 0x00 13. " POSR13 ,P213 output set" "No affect,High" bitfld.long 0x00 12. " POSR12 ,P212 output set" "No affect,High" bitfld.long 0x00 11. " POSR11 ,P211 output set" "No affect,High" bitfld.long 0x00 10. " POSR10 ,P210 output set" "No affect,High" newline bitfld.long 0x00 9. " POSR09 ,P209 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P208 output set" "No affect,High" bitfld.long 0x00 7. " POSR07 ,P207 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P206 output set" "No affect,High" newline bitfld.long 0x00 5. " POSR05 ,P205 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P204 output set" "No affect,High" bitfld.long 0x00 3. " POSR03 ,P203 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P202 output set" "No affect,High" newline bitfld.long 0x00 1. " POSR01 ,P201 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P200 output set" "No affect,High" group.long 0x0C++0x03 line.long 0x00 "PCNTR4,Port Control Register 4" bitfld.long 0x00 30. " EORR14 ,P214 Event output reset" "No affect,Low" bitfld.long 0x00 29. " EORR13 ,P213 Event output reset" "No affect,Low" bitfld.long 0x00 28. " EORR12 ,P212 Event output reset" "No affect,Low" bitfld.long 0x00 27. " EORR11 ,P211 Event output reset" "No affect,Low" newline bitfld.long 0x00 26. " EORR10 ,P210 Event output reset" "No affect,Low" bitfld.long 0x00 25. " EORR09 ,P209 Event output reset" "No affect,Low" bitfld.long 0x00 24. " EORR08 ,P208 Event output reset" "No affect,Low" bitfld.long 0x00 23. " EORR07 ,P207 Event output reset" "No affect,Low" newline bitfld.long 0x00 22. " EORR06 ,P206 Event output reset" "No affect,Low" bitfld.long 0x00 21. " EORR05 ,P205 Event output reset" "No affect,Low" bitfld.long 0x00 20. " EORR04 ,P204 Event output reset" "No affect,Low" bitfld.long 0x00 19. " EORR03 ,P203 Event output reset" "No affect,Low" newline bitfld.long 0x00 18. " EORR02 ,P202 Event output reset" "No affect,Low" bitfld.long 0x00 17. " EORR01 ,P201 Event output reset" "No affect,Low" bitfld.long 0x00 16. " EORR00 ,P200 Event output reset" "No affect,Low" bitfld.long 0x00 14. " EOSR14 ,P214 Event output set" "No affect,High" newline bitfld.long 0x00 13. " EOSR13 ,P213 Event output set" "No affect,High" bitfld.long 0x00 12. " EOSR12 ,P212 Event output set" "No affect,High" bitfld.long 0x00 11. " EOSR11 ,P211 Event output set" "No affect,High" bitfld.long 0x00 10. " EOSR10 ,P210 Event output set" "No affect,High" newline bitfld.long 0x00 9. " EOSR09 ,P209 Event output set" "No affect,High" bitfld.long 0x00 8. " EOSR08 ,P208 Event output set" "No affect,High" bitfld.long 0x00 7. " EOSR07 ,P207 Event output set" "No affect,High" bitfld.long 0x00 6. " EOSR06 ,P206 Event output set" "No affect,High" newline bitfld.long 0x00 5. " EOSR05 ,P205 Event output set" "No affect,High" bitfld.long 0x00 4. " EOSR04 ,P204 Event output set" "No affect,High" bitfld.long 0x00 3. " EOSR03 ,P203 Event output set" "No affect,High" bitfld.long 0x00 2. " EOSR02 ,P202 Event output set" "No affect,High" newline bitfld.long 0x00 1. " EOSR01 ,P201 Event output set" "No affect,High" bitfld.long 0x00 0. " EOSR00 ,P200 Event output set" "No affect,High" group.long 0x840++0x03 line.long 0x00 "P200PFS,Port 200 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x844++0x03 line.long 0x00 "P201PFS,Port 201 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") sif cpuis("R7FS5D5*") group.long 0x848++0x03 line.long 0x00 "P202PFS,Port 202 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5B,SCK2,RXD9/MISO9/SCL9,MISOB_A,,,,,WR1/BC1,,,,CRX0,,,,,SD0DAT6_A,ET0_ERXD2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x848++0x03 line.long 0x00 "P202PFS,Port 202 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5B,SCK2,RXD9/MISO9/SCL9,MISOB_A,,,,,WR1/BC1,,,,CRX0,,,,,SD0DAT6_A,ET0_ERXD2,,,LCD_TCON3_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif endif sif !cpuis("R7FS5D*CFP") group.long 0x84C++0x03 line.long 0x00 "P203PFS,Port 203 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5A,CTS2_RTS2/SS2,TXD9/MOSI9/SDA9,MOSIB_A,,,,,A19,TSCAP,,,CTX0,,,,,SD0DAT5_A,ET0_COL,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x850++0x03 line.long 0x00 "P204PFS,Port 204 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO1,GTIW,GTIOC4B,SCK4,SCK9,RSPCKB_A,SCL0_B,,,CACREF,A18,TS00,,,,,,SSIBCK0_C,USB_OVRCURB-DS,10100,SD0DAT4_A,ET0_RX_DV,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif group.long 0x854++0x03 line.long 0x00 "P205PFS,Port 205 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGT01,GTIV,GTI0C4A,TXD4/MOSI4/SDA4,CTS9_RTS9/SS9,SSLB0_A,SCL1_A,,CLKOUT,,A16,TSCAP,,,,,,SSILRCK0/SSIFS0_C,USB_OVRCURA-DS,,SD0DAT3_A,ET0_WOL,ET0_WOL,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x858++0x03 line.long 0x00 "P206PFS,Port 206 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,00001,GTIU,00011,RXD4/MISO4/SCL4,00101,SSLB1_A,SDA1_A,,,,WAIT,TS01,,,,,,SSIDATA0_C,USB_VBUSEN,10100,SD0DAT2_A,ET0_LINKSTA,ET0_LINKSTA,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif cpuis("R7FS5D5*") group.long 0x85C++0x03 line.long 0x00 "P207PFS,Port 207 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,SSLB2_A,,,,,A17,TS02,,,,,QSSL,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x85C++0x03 line.long 0x00 "P207PFS,Port 207 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,SSLB2_A,,,,,A17,TS02,,,,,QSSL,,,,,,,,,,,,LCD_DATA23_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif cpuis("R7FS5D5*") group.long 0x860++0x03 line.long 0x00 "P208PFS,Port 208 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOVL0,,,,,,,,,CS4,,,,,,QIO3,,,,SD0DAT0_B,ET0_LINKSTA,ET0_LINKSTA,,,TDATA3,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x864++0x03 line.long 0x00 "P209PFS,Port 209 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOVUP,,,,,,,,,CS5,,,,,,QIO2,,,,SD0WP,ET0_EXOUT,ET0_EXOUT,,,TDATA2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x868++0x03 line.long 0x00 "P210PFS,Port 210 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTIW,,,,,,,,,CS6,,,,,,QIO1,,,,SD0CD,ET0_WOL,ET0_WOL,,,TDATA1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x86C++0x03 line.long 0x00 "P211PFS,Port 211 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTIV,,,,,,,,,CS7,,,,,,QIO0,,,,SD0CMD_B,ET0_MDIO,ET0_MDIO,,,TDATA0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x870++0x03 line.long 0x00 "P212PFS,Port 212 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE1,GTETRGD,GTIOC0B,,RXD1/MISO1/SCL1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x874++0x03 line.long 0x00 "P213PFS,Port 213 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGC,GTIOC0A,,TXD/MOSI1/SDA1,,,,,ADTRG1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x878++0x03 line.long 0x00 "P214PFS,Port 214 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTIU,,,,,,,,,,,,,,,QSPCLK,,,,SD0CLK_B,ET0_MDC,ET0_MDC,,,TCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x860++0x03 line.long 0x00 "P208PFS,Port 208 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOVL0,,,,,,,,,,,,,,,QIO3,,,,SD0DAT0_B,ET0_LINKSTA,ET0_LINKSTA,,LCD_DATA18_B,TDATA3,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x864++0x03 line.long 0x00 "P209PFS,Port 209 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOVUP,,,,,,,,,,,,,,,QIO2,,,,SD0WP,ET0_EXOUT,ET0_EXOUT,,LCD_DATA19_B,TDATA2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x868++0x03 line.long 0x00 "P210PFS,Port 210 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTIW,,,,,,,,,,,,,,,QIO1,,,,SD0CD,ET0_WOL,ET0_WOL,,LCD_DATA20_B,TDATA1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x86C++0x03 line.long 0x00 "P211PFS,Port 211 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTIV,,,,,,,,,,,,,,,QIO0,,,,SD0CMD_B,ET0_MDIO,ET0_MDIO,,LCD_DATA21_B,TDATA0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x870++0x03 line.long 0x00 "P212PFS,Port 212 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE1,GTETRGD,GTIOC0B,,RXD1/MISO1/SCL1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x874++0x03 line.long 0x00 "P213PFS,Port 213 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGC,GTIOC0A,,TXD/MOSI1/SDA1,,,,,ADTRG1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x878++0x03 line.long 0x00 "P214PFS,Port 214 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTIU,,,,,,,,,,,,,,,QSPCLK,,,,SD0CLK_B,ET0_MDC,ET0_MDC,,LCD_DATA22_B,TCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif width 0x0b tree.end tree "Port 3" base ad:0x40040060 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " PODR15 ,P315 output data" "Low,High" bitfld.long 0x00 30. " PODR14 ,P314 output data" "Low,High" newline endif bitfld.long 0x00 29. " PODR13 ,P313 output data" "Low,High" bitfld.long 0x00 28. " PODR12 ,P312 output data" "Low,High" bitfld.long 0x00 27. " PODR11 ,P311 output data" "Low,High" bitfld.long 0x00 26. " PODR10 ,P310 output data" "Low,High" newline bitfld.long 0x00 25. " PODR09 ,P309 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P308 output data" "Low,High" bitfld.long 0x00 23. " PODR07 ,P307 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P306 output data" "Low,High" newline bitfld.long 0x00 21. " PODR05 ,P305 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P304 output data" "Low,High" bitfld.long 0x00 19. " PODR03 ,P303 output data" "Low,High" bitfld.long 0x00 18. " PODR02 ,P302 output data" "Low,High" newline bitfld.long 0x00 17. " PODR01 ,P301 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P300 output data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " PDR15 ,P315 direction" "Input,Output" bitfld.long 0x00 14. " PDR14 ,P314 direction" "Input,Output" newline endif bitfld.long 0x00 13. " PDR13 ,P313 direction" "Input,Output" bitfld.long 0x00 12. " PDR12 ,P312 direction" "Input,Output" newline bitfld.long 0x00 11. " PDR11 ,P311 direction" "Input,Output" bitfld.long 0x00 10. " PDR10 ,P310 direction" "Input,Output" bitfld.long 0x00 9. " PDR09 ,P309 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P308 direction" "Input,Output" newline bitfld.long 0x00 7. " PDR07 ,P307 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P306 direction" "Input,Output" bitfld.long 0x00 5. " PDR05 ,P305 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P304 direction" "Input,Output" newline bitfld.long 0x00 3. " PDR03 ,P303 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P302 direction" "Input,Output" bitfld.long 0x00 1. " PDR01 ,P301 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P300 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " EIDR15 ,P315 event input data" "Low,High" bitfld.long 0x00 30. " EIDR14 ,P314 event input data" "Low,High" newline endif bitfld.long 0x00 29. " EIDR13 ,P313 event input data" "Low,High" bitfld.long 0x00 28. " EIDR12 ,P312 event input data" "Low,High" newline bitfld.long 0x00 27. " EIDR11 ,P311 event input data" "Low,High" bitfld.long 0x00 26. " EIDR10 ,P310 event input data" "Low,High" bitfld.long 0x00 25. " EIDR09 ,P309 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P308 event input data" "Low,High" newline bitfld.long 0x00 23. " EIDR07 ,P307 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P306 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P305 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P304 event input data" "Low,High" newline bitfld.long 0x00 19. " EIDR03 ,P303 event input data" "Low,High" bitfld.long 0x00 18. " EIDR02 ,P302 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P301 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P300 event input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " PIDR15 ,P315 input data" "Low,High" bitfld.long 0x00 14. " PIDR14 ,P314 input data" "Low,High" newline endif bitfld.long 0x00 13. " PIDR13 ,P313 input data" "Low,High" bitfld.long 0x00 12. " PIDR12 ,P312 input data" "Low,High" bitfld.long 0x00 11. " PIDR11 ,P311 input data" "Low,High" bitfld.long 0x00 10. " PIDR10 ,P310 input data" "Low,High" newline bitfld.long 0x00 9. " PIDR09 ,P309 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P308 input data" "Low,High" bitfld.long 0x00 7. " PIDR07 ,P307 input data" "Low,High" bitfld.long 0x00 6. " PIDR06 ,P306 input data" "Low,High" newline bitfld.long 0x00 5. " PIDR05 ,P305 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P304 input data" "Low,High" bitfld.long 0x00 3. " PIDR03 ,P303 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P302 input data" "Low,High" newline bitfld.long 0x00 1. " PIDR01 ,P301 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P300 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " PORR15 ,P315 output reset" "No affect,Low" bitfld.long 0x00 30. " PORR14 ,P314 output reset" "No affect,Low" newline endif bitfld.long 0x00 29. " PORR13 ,P313 output reset" "No affect,Low" bitfld.long 0x00 28. " PORR12 ,P312 output reset" "No affect,Low" bitfld.long 0x00 27. " PORR11 ,P311 output reset" "No affect,Low" bitfld.long 0x00 26. " PORR10 ,P310 output reset" "No affect,Low" newline bitfld.long 0x00 25. " PORR09 ,P309 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P308 output reset" "No affect,Low" bitfld.long 0x00 23. " PORR07 ,P307 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P306 output reset" "No affect,Low" newline bitfld.long 0x00 21. " PORR05 ,P305 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P304 output reset" "No affect,Low" bitfld.long 0x00 19. " PORR03 ,P303 output reset" "No affect,Low" bitfld.long 0x00 18. " PORR02 ,P302 output reset" "No affect,Low" newline bitfld.long 0x00 17. " PORR01 ,P301 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P300 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " POSR15 ,P315 output set" "No affect,High" bitfld.long 0x00 14. " POSR14 ,P314 output set" "No affect,High" newline endif bitfld.long 0x00 13. " POSR13 ,P313 output set" "No affect,High" bitfld.long 0x00 12. " POSR12 ,P312 output set" "No affect,High" bitfld.long 0x00 11. " POSR11 ,P311 output set" "No affect,High" bitfld.long 0x00 10. " POSR10 ,P310 output set" "No affect,High" newline bitfld.long 0x00 9. " POSR09 ,P309 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P308 output set" "No affect,High" bitfld.long 0x00 7. " POSR07 ,P307 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P306 output set" "No affect,High" newline bitfld.long 0x00 5. " POSR05 ,P305 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P304 output set" "No affect,High" bitfld.long 0x00 3. " POSR03 ,P303 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P302 output set" "No affect,High" newline bitfld.long 0x00 1. " POSR01 ,P301 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P300 output set" "No affect,High" group.long 0x0C++0x03 line.long 0x00 "PCNTR4,Port Control Register 4" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " EORR15 ,P315 Event output reset" "No affect,Low" bitfld.long 0x00 30. " EORR14 ,P314 Event output reset" "No affect,Low" newline endif bitfld.long 0x00 29. " EORR13 ,P313 Event output reset" "No affect,Low" bitfld.long 0x00 28. " EORR12 ,P312 Event output reset" "No affect,Low" bitfld.long 0x00 27. " EORR11 ,P311 Event output reset" "No affect,Low" bitfld.long 0x00 26. " EORR10 ,P310 Event output reset" "No affect,Low" newline bitfld.long 0x00 25. " EORR09 ,P309 Event output reset" "No affect,Low" bitfld.long 0x00 24. " EORR08 ,P308 Event output reset" "No affect,Low" bitfld.long 0x00 23. " EORR07 ,P307 Event output reset" "No affect,Low" bitfld.long 0x00 22. " EORR06 ,P306 Event output reset" "No affect,Low" newline bitfld.long 0x00 21. " EORR05 ,P305 Event output reset" "No affect,Low" bitfld.long 0x00 20. " EORR04 ,P304 Event output reset" "No affect,Low" bitfld.long 0x00 19. " EORR03 ,P303 Event output reset" "No affect,Low" bitfld.long 0x00 18. " EORR02 ,P302 Event output reset" "No affect,Low" newline bitfld.long 0x00 17. " EORR01 ,P301 Event output reset" "No affect,Low" bitfld.long 0x00 16. " EORR00 ,P300 Event output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " EOSR15 ,P315 Event output set" "No affect,High" bitfld.long 0x00 14. " EOSR14 ,P314 Event output set" "No affect,High" newline endif bitfld.long 0x00 13. " EOSR13 ,P313 Event output set" "No affect,High" bitfld.long 0x00 12. " EOSR12 ,P312 Event output set" "No affect,High" bitfld.long 0x00 11. " EOSR11 ,P311 Event output set" "No affect,High" bitfld.long 0x00 10. " EOSR10 ,P310 Event output set" "No affect,High" newline bitfld.long 0x00 9. " EOSR09 ,P309 Event output set" "No affect,High" bitfld.long 0x00 8. " EOSR08 ,P308 Event output set" "No affect,High" bitfld.long 0x00 7. " EOSR07 ,P307 Event output set" "No affect,High" bitfld.long 0x00 6. " EOSR06 ,P306 Event output set" "No affect,High" newline bitfld.long 0x00 5. " EOSR05 ,P305 Event output set" "No affect,High" bitfld.long 0x00 4. " EOSR04 ,P304 Event output set" "No affect,High" bitfld.long 0x00 3. " EOSR03 ,P303 Event output set" "No affect,High" bitfld.long 0x00 2. " EOSR02 ,P302 Event output set" "No affect,High" newline bitfld.long 0x00 1. " EOSR01 ,P301 Event output set" "No affect,High" bitfld.long 0x00 0. " EOSR00 ,P300 Event output set" "No affect,High" group.long 0x860++0x03 line.long 0x00 "P300PFS,Port 300 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "TCK/SWCLK,,,GTIOC0A_A,,,SSLB1_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif cpuis("R7FS5D5*") group.long 0x864++0x03 line.long 0x00 "P301PFS,Port 301 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO0,GTOULO,GTIOCAB,RXD2/MISO2/SCL2,CTS9_RTS9/SS9,SSLB2_B,,,,,A06,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x868++0x03 line.long 0x00 "P302PFS,Port 302 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOUUP,GTI0C4A,TXD2/MOSI2/SDA2,,SSLB3,,,,,A07,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x86C++0x03 line.long 0x00 "P303PFS,Port 303 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC7B,,,,,,,,A08,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x870++0x03 line.long 0x00 "P304PFS,Port 304 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWLO,GTIOC7A,RXD6/MISO6/SCL6,,,,,,,A09,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x874++0x03 line.long 0x00 "P305PFS,Port 305 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWUP,,TXD6/MOSI6/SDA6,,,,,,,A10,A12,,,,,,QSPCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x878++0x03 line.long 0x00 "P306PFS,Port 306 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOULO,,SCK6,,,,,,,A11,A12,,,,,,QSSL,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x87C++0x03 line.long 0x00 "P307PFS,Port 307 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOUUP,,CTS6_RTS6/SS6,,,,,,,A12,,,,,,QIO0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") group.long 0x880++0x03 line.long 0x00 "P308PFS,Port 308 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,A13,,,,,,QIO1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x884++0x03 line.long 0x00 "P309PFS,Port 309 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,RXD3,,,,,,A14,,,,,,QIO2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x888++0x03 line.long 0x00 "P310PFS,Port 310 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE1,,,,TXD3,,,,,,A15,,,,,,QIO3,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x88C++0x03 line.long 0x00 "P311PFS,Port 311 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOB1,,,,SCK3,,,,,,CS2/RAS,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x890++0x03 line.long 0x00 "P312PFS,Port 312 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGT0A1,,,,CTS3_RTS3/SS3,,,,,,CS3/CAS,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x894++0x03 line.long 0x00 "P313PFS,Port 313 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,A20,,,,,,,,,,SD0DAT7_A,ET0_ERXD3,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif else group.long 0x864++0x03 line.long 0x00 "P301PFS,Port 301 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO0,GTOULO,GTIOCAB,RXD2/MISO2/SCL2,CTS9_RTS9/SS9,SSLB2_B,,,,,A06,,,,,,,,,,,,,,,LCD_DETA13_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x868++0x03 line.long 0x00 "P302PFS,Port 302 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOUUP,GTI0C4A,TXD2/MOSI2/SDA2,,SSLB3,,,,,A07,,,,,,,,,,,,,,,LCD_DETA14_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x86C++0x03 line.long 0x00 "P303PFS,Port 303 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC7B,,,,,,,,A08,,,,,,,,,,,,,,,LCD_DETA15_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x870++0x03 line.long 0x00 "P304PFS,Port 304 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWLO,GTIOC7A,RXD6/MISO6/SCL6,,,,,,,A09,,,,,,,,,,,,,,,LCD_DETA15_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x874++0x03 line.long 0x00 "P305PFS,Port 305 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWUP,,TXD6/MOSI6/SDA6,,,,,,,A10,A12,,,,,,QSPCLK,,,,,,,,LCD_DETA16_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x878++0x03 line.long 0x00 "P306PFS,Port 306 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOULO,,SCK6,,,,,,,A11,A12,,,,,,QSSL,,,,,,,,LCD_DETA17_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x87C++0x03 line.long 0x00 "P307PFS,Port 307 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOUUP,,CTS6_RTS6/SS6,,,,,,,A12,,,,,,QIO0,,,,,,,,LCD_DETA19_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") group.long 0x860++0x03 line.long 0x00 "P308PFS,Port 308 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,A13,,,,,,QIO1,,,,,,,,LCD_DETA20_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x864++0x03 line.long 0x00 "P309PFS,Port 309 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,RXD3,,,,,,A14,,,,,,QIO2,,,,,,,,LCD_DETA21_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x868++0x03 line.long 0x00 "P310PFS,Port 310 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE1,,,,TXD3,,,,,,A15,,,,,,QIO3,,,,,,,,LCD_DETA22_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x86C++0x03 line.long 0x00 "P311PFS,Port 311 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOB1,,,,SCK3,,,,,,CS2/RAS,,,,,,,,,,,,,,,LCD_DETA23_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x870++0x03 line.long 0x00 "P312PFS,Port 312 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGT0A1,,,,CTS3_RTS3/SS3,,,,,,CS3/CAS,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x874++0x03 line.long 0x00 "P313PFS,Port 313 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,A20,,,,,,,,,,SD0DAT7_A,ET0_ERXD3,,,LCD_TCON2_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CLK")&&!cpuis("R7FS5D*CFB") group.long 0x878++0x03 line.long 0x00 "P314PFS,Port 314 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,ADTRG0,A21,,,,,,,,,,,,,,LCD_TCON1_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x87C++0x03 line.long 0x00 "P315PFS,Port 315 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,RXD4,,,,,,,A22,,,,,,,,,,,,,,LCD_TCON0_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif endif endif width 0x0B tree.end tree "Port 4" base ad:0x40040080 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 31. " PODR15 ,P415 output data" "Low,High" bitfld.long 0x00 30. " PODR14 ,P414 output data" "Low,High" bitfld.long 0x00 29. " PODR13 ,P413 output data" "Low,High" bitfld.long 0x00 28. " PODR12 ,P412 output data" "Low,High" newline bitfld.long 0x00 27. " PODR11 ,P411 output data" "Low,High" bitfld.long 0x00 26. " PODR10 ,P410 output data" "Low,High" bitfld.long 0x00 25. " PODR09 ,P409 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P408 output data" "Low,High" newline bitfld.long 0x00 23. " PODR07 ,P407 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P406 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P405 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P404 output data" "Low,High" newline bitfld.long 0x00 19. " PODR03 ,P403 output data" "Low,High" bitfld.long 0x00 18. " PODR02 ,P402 output data" "Low,High" bitfld.long 0x00 17. " PODR01 ,P401 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P400 output data" "Low,High" newline bitfld.long 0x00 15. " PDR15 ,P415 direction" "Input,Output" bitfld.long 0x00 14. " PDR14 ,P414 direction" "Input,Output" bitfld.long 0x00 13. " PDR13 ,P413 direction" "Input,Output" bitfld.long 0x00 12. " PDR12 ,P412 direction" "Input,Output" newline bitfld.long 0x00 11. " PDR11 ,P411 direction" "Input,Output" bitfld.long 0x00 10. " PDR10 ,P410 direction" "Input,Output" bitfld.long 0x00 9. " PDR09 ,P409 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P408 direction" "Input,Output" newline bitfld.long 0x00 7. " PDR07 ,P407 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P406 direction" "Input,Output" bitfld.long 0x00 5. " PDR05 ,P405 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P404 direction" "Input,Output" newline bitfld.long 0x00 3. " PDR03 ,P403 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P402 direction" "Input,Output" bitfld.long 0x00 1. " PDR01 ,P401 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P400 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 31. " EIDR15 ,P415 event input data" "Low,High" bitfld.long 0x00 30. " EIDR14 ,P414 event input data" "Low,High" bitfld.long 0x00 29. " EIDR13 ,P413 event input data" "Low,High" bitfld.long 0x00 28. " EIDR12 ,P412 event input data" "Low,High" newline bitfld.long 0x00 27. " EIDR11 ,P411 event input data" "Low,High" bitfld.long 0x00 26. " EIDR10 ,P410 event input data" "Low,High" bitfld.long 0x00 25. " EIDR09 ,P409 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P408 event input data" "Low,High" newline bitfld.long 0x00 23. " EIDR07 ,P407 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P406 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P405 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P404 event input data" "Low,High" newline bitfld.long 0x00 19. " EIDR03 ,P403 event input data" "Low,High" bitfld.long 0x00 18. " EIDR02 ,P402 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P401 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P400 event input data" "Low,High" newline bitfld.long 0x00 15. " PIDR15 ,P415 input data" "Low,High" bitfld.long 0x00 14. " PIDR14 ,P414 input data" "Low,High" bitfld.long 0x00 13. " PIDR13 ,P413 input data" "Low,High" bitfld.long 0x00 12. " PIDR12 ,P412 input data" "Low,High" newline bitfld.long 0x00 11. " PIDR11 ,P411 input data" "Low,High" bitfld.long 0x00 10. " PIDR10 ,P410 input data" "Low,High" bitfld.long 0x00 9. " PIDR09 ,P409 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P408 input data" "Low,High" newline bitfld.long 0x00 7. " PIDR07 ,P407 input data" "Low,High" bitfld.long 0x00 6. " PIDR06 ,P406 input data" "Low,High" bitfld.long 0x00 5. " PIDR05 ,P405 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P404 input data" "Low,High" newline bitfld.long 0x00 3. " PIDR03 ,P403 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P402 input data" "Low,High" bitfld.long 0x00 1. " PIDR01 ,P401 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P400 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 31. " PORR15 ,P415 output reset" "No affect,Low" bitfld.long 0x00 30. " PORR14 ,P414 output reset" "No affect,Low" bitfld.long 0x00 29. " PORR13 ,P413 output reset" "No affect,Low" bitfld.long 0x00 28. " PORR12 ,P412 output reset" "No affect,Low" newline bitfld.long 0x00 27. " PORR11 ,P411 output reset" "No affect,Low" bitfld.long 0x00 26. " PORR10 ,P410 output reset" "No affect,Low" bitfld.long 0x00 25. " PORR09 ,P409 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P408 output reset" "No affect,Low" newline bitfld.long 0x00 23. " PORR07 ,P407 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P406 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P405 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P404 output reset" "No affect,Low" newline bitfld.long 0x00 19. " PORR03 ,P403 output reset" "No affect,Low" bitfld.long 0x00 18. " PORR02 ,P402 output reset" "No affect,Low" bitfld.long 0x00 17. " PORR01 ,P401 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P400 output reset" "No affect,Low" newline bitfld.long 0x00 15. " POSR15 ,P415 output set" "No affect,High" bitfld.long 0x00 14. " POSR14 ,P414 output set" "No affect,High" bitfld.long 0x00 13. " POSR13 ,P413 output set" "No affect,High" bitfld.long 0x00 12. " POSR12 ,P412 output set" "No affect,High" newline bitfld.long 0x00 11. " POSR11 ,P411 output set" "No affect,High" bitfld.long 0x00 10. " POSR10 ,P410 output set" "No affect,High" bitfld.long 0x00 9. " POSR09 ,P409 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P408 output set" "No affect,High" newline bitfld.long 0x00 7. " POSR07 ,P407 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P406 output set" "No affect,High" bitfld.long 0x00 5. " POSR05 ,P405 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P404 output set" "No affect,High" newline bitfld.long 0x00 3. " POSR03 ,P403 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P402 output set" "No affect,High" bitfld.long 0x00 1. " POSR01 ,P401 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P400 output set" "No affect,High" group.long 0x0C++0x03 line.long 0x00 "PCNTR4,Port Control Register 4" bitfld.long 0x00 31. " EORR15 ,P415 Event output reset" "No affect,Low" bitfld.long 0x00 30. " EORR14 ,P414 Event output reset" "No affect,Low" bitfld.long 0x00 29. " EORR13 ,P413 Event output reset" "No affect,Low" bitfld.long 0x00 28. " EORR12 ,P412 Event output reset" "No affect,Low" newline bitfld.long 0x00 27. " EORR11 ,P411 Event output reset" "No affect,Low" bitfld.long 0x00 26. " EORR10 ,P410 Event output reset" "No affect,Low" bitfld.long 0x00 25. " EORR09 ,P409 Event output reset" "No affect,Low" bitfld.long 0x00 24. " EORR08 ,P408 Event output reset" "No affect,Low" newline bitfld.long 0x00 23. " EORR07 ,P407 Event output reset" "No affect,Low" bitfld.long 0x00 22. " EORR06 ,P406 Event output reset" "No affect,Low" bitfld.long 0x00 21. " EORR05 ,P405 Event output reset" "No affect,Low" bitfld.long 0x00 20. " EORR04 ,P404 Event output reset" "No affect,Low" newline bitfld.long 0x00 19. " EORR03 ,P403 Event output reset" "No affect,Low" bitfld.long 0x00 18. " EORR02 ,P402 Event output reset" "No affect,Low" bitfld.long 0x00 17. " EORR01 ,P401 Event output reset" "No affect,Low" bitfld.long 0x00 16. " EORR00 ,P400 Event output reset" "No affect,Low" newline bitfld.long 0x00 15. " EOSR15 ,P415 Event output set" "No affect,High" bitfld.long 0x00 14. " EOSR14 ,P414 Event output set" "No affect,High" bitfld.long 0x00 13. " EOSR13 ,P413 Event output set" "No affect,High" bitfld.long 0x00 12. " EOSR12 ,P412 Event output set" "No affect,High" newline bitfld.long 0x00 11. " EOSR11 ,P411 Event output set" "No affect,High" bitfld.long 0x00 10. " EOSR10 ,P410 Event output set" "No affect,High" bitfld.long 0x00 9. " EOSR09 ,P409 Event output set" "No affect,High" bitfld.long 0x00 8. " EOSR08 ,P408 Event output set" "No affect,High" newline bitfld.long 0x00 7. " EOSR07 ,P407 Event output set" "No affect,High" bitfld.long 0x00 6. " EOSR06 ,P406 Event output set" "No affect,High" bitfld.long 0x00 5. " EOSR05 ,P405 Event output set" "No affect,High" bitfld.long 0x00 4. " EOSR04 ,P404 Event output set" "No affect,High" newline bitfld.long 0x00 3. " EOSR03 ,P403 Event output set" "No affect,High" bitfld.long 0x00 2. " EOSR02 ,P402 Event output set" "No affect,High" bitfld.long 0x00 1. " EOSR01 ,P401 Event output set" "No affect,High" bitfld.long 0x00 0. " EOSR00 ,P400 Event output set" "No affect,High" group.long 0x880++0x03 line.long 0x00 "P400PFS,Port 400 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select""Hi-Z,AGTIO1,,GTIOC6A,SCK4,SCK7,,SCL0_A,,,ADTRG1,,,,,,,,AUDIO_CLK,,,,ET0_WOL,ET0_WOL,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x884++0x03 line.long 0x00 "P401PFS,Port 401 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTETRGA,GTIOC6B,CTS4_RTS4/SS4,TXD7/MOSI7/SDA7,,SDA0_A,,,,,,,,,CTX0,,,,,,ET0_MDC,ET0_MDC,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x888++0x03 line.long 0x00 "P402PFS,Port 402 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,RXD7/MISO7/SCL7,,,,,CACREF,,,,,,CRX0,,AUDIO_CLK,,,,ET0_MDIO,ET0_MDIO,VSYNC,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x88C++0x03 line.long 0x00 "P403PFS,Port 403 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC3A,,CTS7_RTS7/SS7,,,,,,,,,,,,,SSIBCK0_A,,,SD1DAT7_B,ET0_LINKSTA,ET0_LINKSTA,PIXD7,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x890++0x03 line.long 0x00 "P404PFS,Port 404 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC3B,,,,,,,,,,,,,,,SSILRCK0/SSIFS0_A,,,SD1DAT6_B,ET0_EXOUT,ET0_EXOUT,PIXD6,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x894++0x03 line.long 0x00 "P405PFS,Port 405 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC1A,,,,,,,,,,,,,,,SSITXD0_A,,,SD1DAT5_B,ET0_TX_EN,RMII0_TXD_EN_B,PIXD5,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x898++0x03 line.long 0x00 "P406PFS,Port 406 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC1B,,,SSLB3_C,,,,,,,,,,,,SSIRXD0_A,,,SD1DAT4_B,ET0_RX_ER,RMII0_TXD1_B,RIXD4,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x89C++0x03 line.long 0x00 "P407PFS,Port 407 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO0,,,CTS4_TRS4/SS4,,SSLB3_A,SDA0_B,,RTCOUT,ADTRG0,,TS03,,,,,,,USB_VBUS,,,ET0_EXOUT,ET0_EXOUT,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif CPUIS("R7FS5D5*") group.long 0x8A0++0x03 line.long 0x00 "P408PFS,Port 408 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWLO,GTIOC10B,,RXD3/MOSI3/SDA3,,SCL0_B,,,,,TS04,,,,,,,USB_ID,,,ET0_CRS,RMII0_CRS_DV_A,PIXCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8A4++0x03 line.long 0x00 "P409PFS,Port 409 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWUP,GTIOC10A,,TXD3/MOSI3/SDA3,,,,,,,TS05,,,,,,,USB_EXICEN,,,ET0_RX_CLK,RMII0_RX_ER_A,HSYNC,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x8A0++0x03 line.long 0x00 "P408PFS,Port 408 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWLO,GTIOC10B,,RXD3/MOSI3/SDA3,,SCL0_B,,,,,TS04,,,,,,,USB_ID,USBHS_ID,,ET0_CRS,RMII0_CRS_DV_A,PIXCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8A4++0x03 line.long 0x00 "P409PFS,Port 409 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOWUP,GTIOC10A,,TXD3/MOSI3/SDA3,,,,,,,TS05,,,,,,,USB_EXICEN,USBHS_EXICEN,,ET0_RX_CLK,RMII0_RX_ER_A,HSYNC,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif group.long 0x8A8++0x03 line.long 0x00 "P410PFS,Port 410 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOB1,GTOVLO,GTIOC9B,RXD0/MISO0/SCL0,SCK3,MISOA_B,,,,,,TS06,,,,,,,,,SD0DAT1_A,ET0_ERXD0,RMII0_RXD1_A,PIXD0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8AC++0x03 line.long 0x00 "P411PFS,Port 411 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOA1,GTOVUP,GTIOC9A,TXD0/MOSI0/SDA0,CTS3_RTS3/SS3,MOSIA_B,,,,,,TS07,,,,,,,,,SD0DAT0_A,ET0_ERXD1,RMII0_RXD0_A,PIXD1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8B0++0x03 line.long 0x00 "P412PFS,Port 412 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE1,GTOULO,,SCK0,,RSPCKA_B,,,,,,TS08,,,,,,,,,SD0CMD_A,ET0_ETXD0,REF50CK0_A,PIXD2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8B4++0x03 line.long 0x00 "P413PFS,Port 413 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,GTOUUP,,CTS0_RTS0/SS0,,SSLA0_B,,,,,,TS09,,,,,,,,,SD0CLK_A,ET0_ETXD1,RMIIO_TXD0_A,PIXD3,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8B8++0x03 line.long 0x00 "P414PFS,Port 414 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC0B,,,SSLA1_B,,,,,,TS10,,,,,,,,,SD0WP,,RMII0_TXD1_A,PIXD4,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8BC++0x03 line.long 0x00 "P415PFS,Port 415 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC0A,,,SSLA2_B,,,,,,TS11,,,,,,,USB_VBUSEN,,SD0CD,ET0_TX_EN,RMII0_TXD_EN_A,PIXD5,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 12.--13. " EOF/EOR ,Event on Falling/Event on Rising" "None,Rising,Falling,Both" bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" newline bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" width 0x0b tree.end tree "Port 5" base ad:0x400400A0 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" sif cpuis("R7FS5D9*") bitfld.long 0x00 29. " PODR13 ,P513 output data" "Low,High" newline endif bitfld.long 0x00 28. " PODR12 ,P512 output data" "Low,High" bitfld.long 0x00 27. " PODR11 ,P511 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P508 output data" "Low,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 23. " PODR07 ,P507 output data" "Low,High" newline endif bitfld.long 0x00 22. " PODR06 ,P506 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P505 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P504 output data" "Low,High" bitfld.long 0x00 19. " PODR03 ,P503 output data" "Low,High" newline bitfld.long 0x00 18. " PODR02 ,P502 output data" "Low,High" bitfld.long 0x00 17. " PODR01 ,P501 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P500 output data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 13. " PDR13 ,P513 direction" "Input,Output" newline endif bitfld.long 0x00 12. " PDR12 ,P512 direction" "Input,Output" bitfld.long 0x00 11. " PDR11 ,P511 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P508 direction" "Input,Output" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 7. " PDR07 ,P507 direction" "Input,Output" newline endif bitfld.long 0x00 6. " PDR06 ,P506 direction" "Input,Output" bitfld.long 0x00 5. " PDR05 ,P505 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P504 direction" "Input,Output" bitfld.long 0x00 3. " PDR03 ,P503 direction" "Input,Output" newline bitfld.long 0x00 2. " PDR02 ,P502 direction" "Input,Output" bitfld.long 0x00 1. " PDR01 ,P501 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P500 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" sif cpuis("R7FS5D9*") bitfld.long 0x00 29. " EIDR13 ,P513 event input data" "Low,High" newline endif bitfld.long 0x00 28. " EIDR12 ,P512 event input data" "Low,High" bitfld.long 0x00 27. " EIDR11 ,P511 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P508 event input data" "Low,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 23. " EIDR07 ,P507 event input data" "Low,High" newline endif bitfld.long 0x00 22. " EIDR06 ,P506 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P505 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P504 event input data" "Low,High" bitfld.long 0x00 19. " EIDR03 ,P503 event input data" "Low,High" newline bitfld.long 0x00 18. " EIDR02 ,P502 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P501 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P500 event input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 13. " PIDR13 ,P513 input data" "Low,High" newline endif bitfld.long 0x00 12. " PIDR12 ,P512 input data" "Low,High" bitfld.long 0x00 11. " PIDR11 ,P511 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P508 input data" "Low,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 7. " PIDR07 ,P507 input data" "Low,High" newline endif bitfld.long 0x00 6. " PIDR06 ,P506 input data" "Low,High" bitfld.long 0x00 5. " PIDR05 ,P505 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P504 input data" "Low,High" bitfld.long 0x00 3. " PIDR03 ,P503 input data" "Low,High" newline bitfld.long 0x00 2. " PIDR02 ,P502 input data" "Low,High" bitfld.long 0x00 1. " PIDR01 ,P501 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P500 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" sif cpuis("R7FS5D9*") bitfld.long 0x00 29. " PORR13 ,P513 output reset" "No affect,Low" newline endif bitfld.long 0x00 28. " PORR12 ,P512 output reset" "No affect,Low" bitfld.long 0x00 27. " PORR11 ,P511 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P508 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 23. " PORR07 ,P507 output reset" "No affect,Low" newline endif bitfld.long 0x00 22. " PORR06 ,P506 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P505 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P504 output reset" "No affect,Low" bitfld.long 0x00 19. " PORR03 ,P503 output reset" "No affect,Low" newline bitfld.long 0x00 18. " PORR02 ,P502 output reset" "No affect,Low" bitfld.long 0x00 17. " PORR01 ,P501 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P500 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 13. " POSR13 ,P513 output set" "No affect,High" newline endif bitfld.long 0x00 12. " POSR12 ,P512 output set" "No affect,High" bitfld.long 0x00 11. " POSR11 ,P511 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P508 output set" "No affect,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 7. " POSR07 ,P507 output set" "No affect,High" newline endif bitfld.long 0x00 6. " POSR06 ,P506 output set" "No affect,High" bitfld.long 0x00 5. " POSR05 ,P505 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P504 output set" "No affect,High" bitfld.long 0x00 3. " POSR03 ,P503 output set" "No affect,High" newline bitfld.long 0x00 2. " POSR02 ,P502 output set" "No affect,High" bitfld.long 0x00 1. " POSR01 ,P501 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P200 output set" "No affect,High" group.long 0x8A0++0x03 line.long 0x00 "P500PFS,Port 500 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,AGTOA0,GTIU,GTIOC11A,,,,,,,,,,,,,,QSPCLK,,USB_VBUSEN,,SD1CLK_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8A4++0x03 line.long 0x00 "P501PFS,Port 501 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,AGTOB0,GTIV,GTIOC11B,,TXD5/MISO5/SDA5,,,,,,,,,,,,QSSL,,USB_OVRCURA,,SD1CMD_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8A8++0x03 line.long 0x00 "P502PFS,Port 502 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,GTIW,GTIOC12A,,RXD5/MISO5/SCL5,,,,,,,,,,,,QIO0,,USB_OVRCURB,,SD1DAT0_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8AC++0x03 line.long 0x00 "P503PFS,Port 503 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,GTETRGC,GTIOC12B,CTS6_RTS6/SS6,SCK5,,,,,,,,,,,,QIO1,,USB_EXICEN,,SD1DAT1_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8B0++0x03 line.long 0x00 "P504PFS,Port 504 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,GTETRGD,GTIOC13A,SCK6,CTS5_RTS5/SS6,,,,,,ALE,,,,,,QIO2,,USB_ID,,SD1DAT2_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") group.long 0x8B4++0x03 line.long 0x00 "P505PFS,Port 505 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,GTIOC13B,RXD6/MISO6/SCL6,,,,,,,,,,,,,QIO3,,,,SD1DAT3_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif cpuis("R7FS5D5*") sif !cpuis("R7FS5D*CFP") group.long 0x8B8++0x03 line.long 0x00 "P506PFS,Port 506 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,,TXD6/MOSI6/SDA6,,,,,,,,,,,,,,,,,SD1CD,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif group.long 0x8C0++0x03 line.long 0x00 "P508PFS,Port 508 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,,SCK6,SCK5,,,,,,,,,,,,,,,,SD1DAT3_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") group.long 0x8CC++0x03 line.long 0x00 "P511PFS,Port 511 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,GTIOC0B,RXD4/MISO4/SCL4,,,SDA2,,,,,,,,,SRX1,,,,,,,,PCKO,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8D0++0x03 line.long 0x00 "P512PFS,Port 512 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,GTIOC0A,TXD4/MOSI4/SDA4,,,SCL2,,,,,,,,,CTX1,,,,,,,,VSYNC,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif else sif !cpuis("R7FS5D*CFP") group.long 0x8B8++0x03 line.long 0x00 "P506PFS,Port 506 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,,TXD6/MOSI6/SDA6,,,,,,,,,,,,,,,,,SD1CD_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif !cpuis("R7FS5D*CLK")&&!cpuis("R7FS5D*CFB")&&!cpuis("R7FS5D*CFP") group.long 0x8BC++0x03 line.long 0x00 "P507PFS,Port 507 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,,,CTS5_RTS5/SS5,,,,,,,,,,,,,,,,SD1WP_A,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif group.long 0x8C0++0x03 line.long 0x00 "P508PFS,Port 508 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,,SCK6,SCK5,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP") group.long 0x8CC++0x03 line.long 0x00 "P511PFS,Port 511 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,GTIOC0B,RXD4/MISO4/SCL4,,,SDA2,,,,,,,,,SRX1,,,,,,,,PCKO,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8D0++0x03 line.long 0x00 "P512PFS,Port 512 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,GTIOC0A,TXD4/MOSI4/SDA4,,,SCL2,,,,,,,,,CTX1,,,,,,,,VSYNC,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif cpuis("R7FS5D9*CFC")||cpuis("R7FS5D9*CBG") group.long 0x8D4++0x03 line.long 0x00 "P513PFS,Port 513 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral select" "Hi-Z,,,,,RXD5,,,,,,,,,,,,,,,,,,,,LCD_DATA16,?..." bitfld.long 0x00 16. " PMR ,Port mode control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog input enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ input enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port drive capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel open drain control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif endif endif width 0x0B tree.end tree "Port 6" base ad:0x400400C0 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " PODR15 ,P615 output data" "Low,High" newline endif bitfld.long 0x00 30. " PODR14 ,P614 output data" "Low,High" bitfld.long 0x00 29. " PODR13 ,P613 output data" "Low,High" bitfld.long 0x00 28. " PODR12 ,P612 output data" "Low,High" bitfld.long 0x00 27. " PODR11 ,P611 output data" "Low,High" newline bitfld.long 0x00 26. " PODR10 ,P610 output data" "Low,High" bitfld.long 0x00 25. " PODR09 ,P609 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P608 output data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 23. " PODR07 ,P607 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P606 output data" "Low,High" newline endif bitfld.long 0x00 21. " PODR05 ,P605 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P604 output data" "Low,High" bitfld.long 0x00 19. " PODR03 ,P603 output data" "Low,High" bitfld.long 0x00 18. " PODR02 ,P602 output data" "Low,High" newline bitfld.long 0x00 17. " PODR01 ,P601 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P600 output data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " PDR15 ,P615 direction" "Input,Output" newline endif bitfld.long 0x00 14. " PDR14 ,P614 direction" "Input,Output" bitfld.long 0x00 13. " PDR13 ,P613 direction" "Input,Output" bitfld.long 0x00 12. " PDR12 ,P612 direction" "Input,Output" bitfld.long 0x00 11. " PDR11 ,P611 direction" "Input,Output" newline bitfld.long 0x00 10. " PDR10 ,P610 direction" "Input,Output" bitfld.long 0x00 9. " PDR09 ,P609 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P608 direction" "Input,Output" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 7. " PDR07 ,P607 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P606 direction" "Input,Output" newline endif bitfld.long 0x00 5. " PDR05 ,P605 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P604 direction" "Input,Output" bitfld.long 0x00 3. " PDR03 ,P603 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P602 direction" "Input,Output" newline bitfld.long 0x00 1. " PDR01 ,P601 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P600 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " EIDR15 ,P615 event input data" "Low,High" newline endif bitfld.long 0x00 30. " EIDR14 ,P614 event input data" "Low,High" bitfld.long 0x00 29. " EIDR13 ,P613 event input data" "Low,High" bitfld.long 0x00 28. " EIDR12 ,P612 event input data" "Low,High" bitfld.long 0x00 27. " EIDR11 ,P611 event input data" "Low,High" newline bitfld.long 0x00 26. " EIDR10 ,P610 event input data" "Low,High" bitfld.long 0x00 25. " EIDR09 ,P609 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P608 event input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 23. " EIDR07 ,P607 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P606 event input data" "Low,High" newline endif bitfld.long 0x00 21. " EIDR05 ,P605 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P604 event input data" "Low,High" bitfld.long 0x00 19. " EIDR03 ,P603 event input data" "Low,High" bitfld.long 0x00 18. " EIDR02 ,P602 event input data" "Low,High" newline bitfld.long 0x00 17. " EIDR01 ,P601 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P600 event input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " PIDR15 ,P615 input data" "Low,High" newline endif bitfld.long 0x00 14. " PIDR14 ,P614 input data" "Low,High" bitfld.long 0x00 13. " PIDR13 ,P613 input data" "Low,High" bitfld.long 0x00 12. " PIDR12 ,P612 input data" "Low,High" bitfld.long 0x00 11. " PIDR11 ,P611 input data" "Low,High" newline bitfld.long 0x00 10. " PIDR10 ,P610 input data" "Low,High" bitfld.long 0x00 9. " PIDR09 ,P609 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P608 input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 7. " PIDR05 ,P605 input data" "Low,High" bitfld.long 0x00 6. " PIDR05 ,P605 input data" "Low,High" newline endif bitfld.long 0x00 5. " PIDR05 ,P605 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P604 input data" "Low,High" bitfld.long 0x00 3. " PIDR03 ,P603 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P602 input data" "Low,High" newline bitfld.long 0x00 1. " PIDR01 ,P601 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P600 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" sif cpuis("R7FS5D9*") bitfld.long 0x00 31. " PORR15 ,P615 output reset" "No affect,Low" newline endif bitfld.long 0x00 30. " PORR14 ,P614 output reset" "No affect,Low" bitfld.long 0x00 29. " PORR13 ,P613 output reset" "No affect,Low" bitfld.long 0x00 28. " PORR12 ,P612 output reset" "No affect,Low" bitfld.long 0x00 27. " PORR11 ,P611 output reset" "No affect,Low" newline bitfld.long 0x00 26. " PORR10 ,P610 output reset" "No affect,Low" bitfld.long 0x00 25. " PORR09 ,P609 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P608 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 23. " PORR07 ,P607 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P606 output reset" "No affect,Low" newline endif bitfld.long 0x00 21. " PORR05 ,P605 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P604 output reset" "No affect,Low" bitfld.long 0x00 19. " PORR03 ,P603 output reset" "No affect,Low" bitfld.long 0x00 18. " PORR02 ,P602 output reset" "No affect,Low" newline bitfld.long 0x00 17. " PORR01 ,P601 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P600 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 15. " POSR15 ,P615 output set" "No affect,High" newline endif bitfld.long 0x00 14. " POSR14 ,P614 output set" "No affect,High" bitfld.long 0x00 13. " POSR13 ,P613 output set" "No affect,High" bitfld.long 0x00 12. " POSR12 ,P612 output set" "No affect,High" bitfld.long 0x00 11. " POSR11 ,P611 output set" "No affect,High" newline bitfld.long 0x00 10. " POSR10 ,P610 output set" "No affect,High" bitfld.long 0x00 9. " POSR09 ,P609 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P608 output set" "No affect,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 7. " POSR07 ,P607 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P606 output set" "No affect,High" newline endif bitfld.long 0x00 5. " POSR05 ,P605 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P604 output set" "No affect,High" bitfld.long 0x00 3. " POSR03 ,P603 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P602 output set" "No affect,High" newline bitfld.long 0x00 1. " POSR01 ,P601 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P600 output set" "No affect,High" sif cpuis("R7FS5D5*") group.long 0x8C0++0x03 line.long 0x00 "P600PFS,Port 600 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC6B,,SCK9,,,,CLKOUT,CACREF,RD,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8C4++0x03 line.long 0x00 "P601PFS,Port 601 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC6A,,RXD9,,,,,,WR/WR0/DQM00,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8C8++0x03 line.long 0x00 "P602PFS,Port 602 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC7A,,TXD9,,,,,,EBCLK/SDCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x8C0++0x03 line.long 0x00 "P600PFS,Port 600 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC6B,,SCK9,,,,CLKOUT,CACREF,RD,,,,,,,,,,,,,,LCD_DATA02_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8C4++0x03 line.long 0x00 "P601PFS,Port 601 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC6A,,RXD9,,,,,,WR/WR0/DQM00,,,,,,,,,,,,,,LCD_DATA03_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8C8++0x03 line.long 0x00 "P602PFS,Port 602 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC7A,,TXD9,,,,,,EBCLK/SDCLK,,,,,,,,,,,,,,LCD_DATA04_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif !cpuis("R7FS5D*CFP") group.long 0x8CC++0x03 line.long 0x00 "P603PFS,Port 603 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC7A,,CTS9_RTS9/SS9,,,,,,D13[A13/D13]/DQ13,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8D0++0x03 line.long 0x00 "P604PFS,Port 604 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC8B,,,,,,,,D12[A12/D12]/DQ12,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8D4++0x03 line.long 0x00 "P605PFS,Port 605 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC8A,,,,,,,,D11[A11/D11]/DQ11,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif cpuis("R7FS5D9*CFC")||cpuis("R7FS5D9*CBG") group.long 0x8D8++0x03 line.long 0x00 "P606PFS,Port 606 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,CTS8_RTS8/SS8,,,,,RTCOUT,,,,,,,,,,,,,,,,LCD_DATA03_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8DC++0x03 line.long 0x00 "P607PFS,Port 607 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,RXD8,,,,,,,,,,,,,,,,,,,,,LCD_DATA04_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif cpuis("R7FS5D5*") group.long 0x8E0++0x03 line.long 0x00 "P608PFS,Port 608 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC4B,,,,,,,,A00/BC0/DQM1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8E4++0x03 line.long 0x00 "P609PFS,Port 609 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5A,,,,,,,,CS1/CKE,,,,,CTX1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8E8++0x03 line.long 0x00 "P610PFS,Port 610 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5B,,,,,,,,CS0/WE,,,,,CRX1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" else group.long 0x8E0++0x03 line.long 0x00 "P608PFS,Port 608 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC4B,,,,,,,,A00/BC0/DQM1,,,,,,,,,,,,,,LCD_DATA07_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8E4++0x03 line.long 0x00 "P609PFS,Port 609 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5A,,,,,,,,CS1/CKE,,,,,CTX1,,,,,,,,,LCD_DATA06_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8E8++0x03 line.long 0x00 "P610PFS,Port 610 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5B,,,,,,,,CS0/WE,,,,,CRX1,,,,,,,,,LCD_DATA05_A,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif !cpuis("R7FS5D*CFP") group.long 0x8EC++0x03 line.long 0x00 "P611PFS,Port 611 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,CTS7_RTS7/SS7,,,,CLKOUT,CACREF,SDCS,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8F0++0x03 line.long 0x00 "P612PFS,Port 612 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,SCK7,,,,,,D08[A08/D08]/DQ08,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8F4++0x03 line.long 0x00 "P613PFS,Port 613 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,TXD7,,,,,,D09[A09/D09]/DQ09,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8F8++0x03 line.long 0x00 "P614PFS,Port 614 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,RXD7,,,,,,D10[A10/D10]/DQ10,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") group.long 0x8FC++0x03 line.long 0x00 "P615PFS,Port 615 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,,,,,LCD_DATA10_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif width 0x0b tree.end tree "Port 7" base ad:0x400400E0 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 29. " PODR13 ,P713 output data" "Low,High" bitfld.long 0x00 28. " PODR12 ,P712 output data" "Low,High" bitfld.long 0x00 27. " PODR11 ,P711 output data" "Low,High" bitfld.long 0x00 26. " PODR10 ,P710 output data" "Low,High" newline bitfld.long 0x00 25. " PODR09 ,P709 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,P708 output data" "Low,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 23. " PODR07 ,P707 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P706 output data" "Low,High" newline endif bitfld.long 0x00 21. " PODR05 ,P705 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P704 output data" "Low,High" bitfld.long 0x00 19. " PODR03 ,P703 output data" "Low,High" bitfld.long 0x00 18. " PODR02 ,P702 output data" "Low,High" newline bitfld.long 0x00 17. " PODR01 ,P701 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P700 output data" "Low,High" bitfld.long 0x00 13. " PDR13 ,P713 direction" "Input,Output" bitfld.long 0x00 12. " PDR12 ,P712 direction" "Input,Output" newline bitfld.long 0x00 11. " PDR11 ,P711 direction" "Input,Output" bitfld.long 0x00 10. " PDR10 ,P710 direction" "Input,Output" bitfld.long 0x00 9. " PDR09 ,P709 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,P708 direction" "Input,Output" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 7. " PDR07 ,P707 direction" "Input,Output" bitfld.long 0x00 6. " PDR06 ,P706 direction" "Input,Output" newline endif bitfld.long 0x00 5. " PDR05 ,P705 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P704 direction" "Input,Output" bitfld.long 0x00 3. " PDR03 ,P703 direction" "Input,Output" bitfld.long 0x00 2. " PDR02 ,P702 direction" "Input,Output" newline bitfld.long 0x00 1. " PDR01 ,P701 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P700 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 29. " EIDR13 ,P713 event input data" "Low,High" bitfld.long 0x00 28. " EIDR12 ,P712 event input data" "Low,High" bitfld.long 0x00 27. " EIDR11 ,P711 event input data" "Low,High" bitfld.long 0x00 26. " EIDR10 ,P710 event input data" "Low,High" newline bitfld.long 0x00 25. " EIDR09 ,P709 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P708 event input data" "Low,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 23. " EIDR07 ,P707 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P706 event input data" "Low,High" newline endif bitfld.long 0x00 21. " EIDR05 ,P705 event input data" "Low,High" bitfld.long 0x00 20. " EIDR04 ,P704 event input data" "Low,High" bitfld.long 0x00 19. " EIDR03 ,P703 event input data" "Low,High" bitfld.long 0x00 18. " EIDR02 ,P702 event input data" "Low,High" newline bitfld.long 0x00 17. " EIDR01 ,P701 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P700 event input data" "Low,High" bitfld.long 0x00 13. " PIDR13 ,P713 input data" "Low,High" bitfld.long 0x00 12. " PIDR12 ,P712 input data" "Low,High" newline bitfld.long 0x00 11. " PIDR11 ,P711 input data" "Low,High" bitfld.long 0x00 10. " PIDR10 ,P710 input data" "Low,High" bitfld.long 0x00 9. " PIDR09 ,P709 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P708 input data" "Low,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 7. " PIDR07 ,P707 input data" "Low,High" bitfld.long 0x00 6. " PIDR06 ,P706 input data" "Low,High" newline endif bitfld.long 0x00 5. " PIDR05 ,P705 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P704 input data" "Low,High" bitfld.long 0x00 3. " PIDR03 ,P703 input data" "Low,High" bitfld.long 0x00 2. " PIDR02 ,P702 input data" "Low,High" newline bitfld.long 0x00 1. " PIDR01 ,P701 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P700 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 29. " PORR13 ,P713 output reset" "No affect,Low" bitfld.long 0x00 28. " PORR12 ,P712 output reset" "No affect,Low" bitfld.long 0x00 27. " PORR11 ,P711 output reset" "No affect,Low" bitfld.long 0x00 26. " PORR10 ,P710 output reset" "No affect,Low" newline bitfld.long 0x00 25. " PORR09 ,P709 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,P708 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 23. " PORR07 ,P707 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P706 output reset" "No affect,Low" newline endif bitfld.long 0x00 21. " PORR05 ,P705 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P704 output reset" "No affect,Low" bitfld.long 0x00 19. " PORR03 ,P703 output reset" "No affect,Low" bitfld.long 0x00 18. " PORR02 ,P702 output reset" "No affect,Low" newline bitfld.long 0x00 17. " PORR01 ,P701 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P700 output reset" "No affect,Low" bitfld.long 0x00 13. " POSR13 ,P713 output set" "No affect,High" bitfld.long 0x00 12. " POSR12 ,P712 output set" "No affect,High" newline bitfld.long 0x00 11. " POSR11 ,P711 output set" "No affect,High" bitfld.long 0x00 10. " POSR10 ,P710 output set" "No affect,High" bitfld.long 0x00 9. " POSR09 ,P709 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P708 output set" "No affect,High" newline sif cpuis("R7FS5D9*CBG")||cpuis("R7FS5D9*CFC") bitfld.long 0x00 7. " POSR07 ,P707 output set" "No affect,High" bitfld.long 0x00 6. " POSR06 ,P706 output set" "No affect,High" newline endif bitfld.long 0x00 5. " POSR05 ,P705 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P704 output set" "No affect,High" bitfld.long 0x00 3. " POSR03 ,P703 output set" "No affect,High" bitfld.long 0x00 2. " POSR02 ,P702 output set" "No affect,High" newline bitfld.long 0x00 1. " POSR01 ,P701 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P700 output set" "No affect,High" sif !cpuis("R7FS5D*CFP") group.long 0x8E0++0x03 line.long 0x00 "P700PFS,Port 700 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5A,,,MSIOB_C,,,,,,,,,,,,,,,SD1DAT3_B,ET0_ETXD1,RMII0_TXD0_B,PIXD3,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8E4++0x03 line.long 0x00 "P701PFS,Port 701 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC5B,,,MOSIB_C,,,,,,,,,,,,,,,SD1DAT2_B,ET0_ETXD0,REF50CK0_B,PIXD2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8E8++0x03 line.long 0x00 "P702PFS,Port 702 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC6A,,,RSPCKB_C,,,,,,,,,,,,,,,SD1DAT1_B,ET0_ERXD1,RMIIO_RXD0_B,PIXD1,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8EC++0x03 line.long 0x00 "P703PFS,Port 703 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC6B,,,SSLB0_C,,,VCOUT,,,,,,,,,,,,SD1DAT0_B,ET0_ERXD0,RMII0_RXD1_B,PIXD0,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8F0++0x03 line.long 0x00 "P704PFS,Port 704 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTO0,,,,,SSLB1_C,,,,,,,,,,CRX0,,,,,SD1CMD_B,ET0_CRS,RMII0_CRS_DV_B,PIXCLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8F4++0x03 line.long 0x00 "P705PFS,Port 705 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO0,,,,,SSLB2_C,,,,,,,,,,CRX0,,,,,SD1CMD_B,ET0_CRS,RMII0_CRS_DV_B,PIXDLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif cpuis("R7FS5D9*CFC")||cpuis("R7FS5D9*CBG") group.long 0x8F8++0x03 line.long 0x00 "P706PFS,Port 706 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,RXD3/MISO3/SCL3,,,,,,,,,,,,,,,USBHS_OVR_CURB,SD1CD_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x8FC++0x03 line.long 0x00 "P707PFS,Port 707 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,TXD3/MOSI3/SDA3,,,,,,,,,,,,,,,USBHS_OVR_CURA,SD1WP_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif endif group.long 0x900++0x03 line.long 0x00 "P708PFS,Port 708 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,RXD1/MISO1/SCL1,SSLA3_B,,,,CACREF,,TS12,,,,,,AUDIO_CLK,,,,ET0_ETXD3,,PCKO,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CFP")&&!cpuis("R7FS5D9*CFC")&&!cpuis("R7FS5D9*CBG") group.long 0x904++0x03 line.long 0x00 "P709PFS,Port 709 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,TXD1/MOSI1/SDA1,,,,,,,TS13,,,,,,,,,,ET0_ETXD2,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x908++0x03 line.long 0x00 "P710PFS,Port 710 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,SCK1,,,,,,,TS14,,,,,,,,,,ET0_TX_ER,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x90C++0x03 line.long 0x00 "P711PFS,Port 711 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTEE0,,,,CTS1_RTS1/SS1,,,,,,,TS15,,,,,,,,,,ET0_TX_CLK,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x910++0x03 line.long 0x00 "P712PFS,Port 712 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOB0,,GTIOC2B,,,,,,,,,TS16,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x914++0x03 line.long 0x00 "P713PFS,Port 713 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTOA0,,GTIOC2A,,,,,,,,,TS17,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif width 0x0b tree.end sif !cpuis("R7FS5D*CFP") tree "Port 8" base ad:0x40040100 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" sif cpuis("R7FS5D9*") bitfld.long 0x00 22. " PODR06 ,P806 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P805 output data" "Low,High" bitfld.long 0x00 20. " PODR04 ,P804 output data" "Low,High" bitfld.long 0x00 19. " PODR03 ,P803 output data" "Low,High" newline bitfld.long 0x00 18. " PODR02 ,P802 output data" "Low,High" newline endif bitfld.long 0x00 17. " PODR01 ,P801 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P800 output data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 6. " PDR06 ,P806 direction" "Input,Output" bitfld.long 0x00 5. " PDR05 ,P805 direction" "Input,Output" bitfld.long 0x00 4. " PDR04 ,P804 direction" "Input,Output" bitfld.long 0x00 3. " PDR03 ,P803 direction" "Input,Output" newline bitfld.long 0x00 2. " PDR02 ,P802 direction" "Input,Output" newline endif bitfld.long 0x00 1. " PDR01 ,P801 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P800 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" sif cpuis("R7FS5D9*") bitfld.long 0x00 22. " EIDR ,P801 event input data" "Low,High" bitfld.long 0x00 21. " EIDR01 ,P801 event input data" "Low,High" bitfld.long 0x00 20. " EIDR01 ,P801 event input data" "Low,High" bitfld.long 0x00 19. " EIDR01 ,P801 event input data" "Low,High" newline bitfld.long 0x00 18. " EIDR01 ,P801 event input data" "Low,High" newline endif bitfld.long 0x00 17. " EIDR01 ,P801 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P800 event input data" "Low,High" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 6. " PIDR06 ,P806 input data" "Low,High" bitfld.long 0x00 5. " PIDR05 ,P805 input data" "Low,High" bitfld.long 0x00 4. " PIDR04 ,P804 input data" "Low,High" bitfld.long 0x00 3. " PIDR03 ,P803 input data" "Low,High" newline bitfld.long 0x00 2. " PIDR02 ,P802 input data" "Low,High" newline endif bitfld.long 0x00 1. " PIDR01 ,P801 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P800 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" sif cpuis("R7FS5D9*") bitfld.long 0x00 22. " PORR06 ,P806 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P805 output reset" "No affect,Low" bitfld.long 0x00 20. " PORR04 ,P804 output reset" "No affect,Low" bitfld.long 0x00 19. " PORR03 ,P803 output reset" "No affect,Low" newline bitfld.long 0x00 18. " PORR02 ,P802 output reset" "No affect,Low" newline endif bitfld.long 0x00 17. " PORR01 ,P801 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P800 output reset" "No affect,Low" newline sif cpuis("R7FS5D9*") bitfld.long 0x00 6. " POSR06 ,P806 output set" "No affect,High" bitfld.long 0x00 5. " POSR05 ,P805 output set" "No affect,High" bitfld.long 0x00 4. " POSR04 ,P804 output set" "No affect,High" bitfld.long 0x00 3. " POSR03 ,P803 output set" "No affect,High" newline bitfld.long 0x00 2. " POSR02 ,P802 output set" "No affect,High" newline endif bitfld.long 0x00 1. " POSR01 ,P801 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P800 output set" "No affect,High" group.long 0x900++0x03 line.long 0x00 "P800PFS,Port 800 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,D14[A14/D14]/DQ14,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x904++0x03 line.long 0x00 "P801PFS,Port 801 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,D15[A15/D15]/DQ15,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" sif !cpuis("R7FS5D*CLK")&&!cpuis("R7FS5D*CFB") group.long 0x908++0x03 line.long 0x00 "P802PFS,Port 802 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,SD1DAT5_A,,,,LCD_DATA02_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x90C++0x03 line.long 0x00 "P803PFS,Port 803 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,SD1DAT6_A,,,,LCD_DATA01_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x910++0x03 line.long 0x00 "P804PFS,Port 804 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,SD1DAT7_A,,,,LCD_DATA00_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x914++0x03 line.long 0x00 "P805PFS,Port 805 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,TXD5,,,,,,,,,,,,,,,,,,,,LCD_DATA17_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x918++0x03 line.long 0x00 "P806PFS,Port 806 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,,,,,LCD_EXTCLK_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" endif width 0x0b tree.end endif sif cpuis("R7FS5D9*CFC")||cpuis("R7FS5D9*CBG") tree "Port 9" base ad:0x40040120 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 24. " PODR08 ,P908 output data" "Low,High" bitfld.long 0x00 23. " PODR07 ,P907 output data" "Low,High" bitfld.long 0x00 22. " PODR06 ,P906 output data" "Low,High" bitfld.long 0x00 21. " PODR05 ,P905 output data" "Low,High" newline bitfld.long 0x00 17. " PODR01 ,P901 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,P900 output data" "Low,High" bitfld.long 0x00 8. " PDR08 ,P908 direction" "Input,Output" bitfld.long 0x00 7. " PDR07 ,P907 direction" "Input,Output" newline bitfld.long 0x00 6. " PDR06 ,P906 direction" "Input,Output" bitfld.long 0x00 5. " PDR05 ,P905 direction" "Input,Output" bitfld.long 0x00 1. " PDR01 ,P901 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,P900 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 24. " EIDR08 ,P208 event input data" "Low,High" bitfld.long 0x00 23. " EIDR07 ,P207 event input data" "Low,High" bitfld.long 0x00 22. " EIDR06 ,P206 event input data" "Low,High" bitfld.long 0x00 21. " EIDR05 ,P205 event input data" "Low,High" newline bitfld.long 0x00 17. " EIDR01 ,P201 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,P200 event input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,P908 input data" "Low,High" bitfld.long 0x00 7. " PIDR07 ,P907 input data" "Low,High" newline bitfld.long 0x00 6. " PIDR06 ,P906 input data" "Low,High" bitfld.long 0x00 5. " PIDR05 ,P905 input data" "Low,High" bitfld.long 0x00 1. " PIDR01 ,P901 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,P900 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 24. " PORR08 ,P908 output reset" "No affect,Low" bitfld.long 0x00 23. " PORR07 ,P907 output reset" "No affect,Low" bitfld.long 0x00 22. " PORR06 ,P906 output reset" "No affect,Low" bitfld.long 0x00 21. " PORR05 ,P905 output reset" "No affect,Low" newline bitfld.long 0x00 17. " PORR01 ,P901 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,P900 output reset" "No affect,Low" bitfld.long 0x00 8. " POSR08 ,P208 output set" "No affect,High" bitfld.long 0x00 7. " POSR07 ,P207 output set" "No affect,High" newline bitfld.long 0x00 6. " POSR06 ,P206 output set" "No affect,High" bitfld.long 0x00 5. " POSR05 ,P205 output set" "No affect,High" bitfld.long 0x00 1. " POSR01 ,P201 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P200 output set" "No affect,High" group.long 0x920++0x03 line.long 0x00 "P900PFS,Port 900 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,TXD4,,,,,,,A23,,,,,,,,,,,,,,LCD_CLK_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x924++0x03 line.long 0x00 "P901PFS,Port 901 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,AGTIO1,,,SCK4,,,,,,,,,,,,,,,,,,,,,LCD_DATA15_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x934++0x03 line.long 0x00 "P905PFS,Port 905 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC13B,,,,,,,,CS4,,,,,,,,,,,,,,LCD_DATA11_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x938++0x03 line.long 0x00 "P906PFS,Port 906 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC13A,,,,,,,,CS6,,,,,,,,,,,,,,LCD_DATA12_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x93C++0x03 line.long 0x00 "P907PFS,Port 907 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC12B,,,,,,,,CS6,,,,,,,,,,,,,,LCD_DATA13_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x940++0x03 line.long 0x00 "P908PFS,Port 908 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,GTIOC12A,,,,,,,,CS7,,,,,,,,,,,,,,LCD_DATA14_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" width 0x0b tree.end tree "Port A" base ad:0x40040140 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 26. " PODR10 ,PA10 output data" "Low,High" bitfld.long 0x00 25. " PODR09 ,PA09 output data" "Low,High" bitfld.long 0x00 24. " PODR08 ,PA08 output data" "Low,High" bitfld.long 0x00 17. " PODR01 ,PA01 output data" "Low,High" newline bitfld.long 0x00 16. " PODR00 ,PA00 output data" "Low,High" bitfld.long 0x00 10. " PDR10 ,PA10 direction" "Input,Output" bitfld.long 0x00 9. " PDR09 ,PA09 direction" "Input,Output" bitfld.long 0x00 8. " PDR08 ,PA08 direction" "Input,Output" newline bitfld.long 0x00 1. " PDR01 ,PA01 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,PA00 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 26. " EIDR10 ,P210 event input data" "Low,High" bitfld.long 0x00 25. " EIDR09 ,P209 event input data" "Low,High" bitfld.long 0x00 24. " EIDR08 ,P208 event input data" "Low,High" bitfld.long 0x00 17. " EIDR01 ,P201 event input data" "Low,High" newline bitfld.long 0x00 16. " EIDR00 ,P200 event input data" "Low,High" bitfld.long 0x00 10. " PIDR10 ,PA10 input data" "Low,High" bitfld.long 0x00 9. " PIDR09 ,PA09 input data" "Low,High" bitfld.long 0x00 8. " PIDR08 ,PA08 input data" "Low,High" newline bitfld.long 0x00 1. " PIDR01 ,PA01 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,PA00 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 26. " PORR10 ,PA10 output reset" "No affect,Low" bitfld.long 0x00 25. " PORR09 ,PA09 output reset" "No affect,Low" bitfld.long 0x00 24. " PORR08 ,PA08 output reset" "No affect,Low" bitfld.long 0x00 17. " PORR01 ,PA01 output reset" "No affect,Low" newline bitfld.long 0x00 16. " PORR00 ,PA00 output reset" "No affect,Low" bitfld.long 0x00 10. " POSR10 ,P210 output set" "No affect,High" bitfld.long 0x00 9. " POSR09 ,P209 output set" "No affect,High" bitfld.long 0x00 8. " POSR08 ,P208 output set" "No affect,High" newline bitfld.long 0x00 1. " POSR01 ,P201 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,P200 output set" "No affect,High" group.long 0x940++0x03 line.long 0x00 "PA00PFS,Port A00 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,TXD8,,,,,,,,,,,,,,,,,,,,,LCD_DATA05_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x944++0x03 line.long 0x00 "PA01PFS,Port A01 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,SCK8,,,,,,,,,,,,,,,,,,,,,LCD_DATA06_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x960++0x03 line.long 0x00 "PA08PFS,Port A08 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,,,,,LCD_DATA09_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x964++0x03 line.long 0x00 "PA09PFS,Port A09 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,,,,,LCD_DATA08_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x968++0x03 line.long 0x00 "PA10PFS,Port A10 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,,,,,,,,,,,,,,,,,,,,,LCD_DATA07_B,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" width 0x0b tree.end tree "Port B" base ad:0x40040160 width 9. group.long 0x00++0x03 line.long 0x00 "PCNTR1,Port Control Register 1" bitfld.long 0x00 17. " PODR01 ,PB01 output data" "Low,High" bitfld.long 0x00 16. " PODR00 ,PB00 output data" "Low,High" bitfld.long 0x00 1. " PDR01 ,PB01 direction" "Input,Output" bitfld.long 0x00 0. " PDR00 ,PB00 direction" "Input,Output" rgroup.long 0x04++0x03 line.long 0x00 "PCNTR2,Port Control Register 2" bitfld.long 0x00 17. " EIDR01 ,PB01 event input data" "Low,High" bitfld.long 0x00 16. " EIDR00 ,PB00 event input data" "Low,High" bitfld.long 0x00 1. " PIDR01 ,PB01 input data" "Low,High" bitfld.long 0x00 0. " PIDR00 ,PB00 input data" "Low,High" wgroup.long 0x08++0x03 line.long 0x00 "PCNTR3,Port Control Register 3" bitfld.long 0x00 17. " PORR01 ,PB01 output reset" "No affect,Low" bitfld.long 0x00 16. " PORR00 ,PB00 output reset" "No affect,Low" bitfld.long 0x00 1. " POSR01 ,PB01 output set" "No affect,High" bitfld.long 0x00 0. " POSR00 ,PB00 output set" "No affect,High" group.long 0x960++0x03 line.long 0x00 "PB00PFS,Port B00 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,SCK3,,,,,,,,,,,,,,,USBHS_VBUSEN,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" group.long 0x964++0x03 line.long 0x00 "PB01PFS,Port B01 Pin Function Select Register" bitfld.long 0x00 24.--28. " PSEL ,Peripheral Select" "Hi-Z,,,,,CTS3_RTS3/SS3,,,,,,,,,,,,,,,USBHS_VBUS,?..." bitfld.long 0x00 16. " PMR ,Port Mode Control" "General,Peripheral" bitfld.long 0x00 15. " ASEL ,Analog Input Enable" "Disabled,Enabled" bitfld.long 0x00 14. " ISEL ,IRQ Input Enable" "Disabled,Enabled" newline bitfld.long 0x00 10.--11. " DSCR ,Port Drive Capability" "Low,Middle,,High" bitfld.long 0x00 6. " NCODR ,N-Channel Open Drain Control" "CMOS,NMOS" bitfld.long 0x00 4. " PCR ,Pull-up Control" "Disabled,Enabled" bitfld.long 0x00 2. " PDR ,Port direction" "Input,Output" newline rbitfld.long 0x00 1. " PIDR ,Port input data" "Low,High" bitfld.long 0x00 0. " PODR ,Port output data" "Low,High" width 0x0b tree.end endif tree "Common" base ad:0x40040D00 width 8. group.byte 0x03++0x00 line.byte 0x00 "PWPR,Write-Protect Register" bitfld.byte 0x00 7. " B0WI ,PFSWE bit write disable" "No,Yes" bitfld.byte 0x00 6. " PFSWE ,PFS register write enable" "Disabled,Enabled" group.byte 0x00++0x00 line.byte 0x00 "PFENET,Ethernet Control Register" sif !cpuis("R7FS5D*") bitfld.byte 0x00 5. " PHYMODE1 ,Ethernet mode setting ch1" "RMII,MII" bitfld.byte 0x00 4. " PHYMODE0 ,Ethernet mode setting ch0" "RMII,MII" else bitfld.byte 0x00 4. " PHYMODE0 ,Ethernet mode setting ch0" "RMII,MII" endif width 0x0B tree.end tree.end tree "KINT (Key Interrupt Function)" base ad:0x40080000 width 7. group.byte 0x00++0x00 line.byte 0x0 "KRCTL,Key Return Control Register" bitfld.byte 0x0 7. " KRMD ,Usage of key interrupt flags" "Not used,Used" bitfld.byte 0x0 0. " KREG ,Detection edge selection" "Falling edge,Rising edge" group.byte 0x04++0x00 line.byte 0x0 "KRF,Key Return Flag Register" bitfld.byte 0x0 7. " KRF7 ,Key interrupt flag 7" "No interrupt,Interrupt" bitfld.byte 0x0 6. " KRF6 ,Key interrupt flag 6" "No interrupt,Interrupt" newline bitfld.byte 0x0 5. " KRF5 ,Key interrupt flag 5" "No interrupt,Interrupt" bitfld.byte 0x0 4. " KRF4 ,Key interrupt flag 4" "No interrupt,Interrupt" newline bitfld.byte 0x0 3. " KRF3 ,Key interrupt flag 3" "No interrupt,Interrupt" bitfld.byte 0x0 2. " KRF2 ,Key interrupt flag 2" "No interrupt,Interrupt" newline bitfld.byte 0x0 1. " KRF1 ,Key interrupt flag 1" "No interrupt,Interrupt" bitfld.byte 0x0 0. " KRF0 ,Key interrupt flag 0" "No interrupt,Interrupt" group.byte 0x08++0x00 line.byte 0x0 "KRM,Key Return Mode Register" bitfld.byte 0x0 7. " KRM7 ,Key interrupt mode control 7" "Disabled,Enabled" bitfld.byte 0x0 6. " KRM6 ,Key interrupt mode control 6" "Disabled,Enabled" newline bitfld.byte 0x0 5. " KRM5 ,Key interrupt mode control 5" "Disabled,Enabled" bitfld.byte 0x0 4. " KRM4 ,Key interrupt mode control 4" "Disabled,Enabled" newline bitfld.byte 0x0 3. " KRM3 ,Key interrupt mode control 3" "Disabled,Enabled" bitfld.byte 0x0 2. " KRM2 ,Key interrupt mode control 2" "Disabled,Enabled" newline bitfld.byte 0x0 1. " KRM1 ,Key interrupt mode control 1" "Disabled,Enabled" bitfld.byte 0x0 0. " KRM0 ,Key interrupt mode control 0" "Disabled,Enabled" width 0x0B tree.end tree "POEG (Port Output Enable for GPT)" base ad:0x40042000 width 8. group.long 0x00++0x03 line.long 0x0 "POEGGA,POEG Group A Setting Register" bitfld.long 0x0 30.--31. " NFCS ,Noise filter clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/128" bitfld.long 0x0 29. " NFEN ,Noise filter enable" "Disabled,Enabled" newline bitfld.long 0x0 28. " INV ,GTETRG input reverse" "Not reversed,Reversed" rbitfld.long 0x0 16. " ST ,GTETRG input status flag" "0,1" newline bitfld.long 0x0 13. " CDRE5 ,ACMP_HS5 enable" "Disabled,Enabled" bitfld.long 0x0 12. " CDRE4 ,ACMP_HS4 enable" "Disabled,Enabled" newline bitfld.long 0x0 11. " CDRE3 ,ACMP_HS3 enable" "Disabled,Enabled" bitfld.long 0x0 10. " CDRE2 ,ACMP_HS2 enable" "Disabled,Enabled" newline bitfld.long 0x0 9. " CDRE1 ,ACMP_HS1 enable" "Disabled,Enabled" bitfld.long 0x0 8. " CDRE0 ,ACMP_HS0 enable" "Disabled,Enabled" newline bitfld.long 0x0 6. " OSTPE ,Oscillation stop detection enable" "Disabled,Enabled" bitfld.long 0x0 5. " IOCE ,Enable for GPT or ACMPHS Output-Disable request" "Disabled,Enabled" newline bitfld.long 0x0 4. " PIDE ,Port input detection enable" "Disabled,Enabled" bitfld.long 0x0 3. " SSF ,Software stop flag" "Not occurred,Occurred" newline bitfld.long 0x0 2. " OSTPF ,Oscillation stop detection flag" "Not occurred,Occurred" bitfld.long 0x0 1. " IOCF ,Detection flag for GPT or ACMPHS Output-Disable request" "Not occurred,Occurred" newline bitfld.long 0x0 0. " PIDF ,Port input detection flag" "Not occurred,Occurred" group.long 0x00++0x03 line.long 0x0 "POEGGB,POEG Group B Setting Register" bitfld.long 0x0 30.--31. " NFCS ,Noise filter clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/128" bitfld.long 0x0 29. " NFEN ,Noise filter enable" "Disabled,Enabled" newline bitfld.long 0x0 28. " INV ,GTETRG input reverse" "Not reversed,Reversed" rbitfld.long 0x0 16. " ST ,GTETRG input status flag" "0,1" newline bitfld.long 0x0 13. " CDRE5 ,ACMP_HS5 enable" "Disabled,Enabled" bitfld.long 0x0 12. " CDRE4 ,ACMP_HS4 enable" "Disabled,Enabled" newline bitfld.long 0x0 11. " CDRE3 ,ACMP_HS3 enable" "Disabled,Enabled" bitfld.long 0x0 10. " CDRE2 ,ACMP_HS2 enable" "Disabled,Enabled" newline bitfld.long 0x0 9. " CDRE1 ,ACMP_HS1 enable" "Disabled,Enabled" bitfld.long 0x0 8. " CDRE0 ,ACMP_HS0 enable" "Disabled,Enabled" newline bitfld.long 0x0 6. " OSTPE ,Oscillation stop detection enable" "Disabled,Enabled" bitfld.long 0x0 5. " IOCE ,Enable for GPT or ACMPHS Output-Disable request" "Disabled,Enabled" newline bitfld.long 0x0 4. " PIDE ,Port input detection enable" "Disabled,Enabled" bitfld.long 0x0 3. " SSF ,Software stop flag" "Not occurred,Occurred" newline bitfld.long 0x0 2. " OSTPF ,Oscillation stop detection flag" "Not occurred,Occurred" bitfld.long 0x0 1. " IOCF ,Detection flag for GPT or ACMPHS Output-Disable request" "Not occurred,Occurred" newline bitfld.long 0x0 0. " PIDF ,Port input detection flag" "Not occurred,Occurred" group.long 0x00++0x03 line.long 0x0 "POEGGC,POEG Group C Setting Register" bitfld.long 0x0 30.--31. " NFCS ,Noise filter clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/128" bitfld.long 0x0 29. " NFEN ,Noise filter enable" "Disabled,Enabled" newline bitfld.long 0x0 28. " INV ,GTETRG input reverse" "Not reversed,Reversed" rbitfld.long 0x0 16. " ST ,GTETRG input status flag" "0,1" newline bitfld.long 0x0 13. " CDRE5 ,ACMP_HS5 enable" "Disabled,Enabled" bitfld.long 0x0 12. " CDRE4 ,ACMP_HS4 enable" "Disabled,Enabled" newline bitfld.long 0x0 11. " CDRE3 ,ACMP_HS3 enable" "Disabled,Enabled" bitfld.long 0x0 10. " CDRE2 ,ACMP_HS2 enable" "Disabled,Enabled" newline bitfld.long 0x0 9. " CDRE1 ,ACMP_HS1 enable" "Disabled,Enabled" bitfld.long 0x0 8. " CDRE0 ,ACMP_HS0 enable" "Disabled,Enabled" newline bitfld.long 0x0 6. " OSTPE ,Oscillation stop detection enable" "Disabled,Enabled" bitfld.long 0x0 5. " IOCE ,Enable for GPT or ACMPHS Output-Disable request" "Disabled,Enabled" newline bitfld.long 0x0 4. " PIDE ,Port input detection enable" "Disabled,Enabled" bitfld.long 0x0 3. " SSF ,Software stop flag" "Not occurred,Occurred" newline bitfld.long 0x0 2. " OSTPF ,Oscillation stop detection flag" "Not occurred,Occurred" bitfld.long 0x0 1. " IOCF ,Detection flag for GPT or ACMPHS Output-Disable request" "Not occurred,Occurred" newline bitfld.long 0x0 0. " PIDF ,Port input detection flag" "Not occurred,Occurred" group.long 0x00++0x03 line.long 0x0 "POEGGD,POEG Group D Setting Register" bitfld.long 0x0 30.--31. " NFCS ,Noise filter clock select" "PCLKB,PCLKB/8,PCLKB/32,PCLKB/128" bitfld.long 0x0 29. " NFEN ,Noise filter enable" "Disabled,Enabled" newline bitfld.long 0x0 28. " INV ,GTETRG input reverse" "Not reversed,Reversed" rbitfld.long 0x0 16. " ST ,GTETRG input status flag" "0,1" newline bitfld.long 0x0 13. " CDRE5 ,ACMP_HS5 enable" "Disabled,Enabled" bitfld.long 0x0 12. " CDRE4 ,ACMP_HS4 enable" "Disabled,Enabled" newline bitfld.long 0x0 11. " CDRE3 ,ACMP_HS3 enable" "Disabled,Enabled" bitfld.long 0x0 10. " CDRE2 ,ACMP_HS2 enable" "Disabled,Enabled" newline bitfld.long 0x0 9. " CDRE1 ,ACMP_HS1 enable" "Disabled,Enabled" bitfld.long 0x0 8. " CDRE0 ,ACMP_HS0 enable" "Disabled,Enabled" newline bitfld.long 0x0 6. " OSTPE ,Oscillation stop detection enable" "Disabled,Enabled" bitfld.long 0x0 5. " IOCE ,Enable for GPT or ACMPHS Output-Disable request" "Disabled,Enabled" newline bitfld.long 0x0 4. " PIDE ,Port input detection enable" "Disabled,Enabled" bitfld.long 0x0 3. " SSF ,Software stop flag" "Not occurred,Occurred" newline bitfld.long 0x0 2. " OSTPF ,Oscillation stop detection flag" "Not occurred,Occurred" bitfld.long 0x0 1. " IOCF ,Detection flag for GPT or ACMPHS Output-Disable request" "Not occurred,Occurred" newline bitfld.long 0x0 0. " PIDF ,Port input detection flag" "Not occurred,Occurred" width 0x0B tree.end tree.open "GPT (General PWM Timer)" tree "Timer EH0" base ad:0x40078000 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078000+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078000+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078000+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078000+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078000+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078000+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer EH1" base ad:0x40078100 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078100+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078100+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078100+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078100+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078100+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078100+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer EH2" base ad:0x40078200 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078200+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078200+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078200+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078200+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078200+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078200+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer EH3" base ad:0x40078300 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078300+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078300+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078300+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078300+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078300+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078300+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer E4" base ad:0x40078400 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078400+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078400+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078400+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078400+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078400+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078400+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer E5" base ad:0x40078500 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078500+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078500+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078500+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078500+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078500+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078500+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer E6" base ad:0x40078600 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078600+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078600+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078600+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078600+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078600+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078600+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer E7" base ad:0x40078700 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 28. " GRPDTE ,Dead time error output disable request enable" "Disabled,Enabled" newline bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" bitfld.long 0x0C 19. " ADTRBDEN ,GTADTRB compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 18. " ADTRBUEN ,GTADTRB compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " ADTRADEN ,GTADTRA compare match (Down-Counting) A/D converter start request enable" "Disabled,Enabled" bitfld.long 0x0C 16. " ADTRAUEN ,GTADTRA compare match (Up-Counting) A/D converter start request enable" "Disabled,Enabled" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 28. " DTEF ,Dead time error flag" "No error,Error" newline rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" sif cpuis("R7FS5D*") bitfld.long 0x10 19. " ADTRBDF ,GTADTRB compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 18. " ADTRBUF ,GTADTRB compare match (Up-Counting) A/D converter start request flag" "No match,Match" newline bitfld.long 0x10 17. " ADTRADF ,GTADTRA compare match (Down-Counting) A/D converter start request flag" "No match,Match" bitfld.long 0x10 16. " ADTRAUF ,GTADTRA compare match (Up-Counting) A/D converter start request flag" "No match,Match" rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" newline rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" else rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" rbitfld.long 0x10 8.--10. " ITCNT ,OVF/UDF interrupt skipping count counter" "0,1,2,3,4,5,6,7" endif newline bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" newline bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" newline bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" if ((((per.l(ad:0x40078700+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078700+0x30))&0x01)==0x01)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On overflow,On overflow,On overflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078700+0x2C))&0x70000)<=0x10000)&&(((per.l(ad:0x40078700+0x30))&0x01)==0x00)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,On underflow,On underflow,On underflow" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" elif ((((per.l(ad:0x40078700+0x2C))&0x70000)>=0x40000)&&(((per.l(ad:0x40078700+0x2C))&0x70000)<=0x60000)) group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 28.--29. " ADTTB ,GTADTRB buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 24.--25. " ADTTA ,GTADTRA buffer transfer timing select" "No transfer,Crest,Trough,Crest/Trough" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" else group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 30. " ADTDB ,GTADTRB double buffer operation" "Single,Double" bitfld.long 0x00 26. " ADTDA ,GTADTRA double buffer operation" "Single,Double" newline bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 3. " BD[3] ,GTDV buffer operation disable" "No,Yes" bitfld.long 0x00 2. " BD[2] ,GTADTR buffer operation disable" "No,Yes" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" newline bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" endif group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x6C++0x07 line.long 0x00 "GTPDBR,General PWM Timer Cycle Setting Double-Buffer Register" line.long 0x04 "GTADTRA,A/D Converter Start Request Timing Register A" group.long 0x7C++0x03 line.long 0x00 "GTADTRB,A/D Converter Start Request Timing Register B" group.long 0x74++0x03 line.long 0x00 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" group.long 0x80++0x03 line.long 0x00 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" group.long 0x78++0x03 line.long 0x00 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" group.long 0x84++0x03 line.long 0x00 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 8. " TDFER ,GTDVD setting" "Separately,Auto" bitfld.long 0x00 5. " TDBDE ,GTDVD buffer operation enable" "Disabled,Enabled" bitfld.long 0x00 4. " TDBUE ,GTDVU buffer operation enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU/GTDVD,GTDVU/GTDVD" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" group.long 0x90++0x0B line.long 0x00 "GTDVD,General PWM Timer Dead Time Value Register D" line.long 0x04 "GTDBU,General PWM Timer Dead Time Buffer Register U" line.long 0x08 "GTDBD,General PWM Timer Dead Time Buffer Register D" rgroup.long 0x9C++0x03 line.long 0x00 "GTSOS,General PWM Timer Output Protection Function Status Register" bitfld.long 0x00 0.--1. " SOS ,Output protection function status" "Normal,Protected,Protected,Protected" group.long 0xA0++0x03 line.long 0x00 "GTSOTR,General PWM Timer Output Protection Function Temporary Release Register" bitfld.long 0x00 0. " SOTR ,Output protection function temporary release" "Not released,Released" width 0x0B tree.end tree "Timer 8" base ad:0x40078800 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" newline rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" newline bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" newline bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,," bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU,GTDVU" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" width 0x0B tree.end tree "Timer 9" base ad:0x40078900 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" newline rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" newline bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" newline bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,," bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU,GTDVU" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" width 0x0B tree.end tree "Timer 10" base ad:0x40078A00 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" newline rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" newline bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" newline bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,," bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU,GTDVU" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" width 0x0B tree.end tree "Timer 11" base ad:0x40078B00 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" newline rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" newline bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" newline bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,," bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU,GTDVU" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" width 0x0B tree.end tree "Timer 12" base ad:0x40078C00 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" newline rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" newline bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" newline bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,," bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU,GTDVU" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" width 0x0B tree.end tree "Timer 13" base ad:0x40078D00 width 10. group.long 0x00++0x0F line.long 0x00 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.BYTE 0x00 8.--15. 1. " PRKEY ,GTWP key code" bitfld.long 0x00 0. " WP ,Register write disable" "No,Yes" line.long 0x04 "GTSTR,General PWM Timer Software Start Register" bitfld.long 0x04 13. " CSTRT13 ,Counter start register 13" "No effect,Started" bitfld.long 0x04 12. " CSTRT12 ,Counter start register 12" "No effect,Started" bitfld.long 0x04 11. " CSTRT11 ,Counter start register 11" "No effect,Started" newline bitfld.long 0x04 10. " CSTRT10 ,Counter start register 10" "No effect,Started" bitfld.long 0x04 9. " CSTRT9 ,Counter start register 9" "No effect,Started" bitfld.long 0x04 8. " CSTRT8 ,Counter start register 8" "No effect,Started" newline bitfld.long 0x04 7. " CSTRT7 ,Counter start register 7" "No effect,Started" bitfld.long 0x04 6. " CSTRT6 ,Counter start register 6" "No effect,Started" bitfld.long 0x04 5. " CSTRT5 ,Counter start register 5" "No effect,Started" newline bitfld.long 0x04 4. " CSTRT4 ,Counter start register 4" "No effect,Started" bitfld.long 0x04 3. " CSTRT3 ,Counter start register 3" "No effect,Started" bitfld.long 0x04 2. " CSTRT2 ,Counter start register 2" "No effect,Started" newline bitfld.long 0x04 1. " CSTRT1 ,Counter start register 1" "No effect,Started" bitfld.long 0x04 0. " CSTRT0 ,Counter start register 0" "No effect,Started" line.long 0x08 "GTSTP,General PWM Timer Software Stop Register" bitfld.long 0x08 13. " CSTOP13 ,Counter stop register 13" "No effect,Stopped" bitfld.long 0x08 12. " CSTOP12 ,Counter stop register 12" "No effect,Stopped" bitfld.long 0x08 11. " CSTOP11 ,Counter stop register 11" "No effect,Stopped" newline bitfld.long 0x08 10. " CSTOP10 ,Counter stop register 10" "No effect,Stopped" bitfld.long 0x08 9. " CSTOP9 ,Counter stop register 9" "No effect,Stopped" bitfld.long 0x08 8. " CSTOP8 ,Counter stop register 8" "No effect,Stopped" newline bitfld.long 0x08 7. " CSTOP7 ,Counter stop register 7" "No effect,Stopped" bitfld.long 0x08 6. " CSTOP6 ,Counter stop register 6" "No effect,Stopped" bitfld.long 0x08 5. " CSTOP5 ,Counter stop register 5" "No effect,Stopped" newline bitfld.long 0x08 4. " CSTOP4 ,Counter stop register 4" "No effect,Stopped" bitfld.long 0x08 3. " CSTOP3 ,Counter stop register 3" "No effect,Stopped" bitfld.long 0x08 2. " CSTOP2 ,Counter stop register 2" "No effect,Stopped" newline bitfld.long 0x08 1. " CSTOP1 ,Counter stop register 1" "No effect,Stopped" bitfld.long 0x08 0. " CSTOP0 ,Counter stop register 0" "No effect,Stopped" line.long 0x0C "GTCLR,General PWM Timer Software Clear Register" bitfld.long 0x0C 13. " CCLR13 ,Counter clear register 13" "No effect,Clear" bitfld.long 0x0C 12. " CCLR12 ,Counter clear register 12" "No effect,Clear" bitfld.long 0x0C 11. " CCLR11 ,Counter clear register 11" "No effect,Clear" newline bitfld.long 0x0C 10. " CCLR10 ,Counter clear register 10" "No effect,Clear" bitfld.long 0x0C 9. " CCLR9 ,Counter clear register 9" "No effect,Clear" bitfld.long 0x0C 8. " CCLR8 ,Counter clear register 8" "No effect,Clear" newline bitfld.long 0x0C 7. " CCLR7 ,Counter clear register 7" "No effect,Clear" bitfld.long 0x0C 6. " CCLR6 ,Counter clear register 6" "No effect,Clear" bitfld.long 0x0C 5. " CCLR5 ,Counter clear register 5" "No effect,Clear" newline bitfld.long 0x0C 4. " CCLR4 ,Counter clear register 4" "No effect,Clear" bitfld.long 0x0C 3. " CCLR3 ,Counter clear register 3" "No effect,Clear" bitfld.long 0x0C 2. " CCLR2 ,Counter clear register 2" "No effect,Clear" newline bitfld.long 0x0C 1. " CCLR1 ,Counter clear register 1" "No effect,Clear" bitfld.long 0x0C 0. " CCLR0 ,Counter clear register 0" "No effect,Clear" group.long 0x10++0x13 line.long 0x00 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x00 31. " CSTRT ,Software source counter start enable" "Disabled,Enabled" bitfld.long 0x00 23. " SSELCH ,ELCH event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 22. " SSELCG ,ELCG event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " SSELCF ,ELCF event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 20. " SSELCE ,ELCE event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 19. " SSELCD ,ELCD event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " SSELCC ,ELCC event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 17. " SSELCB ,ELCB event source counter start enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSELCA ,ELCA event source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " SSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 14. " SSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 13. " SSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 12. " SSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 11. " SSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 10. " SSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " SSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter start enable" "Disabled,Enabled" bitfld.long 0x00 8. " SSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter start enable" "Disabled,Enabled" bitfld.long 0x00 7. " SSGTRGDF ,GTETRGD pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " SSGTRGDR ,GTETRGD pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 5. " SSGTRGCF ,GTETRGC pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 4. " SSGTRGCR ,GTETRGC pin rising input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " SSGTRGBF ,GTETRGB pin falling input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 2. " SSGTRGBR ,GTETRGB pin rising input source counter start enable" "Disabled,Enabled" bitfld.long 0x00 1. " SSGTRGAF ,GTETRGA pin falling input source counter start enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SSGTRGAR ,GTETRGA pin rising input source counter start enable" "Disabled,Enabled" line.long 0x04 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x04 31. " CSTOP ,Software source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 23. " PSELCH ,ELCH event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 22. " PSELCG ,ELCG event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 21. " PSELCF ,ELCF event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 20. " PSELCE ,ELCE event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 19. " PSELCD ,ELCD event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 18. " PSELCC ,ELCC event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 17. " PSELCB ,ELCB event source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 16. " PSELCA ,ELCA event source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 15. " PSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 14. " PSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 13. " PSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 12. " PSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 11. " PSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 10. " PSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 9. " PSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 8. " PSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 7. " PSGTRGDF ,GTETRGD pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " PSGTRGDR ,GTETRGD pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 5. " PSGTRGCF ,GTETRGC pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 4. " PSGTRGCR ,GTETRGC pin rising input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " PSGTRGBF ,GTETRGB pin falling input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 2. " PSGTRGBR ,GTETRGB pin rising input source counter stop enable" "Disabled,Enabled" bitfld.long 0x04 1. " PSGTRGAF ,GTETRGA pin falling input source counter stop enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " PSGTRGAR ,GTETRGA pin rising input source counter stop enable" "Disabled,Enabled" line.long 0x08 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x08 31. " CCLR ,Software source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 23. " CSELCH ,ELCH event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 22. " CSELCG ,ELCG event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 21. " CSELCF ,ELCF event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 20. " CSELCE ,ELCE event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 19. " CSELCD ,ELCD event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " CSELCC ,ELCC event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 17. " CSELCB ,ELCB event source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 16. " CSELCA ,ELCA event source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " CSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 14. " CSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 13. " CSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 12. " CSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 11. " CSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 10. " CSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 9. " CSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 8. " CSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 7. " CSGTRGDF ,GTETRGD pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 6. " CSGTRGDR ,GTETRGD pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 5. " CSGTRGCF ,GTETRGC pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 4. " CSGTRGCR ,GTETRGC pin rising input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 3. " CSGTRGBF ,GTETRGB pin falling input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 2. " CSGTRGBR ,GTETRGB pin rising input source counter clear enable" "Disabled,Enabled" bitfld.long 0x08 1. " CSGTRGAF ,GTETRGA pin falling input source counter clear enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " CSGTRGAR ,GTETRGA pin rising input source counter clear enable" "Disabled,Enabled" line.long 0x0C "GTUPSR,General PWM Timer Up Count Source Select Register" bitfld.long 0x0C 23. " USELCH ,ELCH event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 22. " USELCG ,ELCG event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 21. " USELCF ,ELCF event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 20. " USELCE ,ELCE event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 19. " USELCD ,ELCD event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 18. " USELCC ,ELCC event source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 17. " USELCB ,ELCB event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 16. " USELCA ,ELCA event source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 15. " USCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 14. " USCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 13. " USCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 12. " USCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 11. " USCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 10. " USCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 9. " USCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 8. " USCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 7. " USGTRGDF ,GTETRGD pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 6. " USGTRGDR ,GTETRGD pin rising input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 5. " USGTRGCF ,GTETRGC pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 4. " USGTRGCR ,GTETRGC pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 3. " USGTRGBF ,GTETRGB pin falling input source counter count up enable" "Disabled,Enabled" newline bitfld.long 0x0C 2. " USGTRGBR ,GTETRGB pin rising input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 1. " USGTRGAF ,GTETRGA pin falling input source counter count up enable" "Disabled,Enabled" bitfld.long 0x0C 0. " USGTRGAR ,GTETRGA pin rising input source counter count up enable" "Disabled,Enabled" line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" bitfld.long 0x10 23. " DSELCH ,ELCH event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 22. " DSELCG ,ELCG event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 21. " DSELCF ,ELCF event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 20. " DSELCE ,ELCE event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 19. " DSELCD ,ELCD event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 18. " DSELCC ,ELCC event source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 17. " DSELCB ,ELCB event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 16. " DSELCA ,ELCA event source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 15. " DSCBFAH ,GTIOCB pin falling input during GTIOCA value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 14. " DSCBFAL ,GTIOCB pin falling input during GTIOCA value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 13. " DSCBRAH ,GTIOCB pin rising input during GTIOCA value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 12. " DSCBRAL ,GTIOCB pin rising input during GTIOCA value low source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 11. " DSCAFBH ,GTIOCA pin falling input during GTIOCB value high source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 10. " DSCAFBL ,GTIOCA pin falling input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 9. " DSCARBH ,GTIOCA pin rising input during GTIOCB value high source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 8. " DSCARBL ,GTIOCA pin rising input during GTIOCB value low source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 7. " DSGTRGDF ,GTETRGD pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 6. " DSGTRGDR ,GTETRGD pin rising input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 5. " DSGTRGCF ,GTETRGC pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 4. " DSGTRGCR ,GTETRGC pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 3. " DSGTRGBF ,GTETRGB pin falling input source counter count down enable" "Disabled,Enabled" newline bitfld.long 0x10 2. " DSGTRGBR ,GTETRGB pin rising input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 1. " DSGTRGAF ,GTETRGA pin falling input source counter count down enable" "Disabled,Enabled" bitfld.long 0x10 0. " DSGTRGAR ,GTETRGA pin rising input source counter count down enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "GTICASR,General PWM Timer Input Capture Source Select Register A" bitfld.long 0x00 23. " ASELCH ,ELCH event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " ASELCG ,ELCG event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " ASELCF ,ELCF event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " ASELCE ,ELCE event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " ASELCD ,ELCD event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " ASELCC ,ELCC event source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " ASELCB ,ELCB event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " ASELCA ,ELCA event source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " ASCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " ASCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " ASCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " ASCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " ASCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " ASCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " ASCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " ASCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " ASGTRGDF ,GTETRGD pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " ASGTRGDR ,GTETRGD pin rising input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " ASGTRGCF ,GTETRGC pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " ASGTRGCR ,GTETRGC pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " ASGTRGBF ,GTETRGB pin falling input source GTCCRA input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " ASGTRGBR ,GTETRGB pin rising input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " ASGTRGAF ,GTETRGA pin falling input source GTCCRA input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " ASGTRGAR ,GTETRGA pin rising input source GTCCRA input capture enable" "Disabled,Enabled" group.long 0x28++0x03 line.long 0x00 "GTICBSR,General PWM Timer Input Capture Source Select Register B" bitfld.long 0x00 23. " BSELCH ,ELCH event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 22. " BSELCG ,ELCG event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 21. " BSELCF ,ELCF event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 20. " BSELCE ,ELCE event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 19. " BSELCD ,ELCD event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 18. " BSELCC ,ELCC event source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " BSELCB ,ELCB event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 16. " BSELCA ,ELCA event source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 15. " BSCBFAH ,GTIOCB pin falling input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 14. " BSCBFAL ,GTIOCB pin falling input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 13. " BSCBRAH ,GTIOCB pin rising input during GTIOCA value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 12. " BSCBRAL ,GTIOCB pin rising input during GTIOCA value low source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " BSCAFBH ,GTIOCA pin falling input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 10. " BSCAFBL ,GTIOCA pin falling input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 9. " BSCARBH ,GTIOCA pin rising input during GTIOCB value high source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " BSCARBL ,GTIOCA pin rising input during GTIOCB value low source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 7. " BSGTRGDF ,GTETRGD pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 6. " BSGTRGDR ,GTETRGD pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " BSGTRGCF ,GTETRGC pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 4. " BSGTRGCR ,GTETRGC pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 3. " BSGTRGBF ,GTETRGB pin falling input source GTCCRB input capture enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " BSGTRGBR ,GTETRGB pin rising input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 1. " BSGTRGAF ,GTETRGA pin falling input source GTCCRB input capture enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSGTRGAR ,GTETRGA pin rising input source GTCCRB input capture enable" "Disabled,Enabled" newline group.long 0x2C++0x13 line.long 0x00 "GTCR,General PWM Timer Control Register" bitfld.long 0x00 24.--26. " TPCS ,Timer prescaler select" "/1,/4,/16,/64,/256,/1024,?..." bitfld.long 0x00 16.--18. " MD ,Mode select" "Saw-wave PWM mode,Saw-wave one-shot pulse mode,,,Triangle-wave PWM mode 1,Triangle-wave PWM mode 2,Triangle-wave PWM mode 3,?..." bitfld.long 0x00 0. " CST ,Count start" "Stopped,Not stopped" line.long 0x04 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" bitfld.long 0x04 27. " OBDTYR ,GTIOCB output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 26. " OBDTYF ,Forcible GTIOCB output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 24.--25. " OBDTY ,GTIOCB output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 19. " OADTYR ,GTIOCA output value selecting after releasing 0%/100% duty setting" "Not masked,Masked" bitfld.long 0x04 18. " OADTYF ,Forcible GTIOCA output duty setting" "Not forcibly,Forcibly" bitfld.long 0x04 16.--17. " OADTY ,GTIOCA output duty setting" "Depend on compare match,Depend on compare match,0%,100%" newline bitfld.long 0x04 1. " UDF ,Forcible count direction setting" "Not forcibly,Forcibly" bitfld.long 0x04 0. " UD ,Count direction setting" "Down,Up" line.long 0x08 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x08 30.--31. " NFCSB ,Noise filter b sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 29. " NFBEN ,Noise filter b enable" "Disabled,Enabled" bitfld.long 0x08 25.--26. " OBDF ,GTIOCB pin disable value setting" ",Hi-Z,0,1" newline bitfld.long 0x08 24. " OBE ,GTIOCB pin output enable" "Disabled,Enabled" bitfld.long 0x08 23. " OBHLD ,GTIOCB pin output setting at the Start/Stop count" "Register setting,Retained" bitfld.long 0x08 22. " OBDFLT ,GTIOCB pin output value setting at the count stop" "Low,High" newline bitfld.long 0x08 16.--20. " GTIOB ,Initial Output/Output at cycle End/Output at GTCCRB compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" bitfld.long 0x08 14.--15. " NFCSA ,Noise filter a sampling clock select" "/1,/4,/16,/64" bitfld.long 0x08 13. " NFAEN ,Noise filter a enable" "Disabled,Enabled" newline bitfld.long 0x08 9.--10. " OADF ,GTIOCA pin disable value setting" ",Hi-Z,0,1" bitfld.long 0x08 8. " OAE ,GTIOCA pin output enable" "Disabled,Enabled" bitfld.long 0x08 7. " OAHLD ,GTIOCA pin output setting at the Start/Stop count" "Register setting,Retained" newline bitfld.long 0x08 6. " OADFLT ,GTIOCA pin output value setting at the count stop" "Low,High" bitfld.long 0x08 0.--4. " GTIOA ,Initial Output/Output at cycle End/Output at GTCCRA compare match" "Low/retained/retained,Low/retained/low,Low/retained/high,Low/retained/toggled,Low/low/retained,Low/low/low,Low/low/high,Low/low/toggled,Low/high/retained,Low/high/low,Low/high/high,Low/high/toggled,Low/toggled/retained,Low/toggled/low,Low/toggled/high,Low/toggled/toggled,High/retained/retained,High/retained/low,High/retained/high,High/retained/toggled,High/low/retained,High/low/low,High/low/high,High/low/toggled,High/high/retained,High/high/low,High/high/high,High/high/toggled,High/toggled/retained,High/toggled/low,High/toggled/high,High/toggled/toggled" line.long 0x0C "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x0C 30. " GRPABL ,Same time output level low disable request enable" "Disabled,Enabled" bitfld.long 0x0C 29. " GRPABH ,Same time output level high disable request enable" "Disabled,Enabled" bitfld.long 0x0C 24.--25. " GRP ,Output disable source select" "Group A,Group B,Group C,Group D" line.long 0x10 "GTST,General PWM Timer Status Register" rbitfld.long 0x10 30. " OABLF ,Same time output level low flag" "Not same time,Same time" rbitfld.long 0x10 29. " OABHF ,Same time output level high flag" "Not same time,Same time" rbitfld.long 0x10 24. " ODF ,Output disable flag" "Not requested,Requested" newline rbitfld.long 0x10 15. " TUCF ,Count direction flag" "Downward,Upward" bitfld.long 0x10 7. " TCFPU ,Underflow flag" "No underflow,Underflow" bitfld.long 0x10 6. " TCFPO ,Overflow flag" "No overflow,Overflow" newline bitfld.long 0x10 5. " TCFF ,Input compare match flag f" "No match,Match" bitfld.long 0x10 4. " TCFE ,Input compare match flag e" "No match,Match" bitfld.long 0x10 3. " TCFD ,Input compare match flag d" "No match,Match" newline bitfld.long 0x10 2. " TCFC ,Input compare match flag c" "No match,Match" bitfld.long 0x10 1. " TCFB ,Input Capture/Compare match flag b" "No match,Match" bitfld.long 0x10 0. " TCFA ,Input Capture/Compare match flag a" "No match,Match" group.long 0x40++0x03 line.long 0x00 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x00 22. " CCRSWT ,GTCCRA and GTCCRB forcible buffer operation" "Not performed,Performed" bitfld.long 0x00 20.--21. " PR ,GTPR buffer operation" "No buffer,Single buffer,," bitfld.long 0x00 18.--19. " CCRB ,GTCCRB buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" newline bitfld.long 0x00 16.--17. " CCRA ,GTCCRA buffer operation" "No buffer,Single buffer,Double buffer,Double buffer" bitfld.long 0x00 1. " BD[1] ,GTPR buffer operation disable" "No,Yes" bitfld.long 0x00 0. " BD[0] ,GTCCR buffer operation disable" "No,Yes" group.long 0x44++0x07 line.long 0x00 "GTITC,General PWM Timer Interrupt and A/D Converter Start Request Skipping Setting Register" bitfld.long 0x00 14. " ADTBL ,GTADTRB A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 12. " ADTAL ,GTADTRA A/D converter start request link" "Not linked,Linked" bitfld.long 0x00 8.--10. " IVTT ,OVF/UDF interrupt skipping count select" "No skipping,1,2,3,4,5,6,7" newline bitfld.long 0x00 6.--7. " IVTC ,OVF/UDF interrupt skipping function select" "No skipping,Overflow/Underflow/Crest,Overflow/Underflow/Trough,Overflow/Underflow/Crest/Trough" bitfld.long 0x00 5. " ITLF ,GTCCRF compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 4. " ITLE ,GTCCRE compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 3. " ITLD ,GTCCRD compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 2. " ITLC ,GTCCRC compare match interrupt link" "Not linked,Linked" bitfld.long 0x00 1. " ITLB ,GTCCRB compare match interrupt link" "Not linked,Linked" newline bitfld.long 0x00 0. " ITLA ,GTCCRA compare match interrupt link" "Not linked,Linked" line.long 0x04 "GTCNT,General PWM Timer Counter" group.long 0x4C++0x03 line.long 0x00 "GTCCRA,General PWM Timer Compare Capture Register A" group.long 0x50++0x03 line.long 0x00 "GTCCRB,General PWM Timer Compare Capture Register B" group.long 0x54++0x03 line.long 0x00 "GTCCRC,General PWM Timer Compare Capture Register C" group.long 0x58++0x03 line.long 0x00 "GTCCRE,General PWM Timer Compare Capture Register E" group.long 0x5C++0x03 line.long 0x00 "GTCCRD,General PWM Timer Compare Capture Register D" group.long 0x60++0x03 line.long 0x00 "GTCCRF,General PWM Timer Compare Capture Register F" group.long 0x64++0x07 line.long 0x00 "GTPR,General PWM Timer Cycle Setting Register" line.long 0x04 "GTPBR,General PWM Timer Cycle Setting Buffer Register" group.long 0x88++0x07 line.long 0x00 "GTDTCR,General PWM Timer Dead Time Control Register" bitfld.long 0x00 0. " TDE ,Negative-Phase waveform setting" "Not GTDVU,GTDVU" line.long 0x04 "GTDVU,General PWM Timer Dead Time Value Register U" width 0x0B tree.end tree "Common" base ad:0x40078000 width 7. if (((per.l(ad:0x40078000+0xFF0))&0x10000)==0x0) group.long 0xFF0++0x03 line.long 0x0 "OPSCR,Output Phase Switching Control Register" bitfld.long 0x0 30.--31. " NFCS ,External input noise filter clock selection" "/1,/4,/16,/64" bitfld.long 0x0 29. " NFEN ,External input noise filter enable" "Disabled,Enabled" bitfld.long 0x0 26. " GODF ,Group output disable function" "Disabled,Enabled" bitfld.long 0x0 24.--25. " GRP ,Output disabled source selection" "Group A,Group B,Group C,Group D" newline rbitfld.long 0x0 21. " ALIGN ,Input phase alignment" "PCLKD,PWM" bitfld.long 0x0 20. " RV ,Output phase rotation direction reversal" "Not reversed,Reversed" bitfld.long 0x0 19. " INV ,Invert-Phase output control" "Positive,Negative" bitfld.long 0x0 18. " N ,Negative-Phase output (N) control" "Level,PWM" newline bitfld.long 0x0 17. " P ,Positive-Phase output (P) control" "Level,PWM" bitfld.long 0x0 16. " FB ,External feedback signal enable" "External,Soft" bitfld.long 0x0 8. " EN ,Enable-Phase output control" "Disabled,Enabled" rbitfld.long 0x0 6. " W ,Input W-Phase monitor" "External,Software" newline rbitfld.long 0x0 5. " V ,Input V-Phase monitor" "External,Software" rbitfld.long 0x0 4. " U ,Input U-Phase monitor" "External,Software" else group.long 0xFF0++0x03 line.long 0x0 "OPSCR,Output Phase Switching Control Register" bitfld.long 0x0 30.--31. " NFCS ,External input noise filter clock selection" "/1,/4,/16,/64" bitfld.long 0x0 29. " NFEN ,External input noise filter enable" "Disabled,Enabled" bitfld.long 0x0 26. " GODF ,Group output disable function" "Disabled,Enabled" bitfld.long 0x0 24.--25. " GRP ,Output disabled source selection" "Group A,Group B,Group C,Group D" newline rbitfld.long 0x0 21. " ALIGN ,Input phase alignment" "PCLKD,PWM" bitfld.long 0x0 20. " RV ,Output phase rotation direction reversal" "Not reversed,Reversed" bitfld.long 0x0 19. " INV ,Invert-Phase output control" "Positive,Negative" bitfld.long 0x0 18. " N ,Negative-Phase output (N) control" "Level,PWM" newline bitfld.long 0x0 17. " P ,Positive-Phase output (P) control" "Level,PWM" bitfld.long 0x0 16. " FB ,External feedback signal enable" "External,Soft" bitfld.long 0x0 8. " EN ,Enable-Phase output control" "Disabled,Enabled" rbitfld.long 0x0 6. " W ,Input W-Phase monitor" "External,Software" newline rbitfld.long 0x0 5. " V ,Input V-Phase monitor" "External,Software" rbitfld.long 0x0 4. " U ,Input U-Phase monitor" "External,Software" bitfld.long 0x0 2. " WF ,Input W-Phase soft setting" "0,1" bitfld.long 0x0 1. " VF ,Input V-Phase soft setting" "0,1" newline bitfld.long 0x0 0. " UF ,Input U-Phase soft setting" "0,1" endif width 0xb tree.end tree.end tree "PWM (Delay Generation Circuit)" base ad:0x4007B000 width 11. group.word 0x00++0x03 line.word 0x0 "CR,PWM Output Delay Control Register" bitfld.word 0x0 1. " DLYRST ,PWM delay generation circuit reset" "No reset,Reset" bitfld.word 0x0 0. " DLLEN ,DLL operation enable" "Disabled,Enabled" line.word 0x2 "CR2,PWM Output Delay Control Register 2" bitfld.word 0x2 11. " DLYEN3 ,PWM delay generation circuit enable for channel 3" "Enabled,Disabled" bitfld.word 0x2 10. " DLYEN2 ,PWM delay generation circuit enable for channel 2" "Enabled,Disabled" newline bitfld.word 0x2 9. " DLYEN1 ,PWM delay generation circuit enable for channel 1" "Enabled,Disabled" bitfld.word 0x2 8. " DLYEN0 ,PWM delay generation circuit enable for channel 0" "Enabled,Disabled" newline bitfld.word 0x2 3. " DLYBS3 ,PWM delay generation circuit bypass for channel 3" "Bypass,Do not Bypass" bitfld.word 0x2 2. " DLYBS2 ,PWM delay generation circuit bypass for channel 2" "Bypass,Do not Bypass" newline bitfld.word 0x2 1. " DLYBS1 ,PWM delay generation circuit bypass for channel 1" "Bypass,Do not Bypass" bitfld.word 0x2 0. " DLYBS0 ,PWM delay generation circuit bypass for channel 0" "Bypass,Do not Bypass" group.word (0x18)++0x01 "Channel 0" line.word 0x0 "R0A,GTIOC0A Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC0A output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x18+0x10)++0x01 line.word 0x0 "F0A,GTIOC0A Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC0A output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x18+0x02)++0x01 line.word 0x0 "R0B,GTIOC0B Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC0B output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x18+0x12)++0x01 line.word 0x0 "F0B,GTIOC0B Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOCnB output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x1C)++0x01 "Channel 1" line.word 0x0 "R1A,GTIOC1A Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC1A output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x1C+0x10)++0x01 line.word 0x0 "F1A,GTIOC1A Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC1A output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x1C+0x02)++0x01 line.word 0x0 "R1B,GTIOC1B Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC1B output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x1C+0x12)++0x01 line.word 0x0 "F1B,GTIOC1B Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOCnB output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x20)++0x01 "Channel 2" line.word 0x0 "R2A,GTIOC2A Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC2A output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x20+0x10)++0x01 line.word 0x0 "F2A,GTIOC2A Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC2A output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x20+0x02)++0x01 line.word 0x0 "R2B,GTIOC2B Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC2B output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x20+0x12)++0x01 line.word 0x0 "F2B,GTIOC2B Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOCnB output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x24)++0x01 "Channel 3" line.word 0x0 "R3A,GTIOC3A Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC3A output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x24+0x10)++0x01 line.word 0x0 "F3A,GTIOC3A Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC3A output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x24+0x02)++0x01 line.word 0x0 "R3B,GTIOC3B Rising Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOC3B output rising edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." group.word (0x24+0x12)++0x01 line.word 0x0 "F3B,GTIOC3B Falling Output Delay Register" bitfld.word 0x0 0.--4. " DLY ,GTIOCnB output falling edge delay setting" "1/32 PCLKD,2/32 PCLKD,3/32 PCLKD,4/32 PCLKD,5/32 PCLKD,6/32 PCLKD,7/32 PCLKD,8/32 PCLKD,9/32 PCLKD,10/32 PCLKD,11/32 PCLKD,12/32 PCLKD,13/32 PCLKD,14/32 PCLKD,15/32 PCLKD,16/32 PCLKD,17/32 PCLKD,18/32 PCLKD,19/32 PCLKD,20/32 PCLKD,21/32 PCLKD,22/32 PCLKD,23/32 PCLKD,24/32 PCLKD,25/32 PCLKD,26/32 PCLKD,27/32 PCLKD,28/32 PCLKD,29/32 PCLKD,30/32 PCLKD,31/32 PCLKD,?..." width 0x0B tree.end tree.open "AGT (Asynchronous General-Purpose Timer)" tree "AGT0" base ad:0x40084000 width 10. group.word 0x00++0x05 line.word 0x0 "AGT,AGT Counter Register" line.word 0x2 "AGTCMA,AGT Compare Match A Register" line.word 0x4 "AGTCMB,AGT Compare Match B Register" group.byte 0x08++0x02 line.byte 0x0 "AGTCR,AGT Control Register" bitfld.byte 0x0 7. " TCMBF ,Compare match b flag" "No match,Match" bitfld.byte 0x0 6. " TCMAF ,Compare match a flag" "No match,Match" bitfld.byte 0x0 5. " TUNDF ,Underflow flag" "No underflow,Underflow" newline bitfld.byte 0x0 4. " TEDGF ,Active edge judgment flag" "Not received,Received" bitfld.byte 0x0 2. " TSTOP ,AGT count forced stop" "No effect,Stop" rbitfld.byte 0x0 1. " TCSTF ,AGT count status flag" "Stopped,Started" newline bitfld.byte 0x0 0. " TSTART ,AGT count start" "Stop,Start" sif cpuis("R7FS5*") if (((per.b(ad:0x40084000+0x08))&0x03)==0x00)&&(((per.b(ad:0x40084000+0x09))&0x07)==0x02) group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 3. " TEDGPL ,Edge polarity" "Single-edge,Both-edge" bitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." elif (((per.b(ad:0x40084000+0x08))&0x03)==0x00)&&(((per.b(ad:0x40084000+0x09))&0x07)!=0x02) group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." elif (((per.b(ad:0x40084000+0x08))&0x03)!=0x00)&&(((per.b(ad:0x40084000+0x09))&0x07)==0x02) group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" rbitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 3. " TEDGPL ,Edge polarity" "Single-edge,Both-edge" rbitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." else group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" rbitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." rbitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." endif else group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 3. " TEDGPL ,Edge polarity" "Single-edge,Both-edge" bitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." endif group.byte 0x10++0x00 line.byte 0x0 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x0 7. " LPM ,Low power mode" "Normal,Low power" bitfld.byte 0x0 0.--2. " CKS ,AGTLCLK/AGTSCLK count source clock frequency division ratio" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,1/128" if (((per.b(ad:0x40084000+0x09))&0x07)==0x00) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - start output level (AGTO only/AGTIO not used)" "Low,High" elif (((per.b(ad:0x40084000+0x09))&0x07)==0x01) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - start output level (AGTIO/AGTO)" "High/Low,Low/High" elif (((per.b(ad:0x40084000+0x09))&0x07)==0x02) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 6.--7. " TIOGT ,Count control" "Always,Specified for AGTEEN,?..." bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - (AGTIO edge to count on/AGTO start output level)" "Rising/Low,Falling/High" elif (((per.b(ad:0x40084000+0x09))&0x07)==0x03) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - (AGTIO measure level/AGTO start output level)" "Low/Low,High/High" elif (((per.b(ad:0x40084000+0x09))&0x07)==0x04) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - (AGTIO measure from-to edge/AGTO start output level)" "Rising-rising/Low,Falling-falling/High" else hgroup.byte 0x0C++0x00 hide.byte 0x00 "AGTIOC,AGT I/O Control Register" endif group.byte 0x0D++0x02 line.byte 0x0 "AGTISR,AGT Event Pin Select Register" bitfld.byte 0x0 2. " EEPS ,AGTEEN polarity selection" "Low-level,High-level" line.byte 0x1 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x1 6. " TOPOLB ,AGTOB polarity select" "Low,High" bitfld.byte 0x1 5. " TOEB ,AGTOB output enable" "Disabled,Enabled" bitfld.byte 0x1 4. " TCMEB ,Compare match b register enable" "Disabled,Enabled" newline bitfld.byte 0x1 2. " TOPOLA ,AGTOA polarity select" "Low,High" bitfld.byte 0x1 1. " TOEA ,AGTOA output enable" "Disabled,Enabled" bitfld.byte 0x1 0. " TCMEA ,Compare match a register enable" "Disabled,Enabled" line.byte 0x2 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x2 4. " TIES ,AGTIOn input enable" "Disabled,Enabled" bitfld.byte 0x2 0.--1. " SEL ,AGTIO pin select" "Pm,,P402,P403" width 0x0B tree.end tree "AGT1" base ad:0x40084100 width 10. group.word 0x00++0x05 line.word 0x0 "AGT,AGT Counter Register" line.word 0x2 "AGTCMA,AGT Compare Match A Register" line.word 0x4 "AGTCMB,AGT Compare Match B Register" group.byte 0x08++0x02 line.byte 0x0 "AGTCR,AGT Control Register" bitfld.byte 0x0 7. " TCMBF ,Compare match b flag" "No match,Match" bitfld.byte 0x0 6. " TCMAF ,Compare match a flag" "No match,Match" bitfld.byte 0x0 5. " TUNDF ,Underflow flag" "No underflow,Underflow" newline bitfld.byte 0x0 4. " TEDGF ,Active edge judgment flag" "Not received,Received" bitfld.byte 0x0 2. " TSTOP ,AGT count forced stop" "No effect,Stop" rbitfld.byte 0x0 1. " TCSTF ,AGT count status flag" "Stopped,Started" newline bitfld.byte 0x0 0. " TSTART ,AGT count start" "Stop,Start" sif cpuis("R7FS5*") if (((per.b(ad:0x40084100+0x08))&0x03)==0x00)&&(((per.b(ad:0x40084100+0x09))&0x07)==0x02) group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 3. " TEDGPL ,Edge polarity" "Single-edge,Both-edge" bitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." elif (((per.b(ad:0x40084100+0x08))&0x03)==0x00)&&(((per.b(ad:0x40084100+0x09))&0x07)!=0x02) group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." elif (((per.b(ad:0x40084100+0x08))&0x03)!=0x00)&&(((per.b(ad:0x40084100+0x09))&0x07)==0x02) group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" rbitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 3. " TEDGPL ,Edge polarity" "Single-edge,Both-edge" rbitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." else group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" rbitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." rbitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." endif else group.byte 0x09++0x00 line.byte 0x0 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x0 4.--6. " TCK ,Count source" "PCLKB,PCLKB/8,,PCLKB/2,Divided AGTLCLK,Underflow signal,Divided AGTSCLK,?..." bitfld.byte 0x0 3. " TEDGPL ,Edge polarity" "Single-edge,Both-edge" bitfld.byte 0x0 0.--2. " TMOD ,Operating mode" "Timer,Pulse output,Event counter,Pulse width measurement,Pulse period measurement,?..." endif group.byte 0x10++0x00 line.byte 0x0 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x0 7. " LPM ,Low power mode" "Normal,Low power" bitfld.byte 0x0 0.--2. " CKS ,AGTLCLK/AGTSCLK count source clock frequency division ratio" "1/1,1/2,1/4,1/8,1/16,1/32,1/64,1/128" if (((per.b(ad:0x40084100+0x09))&0x07)==0x00) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - start output level (AGTO only/AGTIO not used)" "Low,High" elif (((per.b(ad:0x40084100+0x09))&0x07)==0x01) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - start output level (AGTIO/AGTO)" "High/Low,Low/High" elif (((per.b(ad:0x40084100+0x09))&0x07)==0x02) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 6.--7. " TIOGT ,Count control" "Always,Specified for AGTEEN,?..." bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - (AGTIO edge to count on/AGTO start output level)" "Rising/Low,Falling/High" elif (((per.b(ad:0x40084100+0x09))&0x07)==0x03) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - (AGTIO measure level/AGTO start output level)" "Low/Low,High/High" elif (((per.b(ad:0x40084100+0x09))&0x07)==0x04) group.byte 0x0C++0x00 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 4.--5. " TIPF ,Input filter" "No filter,PCLKB,PCLKB/8,PCLKB/32" bitfld.byte 0x0 2. " TOE ,AGTOn output enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " TEDGSEL ,I/O polarity switch - (AGTIO measure from-to edge/AGTO start output level)" "Rising-rising/Low,Falling-falling/High" else hgroup.byte 0x0C++0x00 hide.byte 0x00 "AGTIOC,AGT I/O Control Register" endif group.byte 0x0D++0x02 line.byte 0x0 "AGTISR,AGT Event Pin Select Register" bitfld.byte 0x0 2. " EEPS ,AGTEEN polarity selection" "Low-level,High-level" line.byte 0x1 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x1 6. " TOPOLB ,AGTOB polarity select" "Low,High" bitfld.byte 0x1 5. " TOEB ,AGTOB output enable" "Disabled,Enabled" bitfld.byte 0x1 4. " TCMEB ,Compare match b register enable" "Disabled,Enabled" newline bitfld.byte 0x1 2. " TOPOLA ,AGTOA polarity select" "Low,High" bitfld.byte 0x1 1. " TOEA ,AGTOA output enable" "Disabled,Enabled" bitfld.byte 0x1 0. " TCMEA ,Compare match a register enable" "Disabled,Enabled" line.byte 0x2 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x2 4. " TIES ,AGTIOn input enable" "Disabled,Enabled" bitfld.byte 0x2 0.--1. " SEL ,AGTIO pin select" "Pm,,P402,P403" width 0x0B tree.end tree.end tree "RTC (Realtime Clock)" base ad:0x40044000 width 10. rgroup.byte 0x00++0x00 line.byte 0x00 "R64CNT,64-Hz Counter" bitfld.byte 0x00 6. " F1HZ ,1 hz" "0,1" bitfld.byte 0x00 5. " F2HZ ,2 hz" "0,1" bitfld.byte 0x00 4. " F4HZ ,4 hz" "0,1" bitfld.byte 0x00 3. " F8HZ ,8 hz" "0,1" newline bitfld.byte 0x00 2. " F16HZ ,16 hz" "0,1" bitfld.byte 0x00 1. " F32HZ ,32 hz" "0,1" bitfld.byte 0x00 0. " F64HZ ,64 hz" "0,1" if (((per.b(ad:0x40044000+0x24))&0x80)==0x00) group.byte 0x02++0x00 line.byte 0x00 "RSECCNT,Second Counter" bitfld.byte 0x00 4.--6. " SEC10 ,10-Second count" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SEC1 ,1-Second count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" group.byte 0x04++0x00 line.byte 0x00 "RMINCNT,Minute Counter" bitfld.byte 0x00 4.--6. " MIN10 ,10-Minute count" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MIN1 ,1-Minute count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" if (((per.b(ad:0x40044000+0x24))&0x40)==0x40) if (((per.b(ad:0x40044000+0x06))&0x30)<0x20) group.byte 0x06++0x00 line.byte 0x00 "RHRCNT,Hour Counter" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" elif (((per.b(ad:0x40044000+0x06))&0x30)==0x20) group.byte 0x06++0x00 line.byte 0x00 "RHRCNT,Hour Counter" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-" else group.byte 0x06++0x00 line.byte 0x00 "RHRCNT,Hour Counter" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif else if (((per.b(ad:0x40044000+0x06))&0x30)<0x20) group.byte 0x06++0x00 line.byte 0x00 "RHRCNT,Hour Counter" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x06++0x00 line.byte 0x00 "RHRCNT,Hour Counter" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,-,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif endif group.byte 0x08++0x00 line.byte 0x00 "RWKCNT,Day-of-Week Counter" bitfld.byte 0x00 0.--2. " DAYW ,Day-of-Week counting" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,-" else group.byte 0x02++0x00 line.byte 0x00 "BCNT0,Binary Counter 0" group.byte 0x04++0x00 line.byte 0x00 "BCNT1,Binary Counter 1" group.byte 0x06++0x00 line.byte 0x00 "BCNT2,Binary Counter 2" group.byte 0x08++0x00 line.byte 0x00 "BCNT3,Binary Counter 3" endif if (((per.b(ad:0x40044000+0xC))&0x1F)==(0x4||0x6||0x9||0x11)) if (((per.b(ad:0x40044000+0xA))&0x30)<0x30) group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif elif ((((per.b(ad:0x40044000+0xC))&0x1F)==0x1)||(((per.b(ad:0x40044000+0xC))&0x1F)==0x3)||(((per.b(ad:0x40044000+0xC))&0x1F)==0x5)||(((per.b(ad:0x40044000+0xC))&0x1F)==0x7)||(((per.b(ad:0x40044000+0xC))&0x1F)==0x8)||(((per.b(ad:0x40044000+0xC))&0x1F)==0x10)||(((per.b(ad:0x40044000+0xC))&0x1F)==0x12)) if (((per.b(ad:0x40044000+0xA))&0x30)<0x30) group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif elif ((((per.b(ad:0x40044000+0xC))&0x1F)==0x2)) if ((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x00||0x4||0x8||0x12||0x16||0x20||0x24||0x28)))||((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x32||0x36||0x40||0x44||0x48)))||((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x52||0x56||0x60||0x64||0x68||0x72||0x76||0x80)))||((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x84||0x88||0x92||0x96))) group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,-" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x0A++0x00 line.byte 0x00 "RDAYCNT,Day Counter" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,-" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-" endif endif if (((per.b(ad:0x40044000+0xC))&0x1F)==0x00) group.byte 0x0C++0x00 line.byte 0x00 "RMONCNT,Month Counter" bitfld.byte 0x00 4. " MON10 ,Counting ten's position of months" "-,1" bitfld.byte 0x00 0.--3. " MON1 ,Counting one's position of months" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" elif (((per.b(ad:0x40044000+0xC))&0x10)<0x10) group.byte 0x0C++0x00 line.byte 0x00 "RMONCNT,Month Counter" bitfld.byte 0x00 4. " MON10 ,Counting ten's position of months" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,Counting one's position of months" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x0C++0x00 line.byte 0x00 "RMONCNT,Month Counter" bitfld.byte 0x00 4. " MON10 ,Counting ten's position of months" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,Counting one's position of months" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-" endif if (((per.b(ad:0x40044000+0x24))&0x01)==0x00) group.word 0x0E++0x01 line.word 0x00 "RYRCNT,Year Counter" bitfld.word 0x00 4.--7. " YR10 ,10-Year count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" bitfld.word 0x00 0.--3. " YR1 ,1-Year count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.word 0x0E++0x01 line.word 0x00 "RYRCNT,Year Counter" bitfld.word 0x00 4.--7. " YR10 ,10-Year count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" bitfld.word 0x00 0.--3. " YR1 ,1-Year count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif if (((per.b(ad:0x40044000+0x24))&0x80)==0x00) group.byte 0x10++0x00 line.byte 0x00 "RSECAR,Second Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--6. " SEC10 ,10-Second count" "0,1,2,3,4,5,," bitfld.byte 0x00 0.--3. " SEC1 ,1-Second count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" group.byte 0x12++0x00 line.byte 0x00 "RMINCNT,Minute Alarm register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--6. " MIN10 ,10-Minute count" "0,1,2,3,4,5,," bitfld.byte 0x00 0.--3. " MIN1 ,1-Minute count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" if (((per.b(ad:0x40044000+0x24))&0x40)==0x40) if (((per.b(ad:0x40044000+0x14))&0x30)<0x20) group.byte 0x14++0x00 line.byte 0x00 "RHRAR,Hour Alarm Register" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" elif (((per.b(ad:0x40044000+0x14))&0x30)==0x20) group.byte 0x14++0x00 line.byte 0x00 "RHRAR,Hour Alarm Register" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "0,1,2,3,-,-,-,-,-,-,-,-,-,-,-,-" else group.byte 0x14++0x00 line.byte 0x00 "RHRAR,Hour Alarm Register" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif else if (((per.b(ad:0x40044000+0x14))&0x30)<0x20) group.byte 0x14++0x00 line.byte 0x00 "RHRAR,Hour Alarm Register" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x14++0x00 line.byte 0x00 "RHRAR,Hour Alarm Register" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,Counting ten's position of hours" "0,1,-,-" bitfld.byte 0x00 0.--3. " HR1 ,Counting one's position of hours" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif endif group.byte 0x16++0x00 line.byte 0x00 "RWKAR,Day-of-Week Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " DAYW ,Day-of-Week setting" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,-" if ((((per.b(ad:0x40044000+0x1A))&0x1F)==0x4)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x6)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x9)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x11)) if (((per.b(ad:0x40044000+0x18))&0x30)<0x30) group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif elif ((((per.b(ad:0x40044000+0x1A))&0x1F)==0x1)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x3)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x5)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x7)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x8)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x10)||(((per.b(ad:0x40044000+0x1A))&0x1F)==0x12)) if (((per.b(ad:0x40044000+0x18))&0x30)<0x30) group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-" endif else if ((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x00||0x4||0x8||0x12||0x16||0x20||0x24||0x28)))||((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x32||0x36||0x40||0x44||0x48)))||((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x52||0x56||0x60||0x64||0x68||0x72||0x76||0x80)))||((((per.w(ad:0x40044000+0x0E))&0xFF)==(0x84||0x88||0x92||0x96))) group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,-" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x18++0x00 line.byte 0x00 "RDAYAR,Date Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4.--5. " DATE10 ,Counting ten's position of dates" "0,1,2,-" bitfld.byte 0x00 0.--3. " DATE1 ,Counting one's position of dates" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-" endif endif if (((per.b(ad:0x40044000+0x1A))&0x1F)==0x00) group.byte 0x1A++0x00 line.byte 0x00 "RMONAR,Month Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4. " MON10 ,Counting ten's position of months" "-,1" bitfld.byte 0x00 0.--3. " MON1 ,Counting one's position of months" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" elif (((per.b(ad:0x40044000+0x1A))&0x10)<0x10) group.byte 0x1A++0x00 line.byte 0x00 "RMONAR,Month Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4. " MON10 ,Counting ten's position of months" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,Counting one's position of months" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.byte 0x1A++0x00 line.byte 0x00 "RMONAR,Month Alarm Register" bitfld.byte 0x00 7. " ENB ,ENB" "Disabled,Enabled" bitfld.byte 0x00 4. " MON10 ,Counting ten's position of months" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,Counting one's position of months" "0,1,2,-,-,-,-,-,-,-,-,-,-,-,-,-" endif group.word 0x1C++0x01 line.word 0x00 "RYRAR,Year Alarm Register" bitfld.word 0x00 4.--7. " YR10 ,10-Year count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" bitfld.word 0x00 0.--3. " YR1 ,1-Year count" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" group.byte 0x1E++0x00 line.byte 0x00 "RYRAREN,Year Alarm Enable Register" bitfld.byte 0x00 7. " ENB ,Compare enable" "Disabled,Enabled" else group.byte 0x10++0x00 line.byte 0x00 "BCNT0AR,Binary Counter 0 Alarm Register" group.byte 0x12++0x00 line.byte 0x00 "BCNT1AR,Binary Counter 1 Alarm Register" group.byte 0x14++0x00 line.byte 0x00 "BCNT2AR,Binary Counter 2 Alarm Register" group.byte 0x16++0x00 line.byte 0x00 "BCNT3AR,Binary Counter 3 Alarm Register" group.byte 0x18++0x00 line.byte 0x00 "BCNT0AER,Binary Counter 0 Alarm Enable Register" group.byte 0x1A++0x00 line.byte 0x00 "BCNT1AER,Binary Counter 1 Alarm Enable Register" group.word 0x1C++0x01 line.word 0x00 "BCNT2AER,Binary Counter 2 Alarm Enable Register" hexmask.word.BYTE 0x00 0.--7. 1. " ENB[23:16] ,Binary counter alarm enable register" group.byte 0x1E++0x00 line.byte 0x00 "BCNT3AER,Binary Counter 3 Alarm Enable Register" endif if (((per.w(ad:0x40044000+0x28))&0x1)==0x1) group.byte 0x22++0x00 line.byte 0x00 "RCR1,RTC Control Register 1" bitfld.byte 0x00 4.--7. " PES ,Periodic interrupt select" ",,,,,,1/128,1/128,1/64,1/32,1/16,1/8,1/4,1/2,1,2" bitfld.byte 0x00 3. " RTCOS ,RTCOUT output select" "1Hz,64Hz" bitfld.byte 0x00 2. " PIE ,Periodic interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " CIE ,Carry interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " AIE ,Alarm interrupt enable" "Disabled,Enabled" else group.byte 0x22++0x00 line.byte 0x00 "RCR1,RTC Control Register 1" bitfld.byte 0x00 4.--7. " PES ,Periodic interrupt select" ",,,,,,1/256,1/128,1/64,1/32,1/16,1/8,1/4,1/2,1,2" bitfld.byte 0x00 3. " RTCOS ,RTCOUT output select" "1Hz,64Hz" bitfld.byte 0x00 2. " PIE ,Periodic interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " CIE ,Carry interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " AIE ,Alarm interrupt enable" "Disabled,Enabled" endif if (((per.b(ad:0x40044000+0x24))&0x80)==0x00) if (((per.w(ad:0x40044000+0x28))&0x1)==0x1) group.byte 0x24++0x00 line.byte 0x00 "RCR2,RTC Control Register 2" bitfld.byte 0x00 7. " CNTMD ,Count mode select" "Calendar,Binary" bitfld.byte 0x00 6. " HR24 , hours mode" "12,24" bitfld.byte 0x00 3. " RTCOE ,RTCOUT output enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " ADJ30 ,30-Second adjustment" "Not adjusting,Adjusting" bitfld.byte 0x00 1. " RESET ,RTC software reset" "No reset,Reset" bitfld.byte 0x00 0. " START ,Start" "Stopped,Operating normally" else group.byte 0x24++0x00 line.byte 0x00 "RCR2,RTC Control Register 2" bitfld.byte 0x00 7. " CNTMD ,Count mode select" "Calendar,Binary" bitfld.byte 0x00 6. " HR24 , hours mode" "12,24" bitfld.byte 0x00 5. " AADJP ,Automatic adjustment period select" "1min,10sec" bitfld.byte 0x00 4. " AADJE ,Automatic adjustment enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " RTCOE ,RTCOUT output enable" "Disabled,Enabled" bitfld.byte 0x00 2. " ADJ30 ,30-Second adjustment" "Not adjusting,Adjusting" bitfld.byte 0x00 1. " RESET ,RTC software reset" "No reset,Reset" bitfld.byte 0x00 0. " START ,Start" "Stopped,Operating normally" endif else if (((per.w(ad:0x40044000+0x28))&0x1)==0x1) group.byte 0x24++0x00 line.byte 0x00 "RCR2,RTC Control Register 2" bitfld.byte 0x00 7. " CNTMD ,Count mode select" "Calendar,Binary" bitfld.byte 0x00 3. " RTCOE ,RTCOUT output enable" "Disabled,Enabled" bitfld.byte 0x00 1. " RESET ,RTC software reset" "No reset,Reset" bitfld.byte 0x00 0. " START ,Start" "Stopped,Operating normally" else group.byte 0x24++0x00 line.byte 0x00 "RCR2,RTC Control Register 2" bitfld.byte 0x00 7. " CNTMD ,Count mode select" "Calendar,Binary" bitfld.byte 0x00 5. " AADJP ,Automatic adjustment period select" "1min,10sec" bitfld.byte 0x00 4. " AADJE ,Automatic adjustment enable" "Disabled,Enabled" bitfld.byte 0x00 3. " RTCOE ,RTCOUT output enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " RESET ,RTC software reset" "No reset,Reset" bitfld.byte 0x00 0. " START ,Start" "Stopped,Operating normally" endif endif group.byte 0x28++0x00 line.byte 0x00 "RCR4,RTC Control Register 4" bitfld.byte 0x00 0. " RCKSEL ,Count source select" "Sub-clock,LOCO" group.word 0x2C++0x01 line.word 0x00 "RFRL,Frequency Register" group.byte 0x2E++0x00 line.byte 0x00 "RADJ,Time Error Adjustment Register" bitfld.byte 0x00 6.--7. " PMADJ ,Plus-Minus" "Not performed,Addition to prescaler,Subtraction from prescaler,?..." bitfld.byte 0x00 0.--5. " ADJ ,Adjustment value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x40++0x00 line.byte 0x00 "RTCCR0,Time Capture Control Register 0" bitfld.byte 0x00 4.--5. " TCNF ,Time capture noise filter control" "Off,,/1,/32" bitfld.byte 0x00 2. " TCST ,Time capture status" "Not detected,Detected" bitfld.byte 0x00 0.--1. " TCCT ,Time capture control" "No event,Rising,Falling,Both" group.byte 0x42++0x00 line.byte 0x00 "RTCCR1,Time Capture Control Register 1" bitfld.byte 0x00 4.--5. " TCNF ,Time capture noise filter control" "Off,,/1,/32" bitfld.byte 0x00 2. " TCST ,Time capture status" "Not detected,Detected" bitfld.byte 0x00 0.--1. " TCCT ,Time capture control" "No event,Rising,Falling,Both" group.byte 0x44++0x00 line.byte 0x00 "RTCCR2,Time Capture Control Register 2" bitfld.byte 0x00 4.--5. " TCNF ,Time capture noise filter control" "Off,,/1,/32" bitfld.byte 0x00 2. " TCST ,Time capture status" "Not detected,Detected" bitfld.byte 0x00 0.--1. " TCCT ,Time capture control" "No event,Rising,Falling,Both" if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x52++0x00 line.byte 0x00 "RSECCP0,Second Capture Register 0" bitfld.byte 0x00 4.--6. " SEC10 ,10-Second capture" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SEC1 ,1-Second capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x52++0x00 line.byte 0x00 "BCNT0CP0,BCNT0 Capture Register 0" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x62++0x00 line.byte 0x00 "RSECCP1,Second Capture Register 1" bitfld.byte 0x00 4.--6. " SEC10 ,10-Second capture" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SEC1 ,1-Second capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x62++0x00 line.byte 0x00 "BCNT0CP1,BCNT0 Capture Register 1" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x72++0x00 line.byte 0x00 "RSECCP2,Second Capture Register 2" bitfld.byte 0x00 4.--6. " SEC10 ,10-Second capture" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SEC1 ,1-Second capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x72++0x00 line.byte 0x00 "BCNT0CP2,BCNT0 Capture Register 2" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x54++0x00 line.byte 0x00 "RMINCP0,Minute Capture Register 0" bitfld.byte 0x00 4.--6. " MIN10 ,10-Minute capture" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MIN1 ,1-Minute capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x54++0x00 line.byte 0x00 "BCNT1CP0,BCNT1 Capture Register 0" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x64++0x00 line.byte 0x00 "RMINCP1,Minute Capture Register 1" bitfld.byte 0x00 4.--6. " MIN10 ,10-Minute capture" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MIN1 ,1-Minute capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x64++0x00 line.byte 0x00 "BCNT1CP1,BCNT1 Capture Register 1" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x74++0x00 line.byte 0x00 "RMINCP2,Minute Capture Register 2" bitfld.byte 0x00 4.--6. " MIN10 ,10-Minute capture" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MIN1 ,1-Minute capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x74++0x00 line.byte 0x00 "BCNT1CP2,BCNT1 Capture Register 2" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x56++0x00 line.byte 0x00 "RHRCP0,Hour Capture Register 0" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,10-Hour capture" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,1-Hour capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x56++0x00 line.byte 0x00 "BCNT2CP0,BCNT2 Capture Register 0" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x66++0x00 line.byte 0x00 "RHRCP1,Hour Capture Register 1" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,10-Hour capture" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,1-Hour capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x66++0x00 line.byte 0x00 "BCNT2CP1,BCNT2 Capture Register 1" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x76++0x00 line.byte 0x00 "RHRCP2,Hour Capture Register 2" bitfld.byte 0x00 6. " PM ,PM" "AM,PM" bitfld.byte 0x00 4.--5. " HR10 ,10-Hour capture" "0,1,2,-" bitfld.byte 0x00 0.--3. " HR1 ,1-Hour capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x76++0x00 line.byte 0x00 "BCNT2CP2,BCNT2 Capture Register 2" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x5A++0x00 line.byte 0x00 "RDAYCP0,Date Capture Register 0" bitfld.byte 0x00 4.--5. " DATE10 ,10-Day capture" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,1-Day capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x5A++0x00 line.byte 0x00 "BCNT3CP0,BCNT3 Capture Register 0" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x6A++0x00 line.byte 0x00 "RDAYCP1,Date Capture Register 1" bitfld.byte 0x00 4.--5. " DATE10 ,10-Day capture" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,1-Day capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x6A++0x00 line.byte 0x00 "BCNT3CP1,BCNT3 Capture Register 1" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x7A++0x00 line.byte 0x00 "RDAYCP2,Date Capture Register 2" bitfld.byte 0x00 4.--5. " DATE10 ,10-Day capture" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATE1 ,1-Day capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.byte 0x7A++0x00 line.byte 0x00 "BCNT3CP2,BCNT3 Capture Register 2" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x5C++0x00 line.byte 0x00 "RMONCP0,Month Capture Register 0" bitfld.byte 0x00 4. " MON10 ,10-Month capture" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,1-Month capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else hgroup.byte 0x5C++0x00 hide.byte 0x00 "RMONCP0,Month Capture Register 0" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x6C++0x00 line.byte 0x00 "RMONCP1,Month Capture Register 1" bitfld.byte 0x00 4. " MON10 ,10-Month capture" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,1-Month capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else hgroup.byte 0x6C++0x00 hide.byte 0x00 "RMONCP1,Month Capture Register 1" endif if (((per.b(ad:0x40044000))&0x80)==0x00) rgroup.byte 0x7C++0x00 line.byte 0x00 "RMONCP2,Month Capture Register 2" bitfld.byte 0x00 4. " MON10 ,10-Month capture" "0,1" bitfld.byte 0x00 0.--3. " MON1 ,1-Month capture" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else hgroup.byte 0x7C++0x00 hide.byte 0x00 "RMONCP2,Month Capture Register 2" endif width 0x0B tree.end tree "WDT (Watchdog Timer)" base ad:0x40044200 width 10. group.byte 0x00++0x00 line.byte 0x0 "WDTRR,WDT Refresh Register" group.word 0x02++0x03 line.word 0x0 "WDTCR,WDT Control Register" bitfld.word 0x0 12.--13. " RPSS ,Window start position select" "25%,50%,75%,100%" bitfld.word 0x0 8.--9. " RPES ,Window end position select" "75%,50%,25%,0%" newline bitfld.word 0x0 4.--7. " CKS ,Clock division ratio select" ",PCLK/4,,,PCLK/64,,PCLK/512,PCLK/2048,PCLK/8192,,,,,,,PCLK/128" bitfld.word 0x0 0.--1. " TOPS ,Timeout period select" "1024 cycles,4096 cycles,8192 cycles,16384 cycles" line.word 0x2 "WDTSR,WDT Status Register" bitfld.word 0x2 15. " REFEF ,Refresh error flag" "No refresh,Refresh" bitfld.word 0x2 14. " UNDFF ,Underflow flag" "No underflow,Underflow" newline hexmask.word 0x2 0.--13. 1. " CNTVAL ,Down-Counter value" group.byte 0x06++0x00 line.byte 0x0 "WDTRCR,WDT Reset Control Register" bitfld.byte 0x0 7. " RSTIRQS ,Reset interrupt request selection" "Interrupt,Reset" group.byte 0x08++0x00 line.byte 0x0 "WDTCSTPR,WDT Count Stop Control Register" bitfld.byte 0x0 7. " SLCSTP ,Sleep-Mode count stop control" "Disabled,Stopped" width 0x0B tree.end tree "IWDT (Independent Watchdog Timer)" base ad:0x40044400 width 8. group.byte 0x00++0x00 line.byte 0x00 "IWDTRR,IWDT Refresh Register" group.word 0x04++0x01 line.word 0x00 "IWDTSR,IWDT Status Register" bitfld.word 0x00 15. " REFEF ,Refresh error flag" "Not occurred,Occurred" bitfld.word 0x00 14. " UNDFF ,Underflow flag" "Not occurred,Occurred" hexmask.word 0x00 0.--13. 1. " CNTVAL ,Counter value" width 0x0B tree.end tree "ETHERC (Ethernet MAC Controller)" base ad:0x40064100 width 10. group.long 0x00++0x03 line.long 0x00 "ECMR,ETHERC Mode Register" bitfld.long 0x00 20. " TPC ,PAUSE frame transmit" "Transmit,Do not transmit" bitfld.long 0x00 19. " ZPF ,0 time PAUSE frame enable" "Disabled,Enabled" newline bitfld.long 0x00 18. " PFR ,PAUSE frame receive mode" "Not transferred,Transferred" bitfld.long 0x00 17. " RXF ,Receive flow control operating mode (PAUSE frame detection enable)" "Disabled,Enabled" newline bitfld.long 0x00 16. " TXF ,Transmit flow control operating mode (automatic PAUSE frame transmission enable)" "Disabled,Enabled" bitfld.long 0x00 12. " PRCEF ,CRC error frame receive mode (EDMAC error notification)" "Notified,Not notified" newline bitfld.long 0x00 9. " MPDE ,Magic packet detection enable" "Disabled,Enabled" bitfld.long 0x00 6. " RE ,Reception enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " TE ,Transmission enable" "Disabled,Enabled" bitfld.long 0x00 3. " ILB ,Internal loopback mode" "Normal,Loopback" newline bitfld.long 0x00 2. " RTM ,Bit rate" "10 Mbps,100 Mbps" bitfld.long 0x00 1. " DM ,Duplex mode" "Half-duplex,Full-duplex" newline bitfld.long 0x00 0. " PRM ,Promiscuous mode" "Disabled,Enabled" group.long 0x08++0x03 line.long 0x00 "RFLR,Receive Frame Maximum Length Register" hexmask.long.word 0x00 0.--11. 1. " RFL ,Receive frame maximum length" group.long 0x10++0x03 line.long 0x00 "ECSR,ETHERC Status Register" eventfld.long 0x00 5. " BFR ,Continuous broadcast frame reception flag" "Not detected,Detected" eventfld.long 0x00 4. " PSRTO ,PAUSE frame retransmit over flag" "No overflow,Overflow" newline eventfld.long 0x00 2. " LCHNG ,Link signal change flag" "Not detected,Detected" eventfld.long 0x00 1. " MPD ,Magic packet detect flag" "Not detected,Detected" newline eventfld.long 0x00 0. " ICD ,False carrier detect flag" "Not detected,Detected" group.long 0x18++0x03 line.long 0x00 "ECSIPR,ETHERC Interrupt Enable Register" bitfld.long 0x00 5. " BFSIPR ,Continuous broadcast frame reception interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " PSRTOIP ,PAUSE frame retransmit over interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " LCHNGIP ,LINK signal change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " MPDIP ,Magic packet detect interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " ICDIP ,False carrier detect interrupt enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "PIR,PHY Interface Register" bitfld.long 0x00 3. " MDI ,MII/RMII management Data-In" "0,1" bitfld.long 0x00 2. " MDO ,MII/RMII management Data-Out" "0,1" newline bitfld.long 0x00 1. " MMD ,MII/RMII management mode" "Read,Write" bitfld.long 0x00 0. " MDC ,MII/RMII management data clock" "0,1" rgroup.long 0x28++0x03 line.long 0x00 "PSR,PHY Status Register" bitfld.long 0x00 0. " LMON ,ETn_LINKSTA pin status flag" "0,1" group.long 0x40++0x03 line.long 0x00 "RDMLR,Random Number Generation Counter Upper Limit Setting Register" hexmask.long.tbyte 0x00 0.--19. 1. " RMD ,Random number generation counter" group.long 0x50++0x0B line.long 0x00 "IPGR,Interpacket Gap Register" bitfld.long 0x00 0.--4. " IPG ,Interpacket gap" "16 bit,20 bit,24 bit,28 bit,32 bit,36 bit,40 bit,44 bit,48 bit,52 bit,56 bit,60 bit,64 bit,68 bit,72 bit,76 bit,80 bit,84 bit,88 bit,92 bit,96 bit,100 bit,104 bit,108 bit,112 bit,116 bit,120 bit,124 bit,128 bit,132 bit,136 bit,140 bit" line.long 0x04 "APR,Automatic PAUSE Frame Register" hexmask.long.word 0x04 0.--15. 1. " AP ,Automatic PAUSE time setting" line.long 0x08 "MPR,Manual PAUSE Frame Register" hexmask.long.word 0x08 0.--15. 1. " MP ,Manual PAUSE time setting" rgroup.long 0x60++0x03 line.long 0x00 "RFCF,Received PAUSE Frame Counter" hexmask.long.byte 0x00 0.--7. 1. " RPAUSE ,Received PAUSE frame count" group.long 0x64++0x03 line.long 0x00 "TPAUSER,PAUSE Frame Retransmit Count Setting Register" hexmask.long.word 0x00 0.--15. 1. " TPAUSE ,Automatic PAUSE frame retransmit setting" rgroup.long 0x68++0x03 line.long 0x00 "TPAUSECR,PAUSE Frame Retransmit Counter" hexmask.long.byte 0x00 0.--7. 1. " TXP ,PAUSE frame retransmit count" group.long 0x6C++0x03 line.long 0x00 "BCFRR,Broadcast Frame Receive Count Setting Register" hexmask.long.word 0x00 0.--15. 1. " BCF ,Broadcast frame continuous receive count setting" group.long 0xC0++0x03 line.long 0x00 "MAHR,MAC Address Upper Bit Register" group.long 0xC8++0x03 line.long 0x00 "MALR,MAC Address Lower Bit Register" hexmask.long.word 0x00 0.--15. 1. " MALR ,Lower 16 bits of the MAC address" group.long 0xD0++0x0F line.long 0x00 "TROCR,Transmit Retry Over Counter Register" line.long 0x04 "CDCR,Late Collision Detect Counter Register" line.long 0x08 "LCCR,Lost Carrier Counter Register" line.long 0x0C "CNDCR,Carrier Not Detect Counter Register" group.long 0xE4++0x17 line.long 0x00 "CEFCR,CRC Error Frame Receive Counter Register" line.long 0x04 "FRECR,Frame Receive Error Counter Register" line.long 0x08 "TSFRCR,Too-Short Frame Receive Counter Register" line.long 0x0C "TLFRCR,Too-Long Frame Receive Counter Register" line.long 0x10 "RFCR,Received Alignment Error Frame Counter Register" line.long 0x14 "MAFCR,Multicast Address Frame Receive Counter Register" newline sif cpuis("R7FS5D5*") width 10. base ad:0x40064500 group.long 0x00++0x03 line.long 0x00 "PTRSTR,Reset Register" bitfld.long 0x00 0. " RESET ,MAC filter software reset" "No reset,Reset" base ad:0x40065810 group.long 0x00++0x07 line.long 0x00 "SYMACRU,MAC Address Registers" hexmask.long.tbyte 0x00 0.--23. 0x01 " MAC ,Local MAC address" line.long 0x04 "SYMACRL,MAC Address Registers" hexmask.long.tbyte 0x00 0.--23. 0x01 " MAC ,Local MAC address" base ad:0x40065940 if (((per.l(ad:0x40065940))&0x10000)==0x10000) group.long 0x00++0x03 line.long 0x00 "FFLTR,Frame Reception Filter Setting Register" bitfld.long 0x00 16. " EXTPRM ,Extended promiscuous mode setting" "Normal,Extended" rbitfld.long 0x00 0.--2. " SEL/PRT/ENB ,Reception filter setting" "Disable filtering,Disable filtering,Disable filtering,Disable filtering,No received,No received,FMAC0RU and FMAC0RL,FMAC1RU and FMAC1RL" else group.long 0x00++0x03 line.long 0x00 "FFLTR,Frame Reception Filter Setting Register" bitfld.long 0x00 16. " EXTPRM ,Extended promiscuous mode setting" "Normal,Extended" bitfld.long 0x00 0.--2. " SEL/PRT/ENB ,Reception filter setting" "Disable filtering,Disable filtering,Disable filtering,Disable filtering,No received,No received,FMAC0RU and FMAC0RL,FMAC1RU and FMAC1RL" endif group.long 0x20++0x0F line.long 0x00 "FMAC0RU,Frame Reception Filter MAC Address 0 Setting Registers U" hexmask.long.tbyte 0x00 0.--23. 0x01 " MAC ,Frame reception filter MAC address" line.long 0x04 "FMAC0RL,Frame Reception Filter MAC Address 0 Setting Registers L" hexmask.long.tbyte 0x00 0.--23. 0x01 " MAC ,Frame reception filter MAC address" line.long 0x08 "FMAC1RU,Frame Reception Filter MAC Address 1 Setting Registers U" hexmask.long.tbyte 0x00 0.--23. 0x01 " MAC ,Frame reception filter MAC address" line.long 0x0C "FMAC1RL,Frame Reception Filter MAC Address 1 Setting Registers L" hexmask.long.tbyte 0x00 0.--23. 0x01 " MAC ,Frame reception filter MAC address" width 0x0B endif width 0x0B tree.end sif cpuis("R7FS5D9*") tree "EPTPC (Ethernet PTP Controller)" base ad:0x40065000 width 11. group.long 0x00++0x07 line.long 0x00 "MIESR,ETHER_MINT Interrupt Source Status Register" eventfld.long 0x00 21. " CYC5 ,Pulse output timer 5 rising edge detection flag" "Not detected,Detected" eventfld.long 0x00 20. " CYC4 ,Pulse output timer 4 rising edge detection flag" "Not detected,Detected" newline eventfld.long 0x00 19. " CYC3 ,Pulse output timer 3 rising edge detection flag" "Not detected,Detected" eventfld.long 0x00 18. " CYC2 ,Pulse output timer 2 rising edge detection flag" "Not detected,Detected" newline eventfld.long 0x00 17. " CYC1 ,Pulse output timer 1 rising edge detection flag" "Not detected,Detected" eventfld.long 0x00 16. " CYC0 ,Pulse output timer 0 rising edge detection flag" "Not detected,Detected" sif !cpuis("R7FS5D9*") newline rbitfld.long 0x00 3. " PRC ,PRC-TC status flag" "Not changed,Changed" rbitfld.long 0x00 2. " SY1 ,SYNFP1 status flag" "Not changed,Changed" endif newline rbitfld.long 0x00 1. " SY0 ,SYNFP0 status flag" "Not changed,Changed" rbitfld.long 0x00 0. " ST ,STCA status flag" "Not changed,Changed" line.long 0x04 "MIEIPR,ETHER_MINT Interrupt Request Enable Register" bitfld.long 0x04 21. " CYC5 ,Pulse output timer 5 rising edge detection interrupt request enable" "Disabled,Enabled" bitfld.long 0x04 20. " CYC4 ,Pulse output timer 4 rising edge detection interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x04 19. " CYC3 ,Pulse output timer 3 rising edge detection interrupt request enable" "Disabled,Enabled" bitfld.long 0x04 18. " CYC2 ,Pulse output timer 2 rising edge detection interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x04 17. " CYC1 ,Pulse output timer 1 rising edge detection interrupt request enable" "Disabled,Enabled" bitfld.long 0x04 16. " CYC0 ,Pulse output timer 0 rising edge detection interrupt request enable" "Disabled,Enabled" sif !cpuis("R7FS5D9*") newline rbitfld.long 0x04 3. " PRC ,PRC-TC status interrupt request enable" "Disabled,Enabled" rbitfld.long 0x04 2. " SY1 ,SYNFP1 status interrupt request enable" "Disabled,Enabled" endif newline rbitfld.long 0x04 1. " SY0 ,SYNFP0 status interrupt request enable" "Disabled,Enabled" rbitfld.long 0x04 0. " ST ,STCA status interrupt request enable" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "ELIPPR,ELC Output/ETHER_IPLS Interrupt Request Permission Register" bitfld.long 0x00 24. " PLSN ,Pulse output timer falling edge detection ETHER_IPLS interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 16. " PLSP ,Pulse output timer rising edge detection ETHER_IPLS interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 13. " CYCN5 ,Pulse output timer 5 falling edge detection event output enable" "Disabled,Enabled" bitfld.long 0x00 12. " CYCN4 ,Pulse output timer 4 falling edge detection event output enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " CYCN3 ,Pulse output timer 3 falling edge detection event output enable" "Disabled,Enabled" bitfld.long 0x00 10. " CYCN2 ,Pulse output timer 2 falling edge detection event output enable" "Disabled,Enabled" newline bitfld.long 0x00 9. " CYCN1 ,Pulse output timer 1 falling edge detection event output enable" "Disabled,Enabled" bitfld.long 0x00 8. " CYCN0 ,Pulse output timer 0 falling edge detection event output enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " CYCP5 ,Pulse output timer 5 rising edge detection event output enable" "Disabled,Enabled" bitfld.long 0x00 4. " CYCP4 ,Pulse output timer 4 rising edge detection event output enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " CYCP3 ,Pulse output timer 3 rising edge detection event output enable" "Disabled,Enabled" bitfld.long 0x00 2. " CYCP2 ,Pulse output timer 2 rising edge detection event output enable" "Disabled,Enabled" newline bitfld.long 0x00 1. " CYCP1 ,Pulse output timer 1 rising edge detection event output enable" "Disabled,Enabled" bitfld.long 0x00 0. " CYCP0 ,Pulse output timer 0 rising edge detection event output enable" "Disabled,Enabled" line.long 0x04 "ELIPACR,ELC Output/ETHER_IPLS Interrupt Permission Automatic Clearing Register" bitfld.long 0x04 24. " PLSN ,ELIPPR.PLSN bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 16. " PLSP ,ELIPPR.PLSP bit automatic clearing" "Disabled,Enabled" newline bitfld.long 0x04 13. " CYCN5 ,ELIPPR.CYCN5 bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 12. " CYCN4 ,ELIPPR.CYCN4 bit automatic clearing" "Disabled,Enabled" newline bitfld.long 0x04 11. " CYCN3 ,ELIPPR.CYCN3 bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 10. " CYCN2 ,ELIPPR.CYCN2 bit automatic clearing" "Disabled,Enabled" newline bitfld.long 0x04 9. " CYCN1 ,ELIPPR.CYCN1 bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 8. " CYCN0 ,ELIPPR.CYCN1 bit automatic clearing" "Disabled,Enabled" newline bitfld.long 0x04 5. " CYCP5 ,ELIPPR.CYCP5 bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 4. " CYCP4 ,ELIPPR.CYCP4 bit automatic clearing" "Disabled,Enabled" newline bitfld.long 0x04 3. " CYCP3 ,ELIPPR.CYCP3 bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 2. " CYCP2 ,ELIPPR.CYCP2 bit automatic clearing" "Disabled,Enabled" newline bitfld.long 0x04 1. " CYCP1 ,ELIPPR.CYCP1 bit automatic clearing" "Disabled,Enabled" bitfld.long 0x04 0. " CYCP0 ,ELIPPR.CYCP0 bit automatic clearing" "Disabled,Enabled" group.long 0x40++0x07 line.long 0x00 "STSR,STCA Status Register" bitfld.long 0x00 4. " W10S ,Worst 10 acquisition completion flag" "Not acquired,Acquired" bitfld.long 0x00 3. " SYNTOUT ,Sync message reception timeout detection flag" "Not detected,Detected" newline bitfld.long 0x00 1. " SYNCOUT ,Synchronization loss detection flag" "Not detected,Detected" bitfld.long 0x00 0. " SYNC ,Synchronized state detection flag" "Not detected,Detected" line.long 0x04 "STIPR,STCA Status Notification Enable Register" bitfld.long 0x04 4. " W10S ,W10D status notification enable" "Disabled,Enabled" bitfld.long 0x04 3. " SYNTOUT ,SYNTOUT status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 1. " SYNCOUT ,SYNCOUT status notification enable" "Disabled,Enabled" bitfld.long 0x04 0. " SYNC ,SYNC status notification enable" "Disabled,Enabled" group.long 0x50++0x0B line.long 0x00 "STCFR,STCA Clock Frequency Setting Register" bitfld.long 0x00 0.--1. " STCF ,STCA clock frequency" "20MHz,25MHz,50MHz,100MHz" line.long 0x04 "STMR,STCA Operating Mode Register" bitfld.long 0x04 29. " ALEN1 ,Alarm detection enable 1" "Disabled,Enabled" bitfld.long 0x04 28. " ALEN0 ,Alarm detection enable 0" "Disabled,Enabled" newline bitfld.long 0x04 20.--23. " DVTH ,Synchronization loss detection threshold setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " SYTH ,Synchronized state detection threshold setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 15. " W10S ,Worst 10 acquisition control select" "Hardware,Software" bitfld.long 0x04 13. " CMOD ,Time synchronization correction mode" "Mode 1,Mode 2" newline hexmask.long.byte 0x04 0.--7. 1. " WINT ,Worst 10 acquisition time" line.long 0x08 "SYNTOR,Sync Message Reception Timeout Register" group.long 0x60++0x0F line.long 0x00 "IPTSELR,ETHER_IPLS Interrupt Request Timer Select Register" bitfld.long 0x00 5. " IPTSEL5 ,Pulse output timer 5 select" "Not selected,Selected" bitfld.long 0x00 4. " IPTSEL4 ,Pulse output timer 4 select" "Not selected,Selected" newline bitfld.long 0x00 3. " IPTSEL3 ,Pulse output timer 3 select" "Not selected,Selected" bitfld.long 0x00 2. " IPTSEL2 ,Pulse output timer 2 select" "Not selected,Selected" newline bitfld.long 0x00 1. " IPTSEL1 ,Pulse output timer 1 select" "Not selected,Selected" bitfld.long 0x00 0. " IPTSEL0 ,Pulse output timer 0 select" "Not selected,Selected" line.long 0x04 "MITSELR,ETHER_MINT Interrupt Request Timer Select Register" bitfld.long 0x04 5. " MINTEN5 ,Pulse output timer 5 ETHER_MINT interrupt output enable" "Disabled,Enabled" bitfld.long 0x04 4. " MINTEN4 ,Pulse output timer 4 ETHER_MINT interrupt output enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " MINTEN3 ,Pulse output timer 3 ETHER_MINT interrupt output enable" "Disabled,Enabled" bitfld.long 0x04 2. " MINTEN2 ,Pulse output timer 2 ETHER_MINT interrupt output enable" "Disabled,Enabled" newline bitfld.long 0x04 1. " MINTEN1 ,Pulse output timer 1 ETHER_MINT interrupt output enable" "Disabled,Enabled" bitfld.long 0x04 0. " MINTEN0 ,Pulse output timer 0 ETHER_MINT interrupt output enable" "Disabled,Enabled" line.long 0x08 "ELTSELR,ELC Output Timer Select Register" bitfld.long 0x08 5. " ELTDIS5 ,Pulse output timer 5 event generation disable" "No,Yes" bitfld.long 0x08 4. " ELTDIS4 ,Pulse output timer 4 event generation disable" "No,Yes" newline bitfld.long 0x08 3. " ELTDIS3 ,Pulse output timer 3 event generation disable" "No,Yes" bitfld.long 0x08 2. " ELTDIS2 ,Pulse output timer 2 event generation disable" "No,Yes" newline bitfld.long 0x08 1. " ELTDIS1 ,Pulse output timer 1 event generation disable" "No,Yes" bitfld.long 0x08 0. " ELTDIS0 ,Pulse output timer 0 event generation disable" "No,Yes" line.long 0x0C "STCHSELR,Time Synchronization Channel Select Register" bitfld.long 0x0C 0. " SYSEL ,Timer information input select" "SYNFP0,?..." group.long 0x80++0x03 line.long 0x00 "SYNSTARTR,Slave Time Synchronization Start Register" bitfld.long 0x00 0. " STR ,Slave time synchronization control" "Stopped,Started" wgroup.long 0x84++0x03 line.long 0x00 "LCIVLDR,Local Clock Counter Initial Value Load Directive Register" bitfld.long 0x00 0. " LOAD ,Local clock counter initial value load directive" "Do not load,Load" group.long 0x90++0x0F line.long 0x00 "SYNTDARU,Synchronization Loss Detection Threshold Register (Upper)" line.long 0x04 "SYNTDARL,Synchronization Loss Detection Threshold Register (Lower)" line.long 0x08 "SYNTDBRU,Synchronization Detection Threshold Register (Upper)" line.long 0x0C "SYNTDBRL,Synchronization Detection Threshold Register (Lower)" group.long 0xB0++0x0B line.long 0x00 "LCIVRU,Local Clock Counter Initial Value Register (Upper)" hexmask.long.word 0x00 0.--15. 1. " LCIVRU ,Upper-order 16 bits of the integer portion of the initial value for the local clock counter" line.long 0x04 "LCIVRM,Local Clock Counter Initial Value Register (Middle)" line.long 0x08 "LCIVRL,Local Clock Counter Initial Value Register (Lower)" if (((per.l(ad:0x40065000+0x50))&0x8000)==0x0000) group.long 0x124++0x03 line.long 0x00 "GETW10R,Worst 10 Acquisition Directive Register" bitfld.long 0x00 0. " GW10 ,Worst 10 acquisition directive" "Not started,?..." else group.long 0x124++0x03 line.long 0x00 "GETW10R,Worst 10 Acquisition Directive Register" bitfld.long 0x00 0. " GW10 ,Worst 10 acquisition directive" "Not started,Started" endif group.long 0x128++0x1B line.long 0x00 "PLIMITRU,Positive Gradient Limit Register (Upper)" hexmask.long 0x00 0.--30. 1. " PLIMITRU ,Upper-order 31 bits of the limit for the positive gradient" line.long 0x04 "PLIMITRM,Positive Gradient Limit Register (Middle)" line.long 0x08 "PLIMITRL,Positive Gradient Limit Register(Lower)" line.long 0x0C "MLIMITRU,Negative Gradient Limit Register (Upper)" hexmask.long 0x0C 0.--30. 1. " MLIMITRU ,Upper-order 31 bits of the limit for the negative gradient" line.long 0x10 "MLIMITRM,Negative Gradient Limit Register (Middle)" line.long 0x14 "MLIMITRL,Negative Gradient Limit Register (Lower)" line.long 0x18 "GETINFOR,Statistical Information Retention Control Register" bitfld.long 0x18 0. " INFO ,Information retention control [read/write]" "Completed/No effect,In progress/Retained" rgroup.long 0x170++0x0B line.long 0x00 "LCCVRU,Local Clock Counter (Upper)" hexmask.long.word 0x00 0.--15. 1. " LCCVRU ,Upper-order 16 bits of the integer portion of the value of the local clock counter" line.long 0x04 "LCCVRM,Local Clock Counter (Middle)" line.long 0x08 "LCCVRL,Local Clock Counter (Lower)" rgroup.long 0x210++0x0B line.long 0x00 "PW10VRU,Positive Gradient Worst 10 Value Register (Upper)" line.long 0x04 "PW10VRM,Positive Gradient Worst 10 Value Register (Middle)" line.long 0x08 "PW10VRL,Positive Gradient Worst 10 Value Register (Lower)" rgroup.long 0x2D0++0x0B line.long 0x00 "MW10RU,Negative Gradient Worst 10 Value Register (Upper)" line.long 0x04 "MW10RM,Negative Gradient Worst 10 Value Register (Middle)" line.long 0x08 "MW10RL,Negative Gradient Worst 10 Value Register (Lower)" group.long (0x300)++0x07 line.long 0x00 "TMSTTRU0,Timer Start Time Setting Register 0 (Upper)" line.long 0x04 "TMSTTRL0,Timer Start Time Setting Register 0 (Lower)" group.long (0x300+0x08)++0x03 line.long 0x00 "TMCYCR0,Timer Cycle Setting Registers 0" hexmask.long 0x00 0.--29. 1. " TMCYCR0 ,Cycle of the pulse output timer in nanoseconds" group.long (0x300+0x0C)++0x03 line.long 0x00 "TMPLSR0,Timer Pulse Width Setting Register 0" hexmask.long 0x00 0.--28. 1. " TMPLSR0 ,Width of the high level of the pulse signal from the timer in nanoseconds" group.long (0x310)++0x07 line.long 0x00 "TMSTTRU1,Timer Start Time Setting Register 1 (Upper)" line.long 0x04 "TMSTTRL1,Timer Start Time Setting Register 1 (Lower)" group.long (0x310+0x08)++0x03 line.long 0x00 "TMCYCR1,Timer Cycle Setting Registers 1" hexmask.long 0x00 0.--29. 1. " TMCYCR1 ,Cycle of the pulse output timer in nanoseconds" group.long (0x310+0x0C)++0x03 line.long 0x00 "TMPLSR1,Timer Pulse Width Setting Register 1" hexmask.long 0x00 0.--28. 1. " TMPLSR1 ,Width of the high level of the pulse signal from the timer in nanoseconds" group.long (0x320)++0x07 line.long 0x00 "TMSTTRU2,Timer Start Time Setting Register 2 (Upper)" line.long 0x04 "TMSTTRL2,Timer Start Time Setting Register 2 (Lower)" group.long (0x320+0x08)++0x03 line.long 0x00 "TMCYCR2,Timer Cycle Setting Registers 2" hexmask.long 0x00 0.--29. 1. " TMCYCR2 ,Cycle of the pulse output timer in nanoseconds" group.long (0x320+0x0C)++0x03 line.long 0x00 "TMPLSR2,Timer Pulse Width Setting Register 2" hexmask.long 0x00 0.--28. 1. " TMPLSR2 ,Width of the high level of the pulse signal from the timer in nanoseconds" group.long (0x330)++0x07 line.long 0x00 "TMSTTRU3,Timer Start Time Setting Register 3 (Upper)" line.long 0x04 "TMSTTRL3,Timer Start Time Setting Register 3 (Lower)" group.long (0x330+0x08)++0x03 line.long 0x00 "TMCYCR3,Timer Cycle Setting Registers 3" hexmask.long 0x00 0.--29. 1. " TMCYCR3 ,Cycle of the pulse output timer in nanoseconds" group.long (0x330+0x0C)++0x03 line.long 0x00 "TMPLSR3,Timer Pulse Width Setting Register 3" hexmask.long 0x00 0.--28. 1. " TMPLSR3 ,Width of the high level of the pulse signal from the timer in nanoseconds" group.long (0x340)++0x07 line.long 0x00 "TMSTTRU4,Timer Start Time Setting Register 4 (Upper)" line.long 0x04 "TMSTTRL4,Timer Start Time Setting Register 4 (Lower)" group.long (0x340+0x08)++0x03 line.long 0x00 "TMCYCR4,Timer Cycle Setting Registers 4" hexmask.long 0x00 0.--29. 1. " TMCYCR4 ,Cycle of the pulse output timer in nanoseconds" group.long (0x340+0x0C)++0x03 line.long 0x00 "TMPLSR4,Timer Pulse Width Setting Register 4" hexmask.long 0x00 0.--28. 1. " TMPLSR4 ,Width of the high level of the pulse signal from the timer in nanoseconds" group.long (0x350)++0x07 line.long 0x00 "TMSTTRU5,Timer Start Time Setting Register 5 (Upper)" line.long 0x04 "TMSTTRL5,Timer Start Time Setting Register 5 (Lower)" group.long (0x350+0x08)++0x03 line.long 0x00 "TMCYCR5,Timer Cycle Setting Registers 5" hexmask.long 0x00 0.--29. 1. " TMCYCR5 ,Cycle of the pulse output timer in nanoseconds" group.long (0x350+0x0C)++0x03 line.long 0x00 "TMPLSR5,Timer Pulse Width Setting Register 5" hexmask.long 0x00 0.--28. 1. " TMPLSR5 ,Width of the high level of the pulse signal from the timer in nanoseconds" group.long 0x37C++0x03 line.long 0x00 "TMSTARTR,Timer Start Register" bitfld.long 0x00 5. " EN5 ,Pulse output timer 5 start" "Stopped,Started" bitfld.long 0x00 4. " EN4 ,Pulse output timer 4 start" "Stopped,Started" newline bitfld.long 0x00 3. " EN3 ,Pulse output timer 3 start" "Stopped,Started" bitfld.long 0x00 2. " EN2 ,Pulse output timer 2 start" "Stopped,Started" newline bitfld.long 0x00 1. " EN1 ,Pulse output timer 1 start" "Stopped,Started" bitfld.long 0x00 0. " EN0 ,Pulse output timer 0 start" "Stopped,Started" sif !cpuis("R7FS5D9*") group.long 0x400++0x07 line.long 0x00 "PRSR,PRC-TC Status Register" eventfld.long 0x00 29. " URE1 ,Relay packet underflow detection flag 1" "No underflow,Underflow" eventfld.long 0x00 28. " URE0 ,Relay packet underflow detection flag 0" "No underflow,Underflow" newline eventfld.long 0x00 8. " MACE ,Source MAC address mismatch detection flag" "Not detected,Detected" eventfld.long 0x00 3. " OVRE3 ,Relay packet overflow detection flag 3" "No overflow,Overflow" newline eventfld.long 0x00 2. " OVRE2 ,Relay packet overflow detection flag 2" "No overflow,Overflow" eventfld.long 0x00 1. " OVRE1 ,Relay packet overflow detection flag 1" "No overflow,Overflow" newline eventfld.long 0x00 0. " OVRE0 ,Relay packet overflow detection flag 0" "No overflow,Overflow" line.long 0x04 "PRIPR,PRC-TC Status Notification Enable Register" bitfld.long 0x04 29. " URE1 ,PRSR URE1 status notification enable" "Disabled,Enabled" bitfld.long 0x04 28. " URE0 ,PRSR URE0 status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 8. " MACE ,PRSR MACE status notification enable" "Disabled,Enabled" bitfld.long 0x04 3. " OVRE0 ,PRSR OVRE3 status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 2. " OVRE2 ,PRSR OVRE2 status notification enable" "Disabled,Enabled" bitfld.long 0x04 1. " OVRE1 ,PRSR OVRE1 status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 0. " OVRE0 ,PRSR OVRE0 status notification enable" "Disabled,Enabled" group.long 0x410++0x13 line.long 0x00 "PRMACRU0,Channel 0 Local MAC Address Register (Upper)" hexmask.long.tbyte 0x00 0.--23. 1. " PRMACRU0 ,Upper-order 24 bits of the local MAC address for ethernet port 0" line.long 0x04 "PRMACRL0,Channel 0 Local MAC Address Register (Lower)" hexmask.long.tbyte 0x04 0.--23. 1. " PRMACRL0 ,Lower-order 24 bits of the local MAC address for ethernet port 0" line.long 0x08 "PRMACRU1,Channel 1 Local MAC Address Register (Upper)" hexmask.long.tbyte 0x08 0.--23. 1. " PRMACRU1 ,Upper-order 24 bits of the local MAC address for ethernet port 1" line.long 0x0C "PRMACRL1,Channel 1 Local MAC Address Register (Lower)" hexmask.long.tbyte 0x0C 0.--23. 1. " PRMACRL1 ,Lower-order 24 bits of the local MAC address for ethernet port 1" line.long 0x10 "TRNDISR,Packet Transmission Control Register" bitfld.long 0x10 0.--1. " TDIS ,Packet transmission control" "Ports 0/1,Port 0,Port 1,?..." group.long 0x430++0x07 line.long 0x00 "TRNMR,Relay Mode Register" bitfld.long 0x00 9. " FWD1 ,Channel 1 relay enable" "Disabled,Enabled" bitfld.long 0x00 8. " FWD0 ,Channel 0 relay enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " MOD ,Cut-Through mode" "Store-and-forward,Cut-through" line.long 0x04 "TRNCTTDR,Cut-Through Transfer Start Threshold Register" hexmask.long.word 0x04 0.--10. 1. " THVAL ,FIFO read start threshold" endif tree "EPTPC0 Registers" group.long 0x800++0x07 line.long 0x00 "SYSR,SYNFP Status Register" eventfld.long 0x00 17. " GENDN ,Generation stop completion detection flag" "Not detected,Detected" eventfld.long 0x00 16. " RESDN ,Response stop completion detection flag" "Not detected,Detected" newline eventfld.long 0x00 14. " INFABT ,Control information abnormality detection flag" "Not detected,Detected" eventfld.long 0x00 12. " RECLP ,Loop reception detection flag" "Not detected,Detected" newline eventfld.long 0x00 6. " DRQOVR ,Delay_Req reception FIFO overflow detection flag" "Not detected,Detected" eventfld.long 0x00 5. " INTDEV ,Receive logMessageInterval value Out-of-Range flag" "Not detected,Detected" newline eventfld.long 0x00 4. " DRPTO ,Delay_Resp/Pdelay_Resp reception timeout detection flag" "Not detected,Detected" eventfld.long 0x00 2. " MPDUD ,Mean path delay value update flag" "Not updated,Updated" newline eventfld.long 0x00 1. " INTCHG ,Receive logMessageInterval value change detection flag" "Not detected,Detected" eventfld.long 0x00 0. " OFMUD ,Offset FromMaster value update flag" "Not updated,Updated" line.long 0x04 "SYIPR,SYNFP Status Notification Enable Register" bitfld.long 0x04 17. " GENDN ,SYSR GENDN status notification enable" "Disabled,Enabled" bitfld.long 0x04 16. " RESDN ,SYSR RESDN status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 14. " INFABT ,SYSR INFABT status notification enable" "Disabled,Enabled" bitfld.long 0x04 12. " RECLP ,SYSR.RECLP status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 6. " DRQOVR ,SYSR DRQOVR status notification enable" "Disabled,Enabled" bitfld.long 0x04 5. " INTDEV ,SYSR INTDEV status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 4. " DRPTO ,SYSR DRPTO status notification enable" "Disabled,Enabled" bitfld.long 0x04 2. " MPDUD ,SYSR MPDUD status notification enable" "Disabled,Enabled" newline bitfld.long 0x04 1. " INTCHG ,SYSR INTCHG status notification enable" "Disabled,Enabled" bitfld.long 0x04 0. " OFMUD ,SYSR OFMUD status notification enable" "Disabled,Enabled" group.long (0x800+0x10)++0x0F line.long 0x00 "SYMACRU,SYNFP MAC Address Register (Upper)" hexmask.long.tbyte 0x00 0.--23. 1. " SYMACRU ,Upper-order 24 bits of the local MAC address" line.long 0x04 "SYMACRL,SYNFP MAC Address Register (Lower)" hexmask.long.tbyte 0x04 0.--23. 1. " SYMACRL ,Lower-order 24 bits of the local MAC address" line.long 0x08 "SYLLCCTLR,SYNFP LLC-CTL Value Register" hexmask.long.byte 0x08 0.--7. 1. " CTL ,LLC-CTL field" line.long 0x0C "SYIPADDRR,SYNFP Local IP Address Register" group.long (0x800+0x50)++0x1B line.long 0x00 "ANFR,Announce Message Flag Field Setting Register" bitfld.long 0x00 14. " FLAG14 ,PTP profile specific 2" "False,True" bitfld.long 0x00 13. " FLAG13 ,PTP profile specific 1" "False,True" newline bitfld.long 0x00 10. " FLAG10 ,Unicast flag" "False,True" bitfld.long 0x00 8. " FLAG8 ,Alternate master flag" "False,True" newline bitfld.long 0x00 5. " FLAG5 ,Frequency traceable" "False,True" bitfld.long 0x00 4. " FLAG4 ,Time traceable" "False,True" newline bitfld.long 0x00 3. " FLAG3 ,Ptp timescale" "False,True" bitfld.long 0x00 2. " FLAG2 ,Current utc offset valid" "False,True" newline bitfld.long 0x00 1. " FLAG1 ,Leap59" "False,True" bitfld.long 0x00 0. " FLAG0 ,Leap61" "False,True" line.long 0x04 "SYNFR,Sync Message Flag Field Setting Register" bitfld.long 0x04 14. " FLAG14 ,PTP profile specific 2" "False,True" bitfld.long 0x04 13. " FLAG13 ,PTP profile specific 1" "False,True" newline bitfld.long 0x04 10. " FLAG10 ,Unicast flag" "False,True" bitfld.long 0x04 9. " FLAG9 ,Two step flag" "False,True" newline bitfld.long 0x04 8. " FLAG8 ,Alternate master flag" "False,True" line.long 0x08 "DYRQFR,Delay_Req Message Flag Field Setting Register" bitfld.long 0x08 14. " FLAG14 ,PTP profile specific 2" "False,True" bitfld.long 0x08 13. " FLAG13 ,PTP profile specific 1" "False,True" newline bitfld.long 0x08 10. " FLAG10 ,Unicast flag" "False,True" line.long 0x0C "DYRPFR,Delay_Resp Message Flag Field Setting Register" bitfld.long 0x0C 14. " FLAG14 ,PTP profile specific 2" "False,True" bitfld.long 0x0C 13. " FLAG13 ,PTP profile specific 1" "False,True" newline bitfld.long 0x0C 10. " FLAG10 ,Unicast flag" "False,True" bitfld.long 0x0C 9. " FLAG9 ,Two step flag" "False,True" newline bitfld.long 0x0C 8. " FLAG8 ,Alternate master flag" "False,True" line.long 0x10 "SYCIDRU,SYNFP Local Clock ID Register (Upper)" line.long 0x14 "SYCIDRL,SYNFP Local Clock ID Register (Lower)" line.long 0x18 "SYPNUMR,SYNFP Local Port Number Register" hexmask.long.word 0x18 0.--15. 1. " PNUM ,Local port number setting" sif cpuis("R7FS5D9*") group.long (0x800+0x40)++0x07 line.long 0x00 "SYSPVRR,SYNFP Specification Version Setting Register" bitfld.long 0x00 4.--7. " TRSP ,Transport specific field value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " VER ,Version PTP field value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SYDOMR,SYNFP Domain Number Setting Register" hexmask.long.byte 0x04 0.--7. 1. " DNUM ,Domain number field value setting" endif wgroup.long (0x800+0x80)++0x03 line.long 0x00 "SYRVLDR,SYNFP Register Value Load Directive Register" bitfld.long 0x00 2. " ANUP ,Announce message generation information update" "Disable,Enable" bitfld.long 0x00 1. " STUP ,State update" "Disable,Enable" newline bitfld.long 0x00 0. " BMUP ,BMC update" "Disable,Enable" group.long (0x800+0x90)++0x0B line.long 0x00 "SYRFL1R,SYNFP Reception Filter Register 1" bitfld.long 0x00 30. " PDFUP[2] ,Pdelay_Resp_Follow_Up message processing" "Not processed,Processed" bitfld.long 0x00 28. " PDFUP[0] ,Pdelay_Resp_Follow_Up message processing" "Not transferred,Transferred" newline bitfld.long 0x00 26. " PDRP[2] ,Pdelay_Resp message processing" "Not processed,Processed" bitfld.long 0x00 24. " PDRP[0] ,Pdelay_Resp message processing" "Not transferred,Transferred" newline bitfld.long 0x00 22. " PDRQ[2] ,Pdelay_Req message processing" "Not processed,Processed" bitfld.long 0x00 20. " PDRQ[0] ,Pdelay_Req message processing" "Not transferred,Transferred" newline bitfld.long 0x00 18. " DRP[2] ,Delay_Resp message processing" "Not processed,Processed" bitfld.long 0x00 16. " DRP[0] ,Delay_Resp message processing" "Not transferred,Transferred" newline bitfld.long 0x00 14. " DRQ[2] ,Delay_Req message processing" "Not processed,Processed" bitfld.long 0x00 12. " DRQ[0] ,Delay_Req message processing" "Not transferred,Transferred" newline bitfld.long 0x00 10. " FUP[2] ,Follow_Up message processing" "Not processed,Processed" bitfld.long 0x00 8. " FUP[0] ,Follow_Up message processing" "Not transferred,Transferred" newline bitfld.long 0x00 6. " SYNC[2] ,Sync message processing" "Not processed,Processed" bitfld.long 0x00 4. " SYNC[0] ,Sync message processing" "Not transferred,Transferred" newline bitfld.long 0x00 0. " ANCE[0] ,Announce message processing" "Not transferred,Transferred" line.long 0x04 "SYRFL2R,SYNFP Reception Filter Register 2" sif cpuis("R7FS5D9*") bitfld.long 0x04 28. " ILL[0] ,Illegal message processing setting" "Not transferred,Transferred" bitfld.long 0x04 4. " SIG[0] ,Signaling message processing setting" "Not transferred,Transferred" newline bitfld.long 0x04 0. " MAN[0] ,Management message processing setting" "Not transferred,Transferred" else bitfld.long 0x04 29. " ILL[1] ,Illegal message processing setting" "Not relayed,Relayed" bitfld.long 0x04 28. " ILL[0] ,Illegal message processing setting" "Not transferred,Transferred" newline bitfld.long 0x04 5. " SIG[1] ,Signaling message processing setting" "Not relayed,Relayed" bitfld.long 0x04 4. " SIG[0] ,Signaling message processing setting" "Not transferred,Transferred" newline bitfld.long 0x04 1. " MAN[1] ,Management message processing setting" "Not relayed,Relayed" bitfld.long 0x04 0. " MAN[0] ,Management message processing setting" "Not transferred,Transferred" endif line.long 0x08 "SYTRENR,SYNFP Transmission Enable Register" bitfld.long 0x08 12. " PDRQ ,Pdelay_Req message transmission enable" "Disabled,Enabled" bitfld.long 0x08 8. " DRQ ,Delay_Req message transmission enable" "Disabled,Enabled" newline bitfld.long 0x08 4. " SYNC ,Sync message transmission enable" "Disabled,Enabled" bitfld.long 0x08 0. " ANCE ,Announce message transmission enable" "Disabled,Enabled" group.long (0x800+0xA0)++0x0B line.long 0x00 "MTCIDU,Master Clock ID Register (Upper)" line.long 0x04 "MTCIDL,Master Clock ID Register (Lower)" line.long 0x08 "MTPID,Master Clock Port Number Register" hexmask.long.word 0x08 0.--15. 1. " PNUM ,Master clock port number setting" group.long (0x800+0xC0)++0x03 line.long 0x00 "SYTLIR,SYNFP Transmission Interval Setting Register" hexmask.long.byte 0x00 16.--23. 1. " DREQ ,Delay_Req transmission interval average Value/Pdelay_Req transmission interval setting" hexmask.long.byte 0x00 8.--15. 1. " SYNC ,Sync message transmission interval setting" newline hexmask.long.byte 0x00 0.--7. 1. " ANCE ,Announce message transmission interval setting" rgroup.long (0x800+0xC4)++0x13 line.long 0x00 "SYRLIR,SYNFP Received log Message Interval Value Indication Register" hexmask.long.byte 0x00 16.--23. 1. " DRESP ,Delay_Resp message log message interval field indication flag" hexmask.long.byte 0x00 8.--15. 1. " SYNC ,Sync message log message interval field indication flag" newline hexmask.long.byte 0x00 0.--7. 1. " ANCE ,Announce message log message interval field indication flag" line.long 0x04 "OFMRU,Offset From Master Value Register (Upper)" line.long 0x08 "OFMRL,Offset From Master Value Register (Lower)" line.long 0x0C "MPDRU,Mean Path Delay Value Register (Upper)" line.long 0x10 "MPDRL,Mean Path Delay Value Register (Lower)" group.long (0x800+0xE0)++0x17 line.long 0x00 "GMPR,Grand Master Priority Field Setting Register" hexmask.long.byte 0x00 16.--23. 1. " GMPR1 ,Grand master priority 1 field value setting" hexmask.long.byte 0x00 0.--7. 1. " GMPR2 ,Grand master priority 2 field value setting" line.long 0x04 "GMCQR,Grand Master Clock Quality Field Setting Register" line.long 0x08 "GMIDRU,Grand Master Identity Field Setting Register (Upper)" line.long 0x0C "GMIDRL,Grand Master Identity Field Setting Register (Lower)" line.long 0x10 "CUOTSR,Current Utc Offset/Time Source Field Setting Register" hexmask.long.word 0x10 16.--31. 1. " CUTO ,Current utc offset field setting" hexmask.long.byte 0x10 0.--7. 1. " TSRC ,Time source field setting" line.long 0x14 "SRR,Steps Removed Field Setting Register" hexmask.long.word 0x14 0.--15. 1. " SRMV ,Steps removed field value setting" group.long (0x800+0x100)++0x13 line.long 0x00 "PPMACRU,PTP-primary Message Destination MAC Address Setting Register (Upper)" hexmask.long.tbyte 0x00 0.--23. 1. " PPMACRU ,Upper-order 24 bits of the destination MAC address for PTP-primary messages" line.long 0x04 "PPMACRL,PTP-primary Message Destination MAC Address Setting Register (Lower)" hexmask.long.tbyte 0x04 0.--23. 1. " PPMACRL ,Lower-order 24 bits of the destination MAC address for PTP-primary messages" line.long 0x08 "PDMACRU,PTP-pdelay Message MAC Address Setting Register (Upper)" hexmask.long.tbyte 0x08 0.--23. 1. " PDMACRU ,Upper-order 24 bits of the destination MAC address for PTP-pdelay messages" line.long 0x0C "PDMACRL,PTP-pdelay Message MAC Address Setting Register (Lower)" hexmask.long.tbyte 0x0C 0.--23. 1. " PDMACRL ,Lower-order 24 bits of the destination MAC address for PTP-pdelay messages" line.long 0x10 "PETYPER,PTP Message Ethertype Setting Register" hexmask.long.word 0x10 0.--15. 1. " TYPE ,PTP message ethertype value setting" group.long (0x800+0x120)++0x1F line.long 0x00 "PPIPR,PTP-primary Message Destination IP Address Setting Register" line.long 0x04 "PDIPR,PTP-pdelay Message Destination IP Address Setting Register" line.long 0x08 "PETOSR,PTP Event Message TOS Setting Register" hexmask.long.byte 0x08 0.--7. 1. " EVTO ,PTP event message TOS field value setting" line.long 0x0C "PGTOSR,PTP general Message TOS Setting Register" hexmask.long.byte 0x0C 0.--7. 1. " GETO ,PTP general message TOS field value setting" line.long 0x10 "PPTTLR,PTP-primary Message TTL Setting Register" hexmask.long.byte 0x10 0.--7. 1. " PRTL ,PTP-primary message TTL field value setting" line.long 0x14 "PDTTLR,PTP-pdelay Message TTL Setting Register" hexmask.long.byte 0x14 0.--7. 1. " PDTL ,PTP-pdelay message TTL field value" line.long 0x18 "PEUDPR,PTP Event Message UDP Destination Port Number Setting Register" hexmask.long.word 0x18 0.--15. 1. " EVUPT ,PTP event message destination port number setting" line.long 0x1C "PGUDPR,PTP general Message UDP Destination Port Number Setting Register" hexmask.long.word 0x1C 0.--15. 1. " GEUPT ,PTP general message destination port number" if ((per.l(ad:0x40065000+0x800+0x140)&0x10000)==0x00) group.long (0x800+0x140)++0x03 line.long 0x00 "FFLTR,Frame Reception Filter Setting Register" bitfld.long 0x00 16. " EXTPRM ,Extended promiscuous mode setting" "Normal,Extended" bitfld.long 0x00 2. " ENB ,Reception filter enable" "Disabled,Enabled" newline bitfld.long 0x00 1. " PRT ,Frame reception enable" "Disabled,Enabled" bitfld.long 0x00 0. " SEL ,Receive MAC address select" "FMAC0RU/FMAC0RL,FMAC1RU/FMAC1RL" else group.long (0x800+0x140)++0x03 line.long 0x00 "FFLTR,Frame Reception Filter Setting Register" bitfld.long 0x00 16. " EXTPRM ,Extended promiscuous mode setting" "Normal,Extended" endif group.long (0x800+0x160)++0x0F line.long 0x00 "FMAC0RU,Frame Reception Filter MAC Address 0 Setting Register (Upper)" hexmask.long.tbyte 0x00 0.--23. 1. " FMAC0RU ,Upper-order 24 bits of the destination MAC address for received multicast frames" line.long 0x04 "FMAC0RL,Frame Reception Filter MAC Address 0 Setting Register (Lower)" hexmask.long.tbyte 0x04 0.--23. 1. " FMAC0RL ,Lower-order 24 bits of the destination MAC address for received multicast frames" line.long 0x08 "FMAC1RU,Frame Reception Filter MAC Address 1 Setting Register (Upper)" hexmask.long.tbyte 0x08 0.--23. 1. " FMAC1RU ,Upper-order 24 bits of the destination MAC address for received multicast frames" line.long 0x0C "FMAC1RL,Frame Reception Filter MAC Address 1 Setting Register (Lower)" hexmask.long.tbyte 0x0C 0.--23. 1. " FMAC1RL ,Lower-order 24 bits of the destination MAC address for received multicast frames" group.long (0x800+0x1C0)++0x17 line.long 0x00 "DASYMRU,Asymmetric Delay Setting Register (Upper)" hexmask.long.word 0x00 0.--15. 1. " DASYMRU ,Upper-order 16 bits of the asymmetric delay value" line.long 0x04 "DASYMRL,Asymmetric Delay Setting Register (Lower)" line.long 0x08 "TSLATR,Timestamp Latency Setting Register" hexmask.long.word 0x08 16.--31. 1. " INGP ,Input port timestamp latency setting" hexmask.long.word 0x08 0.--15. 1. " EGP ,Output port timestamp latency setting" line.long 0x0C "SYCONFR,SYNFP Operation Setting Register" bitfld.long 0x0C 16. " FILDIS ,Receive message domain number filter disable" "No,Yes" newline bitfld.long 0x0C 12. " SBDIS ,Sync message transmission bandwidth securing disable" "No,Yes" hexmask.long.byte 0x0C 0.--7. 1. " TCYC ,PTP message transmission interval setting" line.long 0x10 "SYFORMR,SYNFP Frame Format Setting Register" bitfld.long 0x10 1. " FORM1 ,Ethernet/UDP encapsulation" "Ethernet,UDP/IPv4" bitfld.long 0x10 0. " FORM0 ,Ethernet frame format setting" "Ethernet II,IEEE802.3" line.long 0x14 "RSTOUTR,Response Message Reception Timeout Register" tree.end group.long (ad:0x40064500)++0x0B line.long 0x00 "PTRSTR,PTP Reset Register" bitfld.long 0x00 0. " RESET ,EPTPC software reset" "No reset,Reset" line.long 0x04 "STCSELR,STCA Clock Select Register" bitfld.long 0x04 8.--10. " SCLKSEL ,STCA clock select" "PCLKA/1 to 6,REF50CK0,REF50CK1,?..." bitfld.long 0x04 0.--2. " SCLKDIV ,PCLKA clock frequency division" "/1,/2,/3,/4,/5,/6,?..." line.long 0x08 "BYPASS,Bypass 1588 Module Register" bitfld.long 0x08 0. " BYPASS0 ,Bypass1588 module for ether 0ch" "Not bypassed,Bypassed" width 0x0B tree.end endif tree.open "EDMAC (Ethernet DMA Controller)" tree "EDMAC0" base ad:0x40064000 width 8. group.long 0x00++0x03 line.long 0x00 "EDMR,EDMAC Mode Register" bitfld.long 0x00 6. " DE ,Big endian Mode/Little endian mode" "Big endian,Little endian" bitfld.long 0x00 4.--5. " DL ,Transmit/Receive descriptor length" "16 bytes,32 bytes,64 bytes,16 bytes" bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" group.long 0x08++0x03 line.long 0x00 "EDTRR,EDMAC Transmit Request Register" bitfld.long 0x00 0. " TR ,Transmit request" "Not requested,Requested" group.long 0x10++0x03 line.long 0x00 "EDRRR,EDMAC Receive Request Register" bitfld.long 0x00 0. " RR ,Receive request" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "TDLAR,Transmit Descriptor List Start Address Register" group.long 0x20++0x03 line.long 0x00 "RDLAR,Receive Descriptor List Start Address Register" group.long 0x28++0x03 line.long 0x00 "EESR,ETHERC/EDMAC Status Register" bitfld.long 0x00 30. " TWB ,Write-Back complete flag" "Not completed,Completed" bitfld.long 0x00 26. " TABT ,Transmit abort detect flag" "Not aborted,Aborted" bitfld.long 0x00 25. " RABT ,Receive abort detect flag" "Not aborted,Aborted" bitfld.long 0x00 24. " RFCOF ,Receive frame counter overflow flag" "No overflow,Overflow" newline bitfld.long 0x00 23. " ADE ,Address error flag" "No error,Error" rbitfld.long 0x00 22. " ECI ,ETHERC status register source flag" "Not detected,Detected" bitfld.long 0x00 21. " TC ,Frame transfer complete flag" "Not completed,Completed" bitfld.long 0x00 20. " TDE ,Transmit descriptor empty flag" "Not empty,Empty" newline bitfld.long 0x00 19. " TFUF ,Transmit FIFO underflow flag" "No underflow,Underflow" bitfld.long 0x00 18. " FR ,Frame receive flag" "Not received,Received" bitfld.long 0x00 17. " RDE ,Receive descriptor empty flag" "Not empty,Empty" bitfld.long 0x00 16. " RFOF ,Receive FIFO overflow flag" "No overflow,Overflow" newline bitfld.long 0x00 11. " CND ,Carrier not detect flag" "Detected,Not detected" bitfld.long 0x00 10. " DLC ,Loss of carrier detect flag" "Not detected,Detected" bitfld.long 0x00 9. " CD ,Late collision detect flag" "Not detected,Detected" bitfld.long 0x00 8. " TRO ,Transmit retry over flag" "Not detected,Detected" newline bitfld.long 0x00 7. " RMAF ,Multicast address frame receive flag" "Not received,Received" bitfld.long 0x00 4. " RRF ,Alignment error flag" "Not error,Error" bitfld.long 0x00 3. " RTLF ,Frame-Too-Long error flag" "Not error,Error" bitfld.long 0x00 2. " RTSF ,Frame-Too-Short error flag" "Not error,Error" newline bitfld.long 0x00 1. " PRE ,PHY-LSI receive error flag" "Not error,Error" bitfld.long 0x00 0. " CERF ,CRC error flag" "Not error,Error" group.long 0x30++0x03 line.long 0x00 "EESIPR,ETHERC/EDMAC Status Interrupt Enable Register" bitfld.long 0x00 30. " TWBIP ,Write-Back complete interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 26. " TABTIP ,Transmit abort detect interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 25. " RABTIP ,Receive abort detect interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 24. " RFCOFIP ,Receive frame counter overflow interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 23. " ADEIP ,Address error interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 22. " ECIIP ,ETHERC status register source interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 21. " TCIP ,Frame transfer complete interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDEIP ,Transmit descriptor empty interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 19. " TFUFIP ,Transmit FIFO underflow interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 18. " FRIP ,Frame receive interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 17. " RDEIP ,Receive descriptor empty interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 16. " RFOFIP ,Receive FIFO overflow interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " CNDIP ,Carrier not detect interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 10. " DLCIP ,Loss of carrier detect interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 9. " CDIP ,Late collision detect interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 8. " TROIP ,Transmit retry over interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " RMAFIP ,Multicast address frame receive interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 4. " RRFIP ,Alignment error interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 3. " RTLFIP ,Frame-Too-Long error interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 2. " RTSFIP ,Frame-Too-Short error interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 1. " PREIP ,PHY-LSI receive error interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 0. " CERFIP ,CRC error interrupt request enable" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "TRSCER,ETHERC/EDMAC Transmit/Receive Status Copy Enable Register" bitfld.long 0x00 7. " RMAFCE ,RMAF flag copy enable" "Disabled,Enabled" bitfld.long 0x00 4. " RRFCE ,RRF flag copy enable" "Disabled,Enabled" group.long 0x40++0x03 line.long 0x00 "RMFCR,Missed-Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. " MFC ,Missed-Frame counter" group.long 0x48++0x03 line.long 0x00 "TFTR,Transmit FIFO Threshold Register" hexmask.long.word 0x00 0.--10. 1. " TFT ,Transmit FIFO threshold" group.long 0x50++0x03 line.long 0x00 "FDR,FIFO Depth Register" bitfld.long 0x00 8.--12. " TFD ,Transmit FIFO depth" ",,,,,,,2048 bytes,?..." bitfld.long 0x00 0.--4. " RFD ,Receive FIFO depth" ",,,,,,,,,,,,,,,4096 bytes,?..." group.long 0x58++0x03 line.long 0x00 "RMCR,Receive Method Control Register" bitfld.long 0x00 0. " RNR ,Receive request reset" "No reset,Reset" group.long 0x64++0x0F line.long 0x00 "TFUCR,Transmit FIFO Underflow Counter" hexmask.long.word 0x00 0.--15. 1. " UNDER ,Transmit FIFO underflow count" line.long 0x04 "RFOCR,Receive FIFO Overflow Counter" hexmask.long.word 0x04 0.--15. 1. " OVER ,Receive FIFO overflow count" line.long 0x08 "IOSR,Independent Output Signal Setting Register" bitfld.long 0x08 0. " ELB ,External loopback mode" "Low,High" line.long 0x0C "FCFTR,Flow Control Start FIFO Threshold Setting Register" bitfld.long 0x0C 16.--18. " RFFO ,Receive FIFO frame" "2 frames,4 frames,6 frames,8 frames,10 frames,12 frames,14 frames,16 frames" bitfld.long 0x0C 0.--2. " RFDO ,Receive FIFO data PAUSE output threshold" "224 bytes,480 bytes,736 bytes,992 bytes,1248 bytes,1504 bytes,1760 bytes,2016 bytes" group.long 0x78++0x07 line.long 0x00 "RPADIR,Receive Data Padding Insert Register" bitfld.long 0x00 16.--17. " PADS ,Padding size" ",1 byte,2 byte,3 byte" bitfld.long 0x00 0.--5. " PADR ,Padding slot" "Head,1st/2nd,2nd/3rd,3rd/4th,4th/5th,5th/6th,6th/7th,7th/8th,8th/9th,9th/10th,10th/11th,11th/12th,12th/13rd,13th/14th,14th/15th,15th/16th,16th/17th,17th/18th,18th/19th,19th/20th,20th/21st,21st/22nd,22nd/23rd,23rd/24th,24th/25th,25th/26th,26th/27th,27th/28th,28th/29th,29th/30th,30th/31st,31st/32nd,32nd/33rd,33rd/34th,34th/35th,35th/36th,36th/37th,37th/38th,38th/39th,39th/40th,40th/41st,41st/42nd,42nd/43rd,43rd/44th,44th/45th,45th/46th,46th/47th,47th/48th,48th/49th,49th/50th,50th/51st,51st/52nd,52nd/53rd,53rd/54th,54th/55th,55th/56th,56th/57th,57th/58th,58th/59th,59th/60th,60th/61st,61st/62nd,62nd/63rd,63rd/64th" line.long 0x04 "TRIMD,Transmit Interrupt Setting Register" bitfld.long 0x04 4. " TIM ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " TIM ,Transmit interrupt mode" "Transmission,Write-back" rgroup.long 0xC8++0x07 line.long 0x00 "RBWAR,Receive Buffer Write Address Register" line.long 0x04 "RDFAR,Receive Descriptor Fetch Address Register" rgroup.long 0xD4++0x07 line.long 0x00 "TBRAR,Transmit Buffer Read Address Register" line.long 0x04 "TDFAR,Transmit Descriptor Fetch Address Register" width 0x0B tree.end sif cpuis("R7FS5D9*") tree "PTPEDMAC" base ad:0x40064400 width 8. group.long 0x00++0x03 line.long 0x00 "EDMR,EDMAC Mode Register" bitfld.long 0x00 6. " DE ,Big endian Mode/Little endian mode" "Big endian,Little endian" bitfld.long 0x00 4.--5. " DL ,Transmit/Receive descriptor length" "16 bytes,32 bytes,64 bytes,16 bytes" bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" group.long 0x08++0x03 line.long 0x00 "EDTRR,EDMAC Transmit Request Register" bitfld.long 0x00 0. " TR ,Transmit request" "Not requested,Requested" group.long 0x10++0x03 line.long 0x00 "EDRRR,EDMAC Receive Request Register" bitfld.long 0x00 0. " RR ,Receive request" "Disabled,Enabled" group.long 0x18++0x03 line.long 0x00 "TDLAR,Transmit Descriptor List Start Address Register" group.long 0x20++0x03 line.long 0x00 "RDLAR,Receive Descriptor List Start Address Register" group.long 0x28++0x03 line.long 0x00 "EESR,PTP/EDMAC Status Register" bitfld.long 0x00 30. " TWB ,Write-Back complete flag" "Not completed,Completed" bitfld.long 0x00 26. " TABT ,Transmit abort detect flag" "Not aborted,Aborted" bitfld.long 0x00 24. " RFCOF ,Receive frame counter overflow flag" "No overflow,Overflow" bitfld.long 0x00 23. " ADE ,Address error flag" "No error,Error" newline bitfld.long 0x00 21. " TC ,Frame transfer complete flag" "Not requested,Requested" bitfld.long 0x00 20. " TDE ,Transmit descriptor empty flag" "Not empty,Empty" bitfld.long 0x00 19. " TFUF ,Transmit FIFO underflow flag" "No underflow,Underflow" bitfld.long 0x00 18. " FR ,Frame receive flag" "Not received,Received" newline bitfld.long 0x00 17. " RDE ,Receive descriptor empty flag" "Not empty,Empty" bitfld.long 0x00 16. " RFOF ,Receive FIFO overflow flag" "No overflow,Overflow" bitfld.long 0x00 8. " MACE ,MAC address mismatch flag" "No mismatch,Mismatch" sif !cpuis("R7FS5D9*") bitfld.long 0x00 7. " RPORT ,Receive port flag" "Port 0,Port 1" endif newline bitfld.long 0x00 4. " PVER ,PTP v2 packet flag" "No,Yes" bitfld.long 0x00 0.--3. " TYPE ,PTP v2 message type flag" "Sync,Delay_Req,Pdelay_Req,Pdelay_Resp,Follow_Up,Delay_Resp,Pdelay_Resp_Follow_Up,Announce,Signaling,Management,?..." group.long 0x30++0x03 line.long 0x00 "EESIPR,PTP/EDMAC Status Interrupt Enable Register" bitfld.long 0x00 30. " TWBIP ,Write-Back complete interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 26. " TABTIP ,Transmit abort detect interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 24. " RFCOFIP ,Receive frame counter overflow interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 23. " ADEIP ,Address error interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 21. " TCIP ,Frame transfer complete interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDEIP ,Transmit descriptor empty interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 19. " TFUFIP ,Transmit FIFO underflow interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 18. " FRIP ,Frame receive interrupt request enable" "Disabled,Enabled" newline bitfld.long 0x00 17. " RDEIP ,Receive descriptor empty interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 16. " RFOFIP ,Receive FIFO overflow interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 8. " MACEIP ,MAC address mismatch interrupt request enable" "Disabled,Enabled" sif !cpuis("R7FS5D9*") bitfld.long 0x00 7. " RPORTIP ,Receive port interrupt request enable" "Disabled,Enabled" bitfld.long 0x00 4. " PVERIP ,PTP v2 packet receive interrupt request enable" "Disabled,Enabled" else bitfld.long 0x00 4. " PVERIP ,PTP v2 packet receive interrupt request enable" "Disabled,Enabled" endif group.long 0x40++0x03 line.long 0x00 "RMFCR,Missed-Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. " MFC ,Missed-Frame counter" group.long 0x48++0x03 line.long 0x00 "TFTR,Transmit FIFO Threshold Register" hexmask.long.word 0x00 0.--10. 1. " TFT ,Transmit FIFO threshold" group.long 0x50++0x03 line.long 0x00 "FDR,FIFO Depth Register" bitfld.long 0x00 8.--12. " TFD ,Transmit FIFO depth" ",,,,,,,2048 bytes,?..." bitfld.long 0x00 0.--4. " RFD ,Receive FIFO depth" ",,,,,,,,,,,,,,,4096 bytes,?..." group.long 0x58++0x03 line.long 0x00 "RMCR,Receive Method Control Register" bitfld.long 0x00 0. " RNR ,Receive request reset" "No reset,Reset" group.long 0x64++0x0F line.long 0x00 "TFUCR,Transmit FIFO Underflow Counter" hexmask.long.word 0x00 0.--15. 1. " UNDER ,Transmit FIFO underflow count" line.long 0x04 "RFOCR,Receive FIFO Overflow Counter" hexmask.long.word 0x04 0.--15. 1. " OVER ,Receive FIFO overflow count" line.long 0x08 "IOSR,Independent Output Signal Setting Register" bitfld.long 0x08 0. " ELB ,External loopback mode" "Low,High" line.long 0x0C "FCFTR,Flow Control Start FIFO Threshold Setting Register" bitfld.long 0x0C 16.--18. " RFFO ,Receive FIFO frame" "2 frames,4 frames,6 frames,8 frames,10 frames,12 frames,14 frames,16 frames" bitfld.long 0x0C 0.--2. " RFDO ,Receive FIFO data PAUSE output threshold" "224 bytes,480 bytes,736 bytes,992 bytes,1248 bytes,1504 bytes,1760 bytes,2016 bytes" group.long 0x78++0x07 line.long 0x00 "RPADIR,Receive Data Padding Insert Register" bitfld.long 0x00 16.--17. " PADS ,Padding size" ",1 byte,2 byte,3 byte" bitfld.long 0x00 0.--5. " PADR ,Padding slot" "Head,1st/2nd,2nd/3rd,3rd/4th,4th/5th,5th/6th,6th/7th,7th/8th,8th/9th,9th/10th,10th/11th,11th/12th,12th/13rd,13th/14th,14th/15th,15th/16th,16th/17th,17th/18th,18th/19th,19th/20th,20th/21st,21st/22nd,22nd/23rd,23rd/24th,24th/25th,25th/26th,26th/27th,27th/28th,28th/29th,29th/30th,30th/31st,31st/32nd,32nd/33rd,33rd/34th,34th/35th,35th/36th,36th/37th,37th/38th,38th/39th,39th/40th,40th/41st,41st/42nd,42nd/43rd,43rd/44th,44th/45th,45th/46th,46th/47th,47th/48th,48th/49th,49th/50th,50th/51st,51st/52nd,52nd/53rd,53rd/54th,54th/55th,55th/56th,56th/57th,57th/58th,58th/59th,59th/60th,60th/61st,61st/62nd,62nd/63rd,63rd/64th" line.long 0x04 "TRIMD,Transmit Interrupt Setting Register" bitfld.long 0x04 4. " TIM ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " TIM ,Transmit interrupt mode" "Transmission,Write-back" rgroup.long 0xC8++0x07 line.long 0x00 "RBWAR,Receive Buffer Write Address Register" line.long 0x04 "RDFAR,Receive Descriptor Fetch Address Register" rgroup.long 0xD4++0x07 line.long 0x00 "TBRAR,Transmit Buffer Read Address Register" line.long 0x04 "TDFAR,Transmit Descriptor Fetch Address Register" width 0x0B tree.end endif tree.end tree "USBFS (USB 2.0 Full-Speed Module)" base ad:0x40090000 width 11. group.word 0x00++0x01 line.word 0x00 "SYSCFG,System Configuration Control Register" bitfld.word 0x00 10. " SCKE ,USB clock enable" "Disabled,Enabled" bitfld.word 0x00 6. " DCFM ,Controller function select" "Device,Host" bitfld.word 0x00 5. " DRPD ,D+/D- line resistor control" "Disabled,Enabled" bitfld.word 0x00 4. " DPRPU ,D+ line resistor control" "Disabled,Enabled" newline bitfld.word 0x00 0. " USBE ,USBFS operation enable" "Disabled,Enabled" if (((per.w(ad:0x40090000+0x08))&0x07)==0x01) rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" bitfld.word 0x00 5. " SOFEA ,Active monitor when the host controller is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "SE0,K-State,J-State,SE1" elif (((per.w(ad:0x40090000+0x08))&0x07)==0x02) rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" bitfld.word 0x00 5. " SOFEA ,Active monitor when the host controller is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "SE0,J-State,K-State,SE1" else rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" bitfld.word 0x00 5. " SOFEA ,Active monitor when the host controller is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" endif if (((per.w(ad:0x40090000))&0x40)==0x40) group.word 0x08++0x01 line.word 0x00 "DVSTCTR0,Device State Control Register 0" bitfld.word 0x00 11. " HNPBTOA ,Host negotiation protocol control" "0,1" bitfld.word 0x00 10. " EXICEN ,USB_EXICEN output pin control" "Low,High" bitfld.word 0x00 9. " VBUSEN ,USB_VBUSEN output pin control" "Low,High" bitfld.word 0x00 8. " WKUP ,Wakeup output" "No output,Output" newline bitfld.word 0x00 7. " RWUPE ,Wakeup detection enable" "Disabled,Enabled" bitfld.word 0x00 6. " USBRST ,USB bus reset output" "No output,Output" bitfld.word 0x00 5. " RESUME ,Resume output" "No output,Output" bitfld.word 0x00 4. " UACT ,USB bus enable" "Disabled,Enabled" newline rbitfld.word 0x00 0.--2. " RHST ,USB bus reset status" "Indeterminate,Low-speed,Full-speed,Reset,Reset,Reset,Reset,Reset" else group.word 0x08++0x01 line.word 0x00 "DVSTCTR0,Device State Control Register 0" bitfld.word 0x00 11. " HNPBTOA ,Host negotiation protocol control" "0,1" bitfld.word 0x00 10. " EXICEN ,USB_EXICEN output pin control" "Low,High" bitfld.word 0x00 9. " VBUSEN ,USB_VBUSEN output pin control" "Low,High" bitfld.word 0x00 8. " WKUP ,Wakeup output" "No output,Output" newline bitfld.word 0x00 7. " RWUPE ,Wakeup detection enable" "Disabled,Enabled" bitfld.word 0x00 6. " USBRST ,USB bus reset output" "No output,Output" bitfld.word 0x00 5. " RESUME ,Resume output" "No output,Output" bitfld.word 0x00 4. " UACT ,USB bus enable" "Disabled,Enabled" newline rbitfld.word 0x00 0.--2. " RHST ,USB bus reset status" "Indeterminate,Low-speed,Full-speed,?..." endif if (((per.w(ad:0x40090000+0x20))&0x400)==0x400) group.word 0x14++0x01 line.word 0x00 "CFIFO,CFIFO Port Register" group.word 0x18++0x01 line.word 0x00 "D0FIFO,D0FIFO Port Register" group.word 0x1C++0x01 line.word 0x00 "D1FIFO,D1FIFO Port Register" else group.byte 0x14++0x00 line.byte 0x00 "CFIFOL,CFIFOL Port Register" group.byte 0x18++0x00 line.byte 0x00 "D0FIFOL,D0FIFOL Port Register" group.byte 0x1C++0x00 line.byte 0x00 "D1FIFOL,D1FIFOL Port Register" endif group.word 0x20++0x01 line.word 0x00 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Clear,Decrement" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Disabled,Enabled" bitfld.word 0x00 10. " MBW ,CFIFO port access bit width" "8-bit,16-bit" bitfld.word 0x00 8. " BIGEND ,CFIFO port endian control" "Little,Big" newline bitfld.word 0x00 5. " ISEL ,CFIFO port access direction when DCP is selected" "Reading,Writing" bitfld.word 0x00 0.--3. " CURPIPE ,CFIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." group.word 0x28++0x01 line.word 0x00 "D0FIFOSEL,D0FIFO Port Access Pipe Specification" bitfld.word 0x00 15. " RCNT ,Read count mode" "Clear,Decrement" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Disabled,Enabled" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" bitfld.word 0x00 12. " DREQE ,DMA/DTC transfer request enable" "Disabled,Enabled" newline bitfld.word 0x00 10. " MBW ,FIFO port access bit width" "8-bit,16-bit" bitfld.word 0x00 8. " BIGEND ,FIFO port endian control" "Little,Big" bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." group.word 0x2C++0x01 line.word 0x00 "D1FIFOSEL,D1FIFO Port Access Pipe Specification" bitfld.word 0x00 15. " RCNT ,Read count mode" "Clear,Decrement" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Disabled,Enabled" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" bitfld.word 0x00 12. " DREQE ,DMA/DTC transfer request enable" "Disabled,Enabled" newline bitfld.word 0x00 10. " MBW ,FIFO port access bit width" "8-bit,16-bit" bitfld.word 0x00 8. " BIGEND ,FIFO port endian control" "Little,Big" bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." group.word 0x22++0x01 line.word 0x00 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x00 15. " BVAL ,Buffer memory valid flag" "Invalid,Valid" bitfld.word 0x00 14. " BCLR ,CPU buffer clear" "No effect,Clear" rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " DTLN ,Receive data length" group.word 0x2A++0x01 line.word 0x00 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x00 15. " BVAL ,Buffer memory valid flag" "Invalid,Valid" bitfld.word 0x00 14. " BCLR ,CPU buffer clear" "No effect,Clear" rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " DTLN ,Receive data length" group.word 0x2E++0x01 line.word 0x00 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x00 15. " BVAL ,Buffer memory valid flag" "Invalid,Valid" bitfld.word 0x00 14. " BCLR ,CPU buffer clear" "No effect,Clear" rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " DTLN ,Receive data length" group.word 0x30++0x03 line.word 0x00 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x00 15. " VBSE ,VBUS interrupt enable" "Disabled,Enabled" bitfld.word 0x00 14. " RSME ,Resume interrupt enable" "Disabled,Enabled" bitfld.word 0x00 13. " SOFE ,Frame number update interrupt enable" "Disabled,Enabled" bitfld.word 0x00 12. " DVSE ,Device state transition interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 11. " CTRE ,Control transfer stage transition interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " BEMPE ,Buffer empty interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " NRDYE ,Buffer not ready response interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " BRDYE ,Buffer ready interrupt enable" "Disabled,Enabled" line.word 0x02 "INTENB1,Interrupt Enable Register 1" bitfld.word 0x02 15. " OVRCRE ,Overcurrent input change interrupt enable" "Disabled,Enabled" bitfld.word 0x02 14. " BCHGE ,USB bus change interrupt enable" "Disabled,Enabled" bitfld.word 0x02 12. " DTCHE ,Disconnection detection interrupt enable" "Disabled,Enabled" bitfld.word 0x02 11. " ATTCHE ,Connection detection interrupt enable" "Disabled,Enabled" newline bitfld.word 0x02 6. " EOFERRE ,EOF error detection interrupt enable" "Disabled,Enabled" bitfld.word 0x02 5. " SIGNE ,Setup transaction error interrupt enable" "Disabled,Enabled" bitfld.word 0x02 4. " SACKE ,Setup transaction normal response interrupt enable" "Disabled,Enabled" group.word 0x36++0x07 line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register" bitfld.word 0x00 9. " PIPE9BRDYE ,BRDY interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x00 8. " PIPE8BRDYE ,BRDY interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x00 7. " PIPE7BRDYE ,BRDY interrupt enable for pipe 7" "Disabled,Enabled" bitfld.word 0x00 6. " PIPE6BRDYE ,BRDY interrupt enable for pipe 6" "Disabled,Enabled" newline bitfld.word 0x00 5. " PIPE5BRDYE ,BRDY interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x00 4. " PIPE4BRDYE ,BRDY interrupt enable for pipe 4" "Disabled,Enabled" bitfld.word 0x00 3. " PIPE3BRDYE ,BRDY interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x00 2. " PIPE2BRDYE ,BRDY interrupt enable for pipe 2" "Disabled,Enabled" newline bitfld.word 0x00 1. " PIPE1BRDYE ,BRDY interrupt enable for pipe 1" "Disabled,Enabled" bitfld.word 0x00 0. " PIPE0BRDYE ,BRDY interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x02 "NRDYENB,NRDY Interrupt Enable Register" bitfld.word 0x02 9. " PIPE9NRDYE ,NRDY interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x02 8. " PIPE8NRDYE ,NRDY interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x02 7. " PIPE7NRDYE ,NRDY interrupt enable for pipe 7" "Disabled,Enabled" bitfld.word 0x02 6. " PIPE6NRDYE ,NRDY interrupt enable for pipe 6" "Disabled,Enabled" newline bitfld.word 0x02 5. " PIPE5NRDYE ,NRDY interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x02 4. " PIPE4NRDYE ,NRDY interrupt enable for pipe 4" "Disabled,Enabled" bitfld.word 0x02 3. " PIPE3NRDYE ,NRDY interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x02 2. " PIPE2NRDYE ,NRDY interrupt enable for pipe 2" "Disabled,Enabled" newline bitfld.word 0x02 1. " PIPE1NRDYE ,NRDY interrupt enable for pipe 1" "Disabled,Enabled" bitfld.word 0x02 0. " PIPE0NRDYE ,NRDY interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x04 "BEMPENB,BEMP Interrupt Enable Register" bitfld.word 0x04 9. " PIPE9BEMPE ,BEMP interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x04 8. " PIPE8BEMPE ,BEMP interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x04 7. " PIPE7BEMPE ,BEMP interrupt enable for pipe 7" "Disabled,Enabled" bitfld.word 0x04 6. " PIPE6BEMPE ,BEMP interrupt enable for pipe 6" "Disabled,Enabled" newline bitfld.word 0x04 5. " PIPE5BEMPE ,BEMP interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x04 4. " PIPE4BEMPE ,BEMP interrupt enable for pipe 4" "Disabled,Enabled" bitfld.word 0x04 3. " PIPE3BEMPE ,BEMP interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x04 2. " PIPE2BEMPE ,BEMP interrupt enable for pipe 2" "Disabled,Enabled" newline bitfld.word 0x04 1. " PIPE1BEMPE ,BEMP interrupt enable for pipe 1" "Disabled,Enabled" bitfld.word 0x04 0. " PIPE0BEMPE ,BEMP interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x06 "SOFCFG,SOF Output Configuration Register" bitfld.word 0x06 8. " TRNENSEL ,Transaction-Enabled time select" "Not low-speed,Low-speed" bitfld.word 0x06 6. " BRDYM ,BRDY interrupt status clear timing" "Not cleared,Cleared" rbitfld.word 0x06 4. " EDGESTS ,Edge interrupt output status monitor" "No interrupt,Interrupt" group.word 0x40++0x03 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 14. " RESM ,Resume interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "No interrupt,Interrupt" newline bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "No interrupt,Interrupt" newline rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High" rbitfld.word 0x00 4.--6. " DVSQ ,Device state" "Powered state,Default state,Address state,Configured state,Suspend state,Suspend state,Suspend state,Suspend state" bitfld.word 0x00 3. " VALID ,USB request reception" "Not received,Received" rbitfld.word 0x00 0.--2. " CTSQ ,Control transfer stage" "Idle or setup stage,Control read data stage,Control read status stage,Control write data stage,Control write status stage,Control write (no data) status stage,Control transfer sequence error,?..." line.word 0x02 "INTSTS1,Interrupt Status Register 1" bitfld.word 0x02 15. " OVRCR ,Overcurrent input change interrupt status" "No interrupt,Interrupt" bitfld.word 0x02 14. " BCHG ,USB bus change interrupt status" "No interrupt,Interrupt" bitfld.word 0x02 12. " DTCH ,USB disconnection detection interrupt status" "No interrupt,Interrupt" bitfld.word 0x02 11. " ATTCH ,ATTCH interrupt status" "No interrupt,Interrupt" newline bitfld.word 0x02 6. " EOFERR ,EOF error detection interrupt status" "No interrupt,Interrupt" bitfld.word 0x02 5. " SIGN ,Setup transaction error interrupt status" "No interrupt,Interrupt" bitfld.word 0x02 4. " SACK ,Setup transaction normal response interrupt status" "No interrupt,Interrupt" group.word 0x46++0x09 line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register" bitfld.word 0x00 9. " PIPE9BRDY ,BRDY interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x00 8. " PIPE8BRDY ,BRDY interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x00 7. " PIPE7BRDY ,BRDY interrupt status for pipe 7" "No interrupt,Interrupt" bitfld.word 0x00 6. " PIPE6BRDY ,BRDY interrupt status for pipe 6" "No interrupt,Interrupt" newline bitfld.word 0x00 5. " PIPE5BRDY ,BRDY interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x00 4. " PIPE4BRDY ,BRDY interrupt status for pipe 4" "No interrupt,Interrupt" bitfld.word 0x00 3. " PIPE3BRDY ,BRDY interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x00 2. " PIPE2BRDY ,BRDY interrupt status for pipe 2" "No interrupt,Interrupt" newline bitfld.word 0x00 1. " PIPE1BRDY ,BRDY interrupt status for pipe 1" "No interrupt,Interrupt" bitfld.word 0x00 0. " PIPE0BRDY ,BRDY interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x02 "NRDYSTS,NRDY Interrupt Status Register" bitfld.word 0x02 9. " PIPE9NRDY ,NRDY interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x02 8. " PIPE8NRDY ,NRDY interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x02 7. " PIPE7NRDY ,NRDY interrupt status for pipe 7" "No interrupt,Interrupt" bitfld.word 0x02 6. " PIPE6NRDY ,NRDY interrupt status for pipe 6" "No interrupt,Interrupt" newline bitfld.word 0x02 5. " PIPE5NRDY ,NRDY interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x02 4. " PIPE4NRDY ,NRDY interrupt status for pipe 4" "No interrupt,Interrupt" bitfld.word 0x02 3. " PIPE3NRDY ,NRDY interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x02 2. " PIPE2NRDY ,NRDY interrupt status for pipe 2" "No interrupt,Interrupt" newline bitfld.word 0x02 1. " PIPE1NRDY ,NRDY interrupt status for pipe 1" "No interrupt,Interrupt" bitfld.word 0x02 0. " PIPE0NRDY ,NRDY interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x04 "BEMPSTS,BEMP Interrupt Status Register" bitfld.word 0x04 9. " PIPE9BEMP ,BEMP interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x04 8. " PIPE8BEMP ,BEMP interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x04 7. " PIPE7BEMP ,BEMP interrupt status for pipe 7" "No interrupt,Interrupt" bitfld.word 0x04 6. " PIPE6BEMP ,BEMP interrupt status for pipe 6" "No interrupt,Interrupt" newline bitfld.word 0x04 5. " PIPE5BEMP ,BEMP interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x04 4. " PIPE4BEMP ,BEMP interrupt status for pipe 4" "No interrupt,Interrupt" bitfld.word 0x04 3. " PIPE3BEMP ,BEMP interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x04 2. " PIPE2BEMP ,BEMP interrupt status for pipe 2" "No interrupt,Interrupt" newline bitfld.word 0x04 1. " PIPE1BEMP ,BEMP interrupt status for pipe 1" "No interrupt,Interrupt" bitfld.word 0x04 0. " PIPE0BEMP ,BEMP interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x06 "FRMNUM,Frame Number Register" bitfld.word 0x06 15. " OVRN ,Overrun/Underrun detection status" "No error,Error" bitfld.word 0x06 14. " CRCE ,Receive data error" "No error,Error" hexmask.word 0x06 0.--10. 1. " FRNM ,Frame number" line.word 0x08 "DVCHGR,Device State Change Register" bitfld.word 0x08 15. " DVCHG ,Device state change" "Disabled,Enabled" textline "" if (((per.w(ad:0x40090000))&0x40)==0x40) group.word 0x50++0x01 line.word 0x00 "USBADDR,USB Address Register" bitfld.word 0x00 8.--11. " STSRECOV ,Status recovery" ",,,,,,,,,Default state,Address state,Configured state,?..." hexmask.word.BYTE 0x00 0.--6. 1. " USBADDR ,USB address" group.word 0x54++0x07 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.BYTE 0x00 0.--7. 1. " BMREQUESTTYPE ,Request type" hexmask.word.BYTE 0x00 8.--15. 1. " BREQUEST ,Request" line.word 0x02 "USBVAL,USB Request Value Register" line.word 0x04 "USBINDX,USB Request Index Register" line.word 0x06 "USBLENG,USB Request Length Register" else group.word 0x50++0x01 line.word 0x00 "USBADDR,USB Address Register" bitfld.word 0x00 8.--11. " STSRECOV ,Status recovery" ",,,,Low-speed state,,,,Full-speed state,?..." hexmask.word.BYTE 0x00 0.--6. 1. " USBADDR ,USB address" rgroup.word 0x54++0x07 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.BYTE 0x00 0.--7. 1. " BMREQUESTTYPE ,Request type" hexmask.word.BYTE 0x00 8.--15. 1. " BREQUEST ,Request" line.word 0x02 "USBVAL,USB Request Value Register" line.word 0x04 "USBINDX,USB Request Index Register" line.word 0x06 "USBLENG,USB Request Length Register" endif group.word 0x5C++0x05 line.word 0x00 "DCPCFG,DCP Configuration Register" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" line.word 0x02 "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.BYTE 0x02 0.--6. 1. " MXPS ,Maximum packet size" bitfld.word 0x02 12.--15. " DEVSEL ,Device select" "Address 0000b,Address 0001b,Address 0010b,Address 0011b,Address 0100b,Address 0101b,?..." line.word 0x04 "DCPCTR,DCP Control Register" rbitfld.word 0x04 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x04 14. " SUREQ ,Setup token transmission" "No effect,Transmit" bitfld.word 0x04 11. " SUREQCLR ,SUREQ bit clear" "No effect,Clear" bitfld.word 0x04 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" newline bitfld.word 0x04 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x04 6. " SQMON ,Sequence toggle bit monitor" "DATA0,DATA1" rbitfld.word 0x04 5. " PBUSY ,Pipe busy" "Not used,Used" bitfld.word 0x04 2. " CCPL ,Control transfer end enable" "Disabled,Enabled" newline bitfld.word 0x04 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x64++0x01 line.word 0x00 "PIPESEL,Pipe Window Select Register" bitfld.word 0x00 0.--3. " PIPESEL ,Pipe window select" "No pipe,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." if ((((per.w(ad:0x40090000+0x64))&0x0F)==0x00)||(((per.w(ad:0x40090000+0x64))&0x0F)>0x09)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Not used,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Transmitting/receiving,Completion of reading" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." elif (((per.w(ad:0x40090000+0x64))&0x0F)==(0x01||0x02)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Not used,Bulk transfer,,Isochronous transfer" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Transmitting/receiving,Completion of reading" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." elif (((per.w(ad:0x40090000+0x64))&0x0F)==(0x03||0x04||0x05)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Not used,Bulk transfer,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Transmitting/receiving,Completion of reading" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." else group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Not used,,Interrupt transfer,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Transmitting/receiving,Completion of reading" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." endif group.word 0x6C++0x03 line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register" bitfld.word 0x00 12.--15. " DEVSEL ,Device select" "Address 0000b,Address 0001b,Address 0010b,Address 0011b,Address 0100b,Address 0101b,?..." hexmask.word 0x00 0.--8. 1. " MXPS ,Maximum packet size" line.word 0x02 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x02 12. " IFIS ,Isochronous IN buffer flush" "Do not flush,Flush" bitfld.word 0x02 0.--2. " IITV ,Interval error detection interval" "0,1,2,3,4,5,6,7" group.word 0x70++0x01 line.word 0x00 "PIPE1CTR,PIPE1 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Not transmitted,Transmitted" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x72++0x01 line.word 0x00 "PIPE2CTR,PIPE2 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Not transmitted,Transmitted" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x74++0x01 line.word 0x00 "PIPE3CTR,PIPE3 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Not transmitted,Transmitted" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x76++0x01 line.word 0x00 "PIPE4CTR,PIPE4 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Not transmitted,Transmitted" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x78++0x01 line.word 0x00 "PIPE5CTR,PIPE5 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Not transmitted,Transmitted" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7A++0x01 line.word 0x00 "PIPE6CTR,PIPE6 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "Not effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7C++0x01 line.word 0x00 "PIPE7CTR,PIPE7 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "Not effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7E++0x01 line.word 0x00 "PIPE8CTR,PIPE8 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "Not effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x80++0x01 line.word 0x00 "PIPE9CTR,PIPE9 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "Not effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "Not effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not used,Used" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x90++0x01 line.word 0x00 "PIPE1TRE,PIPE1 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,TRENB transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "Not effect,Clear" group.word 0x94++0x01 line.word 0x00 "PIPE2TRE,PIPE2 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,TRENB transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "Not effect,Clear" group.word 0x98++0x01 line.word 0x00 "PIPE3TRE,PIPE3 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,TRENB transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "Not effect,Clear" group.word 0x9C++0x01 line.word 0x00 "PIPE4TRE,PIPE4 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,TRENB transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "Not effect,Clear" group.word 0xA0++0x01 line.word 0x00 "PIPE5TRE,PIPE5 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,TRENB transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "Not effect,Clear" group.word 0x92++0x01 line.word 0x00 "PIPE1TRN,PIPE1 Transaction Counter Register" group.word 0x96++0x01 line.word 0x00 "PIPE2TRN,PIPE2 Transaction Counter Register" group.word 0x9A++0x01 line.word 0x00 "PIPE3TRN,PIPE3 Transaction Counter Register" group.word 0x9E++0x01 line.word 0x00 "PIPE4TRN,PIPE4 Transaction Counter Register" group.word 0xA2++0x01 line.word 0x00 "PIPE5TRN,PIPE5 Transaction Counter Register" group.word 0xD0++0x01 line.word 0x00 "DEVADD0,Device Address 0 Configuration Register" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,?..." group.word 0xD4++0x01 line.word 0x00 "DEVADD1,Device Address 1 Configuration Register" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,?..." group.word 0xD8++0x01 line.word 0x00 "DEVADD2,Device Address 2 Configuration Register" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,?..." group.word 0xDC++0x01 line.word 0x00 "DEVADD3,Device Address 3 Configuration Register" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,?..." group.word 0xE0++0x01 line.word 0x00 "DEVADD4,Device Address 4 Configuration Register" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,?..." group.word 0xE4++0x01 line.word 0x00 "DEVADD5,Device Address 5 Configuration Register" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,?..." group.long 0xF0++0x03 line.long 0x00 "PHYSLEW,PHY Cross Point Adjustment Register" bitfld.long 0x00 3. " SLEWF01 ,Driver cross point adjustment 01" "Host/Device,?..." bitfld.long 0x00 2. " SLEWF00 ,Driver cross point adjustment 00" ",Host/device" bitfld.long 0x00 1. " SLEWR01 ,Driver cross point adjustment 01" "Host/Device,?..." newline bitfld.long 0x00 0. " SLEWR00 ,Driver cross point adjustment 00" ",Host/Device" group.long 0x400++0x07 line.long 0x00 "DPUSR0R,Deep Software Standby USB Transceiver Control/Pin Monitor Register" rbitfld.long 0x00 23. " DVBSTS0 ,USB VBUS input" "0,1" rbitfld.long 0x00 21. " DOVCB0 ,USB OVRCURB input" "0,1" rbitfld.long 0x00 20. " DOVCA0 ,USB OVRCURA input" "0,1" rbitfld.long 0x00 17. " DM0 ,USB d- input" "0,1" newline rbitfld.long 0x00 16. " DP0 ,USB d+ input" "0,1" bitfld.long 0x00 4. " FIXPHY0 ,USB transceiver output fix" "Normal/return from standby,Transition to standby" bitfld.long 0x00 3. " DRPD0 ,D+/D- Pull-Down resistor control" "Disabled,Enabled" bitfld.long 0x00 1. " RPUE0 ,DP Pull-Up resistor control" "Disabled,Enabled" newline bitfld.long 0x00 0. " SRPC0 ,USB single end receiver control" "Disabled,Enabled" line.long 0x04 "DPUSR1R,Deep Software Standby USB Suspend/Resume Interrupt Register" rbitfld.long 0x04 23. " DVBINT0 ,USB VBUS interrupt source recovery" "Not recovered,Recovered" rbitfld.long 0x04 21. " DOVRCRB0 ,USB OVRCURB interrupt source recovery" "Not recovered,Recovered" rbitfld.long 0x04 20. " DOVRCRA0 ,USB OVRCURA interrupt source recovery" "Not recovered,Recovered" rbitfld.long 0x04 17. " DMINT0 ,USB DM interrupt source recovery" "Not recovered,Recovered" newline rbitfld.long 0x04 16. " DPINT0 ,USB DP interrupt source recovery" "Not recovered,Recovered" bitfld.long 0x04 7. " DVBSE0 ,USB VBUS interrupt Enable/Clear" "Disabled,Enabled" bitfld.long 0x04 5. " DOVRCRBE0 ,USB OVRCURB interrupt Enable/Clear" "Disabled,Enabled" bitfld.long 0x04 4. " DOVRCRAE0 ,USB OVRCURA interrupt Enable/Clear" "Disabled,Enabled" newline bitfld.long 0x04 1. " DMINTE0 ,USB DM interrupt Enable/Clear" "Disabled,Enabled" bitfld.long 0x04 0. " DPINTE0 ,USB DP interrupt Enable/Clear" "Disabled,Enabled" width 0x0B tree.end sif cpuis("R7FS5D9*") tree "USBHS (USB 2.0 High-Speed Module)" base ad:0x40060000 width 11. group.word 0x00++0x03 line.word 0x00 "SYSCFG,System Configuration Control Register" bitfld.word 0x00 8. " CNEN ,CNEN single end receiver enable" "Disabled,Enabled" bitfld.word 0x00 7. " HSE ,High-Speed operation enable" "Disabled,Enabled" bitfld.word 0x00 6. " DCFM ,Controller function select" "Device,Host" bitfld.word 0x00 5. " DRPD ,D_Plus/D_Minus line resistor control" "Disabled,Enabled" newline bitfld.word 0x00 4. " DPRPU ,D_Plus line resistor control" "Disabled,Enabled" bitfld.word 0x00 0. " USBE ,USBFS operation enable" "Disabled,Enabled" line.word 0x02 "BUSWAIT,CPU Bus Wait Register" bitfld.word 0x02 0.--3. " BWAIT ,CPU bus access wait specification" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits" if (((per.w(ad:0x40060000))&0x40)==0x40)&&(((per.w(ad:0x40060000+0x08))&0x07)==0x01) rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" sif cpuis("R7FS5D9*") bitfld.word 0x00 5. " SOFEA ,SOF active monitor flag while host controller operation is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "SE0,K-State,J-State,SE1" else bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" newline bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "SE0,K-State,J-State,SE1" endif elif (((per.w(ad:0x40060000+0x08))&0x07)==0x02) rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" sif cpuis("R7FS5D9*") bitfld.word 0x00 5. " SOFEA ,SOF active monitor flag while host controller operation is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "SE0,J-State,K-State,SE1" else bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" newline bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "SE0,J-State,K-State,SE1" endif elif (((per.w(ad:0x40060000+0x08))&0x07)==0x003) rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" sif cpuis("R7FS5D9*") bitfld.word 0x00 5. " SOFEA ,SOF active monitor flag while host controller operation is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "Squelch,Unsquelch,?..." else bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" newline bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "Squelch,Unsquelch,?..." endif else rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x00 15. " OVCMONA ,External USB_OVRCURA input pin monitor" "Low,High" bitfld.word 0x00 14. " OVCMONB ,External USB_OVRCURB input pin monitor" "Low,High" bitfld.word 0x00 6. " HTACT ,USB host sequencer status monitor" "Stopped,Not stopped" sif cpuis("R7FS5D9*") bitfld.word 0x00 5. " SOFEA ,SOF active monitor flag while host controller operation is selected" "Stopped,Not stopped" newline bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "Squelch,Chirp J,Chirp K,?..." else bitfld.word 0x00 2. " IDMON ,External ID0 input pin monitor" "Low,High" newline bitfld.word 0x00 0.--1. " LNST ,USB data line status monitor" "Squelch,Chirp J,Chirp K,?..." endif endif rgroup.word 0x06++0x01 line.word 0x00 "PLLSTA,PLL Status Register" bitfld.word 0x00 0. " PLLLOCK ,PLL lock flag" "Not locked,Locked" if (((per.w(ad:0x40060000))&0x40)==0x40) group.word 0x08++0x01 line.word 0x00 "DVSTCTR0,Device State Control Register 0" bitfld.word 0x00 11. " HNPBTOA ,Host negotiation protocol (HNP) control" "Normal,Suspend" bitfld.word 0x00 10. " EXICEN ,USB_EXICEN output pin control" "Low,High" bitfld.word 0x00 9. " VBUSEN ,USB_VBUSEN output pin control" "Low,High" bitfld.word 0x00 8. " WKUP ,Wakeup output" "Disabled,Enabled" newline bitfld.word 0x00 7. " RWUPE ,Wakeup detection enable" "Disabled,Enabled" bitfld.word 0x00 6. " USBRST ,USB bus reset output" "Disabled,Enabled" bitfld.word 0x00 5. " RESUME ,Resume output" "Disabled,Enabled" bitfld.word 0x00 4. " UACT ,USB bus enable" "Disabled,Enabled" newline rbitfld.word 0x00 0.--2. " RHST ,USB bus reset status" "Indeterminate speed,Low-speed,Full-speed,High-speed,Reset,Reset,Reset,Reset" group.word 0x0C++0x01 line.word 0x00 "TESTMODE,USB Test Mode Register" bitfld.word 0x00 0.--3. " UTST ,Test mode" "Normal,,,,,,,,,Test_J,Test_K,Test_SE0_NAK,Test_Packet,Test_Force_Enable,?..." else group.word 0x08++0x01 line.word 0x00 "DVSTCTR0,Device State Control Register 0" bitfld.word 0x00 11. " HNPBTOA ,Host negotiation protocol (HNP) control" "Normal,Suspend" bitfld.word 0x00 10. " EXICEN ,USB_EXICEN output pin control" "Low,High" bitfld.word 0x00 9. " VBUSEN ,USB_VBUSEN output pin control" "Low,High" bitfld.word 0x00 8. " WKUP ,Wakeup output" "Disabled,Enabled" newline bitfld.word 0x00 7. " RWUPE ,Wakeup detection enable" "Disabled,Enabled" bitfld.word 0x00 6. " USBRST ,USB bus reset output" "Disabled,Enabled" bitfld.word 0x00 5. " RESUME ,Resume output" "Disabled,Enabled" bitfld.word 0x00 4. " UACT ,USB bus enable" "Disabled,Enabled" newline rbitfld.word 0x00 0.--2. " RHST ,USB bus reset status" "Indeterminate speed,Reset/Low-speed,Reset/Full-speed,Reset/High-speed,?..." group.word 0x0C++0x01 line.word 0x00 "TESTMODE,USB Test Mode Register" bitfld.word 0x00 0.--3. " UTST ,Test mode" "Normal,Test_J,Test_K,Test_SE0_NAK,Test_Packet,?..." endif if (((per.w(ad:0x40060000+0x20))&0xC00)==0x0000) group.byte 0x14++0x03 line.byte 0x00 "CFIFOLL,CFIFO Port Register LL" line.byte 0x01 "CFIFOLH,CFIFO Port Register LH" line.byte 0x02 "CFIFOHL,CFIFO Port Register HL" line.byte 0x03 "CFIFOHL,CFIFO Port Register HH" elif (((per.w(ad:0x40060000+0x20))&0xC00)==0x400) group.word 0x14++0x03 line.word 0x00 "CFIFOL,CFIFO Port Register L" line.word 0x02 "CFIFOH,CFIFO Port Register H" elif (((per.w(ad:0x40060000+0x20))&0xC00)==0x400) group.long 0x14++0x03 line.long 0x00 "CFIFO,CFIFO Port Register" else hgroup.long 0x14++0x03 hide.long 0x00 "CFIFO,CFIFO Port Register" in endif if (((per.w(ad:0x40060000+0x28))&0xC00)==0x0000) group.byte 0x18++0x03 line.byte 0x00 "D0FIFOLL,D0FIFO Port Register LL" line.byte 0x01 "D0FIFOLH,D0FIFO Port Register LH" line.byte 0x02 "D0FIFOHL,D0FIFO Port Register HL" line.byte 0x03 "D0FIFOHL,D0FIFO Port Register HH" elif (((per.w(ad:0x40060000+0x28))&0xC00)==0x400) group.word 0x18++0x03 line.word 0x00 "D0FIFOL,D0FIFO Port Register L" line.word 0x02 "D0FIFOH,D0FIFO Port Register H" elif (((per.w(ad:0x40060000+0x28))&0xC00)==0x400) group.long 0x18++0x03 line.long 0x00 "D0FIFO,D0FIFO Port Register" else hgroup.long 0x18++0x03 hide.long 0x00 "D0FIFO,D0FIFO Port Register" in endif if (((per.w(ad:0x40060000+0x2C))&0xC00)==0x0000) group.byte 0x1C++0x03 line.byte 0x00 "D1FIFOLL,D1FIFO Port Register LL" line.byte 0x01 "D1FIFOLH,D1FIFO Port Register LH" line.byte 0x02 "D1FIFOHL,D1FIFO Port Register HL" line.byte 0x03 "D1FIFOHL,D1FIFO Port Register HH" elif (((per.w(ad:0x40060000+0x2C))&0xC00)==0x400) group.word 0x1C++0x03 line.word 0x00 "D1FIFOL,D1FIFO Port Register L" line.word 0x02 "D1FIFOH,D1FIFO Port Register H" elif (((per.w(ad:0x40060000+0x2C))&0xC00)==0x400) group.long 0x1C++0x03 line.long 0x00 "D1FIFO,D1FIFO Port Register" else hgroup.long 0x1C++0x03 hide.long 0x00 "D1FIFO,D1FIFO Port Register" in endif group.word 0x20++0x01 line.word 0x00 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 10.--11. " MBW ,CFIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 8. " BIGEND ,CFIFO port endian control" "Little,Big" newline bitfld.word 0x00 5. " ISEL ,CFIFO port access direction when DCP is selected" "Reading,Writing" bitfld.word 0x00 0.--3. " CURPIPE ,CFIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." group.word 0x28++0x01 line.word 0x00 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" bitfld.word 0x00 12. " DREQE ,DMA/DTC transfer request enable" "Disabled,Enabled" newline bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 8. " BIGEND ,FIFO port endian control" "Little,Big" bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." group.word 0x2C++0x01 line.word 0x00 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" bitfld.word 0x00 12. " DREQE ,DMA/DTC transfer request enable" "Disabled,Enabled" newline bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 8. " BIGEND ,FIFO port endian control" "Little,Big" bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,?..." group.word 0x22++0x01 line.word 0x00 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x00 15. " BVAL ,Buffer memory valid flag" "Not valid,Valid" bitfld.word 0x00 14. " BCLR ,CPU buffer clear" "No effect,Clear" rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled" hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length" group.word 0x2A++0x01 line.word 0x00 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x00 15. " BVAL ,Buffer memory valid flag" "Not valid,Valid" bitfld.word 0x00 14. " BCLR ,CPU buffer clear" "No effect,Clear" rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled" hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length" group.word 0x2E++0x01 line.word 0x00 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x00 15. " BVAL ,Buffer memory valid flag" "Not valid,Valid" bitfld.word 0x00 14. " BCLR ,CPU buffer clear" "No effect,Clear" rbitfld.word 0x00 13. " FRDY ,FIFO port ready" "Disabled,Enabled" hexmask.word 0x00 0.--11. 1. " DTLN ,Receive data length" group.word 0x30++0x03 line.word 0x00 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x00 15. " VBSE ,VBUS interrupt enable" "Disabled,Enabled" bitfld.word 0x00 14. " RSME ,Resume interrupt enable" "Disabled,Enabled" bitfld.word 0x00 13. " SOFE ,Frame number update interrupt enable" "Disabled,Enabled" bitfld.word 0x00 12. " DVSE ,Device state transition interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 11. " CTRE ,Control transfer stage transition interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " BEMPE ,Buffer empty interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " NRDYE ,Buffer not ready response interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " BRDYE ,Buffer ready interrupt enable" "Disabled,Enabled" line.word 0x02 "INTENB1,Interrupt Enable Register 1" bitfld.word 0x02 15. " OVRCRE ,Overcurrent input change interrupt enable" "Disabled,Enabled" bitfld.word 0x02 15. " BCHGE ,USB bus change interrupt enable" "Disabled,Enabled" bitfld.word 0x02 12. " DTCHE ,Disconnection detection interrupt enable" "Disabled,Enabled" bitfld.word 0x02 11. " ATTCHE ,Connection detection interrupt enable" "Disabled,Enabled" newline bitfld.word 0x02 9. " L1RSMENDE ,L1 resume end interrupt enable" "Disabled,Enabled" bitfld.word 0x02 8. " LPMENDE ,LPM transaction end interrupt request enable" "Disabled,Enabled" bitfld.word 0x02 6. " EOFERRE ,EOF error detection interrupt enable" "Disabled,Enabled" bitfld.word 0x02 5. " SIGNE ,Setup transaction error interrupt enable" "Disabled,Enabled" newline bitfld.word 0x02 4. " SACKE ,Setup transaction normal response interrupt enable" "Disabled,Enabled" bitfld.word 0x02 0. " PDDETINTE ,PDDETINT detection interrupt enable" "Disabled,Enabled" group.word 0x36++0x09 line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register" bitfld.word 0x00 9. " PIPE9BRDYE ,BRDY interrupt enable for PIPE9" "Disabled,Enabled" bitfld.word 0x00 8. " PIPE8BRDYE ,BRDY interrupt enable for PIPE8" "Disabled,Enabled" bitfld.word 0x00 7. " PIPE7BRDYE ,BRDY interrupt enable for PIPE7" "Disabled,Enabled" bitfld.word 0x00 6. " PIPE6BRDYE ,BRDY interrupt enable for PIPE6" "Disabled,Enabled" newline bitfld.word 0x00 5. " PIPE5BRDYE ,BRDY interrupt enable for PIPE5" "Disabled,Enabled" bitfld.word 0x00 4. " PIPE4BRDYE ,BRDY interrupt enable for PIPE4" "Disabled,Enabled" bitfld.word 0x00 3. " PIPE3BRDYE ,BRDY interrupt enable for PIPE3" "Disabled,Enabled" bitfld.word 0x00 2. " PIPE2BRDYE ,BRDY interrupt enable for PIPE2" "Disabled,Enabled" newline bitfld.word 0x00 1. " PIPE1BRDYE ,BRDY interrupt enable for PIPE1" "Disabled,Enabled" bitfld.word 0x00 0. " PIPE0BRDYE ,BRDY interrupt enable for PIPE0" "Disabled,Enabled" line.word 0x02 "NRDYENN,NRDY Interrupt Enable Register" bitfld.word 0x02 9. " PIPE9NRDYE ,NRDY interrupt enable for PIPE9" "Disabled,Enabled" bitfld.word 0x02 8. " PIPE8NRDYE ,NRDY interrupt enable for PIPE8" "Disabled,Enabled" bitfld.word 0x02 7. " PIPE7NRDYE ,NRDY interrupt enable for PIPE7" "Disabled,Enabled" bitfld.word 0x02 6. " PIPE6NRDYE ,NRDY interrupt enable for PIPE6" "Disabled,Enabled" newline bitfld.word 0x02 5. " PIPE5NRDYE ,NRDY interrupt enable for PIPE5" "Disabled,Enabled" bitfld.word 0x02 4. " PIPE4NRDYE ,NRDY interrupt enable for PIPE4" "Disabled,Enabled" bitfld.word 0x02 3. " PIPE3NRDYE ,NRDY interrupt enable for PIPE3" "Disabled,Enabled" bitfld.word 0x02 2. " PIPE2NRDYE ,NRDY interrupt enable for PIPE2" "Disabled,Enabled" newline bitfld.word 0x02 1. " PIPE1NRDYE ,NRDY interrupt enable for PIPE1" "Disabled,Enabled" bitfld.word 0x02 0. " PIPE0NRDYE ,NRDY interrupt enable for PIPE0" "Disabled,Enabled" line.word 0x04 "BEMPENB,BEMP Interrupt Enable Register" bitfld.word 0x04 9. " PIPE9BEMPE ,BEMP interrupt enable for PIPE9" "Disabled,Enabled" bitfld.word 0x04 8. " PIPE8BEMPE ,BEMP interrupt enable for PIPE8" "Disabled,Enabled" bitfld.word 0x04 7. " PIPE7BEMPE ,BEMP interrupt enable for PIPE7" "Disabled,Enabled" bitfld.word 0x04 6. " PIPE6BEMPE ,BEMP interrupt enable for PIPE6" "Disabled,Enabled" newline bitfld.word 0x04 5. " PIPE5BEMPE ,BEMP interrupt enable for PIPE5" "Disabled,Enabled" bitfld.word 0x04 4. " PIPE4BEMPE ,BEMP interrupt enable for PIPE4" "Disabled,Enabled" bitfld.word 0x04 3. " PIPE3BEMPE ,BEMP interrupt enable for PIPE3" "Disabled,Enabled" bitfld.word 0x04 2. " PIPE2BEMPE ,BEMP interrupt enable for PIPE2" "Disabled,Enabled" newline bitfld.word 0x04 1. " PIPE1BEMPE ,BEMP interrupt enable for PIPE1" "Disabled,Enabled" bitfld.word 0x04 0. " PIPE0BEMPE ,BEMP interrupt enable for PIPE0" "Disabled,Enabled" line.word 0x06 "SOFCFG,SOF Output Configuration Register" bitfld.word 0x06 8. " TRNENSEL ,Transaction-Enabled time select" "Not low-speed,Low-speed" bitfld.word 0x06 6. " BRDYM ,BRDY interrupt status clear timing" "Software,USBFS" rbitfld.word 0x06 5. " INTL ,Interrupt output sense select" "Edge,Level" rbitfld.word 0x06 4. " EDGESTS ,Edge interrupt output status monitor" "Not processing,Processing" line.word 0x08 "PHYSET,PHY Setting Register" bitfld.word 0x08 15. " HSEB ,CL-only mode" "Disabled,Enabled" bitfld.word 0x08 11. " REPSTART ,Forcibly start terminating resistance adjustment" "Forced,Not forced" bitfld.word 0x08 8.--9. " REPSEL ,Terminating resistance adjustment cycle" "Disabled,16-second,64-second,128-second" bitfld.word 0x08 4.--5. " CLKSEL ,Input system clock frequency" "12MHz,,20MHz,24MHz" newline bitfld.word 0x08 3. " CDPEN ,Charging downstream port enable" "Disabled,Enabled" bitfld.word 0x08 1. " PLLRESET ,PLL reset control" "Disabled,Enabled" bitfld.word 0x08 0. " DIRPD ,Power-Down control" "Disabled,Enabled" if (((per.w(ad:0x40060000))&0x40)==0x40) group.word 0x40++0x01 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 14. " RESM ,Resume interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "No interrupt,Interrupt" newline bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "No interrupt,Interrupt" newline rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High" else group.word 0x40++0x01 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 14. " RESM ,Resume interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "No interrupt,Interrupt" newline bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "No interrupt,Interrupt" newline rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High" rbitfld.word 0x00 4.--6. " DVSQ ,Device state" "Powered state,Default state,Address state,Configured state,Suspended state,Suspended state,Suspended state,Suspended state" bitfld.word 0x00 3. " VALID ,USB request reception" "Not received,Received" rbitfld.word 0x00 0.--2. " CTSQ ,Control transfer stage" "Idle or setup,Read data,Read status,Write data,Write status,Write (no data) status,Transfer sequence error,?..." endif group.word 0x42++0x01 line.word 0x00 "INTSTS1,Interrupt Status Register 1" bitfld.word 0x00 15. " OVRCR ,Over current input change interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 14. " BCHG ,USB bus change interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 12. " DTCH ,USB disconnection detection interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 11. " ATTCH ,ATTCH interrupt status" "No interrupt,Interrupt" newline bitfld.word 0x00 9. " L1RSMEND ,L1 resume end interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 8. " LPMEND ,LPM transaction end interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 6. " EOFERR ,EOF error detection interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 5. " SIGN ,Setup transaction error interrupt status" "No interrupt,Interrupt" newline bitfld.word 0x00 4. " SACK ,Setup transaction normal response interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 0. " PDDETINT0 ,PDDET0 detection interrupt status" "No interrupt,Interrupt" group.word 0x46++0x09 line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register" bitfld.word 0x00 9. " PIPE9BRDY ,BRDY interrupt status for PIPE9" "No interrupt,Interrupt" bitfld.word 0x00 8. " PIPE8BRDY ,BRDY interrupt status for PIPE8" "No interrupt,Interrupt" bitfld.word 0x00 7. " PIPE7BRDY ,BRDY interrupt status for PIPE7" "No interrupt,Interrupt" bitfld.word 0x00 6. " PIPE6BRDY ,BRDY interrupt status for PIPE6" "No interrupt,Interrupt" newline bitfld.word 0x00 5. " PIPE5BRDY ,BRDY interrupt status for PIPE5" "No interrupt,Interrupt" bitfld.word 0x00 4. " PIPE4BRDY ,BRDY interrupt status for PIPE4" "No interrupt,Interrupt" bitfld.word 0x00 3. " PIPE3BRDY ,BRDY interrupt status for PIPE3" "No interrupt,Interrupt" bitfld.word 0x00 2. " PIPE2BRDY ,BRDY interrupt status for PIPE2" "No interrupt,Interrupt" newline bitfld.word 0x00 1. " PIPE1BRDY ,BRDY interrupt status for PIPE1" "No interrupt,Interrupt" bitfld.word 0x00 0. " PIPE0BRDY ,BRDY interrupt status for PIPE0" "No interrupt,Interrupt" line.word 0x02 "NRDYSTS,NRDY Interrupt Status Register" bitfld.word 0x02 9. " PIPE9NRDY ,NRDY interrupt status for PIPE9" "No interrupt,Interrupt" bitfld.word 0x02 8. " PIPE8NRDY ,NRDY interrupt status for PIPE8" "No interrupt,Interrupt" bitfld.word 0x02 7. " PIPE7NRDY ,NRDY interrupt status for PIPE7" "No interrupt,Interrupt" bitfld.word 0x02 6. " PIPE6NRDY ,NRDY interrupt status for PIPE6" "No interrupt,Interrupt" newline bitfld.word 0x02 5. " PIPE5NRDY ,NRDY interrupt status for PIPE5" "No interrupt,Interrupt" bitfld.word 0x02 4. " PIPE4NRDY ,NRDY interrupt status for PIPE4" "No interrupt,Interrupt" bitfld.word 0x02 3. " PIPE3NRDY ,NRDY interrupt status for PIPE3" "No interrupt,Interrupt" bitfld.word 0x02 2. " PIPE2NRDY ,NRDY interrupt status for PIPE2" "No interrupt,Interrupt" newline bitfld.word 0x02 1. " PIPE1NRDY ,NRDY interrupt status for PIPE1" "No interrupt,Interrupt" bitfld.word 0x02 0. " PIPE0NRDY ,NRDY interrupt status for PIPE0" "No interrupt,Interrupt" line.word 0x04 "BEMPSTS,BEMP Interrupt Status Register" bitfld.word 0x04 9. " PIPE9BEMP ,BEMP interrupt status for PIPE9" "No interrupt,Interrupt" bitfld.word 0x04 8. " PIPE8BEMP ,BEMP interrupt status for PIPE8" "No interrupt,Interrupt" bitfld.word 0x04 7. " PIPE7BEMP ,BEMP interrupt status for PIPE7" "No interrupt,Interrupt" bitfld.word 0x04 6. " PIPE6BEMP ,BEMP interrupt status for PIPE6" "No interrupt,Interrupt" newline bitfld.word 0x04 5. " PIPE5BEMP ,BEMP interrupt status for PIPE5" "No interrupt,Interrupt" bitfld.word 0x04 4. " PIPE4BEMP ,BEMP interrupt status for PIPE4" "No interrupt,Interrupt" bitfld.word 0x04 3. " PIPE3BEMP ,BEMP interrupt status for PIPE3" "No interrupt,Interrupt" bitfld.word 0x04 2. " PIPE2BEMP ,BEMP interrupt status for PIPE2" "No interrupt,Interrupt" newline bitfld.word 0x04 1. " PIPE1BEMP ,BEMP interrupt status for PIPE1" "No interrupt,Interrupt" bitfld.word 0x04 0. " PIPE0BEMP ,BEMP interrupt status for PIPE0" "No interrupt,Interrupt" line.word 0x06 "FRMNUM,Frame Number Register" bitfld.word 0x06 15. " OVRN ,Overrun/Underrun detection status" "No error,Error" bitfld.word 0x06 14. " CRCE ,Receive data error" "No error,Error" hexmask.word 0x06 0.--10. 1. " FRNM ,Frame number" line.word 0x08 "UFRMNUM,uFrame Number Register" bitfld.word 0x08 15. " DVCHG ,Device state change" "Disabled,Enabled" rbitfld.word 0x08 0.--2. " UFRNM ,Microframe number" "0,1,2,3,4,5,6,7" if (((per.w(ad:0x40060000))&0x40)==0x40) group.word 0x50++0x01 line.word 0x00 "USBADDR,USB Address Register" bitfld.word 0x00 8.--10. " STSRECOV0 ,Status recovery" ",,Low-speed,Full-speed,High-speed,?..." hexmask.word.byte 0x00 0.--6. 1. " USBADDR ,Address flag" else group.word 0x50++0x01 line.word 0x00 "USBADDR,USB Address Register" bitfld.word 0x00 8.--10. " STSRECOV0 ,Status recovery" ",Default state,Address state,Configured state,,Default state,Address state,Configured state" hexmask.word.byte 0x00 0.--6. 1. " USBADDR ,Address flag" endif if (((per.w(ad:0x40060000))&0x40)==0x00) rgroup.word 0x54++0x07 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.byte 0x00 8.--15. 1. " BREQUEST ,Request" hexmask.word.byte 0x00 0.--7. 1. " BMREQUESTTYPE ,Request type" line.word 0x02 "USBVAL,USB Request Value Register" line.word 0x04 "USBINDX,USB Request Index Register" line.word 0x06 "USBLENG,USB Request Length Register" else group.word 0x54++0x07 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.byte 0x00 8.--15. 1. " BREQUEST ,Request" hexmask.word.byte 0x00 0.--7. 1. " BMREQUESTTYPE ,Request type" line.word 0x02 "USBVAL,USB Request Value Register" line.word 0x04 "USBINDX,USB Request Index Register" line.word 0x06 "USBLENG,USB Request Length Register" endif group.word 0x5C++0x05 line.word 0x00 "DCPCFG,DCP Configuration Register" bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Disabled,Enabled" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Received,Transmitted" line.word 0x02 "DCPMAXP,DCP Maximum Packet Size Register" bitfld.word 0x02 12.--15. " DEVSEL ,Device select" "0000,0001,0010,0011,0100,0101,?..." hexmask.word.byte 0x02 0.--6. 1. " MXPS ,Maximum packet size" line.word 0x04 "DCPCTR,DCP Control Register" rbitfld.word 0x04 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x04 14. " SUREQ ,Setup token transmission" "No effect,Transmitted" bitfld.word 0x04 13. " CSCLR ,CSSTS status flag clear" "No effect,Clear" bitfld.word 0x04 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" newline bitfld.word 0x04 11. " SUREQCLR ,SUREQ bit clear" "No effect,Clear" bitfld.word 0x04 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" bitfld.word 0x04 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x04 6. " SQMON ,Sequence toggle bit monitor" "DATA0,DATA1" newline rbitfld.word 0x04 5. " PBUSY ,Pipe busy" "Not used,Used" bitfld.word 0x04 4. " PINGE ,PING token issue enable" "Disabled,Enabled" bitfld.word 0x04 2. " CCPL ,Control transfer end enable" "Disabled,Enabled" bitfld.word 0x04 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x64++0x01 line.word 0x00 "PIPESEL,Pipe Window Select Register" bitfld.word 0x00 0.--3. " PIPESEL ,Pipe window select" "No pipe,PIPE1,PIPE2,PIPE3,PIPE4,PIPE5,PIPE6,PIPE7,PIPE8,PIPE9,?..." if (((per.w(ad:0x40060000+0x64))&0xF)==0x00) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "TX/RX,Completion" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" sif cpuis("R7FS5D9*") bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Discontinuous,Continuous" newline bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" newline bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif (((per.w(ad:0x40060000+0x64))&0xF)==0x1)||(((per.w(ad:0x40060000+0x64))&0xF)==0x02) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Pipe not used,Bulk,,Isochronous" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "TX/RX,Completion" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" sif cpuis("R7FS5D9*") bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Discontinuous,Continuous" newline bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif (((per.w(ad:0x40060000+0x64))&0xF)==0x3)||(((per.w(ad:0x40060000+0x64))&0xF)==0x04)||(((per.w(ad:0x40060000+0x64))&0xF)==0x5) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Pipe not used,Bulk,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "TX/RX,Completion" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" sif cpuis("R7FS5D9*") bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Discontinuous,Continuous" newline bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif elif (((per.w(ad:0x40060000+0x64))&0xF)==0x06)||(((per.w(ad:0x40060000+0x64))&0xF)==0x7)||(((per.w(ad:0x40060000+0x64))&0xF)==0x08)||(((per.w(ad:0x40060000+0x64))&0xF)==0x9) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Pipe not used,,Interrupt,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "TX/RX,Completion" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" sif cpuis("R7FS5D9*") bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Discontinuous,Continuous" newline bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "No,Yes" newline bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Transmitting" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "Not used,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 B,128 B,192 B,256 B,320 B,384 B,448 B,512 B,576 B,640 B,704 B,768 B,832 B,896 B,960 B,1024 B,1088 B,1152 B,1216 B,1280 B,1344 B,1408 B,1472 B,1536 B,1600 B,1664 B,1728 B,1792 B,1856 B,1920 B,1984 B,2048 B" hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" group.word 0x6C++0x03 line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register" bitfld.word 0x00 12.--15. " DEVSEL ,Device select" "Address 0000,Address 0001,Address 0010,Address 0011,Address 0100,Address 0101,?..." sif cpuis("R7FS5D9*") hexmask.word 0x00 0.--10. 1. " MXPS ,Maximum packet size" else hexmask.word 0x00 0.--8. 1. " MXPS ,Maximum packet size" endif line.word 0x02 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x02 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed" bitfld.word 0x02 0.--2. " IITV ,Interval error detection interval" "1,2,4,8,16,32,64,128" group.word 0x70++0x01 line.word 0x00 "PIPE1CTR,PIPE1 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Empty,Not empty" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" newline bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x72++0x01 line.word 0x00 "PIPE2CTR,PIPE2 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Empty,Not empty" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" newline bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x74++0x01 line.word 0x00 "PIPE3CTR,PIPE3 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Empty,Not empty" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" newline bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x76++0x01 line.word 0x00 "PIPE4CTR,PIPE4 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Empty,Not empty" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" newline bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x78++0x01 line.word 0x00 "PIPE5CTR,PIPE5 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,Transmit buffer monitor" "Empty,Not empty" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" newline bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Clear" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" newline rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7A++0x01 line.word 0x00 "PIPE6CTR,PIPE6 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Cleared" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7C++0x01 line.word 0x00 "PIPE7CTR,PIPE7 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Cleared" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7E++0x01 line.word 0x00 "PIPE8CTR,PIPE8 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Cleared" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x80++0x01 line.word 0x00 "PIPE9CTR,PIPE9 Control Registers" rbitfld.word 0x00 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x00 13. " CSCLR ,CSSTS status clear" "No effect,Clear" rbitfld.word 0x00 12. " CSSTS ,CSSTS status flag" "Start-split,Complete-split" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" newline bitfld.word 0x00 8. " SQCLR ,Sequence toggle bit clear" "No effect,Cleared" bitfld.word 0x00 7. " SQSET ,Sequence toggle bit set" "No effect,Set" rbitfld.word 0x00 6. " SQMON ,Sequence toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" newline bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x90++0x01 line.word 0x00 "PIPE1TRE,PIPE1 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "No effect,Cleared" group.word 0x94++0x01 line.word 0x00 "PIPE6TRE,PIPE6 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "No effect,Cleared" group.word 0x98++0x01 line.word 0x00 "PIPE11TRE,PIPE11 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "No effect,Cleared" group.word 0x9C++0x01 line.word 0x00 "PIPE16TRE,PIPE16 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "No effect,Cleared" group.word 0xA0++0x01 line.word 0x00 "PIPE21TRE,PIPE21 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" "No effect,Cleared" group.word 0x92++0x01 line.word 0x00 "PIPE1TRN,PIPE1 Transaction Counter Register" group.word 0x96++0x01 line.word 0x00 "PIPE6TRN,PIPE6 Transaction Counter Register" group.word 0x9A++0x01 line.word 0x00 "PIPE11TRN,PIPE11 Transaction Counter Register" group.word 0x9E++0x01 line.word 0x00 "PIPE16TRN,PIPE16 Transaction Counter Register" group.word 0xA2++0x01 line.word 0x00 "PIPE21TRN,PIPE21 Transaction Counter Register" group.word 0xD0++0x01 line.word 0x00 "DEVADD0,Device Address 0 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xD2++0x01 line.word 0x00 "DEVADD1,Device Address 1 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xD4++0x01 line.word 0x00 "DEVADD2,Device Address 2 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xD6++0x01 line.word 0x00 "DEVADD3,Device Address 3 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xD8++0x01 line.word 0x00 "DEVADD4,Device Address 4 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xDA++0x01 line.word 0x00 "DEVADD5,Device Address 5 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xDC++0x01 line.word 0x00 "DEVADD6,Device Address 6 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xDE++0x01 line.word 0x00 "DEVADD7,Device Address 7 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xE0++0x01 line.word 0x00 "DEVADD8,Device Address 8 Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0xE4++0x01 line.word 0x00 "DEVADDA,Device Address A Configuration Register" bitfld.word 0x00 11.--14. " UPPHUB ,Communication target connecting hub register" "Direct,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,USB hub,?..." bitfld.word 0x00 8.--10. " HUBPORT ,Communication target connecting hub port" "Direct,1,2,3,4,5,6,7" bitfld.word 0x00 6.--7. " USBSPD ,Transfer speed of communication target device" "Not used,Low-speed,Full-speed,High-speed" group.word 0x100++0x03 line.word 0x00 "LPCTRL,Low Power Control Register" bitfld.word 0x00 7. " HWUPM ,Resume return mode setting" "No recover,Recover" line.word 0x02 "LPSTS,Low Power Status Register" bitfld.word 0x02 14. " SUSPENDM ,UTMI SuspendM control" "Suspended,Normal" group.word 0x140++0x01 line.word 0x00 "BCCTRL,Battery Charging Control Register" rbitfld.word 0x00 9. " PDDETSTS ,PDDET status flag" "Low,High" rbitfld.word 0x00 8. " CHGDETSTS ,CHGDET status flag" "Low,High" bitfld.word 0x00 5. " DCPMODE ,DCP mode control" "Disabled,Enabled" bitfld.word 0x00 4. " VDMSRCE ,VDMSRC control" "Disabled,Enabled" newline bitfld.word 0x00 3. " IDPSINKE ,IDPSINK control" "Disabled,Enabled" bitfld.word 0x00 2. " VDPSRCE ,VDPSRC control" "Disabled,Enabled" bitfld.word 0x00 1. " IDMSINKE ,IDMSINK control" "Disabled,Enabled" bitfld.word 0x00 0. " IDPSRCE ,IDPSRC control" "Disabled,Enabled" group.word 0x144++0x01 line.word 0x00 "PL1CTRL1,Function L1 Control Register 1" bitfld.word 0x00 14. " L1EXTMD ,PHY control mode at l1 return" "Not set,Set" bitfld.word 0x00 8.--11. " HIRDTHR ,L1 response negotiation threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 4.--7. " DVSQ ,DVSQ extension flag" "Powered state,Default state,Address state,Configured state,Suspend state,Suspend state,Suspend state,Suspend state,L1 state,L1 state,L1 state,L1 state,?..." bitfld.word 0x00 3. " L1NEGOMD ,L1 response negotiation control" "Larger,Smaller" newline bitfld.word 0x00 1.--2. " L1RESPMD ,L1 response mode" "NYET,ACK,STALL,L1NEGOMD" bitfld.word 0x00 0. " L1RESPEN ,L1 response enable" "Disabled,Enabled" rgroup.word 0x146++0x01 line.word 0x00 "PL1CTRL2,Function L1 Control Register 2" bitfld.word 0x00 12. " RWEMON ,RWE value monitor" "0,1" bitfld.word 0x00 8.--11. " HIRDMON ,HIRD value monitor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.word 0x148++0x01 line.word 0x00 "HL1CTRL1,Host L1 Control Register 1" rbitfld.word 0x00 1.--2. " L1STATUS ,L1 request completion status" "ACK,NYET,STALL,Error" bitfld.word 0x00 0. " L1REQ ,L1 transition request" "No request,Request" if (((per.w(ad:0x40060000+0x14A))&0x8000)==0x00000) group.word 0x14A++0x01 line.word 0x00 "HL1CTRL2,Host L1 Control Register 2" bitfld.word 0x00 15. " BESL ,BESL & alternate HIRD" "Low,High" bitfld.word 0x00 12. " L1RWE ,LPM token l1 RemoteWake enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " HIRD ,LPM token HIRD" ",125 us,200 us,275 us,350 us,425 us,500 us,575 us,650 us,725 us,800 us,875 us,950 us,?..." bitfld.word 0x00 0.--3. " L1ADDR ,LPM token DeviceAddress" "0,1,2,3,4,5,6,,8,9,10,11,12,13,14,15" else group.word 0x14A++0x01 line.word 0x00 "HL1CTRL2,Host L1 Control Register 2" bitfld.word 0x00 15. " BESL ,BESL & alternate HIRD" "Low,High" bitfld.word 0x00 12. " L1RWE ,LPM token l1 RemoteWake enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " HIRD ,LPM token HIRD" "75 us,100 us,150 us,250 us,350 us,450 us,950 us,1950 us,2950 us,3950 us,4950 us,5950 us,6950 us,7950 us,8950 us,9950 us" bitfld.word 0x00 0.--3. " L1ADDR ,LPM token DeviceAddress" "0,1,2,3,4,5,6,,8,9,10,11,12,13,14,15" endif group.long 0x160++0x07 line.long 0x00 "DPUSR0R,Deep Software Standby USB Transceiver Control/Pin Monitor Register" bitfld.long 0x00 23. " DVBSTSHM ,VBUS input flag" "0,1" bitfld.long 0x00 21. " DOVCBHM ,OVRCURB input flag" "0,1" bitfld.long 0x00 20. " DOVCAHM ,OVRCURA input flag" "0,1" line.long 0x04 "DPUSR1R,Deep Software Standby USB Suspend/Resume Interrupt Register" rbitfld.long 0x04 23. " DVBSTSH ,VBUS interrupt source return status flag" "Not recovered,Recovered" rbitfld.long 0x04 21. " DOVCBH ,OVRCURB interrupt source return status flag" "Not recovered,Recovered" rbitfld.long 0x04 20. " DOVCAH ,OVRCURA interrupt source return status flag" "Not recovered,Recovered" newline bitfld.long 0x04 7. " DVBSTSHE ,VBUS interrupt enable/clear" "Disabled,Enabled" bitfld.long 0x04 5. " DOVCBHE ,OVRCURB interrupt enable/clear" "Disabled,Enabled" bitfld.long 0x04 4. " DOVCAHE ,OVRCURA interrupt enable/clear" "Disabled,Enabled" group.word 0x168++0x003 line.word 0x00 "DPUSR2R,Deep Software Standby USB Suspend/Resume Interrupt Register" bitfld.word 0x00 9. " DMINTE ,DM interrupt enable/clear" "Disabled,Enabled" bitfld.word 0x00 8. " DPINTE ,DP interrupt enable/clear" "Disabled,Enabled" rbitfld.word 0x00 5. " DMVAL ,DM input" "0,1" rbitfld.word 0x00 4. " DPVAL ,DP input" "0,1" newline rbitfld.word 0x00 1. " DMINT ,Indication of return from DM interrupt source" "Not recovered,Recovered" rbitfld.word 0x00 0. " DPINT ,Indication of return from DP interrupt source" "Not recovered,Recovered" line.word 0x02 "DPUSRCR,Deep Software Standby USB Suspend/Resume Command Register" bitfld.word 0x02 1. " FIXPHYPD ,USB transceiver control fix for PLL" "Normal,Invoke/recover" bitfld.word 0x02 0. " FIXPHY ,USB transceiver control fix" "Normal,Invoke/recover" width 0x0B tree.end endif tree.open "SCI (Serial Communications Interface)" tree "SCI0" base ad:0x40070000 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070000+0x14))&0x01)==0x01) if (((per.b(ad:0x40070000))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070000+0x14))&0x01)==0x01) if (((per.b(ad:0x40070000))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070000+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070000))&0x20)==0x00) if (((per.b(ad:0x40070000+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070000+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070000))&0x10)==0x00) if (((per.b(ad:0x40070000+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070000+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070000+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070000))&0x04)==0x04) if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK0,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK0,External,External" endif else if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK0,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK0,External,External" endif endif else if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) if (((per.b(ad:0x40070000))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070000+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070000+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070000+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070000+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070000+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070000))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070000))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) if (((per.b(ad:0x40070000))&0x80)==0x00) if (((per.b(ad:0x40070000+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070000+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070000+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070000+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) if (((per.b(ad:0x40070000+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070000+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070000+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070000+0x02))&0x10)==0x00) if (((per.w(ad:0x40070000+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070000+0x06))&0x01)==0x00) if (((per.w(ad:0x40070000+0x14))&0x01)==0x01) if (((per.b(ad:0x40070000+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070000+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070000+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070000+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070000))&0x80)==0x00)&&(((per.b(ad:0x40070000+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI1" base ad:0x40070020 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070020+0x14))&0x01)==0x01) if (((per.b(ad:0x40070020))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070020+0x14))&0x01)==0x01) if (((per.b(ad:0x40070020))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070020+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070020))&0x20)==0x00) if (((per.b(ad:0x40070020+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070020+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070020))&0x10)==0x00) if (((per.b(ad:0x40070020+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070020+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070020+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070020))&0x04)==0x04) if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK1,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK1,External,External" endif else if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK1,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK1,External,External" endif endif else if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) if (((per.b(ad:0x40070020))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070020+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070020+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070020+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070020+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070020+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070020))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070020))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) if (((per.b(ad:0x40070020))&0x80)==0x00) if (((per.b(ad:0x40070020+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070020+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070020+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070020+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) if (((per.b(ad:0x40070020+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070020+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070020+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070020+0x02))&0x10)==0x00) if (((per.w(ad:0x40070020+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070020+0x06))&0x01)==0x00) if (((per.w(ad:0x40070020+0x14))&0x01)==0x01) if (((per.b(ad:0x40070020+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070020+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070020+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070020+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070020))&0x80)==0x00)&&(((per.b(ad:0x40070020+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI2" base ad:0x40070040 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070040+0x14))&0x01)==0x01) if (((per.b(ad:0x40070040))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070040+0x14))&0x01)==0x01) if (((per.b(ad:0x40070040))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070040+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070040))&0x20)==0x00) if (((per.b(ad:0x40070040+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070040+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070040))&0x10)==0x00) if (((per.b(ad:0x40070040+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070040+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070040+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070040))&0x04)==0x04) if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK2,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK2,External,External" endif else if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK2,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK2,External,External" endif endif else if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) if (((per.b(ad:0x40070040))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070040+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070040+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070040+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070040+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070040+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070040))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070040))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) if (((per.b(ad:0x40070040))&0x80)==0x00) if (((per.b(ad:0x40070040+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070040+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070040+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070040+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) if (((per.b(ad:0x40070040+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070040+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070040+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070040+0x02))&0x10)==0x00) if (((per.w(ad:0x40070040+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070040+0x06))&0x01)==0x00) if (((per.w(ad:0x40070040+0x14))&0x01)==0x01) if (((per.b(ad:0x40070040+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070040+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070040+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070040+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070040))&0x80)==0x00)&&(((per.b(ad:0x40070040+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI3" base ad:0x40070060 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070060+0x14))&0x01)==0x01) if (((per.b(ad:0x40070060))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070060+0x14))&0x01)==0x01) if (((per.b(ad:0x40070060))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070060+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070060))&0x20)==0x00) if (((per.b(ad:0x40070060+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070060+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070060))&0x10)==0x00) if (((per.b(ad:0x40070060+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070060+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070060+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070060))&0x04)==0x04) if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK3,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK3,External,External" endif else if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK3,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK3,External,External" endif endif else if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) if (((per.b(ad:0x40070060))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070060+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070060+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070060+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070060+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070060+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070060))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070060))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) if (((per.b(ad:0x40070060))&0x80)==0x00) if (((per.b(ad:0x40070060+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070060+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070060+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070060+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) if (((per.b(ad:0x40070060+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070060+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070060+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070060+0x02))&0x10)==0x00) if (((per.w(ad:0x40070060+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070060+0x06))&0x01)==0x00) if (((per.w(ad:0x40070060+0x14))&0x01)==0x01) if (((per.b(ad:0x40070060+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070060+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070060+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070060+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070060))&0x80)==0x00)&&(((per.b(ad:0x40070060+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI4" base ad:0x40070080 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070080+0x14))&0x01)==0x01) if (((per.b(ad:0x40070080))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070080+0x14))&0x01)==0x01) if (((per.b(ad:0x40070080))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070080+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070080))&0x20)==0x00) if (((per.b(ad:0x40070080+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070080+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070080))&0x10)==0x00) if (((per.b(ad:0x40070080+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070080+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070080+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070080))&0x04)==0x04) if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK4,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK4,External,External" endif else if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK4,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK4,External,External" endif endif else if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) if (((per.b(ad:0x40070080))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070080+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070080+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070080+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070080+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070080+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070080))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070080))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) if (((per.b(ad:0x40070080))&0x80)==0x00) if (((per.b(ad:0x40070080+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070080+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070080+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070080+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) if (((per.b(ad:0x40070080+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070080+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070080+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070080+0x02))&0x10)==0x00) if (((per.w(ad:0x40070080+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070080+0x06))&0x01)==0x00) if (((per.w(ad:0x40070080+0x14))&0x01)==0x01) if (((per.b(ad:0x40070080+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070080+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070080+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070080+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070080))&0x80)==0x00)&&(((per.b(ad:0x40070080+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI5" base ad:0x400700A0 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x400700A0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700A0))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x400700A0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700A0))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x400700A0+0x06))&0x01)==0x00) if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700A0))&0x20)==0x00) if (((per.b(ad:0x400700A0+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700A0+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700A0))&0x10)==0x00) if (((per.b(ad:0x400700A0+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700A0+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x400700A0+0x06))&0x01)==0x00) if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700A0))&0x04)==0x04) if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK5,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK5,External,External" endif else if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK5,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK5,External,External" endif endif else if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700A0))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x400700A0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700A0+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x400700A0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700A0+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x400700A0+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700A0))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700A0))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700A0))&0x80)==0x00) if (((per.b(ad:0x400700A0+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700A0+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) if ((((per.b(ad:0x400700A0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x400700A0+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700A0+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x400700A0+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x400700A0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700A0+0x02))&0x10)==0x00) if (((per.w(ad:0x400700A0+0x09))&0x01)==0x01)&&(((per.b(ad:0x400700A0+0x06))&0x01)==0x00) if (((per.w(ad:0x400700A0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700A0+0x0D))&0x01)==0x00)&&(((per.b(ad:0x400700A0+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x400700A0+0x09))&0x01)==0x01)&&(((per.b(ad:0x400700A0+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x400700A0))&0x80)==0x00)&&(((per.b(ad:0x400700A0+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI6" base ad:0x400700C0 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x400700C0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700C0))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x400700C0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700C0))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x400700C0+0x06))&0x01)==0x00) if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700C0))&0x20)==0x00) if (((per.b(ad:0x400700C0+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700C0+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700C0))&0x10)==0x00) if (((per.b(ad:0x400700C0+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700C0+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x400700C0+0x06))&0x01)==0x00) if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700C0))&0x04)==0x04) if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK6,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK6,External,External" endif else if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK6,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK6,External,External" endif endif else if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700C0))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x400700C0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700C0+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x400700C0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700C0+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x400700C0+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700C0))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700C0))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700C0))&0x80)==0x00) if (((per.b(ad:0x400700C0+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700C0+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) if ((((per.b(ad:0x400700C0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x400700C0+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700C0+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x400700C0+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x400700C0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700C0+0x02))&0x10)==0x00) if (((per.w(ad:0x400700C0+0x09))&0x01)==0x01)&&(((per.b(ad:0x400700C0+0x06))&0x01)==0x00) if (((per.w(ad:0x400700C0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700C0+0x0D))&0x01)==0x00)&&(((per.b(ad:0x400700C0+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x400700C0+0x09))&0x01)==0x01)&&(((per.b(ad:0x400700C0+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x400700C0))&0x80)==0x00)&&(((per.b(ad:0x400700C0+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI7" base ad:0x400700E0 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x400700E0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700E0))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x400700E0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700E0))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x400700E0+0x06))&0x01)==0x00) if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700E0))&0x20)==0x00) if (((per.b(ad:0x400700E0+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700E0+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700E0))&0x10)==0x00) if (((per.b(ad:0x400700E0+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x400700E0+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x400700E0+0x06))&0x01)==0x00) if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700E0))&0x04)==0x04) if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK7,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK7,External,External" endif else if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK7,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK7,External,External" endif endif else if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700E0))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x400700E0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700E0+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x400700E0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700E0+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x400700E0+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700E0))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700E0))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700E0))&0x80)==0x00) if (((per.b(ad:0x400700E0+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700E0+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) if ((((per.b(ad:0x400700E0+0x06))&0x01)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x400700E0+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) if (((per.b(ad:0x400700E0+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x400700E0+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x400700E0+0x02))&0x20)==0x00)&&(((per.b(ad:0x400700E0+0x02))&0x10)==0x00) if (((per.w(ad:0x400700E0+0x09))&0x01)==0x01)&&(((per.b(ad:0x400700E0+0x06))&0x01)==0x00) if (((per.w(ad:0x400700E0+0x14))&0x01)==0x01) if (((per.b(ad:0x400700E0+0x0D))&0x01)==0x00)&&(((per.b(ad:0x400700E0+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x400700E0+0x09))&0x01)==0x01)&&(((per.b(ad:0x400700E0+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x400700E0))&0x80)==0x00)&&(((per.b(ad:0x400700E0+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI8" base ad:0x40070100 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070100+0x14))&0x01)==0x01) if (((per.b(ad:0x40070100))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070100+0x14))&0x01)==0x01) if (((per.b(ad:0x40070100))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070100+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070100))&0x20)==0x00) if (((per.b(ad:0x40070100+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070100+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070100))&0x10)==0x00) if (((per.b(ad:0x40070100+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070100+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070100+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070100))&0x04)==0x04) if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK8,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK8,External,External" endif else if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK8,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK8,External,External" endif endif else if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) if (((per.b(ad:0x40070100))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070100+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070100+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070100+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070100+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070100+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070100))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070100))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) if (((per.b(ad:0x40070100))&0x80)==0x00) if (((per.b(ad:0x40070100+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070100+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070100+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070100+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) if (((per.b(ad:0x40070100+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070100+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070100+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070100+0x02))&0x10)==0x00) if (((per.w(ad:0x40070100+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070100+0x06))&0x01)==0x00) if (((per.w(ad:0x40070100+0x14))&0x01)==0x01) if (((per.b(ad:0x40070100+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070100+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070100+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070100+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070100))&0x80)==0x00)&&(((per.b(ad:0x40070100+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree "SCI9" base ad:0x40070120 width 10. hgroup.byte 0x05++0x00 hide.byte 0x00 "RDR,Receive Data Register" in hgroup.word 0x10++0x01 hide.word 0x00 "RDRHL,Receive 9-Bit Data Register" in if (((per.w(ad:0x40070120+0x14))&0x01)==0x01) if (((per.b(ad:0x40070120))&0x04)==0x04) rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" bitfld.word 0x00 9. " MPB ,Multi-Processor bit flag" "Data transmission,ID transmission" newline hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" hexmask.word 0x00 0.--8. 1. " RDAT ,Serial receive data" endif else rgroup.word 0x10++0x01 line.word 0x00 "FRDRHL,Receive FIFO Data Register HL" bitfld.word 0x00 14. " RDF ,Receive FIFO data full flag" "Not full,Full" bitfld.word 0x00 13. " ORER ,Overrun error flag" "No error,Error" newline bitfld.word 0x00 12. " FER ,Framing error flag" "No error,Error" bitfld.word 0x00 11. " PER ,Parity error flag" "No error,Error" newline bitfld.word 0x00 10. " DR ,Receive data ready flag" "Not ready,Ready" endif group.byte 0x03++0x00 line.byte 0x00 "TDR,Transmit Data Register" group.word 0x0E++0x01 line.word 0x00 "TDRHL,Transmit 9-Bit Data Register" if (((per.w(ad:0x40070120+0x14))&0x01)==0x01) if (((per.b(ad:0x40070120))&0x04)==0x04) wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" bitfld.word 0x00 9. " MPBT ,Multi-Processor transfer bit flag" "Data,ID" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" else wgroup.word 0x0E++0x01 line.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" hexmask.word 0x00 0.--8. 1. " TDAT ,Serial transmit data" endif else hgroup.word 0x0E++0x01 hide.word 0x00 "FTDRHL,Transmit FIFO Data Register HL" endif if (((per.b(ad:0x40070120+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070120))&0x20)==0x00) if (((per.b(ad:0x40070120+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" newline bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070120+0x06))&0x10)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "9-bit,9-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 6. " CHR ,Character length" "8-bit,7-bit" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 3. " STOP ,Stop bit length" "1 stop,2 stop" bitfld.byte 0x00 2. " MP ,Multi-Processor mode" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif else group.byte 0x00++0x00 line.byte 0x00 "SMR,Serial Mode Register" bitfld.byte 0x00 7. " CM ,Communication mode" "Asynchronous/I2C,Clock-synchronous/SPI" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070120))&0x10)==0x00) if (((per.b(ad:0x40070120+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" newline bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif else if (((per.b(ad:0x40070120+0x06))&0x80)==0x00) group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "93 clock,128 clock,186 clock,512 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" else group.byte 0x00++0x00 line.byte 0x00 "SMR_SMCI,Serial Mode Register" bitfld.byte 0x00 7. " GM ,GSM mode" "Normal,GSM" bitfld.byte 0x00 6. " BLK ,Block transfer mode" "Normal,Block" newline bitfld.byte 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.byte 0x00 4. " PM ,Parity mode" "Even,Odd" newline bitfld.byte 0x00 2.--3. " BCP ,Base clock pulse" "32 clock,64 clock,372 clock,256 clock" bitfld.byte 0x00 0.--1. " CKS ,Clock select" "PCLKA,PCLKA4,PCLKA16,PCLKA64" endif endif endif if (((per.b(ad:0x40070120+0x06))&0x01)==0x00) if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070120))&0x04)==0x04) if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK9,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Enabled,Disabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK9,External,External" endif else if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK9,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "I/O port,SCK9,External,External" endif endif else if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" else group.byte 0x02++0x00 line.byte 0x00 "SCR,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Internal,Internal,External,External" endif endif else if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) if (((per.b(ad:0x40070120))&0x8)==0x00) group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Disabled,Output,?..." else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" newline rbitfld.byte 0x00 0.--1. " CKE ,Clock enable" "Low,Output,High,Output" endif else group.byte 0x02++0x00 line.byte 0x00 "SCR_SMCI,Serial Control Register" bitfld.byte 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " RE ,Receive enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " MPIE ,Multi-Processor interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TEIE ,Transmit end interrupt enable" "Disabled,Enabled" endif endif if (((per.b(ad:0x40070120+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070120+0x14))&0x01)==0x00) group.byte 0x04++0x00 line.byte 0x00 "SSR,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" elif (((per.b(ad:0x40070120+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070120+0x14))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_FIFO,Serial Status Register" bitfld.byte 0x00 7. " TDFE ,Transmit FIFO data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDF ,Receive FIFO data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " FER ,Framing error flag" "No error,Error" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" bitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline bitfld.byte 0x00 0. " DR ,Receive data ready flag" "Not ready,Ready" elif (((per.b(ad:0x40070120+0x06))&0x01)==0x01) group.byte 0x04++0x00 line.byte 0x00 "SSR_SMCI,Serial Status Register" bitfld.byte 0x00 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x00 6. " RDRF ,Receive data full flag" "Not full,Full" newline bitfld.byte 0x00 5. " ORER ,Overrun error flag" "No error,Error" bitfld.byte 0x00 4. " ERS ,Error signal status flag" "Not sampled,Sampled" newline bitfld.byte 0x00 3. " PER ,Parity error flag" "No error,Error" rbitfld.byte 0x00 2. " TEND ,Transmit end flag" "Not completed,Completed" newline rbitfld.byte 0x00 1. " MPB ,Multi-Processor" "Data,ID" bitfld.byte 0x00 0. " MPBT ,Multi-Processor bit transfer" "Data,ID" endif if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070120))&0x40)==0x00) group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else group.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070120))&0x40)==0x00) rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,8-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 4. " CHR1 ,Character length 1" "9-bit,7-bit" newline bitfld.byte 0x00 3. " SDIR ,Transmitted/Received data transfer direction" "LSB,MSB" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif else rgroup.byte 0x06++0x00 line.byte 0x00 "SCMR,Smart Card Mode Register" bitfld.byte 0x00 7. " BCP2 ,Base clock pulse 2" "0,1" bitfld.byte 0x00 2. " SINV ,Transmitted/Received data invert" "Not inverted,Inverted" newline bitfld.byte 0x00 0. " SMIF ,Smart card interface mode select" "Non-smart,Smart" endif endif if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) group.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" group.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" else rgroup.byte 0x01++0x00 line.byte 0x00 "BRR,Bit Rate Register" rgroup.byte 0x12++0x00 line.byte 0x00 "MDDR,Modulation Duty Register" endif if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) if (((per.b(ad:0x40070120))&0x80)==0x00) if (((per.b(ad:0x40070120+0x02))&0x02)==0x00) group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else group.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070120+0x02))&0x02)==0x00) rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 6. " BGDM ,Baud rate generator double-speed mode select" "Normal,Doubled" newline bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" newline bitfld.byte 0x00 3. " ABCSE ,Asynchronous mode extended base clock select 1" "BGDM/ABCS,6 cycles" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 7. " RXDESEL ,Asynchronous start bit edge detection select" "Low level,Falling" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " ABCS ,Asynchronous mode base clock select" "16,8" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif else rgroup.byte 0x07++0x00 line.byte 0x00 "SEMR,Serial Extended Mode Register" bitfld.byte 0x00 5. " NFEN ,Digital noise filter function enable" "Disabled,Enabled" bitfld.byte 0x00 2. " BRME ,Bit rate modulation enable" "Disabled,Enabled" endif endif if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) if ((((per.b(ad:0x40070120+0x06))&0x01)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x01)) group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else group.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif else if (((per.b(ad:0x40070120+0x09))&0x01)==0x01) rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" ",/1,/2,/4,/8,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "SNFR,Noise Filter Setting Register" bitfld.byte 0x00 0.--2. " NFCS ,Noise filter clock select" "/1,?..." endif endif else hgroup.byte 0x08++0x00 hide.byte 0x00 "SNFR,Noise Filter Setting Register" endif if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) if (((per.b(ad:0x40070120+0x06))&0x01)==0x00) group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else group.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface," endif else if (((per.b(ad:0x40070120+0x06))&0x01)==0x00) rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Asynchronous/Multi-processor/Clock-synchronous/Simple SPI,Simple I2C" else rgroup.byte 0x09++0x00 line.byte 0x00 "SIMR1,I2C Mode Register 1" bitfld.byte 0x00 3.--7. " IICDL ,SDA delay output select" "No delay,0-1,1-2,2-3,3-4,4-5,5-6,6-7,7-8,8-9,9-10,10-11,11-12,12-13,13-14,14-15,15-16,16-17,17-18,18-19,19-20,20-21,21-22,22-23,23-24,24-25,25-26,26-27,27-28,28-29,29-30,30-31" bitfld.byte 0x00 0. " IICM ,Simple I2C mode select" "Smart card interface,?..." endif endif if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" bitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline bitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" else group.byte 0x0A++0x00 line.byte 0x00 "SIMR2,I2C Mode Register 2" bitfld.byte 0x00 5. " IICACKT ,ACK transmission data" "ACK,NACK" rbitfld.byte 0x00 1. " IICCSC ,Clock synchronization" "No synchronization,Synchronization" newline rbitfld.byte 0x00 0. " IICINTM ,I2C interrupt mode select" "ACK/NACK,Reception and transmission" endif group.byte 0x0B++0x00 line.byte 0x00 "SIMR3,I2C Mode Register 3" bitfld.byte 0x00 6.--7. " IICSCLS ,SCL output select" "Serial output,Start/restart/stop,Low level,High-Z" bitfld.byte 0x00 4.--5. " IICSDAS ,SDA output select" "Serial output,Start/restart/stop,Low level,High-Z" newline bitfld.byte 0x00 3. " IICSTIF ,Issuing of Start/Restart/Stop condition completed flag" "Not generated,Generated" bitfld.byte 0x00 2. " IICSTPREQ ,Stop condition generation" "Not generated,Generated" newline bitfld.byte 0x00 1. " IICRSTAREQ ,Restart condition generation" "Not generated,Generated" bitfld.byte 0x00 0. " IICSTAREQ ,Start condition generation" "Not generated,Generated" rgroup.byte 0x0C++0x00 line.byte 0x00 "SISR,I2C Status Register" bitfld.byte 0x00 0. " IICACKR ,ACK reception data flag" "ACK,NACK" if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" bitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" bitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" bitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline bitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" else group.byte 0x0D++0x00 line.byte 0x00 "SPMR,SPI Mode Register" rbitfld.byte 0x00 7. " CKPH ,Clock phase select" "Not delayed,Delayed" rbitfld.byte 0x00 6. " CKPOL ,Clock polarity select" "Not inverted,Inverted" newline bitfld.byte 0x00 4. " MFF ,Mode fault flag" "No error,Error" rbitfld.byte 0x00 2. " MSS ,Master slave select" "Master,Slave" newline rbitfld.byte 0x00 1. " CTSE ,CTS enable" "Disabled,Enabled" rbitfld.byte 0x00 0. " SSE ,SSn pin function enable" "Disabled,Enabled" endif if (((per.b(ad:0x40070120+0x02))&0x20)==0x00)&&(((per.b(ad:0x40070120+0x02))&0x10)==0x00) if (((per.w(ad:0x40070120+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070120+0x06))&0x01)==0x00) if (((per.w(ad:0x40070120+0x14))&0x01)==0x01) if (((per.b(ad:0x40070120+0x0D))&0x01)==0x00)&&(((per.b(ad:0x40070120+0x0D))&0x02)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "No reset,Reset" newline bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "No reset,Reset" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" bitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" endif else if (((per.w(ad:0x40070120+0x09))&0x01)==0x01)&&(((per.b(ad:0x40070120+0x06))&0x01)==0x00) group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 12.--15. " RSTRG ,RTS output active trigger number select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 8.--11. " RTRG ,Receive FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 4.--7. " TTRG ,Transmit FIFO data trigger number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" newline rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" else group.word 0x14++0x01 line.word 0x00 "FCR,FIFO Control Register" bitfld.word 0x00 3. " DRES ,Receive data ready error select bit" "Reception,Receive" rbitfld.word 0x00 0. " FM ,FIFO mode select" "Non-FIFO,FIFO" endif endif if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) rgroup.word 0x16++0x03 line.word 0x00 "FDR,FIFO Data Count Register" bitfld.word 0x00 8.--12. " T ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 0.--4. " R ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.word 0x02 "LSR,Line Status Register" bitfld.word 0x02 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x02 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x02 0. " ORER ,Overrun error flag" "No overrun,Overrun" else hgroup.word 0x16++0x01 hide.word 0x00 "FDR,FIFO Data Count Register" rgroup.word 0x18++0x01 line.word 0x00 "LSR,Line Status Register" bitfld.word 0x00 8.--12. " PNUM ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 2.--6. " FNUM ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x1A++0x01 line.word 0x00 "CDR,Compare Match Data Register" hexmask.word 0x00 0.--8. 1. " CMPD ,Compare match data" if ((((per.b(ad:0x40070120))&0x80)==0x00)&&(((per.b(ad:0x40070120+0x09))&0x01)==0x00)) group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 7. " DCME ,Data compare match enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IDSEL ,ID frame select" "Always compare MPB,Compare only MPB=1" newline bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" else group.byte 0x13++0x00 line.byte 0x00 "DCCR,Data Compare Match Control Register" bitfld.byte 0x00 4. " DFER ,Data compare match framing error flag" "No error,Error" bitfld.byte 0x00 3. " DPER ,Data compare match parity error flag" "No error,Error" newline bitfld.byte 0x00 0. " DCMF ,Data compare match flag" "Not matched,Matched" endif group.byte 0x1C++0x00 line.byte 0x00 "SPTR,Serial Port Register" bitfld.byte 0x00 2. " SPB2IO ,Serial port break I/O" "No output,Output" bitfld.byte 0x00 1. " SPB2DT ,Serial port break data select" "Low,High" newline rbitfld.byte 0x00 0. " RXDMON ,Serial input data monitor" "Low,High" width 0x0B tree.end tree.end tree "IrDA Interface" base ad:0x40070F00 width 6. group.byte 0x00++0x00 line.byte 0x00 "IRCR,IrDA Control Register" bitfld.byte 0x00 7. " IRE ,IrDA enable" "Disabled,Enabled" bitfld.byte 0x00 3. " IRTXINV ,IRTXD polarity switching" "Not inverted,Inverted" bitfld.byte 0x00 2. " IRRXINV ,IRRXD polarity switching" "Not inverted,Inverted" width 0x0B tree.end tree.open "IIC (I2C Bus Interface)" tree "IIC0" base ad:0x40053000 width 8. group.byte 0x00++0x02 line.byte 0x00 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x00 7. " ICE ,IIC-Bus interface enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IICRST ,IIC-Bus interface internal reset" "Release,Initiate" newline bitfld.byte 0x00 5. " CLO ,Extra SCL clock cycle output" "Disabled,Enabled" bitfld.byte 0x00 4. " SOWP ,SCLO/SDAO write protect" "Not protected,Protected" newline bitfld.byte 0x00 3. " SCLO ,SCL output Control/Monitor" "Drove,Released" bitfld.byte 0x00 2. " SDAO ,SDA output Control/Monitor" "Drove,Released" newline rbitfld.byte 0x00 1. " SCLI ,SCL line monitor" "Low,High" rbitfld.byte 0x00 0. " SDAI ,SDA line monitor" "Low,High" if (((per.b(ad:0x40053000+0x02))&0x80)==0x00) group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. " BBSY ,Bus busy detection flag" "Not busy,Busy" rbitfld.byte 0x00 6. " MST ,Master/Slave mode" "Slave,Master" newline rbitfld.byte 0x00 5. " TRS ,Transmit/Receive mode" "Receive,Transmit" bitfld.byte 0x00 3. " SP ,Stop condition issuance request" "Not requested,Requested" newline bitfld.byte 0x00 2. " RS ,Restart condition issuance request" "Not requested,Requested" bitfld.byte 0x00 1. " ST ,Start condition issuance request" "Not requested,Requested" else group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. " BBSY ,Bus busy detection flag" "Not busy,Busy" bitfld.byte 0x00 6. " MST ,Master/Slave mode" "Slave,Master" newline bitfld.byte 0x00 5. " TRS ,Transmit/Receive mode" "Receive,Transmit" bitfld.byte 0x00 3. " SP ,Stop condition issuance request" "Not requested,Requested" newline bitfld.byte 0x00 2. " RS ,Restart condition issuance request" "Not requested,Requested" bitfld.byte 0x00 1. " ST ,Start condition issuance request" "Not requested,Requested" endif group.byte 0x02++0x00 line.byte 0x00 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x00 7. " MTWP ,MST/TRS write protect" "Protected,Not protected" bitfld.byte 0x00 4.--6. " CKS ,Internal reference clock select" "PCLKB,PCLKB/2,PCLKB/4,PCLKB/8,PCLKB/16,PCLKB/32,PCLKB/64,PCLKB/128" newline bitfld.byte 0x00 3. " BCWP ,BC write protect" "Not protected,Protected" bitfld.byte 0x00 0.--2. " BC ,Bit counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits" if (((per.b(ad:0x40053000+0x03))&0x80)==0x80) group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. " DLCS ,SDA output delay clock source select" "Clock,Clock/2" bitfld.byte 0x00 4.--6. " SDDL ,SDA output delay counter" "No delay,1/2 cycles,3/4 cycles,5/6 cycles,7/8 cycles,9/10 cycles,11/12 cycles,13/14 cycles" newline bitfld.byte 0x00 2. " TMOH ,Timeout h count control" "Disabled,Enabled" bitfld.byte 0x00 1. " TMOL ,Timeout l count control" "Disabled,Enabled" newline bitfld.byte 0x00 0. " TMOS ,Timeout detection time select" "Long,Short" else group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. " DLCS ,SDA output delay clock source select" "Clock,Clock/2" bitfld.byte 0x00 4.--6. " SDDL ,SDA output delay counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.byte 0x00 2. " TMOH ,Timeout h count control" "Disabled,Enabled" bitfld.byte 0x00 1. " TMOL ,Timeout l count control" "Disabled,Enabled" newline bitfld.byte 0x00 0. " TMOS ,Timeout detection time select" "Long,Short" endif if ((per.b(ad:0x40053000+0x01)&0x20)==0x00) group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. " SMBS ,SMBus/I2C-Bus select" "I2C,SMB" bitfld.byte 0x00 6. " WAIT ,WAIT" "No wait,Wait" newline bitfld.byte 0x00 5. " RDRFS ,RDRF flag set timing select" "9th cycle,8th cycle" bitfld.byte 0x00 4. " ACKWP ,ACKBT write protect" "Protected,Not protected" newline bitfld.byte 0x00 3. " ACKBT ,Transmit acknowledge" "ACK,NACK" rbitfld.byte 0x00 2. " ACKBR ,Receive acknowledge" "ACK,NACK" newline bitfld.byte 0x00 0.--1. " NF ,Noise filter stage select" "Single,2-stage,3-stage,4-stage" else group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. " SMBS ,SMBus/I2C-Bus select" "I2C,SMB" bitfld.byte 0x00 4. " ACKWP ,ACKBT write protect" "Protected,Not protected" newline bitfld.byte 0x00 3. " ACKBT ,Transmit acknowledge" "ACK,NACK" rbitfld.byte 0x00 2. " ACKBR ,Receive acknowledge" "ACK,NACK" newline bitfld.byte 0x00 0.--1. " NF ,Noise filter stage select" "Single,2-stage,3-stage,4-stage" endif group.byte 0x05++0x04 line.byte 0x00 "ICFER,I2C Bus Function Enable Register" sif cpuis("R7FS5*") bitfld.byte 0x00 7. " FMPE ,Fast-Mode plus enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SCLE ,SCL synchronous circuit enable" "Disabled,Enabled" else bitfld.byte 0x00 7. " FMPE ,Fast-Mode plus enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SCLE ,SCL synchronous circuit enable" "Disabled,Enabled" endif newline bitfld.byte 0x00 5. " NFE ,Digital noise filter circuit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " NACKE ,NACK reception transfer suspension enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " SALE ,Slave Arbitration-Lost detection enable" "Disabled,Enabled" bitfld.byte 0x00 2. " NALE ,NACK transmission Arbitration-Lost detection enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " MALE ,Master Arbitration-Lost detection enable" "Disabled,Enabled" bitfld.byte 0x00 0. " TMOE ,Timeout function enable" "Disabled,Enabled" line.byte 0x01 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x01 7. " HOAE ,Host address enable" "Disabled,Enabled" bitfld.byte 0x01 5. " DIDE ,Device-ID address detection enable" "Disabled,Enabled" newline bitfld.byte 0x01 3. " GCAE ,General call address enable" "Disabled,Enabled" bitfld.byte 0x01 2. " SAR2E ,Slave address register 2 enable" "Disabled,Enabled" newline bitfld.byte 0x01 1. " SAR1E ,Slave address register 1 enable" "Disabled,Enabled" bitfld.byte 0x01 0. " SAR0E ,Slave address register 0 enable" "Disabled,Enabled" line.byte 0x02 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x02 7. " TIE ,Transmit data empty interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 6. " TEIE ,Transmit end interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 5. " RIE ,Receive data full interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 4. " NAKIE ,NACK reception interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 3. " SPIE ,Stop condition detection interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 2. " STIE ,Start condition detection interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 1. " ALIE ,Arbitration-Lost interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 0. " TMOIE ,Timeout interrupt request enable" "Disabled,Enabled" line.byte 0x03 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x03 7. " HOA ,Host address detection flag" "Not detected,Detected" bitfld.byte 0x03 5. " DID ,Device-ID address detection flag" "Not detected,Detected" newline bitfld.byte 0x03 3. " GCA ,General call address detection flag" "Not detected,Detected" bitfld.byte 0x03 2. " AAS2 ,Slave address 2 detection flag" "Not detected,Detected" newline bitfld.byte 0x03 1. " AAS1 ,Slave address 1 detection flag" "Not detected,Detected" bitfld.byte 0x03 0. " AAS0 ,Slave address 0 detection flag" "Not detected,Detected" line.byte 0x04 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x04 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x04 6. " TEND ,Transmit end flag" "Ongoing,Completed" newline bitfld.byte 0x04 5. " RDRF ,Receive data full flag" "Not full,Full" bitfld.byte 0x04 4. " NACKF ,NACK detection flag" "Not detected,Detected" newline bitfld.byte 0x04 3. " STOP ,Stop condition detection flag" "Not detected,Detected" bitfld.byte 0x04 2. " START ,Start condition detection flag" "Not detected,Detected" newline bitfld.byte 0x04 1. " AL ,Arbitration-Lost flag" "Not lost,Lost" bitfld.byte 0x04 0. " TMOF ,Timeout detection flag" "Not detected,Detected" if (((per.b(ad:0x40053000))&0x40)==0x00) group.byte 0x16++0x00 line.byte 0x00 "ICWUR,I2C Bus Wakeup Unit Register" bitfld.byte 0x00 7. " WUE ,Wakeup function enable" "Disabled,Enabled" bitfld.byte 0x00 6. " WUIE ,Wakeup interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " WUF ,Wakeup event occurrence flag" "Not occurred,Occurred" bitfld.byte 0x00 4. " WUACK ,ACK bit for wakeup mode" "Normal wakeup 1,Normal wakeup 2" newline bitfld.byte 0x00 0. " WUAFA ,Wakeup analog filter additional selection" "Not added,Added" else group.byte 0x16++0x00 line.byte 0x00 "ICWUR,I2C Bus Wakeup Unit Register" bitfld.byte 0x00 7. " WUE ,Wakeup function enable" "Disabled,Enabled" bitfld.byte 0x00 6. " WUIE ,Wakeup interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x00 5. " WUF ,Wakeup event occurrence flag" "Not occurred,Occurred" bitfld.byte 0x00 4. " WUACK ,ACK bit for wakeup mode" "Command recovery,EEP response" newline bitfld.byte 0x00 0. " WUAFA ,Wakeup analog filter additional selection" "Not added,Added" endif sif CPUIS("R7FS5*") group.byte 0x17++0x00 line.byte 0x00 "ICWUR2,I2C-Bus Wakeup Unit Register 2" rbitfld.byte 0x00 2. " WUSYF ,Wakeup function synchronous operation status flag" "Asynchronous,Synchronous" rbitfld.byte 0x00 1. " WUASYF ,Wakeup function asynchronous operation status flag" "Asynchronous,Synchronous" newline bitfld.byte 0x00 0. " WUSEN ,Wakeup function synchronous enable" "Asynchronous,Synchronous" endif group.byte (0xA)++0x00 line.byte 0x00 "SARL0,Slave Address Register L0" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xC)++0x00 line.byte 0x00 "SARL1,Slave Address Register L1" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xE)++0x00 line.byte 0x00 "SARL2,Slave Address Register L2" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xB)++0x00 line.byte 0x00 "SARU0,Slave Address Register U0" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte (0xD)++0x00 line.byte 0x00 "SARU1,Slave Address Register U1" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte (0xF)++0x00 line.byte 0x00 "SARU2,Slave Address Register U2" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte 0x10++0x02 line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x00 0.--4. " BRL ,Bit rate low-level period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x01 0.--4. " BRH ,Bit rate high-level period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "ICDRT,I2C Bus Transmit Data Register" hgroup.byte 0x13++0x00 hide.byte 0x00 "ICDRR,I2C Bus Receive Data Register" in width 0x0B tree.end tree "IIC1" base ad:0x40053100 width 8. group.byte 0x00++0x02 line.byte 0x00 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x00 7. " ICE ,IIC-Bus interface enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IICRST ,IIC-Bus interface internal reset" "Release,Initiate" newline bitfld.byte 0x00 5. " CLO ,Extra SCL clock cycle output" "Disabled,Enabled" bitfld.byte 0x00 4. " SOWP ,SCLO/SDAO write protect" "Not protected,Protected" newline bitfld.byte 0x00 3. " SCLO ,SCL output Control/Monitor" "Drove,Released" bitfld.byte 0x00 2. " SDAO ,SDA output Control/Monitor" "Drove,Released" newline rbitfld.byte 0x00 1. " SCLI ,SCL line monitor" "Low,High" rbitfld.byte 0x00 0. " SDAI ,SDA line monitor" "Low,High" if (((per.b(ad:0x40053100+0x02))&0x80)==0x00) group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. " BBSY ,Bus busy detection flag" "Not busy,Busy" rbitfld.byte 0x00 6. " MST ,Master/Slave mode" "Slave,Master" newline rbitfld.byte 0x00 5. " TRS ,Transmit/Receive mode" "Receive,Transmit" bitfld.byte 0x00 3. " SP ,Stop condition issuance request" "Not requested,Requested" newline bitfld.byte 0x00 2. " RS ,Restart condition issuance request" "Not requested,Requested" bitfld.byte 0x00 1. " ST ,Start condition issuance request" "Not requested,Requested" else group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. " BBSY ,Bus busy detection flag" "Not busy,Busy" bitfld.byte 0x00 6. " MST ,Master/Slave mode" "Slave,Master" newline bitfld.byte 0x00 5. " TRS ,Transmit/Receive mode" "Receive,Transmit" bitfld.byte 0x00 3. " SP ,Stop condition issuance request" "Not requested,Requested" newline bitfld.byte 0x00 2. " RS ,Restart condition issuance request" "Not requested,Requested" bitfld.byte 0x00 1. " ST ,Start condition issuance request" "Not requested,Requested" endif group.byte 0x02++0x00 line.byte 0x00 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x00 7. " MTWP ,MST/TRS write protect" "Protected,Not protected" bitfld.byte 0x00 4.--6. " CKS ,Internal reference clock select" "PCLKB,PCLKB/2,PCLKB/4,PCLKB/8,PCLKB/16,PCLKB/32,PCLKB/64,PCLKB/128" newline bitfld.byte 0x00 3. " BCWP ,BC write protect" "Not protected,Protected" bitfld.byte 0x00 0.--2. " BC ,Bit counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits" if (((per.b(ad:0x40053100+0x03))&0x80)==0x80) group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. " DLCS ,SDA output delay clock source select" "Clock,Clock/2" bitfld.byte 0x00 4.--6. " SDDL ,SDA output delay counter" "No delay,1/2 cycles,3/4 cycles,5/6 cycles,7/8 cycles,9/10 cycles,11/12 cycles,13/14 cycles" newline bitfld.byte 0x00 2. " TMOH ,Timeout h count control" "Disabled,Enabled" bitfld.byte 0x00 1. " TMOL ,Timeout l count control" "Disabled,Enabled" newline bitfld.byte 0x00 0. " TMOS ,Timeout detection time select" "Long,Short" else group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. " DLCS ,SDA output delay clock source select" "Clock,Clock/2" bitfld.byte 0x00 4.--6. " SDDL ,SDA output delay counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.byte 0x00 2. " TMOH ,Timeout h count control" "Disabled,Enabled" bitfld.byte 0x00 1. " TMOL ,Timeout l count control" "Disabled,Enabled" newline bitfld.byte 0x00 0. " TMOS ,Timeout detection time select" "Long,Short" endif if ((per.b(ad:0x40053100+0x01)&0x20)==0x00) group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. " SMBS ,SMBus/I2C-Bus select" "I2C,SMB" bitfld.byte 0x00 6. " WAIT ,WAIT" "No wait,Wait" newline bitfld.byte 0x00 5. " RDRFS ,RDRF flag set timing select" "9th cycle,8th cycle" bitfld.byte 0x00 4. " ACKWP ,ACKBT write protect" "Protected,Not protected" newline bitfld.byte 0x00 3. " ACKBT ,Transmit acknowledge" "ACK,NACK" rbitfld.byte 0x00 2. " ACKBR ,Receive acknowledge" "ACK,NACK" newline bitfld.byte 0x00 0.--1. " NF ,Noise filter stage select" "Single,2-stage,3-stage,4-stage" else group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. " SMBS ,SMBus/I2C-Bus select" "I2C,SMB" bitfld.byte 0x00 4. " ACKWP ,ACKBT write protect" "Protected,Not protected" newline bitfld.byte 0x00 3. " ACKBT ,Transmit acknowledge" "ACK,NACK" rbitfld.byte 0x00 2. " ACKBR ,Receive acknowledge" "ACK,NACK" newline bitfld.byte 0x00 0.--1. " NF ,Noise filter stage select" "Single,2-stage,3-stage,4-stage" endif group.byte 0x05++0x04 line.byte 0x00 "ICFER,I2C Bus Function Enable Register" sif cpuis("R7FS5*") else bitfld.byte 0x00 7. " FMPE ,Fast-Mode plus enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SCLE ,SCL synchronous circuit enable" "Disabled,Enabled" endif newline bitfld.byte 0x00 5. " NFE ,Digital noise filter circuit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " NACKE ,NACK reception transfer suspension enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " SALE ,Slave Arbitration-Lost detection enable" "Disabled,Enabled" bitfld.byte 0x00 2. " NALE ,NACK transmission Arbitration-Lost detection enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " MALE ,Master Arbitration-Lost detection enable" "Disabled,Enabled" bitfld.byte 0x00 0. " TMOE ,Timeout function enable" "Disabled,Enabled" line.byte 0x01 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x01 7. " HOAE ,Host address enable" "Disabled,Enabled" bitfld.byte 0x01 5. " DIDE ,Device-ID address detection enable" "Disabled,Enabled" newline bitfld.byte 0x01 3. " GCAE ,General call address enable" "Disabled,Enabled" bitfld.byte 0x01 2. " SAR2E ,Slave address register 2 enable" "Disabled,Enabled" newline bitfld.byte 0x01 1. " SAR1E ,Slave address register 1 enable" "Disabled,Enabled" bitfld.byte 0x01 0. " SAR0E ,Slave address register 0 enable" "Disabled,Enabled" line.byte 0x02 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x02 7. " TIE ,Transmit data empty interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 6. " TEIE ,Transmit end interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 5. " RIE ,Receive data full interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 4. " NAKIE ,NACK reception interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 3. " SPIE ,Stop condition detection interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 2. " STIE ,Start condition detection interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 1. " ALIE ,Arbitration-Lost interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 0. " TMOIE ,Timeout interrupt request enable" "Disabled,Enabled" line.byte 0x03 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x03 7. " HOA ,Host address detection flag" "Not detected,Detected" bitfld.byte 0x03 5. " DID ,Device-ID address detection flag" "Not detected,Detected" newline bitfld.byte 0x03 3. " GCA ,General call address detection flag" "Not detected,Detected" bitfld.byte 0x03 2. " AAS2 ,Slave address 2 detection flag" "Not detected,Detected" newline bitfld.byte 0x03 1. " AAS1 ,Slave address 1 detection flag" "Not detected,Detected" bitfld.byte 0x03 0. " AAS0 ,Slave address 0 detection flag" "Not detected,Detected" line.byte 0x04 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x04 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x04 6. " TEND ,Transmit end flag" "Ongoing,Completed" newline bitfld.byte 0x04 5. " RDRF ,Receive data full flag" "Not full,Full" bitfld.byte 0x04 4. " NACKF ,NACK detection flag" "Not detected,Detected" newline bitfld.byte 0x04 3. " STOP ,Stop condition detection flag" "Not detected,Detected" bitfld.byte 0x04 2. " START ,Start condition detection flag" "Not detected,Detected" newline bitfld.byte 0x04 1. " AL ,Arbitration-Lost flag" "Not lost,Lost" bitfld.byte 0x04 0. " TMOF ,Timeout detection flag" "Not detected,Detected" group.byte (0xA)++0x00 line.byte 0x00 "SARL0,Slave Address Register L0" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xC)++0x00 line.byte 0x00 "SARL1,Slave Address Register L1" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xE)++0x00 line.byte 0x00 "SARL2,Slave Address Register L2" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xB)++0x00 line.byte 0x00 "SARU0,Slave Address Register U0" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte (0xD)++0x00 line.byte 0x00 "SARU1,Slave Address Register U1" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte (0xF)++0x00 line.byte 0x00 "SARU2,Slave Address Register U2" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte 0x10++0x02 line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x00 0.--4. " BRL ,Bit rate low-level period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x01 0.--4. " BRH ,Bit rate high-level period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "ICDRT,I2C Bus Transmit Data Register" hgroup.byte 0x13++0x00 hide.byte 0x00 "ICDRR,I2C Bus Receive Data Register" in width 0x0B tree.end sif cpu()!="R7FS5D57C3A01CFP"&&cpu()!="R7FS5D57A3A01CFP"&&cpu()!="R7FS5D97E3???CFP"&&cpu()!="R7FS5D97C3???CFP" tree "IIC2" base ad:0x40053200 width 8. group.byte 0x00++0x02 line.byte 0x00 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x00 7. " ICE ,IIC-Bus interface enable" "Disabled,Enabled" bitfld.byte 0x00 6. " IICRST ,IIC-Bus interface internal reset" "Release,Initiate" newline bitfld.byte 0x00 5. " CLO ,Extra SCL clock cycle output" "Disabled,Enabled" bitfld.byte 0x00 4. " SOWP ,SCLO/SDAO write protect" "Not protected,Protected" newline bitfld.byte 0x00 3. " SCLO ,SCL output Control/Monitor" "Drove,Released" bitfld.byte 0x00 2. " SDAO ,SDA output Control/Monitor" "Drove,Released" newline rbitfld.byte 0x00 1. " SCLI ,SCL line monitor" "Low,High" rbitfld.byte 0x00 0. " SDAI ,SDA line monitor" "Low,High" if (((per.b(ad:0x40053200+0x02))&0x80)==0x00) group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. " BBSY ,Bus busy detection flag" "Not busy,Busy" rbitfld.byte 0x00 6. " MST ,Master/Slave mode" "Slave,Master" newline rbitfld.byte 0x00 5. " TRS ,Transmit/Receive mode" "Receive,Transmit" bitfld.byte 0x00 3. " SP ,Stop condition issuance request" "Not requested,Requested" newline bitfld.byte 0x00 2. " RS ,Restart condition issuance request" "Not requested,Requested" bitfld.byte 0x00 1. " ST ,Start condition issuance request" "Not requested,Requested" else group.byte 0x01++0x00 line.byte 0x00 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x00 7. " BBSY ,Bus busy detection flag" "Not busy,Busy" bitfld.byte 0x00 6. " MST ,Master/Slave mode" "Slave,Master" newline bitfld.byte 0x00 5. " TRS ,Transmit/Receive mode" "Receive,Transmit" bitfld.byte 0x00 3. " SP ,Stop condition issuance request" "Not requested,Requested" newline bitfld.byte 0x00 2. " RS ,Restart condition issuance request" "Not requested,Requested" bitfld.byte 0x00 1. " ST ,Start condition issuance request" "Not requested,Requested" endif group.byte 0x02++0x00 line.byte 0x00 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x00 7. " MTWP ,MST/TRS write protect" "Protected,Not protected" bitfld.byte 0x00 4.--6. " CKS ,Internal reference clock select" "PCLKB,PCLKB/2,PCLKB/4,PCLKB/8,PCLKB/16,PCLKB/32,PCLKB/64,PCLKB/128" newline bitfld.byte 0x00 3. " BCWP ,BC write protect" "Not protected,Protected" bitfld.byte 0x00 0.--2. " BC ,Bit counter" "9 bits,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits" if (((per.b(ad:0x40053200+0x03))&0x80)==0x80) group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. " DLCS ,SDA output delay clock source select" "Clock,Clock/2" bitfld.byte 0x00 4.--6. " SDDL ,SDA output delay counter" "No delay,1/2 cycles,3/4 cycles,5/6 cycles,7/8 cycles,9/10 cycles,11/12 cycles,13/14 cycles" newline bitfld.byte 0x00 2. " TMOH ,Timeout h count control" "Disabled,Enabled" bitfld.byte 0x00 1. " TMOL ,Timeout l count control" "Disabled,Enabled" newline bitfld.byte 0x00 0. " TMOS ,Timeout detection time select" "Long,Short" else group.byte 0x03++0x00 line.byte 0x00 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x00 7. " DLCS ,SDA output delay clock source select" "Clock,Clock/2" bitfld.byte 0x00 4.--6. " SDDL ,SDA output delay counter" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles" newline bitfld.byte 0x00 2. " TMOH ,Timeout h count control" "Disabled,Enabled" bitfld.byte 0x00 1. " TMOL ,Timeout l count control" "Disabled,Enabled" newline bitfld.byte 0x00 0. " TMOS ,Timeout detection time select" "Long,Short" endif if ((per.b(ad:0x40053200+0x01)&0x20)==0x00) group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. " SMBS ,SMBus/I2C-Bus select" "I2C,SMB" bitfld.byte 0x00 6. " WAIT ,WAIT" "No wait,Wait" newline bitfld.byte 0x00 5. " RDRFS ,RDRF flag set timing select" "9th cycle,8th cycle" bitfld.byte 0x00 4. " ACKWP ,ACKBT write protect" "Protected,Not protected" newline bitfld.byte 0x00 3. " ACKBT ,Transmit acknowledge" "ACK,NACK" rbitfld.byte 0x00 2. " ACKBR ,Receive acknowledge" "ACK,NACK" newline bitfld.byte 0x00 0.--1. " NF ,Noise filter stage select" "Single,2-stage,3-stage,4-stage" else group.byte 0x04++0x00 line.byte 0x00 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x00 7. " SMBS ,SMBus/I2C-Bus select" "I2C,SMB" bitfld.byte 0x00 4. " ACKWP ,ACKBT write protect" "Protected,Not protected" newline bitfld.byte 0x00 3. " ACKBT ,Transmit acknowledge" "ACK,NACK" rbitfld.byte 0x00 2. " ACKBR ,Receive acknowledge" "ACK,NACK" newline bitfld.byte 0x00 0.--1. " NF ,Noise filter stage select" "Single,2-stage,3-stage,4-stage" endif group.byte 0x05++0x04 line.byte 0x00 "ICFER,I2C Bus Function Enable Register" sif cpuis("R7FS5*") else bitfld.byte 0x00 7. " FMPE ,Fast-Mode plus enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SCLE ,SCL synchronous circuit enable" "Disabled,Enabled" endif newline bitfld.byte 0x00 5. " NFE ,Digital noise filter circuit enable" "Disabled,Enabled" bitfld.byte 0x00 4. " NACKE ,NACK reception transfer suspension enable" "Disabled,Enabled" newline bitfld.byte 0x00 3. " SALE ,Slave Arbitration-Lost detection enable" "Disabled,Enabled" bitfld.byte 0x00 2. " NALE ,NACK transmission Arbitration-Lost detection enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " MALE ,Master Arbitration-Lost detection enable" "Disabled,Enabled" bitfld.byte 0x00 0. " TMOE ,Timeout function enable" "Disabled,Enabled" line.byte 0x01 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x01 7. " HOAE ,Host address enable" "Disabled,Enabled" bitfld.byte 0x01 5. " DIDE ,Device-ID address detection enable" "Disabled,Enabled" newline bitfld.byte 0x01 3. " GCAE ,General call address enable" "Disabled,Enabled" bitfld.byte 0x01 2. " SAR2E ,Slave address register 2 enable" "Disabled,Enabled" newline bitfld.byte 0x01 1. " SAR1E ,Slave address register 1 enable" "Disabled,Enabled" bitfld.byte 0x01 0. " SAR0E ,Slave address register 0 enable" "Disabled,Enabled" line.byte 0x02 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x02 7. " TIE ,Transmit data empty interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 6. " TEIE ,Transmit end interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 5. " RIE ,Receive data full interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 4. " NAKIE ,NACK reception interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 3. " SPIE ,Stop condition detection interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 2. " STIE ,Start condition detection interrupt request enable" "Disabled,Enabled" newline bitfld.byte 0x02 1. " ALIE ,Arbitration-Lost interrupt request enable" "Disabled,Enabled" bitfld.byte 0x02 0. " TMOIE ,Timeout interrupt request enable" "Disabled,Enabled" line.byte 0x03 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x03 7. " HOA ,Host address detection flag" "Not detected,Detected" bitfld.byte 0x03 5. " DID ,Device-ID address detection flag" "Not detected,Detected" newline bitfld.byte 0x03 3. " GCA ,General call address detection flag" "Not detected,Detected" bitfld.byte 0x03 2. " AAS2 ,Slave address 2 detection flag" "Not detected,Detected" newline bitfld.byte 0x03 1. " AAS1 ,Slave address 1 detection flag" "Not detected,Detected" bitfld.byte 0x03 0. " AAS0 ,Slave address 0 detection flag" "Not detected,Detected" line.byte 0x04 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x04 7. " TDRE ,Transmit data empty flag" "Not empty,Empty" bitfld.byte 0x04 6. " TEND ,Transmit end flag" "Ongoing,Completed" newline bitfld.byte 0x04 5. " RDRF ,Receive data full flag" "Not full,Full" bitfld.byte 0x04 4. " NACKF ,NACK detection flag" "Not detected,Detected" newline bitfld.byte 0x04 3. " STOP ,Stop condition detection flag" "Not detected,Detected" bitfld.byte 0x04 2. " START ,Start condition detection flag" "Not detected,Detected" newline bitfld.byte 0x04 1. " AL ,Arbitration-Lost flag" "Not lost,Lost" bitfld.byte 0x04 0. " TMOF ,Timeout detection flag" "Not detected,Detected" group.byte (0xA)++0x00 line.byte 0x00 "SARL0,Slave Address Register L0" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xC)++0x00 line.byte 0x00 "SARL1,Slave Address Register L1" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xE)++0x00 line.byte 0x00 "SARL2,Slave Address Register L2" hexmask.byte 0x00 1.--7. 0x02 " SVA ,7-Bit address/10-Bit address lower bits" bitfld.byte 0x00 0. " SVA0 ,10-Bit address LSB" "0,1" group.byte (0xB)++0x00 line.byte 0x00 "SARU0,Slave Address Register U0" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte (0xD)++0x00 line.byte 0x00 "SARU1,Slave Address Register U1" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte (0xF)++0x00 line.byte 0x00 "SARU2,Slave Address Register U2" bitfld.byte 0x00 1.--2. " SVA ,10-Bit address upper bits" "0,1,2,3" bitfld.byte 0x00 0. " FS ,7-Bit/10-Bit address format select" "7-bit,10-bit" group.byte 0x10++0x02 line.byte 0x00 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x00 0.--4. " BRL ,Bit rate low-level period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x01 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x01 0.--4. " BRH ,Bit rate high-level period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.byte 0x02 "ICDRT,I2C Bus Transmit Data Register" hgroup.byte 0x13++0x00 hide.byte 0x00 "ICDRR,I2C Bus Receive Data Register" in width 0x0B tree.end endif tree.end tree.open "CAN (Controller Area Network)" tree "CAN0" base ad:0x40050000 width 11. group.word 0x840++0x01 line.word 0x00 "CTLR,Control Register" eventfld.word 0x00 13. " RBOC ,Forcible return from Bus-Off" "Not forced,Forced" bitfld.word 0x00 11.--12. " BOM ,Bus-Off recovery mode" "Normal,Automatic/entry,Automatic/end,During recovery" newline bitfld.word 0x00 10. " SLPM ,CAN sleep mode" "Exit,Enter" bitfld.word 0x00 8.--9. " CANM ,CAN mode of operation select" "Operation,Reset,Halt,Reset (forced)" newline bitfld.word 0x00 6.--7. " TSPS ,Time stamp prescaler select" "Every bit,Every 2-bit,Every 4-bit,Every 8-bit" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") eventfld.word 0x00 5. " TSRC ,Time stamp counter reset command" "No reset,Reset" else bitfld.word 0x00 5. " TSRC ,Time stamp counter reset command" "No reset,Reset" endif newline bitfld.word 0x00 4. " TPM ,Transmission priority mode select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message lost mode select" "Overwrite,Overrun" newline bitfld.word 0x00 1.--2. " IDFM ,ID format mode select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN mailbox mode select" "Normal,FIFO" group.long 0x844++0x03 line.long 0x00 "BCR,Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Baud rate prescaler select" newline bitfld.long 0x00 12.--13. " SJW ,Synchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" newline bitfld.long 0x00 0. " CCLKS ,CAN clock source selection" "PCLKB,CANMCLK" newline group.long (0x400)++0x03 line.long 0x00 "MKR0,Mask Register 0" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x404)++0x03 line.long 0x00 "MKR1,Mask Register 1" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x408)++0x03 line.long 0x00 "MKR2,Mask Register 2" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x40C)++0x03 line.long 0x00 "MKR3,Mask Register 3" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x410)++0x03 line.long 0x00 "MKR4,Mask Register 4" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x414)++0x03 line.long 0x00 "MKR5,Mask Register 5" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x418)++0x03 line.long 0x00 "MKR6,Mask Register 6" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x41C)++0x03 line.long 0x00 "MKR7,Mask Register 7" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" newline group.long 0x420++0x0B line.long 0x00 "FIDCR0,FIFO Received ID Compare Register 0" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" line.long 0x04 "FIDCR1,FIFO Received ID Compare Register 1" bitfld.long 0x04 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x04 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x04 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x04 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x04 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x04 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x04 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x04 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x04 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x04 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x04 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x04 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x04 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x04 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x04 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x04 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x04 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x04 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x04 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x04 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x04 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x04 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x04 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x04 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x04 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x04 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x04 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x04 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x04 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x04 0. " [0] ,Extended ID data bit 0" "0,1" newline line.long 0x08 "MKIVLR,Mask Invalid Register" bitfld.long 0x08 31. " MB[31] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 30. " [30] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 29. " [29] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 28. " [28] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 27. " [27] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 26. " [26] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 25. " [25] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 24. " [24] ,Mask invalid" "Valid,Invalid" newline bitfld.long 0x08 23. " [23] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 22. " [22] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 21. " [21] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 20. " [20] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 19. " [19] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 18. " [18] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 17. " [17] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 16. " [16] ,Mask invalid" "Valid,Invalid" newline bitfld.long 0x08 15. " [15] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 14. " [14] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 13. " [13] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 12. " [12] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 11. " [11] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 10. " [10] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 9. " [9] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 8. " [8] ,Mask invalid" "Valid,Invalid" newline bitfld.long 0x08 7. " [7] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 6. " [6] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 5. " [5] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 4. " [4] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 3. " [3] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 2. " [2] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 1. " [1] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 0. " [0] ,Mask invalid" "Valid,Invalid" newline group.long 0x200++0x03 line.long 0x00 "MB0_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x200+0x04)++0x01 line.word 0x00 "MB0_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "MB0_D0,DATA0" line.byte 0x01 "MB0_D1,DATA1" line.byte 0x02 "MB0_D2,DATA2" line.byte 0x3 "MB0_D3,DATA3" line.byte 0x04 "MB0_D4,DATA4" line.byte 0x5 "MB0_D5,DATA5" line.byte 0x6 "MB0_D6,DATA6" line.byte 0x7 "MB0_D7,DATA7" group.word (0x200+0x0E)++0x01 line.word 0x00 "MB0_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x210++0x03 line.long 0x00 "MB1_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x210+0x04)++0x01 line.word 0x00 "MB1_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "MB1_D0,DATA0" line.byte 0x01 "MB1_D1,DATA1" line.byte 0x02 "MB1_D2,DATA2" line.byte 0x3 "MB1_D3,DATA3" line.byte 0x04 "MB1_D4,DATA4" line.byte 0x5 "MB1_D5,DATA5" line.byte 0x6 "MB1_D6,DATA6" line.byte 0x7 "MB1_D7,DATA7" group.word (0x210+0x0E)++0x01 line.word 0x00 "MB1_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x220++0x03 line.long 0x00 "MB2_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x220+0x04)++0x01 line.word 0x00 "MB2_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "MB2_D0,DATA0" line.byte 0x01 "MB2_D1,DATA1" line.byte 0x02 "MB2_D2,DATA2" line.byte 0x3 "MB2_D3,DATA3" line.byte 0x04 "MB2_D4,DATA4" line.byte 0x5 "MB2_D5,DATA5" line.byte 0x6 "MB2_D6,DATA6" line.byte 0x7 "MB2_D7,DATA7" group.word (0x220+0x0E)++0x01 line.word 0x00 "MB2_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x230++0x03 line.long 0x00 "MB3_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x230+0x04)++0x01 line.word 0x00 "MB3_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "MB3_D0,DATA0" line.byte 0x01 "MB3_D1,DATA1" line.byte 0x02 "MB3_D2,DATA2" line.byte 0x3 "MB3_D3,DATA3" line.byte 0x04 "MB3_D4,DATA4" line.byte 0x5 "MB3_D5,DATA5" line.byte 0x6 "MB3_D6,DATA6" line.byte 0x7 "MB3_D7,DATA7" group.word (0x230+0x0E)++0x01 line.word 0x00 "MB3_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x240++0x03 line.long 0x00 "MB4_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x240+0x04)++0x01 line.word 0x00 "MB4_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "MB4_D0,DATA0" line.byte 0x01 "MB4_D1,DATA1" line.byte 0x02 "MB4_D2,DATA2" line.byte 0x3 "MB4_D3,DATA3" line.byte 0x04 "MB4_D4,DATA4" line.byte 0x5 "MB4_D5,DATA5" line.byte 0x6 "MB4_D6,DATA6" line.byte 0x7 "MB4_D7,DATA7" group.word (0x240+0x0E)++0x01 line.word 0x00 "MB4_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x250++0x03 line.long 0x00 "MB5_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x250+0x04)++0x01 line.word 0x00 "MB5_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "MB5_D0,DATA0" line.byte 0x01 "MB5_D1,DATA1" line.byte 0x02 "MB5_D2,DATA2" line.byte 0x3 "MB5_D3,DATA3" line.byte 0x04 "MB5_D4,DATA4" line.byte 0x5 "MB5_D5,DATA5" line.byte 0x6 "MB5_D6,DATA6" line.byte 0x7 "MB5_D7,DATA7" group.word (0x250+0x0E)++0x01 line.word 0x00 "MB5_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x260++0x03 line.long 0x00 "MB6_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x260+0x04)++0x01 line.word 0x00 "MB6_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "MB6_D0,DATA0" line.byte 0x01 "MB6_D1,DATA1" line.byte 0x02 "MB6_D2,DATA2" line.byte 0x3 "MB6_D3,DATA3" line.byte 0x04 "MB6_D4,DATA4" line.byte 0x5 "MB6_D5,DATA5" line.byte 0x6 "MB6_D6,DATA6" line.byte 0x7 "MB6_D7,DATA7" group.word (0x260+0x0E)++0x01 line.word 0x00 "MB6_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x270++0x03 line.long 0x00 "MB7_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x270+0x04)++0x01 line.word 0x00 "MB7_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "MB7_D0,DATA0" line.byte 0x01 "MB7_D1,DATA1" line.byte 0x02 "MB7_D2,DATA2" line.byte 0x3 "MB7_D3,DATA3" line.byte 0x04 "MB7_D4,DATA4" line.byte 0x5 "MB7_D5,DATA5" line.byte 0x6 "MB7_D6,DATA6" line.byte 0x7 "MB7_D7,DATA7" group.word (0x270+0x0E)++0x01 line.word 0x00 "MB7_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x280++0x03 line.long 0x00 "MB8_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x280+0x04)++0x01 line.word 0x00 "MB8_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "MB8_D0,DATA0" line.byte 0x01 "MB8_D1,DATA1" line.byte 0x02 "MB8_D2,DATA2" line.byte 0x3 "MB8_D3,DATA3" line.byte 0x04 "MB8_D4,DATA4" line.byte 0x5 "MB8_D5,DATA5" line.byte 0x6 "MB8_D6,DATA6" line.byte 0x7 "MB8_D7,DATA7" group.word (0x280+0x0E)++0x01 line.word 0x00 "MB8_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x290++0x03 line.long 0x00 "MB9_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x290+0x04)++0x01 line.word 0x00 "MB9_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "MB9_D0,DATA0" line.byte 0x01 "MB9_D1,DATA1" line.byte 0x02 "MB9_D2,DATA2" line.byte 0x3 "MB9_D3,DATA3" line.byte 0x04 "MB9_D4,DATA4" line.byte 0x5 "MB9_D5,DATA5" line.byte 0x6 "MB9_D6,DATA6" line.byte 0x7 "MB9_D7,DATA7" group.word (0x290+0x0E)++0x01 line.word 0x00 "MB9_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2A0++0x03 line.long 0x00 "MB10_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2A0+0x04)++0x01 line.word 0x00 "MB10_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "MB10_D0,DATA0" line.byte 0x01 "MB10_D1,DATA1" line.byte 0x02 "MB10_D2,DATA2" line.byte 0x3 "MB10_D3,DATA3" line.byte 0x04 "MB10_D4,DATA4" line.byte 0x5 "MB10_D5,DATA5" line.byte 0x6 "MB10_D6,DATA6" line.byte 0x7 "MB10_D7,DATA7" group.word (0x2A0+0x0E)++0x01 line.word 0x00 "MB10_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2B0++0x03 line.long 0x00 "MB11_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2B0+0x04)++0x01 line.word 0x00 "MB11_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "MB11_D0,DATA0" line.byte 0x01 "MB11_D1,DATA1" line.byte 0x02 "MB11_D2,DATA2" line.byte 0x3 "MB11_D3,DATA3" line.byte 0x04 "MB11_D4,DATA4" line.byte 0x5 "MB11_D5,DATA5" line.byte 0x6 "MB11_D6,DATA6" line.byte 0x7 "MB11_D7,DATA7" group.word (0x2B0+0x0E)++0x01 line.word 0x00 "MB11_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2C0++0x03 line.long 0x00 "MB12_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2C0+0x04)++0x01 line.word 0x00 "MB12_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "MB12_D0,DATA0" line.byte 0x01 "MB12_D1,DATA1" line.byte 0x02 "MB12_D2,DATA2" line.byte 0x3 "MB12_D3,DATA3" line.byte 0x04 "MB12_D4,DATA4" line.byte 0x5 "MB12_D5,DATA5" line.byte 0x6 "MB12_D6,DATA6" line.byte 0x7 "MB12_D7,DATA7" group.word (0x2C0+0x0E)++0x01 line.word 0x00 "MB12_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2D0++0x03 line.long 0x00 "MB13_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2D0+0x04)++0x01 line.word 0x00 "MB13_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "MB13_D0,DATA0" line.byte 0x01 "MB13_D1,DATA1" line.byte 0x02 "MB13_D2,DATA2" line.byte 0x3 "MB13_D3,DATA3" line.byte 0x04 "MB13_D4,DATA4" line.byte 0x5 "MB13_D5,DATA5" line.byte 0x6 "MB13_D6,DATA6" line.byte 0x7 "MB13_D7,DATA7" group.word (0x2D0+0x0E)++0x01 line.word 0x00 "MB13_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2E0++0x03 line.long 0x00 "MB14_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2E0+0x04)++0x01 line.word 0x00 "MB14_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "MB14_D0,DATA0" line.byte 0x01 "MB14_D1,DATA1" line.byte 0x02 "MB14_D2,DATA2" line.byte 0x3 "MB14_D3,DATA3" line.byte 0x04 "MB14_D4,DATA4" line.byte 0x5 "MB14_D5,DATA5" line.byte 0x6 "MB14_D6,DATA6" line.byte 0x7 "MB14_D7,DATA7" group.word (0x2E0+0x0E)++0x01 line.word 0x00 "MB14_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2F0++0x03 line.long 0x00 "MB15_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2F0+0x04)++0x01 line.word 0x00 "MB15_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "MB15_D0,DATA0" line.byte 0x01 "MB15_D1,DATA1" line.byte 0x02 "MB15_D2,DATA2" line.byte 0x3 "MB15_D3,DATA3" line.byte 0x04 "MB15_D4,DATA4" line.byte 0x5 "MB15_D5,DATA5" line.byte 0x6 "MB15_D6,DATA6" line.byte 0x7 "MB15_D7,DATA7" group.word (0x2F0+0x0E)++0x01 line.word 0x00 "MB15_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x300++0x03 line.long 0x00 "MB16_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x300+0x04)++0x01 line.word 0x00 "MB16_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "MB16_D0,DATA0" line.byte 0x01 "MB16_D1,DATA1" line.byte 0x02 "MB16_D2,DATA2" line.byte 0x3 "MB16_D3,DATA3" line.byte 0x04 "MB16_D4,DATA4" line.byte 0x5 "MB16_D5,DATA5" line.byte 0x6 "MB16_D6,DATA6" line.byte 0x7 "MB16_D7,DATA7" group.word (0x300+0x0E)++0x01 line.word 0x00 "MB16_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x310++0x03 line.long 0x00 "MB17_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x310+0x04)++0x01 line.word 0x00 "MB17_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "MB17_D0,DATA0" line.byte 0x01 "MB17_D1,DATA1" line.byte 0x02 "MB17_D2,DATA2" line.byte 0x3 "MB17_D3,DATA3" line.byte 0x04 "MB17_D4,DATA4" line.byte 0x5 "MB17_D5,DATA5" line.byte 0x6 "MB17_D6,DATA6" line.byte 0x7 "MB17_D7,DATA7" group.word (0x310+0x0E)++0x01 line.word 0x00 "MB17_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x320++0x03 line.long 0x00 "MB18_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x320+0x04)++0x01 line.word 0x00 "MB18_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "MB18_D0,DATA0" line.byte 0x01 "MB18_D1,DATA1" line.byte 0x02 "MB18_D2,DATA2" line.byte 0x3 "MB18_D3,DATA3" line.byte 0x04 "MB18_D4,DATA4" line.byte 0x5 "MB18_D5,DATA5" line.byte 0x6 "MB18_D6,DATA6" line.byte 0x7 "MB18_D7,DATA7" group.word (0x320+0x0E)++0x01 line.word 0x00 "MB18_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x330++0x03 line.long 0x00 "MB19_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x330+0x04)++0x01 line.word 0x00 "MB19_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "MB19_D0,DATA0" line.byte 0x01 "MB19_D1,DATA1" line.byte 0x02 "MB19_D2,DATA2" line.byte 0x3 "MB19_D3,DATA3" line.byte 0x04 "MB19_D4,DATA4" line.byte 0x5 "MB19_D5,DATA5" line.byte 0x6 "MB19_D6,DATA6" line.byte 0x7 "MB19_D7,DATA7" group.word (0x330+0x0E)++0x01 line.word 0x00 "MB19_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x340++0x03 line.long 0x00 "MB20_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x340+0x04)++0x01 line.word 0x00 "MB20_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "MB20_D0,DATA0" line.byte 0x01 "MB20_D1,DATA1" line.byte 0x02 "MB20_D2,DATA2" line.byte 0x3 "MB20_D3,DATA3" line.byte 0x04 "MB20_D4,DATA4" line.byte 0x5 "MB20_D5,DATA5" line.byte 0x6 "MB20_D6,DATA6" line.byte 0x7 "MB20_D7,DATA7" group.word (0x340+0x0E)++0x01 line.word 0x00 "MB20_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x350++0x03 line.long 0x00 "MB21_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x350+0x04)++0x01 line.word 0x00 "MB21_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "MB21_D0,DATA0" line.byte 0x01 "MB21_D1,DATA1" line.byte 0x02 "MB21_D2,DATA2" line.byte 0x3 "MB21_D3,DATA3" line.byte 0x04 "MB21_D4,DATA4" line.byte 0x5 "MB21_D5,DATA5" line.byte 0x6 "MB21_D6,DATA6" line.byte 0x7 "MB21_D7,DATA7" group.word (0x350+0x0E)++0x01 line.word 0x00 "MB21_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x360++0x03 line.long 0x00 "MB22_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x360+0x04)++0x01 line.word 0x00 "MB22_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "MB22_D0,DATA0" line.byte 0x01 "MB22_D1,DATA1" line.byte 0x02 "MB22_D2,DATA2" line.byte 0x3 "MB22_D3,DATA3" line.byte 0x04 "MB22_D4,DATA4" line.byte 0x5 "MB22_D5,DATA5" line.byte 0x6 "MB22_D6,DATA6" line.byte 0x7 "MB22_D7,DATA7" group.word (0x360+0x0E)++0x01 line.word 0x00 "MB22_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x370++0x03 line.long 0x00 "MB23_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x370+0x04)++0x01 line.word 0x00 "MB23_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "MB23_D0,DATA0" line.byte 0x01 "MB23_D1,DATA1" line.byte 0x02 "MB23_D2,DATA2" line.byte 0x3 "MB23_D3,DATA3" line.byte 0x04 "MB23_D4,DATA4" line.byte 0x5 "MB23_D5,DATA5" line.byte 0x6 "MB23_D6,DATA6" line.byte 0x7 "MB23_D7,DATA7" group.word (0x370+0x0E)++0x01 line.word 0x00 "MB23_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x380++0x03 line.long 0x00 "MB24_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x380+0x04)++0x01 line.word 0x00 "MB24_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "MB24_D0,DATA0" line.byte 0x01 "MB24_D1,DATA1" line.byte 0x02 "MB24_D2,DATA2" line.byte 0x3 "MB24_D3,DATA3" line.byte 0x04 "MB24_D4,DATA4" line.byte 0x5 "MB24_D5,DATA5" line.byte 0x6 "MB24_D6,DATA6" line.byte 0x7 "MB24_D7,DATA7" group.word (0x380+0x0E)++0x01 line.word 0x00 "MB24_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x390++0x03 line.long 0x00 "MB25_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x390+0x04)++0x01 line.word 0x00 "MB25_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "MB25_D0,DATA0" line.byte 0x01 "MB25_D1,DATA1" line.byte 0x02 "MB25_D2,DATA2" line.byte 0x3 "MB25_D3,DATA3" line.byte 0x04 "MB25_D4,DATA4" line.byte 0x5 "MB25_D5,DATA5" line.byte 0x6 "MB25_D6,DATA6" line.byte 0x7 "MB25_D7,DATA7" group.word (0x390+0x0E)++0x01 line.word 0x00 "MB25_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3A0++0x03 line.long 0x00 "MB26_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3A0+0x04)++0x01 line.word 0x00 "MB26_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "MB26_D0,DATA0" line.byte 0x01 "MB26_D1,DATA1" line.byte 0x02 "MB26_D2,DATA2" line.byte 0x3 "MB26_D3,DATA3" line.byte 0x04 "MB26_D4,DATA4" line.byte 0x5 "MB26_D5,DATA5" line.byte 0x6 "MB26_D6,DATA6" line.byte 0x7 "MB26_D7,DATA7" group.word (0x3A0+0x0E)++0x01 line.word 0x00 "MB26_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3B0++0x03 line.long 0x00 "MB27_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3B0+0x04)++0x01 line.word 0x00 "MB27_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "MB27_D0,DATA0" line.byte 0x01 "MB27_D1,DATA1" line.byte 0x02 "MB27_D2,DATA2" line.byte 0x3 "MB27_D3,DATA3" line.byte 0x04 "MB27_D4,DATA4" line.byte 0x5 "MB27_D5,DATA5" line.byte 0x6 "MB27_D6,DATA6" line.byte 0x7 "MB27_D7,DATA7" group.word (0x3B0+0x0E)++0x01 line.word 0x00 "MB27_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3C0++0x03 line.long 0x00 "MB28_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3C0+0x04)++0x01 line.word 0x00 "MB28_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "MB28_D0,DATA0" line.byte 0x01 "MB28_D1,DATA1" line.byte 0x02 "MB28_D2,DATA2" line.byte 0x3 "MB28_D3,DATA3" line.byte 0x04 "MB28_D4,DATA4" line.byte 0x5 "MB28_D5,DATA5" line.byte 0x6 "MB28_D6,DATA6" line.byte 0x7 "MB28_D7,DATA7" group.word (0x3C0+0x0E)++0x01 line.word 0x00 "MB28_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3D0++0x03 line.long 0x00 "MB29_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3D0+0x04)++0x01 line.word 0x00 "MB29_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "MB29_D0,DATA0" line.byte 0x01 "MB29_D1,DATA1" line.byte 0x02 "MB29_D2,DATA2" line.byte 0x3 "MB29_D3,DATA3" line.byte 0x04 "MB29_D4,DATA4" line.byte 0x5 "MB29_D5,DATA5" line.byte 0x6 "MB29_D6,DATA6" line.byte 0x7 "MB29_D7,DATA7" group.word (0x3D0+0x0E)++0x01 line.word 0x00 "MB29_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3E0++0x03 line.long 0x00 "MB30_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3E0+0x04)++0x01 line.word 0x00 "MB30_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "MB30_D0,DATA0" line.byte 0x01 "MB30_D1,DATA1" line.byte 0x02 "MB30_D2,DATA2" line.byte 0x3 "MB30_D3,DATA3" line.byte 0x04 "MB30_D4,DATA4" line.byte 0x5 "MB30_D5,DATA5" line.byte 0x6 "MB30_D6,DATA6" line.byte 0x7 "MB30_D7,DATA7" group.word (0x3E0+0x0E)++0x01 line.word 0x00 "MB30_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3F0++0x03 line.long 0x00 "MB31_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3F0+0x04)++0x01 line.word 0x00 "MB31_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "MB31_D0,DATA0" line.byte 0x01 "MB31_D1,DATA1" line.byte 0x02 "MB31_D2,DATA2" line.byte 0x3 "MB31_D3,DATA3" line.byte 0x04 "MB31_D4,DATA4" line.byte 0x5 "MB31_D5,DATA5" line.byte 0x6 "MB31_D6,DATA6" line.byte 0x7 "MB31_D7,DATA7" group.word (0x3F0+0x0E)++0x01 line.word 0x00 "MB31_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.w(ad:0x40050000+0x840))&0x01)==0x00) group.long 0x42C++0x03 line.long 0x00 "MIER,Mailbox Interrupt Enable Register" bitfld.long 0x00 31. " MB[31] ,Interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Interrupt 26 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" newline bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" else group.long 0x42C++0x03 line.long 0x00 "MIER_FIFO,Mailbox Interrupt Enable Register for FIFO Mailbox Mode" bitfld.long 0x00 29. " MB[29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" endif else if (((per.w(ad:0x40050000+0x840))&0x01)==0x01) group.long 0x42C++0x03 line.long 0x00 "MIER,Mailbox Interrupt Enable Register" bitfld.long 0x00 31. " MB[31] ,Interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Interrupt 26 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" newline bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" else group.long 0x42C++0x03 line.long 0x00 "MIER_FIFO,Mailbox Interrupt Enable Register for FIFO Mailbox Mode" bitfld.long 0x00 29. " MB[29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" endif endif if (((per.w(ad:0x40050000+0x820))&0xC0)==0x80) group.byte 0x820++0x00 line.byte 0x00 "MCTL_TX0,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x820))&0xC0)==0x40) group.byte 0x820++0x00 line.byte 0x00 "MCTL_RX0,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x820++0x00 hide.byte 0x00 "MCTL_RX0,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x821))&0xC0)==0x80) group.byte 0x821++0x00 line.byte 0x00 "MCTL_TX1,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x821))&0xC0)==0x40) group.byte 0x821++0x00 line.byte 0x00 "MCTL_RX1,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x821++0x00 hide.byte 0x00 "MCTL_RX1,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x822))&0xC0)==0x80) group.byte 0x822++0x00 line.byte 0x00 "MCTL_TX2,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x822))&0xC0)==0x40) group.byte 0x822++0x00 line.byte 0x00 "MCTL_RX2,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x822++0x00 hide.byte 0x00 "MCTL_RX2,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x823))&0xC0)==0x80) group.byte 0x823++0x00 line.byte 0x00 "MCTL_TX3,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x823))&0xC0)==0x40) group.byte 0x823++0x00 line.byte 0x00 "MCTL_RX3,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x823++0x00 hide.byte 0x00 "MCTL_RX3,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x824))&0xC0)==0x80) group.byte 0x824++0x00 line.byte 0x00 "MCTL_TX4,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x824))&0xC0)==0x40) group.byte 0x824++0x00 line.byte 0x00 "MCTL_RX4,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x824++0x00 hide.byte 0x00 "MCTL_RX4,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x825))&0xC0)==0x80) group.byte 0x825++0x00 line.byte 0x00 "MCTL_TX5,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x825))&0xC0)==0x40) group.byte 0x825++0x00 line.byte 0x00 "MCTL_RX5,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x825++0x00 hide.byte 0x00 "MCTL_RX5,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x826))&0xC0)==0x80) group.byte 0x826++0x00 line.byte 0x00 "MCTL_TX6,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x826))&0xC0)==0x40) group.byte 0x826++0x00 line.byte 0x00 "MCTL_RX6,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x826++0x00 hide.byte 0x00 "MCTL_RX6,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x827))&0xC0)==0x80) group.byte 0x827++0x00 line.byte 0x00 "MCTL_TX7,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x827))&0xC0)==0x40) group.byte 0x827++0x00 line.byte 0x00 "MCTL_RX7,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x827++0x00 hide.byte 0x00 "MCTL_RX7,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x828))&0xC0)==0x80) group.byte 0x828++0x00 line.byte 0x00 "MCTL_TX8,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x828))&0xC0)==0x40) group.byte 0x828++0x00 line.byte 0x00 "MCTL_RX8,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x828++0x00 hide.byte 0x00 "MCTL_RX8,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x829))&0xC0)==0x80) group.byte 0x829++0x00 line.byte 0x00 "MCTL_TX9,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x829))&0xC0)==0x40) group.byte 0x829++0x00 line.byte 0x00 "MCTL_RX9,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x829++0x00 hide.byte 0x00 "MCTL_RX9,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x82A))&0xC0)==0x80) group.byte 0x82A++0x00 line.byte 0x00 "MCTL_TX10,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x82A))&0xC0)==0x40) group.byte 0x82A++0x00 line.byte 0x00 "MCTL_RX10,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82A++0x00 hide.byte 0x00 "MCTL_RX10,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x82B))&0xC0)==0x80) group.byte 0x82B++0x00 line.byte 0x00 "MCTL_TX11,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x82B))&0xC0)==0x40) group.byte 0x82B++0x00 line.byte 0x00 "MCTL_RX11,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82B++0x00 hide.byte 0x00 "MCTL_RX11,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x82C))&0xC0)==0x80) group.byte 0x82C++0x00 line.byte 0x00 "MCTL_TX12,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x82C))&0xC0)==0x40) group.byte 0x82C++0x00 line.byte 0x00 "MCTL_RX12,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82C++0x00 hide.byte 0x00 "MCTL_RX12,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x82D))&0xC0)==0x80) group.byte 0x82D++0x00 line.byte 0x00 "MCTL_TX13,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x82D))&0xC0)==0x40) group.byte 0x82D++0x00 line.byte 0x00 "MCTL_RX13,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82D++0x00 hide.byte 0x00 "MCTL_RX13,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x82E))&0xC0)==0x80) group.byte 0x82E++0x00 line.byte 0x00 "MCTL_TX14,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x82E))&0xC0)==0x40) group.byte 0x82E++0x00 line.byte 0x00 "MCTL_RX14,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82E++0x00 hide.byte 0x00 "MCTL_RX14,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x82F))&0xC0)==0x80) group.byte 0x82F++0x00 line.byte 0x00 "MCTL_TX15,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x82F))&0xC0)==0x40) group.byte 0x82F++0x00 line.byte 0x00 "MCTL_RX15,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82F++0x00 hide.byte 0x00 "MCTL_RX15,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x830))&0xC0)==0x80) group.byte 0x830++0x00 line.byte 0x00 "MCTL_TX16,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x830))&0xC0)==0x40) group.byte 0x830++0x00 line.byte 0x00 "MCTL_RX16,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x830++0x00 hide.byte 0x00 "MCTL_RX16,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x831))&0xC0)==0x80) group.byte 0x831++0x00 line.byte 0x00 "MCTL_TX17,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x831))&0xC0)==0x40) group.byte 0x831++0x00 line.byte 0x00 "MCTL_RX17,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x831++0x00 hide.byte 0x00 "MCTL_RX17,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x832))&0xC0)==0x80) group.byte 0x832++0x00 line.byte 0x00 "MCTL_TX18,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x832))&0xC0)==0x40) group.byte 0x832++0x00 line.byte 0x00 "MCTL_RX18,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x832++0x00 hide.byte 0x00 "MCTL_RX18,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x833))&0xC0)==0x80) group.byte 0x833++0x00 line.byte 0x00 "MCTL_TX19,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x833))&0xC0)==0x40) group.byte 0x833++0x00 line.byte 0x00 "MCTL_RX19,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x833++0x00 hide.byte 0x00 "MCTL_RX19,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x834))&0xC0)==0x80) group.byte 0x834++0x00 line.byte 0x00 "MCTL_TX20,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x834))&0xC0)==0x40) group.byte 0x834++0x00 line.byte 0x00 "MCTL_RX20,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x834++0x00 hide.byte 0x00 "MCTL_RX20,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x835))&0xC0)==0x80) group.byte 0x835++0x00 line.byte 0x00 "MCTL_TX21,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x835))&0xC0)==0x40) group.byte 0x835++0x00 line.byte 0x00 "MCTL_RX21,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x835++0x00 hide.byte 0x00 "MCTL_RX21,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x836))&0xC0)==0x80) group.byte 0x836++0x00 line.byte 0x00 "MCTL_TX22,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x836))&0xC0)==0x40) group.byte 0x836++0x00 line.byte 0x00 "MCTL_RX22,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x836++0x00 hide.byte 0x00 "MCTL_RX22,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x837))&0xC0)==0x80) group.byte 0x837++0x00 line.byte 0x00 "MCTL_TX23,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x837))&0xC0)==0x40) group.byte 0x837++0x00 line.byte 0x00 "MCTL_RX23,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x837++0x00 hide.byte 0x00 "MCTL_RX23,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x838))&0xC0)==0x80) group.byte 0x838++0x00 line.byte 0x00 "MCTL_TX24,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x838))&0xC0)==0x40) group.byte 0x838++0x00 line.byte 0x00 "MCTL_RX24,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x838++0x00 hide.byte 0x00 "MCTL_RX24,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x839))&0xC0)==0x80) group.byte 0x839++0x00 line.byte 0x00 "MCTL_TX25,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x839))&0xC0)==0x40) group.byte 0x839++0x00 line.byte 0x00 "MCTL_RX25,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x839++0x00 hide.byte 0x00 "MCTL_RX25,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x83A))&0xC0)==0x80) group.byte 0x83A++0x00 line.byte 0x00 "MCTL_TX26,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x83A))&0xC0)==0x40) group.byte 0x83A++0x00 line.byte 0x00 "MCTL_RX26,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83A++0x00 hide.byte 0x00 "MCTL_RX26,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x83B))&0xC0)==0x80) group.byte 0x83B++0x00 line.byte 0x00 "MCTL_TX27,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x83B))&0xC0)==0x40) group.byte 0x83B++0x00 line.byte 0x00 "MCTL_RX27,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83B++0x00 hide.byte 0x00 "MCTL_RX27,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x83C))&0xC0)==0x80) group.byte 0x83C++0x00 line.byte 0x00 "MCTL_TX28,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x83C))&0xC0)==0x40) group.byte 0x83C++0x00 line.byte 0x00 "MCTL_RX28,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83C++0x00 hide.byte 0x00 "MCTL_RX28,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x83D))&0xC0)==0x80) group.byte 0x83D++0x00 line.byte 0x00 "MCTL_TX29,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x83D))&0xC0)==0x40) group.byte 0x83D++0x00 line.byte 0x00 "MCTL_RX29,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83D++0x00 hide.byte 0x00 "MCTL_RX29,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x83E))&0xC0)==0x80) group.byte 0x83E++0x00 line.byte 0x00 "MCTL_TX30,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x83E))&0xC0)==0x40) group.byte 0x83E++0x00 line.byte 0x00 "MCTL_RX30,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83E++0x00 hide.byte 0x00 "MCTL_RX30,Message Control Register for Receive" endif if (((per.w(ad:0x40050000+0x83F))&0xC0)==0x80) group.byte 0x83F++0x00 line.byte 0x00 "MCTL_TX31,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40050000+0x83F))&0xC0)==0x40) group.byte 0x83F++0x00 line.byte 0x00 "MCTL_RX31,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83F++0x00 hide.byte 0x00 "MCTL_RX31,Message Control Register for Receive" endif group.byte 0x848++0x02 line.byte 0x00 "RFCR,Receive FIFO Control Register" rbitfld.byte 0x00 7. " RFEST ,Receive FIFO empty status flag" "Not empty,Empty" rbitfld.byte 0x00 6. " RFWST ,Receive FIFO buffer warning status flag" "No warning,Warning" rbitfld.byte 0x00 5. " RFFST ,Receive FIFO full status flag" "Not full,Full" newline bitfld.byte 0x00 4. " RFMLF ,Receive FIFO message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO unread message number status" "None,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO enable" "Disabled,Enabled" line.byte 0x01 "RFPCR,Receive FIFO Pointer Control Register" line.byte 0x02 "TFCR,Transmit FIFO Control Register" rbitfld.byte 0x02 7. " TFEST ,Transmit FIFO empty status" "Not empty,Empty" rbitfld.byte 0x02 6. " TFFST ,Transmit FIFO full status" "Not full,Full" rbitfld.byte 0x02 1.--3. " TFUST ,Transmit FIFO unsent message number status" "None,1,2,3,4,?..." newline bitfld.byte 0x02 0. " TFE ,Transmit FIFO enable" "Disabled,Enabled" wgroup.byte 0x84B++0x00 line.byte 0x00 "TFPCR,Transmit FIFO Pointer Control Register" rgroup.word 0x842++0x01 line.word 0x00 "STR,Status Register" bitfld.word 0x00 14. " RECST ,Receive status flag" "Idle/transmission in progress,Reception in progress" bitfld.word 0x00 13. " TRMST ,Transmit status flag" "Idle/reception in progress,Transmission in progress/bus-off" bitfld.word 0x00 12. " BOST ,Bus-Off status flag" "No bus-off,Bus-off" newline bitfld.word 0x00 11. " EPST ,Error-Passive status flag" "No error-passive state,Error-passive state" bitfld.word 0x00 10. " SLPST ,CAN sleep status flag" "No sleep mode,Sleep mode" bitfld.word 0x00 9. " HLTST ,CAN halt status flag" "No halt mode,Halt mode" newline bitfld.word 0x00 8. " RSTST ,CAN reset status flag" "No reset mode,Reset mode" bitfld.word 0x00 7. " EST ,Error status flag" "No error,Error" bitfld.word 0x00 6. " TABST ,Transmission abort status flag" "Not occurred,Occurred" newline bitfld.word 0x00 5. " FMLST ,FIFO mailbox message lost status flag" "Not lost,Lost" bitfld.word 0x00 4. " NMLST ,Normal mailbox message lost status flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TFST ,Transmit FIFO status flag" "Full,Not full" newline bitfld.word 0x00 2. " RFST ,Receive FIFO status flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA status flag" "Not occurred,Occurred" bitfld.word 0x00 0. " NDST ,NEWDATA status flag" "Not occurred,Occurred" group.byte 0x853++0x00 line.byte 0x00 "MSMR,Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox search mode select" "Receive mailbox,Transmit mailbox,Message lost,Channel" rgroup.byte 0x852++0x00 line.byte 0x00 "MSSR,Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search result status" "Found,Not found" bitfld.byte 0x00 0.--4. " MBNST ,Search result mailbox number status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x851++0x00 line.byte 0x00 "CSSR,Channel Search Support Register" group.word 0x856++0x01 line.word 0x00 "AFSR,Acceptance Filter Support Register" group.byte 0x84C++0x01 line.byte 0x00 "EIER,Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Overrun interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " BORIE ,Bus-Off recovery interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off entry interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,EPIE Error-Passive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " EWIE ,Error-Warning interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus error interrupt enable" "Disabled,Enabled" line.byte 0x01 "EIFR,Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus lock detect flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload frame transmission detect flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive overrun detect flag" "Not detected,Detected" newline bitfld.byte 0x01 4. " BORIF ,Bus-Off recovery detect flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off entry detect flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error-Passive detect flag" "Not detected,Detected" newline bitfld.byte 0x01 1. " EWIF ,Error-Warning detect flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus error detect flag" "Not detected,Detected" rgroup.byte 0x84E++0x01 line.byte 0x00 "RECR,Receive Error Count Register" line.byte 0x01 "TECR,Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x00 "ECSR,Error Code Store Register" bitfld.byte 0x00 7. " EDPM ,Error display mode select" "First detected,Accumulated" bitfld.byte 0x00 6. " ADEF ,ACK delimiter error flag" "No error,Error" bitfld.byte 0x00 5. " BE0F ,Bit error (dominant) flag" "No error,Error" newline bitfld.byte 0x00 4. " BE1F ,Bit error (recessive) flag" "No error,Error" bitfld.byte 0x00 3. " CEF ,CRC error flag" "No error,Error" bitfld.byte 0x00 2. " AEF ,ACK error flag" "No error,Error" newline bitfld.byte 0x00 1. " FEF ,Form error flag" "No error,Error" bitfld.byte 0x00 0. " SEF ,Stuff error flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x00 "TSR,Time Stamp Register" group.byte 0x858++0x00 line.byte 0x00 "TCR,Test Control Register" bitfld.byte 0x00 1.--2. " TSTM ,CAN test mode select" "Not CAN,Listen-only,Self-test 0,Self-test 1" bitfld.byte 0x00 0. " TSTE ,CAN test mode enable" "Disabled,Enabled" width 0x0B tree.end tree "CAN1" base ad:0x40051000 width 11. group.word 0x840++0x01 line.word 0x00 "CTLR,Control Register" eventfld.word 0x00 13. " RBOC ,Forcible return from Bus-Off" "Not forced,Forced" bitfld.word 0x00 11.--12. " BOM ,Bus-Off recovery mode" "Normal,Automatic/entry,Automatic/end,During recovery" newline bitfld.word 0x00 10. " SLPM ,CAN sleep mode" "Exit,Enter" bitfld.word 0x00 8.--9. " CANM ,CAN mode of operation select" "Operation,Reset,Halt,Reset (forced)" newline bitfld.word 0x00 6.--7. " TSPS ,Time stamp prescaler select" "Every bit,Every 2-bit,Every 4-bit,Every 8-bit" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") eventfld.word 0x00 5. " TSRC ,Time stamp counter reset command" "No reset,Reset" else bitfld.word 0x00 5. " TSRC ,Time stamp counter reset command" "No reset,Reset" endif newline bitfld.word 0x00 4. " TPM ,Transmission priority mode select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message lost mode select" "Overwrite,Overrun" newline bitfld.word 0x00 1.--2. " IDFM ,ID format mode select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN mailbox mode select" "Normal,FIFO" group.long 0x844++0x03 line.long 0x00 "BCR,Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time segment 1 control" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Baud rate prescaler select" newline bitfld.long 0x00 12.--13. " SJW ,Synchronization jump width control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time segment 2 control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" newline bitfld.long 0x00 0. " CCLKS ,CAN clock source selection" "PCLKB,CANMCLK" newline group.long (0x400)++0x03 line.long 0x00 "MKR0,Mask Register 0" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x404)++0x03 line.long 0x00 "MKR1,Mask Register 1" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x408)++0x03 line.long 0x00 "MKR2,Mask Register 2" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x40C)++0x03 line.long 0x00 "MKR3,Mask Register 3" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x410)++0x03 line.long 0x00 "MKR4,Mask Register 4" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x414)++0x03 line.long 0x00 "MKR5,Mask Register 5" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x418)++0x03 line.long 0x00 "MKR6,Mask Register 6" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.long (0x41C)++0x03 line.long 0x00 "MKR7,Mask Register 7" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" newline bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" newline bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" newline bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" newline bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" newline group.long 0x420++0x0B line.long 0x00 "FIDCR0,FIFO Received ID Compare Register 0" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" line.long 0x04 "FIDCR1,FIFO Received ID Compare Register 1" bitfld.long 0x04 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x04 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x04 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x04 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x04 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x04 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x04 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x04 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x04 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x04 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x04 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x04 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x04 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x04 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x04 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x04 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x04 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x04 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x04 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x04 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x04 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x04 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x04 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x04 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x04 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x04 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x04 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x04 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x04 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x04 0. " [0] ,Extended ID data bit 0" "0,1" newline line.long 0x08 "MKIVLR,Mask Invalid Register" bitfld.long 0x08 31. " MB[31] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 30. " [30] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 29. " [29] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 28. " [28] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 27. " [27] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 26. " [26] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 25. " [25] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 24. " [24] ,Mask invalid" "Valid,Invalid" newline bitfld.long 0x08 23. " [23] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 22. " [22] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 21. " [21] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 20. " [20] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 19. " [19] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 18. " [18] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 17. " [17] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 16. " [16] ,Mask invalid" "Valid,Invalid" newline bitfld.long 0x08 15. " [15] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 14. " [14] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 13. " [13] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 12. " [12] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 11. " [11] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 10. " [10] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 9. " [9] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 8. " [8] ,Mask invalid" "Valid,Invalid" newline bitfld.long 0x08 7. " [7] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 6. " [6] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 5. " [5] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 4. " [4] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 3. " [3] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 2. " [2] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 1. " [1] ,Mask invalid" "Valid,Invalid" bitfld.long 0x08 0. " [0] ,Mask invalid" "Valid,Invalid" newline group.long 0x200++0x03 line.long 0x00 "MB0_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x200+0x04)++0x01 line.word 0x00 "MB0_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "MB0_D0,DATA0" line.byte 0x01 "MB0_D1,DATA1" line.byte 0x02 "MB0_D2,DATA2" line.byte 0x3 "MB0_D3,DATA3" line.byte 0x04 "MB0_D4,DATA4" line.byte 0x5 "MB0_D5,DATA5" line.byte 0x6 "MB0_D6,DATA6" line.byte 0x7 "MB0_D7,DATA7" group.word (0x200+0x0E)++0x01 line.word 0x00 "MB0_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x210++0x03 line.long 0x00 "MB1_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x210+0x04)++0x01 line.word 0x00 "MB1_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "MB1_D0,DATA0" line.byte 0x01 "MB1_D1,DATA1" line.byte 0x02 "MB1_D2,DATA2" line.byte 0x3 "MB1_D3,DATA3" line.byte 0x04 "MB1_D4,DATA4" line.byte 0x5 "MB1_D5,DATA5" line.byte 0x6 "MB1_D6,DATA6" line.byte 0x7 "MB1_D7,DATA7" group.word (0x210+0x0E)++0x01 line.word 0x00 "MB1_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x220++0x03 line.long 0x00 "MB2_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x220+0x04)++0x01 line.word 0x00 "MB2_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "MB2_D0,DATA0" line.byte 0x01 "MB2_D1,DATA1" line.byte 0x02 "MB2_D2,DATA2" line.byte 0x3 "MB2_D3,DATA3" line.byte 0x04 "MB2_D4,DATA4" line.byte 0x5 "MB2_D5,DATA5" line.byte 0x6 "MB2_D6,DATA6" line.byte 0x7 "MB2_D7,DATA7" group.word (0x220+0x0E)++0x01 line.word 0x00 "MB2_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x230++0x03 line.long 0x00 "MB3_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x230+0x04)++0x01 line.word 0x00 "MB3_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "MB3_D0,DATA0" line.byte 0x01 "MB3_D1,DATA1" line.byte 0x02 "MB3_D2,DATA2" line.byte 0x3 "MB3_D3,DATA3" line.byte 0x04 "MB3_D4,DATA4" line.byte 0x5 "MB3_D5,DATA5" line.byte 0x6 "MB3_D6,DATA6" line.byte 0x7 "MB3_D7,DATA7" group.word (0x230+0x0E)++0x01 line.word 0x00 "MB3_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x240++0x03 line.long 0x00 "MB4_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x240+0x04)++0x01 line.word 0x00 "MB4_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "MB4_D0,DATA0" line.byte 0x01 "MB4_D1,DATA1" line.byte 0x02 "MB4_D2,DATA2" line.byte 0x3 "MB4_D3,DATA3" line.byte 0x04 "MB4_D4,DATA4" line.byte 0x5 "MB4_D5,DATA5" line.byte 0x6 "MB4_D6,DATA6" line.byte 0x7 "MB4_D7,DATA7" group.word (0x240+0x0E)++0x01 line.word 0x00 "MB4_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x250++0x03 line.long 0x00 "MB5_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x250+0x04)++0x01 line.word 0x00 "MB5_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "MB5_D0,DATA0" line.byte 0x01 "MB5_D1,DATA1" line.byte 0x02 "MB5_D2,DATA2" line.byte 0x3 "MB5_D3,DATA3" line.byte 0x04 "MB5_D4,DATA4" line.byte 0x5 "MB5_D5,DATA5" line.byte 0x6 "MB5_D6,DATA6" line.byte 0x7 "MB5_D7,DATA7" group.word (0x250+0x0E)++0x01 line.word 0x00 "MB5_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x260++0x03 line.long 0x00 "MB6_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x260+0x04)++0x01 line.word 0x00 "MB6_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "MB6_D0,DATA0" line.byte 0x01 "MB6_D1,DATA1" line.byte 0x02 "MB6_D2,DATA2" line.byte 0x3 "MB6_D3,DATA3" line.byte 0x04 "MB6_D4,DATA4" line.byte 0x5 "MB6_D5,DATA5" line.byte 0x6 "MB6_D6,DATA6" line.byte 0x7 "MB6_D7,DATA7" group.word (0x260+0x0E)++0x01 line.word 0x00 "MB6_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x270++0x03 line.long 0x00 "MB7_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x270+0x04)++0x01 line.word 0x00 "MB7_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "MB7_D0,DATA0" line.byte 0x01 "MB7_D1,DATA1" line.byte 0x02 "MB7_D2,DATA2" line.byte 0x3 "MB7_D3,DATA3" line.byte 0x04 "MB7_D4,DATA4" line.byte 0x5 "MB7_D5,DATA5" line.byte 0x6 "MB7_D6,DATA6" line.byte 0x7 "MB7_D7,DATA7" group.word (0x270+0x0E)++0x01 line.word 0x00 "MB7_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x280++0x03 line.long 0x00 "MB8_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x280+0x04)++0x01 line.word 0x00 "MB8_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "MB8_D0,DATA0" line.byte 0x01 "MB8_D1,DATA1" line.byte 0x02 "MB8_D2,DATA2" line.byte 0x3 "MB8_D3,DATA3" line.byte 0x04 "MB8_D4,DATA4" line.byte 0x5 "MB8_D5,DATA5" line.byte 0x6 "MB8_D6,DATA6" line.byte 0x7 "MB8_D7,DATA7" group.word (0x280+0x0E)++0x01 line.word 0x00 "MB8_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x290++0x03 line.long 0x00 "MB9_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x290+0x04)++0x01 line.word 0x00 "MB9_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "MB9_D0,DATA0" line.byte 0x01 "MB9_D1,DATA1" line.byte 0x02 "MB9_D2,DATA2" line.byte 0x3 "MB9_D3,DATA3" line.byte 0x04 "MB9_D4,DATA4" line.byte 0x5 "MB9_D5,DATA5" line.byte 0x6 "MB9_D6,DATA6" line.byte 0x7 "MB9_D7,DATA7" group.word (0x290+0x0E)++0x01 line.word 0x00 "MB9_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2A0++0x03 line.long 0x00 "MB10_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2A0+0x04)++0x01 line.word 0x00 "MB10_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "MB10_D0,DATA0" line.byte 0x01 "MB10_D1,DATA1" line.byte 0x02 "MB10_D2,DATA2" line.byte 0x3 "MB10_D3,DATA3" line.byte 0x04 "MB10_D4,DATA4" line.byte 0x5 "MB10_D5,DATA5" line.byte 0x6 "MB10_D6,DATA6" line.byte 0x7 "MB10_D7,DATA7" group.word (0x2A0+0x0E)++0x01 line.word 0x00 "MB10_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2B0++0x03 line.long 0x00 "MB11_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2B0+0x04)++0x01 line.word 0x00 "MB11_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "MB11_D0,DATA0" line.byte 0x01 "MB11_D1,DATA1" line.byte 0x02 "MB11_D2,DATA2" line.byte 0x3 "MB11_D3,DATA3" line.byte 0x04 "MB11_D4,DATA4" line.byte 0x5 "MB11_D5,DATA5" line.byte 0x6 "MB11_D6,DATA6" line.byte 0x7 "MB11_D7,DATA7" group.word (0x2B0+0x0E)++0x01 line.word 0x00 "MB11_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2C0++0x03 line.long 0x00 "MB12_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2C0+0x04)++0x01 line.word 0x00 "MB12_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "MB12_D0,DATA0" line.byte 0x01 "MB12_D1,DATA1" line.byte 0x02 "MB12_D2,DATA2" line.byte 0x3 "MB12_D3,DATA3" line.byte 0x04 "MB12_D4,DATA4" line.byte 0x5 "MB12_D5,DATA5" line.byte 0x6 "MB12_D6,DATA6" line.byte 0x7 "MB12_D7,DATA7" group.word (0x2C0+0x0E)++0x01 line.word 0x00 "MB12_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2D0++0x03 line.long 0x00 "MB13_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2D0+0x04)++0x01 line.word 0x00 "MB13_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "MB13_D0,DATA0" line.byte 0x01 "MB13_D1,DATA1" line.byte 0x02 "MB13_D2,DATA2" line.byte 0x3 "MB13_D3,DATA3" line.byte 0x04 "MB13_D4,DATA4" line.byte 0x5 "MB13_D5,DATA5" line.byte 0x6 "MB13_D6,DATA6" line.byte 0x7 "MB13_D7,DATA7" group.word (0x2D0+0x0E)++0x01 line.word 0x00 "MB13_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2E0++0x03 line.long 0x00 "MB14_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2E0+0x04)++0x01 line.word 0x00 "MB14_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "MB14_D0,DATA0" line.byte 0x01 "MB14_D1,DATA1" line.byte 0x02 "MB14_D2,DATA2" line.byte 0x3 "MB14_D3,DATA3" line.byte 0x04 "MB14_D4,DATA4" line.byte 0x5 "MB14_D5,DATA5" line.byte 0x6 "MB14_D6,DATA6" line.byte 0x7 "MB14_D7,DATA7" group.word (0x2E0+0x0E)++0x01 line.word 0x00 "MB14_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x2F0++0x03 line.long 0x00 "MB15_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x2F0+0x04)++0x01 line.word 0x00 "MB15_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "MB15_D0,DATA0" line.byte 0x01 "MB15_D1,DATA1" line.byte 0x02 "MB15_D2,DATA2" line.byte 0x3 "MB15_D3,DATA3" line.byte 0x04 "MB15_D4,DATA4" line.byte 0x5 "MB15_D5,DATA5" line.byte 0x6 "MB15_D6,DATA6" line.byte 0x7 "MB15_D7,DATA7" group.word (0x2F0+0x0E)++0x01 line.word 0x00 "MB15_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x300++0x03 line.long 0x00 "MB16_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x300+0x04)++0x01 line.word 0x00 "MB16_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "MB16_D0,DATA0" line.byte 0x01 "MB16_D1,DATA1" line.byte 0x02 "MB16_D2,DATA2" line.byte 0x3 "MB16_D3,DATA3" line.byte 0x04 "MB16_D4,DATA4" line.byte 0x5 "MB16_D5,DATA5" line.byte 0x6 "MB16_D6,DATA6" line.byte 0x7 "MB16_D7,DATA7" group.word (0x300+0x0E)++0x01 line.word 0x00 "MB16_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x310++0x03 line.long 0x00 "MB17_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x310+0x04)++0x01 line.word 0x00 "MB17_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "MB17_D0,DATA0" line.byte 0x01 "MB17_D1,DATA1" line.byte 0x02 "MB17_D2,DATA2" line.byte 0x3 "MB17_D3,DATA3" line.byte 0x04 "MB17_D4,DATA4" line.byte 0x5 "MB17_D5,DATA5" line.byte 0x6 "MB17_D6,DATA6" line.byte 0x7 "MB17_D7,DATA7" group.word (0x310+0x0E)++0x01 line.word 0x00 "MB17_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x320++0x03 line.long 0x00 "MB18_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x320+0x04)++0x01 line.word 0x00 "MB18_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "MB18_D0,DATA0" line.byte 0x01 "MB18_D1,DATA1" line.byte 0x02 "MB18_D2,DATA2" line.byte 0x3 "MB18_D3,DATA3" line.byte 0x04 "MB18_D4,DATA4" line.byte 0x5 "MB18_D5,DATA5" line.byte 0x6 "MB18_D6,DATA6" line.byte 0x7 "MB18_D7,DATA7" group.word (0x320+0x0E)++0x01 line.word 0x00 "MB18_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x330++0x03 line.long 0x00 "MB19_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x330+0x04)++0x01 line.word 0x00 "MB19_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "MB19_D0,DATA0" line.byte 0x01 "MB19_D1,DATA1" line.byte 0x02 "MB19_D2,DATA2" line.byte 0x3 "MB19_D3,DATA3" line.byte 0x04 "MB19_D4,DATA4" line.byte 0x5 "MB19_D5,DATA5" line.byte 0x6 "MB19_D6,DATA6" line.byte 0x7 "MB19_D7,DATA7" group.word (0x330+0x0E)++0x01 line.word 0x00 "MB19_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x340++0x03 line.long 0x00 "MB20_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x340+0x04)++0x01 line.word 0x00 "MB20_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "MB20_D0,DATA0" line.byte 0x01 "MB20_D1,DATA1" line.byte 0x02 "MB20_D2,DATA2" line.byte 0x3 "MB20_D3,DATA3" line.byte 0x04 "MB20_D4,DATA4" line.byte 0x5 "MB20_D5,DATA5" line.byte 0x6 "MB20_D6,DATA6" line.byte 0x7 "MB20_D7,DATA7" group.word (0x340+0x0E)++0x01 line.word 0x00 "MB20_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x350++0x03 line.long 0x00 "MB21_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x350+0x04)++0x01 line.word 0x00 "MB21_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "MB21_D0,DATA0" line.byte 0x01 "MB21_D1,DATA1" line.byte 0x02 "MB21_D2,DATA2" line.byte 0x3 "MB21_D3,DATA3" line.byte 0x04 "MB21_D4,DATA4" line.byte 0x5 "MB21_D5,DATA5" line.byte 0x6 "MB21_D6,DATA6" line.byte 0x7 "MB21_D7,DATA7" group.word (0x350+0x0E)++0x01 line.word 0x00 "MB21_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x360++0x03 line.long 0x00 "MB22_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x360+0x04)++0x01 line.word 0x00 "MB22_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "MB22_D0,DATA0" line.byte 0x01 "MB22_D1,DATA1" line.byte 0x02 "MB22_D2,DATA2" line.byte 0x3 "MB22_D3,DATA3" line.byte 0x04 "MB22_D4,DATA4" line.byte 0x5 "MB22_D5,DATA5" line.byte 0x6 "MB22_D6,DATA6" line.byte 0x7 "MB22_D7,DATA7" group.word (0x360+0x0E)++0x01 line.word 0x00 "MB22_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x370++0x03 line.long 0x00 "MB23_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x370+0x04)++0x01 line.word 0x00 "MB23_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "MB23_D0,DATA0" line.byte 0x01 "MB23_D1,DATA1" line.byte 0x02 "MB23_D2,DATA2" line.byte 0x3 "MB23_D3,DATA3" line.byte 0x04 "MB23_D4,DATA4" line.byte 0x5 "MB23_D5,DATA5" line.byte 0x6 "MB23_D6,DATA6" line.byte 0x7 "MB23_D7,DATA7" group.word (0x370+0x0E)++0x01 line.word 0x00 "MB23_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x380++0x03 line.long 0x00 "MB24_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x380+0x04)++0x01 line.word 0x00 "MB24_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "MB24_D0,DATA0" line.byte 0x01 "MB24_D1,DATA1" line.byte 0x02 "MB24_D2,DATA2" line.byte 0x3 "MB24_D3,DATA3" line.byte 0x04 "MB24_D4,DATA4" line.byte 0x5 "MB24_D5,DATA5" line.byte 0x6 "MB24_D6,DATA6" line.byte 0x7 "MB24_D7,DATA7" group.word (0x380+0x0E)++0x01 line.word 0x00 "MB24_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x390++0x03 line.long 0x00 "MB25_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x390+0x04)++0x01 line.word 0x00 "MB25_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "MB25_D0,DATA0" line.byte 0x01 "MB25_D1,DATA1" line.byte 0x02 "MB25_D2,DATA2" line.byte 0x3 "MB25_D3,DATA3" line.byte 0x04 "MB25_D4,DATA4" line.byte 0x5 "MB25_D5,DATA5" line.byte 0x6 "MB25_D6,DATA6" line.byte 0x7 "MB25_D7,DATA7" group.word (0x390+0x0E)++0x01 line.word 0x00 "MB25_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3A0++0x03 line.long 0x00 "MB26_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3A0+0x04)++0x01 line.word 0x00 "MB26_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "MB26_D0,DATA0" line.byte 0x01 "MB26_D1,DATA1" line.byte 0x02 "MB26_D2,DATA2" line.byte 0x3 "MB26_D3,DATA3" line.byte 0x04 "MB26_D4,DATA4" line.byte 0x5 "MB26_D5,DATA5" line.byte 0x6 "MB26_D6,DATA6" line.byte 0x7 "MB26_D7,DATA7" group.word (0x3A0+0x0E)++0x01 line.word 0x00 "MB26_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3B0++0x03 line.long 0x00 "MB27_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3B0+0x04)++0x01 line.word 0x00 "MB27_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "MB27_D0,DATA0" line.byte 0x01 "MB27_D1,DATA1" line.byte 0x02 "MB27_D2,DATA2" line.byte 0x3 "MB27_D3,DATA3" line.byte 0x04 "MB27_D4,DATA4" line.byte 0x5 "MB27_D5,DATA5" line.byte 0x6 "MB27_D6,DATA6" line.byte 0x7 "MB27_D7,DATA7" group.word (0x3B0+0x0E)++0x01 line.word 0x00 "MB27_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3C0++0x03 line.long 0x00 "MB28_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3C0+0x04)++0x01 line.word 0x00 "MB28_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "MB28_D0,DATA0" line.byte 0x01 "MB28_D1,DATA1" line.byte 0x02 "MB28_D2,DATA2" line.byte 0x3 "MB28_D3,DATA3" line.byte 0x04 "MB28_D4,DATA4" line.byte 0x5 "MB28_D5,DATA5" line.byte 0x6 "MB28_D6,DATA6" line.byte 0x7 "MB28_D7,DATA7" group.word (0x3C0+0x0E)++0x01 line.word 0x00 "MB28_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3D0++0x03 line.long 0x00 "MB29_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3D0+0x04)++0x01 line.word 0x00 "MB29_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "MB29_D0,DATA0" line.byte 0x01 "MB29_D1,DATA1" line.byte 0x02 "MB29_D2,DATA2" line.byte 0x3 "MB29_D3,DATA3" line.byte 0x04 "MB29_D4,DATA4" line.byte 0x5 "MB29_D5,DATA5" line.byte 0x6 "MB29_D6,DATA6" line.byte 0x7 "MB29_D7,DATA7" group.word (0x3D0+0x0E)++0x01 line.word 0x00 "MB29_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3E0++0x03 line.long 0x00 "MB30_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3E0+0x04)++0x01 line.word 0x00 "MB30_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "MB30_D0,DATA0" line.byte 0x01 "MB30_D1,DATA1" line.byte 0x02 "MB30_D2,DATA2" line.byte 0x3 "MB30_D3,DATA3" line.byte 0x04 "MB30_D4,DATA4" line.byte 0x5 "MB30_D5,DATA5" line.byte 0x6 "MB30_D6,DATA6" line.byte 0x7 "MB30_D7,DATA7" group.word (0x3E0+0x0E)++0x01 line.word 0x00 "MB30_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" group.long 0x3F0++0x03 line.long 0x00 "MB31_ID,Mailbox ID" bitfld.long 0x00 31. " IDE ,ID extension" "Standard,Extended" bitfld.long 0x00 30. " RTR ,Remote transmission request" "Data,Remote" bitfld.long 0x00 28. " SID[10] ,Standard ID data bit 10" "0,1" bitfld.long 0x00 27. " [9] ,Standard ID data bit 9" "0,1" newline bitfld.long 0x00 26. " [8] ,Standard ID data bit 8" "0,1" bitfld.long 0x00 25. " [7] ,Standard ID data bit 7" "0,1" bitfld.long 0x00 24. " [6] ,Standard ID data bit 6" "0,1" bitfld.long 0x00 23. " [5] ,Standard ID data bit 5" "0,1" newline bitfld.long 0x00 22. " [4] ,Standard ID data bit 4" "0,1" bitfld.long 0x00 21. " [3] ,Standard ID data bit 3" "0,1" bitfld.long 0x00 20. " [2] ,Standard ID data bit 2" "0,1" bitfld.long 0x00 19. " [1] ,Standard ID data bit 1" "0,1" newline bitfld.long 0x00 18. " [0] ,Standard ID data bit 0" "0,1" bitfld.long 0x00 17. " EID[16] ,Extended ID data bit 16" "0,1" bitfld.long 0x00 16. " [15] ,Extended ID data bit 15" "0,1" bitfld.long 0x00 15. " [14] ,Extended ID data bit 14" "0,1" newline bitfld.long 0x00 14. " [13] ,Extended ID data bit 13" "0,1" bitfld.long 0x00 12. " [12] ,Extended ID data bit 12" "0,1" bitfld.long 0x00 11. " [11] ,Extended ID data bit 11" "0,1" bitfld.long 0x00 10. " [10] ,Extended ID data bit 10" "0,1" newline bitfld.long 0x00 9. " [9] ,Extended ID data bit 9" "0,1" bitfld.long 0x00 8. " [8] ,Extended ID data bit 8" "0,1" bitfld.long 0x00 7. " [7] ,Extended ID data bit 7" "0,1" bitfld.long 0x00 6. " [6] ,Extended ID data bit 6" "0,1" newline bitfld.long 0x00 5. " [5] ,Extended ID data bit 5" "0,1" bitfld.long 0x00 4. " [4] ,Extended ID data bit 4" "0,1" bitfld.long 0x00 3. " [3] ,Extended ID data bit 3" "0,1" bitfld.long 0x00 2. " [2] ,Extended ID data bit 2" "0,1" newline bitfld.long 0x00 1. " [1] ,Extended ID data bit 1" "0,1" bitfld.long 0x00 0. " [0] ,Extended ID data bit 0" "0,1" group.word (0x3F0+0x04)++0x01 line.word 0x00 "MB31_DL,Mailbox Data Length" bitfld.word 0x00 0.--3. " DLC ,Data length code" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "MB31_D0,DATA0" line.byte 0x01 "MB31_D1,DATA1" line.byte 0x02 "MB31_D2,DATA2" line.byte 0x3 "MB31_D3,DATA3" line.byte 0x04 "MB31_D4,DATA4" line.byte 0x5 "MB31_D5,DATA5" line.byte 0x6 "MB31_D6,DATA6" line.byte 0x7 "MB31_D7,DATA7" group.word (0x3F0+0x0E)++0x01 line.word 0x00 "MB31_TS,Time Stamps" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time stamp higher byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time stamp lower byte" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.w(ad:0x40051000+0x840))&0x01)==0x00) group.long 0x42C++0x03 line.long 0x00 "MIER,Mailbox Interrupt Enable Register" bitfld.long 0x00 31. " MB[31] ,Interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Interrupt 26 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" newline bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" else group.long 0x42C++0x03 line.long 0x00 "MIER_FIFO,Mailbox Interrupt Enable Register for FIFO Mailbox Mode" bitfld.long 0x00 29. " MB[29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" endif else if (((per.w(ad:0x40051000+0x840))&0x01)==0x01) group.long 0x42C++0x03 line.long 0x00 "MIER,Mailbox Interrupt Enable Register" bitfld.long 0x00 31. " MB[31] ,Interrupt 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,Interrupt 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,Interrupt 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,Interrupt 26 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" newline bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" newline bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" else group.long 0x42C++0x03 line.long 0x00 "MIER_FIFO,Mailbox Interrupt Enable Register for FIFO Mailbox Mode" bitfld.long 0x00 29. " MB[29] ,Interrupt 29 enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,Interrupt 28 enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,Interrupt 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,Interrupt 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,Interrupt 23 enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,Interrupt 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,Interrupt 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,Interrupt 20 enable" "Disabled,Enabled" newline bitfld.long 0x00 19. " [19] ,Interrupt 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,Interrupt 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,Interrupt 17 enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,Interrupt 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,Interrupt 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Interrupt 14 enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Interrupt 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Interrupt 12 enable" "Disabled,Enabled" newline bitfld.long 0x00 11. " [11] ,Interrupt 11 enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Interrupt 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Interrupt 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Interrupt 8 enable" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Interrupt 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Interrupt 5 enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt 4 enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " [3] ,Interrupt 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Interrupt 2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt 0 enable" "Disabled,Enabled" endif endif if (((per.w(ad:0x40051000+0x820))&0xC0)==0x80) group.byte 0x820++0x00 line.byte 0x00 "MCTL_TX0,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x820))&0xC0)==0x40) group.byte 0x820++0x00 line.byte 0x00 "MCTL_RX0,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x820++0x00 hide.byte 0x00 "MCTL_RX0,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x821))&0xC0)==0x80) group.byte 0x821++0x00 line.byte 0x00 "MCTL_TX1,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x821))&0xC0)==0x40) group.byte 0x821++0x00 line.byte 0x00 "MCTL_RX1,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x821++0x00 hide.byte 0x00 "MCTL_RX1,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x822))&0xC0)==0x80) group.byte 0x822++0x00 line.byte 0x00 "MCTL_TX2,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x822))&0xC0)==0x40) group.byte 0x822++0x00 line.byte 0x00 "MCTL_RX2,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x822++0x00 hide.byte 0x00 "MCTL_RX2,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x823))&0xC0)==0x80) group.byte 0x823++0x00 line.byte 0x00 "MCTL_TX3,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x823))&0xC0)==0x40) group.byte 0x823++0x00 line.byte 0x00 "MCTL_RX3,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x823++0x00 hide.byte 0x00 "MCTL_RX3,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x824))&0xC0)==0x80) group.byte 0x824++0x00 line.byte 0x00 "MCTL_TX4,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x824))&0xC0)==0x40) group.byte 0x824++0x00 line.byte 0x00 "MCTL_RX4,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x824++0x00 hide.byte 0x00 "MCTL_RX4,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x825))&0xC0)==0x80) group.byte 0x825++0x00 line.byte 0x00 "MCTL_TX5,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x825))&0xC0)==0x40) group.byte 0x825++0x00 line.byte 0x00 "MCTL_RX5,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x825++0x00 hide.byte 0x00 "MCTL_RX5,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x826))&0xC0)==0x80) group.byte 0x826++0x00 line.byte 0x00 "MCTL_TX6,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x826))&0xC0)==0x40) group.byte 0x826++0x00 line.byte 0x00 "MCTL_RX6,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x826++0x00 hide.byte 0x00 "MCTL_RX6,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x827))&0xC0)==0x80) group.byte 0x827++0x00 line.byte 0x00 "MCTL_TX7,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x827))&0xC0)==0x40) group.byte 0x827++0x00 line.byte 0x00 "MCTL_RX7,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x827++0x00 hide.byte 0x00 "MCTL_RX7,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x828))&0xC0)==0x80) group.byte 0x828++0x00 line.byte 0x00 "MCTL_TX8,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x828))&0xC0)==0x40) group.byte 0x828++0x00 line.byte 0x00 "MCTL_RX8,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x828++0x00 hide.byte 0x00 "MCTL_RX8,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x829))&0xC0)==0x80) group.byte 0x829++0x00 line.byte 0x00 "MCTL_TX9,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x829))&0xC0)==0x40) group.byte 0x829++0x00 line.byte 0x00 "MCTL_RX9,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x829++0x00 hide.byte 0x00 "MCTL_RX9,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x82A))&0xC0)==0x80) group.byte 0x82A++0x00 line.byte 0x00 "MCTL_TX10,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x82A))&0xC0)==0x40) group.byte 0x82A++0x00 line.byte 0x00 "MCTL_RX10,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82A++0x00 hide.byte 0x00 "MCTL_RX10,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x82B))&0xC0)==0x80) group.byte 0x82B++0x00 line.byte 0x00 "MCTL_TX11,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x82B))&0xC0)==0x40) group.byte 0x82B++0x00 line.byte 0x00 "MCTL_RX11,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82B++0x00 hide.byte 0x00 "MCTL_RX11,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x82C))&0xC0)==0x80) group.byte 0x82C++0x00 line.byte 0x00 "MCTL_TX12,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x82C))&0xC0)==0x40) group.byte 0x82C++0x00 line.byte 0x00 "MCTL_RX12,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82C++0x00 hide.byte 0x00 "MCTL_RX12,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x82D))&0xC0)==0x80) group.byte 0x82D++0x00 line.byte 0x00 "MCTL_TX13,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x82D))&0xC0)==0x40) group.byte 0x82D++0x00 line.byte 0x00 "MCTL_RX13,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82D++0x00 hide.byte 0x00 "MCTL_RX13,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x82E))&0xC0)==0x80) group.byte 0x82E++0x00 line.byte 0x00 "MCTL_TX14,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x82E))&0xC0)==0x40) group.byte 0x82E++0x00 line.byte 0x00 "MCTL_RX14,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82E++0x00 hide.byte 0x00 "MCTL_RX14,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x82F))&0xC0)==0x80) group.byte 0x82F++0x00 line.byte 0x00 "MCTL_TX15,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x82F))&0xC0)==0x40) group.byte 0x82F++0x00 line.byte 0x00 "MCTL_RX15,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x82F++0x00 hide.byte 0x00 "MCTL_RX15,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x830))&0xC0)==0x80) group.byte 0x830++0x00 line.byte 0x00 "MCTL_TX16,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x830))&0xC0)==0x40) group.byte 0x830++0x00 line.byte 0x00 "MCTL_RX16,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x830++0x00 hide.byte 0x00 "MCTL_RX16,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x831))&0xC0)==0x80) group.byte 0x831++0x00 line.byte 0x00 "MCTL_TX17,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x831))&0xC0)==0x40) group.byte 0x831++0x00 line.byte 0x00 "MCTL_RX17,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x831++0x00 hide.byte 0x00 "MCTL_RX17,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x832))&0xC0)==0x80) group.byte 0x832++0x00 line.byte 0x00 "MCTL_TX18,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x832))&0xC0)==0x40) group.byte 0x832++0x00 line.byte 0x00 "MCTL_RX18,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x832++0x00 hide.byte 0x00 "MCTL_RX18,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x833))&0xC0)==0x80) group.byte 0x833++0x00 line.byte 0x00 "MCTL_TX19,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x833))&0xC0)==0x40) group.byte 0x833++0x00 line.byte 0x00 "MCTL_RX19,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x833++0x00 hide.byte 0x00 "MCTL_RX19,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x834))&0xC0)==0x80) group.byte 0x834++0x00 line.byte 0x00 "MCTL_TX20,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x834))&0xC0)==0x40) group.byte 0x834++0x00 line.byte 0x00 "MCTL_RX20,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x834++0x00 hide.byte 0x00 "MCTL_RX20,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x835))&0xC0)==0x80) group.byte 0x835++0x00 line.byte 0x00 "MCTL_TX21,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x835))&0xC0)==0x40) group.byte 0x835++0x00 line.byte 0x00 "MCTL_RX21,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x835++0x00 hide.byte 0x00 "MCTL_RX21,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x836))&0xC0)==0x80) group.byte 0x836++0x00 line.byte 0x00 "MCTL_TX22,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x836))&0xC0)==0x40) group.byte 0x836++0x00 line.byte 0x00 "MCTL_RX22,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x836++0x00 hide.byte 0x00 "MCTL_RX22,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x837))&0xC0)==0x80) group.byte 0x837++0x00 line.byte 0x00 "MCTL_TX23,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x837))&0xC0)==0x40) group.byte 0x837++0x00 line.byte 0x00 "MCTL_RX23,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x837++0x00 hide.byte 0x00 "MCTL_RX23,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x838))&0xC0)==0x80) group.byte 0x838++0x00 line.byte 0x00 "MCTL_TX24,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x838))&0xC0)==0x40) group.byte 0x838++0x00 line.byte 0x00 "MCTL_RX24,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x838++0x00 hide.byte 0x00 "MCTL_RX24,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x839))&0xC0)==0x80) group.byte 0x839++0x00 line.byte 0x00 "MCTL_TX25,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x839))&0xC0)==0x40) group.byte 0x839++0x00 line.byte 0x00 "MCTL_RX25,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x839++0x00 hide.byte 0x00 "MCTL_RX25,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x83A))&0xC0)==0x80) group.byte 0x83A++0x00 line.byte 0x00 "MCTL_TX26,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x83A))&0xC0)==0x40) group.byte 0x83A++0x00 line.byte 0x00 "MCTL_RX26,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83A++0x00 hide.byte 0x00 "MCTL_RX26,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x83B))&0xC0)==0x80) group.byte 0x83B++0x00 line.byte 0x00 "MCTL_TX27,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x83B))&0xC0)==0x40) group.byte 0x83B++0x00 line.byte 0x00 "MCTL_RX27,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83B++0x00 hide.byte 0x00 "MCTL_RX27,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x83C))&0xC0)==0x80) group.byte 0x83C++0x00 line.byte 0x00 "MCTL_TX28,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x83C))&0xC0)==0x40) group.byte 0x83C++0x00 line.byte 0x00 "MCTL_RX28,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83C++0x00 hide.byte 0x00 "MCTL_RX28,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x83D))&0xC0)==0x80) group.byte 0x83D++0x00 line.byte 0x00 "MCTL_TX29,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x83D))&0xC0)==0x40) group.byte 0x83D++0x00 line.byte 0x00 "MCTL_RX29,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83D++0x00 hide.byte 0x00 "MCTL_RX29,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x83E))&0xC0)==0x80) group.byte 0x83E++0x00 line.byte 0x00 "MCTL_TX30,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x83E))&0xC0)==0x40) group.byte 0x83E++0x00 line.byte 0x00 "MCTL_RX30,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83E++0x00 hide.byte 0x00 "MCTL_RX30,Message Control Register for Receive" endif if (((per.w(ad:0x40051000+0x83F))&0xC0)==0x80) group.byte 0x83F++0x00 line.byte 0x00 "MCTL_TX31,Message Control Register for Transmit" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " TRMABT ,Transmission abort complete flag" "Not completed,Completed" rbitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission complete flag" "Not completed,Completed" elif (((per.w(ad:0x40051000+0x83F))&0xC0)==0x40) group.byte 0x83F++0x00 line.byte 0x00 "MCTL_RX31,Message Control Register for Receive" bitfld.byte 0x00 7. " TRMREQ ,Transmit mailbox request" "No transmission,Transmission" bitfld.byte 0x00 6. " RECREQ ,Receive mailbox request" "No reception,Reception" bitfld.byte 0x00 4. " ONESHOT ,One-Shot enable" "Disabled,Enabled" newline bitfld.byte 0x00 2. " MSGLOST ,Message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress status flag" "Not in progress,In progress" bitfld.byte 0x00 0. " NEWDATA ,Reception complete flag" "No data,New message" else hgroup.byte 0x83F++0x00 hide.byte 0x00 "MCTL_RX31,Message Control Register for Receive" endif group.byte 0x848++0x02 line.byte 0x00 "RFCR,Receive FIFO Control Register" rbitfld.byte 0x00 7. " RFEST ,Receive FIFO empty status flag" "Not empty,Empty" rbitfld.byte 0x00 6. " RFWST ,Receive FIFO buffer warning status flag" "No warning,Warning" rbitfld.byte 0x00 5. " RFFST ,Receive FIFO full status flag" "Not full,Full" newline bitfld.byte 0x00 4. " RFMLF ,Receive FIFO message lost flag" "Not lost,Lost" rbitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO unread message number status" "None,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO enable" "Disabled,Enabled" line.byte 0x01 "RFPCR,Receive FIFO Pointer Control Register" line.byte 0x02 "TFCR,Transmit FIFO Control Register" rbitfld.byte 0x02 7. " TFEST ,Transmit FIFO empty status" "Not empty,Empty" rbitfld.byte 0x02 6. " TFFST ,Transmit FIFO full status" "Not full,Full" rbitfld.byte 0x02 1.--3. " TFUST ,Transmit FIFO unsent message number status" "None,1,2,3,4,?..." newline bitfld.byte 0x02 0. " TFE ,Transmit FIFO enable" "Disabled,Enabled" wgroup.byte 0x84B++0x00 line.byte 0x00 "TFPCR,Transmit FIFO Pointer Control Register" rgroup.word 0x842++0x01 line.word 0x00 "STR,Status Register" bitfld.word 0x00 14. " RECST ,Receive status flag" "Idle/transmission in progress,Reception in progress" bitfld.word 0x00 13. " TRMST ,Transmit status flag" "Idle/reception in progress,Transmission in progress/bus-off" bitfld.word 0x00 12. " BOST ,Bus-Off status flag" "No bus-off,Bus-off" newline bitfld.word 0x00 11. " EPST ,Error-Passive status flag" "No error-passive state,Error-passive state" bitfld.word 0x00 10. " SLPST ,CAN sleep status flag" "No sleep mode,Sleep mode" bitfld.word 0x00 9. " HLTST ,CAN halt status flag" "No halt mode,Halt mode" newline bitfld.word 0x00 8. " RSTST ,CAN reset status flag" "No reset mode,Reset mode" bitfld.word 0x00 7. " EST ,Error status flag" "No error,Error" bitfld.word 0x00 6. " TABST ,Transmission abort status flag" "Not occurred,Occurred" newline bitfld.word 0x00 5. " FMLST ,FIFO mailbox message lost status flag" "Not lost,Lost" bitfld.word 0x00 4. " NMLST ,Normal mailbox message lost status flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TFST ,Transmit FIFO status flag" "Full,Not full" newline bitfld.word 0x00 2. " RFST ,Receive FIFO status flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA status flag" "Not occurred,Occurred" bitfld.word 0x00 0. " NDST ,NEWDATA status flag" "Not occurred,Occurred" group.byte 0x853++0x00 line.byte 0x00 "MSMR,Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox search mode select" "Receive mailbox,Transmit mailbox,Message lost,Channel" rgroup.byte 0x852++0x00 line.byte 0x00 "MSSR,Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search result status" "Found,Not found" bitfld.byte 0x00 0.--4. " MBNST ,Search result mailbox number status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.byte 0x851++0x00 line.byte 0x00 "CSSR,Channel Search Support Register" group.word 0x856++0x01 line.word 0x00 "AFSR,Acceptance Filter Support Register" group.byte 0x84C++0x01 line.byte 0x00 "EIER,Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus lock interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload frame transmit interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Overrun interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 4. " BORIE ,Bus-Off recovery interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off entry interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,EPIE Error-Passive interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x00 1. " EWIE ,Error-Warning interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus error interrupt enable" "Disabled,Enabled" line.byte 0x01 "EIFR,Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus lock detect flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload frame transmission detect flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive overrun detect flag" "Not detected,Detected" newline bitfld.byte 0x01 4. " BORIF ,Bus-Off recovery detect flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off entry detect flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error-Passive detect flag" "Not detected,Detected" newline bitfld.byte 0x01 1. " EWIF ,Error-Warning detect flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus error detect flag" "Not detected,Detected" rgroup.byte 0x84E++0x01 line.byte 0x00 "RECR,Receive Error Count Register" line.byte 0x01 "TECR,Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x00 "ECSR,Error Code Store Register" bitfld.byte 0x00 7. " EDPM ,Error display mode select" "First detected,Accumulated" bitfld.byte 0x00 6. " ADEF ,ACK delimiter error flag" "No error,Error" bitfld.byte 0x00 5. " BE0F ,Bit error (dominant) flag" "No error,Error" newline bitfld.byte 0x00 4. " BE1F ,Bit error (recessive) flag" "No error,Error" bitfld.byte 0x00 3. " CEF ,CRC error flag" "No error,Error" bitfld.byte 0x00 2. " AEF ,ACK error flag" "No error,Error" newline bitfld.byte 0x00 1. " FEF ,Form error flag" "No error,Error" bitfld.byte 0x00 0. " SEF ,Stuff error flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x00 "TSR,Time Stamp Register" group.byte 0x858++0x00 line.byte 0x00 "TCR,Test Control Register" bitfld.byte 0x00 1.--2. " TSTM ,CAN test mode select" "Not CAN,Listen-only,Self-test 0,Self-test 1" bitfld.byte 0x00 0. " TSTE ,CAN test mode enable" "Disabled,Enabled" width 0x0B tree.end tree.end tree.open "SPI (Serial Peripheral Interface)" tree "SPI0" base ad:0x40072000 width 14. group.byte 0x00++0x02 line.byte 0x0 "SPCR,SPI Control Register" bitfld.byte 0x0 7. " SPRIE ,SPI receive buffer full interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 6. " SPE ,SPI function enable" "Disabled,Enabled" newline bitfld.byte 0x0 5. " SPTIE ,Transmit buffer empty interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 4. " SPEIE ,SPI error interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 3. " MSTR ,SPI Master/Slave mode select" "Slave,Master" bitfld.byte 0x0 2. " MODFEN ,Mode fault error detection enable" "Disabled,Enabled" newline bitfld.byte 0x0 1. " TXMD ,Communications operating mode select" "Full-duplex,Transmit-only" bitfld.byte 0x0 0. " SPMS ,SPI mode select" "SPI,Clock synchronous" line.byte 0x1 "SSLP,SPI Slave Select Polarity Register" bitfld.byte 0x1 3. " SSL3P ,SSL3 signal polarity setting" "Low,High" bitfld.byte 0x1 2. " SSL2P ,SSL2 signal polarity setting" "Low,High" newline bitfld.byte 0x1 1. " SSL1P ,SSL1 signal polarity setting" "Low,High" bitfld.byte 0x1 0. " SSL0P ,SSL0 signal polarity setting" "Low,High" line.byte 0x2 "SPPCR,SPI Pin Control Register" bitfld.byte 0x2 5. " MOIFE ,MOSI idle value fixing enable" "Disabled,Enabled" bitfld.byte 0x2 4. " MOIFV ,MOSI idle fixed value" "Low,High" newline bitfld.byte 0x2 1. " SPLP2 ,SPI loopback 2" "Normal,Loopback" bitfld.byte 0x2 0. " SPLP ,SPI loopback" "Normal,Loopback" if ((per.b(ad:0x40072000+0x03)&0x04)==0x00) group.byte 0x03++0x00 line.byte 0x0 "SPSR,SPI Status Register" bitfld.byte 0x0 7. " SPRF ,SPI receive buffer full flag" "Not valid,Valid" bitfld.byte 0x0 5. " SPTEF ,SPI transmit buffer empty flag" "Not empty,Empty" newline bitfld.byte 0x0 4. " UDRF ,Underrun error flag" "No error,Error" bitfld.byte 0x0 3. " PERF ,Parity error flag" "No error,Error" newline bitfld.byte 0x0 2. " MODF ,Mode fault error flag" "No error,Error" rbitfld.byte 0x0 1. " IDLNF ,SPI idle flag" "Idle,Transfer" newline bitfld.byte 0x0 0. " OVRF ,Overrun error flag" "No overrun,Overrun" else group.byte 0x03++0x00 line.byte 0x0 "SPSR,SPI Status Register" bitfld.byte 0x0 7. " SPRF ,SPI receive buffer full flag" "Not valid,Valid" bitfld.byte 0x0 5. " SPTEF ,SPI transmit buffer empty flag" "Not empty,Empty" newline bitfld.byte 0x0 3. " PERF ,Parity error flag" "No error,Error" newline bitfld.byte 0x0 2. " MODF ,Mode fault error flag" "No error,Error" newline rbitfld.byte 0x0 1. " IDLNF ,SPI idle flag" "Idle,Transfer" bitfld.byte 0x0 0. " OVRF ,Overrun error flag" "No overrun,Overrun" endif if (((per.b(ad:0x40072000+0x0B))&0x20)==0x00) group.long 0x04++0x03 line.long 0x0 "SPDR,SPI Data Register" else group.word 0x06++0x01 line.word 0x0 "SPDR_HA,SPI Data Register (Halfword)" endif group.byte 0x08++0x00 line.byte 0x0 "SPSCR,SPI Sequence Control Register" bitfld.byte 0x0 0.--2. " SPSLN ,SPI sequence length specification" "1,2,3,4,5,6,7,8" rgroup.byte 0x09++0x00 line.byte 0x0 "SPSSR,SPI Sequence Status Register" bitfld.byte 0x0 4.--6. " SPECM ,SPI error command" "SPCMD0,SPCMD1,SPCMD2,SPCMD3,SPCMD4,SPCMD5,SPCMD6,SPCMD7" bitfld.byte 0x0 0.--2. " SPCP ,SPI command pointer" "SPCMD0,SPCMD1,SPCMD2,SPCMD3,SPCMD4,SPCMD5,SPCMD6,SPCMD7" group.byte 0x0A++0x00 line.byte 0x0 "SPBR,SPI Bit Rate Register" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.l(ad:0x40072000+0x0B))&0x40)==0x00) group.byte 0x0B++0x00 line.byte 0x0 "SPDCR,SPI Data Control Register" bitfld.byte 0x0 6. " SPBYT ,SPI byte access specification" "Halfword/word access,Byte access" bitfld.byte 0x0 5. " SPLW ,SPI word Access/Halfword access specification" "Halfword access,Word access" newline bitfld.byte 0x0 4. " SPRDTD ,SPI Receive/Transmit data select" "Receive,Transmit" bitfld.byte 0x0 0.--1. " SPFC ,Number of frames specification" "1 frame,2 frames,3 frames,4 frames" else group.byte 0x0B++0x00 line.byte 0x0 "SPDCR,SPI Data Control Register" bitfld.byte 0x0 6. " SPBYT ,SPI byte access specification" "Halfword/word access,Byte access" bitfld.byte 0x0 4. " SPRDTD ,SPI Receive/Transmit data select" "Receive,Transmit" bitfld.byte 0x0 0.--1. " SPFC ,Number of frames specification" "1 frame,2 frames,3 frames,4 frames" endif else group.byte 0x0B++0x00 line.byte 0x0 "SPDCR,SPI Data Control Register" bitfld.byte 0x0 5. " SPLW ,SPI word Access/Halfword access specification" "Halfword access,Word access" bitfld.byte 0x0 4. " SPRDTD ,SPI Receive/Transmit data select" "Receive,Transmit" newline bitfld.byte 0x0 0.--1. " SPFC ,Number of frames specification" "1 frame,2 frames,3 frames,4 frames" endif newline group.byte 0x0C++0x02 line.byte 0x0 "SPCKD,SPI Clock Delay Register" bitfld.byte 0x0 0.--2. " SCKDL ,RSPCK delay setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK" line.byte 0x1 "SSLND,SPI Slave Select Negation Delay Register" bitfld.byte 0x1 0.--2. " SLNDL ,SSL negation delay setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK" line.byte 0x2 "SPND,SPI Next-Access Delay Register" bitfld.byte 0x2 0.--2. " SPNDL ,SPI Next-Access delay setting" "1 RSPCK+2 PCLKA,2 RSPCK+2 PCLKA,3 RSPCK+2 PCLKA,4 RSPCK+2 PCLKA,5 RSPCK+2 PCLKA,6 RSPCK+2 PCLKA,7 RSPCK+2 PCLKA,8 RSPCK+2 PCLKA" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.b(ad:0x40072000+0x0F))&0x01)==0x00) group.byte 0x0F++0x00 line.byte 0x0 "SPCR2,SPI Control Register 2" bitfld.byte 0x0 4. " SCKASE ,RSPCK Auto-Stop function enable" "Disabled,Enabled" bitfld.byte 0x0 3. " PTE ,Parity Self-Testing" "Disabled,Enabled" newline bitfld.byte 0x0 2. " SPIIE ,SPI idle interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " SPPE ,Parity enable" "Disabled,Enabled" else group.byte 0x0F++0x00 line.byte 0x0 "SPCR2,SPI Control Register 2" bitfld.byte 0x0 4. " SCKASE ,RSPCK Auto-Stop function enable" "Disabled,Enabled" bitfld.byte 0x0 3. " PTE ,Parity Self-Testing" "Disabled,Enabled" newline bitfld.byte 0x0 2. " SPIIE ,SPI idle interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SPOE ,Parity mode" "Even,Odd" newline bitfld.byte 0x0 0. " SPPE ,Parity enable" "Disabled,Enabled" endif else group.byte 0x0F++0x00 line.byte 0x0 "SPCR2,SPI Control Register 2" bitfld.byte 0x0 4. " SCKASE ,RSPCK Auto-Stop function enable" "Disabled,Enabled" bitfld.byte 0x0 3. " PTE ,Parity Self-Testing" "Disabled,Enabled" newline bitfld.byte 0x0 2. " SPIIE ,SPI idle interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SPOE ,Parity mode" "Even,Odd" newline bitfld.byte 0x0 0. " SPPE ,Parity enable" "Disabled,Enabled" endif group.word (0x10)++0x01 line.word 0x0 "SPCMD0,SPI Command Registers 0" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x12)++0x01 line.word 0x0 "SPCMD1,SPI Command Registers 1" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x14)++0x01 line.word 0x0 "SPCMD2,SPI Command Registers 2" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x16)++0x01 line.word 0x0 "SPCMD3,SPI Command Registers 3" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x18)++0x01 line.word 0x0 "SPCMD4,SPI Command Registers 4" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x1A)++0x01 line.word 0x0 "SPCMD5,SPI Command Registers 5" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x1C)++0x01 line.word 0x0 "SPCMD6,SPI Command Registers 6" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x1E)++0x01 line.word 0x0 "SPCMD7,SPI Command Registers 7" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.byte 0x20++0x00 line.byte 0x0 "SPDCR2,SPI Data Control Register 2" bitfld.byte 0x0 0. " BYSW ,Byte swap operating mode" "Off,On" endif width 0x0B tree.end tree "SPI1" base ad:0x40072100 width 14. group.byte 0x00++0x02 line.byte 0x0 "SPCR,SPI Control Register" bitfld.byte 0x0 7. " SPRIE ,SPI receive buffer full interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 6. " SPE ,SPI function enable" "Disabled,Enabled" newline bitfld.byte 0x0 5. " SPTIE ,Transmit buffer empty interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 4. " SPEIE ,SPI error interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 3. " MSTR ,SPI Master/Slave mode select" "Slave,Master" bitfld.byte 0x0 2. " MODFEN ,Mode fault error detection enable" "Disabled,Enabled" newline bitfld.byte 0x0 1. " TXMD ,Communications operating mode select" "Full-duplex,Transmit-only" bitfld.byte 0x0 0. " SPMS ,SPI mode select" "SPI,Clock synchronous" line.byte 0x1 "SSLP,SPI Slave Select Polarity Register" bitfld.byte 0x1 3. " SSL3P ,SSL3 signal polarity setting" "Low,High" bitfld.byte 0x1 2. " SSL2P ,SSL2 signal polarity setting" "Low,High" newline bitfld.byte 0x1 1. " SSL1P ,SSL1 signal polarity setting" "Low,High" bitfld.byte 0x1 0. " SSL0P ,SSL0 signal polarity setting" "Low,High" line.byte 0x2 "SPPCR,SPI Pin Control Register" bitfld.byte 0x2 5. " MOIFE ,MOSI idle value fixing enable" "Disabled,Enabled" bitfld.byte 0x2 4. " MOIFV ,MOSI idle fixed value" "Low,High" newline bitfld.byte 0x2 1. " SPLP2 ,SPI loopback 2" "Normal,Loopback" bitfld.byte 0x2 0. " SPLP ,SPI loopback" "Normal,Loopback" if ((per.b(ad:0x40072100+0x03)&0x04)==0x00) group.byte 0x03++0x00 line.byte 0x0 "SPSR,SPI Status Register" bitfld.byte 0x0 7. " SPRF ,SPI receive buffer full flag" "Not valid,Valid" bitfld.byte 0x0 5. " SPTEF ,SPI transmit buffer empty flag" "Not empty,Empty" newline bitfld.byte 0x0 4. " UDRF ,Underrun error flag" "No error,Error" bitfld.byte 0x0 3. " PERF ,Parity error flag" "No error,Error" newline bitfld.byte 0x0 2. " MODF ,Mode fault error flag" "No error,Error" rbitfld.byte 0x0 1. " IDLNF ,SPI idle flag" "Idle,Transfer" newline bitfld.byte 0x0 0. " OVRF ,Overrun error flag" "No overrun,Overrun" else group.byte 0x03++0x00 line.byte 0x0 "SPSR,SPI Status Register" bitfld.byte 0x0 7. " SPRF ,SPI receive buffer full flag" "Not valid,Valid" bitfld.byte 0x0 5. " SPTEF ,SPI transmit buffer empty flag" "Not empty,Empty" newline bitfld.byte 0x0 3. " PERF ,Parity error flag" "No error,Error" newline bitfld.byte 0x0 2. " MODF ,Mode fault error flag" "No error,Error" newline rbitfld.byte 0x0 1. " IDLNF ,SPI idle flag" "Idle,Transfer" bitfld.byte 0x0 0. " OVRF ,Overrun error flag" "No overrun,Overrun" endif if (((per.b(ad:0x40072100+0x0B))&0x20)==0x00) group.long 0x04++0x03 line.long 0x0 "SPDR,SPI Data Register" else group.word 0x06++0x01 line.word 0x0 "SPDR_HA,SPI Data Register (Halfword)" endif group.byte 0x08++0x00 line.byte 0x0 "SPSCR,SPI Sequence Control Register" bitfld.byte 0x0 0.--2. " SPSLN ,SPI sequence length specification" "1,2,3,4,5,6,7,8" rgroup.byte 0x09++0x00 line.byte 0x0 "SPSSR,SPI Sequence Status Register" bitfld.byte 0x0 4.--6. " SPECM ,SPI error command" "SPCMD0,SPCMD1,SPCMD2,SPCMD3,SPCMD4,SPCMD5,SPCMD6,SPCMD7" bitfld.byte 0x0 0.--2. " SPCP ,SPI command pointer" "SPCMD0,SPCMD1,SPCMD2,SPCMD3,SPCMD4,SPCMD5,SPCMD6,SPCMD7" group.byte 0x0A++0x00 line.byte 0x0 "SPBR,SPI Bit Rate Register" newline sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.l(ad:0x40072100+0x0B))&0x40)==0x00) group.byte 0x0B++0x00 line.byte 0x0 "SPDCR,SPI Data Control Register" bitfld.byte 0x0 6. " SPBYT ,SPI byte access specification" "Halfword/word access,Byte access" bitfld.byte 0x0 5. " SPLW ,SPI word Access/Halfword access specification" "Halfword access,Word access" newline bitfld.byte 0x0 4. " SPRDTD ,SPI Receive/Transmit data select" "Receive,Transmit" bitfld.byte 0x0 0.--1. " SPFC ,Number of frames specification" "1 frame,2 frames,3 frames,4 frames" else group.byte 0x0B++0x00 line.byte 0x0 "SPDCR,SPI Data Control Register" bitfld.byte 0x0 6. " SPBYT ,SPI byte access specification" "Halfword/word access,Byte access" bitfld.byte 0x0 4. " SPRDTD ,SPI Receive/Transmit data select" "Receive,Transmit" bitfld.byte 0x0 0.--1. " SPFC ,Number of frames specification" "1 frame,2 frames,3 frames,4 frames" endif else group.byte 0x0B++0x00 line.byte 0x0 "SPDCR,SPI Data Control Register" bitfld.byte 0x0 5. " SPLW ,SPI word Access/Halfword access specification" "Halfword access,Word access" bitfld.byte 0x0 4. " SPRDTD ,SPI Receive/Transmit data select" "Receive,Transmit" newline bitfld.byte 0x0 0.--1. " SPFC ,Number of frames specification" "1 frame,2 frames,3 frames,4 frames" endif newline group.byte 0x0C++0x02 line.byte 0x0 "SPCKD,SPI Clock Delay Register" bitfld.byte 0x0 0.--2. " SCKDL ,RSPCK delay setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK" line.byte 0x1 "SSLND,SPI Slave Select Negation Delay Register" bitfld.byte 0x1 0.--2. " SLNDL ,SSL negation delay setting" "1 RSPCK,2 RSPCK,3 RSPCK,4 RSPCK,5 RSPCK,6 RSPCK,7 RSPCK,8 RSPCK" line.byte 0x2 "SPND,SPI Next-Access Delay Register" bitfld.byte 0x2 0.--2. " SPNDL ,SPI Next-Access delay setting" "1 RSPCK+2 PCLKA,2 RSPCK+2 PCLKA,3 RSPCK+2 PCLKA,4 RSPCK+2 PCLKA,5 RSPCK+2 PCLKA,6 RSPCK+2 PCLKA,7 RSPCK+2 PCLKA,8 RSPCK+2 PCLKA" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.b(ad:0x40072100+0x0F))&0x01)==0x00) group.byte 0x0F++0x00 line.byte 0x0 "SPCR2,SPI Control Register 2" bitfld.byte 0x0 4. " SCKASE ,RSPCK Auto-Stop function enable" "Disabled,Enabled" bitfld.byte 0x0 3. " PTE ,Parity Self-Testing" "Disabled,Enabled" newline bitfld.byte 0x0 2. " SPIIE ,SPI idle interrupt enable" "Disabled,Enabled" newline bitfld.byte 0x0 0. " SPPE ,Parity enable" "Disabled,Enabled" else group.byte 0x0F++0x00 line.byte 0x0 "SPCR2,SPI Control Register 2" bitfld.byte 0x0 4. " SCKASE ,RSPCK Auto-Stop function enable" "Disabled,Enabled" bitfld.byte 0x0 3. " PTE ,Parity Self-Testing" "Disabled,Enabled" newline bitfld.byte 0x0 2. " SPIIE ,SPI idle interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SPOE ,Parity mode" "Even,Odd" newline bitfld.byte 0x0 0. " SPPE ,Parity enable" "Disabled,Enabled" endif else group.byte 0x0F++0x00 line.byte 0x0 "SPCR2,SPI Control Register 2" bitfld.byte 0x0 4. " SCKASE ,RSPCK Auto-Stop function enable" "Disabled,Enabled" bitfld.byte 0x0 3. " PTE ,Parity Self-Testing" "Disabled,Enabled" newline bitfld.byte 0x0 2. " SPIIE ,SPI idle interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 1. " SPOE ,Parity mode" "Even,Odd" newline bitfld.byte 0x0 0. " SPPE ,Parity enable" "Disabled,Enabled" endif group.word (0x10)++0x01 line.word 0x0 "SPCMD0,SPI Command Registers 0" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x12)++0x01 line.word 0x0 "SPCMD1,SPI Command Registers 1" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x14)++0x01 line.word 0x0 "SPCMD2,SPI Command Registers 2" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x16)++0x01 line.word 0x0 "SPCMD3,SPI Command Registers 3" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x18)++0x01 line.word 0x0 "SPCMD4,SPI Command Registers 4" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x1A)++0x01 line.word 0x0 "SPCMD5,SPI Command Registers 5" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x1C)++0x01 line.word 0x0 "SPCMD6,SPI Command Registers 6" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" group.word (0x1E)++0x01 line.word 0x0 "SPCMD7,SPI Command Registers 7" bitfld.word 0x0 15. " SCKDEN ,RSPCK delay setting enable" "Disabled,Enabled" bitfld.word 0x0 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" newline bitfld.word 0x0 13. " SPNDEN ,SPI Next-Access delay enable" "Disabled,Enabled" bitfld.word 0x0 12. " LSBF ,SPI LSB first" "MSB,LSB" newline bitfld.word 0x0 8.--11. " SPB ,SPI data length setting" "20 bits,24 bits,32 bits,32 bits,8 bits,8 bits,8 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits" bitfld.word 0x0 7. " SSLKP ,SSL signal level keeping" "Negate,Retain" newline bitfld.word 0x0 4.--6. " SSLA ,SSL signal assertion setting" "SSL0,SSL1,SSL2,SSL3,?..." bitfld.word 0x0 2.--3. " BRDV ,Bit rate division setting" "Base,Base/2,Base/4,Base/8" newline bitfld.word 0x0 1. " CPOL ,RSPCK polarity setting" "Low,High" bitfld.word 0x0 0. " CPHA ,RSPCK phase setting" "Sampling,Change" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.byte 0x20++0x00 line.byte 0x0 "SPDCR2,SPI Data Control Register 2" bitfld.byte 0x0 0. " BYSW ,Byte swap operating mode" "Off,On" endif width 0x0B tree.end tree.end tree "QSPI (Quad Serial Peripheral Interface)" base ad:0x64000000 width 9. group.long 0x00++0x0B line.long 0x00 "SFMSMD,Transfer Mode Control Register" bitfld.long 0x00 15. " SFMCCE ,Read instruction code select" "Set,Write" bitfld.long 0x00 11. " SFMOSW ,Setup time adjustment for serial transmission" "Do not extend,Extend by 1 PCLKA" newline bitfld.long 0x00 10. " SFMOHW ,Hold time adjustment for serial transmission" "Do not extend,Extend by 1 PCLKA" bitfld.long 0x00 9. " SFMOEX ,Extension select for the I/O buffer output enable signal for the serial interface" "Do not extend,Extend by 1 QSPCLK" newline bitfld.long 0x00 8. " SFMMD3 ,SPI mode select" "Mode 0,Mode 3" bitfld.long 0x00 7. " SFMPAE ,Function select for stopping prefetch at locations other than on byte boundaries" "Disabled,Enabled" newline bitfld.long 0x00 6. " SFMPFE ,Prefetch function select" "Disabled,Enabled" bitfld.long 0x00 4.--5. " SFMSE ,QSSL extension function select after SPI bus access" "Do not extend,Extend by 33 QSPCLK,Extend by 129 QSPCLK,Extend infinitely" newline sif (cpu()!="R7FS7G27G3A01CFP") bitfld.long 0x00 0.--2. " SFMRM ,Serial interface read mode select" "Standard read,Fast read,Fast read dual output,Fast read dual I/O,Fast read quad output,Fast read quad I/O,?..." else bitfld.long 0x00 0.--2. " SFMRM ,Serial interface read mode select" "Standard read,Fast read,Fast read dual output,Fast read dual I/O,?..." endif line.long 0x04 "SFMSSC,Chip Selection Control Register" bitfld.long 0x04 5. " SFMSLD ,QSSL signal output timing select" "0.5 cycles,1.5 cycles" bitfld.long 0x04 4. " SFMSHD ,QSSL signal release timing select" "0.5 cycles,1.5 cycles" newline bitfld.long 0x04 0.--3. " SFMSW ,Minimum high-level width select for QSSL signal" "1 QSPCLK,2 QSPCLK,3 QSPCLK,4 QSPCLK,5 QSPCLK,6 QSPCLK,7 QSPCLK,8 QSPCLK,9 QSPCLK,10 QSPCLK,11 QSPCLK,12 QSPCLK,13 QSPCLK,14 QSPCLK,15 QSPCLK,16 QSPCLK" line.long 0x08 "SFMSKC,Clock Control Register" bitfld.long 0x08 5. " SFMDTY ,Duty ratio correction function select for the QSPCLK signal" "No correction,Delay" bitfld.long 0x08 0.--4. " SFMDV ,Serial interface reference cycle select" "2 PCLKA,3 PCLKA,4 PCLKA,5 PCLKA,6 PCLKA,7 PCLKA,8 PCLKA,9 PCLKA,10 PCLKA,11 PCLKA,12 PCLKA,13 PCLKA,14 PCLKA,15 PCLKA,16 PCLKA,17 PCLKA,18 PCLKA,20 PCLKA,22 PCLKA,24 PCLKA,26 PCLKA,28 PCLKA,30 PCLKA,32 PCLKA,34 PCLKA,36 PCLKA,38 PCLKA,40 PCLKA,42 PCLKA,44 PCLKA,46 PCLKA,48 PCLKA" rgroup.long 0x0C++0x03 line.long 0x00 "SFMSST,Status Register" bitfld.long 0x00 7. " PFOFF ,Prefetch function operating state" "Operating,Not operating" bitfld.long 0x00 6. " PFFUL ,Prefetch buffer state" "Not full,Full" newline bitfld.long 0x00 0.--4. " PFCNT ,Number of bytes of prefetched data" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes,17 bytes,18 bytes,?..." if ((per.l(ad:0x64000000+0x14)&0x01)==0x01) group.long 0x10++0x03 line.long 0x00 "SFMCOM,Communication Port Register" hexmask.long.byte 0x00 0.--7. 1. " SFMD ,Port select for direct communication with the SPI bus" else hgroup.long 0x10++0x03 hide.long 0x00 "SFMCOM,Communication Port Register" endif group.long 0x14++0x07 line.long 0x00 "SFMCMD,Communication Mode Control Register" bitfld.long 0x00 0. " DCOM ,Mode select for communication with the SPI bus" "ROM access,Direct communication" line.long 0x04 "SFMCST,Communication Status Register" bitfld.long 0x04 7. " EROMR ,ROM access detection status in direct communication mode" "Not detected,Detected" rbitfld.long 0x04 0. " COMBSY ,SPI bus cycle completion state in direct communication" "No transfer,Transfer" group.long 0x20++0x0B line.long 0x00 "SFMSIC,Instruction Code Register" hexmask.long.byte 0x00 0.--7. 1. " SFMCIC ,Serial flash instruction code to substitute" line.long 0x04 "SFMSAC,Address Mode Control Register" bitfld.long 0x04 4. " SFM4BC ,Default instruction code select" "4-byte not selected,4-byte selected" bitfld.long 0x04 0.--1. " SFMAS ,Number of address bytes select for the serial interface" "1 byte,2 byte,3 byte,4 byte" line.long 0x08 "SFMSDC,Dummy Cycle Control Register" hexmask.long.byte 0x08 8.--15. 1. " SFMXD ,Mode data for serial flash" bitfld.long 0x08 7. " SFMXEN ,XIP mode permission in the QSPI" "Prohibit XIP,Permit XIP" newline rbitfld.long 0x08 6. " SFMXST ,XIP mode status" "Normal,XIP" bitfld.long 0x08 0.--3. " SFMDN ,Number of dummy cycles select for fast read instructions" "Default,3 QSPCLK,4 QSPCLK,5 QSPCLK,6 QSPCLK,7 QSPCLK,8 QSPCLK,9 QSPCLK,10 QSPCLK,11 QSPCLK,12 QSPCLK,13 QSPCLK,14 QSPCLK,15 QSPCLK,16 QSPCLK,17 QSPCLK" group.long 0x30++0x07 line.long 0x00 "SFMSPC,SPI Protocol Control Register" bitfld.long 0x00 4. " SFMSDE ,Minimum time select for input/output switch" "Do not allocate,Allocate" sif (cpu()!="R7FS7G27G3A01CFP") bitfld.long 0x00 0.--1. " SFMSPI ,SPI protocol select" "Extended SPI,Dual SPI,Quad SPI,?..." else bitfld.long 0x00 0.--1. " SFMSPI ,SPI protocol select" "Extended SPI,Dual SPI,?..." endif line.long 0x04 "SFMPMD,Port Control Register" bitfld.long 0x04 2. " SFMWPL ,WP pin level specification" "Low,High" group.long 0x804++0x03 line.long 0x00 "SFMCNT1,External QSPI Address Register" hexmask.long.byte 0x00 26.--31. 0x04 " QSPI_EXT ,Bank switching address" width 0x0B tree.end tree "CRC (Cyclic Redundancy Check Calculator)" base ad:0x40074000 width 14. group.byte 0x00++0x01 line.byte 0x0 "CRCCR0,CRC Control Register 0" bitfld.byte 0x0 7. " DORCLR ,CRCDOR/HA/BY register clear" "No effect,Clear" bitfld.byte 0x0 6. " LMS ,CRC calculation switching" "LSB,MSB" newline bitfld.byte 0x0 0.--2. " GPS ,CRC generating polynomial switching" "No calculation,CRC-8,CRC-16,CRC-CCITT,CRC-32,CRC-32C,No calculation,No calculation" line.byte 0x1 "CRCCR1,CRC Control Register 1" bitfld.byte 0x1 7. " CRCSEN ,Snoop enable" "Disabled,Enabled" bitfld.byte 0x1 6. " CRCSWR ,Snoop-On-Write/Read switch" "On-read,On-write" if (((per.b(ad:0x40074000))&0x07)==(0x04||0x05)) group.long 0x04++0x03 line.long 0x0 "CRCDIR,CRC Data Input Register" elif (((per.b(ad:0x40074000))&0x07)==(0x01||0x02||0x03)) group.byte 0x04++0x00 line.byte 0x0 "CRCDIR_BY,CRC Data Input Register (Byte-word access)" else hgroup.long 0x04++0x03 hide.long 0x00 "CRCDIR,CRC Data Input Register" endif if (((per.b(ad:0x40074000))&0x07)==(0x04||0x05)) group.long 0x08++0x03 line.long 0x0 "CRCDOR,CRC Data Output Register" elif (((per.b(ad:0x40074000))&0x07)==(0x02||0x03)) group.word 0x08++0x01 line.word 0x0 "CRCDOR_HA,CRC Data Output Register (Halfword access)" elif (((per.b(ad:0x40074000))&0x07)==0x01) group.byte 0x08++0x00 line.byte 0x0 "CRCDOR_BY,CRC Data Output Register (Byte-word access)" else hgroup.long 0x08++0x03 hide.long 0x00 "CRCDOR,CRC Data Output Register" endif group.word 0x0C++0x01 line.word 0x0 "CRCSAR,Snoop Address Register" hexmask.word 0x0 0.--13. 0x01 " CRCSA ,Register snoop address" width 0x0B tree.end tree.open "SSI (Serial Sound Interface)" tree "SSI0" base ad:0x4004E000 width 9. if (((per.l(ad:0x4004E000+0x04))&0x2000000)==0x2000000) if (((per.l(ad:0x4004E000))&0x4000)==0x4000)&&(((per.l(ad:0x4004E000))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" bitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E000))&0x4000)==0x00)&&(((per.l(ad:0x4004E000))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E000))&0x4000)==0x4000)&&(((per.l(ad:0x4004E000))&0x300000)!=0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline bitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline bitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" bitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" newline bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" endif else if (((per.l(ad:0x4004E000))&0x4000)==0x4000)||(((per.l(ad:0x4004E000))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" rbitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" rbitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E000))&0x4000)==0x00)||(((per.l(ad:0x4004E000))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E000))&0x4000)==0x4000)||(((per.l(ad:0x4004E000))&0x300000)!=0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" rbitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline rbitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline rbitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" rbitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" newline rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" endif endif group.long 0x04++0x03 line.long 0x00 "SSISR,Status Register" bitfld.long 0x00 29. " TUIRQ ,Transmit underflow interrupt status flag" "No underflow,Underflow" bitfld.long 0x00 28. " TOIRQ ,Transmit overflow interrupt status flag" "No overflow,Overflow" newline bitfld.long 0x00 27. " RUIRQ ,Receive underflow interrupt status flag" "No underflow,Underflow" bitfld.long 0x00 26. " ROIRQ ,Receive overflow interrupt status flag" "No overflow,Overflow" newline rbitfld.long 0x00 25. " IIRQ ,Idle interrupt status flag" "Not in idle,Idle" if (((per.l(ad:0x4004E000+0x04))&0x2000000)==0x2000000) group.long 0x10++0x03 line.long 0x00 "SSIFCR,FIFO Control Register" bitfld.long 0x00 31. " AUCKE ,Master clock enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSIRST ,SSI software reset" "No reset,Reset" newline bitfld.long 0x00 11. " BSW ,Byte swap enable" "Disabled,Enabled" bitfld.long 0x00 3. " TIE ,Transmit FIFO data empty interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RIE ,Receive FIFO data full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFRST ,Transmit FIFO data register reset" "Clear,Initiate" newline bitfld.long 0x00 0. " RFRST ,Receive FIFO data register reset" "Clear,Initiate" else group.long 0x10++0x03 line.long 0x00 "SSIFCR,FIFO Control Register" rbitfld.long 0x00 31. " AUCKE ,Master clock enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSIRST ,SSI software reset" "No reset,Reset" newline rbitfld.long 0x00 11. " BSW ,Byte swap enable" "Disabled,Enabled" bitfld.long 0x00 3. " TIE ,Transmit FIFO data empty interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RIE ,Receive FIFO data full interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 1. " TFRST ,Transmit FIFO data register reset" "Clear,Initiate" newline rbitfld.long 0x00 0. " RFRST ,Receive FIFO data register reset" "Clear,Initiate" endif group.long 0x14++0x03 line.long 0x00 "SSIFSR,FIFO Status Register" rbitfld.long 0x00 24.--29. " TDC ,Transmit data indicate flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16. " TDE ,Transmit data empty flag" "Not empty,Empty" newline rbitfld.long 0x00 8.--13. " RDC ,Receive data indicate flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0. " RDF ,Receive data full flag" "Not full,Full" wgroup.long 0x18++0x03 line.long 0x00 "SSIFTDR,Transmit FIFO Data Register" rgroup.long 0x1C++0x03 line.long 0x00 "SSIFRDR,Receive FIFO Data Register" if (((per.l(ad:0x4004E000+0x04))&0x2000000)==0x2000000)&&(((per.l(ad:0x4004E000))&0x4000)==0x4000) group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 9. " BCKASTP ,Enable stopping BCK output" "Disabled,Enabled" bitfld.long 0x00 8. " LRCONT ,Enable LRCK/FS continuation" "Disabled,Enabled" newline bitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." rgroup.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x00 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" elif (((per.l(ad:0x4004E000+0x04))&0x2000000)==0x00)&&(((per.l(ad:0x4004E000))&0x4000)==0x4000) group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 9. " BCKASTP ,Enable stopping BCK output" "Disabled,Enabled" bitfld.long 0x00 8. " LRCONT ,Enable LRCK/FS continuation" "Disabled,Enabled" newline rbitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." rgroup.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x00 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" elif (((per.l(ad:0x4004E000+0x04))&0x2000000)==0x2000000)&&(((per.l(ad:0x4004E000))&0x4000)==0x00) group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." rgroup.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x00 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" else rgroup.long 0x20++0x07 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." line.long 0x04 "SSISCR,Status Control Register" bitfld.long 0x04 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x04 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" endif width 0x0B tree.end sif !cpuis("R7FS5D5*")&&!cpuis("R7FS5D*CFP") tree "SSI1" base ad:0x4004E100 width 9. if (((per.l(ad:0x4004E100+0x04))&0x2000000)==0x2000000) if (((per.l(ad:0x4004E100))&0x4000)==0x4000)&&(((per.l(ad:0x4004E100))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" bitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E100))&0x4000)==0x00)&&(((per.l(ad:0x4004E100))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E100))&0x4000)==0x4000)&&(((per.l(ad:0x4004E100))&0x300000)!=0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline bitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline bitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline bitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." bitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline bitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" bitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline bitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline bitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" bitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" newline bitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" endif else if (((per.l(ad:0x4004E100))&0x4000)==0x4000)||(((per.l(ad:0x4004E100))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" rbitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" rbitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E100))&0x4000)==0x00)||(((per.l(ad:0x4004E100))&0x300000)==0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" elif (((per.l(ad:0x4004E100))&0x4000)==0x4000)||(((per.l(ad:0x4004E100))&0x300000)!=0x300000) group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" rbitfld.long 0x00 30. " CKS ,Audio clock select" "AUDIO_CLK,GTIOC1A" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" newline rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." newline rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" newline rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" newline rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" newline rbitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" newline rbitfld.long 0x00 4.--7. " CKDV ,Serial bit clock division ratio" "/1,/2,/4,/8,/16,/32,/64,/128,/6,/12,/24,/48,/96,?..." bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "SSICR,Control Register" bitfld.long 0x00 29. " TUIEN ,Transmit FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " TOIEN ,Transmit FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 27. " RUIEN ,Receive FIFO underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " ROIEN ,Receive FIFO overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 25. " IIEN ,Idle interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 22.--23. " FRM ,Frame word number I2S/Monaural/TDM" "2/1/,//4,//6,//8" newline rbitfld.long 0x00 19.--21. " DWL ,Data word length" "8 bits,16 bits,18 bits,20 bits,22 bits,24 bits,32 bits,?..." rbitfld.long 0x00 16.--18. " SWL ,System word length" "8 bits,16 bits,24 bits,32 bits,48 bits,64 bits,128 bits,256 bits" newline rbitfld.long 0x00 14. " MST ,Master enable" "Disabled,Enabled" rbitfld.long 0x00 13. " BCKP ,Bit clock polarity" "Falling edge,Rising edge" newline rbitfld.long 0x00 12. " LRCKP ,Value and polarity of LR clock/frame synchronization signal" "Low/High,High/Low" rbitfld.long 0x00 11. " SPDP ,Serial padding polarity" "Low,High" newline rbitfld.long 0x00 10. " SDTA ,Serial data alignment" "Serial data/Padding bits,Padding bits/Serial data" rbitfld.long 0x00 9. " PDTA ,Placement data alignment" "Left-aligned,Right-aligned" newline rbitfld.long 0x00 8. " DEL ,Serial data delay" "Delay,No delay" bitfld.long 0x00 3. " MUEN ,Mute enable" "No mute,Mute" newline bitfld.long 0x00 1. " TEN ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 0. " REN ,Receive enable" "Disabled,Enabled" endif endif group.long 0x04++0x03 line.long 0x00 "SSISR,Status Register" bitfld.long 0x00 29. " TUIRQ ,Transmit underflow interrupt status flag" "No underflow,Underflow" bitfld.long 0x00 28. " TOIRQ ,Transmit overflow interrupt status flag" "No overflow,Overflow" newline bitfld.long 0x00 27. " RUIRQ ,Receive underflow interrupt status flag" "No underflow,Underflow" bitfld.long 0x00 26. " ROIRQ ,Receive overflow interrupt status flag" "No overflow,Overflow" newline rbitfld.long 0x00 25. " IIRQ ,Idle interrupt status flag" "Not in idle,Idle" if (((per.l(ad:0x4004E100+0x04))&0x2000000)==0x2000000) group.long 0x10++0x03 line.long 0x00 "SSIFCR,FIFO Control Register" bitfld.long 0x00 31. " AUCKE ,Master clock enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSIRST ,SSI software reset" "No reset,Reset" newline bitfld.long 0x00 11. " BSW ,Byte swap enable" "Disabled,Enabled" bitfld.long 0x00 3. " TIE ,Transmit FIFO data empty interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RIE ,Receive FIFO data full interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFRST ,Transmit FIFO data register reset" "Clear,Initiate" newline bitfld.long 0x00 0. " RFRST ,Receive FIFO data register reset" "Clear,Initiate" else group.long 0x10++0x03 line.long 0x00 "SSIFCR,FIFO Control Register" rbitfld.long 0x00 31. " AUCKE ,Master clock enable" "Disabled,Enabled" bitfld.long 0x00 16. " SSIRST ,SSI software reset" "No reset,Reset" newline rbitfld.long 0x00 11. " BSW ,Byte swap enable" "Disabled,Enabled" bitfld.long 0x00 3. " TIE ,Transmit FIFO data empty interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " RIE ,Receive FIFO data full interrupt enable" "Disabled,Enabled" rbitfld.long 0x00 1. " TFRST ,Transmit FIFO data register reset" "Clear,Initiate" newline rbitfld.long 0x00 0. " RFRST ,Receive FIFO data register reset" "Clear,Initiate" endif group.long 0x14++0x03 line.long 0x00 "SSIFSR,FIFO Status Register" rbitfld.long 0x00 24.--29. " TDC ,Transmit data indicate flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16. " TDE ,Transmit data empty flag" "Not empty,Empty" newline rbitfld.long 0x00 8.--13. " RDC ,Receive data indicate flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0. " RDF ,Receive data full flag" "Not full,Full" wgroup.long 0x18++0x03 line.long 0x00 "SSIFTDR,Transmit FIFO Data Register" rgroup.long 0x1C++0x03 line.long 0x00 "SSIFRDR,Receive FIFO Data Register" if (((per.l(ad:0x4004E100+0x04))&0x2000000)==0x2000000)&&(((per.l(ad:0x4004E100))&0x4000)==0x4000) group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 9. " BCKASTP ,Enable stopping BCK output" "Disabled,Enabled" bitfld.long 0x00 8. " LRCONT ,Enable LRCK/FS continuation" "Disabled,Enabled" newline bitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." rgroup.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x00 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" elif (((per.l(ad:0x4004E100+0x04))&0x2000000)==0x00)&&(((per.l(ad:0x4004E100))&0x4000)==0x4000) group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 9. " BCKASTP ,Enable stopping BCK output" "Disabled,Enabled" bitfld.long 0x00 8. " LRCONT ,Enable LRCK/FS continuation" "Disabled,Enabled" newline rbitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." rgroup.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x00 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" elif (((per.l(ad:0x4004E100+0x04))&0x2000000)==0x2000000)&&(((per.l(ad:0x4004E100))&0x4000)==0x00) group.long 0x20++0x03 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." rgroup.long 0x24++0x03 line.long 0x00 "SSISCR,Status Control Register" bitfld.long 0x00 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x00 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" else rgroup.long 0x20++0x07 line.long 0x00 "SSIOFR,Audio Format Register" bitfld.long 0x00 0.--1. " OMOD ,Audio format select" "I2S,TDM,Monaural,?..." line.long 0x04 "SSISCR,Status Control Register" bitfld.long 0x04 8.--12. " TDES ,TDE setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" bitfld.long 0x04 0.--4. " RDFS ,RDF setting condition select" "1,2,,,,,,,,,,,,,,,,,,,,,,,,,,,,,31,32" endif width 0x0B tree.end endif tree.end tree "SRC (Sampling Rate Converter)" base ad:0x4004DFF0 width 11. wgroup.long 0x00++0x03 line.long 0x00 "SRCID,Input Data Register" rgroup.long 0x04++0x03 line.long 0x00 "SRCOD,Output Data Register" group.word 0x08++0x03 line.word 0x00 "SRCIDCTRL,Input Data Control Register" bitfld.word 0x00 9. " IED ,Input data endian" "Little endian,Big endian" bitfld.word 0x00 8. " IEN ,Input FIFO empty interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 0.--1. " IFTRG ,Input FIFO data triggering number" "0,2,4,6" line.word 0x02 "SRCODCTRL,Output Data Control Register" bitfld.word 0x02 10. " OCH ,Output data channel exchange" "Do not exchange channels,Exchange channels" bitfld.word 0x02 9. " OED ,Output data endian" "Little endian,Big endian" newline bitfld.word 0x02 8. " OEN ,Output FIFO full interrupt enable" "Disabled,Enabled" bitfld.word 0x02 0.--1. " OFTRG ,Output FIFO data trigger number" "1,4,8,12" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.l(ad:0x4004DFF0+0x0C))&0x90)==0x90) group.word 0x0C++0x01 line.word 0x00 "SRCCTRL,Control Register" bitfld.word 0x00 15. " FICRAE ,Filter coefficient table access enable" "Disabled,Enabled" bitfld.word 0x00 13. " CEEN ,Conversion end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 12. " SRCEN ,Module enable" "Disabled,Enabled" bitfld.word 0x00 11. " UDEN ,Output FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 10. " OVEN ,Output FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " FL ,Internal work memory flush" "Not flushed,Flushed" newline bitfld.word 0x00 8. " CL ,Internal work memory clear" "Not cleared,Cleared" bitfld.word 0x00 4.--7. " IFS ,Input sampling rate" "8.0 kHz,11.025 kHz,12.0 kHz,,16.0 kHz,22.05 kHz,24.0 kHz,,32.0 kHz,44.1 kHz,48.0 kHz,?..." newline bitfld.word 0x00 0.--2. " OFS ,Output sampling rate" "44.1 kHz,48.0 kHz,32.0 kHz,,8.0 kHz,16.0 kHz,?..." else group.word 0x0C++0x01 line.word 0x00 "SRCCTRL,Control Register" bitfld.word 0x00 15. " FICRAE ,Filter coefficient table access enable" "Disabled,Enabled" bitfld.word 0x00 13. " CEEN ,Conversion end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 12. " SRCEN ,Module enable" "Disabled,Enabled" bitfld.word 0x00 11. " UDEN ,Output FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 10. " OVEN ,Output FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " FL ,Internal work memory flush" "Not flushed,Flushed" newline bitfld.word 0x00 8. " CL ,Internal work memory clear" "Not cleared,Cleared" bitfld.word 0x00 4.--7. " IFS ,Input sampling rate" "8.0 kHz,11.025 kHz,12.0 kHz,,16.0 kHz,22.05 kHz,24.0 kHz,,32.0 kHz,44.1 kHz,48.0 kHz,?..." newline bitfld.word 0x00 0.--2. " OFS ,Output sampling rate" "44.1 kHz,48.0 kHz,32.0 kHz,?..." endif else group.word 0x0C++0x01 line.word 0x00 "SRCCTRL,Control Register" bitfld.word 0x00 15. " FICRAE ,Filter coefficient table access enable" "Disabled,Enabled" bitfld.word 0x00 13. " CEEN ,Conversion end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 12. " SRCEN ,Module enable" "Disabled,Enabled" bitfld.word 0x00 11. " UDEN ,Output FIFO underflow interrupt enable" "Disabled,Enabled" newline bitfld.word 0x00 10. " OVEN ,Output FIFO overflow interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " FL ,Internal work memory flush" "Not flushed,Flushed" newline bitfld.word 0x00 8. " CL ,Internal work memory clear" "Not cleared,Cleared" bitfld.word 0x00 4.--7. " IFS ,Input sampling rate" "8.0 kHz,11.025 kHz,12.0 kHz,,16.0 kHz,22.05 kHz,24.0 kHz,,32.0 kHz,44.1 kHz,48.0 kHz,?..." newline bitfld.word 0x00 0.--2. " OFS ,Output sampling rate" "44.1 kHz,48.0 kHz,32.0 kHz,,8.0 kHz,16.0 kHz,?..." endif group.word 0x08++0x01 line.word 0x00 "SRCSTAT,Status Register" rbitfld.word 0x00 11.--15. " OFDN ,Output FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.word 0x00 7.--10. " IFDN ,Input FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.word 0x00 5. " CEF ,Conversion end flag" "Not all output data read,All output data read" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rbitfld.word 0x00 4. " FLF ,Flush processing status flag" "Complete,In progress" else bitfld.word 0x00 4. " FLF ,Flush processing status flag" "Complete,In progress" endif newline bitfld.word 0x00 3. " UDF ,Output FIFO underflow interrupt request flag" "Not occurred,Occurred" bitfld.word 0x00 2. " OVF ,Output FIFO overflow interrupt request flag" "Not occurred,Occurred" newline bitfld.word 0x00 1. " IINT ,Input FIFO empty interrupt request flag" "Not empty,Empty" bitfld.word 0x00 0. " OINT ,Output FIFO full interrupt request flag" "No request,Request" base ad:0x40048000 group.long 0x00++0x03 line.long 0x00 "SRCFCTR0,Filter Coefficient Table 0" newline button "SRCFCTR 1-5551" "d ad:(ad:0x40048000+0x04)--ad:(ad:0x40048000+0x56BF) /long" width 0x0B tree.end tree.open "SDHI (SD/MMC Host Interface)" tree "SDHI0" base ad:0x40062000 width 17. if (((per.l(ad:0x40062000))&0x700)==(0x300||0x400||0x500||0x600||0x700))&&((((per.l(ad:0x40062000))&0x800)==0x800)&&(((per.l(ad:0x40062000))&0x2000)==0x2000)) group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" bitfld.long 0x00 14.--15. " CMD12AT ,CMD12 automatic issue select" "Automatically,Not automatically,?..." newline bitfld.long 0x00 13. " TRSTP ,Block transfer select" "Single,Multiple" bitfld.long 0x00 12. " CMDRW ,Data transfer direction select" "Write,Read" newline bitfld.long 0x00 11. " CMDTP ,Data transfer select" "Not included,Included" newline bitfld.long 0x00 8.--10. " RSPTP ,Response type select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command type select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" elif (((per.l(ad:0x40062000))&0x700)==(0x300||0x400||0x500||0x600||0x700))&&(((per.l(ad:0x40062000))&0x800)==0x800) group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" newline bitfld.long 0x00 13. " TRSTP ,Block transfer select" "Single,Multiple" bitfld.long 0x00 12. " CMDRW ,Data transfer direction select" "Write,Read" newline bitfld.long 0x00 11. " CMDTP ,Data transfer select" "Not included,Included" newline bitfld.long 0x00 8.--10. " RSPTP ,Response type select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command type select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" elif (((per.l(ad:0x40062000))&0x700)==(0x300||0x400||0x500||0x600||0x700)) group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" newline newline bitfld.long 0x00 11. " CMDTP ,Data transfer select" "Not included,Included" newline bitfld.long 0x00 8.--10. " RSPTP ,Response type select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command type select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" else group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" newline newline newline bitfld.long 0x00 8.--10. " RSPTP ,Response Type Select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command Type Select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" endif tree.open "Bus Slave MPU" group.word 0xC10++0x01 line.word 0x00 "SMPUMBIU,Access Control Register for Memory bus 3" sif cpuis("R7FS5*") bitfld.word 0x00 15. " WPSRAMHS ,SRAMHS write protection" "Disabled,Enabled" bitfld.word 0x00 14. " RPSRAMHS ,SRAMHS read protection" "Disabled,Enabled" bitfld.word 0x00 13. " WPFLI ,Code flash memory write protection" "Disabled,Enabled" bitfld.word 0x00 12. " RPFLI ,Code flash memory read protection" "No effect,Enabled" newline sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" group.word 0xC14++0x01 line.word 0x00 "SMPUFBIU,Access Control Register for Internal peripheral bus 9" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC18++0x01 line.word 0x00 "SMPUSRAM0,Access Control Register for Memory bus 4" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC1C++0x01 line.word 0x00 "SMPUSRAM1,Access Control Register for Memory bus 5" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC20++0x01 line.word 0x00 "SMPUP0BIU,Access Control Register for Internal peripheral bus 1" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC24++0x01 line.word 0x00 "SMPUP3BIU,Access Control Register for Internal peripheral bus 3" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC28++0x01 line.word 0x00 "SMPUP7BIU,Access Control Register for Internal peripheral bus 7" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" sif cpuis("R7FS5D9*") group.word 0xC2C++0x01 line.word 0x00 "SMPUP8BIU,Access Control Register for Internal peripheral bus 8" bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" endif group.word 0xC30++0x01 line.word 0x00 "SMPUEXBIU,Access Control Register for CS area" sif cpuis("R7FS5D9*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC34++0x01 line.word 0x00 "SMPUEXBIU2,Access Control Register for QSPI area" sif cpuis("R7FS5D9*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC00++0x01 line.word 0x00 "SMPUCTL,Slave MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " PROTECT ,Protection of register" "Not protected,Protected" bitfld.word 0x00 0. " OAD ,Operation after detection" "Interrupt,Reset" tree.end width 0x0B tree.end tree "SDHI1" base ad:0x40062400 width 17. if (((per.l(ad:0x40062400))&0x700)==(0x300||0x400||0x500||0x600||0x700))&&((((per.l(ad:0x40062400))&0x800)==0x800)&&(((per.l(ad:0x40062400))&0x2000)==0x2000)) group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" bitfld.long 0x00 14.--15. " CMD12AT ,CMD12 automatic issue select" "Automatically,Not automatically,?..." newline bitfld.long 0x00 13. " TRSTP ,Block transfer select" "Single,Multiple" bitfld.long 0x00 12. " CMDRW ,Data transfer direction select" "Write,Read" newline bitfld.long 0x00 11. " CMDTP ,Data transfer select" "Not included,Included" newline bitfld.long 0x00 8.--10. " RSPTP ,Response type select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command type select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" elif (((per.l(ad:0x40062400))&0x700)==(0x300||0x400||0x500||0x600||0x700))&&(((per.l(ad:0x40062400))&0x800)==0x800) group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" newline bitfld.long 0x00 13. " TRSTP ,Block transfer select" "Single,Multiple" bitfld.long 0x00 12. " CMDRW ,Data transfer direction select" "Write,Read" newline bitfld.long 0x00 11. " CMDTP ,Data transfer select" "Not included,Included" newline bitfld.long 0x00 8.--10. " RSPTP ,Response type select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command type select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" elif (((per.l(ad:0x40062400))&0x700)==(0x300||0x400||0x500||0x600||0x700)) group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" newline newline bitfld.long 0x00 11. " CMDTP ,Data transfer select" "Not included,Included" newline bitfld.long 0x00 8.--10. " RSPTP ,Response type select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command type select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" else group.long 0x00++0x03 line.long 0x00 "SD_CMD,Command Type Register" newline newline newline bitfld.long 0x00 8.--10. " RSPTP ,Response Type Select" "Normal,,,Extended,Extended/R1/R5/R6/R7,Extended/R1b,Extended/R2,Extended/R3/R4" bitfld.long 0x00 6.--7. " ACMD ,Command Type Select" "CMD,ACMD,?..." hexmask.long.byte 0x00 0.--5. 1. " CMDIDX ,Command index field value select" endif tree.open "Bus Slave MPU" group.word 0xC10++0x01 line.word 0x00 "SMPUMBIU,Access Control Register for Memory bus 3" sif cpuis("R7FS5*") bitfld.word 0x00 15. " WPSRAMHS ,SRAMHS write protection" "Disabled,Enabled" bitfld.word 0x00 14. " RPSRAMHS ,SRAMHS read protection" "Disabled,Enabled" bitfld.word 0x00 13. " WPFLI ,Code flash memory write protection" "Disabled,Enabled" bitfld.word 0x00 12. " RPFLI ,Code flash memory read protection" "No effect,Enabled" newline sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" group.word 0xC14++0x01 line.word 0x00 "SMPUFBIU,Access Control Register for Internal peripheral bus 9" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC18++0x01 line.word 0x00 "SMPUSRAM0,Access Control Register for Memory bus 4" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC1C++0x01 line.word 0x00 "SMPUSRAM1,Access Control Register for Memory bus 5" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC20++0x01 line.word 0x00 "SMPUP0BIU,Access Control Register for Internal peripheral bus 1" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC24++0x01 line.word 0x00 "SMPUP3BIU,Access Control Register for Internal peripheral bus 3" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC28++0x01 line.word 0x00 "SMPUP7BIU,Access Control Register for Internal peripheral bus 7" sif cpuis("R7FS5*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" sif cpuis("R7FS5D9*") group.word 0xC2C++0x01 line.word 0x00 "SMPUP8BIU,Access Control Register for Internal peripheral bus 8" bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "No effect,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "No effect,Enabled" bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "No effect,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "No effect,Enabled" newline bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" endif group.word 0xC30++0x01 line.word 0x00 "SMPUEXBIU,Access Control Register for CS area" sif cpuis("R7FS5D9*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC34++0x01 line.word 0x00 "SMPUEXBIU2,Access Control Register for QSPI area" sif cpuis("R7FS5D9*") sif !cpuis("R7FS5D5*") bitfld.word 0x00 7. " WPGRPC ,Master group c write protection" "Disabled,Enabled" bitfld.word 0x00 6. " RPGRPC ,Master group c read protection" "Disabled,Enabled" newline endif bitfld.word 0x00 5. " WPGRPB ,Master group b write protection" "Disabled,Enabled" bitfld.word 0x00 4. " RPGRPB ,Master group b ReadProtection" "Disabled,Enabled" newline endif bitfld.word 0x00 3. " WPGRPA ,Master group a write protection" "Disabled,Enabled" bitfld.word 0x00 2. " RPGRPA ,Master group a read protection" "Disabled,Enabled" bitfld.word 0x00 1. " WPCPU ,CPU write protection" "Disabled,Enabled" bitfld.word 0x00 0. " RPCPU ,CPU read protection" "Disabled,Enabled" group.word 0xC00++0x01 line.word 0x00 "SMPUCTL,Slave MPU Control Register" hexmask.word.BYTE 0x00 8.--15. 1. " KEY ,Key code" bitfld.word 0x00 1. " PROTECT ,Protection of register" "Not protected,Protected" bitfld.word 0x00 0. " OAD ,Operation after detection" "Interrupt,Reset" tree.end width 0x0B tree.end tree.end tree "PDC (Parallel Data Capture Unit)" base ad:0x40094000 width 8. group.long 0x00++0x0B line.long 0x00 "PCCR0,PDC Control Register 0" bitfld.long 0x00 14. " EDS ,Endian select" "Little endian,Big endian" bitfld.long 0x00 11.--13. " PCKDIV[2:0] ,PCKO frequency division ratio select" "/2,/4,/6,/8,/10,/12,/14,/16" newline bitfld.long 0x00 10. " PCKOE ,PCKO output enable" "Disabled,Enabled" bitfld.long 0x00 9. " HERIE ,Horizontal byte number setting error interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 8. " VERIE ,Vertical line number setting error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " UDRIE ,Underrun interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 6. " OVIE ,Overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " FEIE ,Frame end interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " DFIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " PRST ,PDC reset" "No reset,Reset" newline bitfld.long 0x00 2. " HPS ,HSYNC signal polarity select" "High,Low" bitfld.long 0x00 1. " VPS ,VSYNC signal polarity select" "High,Low" newline bitfld.long 0x00 0. " PCKE ,PIXCLK input enable" "Disabled,Enabled" line.long 0x04 "PCCR1,PDC Control Register 1" bitfld.long 0x04 0. " PCE ,PDC operation enable" "Disabled,Enabled" line.long 0x08 "PCSR,PDC Status Register" bitfld.long 0x08 6. " HERF ,Horizontal byte number setting error flag" "Not occurred,Occurred" bitfld.long 0x08 5. " VERF ,Vertical line number setting error flag" "Not occurred,Occurred" newline bitfld.long 0x08 4. " UDRF ,Underrun flag" "No underrun,Underrun" bitfld.long 0x08 3. " OVRF ,Overrun flag" "Not occurred,Occurred" newline bitfld.long 0x08 2. " FEF ,Frame end flag" "Not occurred,Occurred" rbitfld.long 0x08 1. " FEMPF ,FIFO empty flag" "Not empty,Empty" newline rbitfld.long 0x08 0. " FBSY ,Frame busy flag" "Stopped,Ongoing" rgroup.long 0x0C++0x03 line.long 0x00 "PCMONR,PDC Pin Monitor Register" bitfld.long 0x00 1. " HSYNC ,HSYNC signal status flag" "Low,High" bitfld.long 0x00 0. " VSYNC ,VSYNC signal status flag" "Low,High" sif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") hgroup.long 0x10++0x03 hide.long 0x00 "PCDR,PDC Receive Data Register" else rgroup.long 0x10++0x03 line.long 0x00 "PCDR,PDC Receive Data Register" endif group.long 0x14++0x07 line.long 0x00 "VCR,Vertical Capture Register" hexmask.long.WORD 0x00 16.--27. 1. " VSZ ,Vertical capture size" hexmask.long.WORD 0x00 0.--11. 1. " VST ,Vertical capture start line position" line.long 0x04 "HCR,Horizontal Capture Register" hexmask.long.WORD 0x04 16.--27. 1. " HSZ ,Horizontal capture size" hexmask.long.WORD 0x04 0.--11. 1. " HST ,Horizontal capture start byte position" width 0x0B tree.end tree.open "ADC12 (12-Bit A/D Converter)" tree "ADC0" base ad:0x4005C000 width 12. if (((per.b(ad:0x4005C000+0x0C))&0x87)==0x00)||(((per.b(ad:0x4005C000+0x0C))&0x87)==0x81)||(((per.b(ad:0x4005C000+0x0C))&0x87)==0x83) if (((per.w(ad:0x4005C000+0x0E))&0x8000)==0x0) if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" else sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word.BYTE 0x0 0.--7. 1. " AD ,Converted value 7 to 0" endif else if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" else sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word.BYTE 0x0 8.--15. 1. " AD ,Converted value 7 to 0" endif endif elif (((per.b(ad:0x4005C000+0x0C))&0x87)==0x05) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" elif (((per.b(ad:0x4005C000+0x0C))&0x87)>0x01)&&(((per.b(ad:0x4005C000+0x0C))&0x87)<0x04) if (((per.w(ad:0x4005C000+0x0E))&0x8000)==0x0) if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" else sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" endif else if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" else sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CBD")) rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x4A++0x01 line.word 0x0 "ADDR21,A/D Data Registers 21" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" endif endif else sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x26++0x01 hide.word 0x00 "ADDR3,A/D Data Registers 3" hgroup.word 0x28++0x01 hide.word 0x00 "ADDR4,A/D Data Registers 4" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x2E++0x01 hide.word 0x00 "ADDR7,A/D Data Registers 7" else hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x26++0x01 hide.word 0x00 "ADDR3,A/D Data Registers 3" hgroup.word 0x28++0x01 hide.word 0x00 "ADDR4,A/D Data Registers 4" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" endif hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" hgroup.word 0x44++0x01 hide.word 0x00 "ADDR18,A/D Data Registers 18" sif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) hgroup.word 0x46++0x01 hide.word 0x00 "ADDR19,A/D Data Registers 19" elif (cpuis("R7FS7G27*CBD")) hgroup.word 0x46++0x01 hide.word 0x00 "ADDR19,A/D Data Registers 19" hgroup.word 0x48++0x01 hide.word 0x00 "ADDR20,A/D Data Registers 20" hgroup.word 0x4A++0x01 hide.word 0x00 "ADDR21,A/D Data Registers 21" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") hgroup.word 0x46++0x01 hide.word 0x00 "ADDR19,A/D Data Registers 19" hgroup.word 0x48++0x01 hide.word 0x00 "ADDR20,A/D Data Registers 20" endif hgroup.word 0x18++0x01 hide.word 0x00 "ADDBLDR,A/D Data Duplexing Register" hgroup.word 0x84++0x01 hide.word 0x00 "ADDBLDRA,A/D Data Duplexing Register A" hgroup.word 0x86++0x01 hide.word 0x00 "ADDBLDRB,A/D Data Duplexing Register B" hgroup.word 0x1A++0x01 hide.word 0x00 "ADTSDR,A/D Temperature Sensor Data Register" hgroup.word 0x1C++0x01 hide.word 0x00 "ADOCDR,A/D Internal Reference Voltage Data Register" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.w(ad:0x4005C000+0x0E))&0x8000)==0x0) if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 0.--11. 1. " AD[11:0] ,Converted value 11 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 0.--9. 1. " AD[9:0] ,Converted value 9 to 0" else rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word.BYTE 0x0 0.--7. 1. " AD[7:0] ,Converted value 7 to 0" endif else if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 4.--15. 1. " AD[11:0] ,Converted value 11 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 6.--15. 1. " AD[9:0] ,Converted value 9 to 0" else rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word.BYTE 0x0 8.--15. 1. " AD[7:0] ,Converted value 7 to 0" endif endif else if (((per.w(ad:0x4005C000+0x0E))&0x8000)==0x0) if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 0.--11. 1. " AD[11:0] ,Converted value 11 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 0.--9. 1. " AD[9:0] ,Converted value 9 to 0" else rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word.BYTE 0x0 0.--7. 1. " AD[7:0] ,Converted value 7 to 0" endif else if (((per.w(ad:0x4005C000+0x0E))&0x6)==0x0) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 4.--15. 1. " AD[11:0] ,Converted value 11 to 0" elif (((per.w(ad:0x4005C000+0x0E))&0x6)==0x2) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 6.--15. 1. " AD[9:0] ,Converted value 9 to 0" else rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word.BYTE 0x0 8.--15. 1. " AD[7:0] ,Converted value 7 to 0" endif endif endif sif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") if (((per.w(ad:0x4005C000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. " ADST ,A/D conversion start" "Stopped,Started" bitfld.word 0x0 13.--14. " ADCS ,Scan mode select" "Single,Group,Continuous,?..." bitfld.word 0x0 9. " TRGE ,Trigger start enable" "Disabled,Enabled" newline bitfld.word 0x0 8. " EXTRG ,Trigger select" "Synchronous,Asynchronous" bitfld.word 0x0 7. " DBLE ,Double trigger mode select" "Deselected,Selected" bitfld.word 0x0 6. " GBADIE ,Group b scan end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 0.--4. " DBLANS ,Double trigger channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.word 0x00++0x01 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. " ADST ,A/D conversion start" "Stopped,Started" bitfld.word 0x0 13.--14. " ADCS ,Scan mode select" "Single,Group,Continuous,?..." bitfld.word 0x0 9. " TRGE ,Trigger start enable" "Disabled,Enabled" newline bitfld.word 0x0 8. " EXTRG ,Trigger select" "Synchronous,Asynchronous" bitfld.word 0x0 7. " DBLE ,Double trigger mode select" "Deselected,Selected" bitfld.word 0x0 6. " GBADIE ,Group b scan end interrupt enable" "Disabled,Enabled" endif else group.word 0x00++0x01 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. " ADST ,A/D conversion start" "Stopped,Started" bitfld.word 0x0 13.--14. " ADCS ,Scan mode select" "Single,Group,Continuous,?..." bitfld.word 0x0 9. " TRGE ,Trigger start enable" "Disabled,Enabled" newline bitfld.word 0x0 8. " EXTRG ,Trigger select" "Synchronous,Asynchronous" bitfld.word 0x0 7. " DBLE ,Double trigger mode select" "Deselected,Selected" bitfld.word 0x0 6. " GBADIE ,Group b scan end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 0.--4. " DBLANS ,Double trigger channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif group.word 0x04++0x01 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" sif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") bitfld.word 0x0 7. " ANSA07 ,A/D conversion channel 7 select" "Not selected,Selected" bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" newline bitfld.word 0x0 4. " ANSA04 ,A/D conversion channel 4 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSA03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA02 ,A/D conversion channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" else bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 4. " ANSA04 ,A/D conversion channel 4 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ANSA03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA02 ,A/D conversion channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 3. " ANSA19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 4. " ANSA20 ,A/D conversion channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSA19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" else group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 5. " ANSA21 ,A/D conversion channel 21 select" "Not selected,Selected" bitfld.word 0x0 4. " ANSA20 ,A/D conversion channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSA19 ,A/D conversion channel 19 select" "Not selected,Selected" newline bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" endif group.word 0x14++0x01 line.word 0x0 "ADANSB0,A/D Channel Select Register B0" sif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") bitfld.word 0x0 7. " ANSB07 ,A/D conversion channel 7 select" "Not selected,Selected" bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" newline bitfld.word 0x0 4. " ANSB04 ,A/D conversion channel 4 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSB03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB02 ,A/D conversion channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" else bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 4. " ANSB04 ,A/D conversion channel 4 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ANSB03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB02 ,A/D conversion channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 3. " ANSB19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" elif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 4. " ANSB20 ,A/D conversion channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSB19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" else group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 5. " ANSB21 ,A/D conversion channel 21 select" "Not selected,Selected" bitfld.word 0x0 4. " ANSB20 ,A/D conversion channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSB19 ,A/D conversion channel 19 select" "Not selected,Selected" newline bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" endif group.word 0x08++0x01 line.word 0x0 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" sif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") bitfld.word 0x0 7. " ADS07 ,A/D-converted value addition/average channel 7 select" "Not selected,Selected" bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" newline bitfld.word 0x0 4. " ADS04 ,A/D-converted value addition/average channel 4 select" "Not selected,Selected" bitfld.word 0x0 3. " ADS03 ,A/D-converted value addition/average channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS02 ,A/D-converted value addition/average channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" else bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" bitfld.word 0x0 4. " ADS04 ,A/D-converted value addition/average channel 4 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ADS03 ,A/D-converted value addition/average channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS02 ,A/D-converted value addition/average channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x0A++0x01 line.word 0x0 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x0 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x0A++0x01 line.word 0x0 "ADADS1,A/D-converted value addition/average channel Select Register 1" bitfld.word 0x0 3. " ADS19 ,A/D-converted value addition/average channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" elif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") group.word 0x0A++0x01 line.word 0x0 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x0 4. " ADS20 ,A/D-converted value addition/average channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ADS19 ,A/D-converted value addition/average channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" else group.word 0x0A++0x01 line.word 0x0 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x0 5. " ADS21 ,A/D-converted value addition/average channel 21 select" "Not selected,Selected" bitfld.word 0x0 4. " ADS20 ,A/D-converted value addition/average channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ADS19 ,A/D-converted value addition/average channel 19 select" "Not selected,Selected" newline bitfld.word 0x0 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" endif group.byte 0x0C++0x01 line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x0 7. " AVEE ,Average mode enable" "Disabled,Enabled" bitfld.byte 0x0 0.--2. " ADC ,Count select" "1,2,3,4,,16,?..." group.word 0x0E++0x05 line.word 0x0 "ADCER,A/D Control Extended Register" bitfld.word 0x0 15. " ADRFMT ,A/D data register format select" "Flush-right,Flush-left" bitfld.word 0x0 11. " DIAGM ,Self-diagnosis enable" "Disabled,Enabled" sif cpuis("R7FS5D9*") bitfld.word 0x0 10. " DIAGLD ,Self-diagnosis mode select" "Rotation,Mixed" else bitfld.word 0x0 10. " DIAGLD ,Self-diagnosis mode select" "Rotation,Fixed" endif newline bitfld.word 0x0 8.--9. " DIAGVAL ,Self-diagnosis conversion voltage select" ",0 V,VREFH0/2,VREFH0" bitfld.word 0x0 5. " ACE ,A/D data register automatic clearing enable" "Disabled,Enabled" bitfld.word 0x0 1.--2. " ADPRC ,A/D conversion accuracy specify" "12-bit,10-bit,8-bit,?..." line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register" hexmask.word.BYTE 0x2 8.--13. 1. " TRSA ,A/D conversion start trigger select" hexmask.word.BYTE 0x2 0.--5. 1. " TRSB ,A/D conversion start trigger select for group b" line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x4 11. " OCSB ,Internal reference voltage A/D conversion select for group b" "Disabled,Enabled" bitfld.word 0x4 10. " TSSB ,Temperature sensor output A/D conversion select for group b" "Disabled,Enabled" bitfld.word 0x4 9. " OCSA ,Internal reference voltage A/D conversion select for group a" "Disabled,Enabled" newline bitfld.word 0x4 8. " TSSA ,Temperature sensor output A/D conversion select for group a" "Disabled,Enabled" bitfld.word 0x4 1. " OCSAD ,Internal reference voltage A/D converted value addition/average mode select" "Not selected,Selected" bitfld.word 0x4 0. " TSSAD ,Temperature sensor output A/D converted value addition/average mode select" "Not selected,Selected" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE3++0x00 line.byte 0x0 "ADSSTR03,A/D Sampling State Register 3" group.byte 0xE4++0x00 line.byte 0x0 "ADSSTR04,A/D Sampling State Register 4" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" group.byte 0xE7++0x00 line.byte 0x0 "ADSSTR07,A/D Sampling State Register 7" else group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE3++0x00 line.byte 0x0 "ADSSTR03,A/D Sampling State Register 3" group.byte 0xE4++0x00 line.byte 0x0 "ADSSTR04,A/D Sampling State Register 4" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" endif group.byte 0xDD++0x02 line.byte 0x0 "ADSSTRL,A/D Sampling State Register L" line.byte 0x1 "ADSSTRT,A/D Sampling State Register T" line.byte 0x2 "ADSSTRO,A/D Sampling State Register O" group.word 0x66++0x01 line.word 0x0 "ADSHCR,A/D Sample and Hold Circuit Control Register" bitfld.word 0x0 10. " SHANS[2] ,Channel-dedicated sample-and-hold circuit bypass select - ch. 2" "Not bypassed,Bypassed" bitfld.word 0x0 9. " SHANS[1] ,Channel-dedicated sample-and-hold circuit bypass select - ch. 1" "Not bypassed,Bypassed" bitfld.word 0x0 8. " SHANS[0] ,Channel-dedicated sample-and-hold circuit bypass select - ch. 0" "Not bypassed,Bypassed" newline hexmask.word.BYTE 0x0 0.--7. 1. " SSTSH ,Channel-dedicated sample-and-hold circuit sampling time setting" group.byte 0x7C++0x00 line.byte 0x0 "ADSHMSR,A/D Sample and Hold Operation Mode Selection Register" bitfld.byte 0x0 0. " SHMD ,Sampling operation selection" "Not continuous,Continuous" group.byte 0x7A++0x00 line.byte 0x0 "ADDISCR, A/D Disconnection Detection Control Register" bitfld.byte 0x0 4. " ADNDIS[4] ,Precharge/discharge select" "Discharge,Precharge" bitfld.byte 0x0 0.--3. " ADNDIS[3:0] ,Precharge/discharge period" "0,,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.w(ad:0x4005C000+0x80))&0x01)==0x01) group.word 0x80++0x01 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 15. " GBRP ,Group b single scan continuous start" "Disabled,Enabled" bitfld.word 0x0 1. " GBRSCN ,Group b restart setting" "Disabled,Enabled" bitfld.word 0x0 0. " PGS ,Group a priority control setting" "Disabled,Enabled" else group.word 0x80++0x01 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 0. " PGS ,Group a priority control setting" "Disabled,Enabled" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.w(ad:0x4005C000+0x90))&0xA00)==0xA00) group.word 0x90++0x01 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. " CMPAIE ,Compare a interrupt enable" "Disabled,Enabled" bitfld.word 0x0 14. " WCMPE ,Window function setting" "Disabled,Enabled" bitfld.word 0x0 13. " CMPBIE ,Compare b interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 11. " CMPAE ,Compare window a operation enable" "Disabled,Enabled" bitfld.word 0x0 9. " CMPBE ,Compare window b operation enable" "Disabled,Enabled" bitfld.word 0x0 0.--1. " CMPAB ,Window A/B composite conditions setting" "OR,EXOR,AND,?..." else group.word 0x90++0x01 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. " CMPAIE ,Compare a interrupt enable" "Disabled,Enabled" bitfld.word 0x0 14. " WCMPE ,Window function setting" "Disabled,Enabled" bitfld.word 0x0 13. " CMPBIE ,Compare b interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 11. " CMPAE ,Compare window a operation enable" "Disabled,Enabled" bitfld.word 0x0 9. " CMPBE ,Compare window b operation enable" "Disabled,Enabled" endif else group.word 0x90++0x01 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. " CMPAIE ,Compare a interrupt enable" "Disabled,Enabled" bitfld.word 0x0 14. " WCMPE ,Window function setting" "Disabled,Enabled" bitfld.word 0x0 13. " CMPBIE ,Compare b interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 11. " CMPAE ,Compare window a operation enable" "Disabled,Enabled" bitfld.word 0x0 9. " CMPBE ,Compare window b operation enable" "Disabled,Enabled" bitfld.word 0x0 0.--1. " CMPAB ,Window A/B composite conditions setting" "OR,EXOR,AND,?..." endif group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x0 7. " CMPCHA07 ,Compare window a channel 7 select" "Disabled,Enabled" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" newline bitfld.word 0x0 4. " CMPCHA04 ,Compare window a channel 4 select" "Disabled,Enabled" bitfld.word 0x0 3. " CMPCHA03 ,Compare window a channel 3 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" newline bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" else bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" bitfld.word 0x0 4. " CMPCHA04 ,Compare window a channel 4 select" "Disabled,Enabled" newline bitfld.word 0x0 3. " CMPCHA03 ,Compare window a channel 3 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" newline bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x96++0x03 line.word 0x0 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x0 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")||cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x96++0x03 line.word 0x0 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x0 3. " CMPCHA19 ,Compare window a channel 19 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" newline bitfld.word 0x0 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" elif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") group.word 0x96++0x03 line.word 0x0 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x0 4. " CMPCHA20 ,Compare window a channel 20 select" "Disabled,Enabled" bitfld.word 0x0 3. " CMPCHA19 ,Compare window a channel 19 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" newline bitfld.word 0x0 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" else group.word 0x96++0x03 line.word 0x0 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x0 5. " CMPCHA21 ,Compare window a channel 21 select" "Disabled,Enabled" bitfld.word 0x0 4. " CMPCHA20 ,Compare window a channel 20 select" "Disabled,Enabled" bitfld.word 0x0 3. " CMPCHA19 ,Compare window a channel 19 select" "Disabled,Enabled" newline bitfld.word 0x0 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" endif group.byte 0x92++0x00 line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" bitfld.byte 0x0 1. " CMPOCA ,Internal reference voltage compare select" "Excluded,Included" bitfld.byte 0x0 0. " CMPTSA ,Temperature sensor output compare select" "Excluded,Included" if (((per.l(ad:0x4005C000+0x90))&0x4000)==0x0) group.word 0x98++0x01 line.word 0x0 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") bitfld.word 0x0 7. " CMPLCHA07 ,Compare window a comparison condition select for channel 7" "ADCMPDR0>A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR00x01)&&(((per.b(ad:0x4005C200+0x0C))&0x87)<0x04) if (((per.w(ad:0x4005C200+0x0E))&0x8000)==0x0) if (((per.w(ad:0x4005C200+0x0E))&0x6)==0x0) sif (cpuis("R7FS7G27*CFP")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" elif cpuis("R7FS5D5*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" elif cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--13. 1. " AD ,Converted value 13 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--13. 1. " AD ,Added value 13 to 0" elif (((per.w(ad:0x4005C200+0x0E))&0x6)==0x2) sif (cpuis("R7FS7G27*CFP")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D5*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--11. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--11. 1. " AD ,Added value 11 to 0" else sif (cpuis("R7FS7G27*CFP")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D5*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 0.--9. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 0.--9. 1. " AD ,Added value 9 to 0" endif else if (((per.w(ad:0x4005C200+0x0E))&0x6)==0x0) sif (cpuis("R7FS7G27*CFP")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" elif cpuis("R7FS5D5*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" elif cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 2.--15. 1. " AD ,Converted value 13 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 2.--15. 1. " AD ,Added value 13 to 0" elif (((per.w(ad:0x4005C200+0x0E))&0x6)==0x2) sif (cpuis("R7FS7G27*CFP")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D5*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" elif cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 4.--15. 1. " AD ,Converted value 11 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 4.--15. 1. " AD ,Added value 11 to 0" else sif (cpuis("R7FS7G27*CFP")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D5*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" elif cpuis("R7FS5D9*") rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2E++0x01 line.word 0x0 "ADDR7,A/D Data Registers 7" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" else rgroup.word 0x20++0x01 line.word 0x0 "ADDR0,A/D Data Registers 0" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x22++0x01 line.word 0x0 "ADDR1,A/D Data Registers 1" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x24++0x01 line.word 0x0 "ADDR2,A/D Data Registers 2" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x26++0x01 line.word 0x0 "ADDR3,A/D Data Registers 3" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x28++0x01 line.word 0x0 "ADDR4,A/D Data Registers 4" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2A++0x01 line.word 0x0 "ADDR5,A/D Data Registers 5" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x2C++0x01 line.word 0x0 "ADDR6,A/D Data Registers 6" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x40++0x01 line.word 0x0 "ADDR16,A/D Data Registers 16" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x42++0x01 line.word 0x0 "ADDR17,A/D Data Registers 17" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x44++0x01 line.word 0x0 "ADDR18,A/D Data Registers 18" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x46++0x01 line.word 0x0 "ADDR19,A/D Data Registers 19" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" rgroup.word 0x48++0x01 line.word 0x0 "ADDR20,A/D Data Registers 20" hexmask.word 0x0 6.--15. 1. " AD ,Converted value 9 to 0" endif rgroup.word 0x18++0x01 line.word 0x0 "ADDBLDR,A/D Data Duplexing Register" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x84++0x01 line.word 0x0 "ADDBLDRA,A/D Data Duplexing Register A" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x86++0x01 line.word 0x0 "ADDBLDRB,A/D Data Duplexing Register B" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x1A++0x01 line.word 0x0 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" rgroup.word 0x1C++0x01 line.word 0x0 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x0 6.--15. 1. " AD ,Added value 9 to 0" endif endif else sif (cpuis("R7FS7G27*CFP")) hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" hgroup.word 0x44++0x01 hide.word 0x00 "ADDR18,A/D Data Registers 18" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x26++0x01 hide.word 0x00 "ADDR3,A/D Data Registers 3" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" hgroup.word 0x44++0x01 hide.word 0x00 "ADDR18,A/D Data Registers 18" hgroup.word 0x46++0x01 hide.word 0x00 "ADDR19,A/D Data Registers 19" elif cpuis("R7FS5D5*") hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x2E++0x01 hide.word 0x00 "ADDR7,A/D Data Registers 7" hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" hgroup.word 0x44++0x01 hide.word 0x00 "ADDR18,A/D Data Registers 18" elif cpuis("R7FS5D9*") hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x26++0x01 hide.word 0x00 "ADDR3,A/D Data Registers 3" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x2E++0x01 hide.word 0x00 "ADDR7,A/D Data Registers 7" hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" hgroup.word 0x44++0x01 hide.word 0x00 "ADDR18,A/D Data Registers 18" hgroup.word 0x46++0x01 hide.word 0x00 "ADDR19,A/D Data Registers 19" else hgroup.word 0x20++0x01 hide.word 0x00 "ADDR0,A/D Data Registers 0" hgroup.word 0x22++0x01 hide.word 0x00 "ADDR1,A/D Data Registers 1" hgroup.word 0x24++0x01 hide.word 0x00 "ADDR2,A/D Data Registers 2" hgroup.word 0x26++0x01 hide.word 0x00 "ADDR3,A/D Data Registers 3" hgroup.word 0x28++0x01 hide.word 0x00 "ADDR4,A/D Data Registers 4" hgroup.word 0x2A++0x01 hide.word 0x00 "ADDR5,A/D Data Registers 5" hgroup.word 0x2C++0x01 hide.word 0x00 "ADDR6,A/D Data Registers 6" hgroup.word 0x40++0x01 hide.word 0x00 "ADDR16,A/D Data Registers 16" hgroup.word 0x42++0x01 hide.word 0x00 "ADDR17,A/D Data Registers 17" hgroup.word 0x44++0x01 hide.word 0x00 "ADDR18,A/D Data Registers 18" hgroup.word 0x46++0x01 hide.word 0x00 "ADDR19,A/D Data Registers 19" hgroup.word 0x48++0x01 hide.word 0x00 "ADDR20,A/D Data Registers 20" endif hgroup.word 0x18++0x01 hide.word 0x00 "ADDBLDR,A/D Data Duplexing Register" hgroup.word 0x84++0x01 hide.word 0x00 "ADDBLDRA,A/D Data Duplexing Register A" hgroup.word 0x86++0x01 hide.word 0x00 "ADDBLDRB,A/D Data Duplexing Register B" hgroup.word 0x1A++0x01 hide.word 0x00 "ADTSDR,A/D Temperature Sensor Data Register" hgroup.word 0x1C++0x01 hide.word 0x00 "ADOCDR,A/D Internal Reference Voltage Data Register" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") else if (((per.w(ad:0x4005C200+0x0E))&0x8000)==0x0) if (((per.w(ad:0x4005C200+0x0E))&0x6)==0x0) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 0.--11. 1. " AD[11:0] ,Converted value 11 to 0" elif (((per.w(ad:0x4005C200+0x0E))&0x6)==0x2) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 0.--9. 1. " AD[9:0] ,Converted value 9 to 0" else rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 14.--15. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word.BYTE 0x0 0.--7. 1. " AD[7:0] ,Converted value 7 to 0" endif else if (((per.w(ad:0x4005C200+0x0E))&0x6)==0x0) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 4.--15. 1. " AD[11:0] ,Converted value 11 to 0" elif (((per.w(ad:0x4005C200+0x0E))&0x6)==0x2) rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word 0x0 6.--15. 1. " AD[9:0] ,Converted value 9 to 0" else rgroup.word 0x1E++0x01 line.word 0x0 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x0 0.--1. " DIAGST ,Self-diagnosis status" "Not executed,0 V,VREFH0/2,VREFH0" hexmask.word.BYTE 0x0 8.--15. 1. " AD[7:0] ,Converted value 7 to 0" endif endif endif sif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") if (((per.w(ad:0x4005C200))&0x80)==0x80) group.word 0x00++0x01 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. " ADST ,A/D conversion start" "Stopped,Started" bitfld.word 0x0 13.--14. " ADCS ,Scan mode select" "Single,Group,Continuous,?..." bitfld.word 0x0 9. " TRGE ,Trigger start enable" "Disabled,Enabled" newline bitfld.word 0x0 8. " EXTRG ,Trigger select" "Synchronous,Asynchronous" bitfld.word 0x0 7. " DBLE ,Double trigger mode select" "Deselected,Selected" bitfld.word 0x0 6. " GBADIE ,Group b scan end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 0.--4. " DBLANS ,Double trigger channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" else group.word 0x00++0x01 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. " ADST ,A/D conversion start" "Stopped,Started" bitfld.word 0x0 13.--14. " ADCS ,Scan mode select" "Single,Group,Continuous,?..." bitfld.word 0x0 9. " TRGE ,Trigger start enable" "Disabled,Enabled" newline bitfld.word 0x0 8. " EXTRG ,Trigger select" "Synchronous,Asynchronous" bitfld.word 0x0 7. " DBLE ,Double trigger mode select" "Deselected,Selected" bitfld.word 0x0 6. " GBADIE ,Group b scan end interrupt enable" "Disabled,Enabled" endif else group.word 0x00++0x01 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. " ADST ,A/D conversion start" "Stopped,Started" bitfld.word 0x0 13.--14. " ADCS ,Scan mode select" "Single,Group,Continuous,?..." bitfld.word 0x0 9. " TRGE ,Trigger start enable" "Disabled,Enabled" newline bitfld.word 0x0 8. " EXTRG ,Trigger select" "Synchronous,Asynchronous" bitfld.word 0x0 7. " DBLE ,Double trigger mode select" "Deselected,Selected" bitfld.word 0x0 6. " GBADIE ,Group b scan end interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 0.--4. " DBLANS ,Double trigger channel select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x04++0x01 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) group.word 0x04++0x03 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA02 ,A/D conversion channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x04++0x03 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSA03 ,A/D conversion channel 3 select" "Not selected,Selected" newline bitfld.word 0x0 2. " ANSA02 ,A/D conversion channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 3. " ANSA19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" elif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") group.word 0x04++0x03 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 7. " ANSA07 ,A/D conversion channel 7 select" "Not selected,Selected" bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ANSA03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA02 ,A/D conversion channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" sif !cpuis("R7FS5D5*") bitfld.word 0x0 3. " ANSA19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" else bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" endif else group.word 0x04++0x03 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 6. " ANSA06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSA05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 4. " ANSA04 ,A/D conversion channel 4 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ANSA03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA02 ,A/D conversion channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSA01 ,A/D conversion channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSA00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x06++0x01 line.word 0x0 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x0 4. " ANSA20 ,A/D conversion channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSA19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSA18 ,A/D conversion channel 18 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSA17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSA16 ,A/D conversion channel 16 select" "Not selected,Selected" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x14++0x01 line.word 0x0 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) group.word 0x14++0x03 line.word 0x0 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB02 ,A/D conversion channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x14++0x03 line.word 0x0 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSB03 ,A/D conversion channel 3 select" "Not selected,Selected" newline bitfld.word 0x0 2. " ANSB02 ,A/D conversion channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 3. " ANSB19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" elif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") group.word 0x14++0x03 line.word 0x0 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x0 7. " ANSB07 ,A/D conversion channel 7 select" "Not selected,Selected" bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" newline bitfld.word 0x0 4. " ANSB04 ,A/D conversion channel 4 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSB03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB02 ,A/D conversion channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" sif !cpuis("R7FS5D5*") bitfld.word 0x0 3. " ANSB19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" else bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" endif else group.word 0x14++0x03 line.word 0x0 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x0 6. " ANSB06 ,A/D conversion channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ANSB05 ,A/D conversion channel 5 select" "Not selected,Selected" bitfld.word 0x0 4. " ANSB04 ,A/D conversion channel 4 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ANSB03 ,A/D conversion channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB02 ,A/D conversion channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ANSB01 ,A/D conversion channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ANSB00 ,A/D conversion channel 0 select" "Not selected,Selected" group.word 0x16++0x01 line.word 0x0 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x0 4. " ANSB20 ,A/D conversion channel 20 select" "Not selected,Selected" bitfld.word 0x0 3. " ANSB19 ,A/D conversion channel 19 select" "Not selected,Selected" bitfld.word 0x0 2. " ANSB18 ,A/D conversion channel 18 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ANSB17 ,A/D conversion channel 17 select" "Not selected,Selected" bitfld.word 0x0 0. " ANSB16 ,A/D conversion channel 16 select" "Not selected,Selected" endif sif (cpuis("R7FS7G27*CFP")) group.word 0x08++0x03 line.word 0x0 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" line.word 0x2 "ADADS1,A/D-converted value addition/average channel Select Register 1" bitfld.word 0x2 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x2 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) group.word 0x08++0x03 line.word 0x0 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS02 ,A/D-converted value addition/average channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" line.word 0x2 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x2 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x2 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x2 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x08++0x03 line.word 0x0 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" bitfld.word 0x0 3. " ADS03 ,A/D-converted value addition/average channel 3 select" "Not selected,Selected" newline bitfld.word 0x0 2. " ADS02 ,A/D-converted value addition/average channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" line.word 0x2 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x2 3. " ADS19 ,A/D-converted value addition/average channel 19 select" "Not selected,Selected" bitfld.word 0x2 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x2 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" newline bitfld.word 0x2 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" elif cpuis("R7FS5D9*")||cpuis("R7FS5D5*") group.word 0x08++0x03 line.word 0x0 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x0 7. " ADS07 ,A/D-converted value addition/average channel 7 select" "Not selected,Selected" bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" newline bitfld.word 0x0 4. " ADS04 ,A/D-converted value addition/average channel 4 select" "Not selected,Selected" bitfld.word 0x0 3. " ADS03 ,A/D-converted value addition/average channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS02 ,A/D-converted value addition/average channel 2 select" "Not selected,Selected" newline bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" line.word 0x2 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" sif !cpuis("R7FS5D5*") bitfld.word 0x2 3. " ADS19 ,A/D-converted value addition/average channel 19 select" "Not selected,Selected" bitfld.word 0x2 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x2 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" newline bitfld.word 0x2 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" else bitfld.word 0x2 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" bitfld.word 0x2 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x2 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" endif else group.word 0x08++0x03 line.word 0x0 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x0 6. " ADS06 ,A/D-converted value addition/average channel 6 select" "Not selected,Selected" bitfld.word 0x0 5. " ADS05 ,A/D-converted value addition/average channel 5 select" "Not selected,Selected" bitfld.word 0x0 4. " ADS04 ,A/D-converted value addition/average channel 4 select" "Not selected,Selected" newline bitfld.word 0x0 3. " ADS03 ,A/D-converted value addition/average channel 3 select" "Not selected,Selected" bitfld.word 0x0 2. " ADS02 ,A/D-converted value addition/average channel 2 select" "Not selected,Selected" bitfld.word 0x0 1. " ADS01 ,A/D-converted value addition/average channel 1 select" "Not selected,Selected" newline bitfld.word 0x0 0. " ADS00 ,A/D-converted value addition/average channel 0 select" "Not selected,Selected" line.word 0x2 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x2 4. " ADS20 ,A/D-converted value addition/average channel 20 select" "Not selected,Selected" bitfld.word 0x2 3. " ADS19 ,A/D-converted value addition/average channel 19 select" "Not selected,Selected" bitfld.word 0x2 2. " ADS18 ,A/D-converted value addition/average channel 18 select" "Not selected,Selected" newline bitfld.word 0x2 1. " ADS17 ,A/D-converted value addition/average channel 17 select" "Not selected,Selected" bitfld.word 0x2 0. " ADS16 ,A/D-converted value addition/average channel 16 select" "Not selected,Selected" endif group.byte 0x0C++0x01 line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x0 7. " AVEE ,Average mode enable" "Disabled,Enabled" bitfld.byte 0x0 0.--2. " ADC ,Count select" "1,2,3,4,,16,?..." group.word 0x0E++0x05 line.word 0x0 "ADCER,A/D Control Extended Register" bitfld.word 0x0 15. " ADRFMT ,A/D data register format select" "Flush-right,Flush-left" bitfld.word 0x0 11. " DIAGM ,Self-diagnosis enable" "Disabled,Enabled" sif cpuis("R7FS5D9*") bitfld.word 0x0 10. " DIAGLD ,Self-diagnosis mode select" "Rotation,Mixed" else bitfld.word 0x0 10. " DIAGLD ,Self-diagnosis mode select" "Rotation,Fixed" endif newline bitfld.word 0x0 8.--9. " DIAGVAL ,Self-diagnosis conversion voltage select" ",0 V,VREFH0/2,VREFH0" bitfld.word 0x0 5. " ACE ,A/D data register automatic clearing enable" "Disabled,Enabled" bitfld.word 0x0 1.--2. " ADPRC ,A/D conversion accuracy specify" "12-bit,10-bit,8-bit,?..." line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register" hexmask.word.BYTE 0x2 8.--13. 1. " TRSA ,A/D conversion start trigger select" hexmask.word.BYTE 0x2 0.--5. 1. " TRSB ,A/D conversion start trigger select for group b" line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x4 11. " OCSB ,Internal reference voltage A/D conversion select for group b" "Disabled,Enabled" bitfld.word 0x4 10. " TSSB ,Temperature sensor output A/D conversion select for group b" "Disabled,Enabled" bitfld.word 0x4 9. " OCSA ,Internal reference voltage A/D conversion select for group a" "Disabled,Enabled" newline bitfld.word 0x4 8. " TSSA ,Temperature sensor output A/D conversion select for group a" "Disabled,Enabled" bitfld.word 0x4 1. " OCSAD ,Internal reference voltage A/D converted value addition/average mode select" "Not selected,Selected" bitfld.word 0x4 0. " TSSAD ,Temperature sensor output A/D converted value addition/average mode select" "Not selected,Selected" sif (cpuis("R7FS7G27*CFP")) group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE3++0x00 line.byte 0x0 "ADSSTR03,A/D Sampling State Register 3" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" elif cpuis("R7FS5D5*") group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" group.byte 0xE7++0x00 line.byte 0x0 "ADSSTR07,A/D Sampling State Register 7" elif cpuis("R7FS5D9*") group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE3++0x00 line.byte 0x0 "ADSSTR03,A/D Sampling State Register 3" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" group.byte 0xE7++0x00 line.byte 0x0 "ADSSTR07,A/D Sampling State Register 7" else group.byte 0xE0++0x00 line.byte 0x0 "ADSSTR00,A/D Sampling State Register 0" group.byte 0xE1++0x00 line.byte 0x0 "ADSSTR01,A/D Sampling State Register 1" group.byte 0xE2++0x00 line.byte 0x0 "ADSSTR02,A/D Sampling State Register 2" group.byte 0xE3++0x00 line.byte 0x0 "ADSSTR03,A/D Sampling State Register 3" group.byte 0xE4++0x00 line.byte 0x0 "ADSSTR04,A/D Sampling State Register 4" group.byte 0xE5++0x00 line.byte 0x0 "ADSSTR05,A/D Sampling State Register 5" group.byte 0xE6++0x00 line.byte 0x0 "ADSSTR06,A/D Sampling State Register 6" endif group.byte 0xDD++0x02 line.byte 0x0 "ADSSTRL,A/D Sampling State Register L" line.byte 0x1 "ADSSTRT,A/D Sampling State Register T" line.byte 0x2 "ADSSTRO,A/D Sampling State Register O" group.word 0x66++0x01 line.word 0x0 "ADSHCR,A/D Sample and Hold Circuit Control Register" bitfld.word 0x0 10. " SHANS[2] ,Channel-dedicated sample-and-hold circuit bypass select - ch. 2" "Not bypassed,Bypassed" bitfld.word 0x0 9. " SHANS[1] ,Channel-dedicated sample-and-hold circuit bypass select - ch. 1" "Not bypassed,Bypassed" bitfld.word 0x0 8. " SHANS[0] ,Channel-dedicated sample-and-hold circuit bypass select - ch. 0" "Not bypassed,Bypassed" newline hexmask.word.BYTE 0x0 0.--7. 1. " SSTSH ,Channel-dedicated sample-and-hold circuit sampling time setting" group.byte 0x7C++0x00 line.byte 0x0 "ADSHMSR,A/D Sample and Hold Operation Mode Selection Register" bitfld.byte 0x0 0. " SHMD ,Sampling operation selection" "Not continuous,Continuous" group.byte 0x7A++0x00 line.byte 0x0 "ADDISCR, A/D Disconnection Detection Control Register" bitfld.byte 0x0 4. " ADNDIS[4] ,Precharge/discharge select" "Discharge,Precharge" bitfld.byte 0x0 0.--3. " ADNDIS[3:0] ,Precharge/discharge period" "0,,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.w(ad:0x4005C200+0x80))&0x01)==0x01) group.word 0x80++0x01 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 15. " GBRP ,Group b single scan continuous start" "Disabled,Enabled" bitfld.word 0x0 1. " GBRSCN ,Group b restart setting" "Disabled,Enabled" bitfld.word 0x0 0. " PGS ,Group a priority control setting" "Disabled,Enabled" else group.word 0x80++0x01 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 0. " PGS ,Group a priority control setting" "Disabled,Enabled" endif sif cpuis("R7FS5D5*")||cpuis("R7FS5D9*") if (((per.w(ad:0x4005C200+0x90))&0xA00)==0xA00) group.word 0x90++0x01 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. " CMPAIE ,Compare a interrupt enable" "Disabled,Enabled" bitfld.word 0x0 14. " WCMPE ,Window function setting" "Disabled,Enabled" bitfld.word 0x0 13. " CMPBIE ,Compare b interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 11. " CMPAE ,Compare window a operation enable" "Disabled,Enabled" bitfld.word 0x0 9. " CMPBE ,Compare window b operation enable" "Disabled,Enabled" bitfld.word 0x0 0.--1. " CMPAB ,Window A/B composite conditions setting" "OR,EXOR,AND,?..." else group.word 0x90++0x01 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. " CMPAIE ,Compare a interrupt enable" "Disabled,Enabled" bitfld.word 0x0 14. " WCMPE ,Window function setting" "Disabled,Enabled" bitfld.word 0x0 13. " CMPBIE ,Compare b interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 11. " CMPAE ,Compare window a operation enable" "Disabled,Enabled" bitfld.word 0x0 9. " CMPBE ,Compare window b operation enable" "Disabled,Enabled" endif else group.word 0x90++0x01 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. " CMPAIE ,Compare a interrupt enable" "Disabled,Enabled" bitfld.word 0x0 14. " WCMPE ,Window function setting" "Disabled,Enabled" bitfld.word 0x0 13. " CMPBIE ,Compare b interrupt enable" "Disabled,Enabled" newline bitfld.word 0x0 11. " CMPAE ,Compare window a operation enable" "Disabled,Enabled" bitfld.word 0x0 9. " CMPBE ,Compare window b operation enable" "Disabled,Enabled" bitfld.word 0x0 0.--1. " CMPAB ,Window A/B composite conditions setting" "OR,EXOR,AND,?..." endif sif (cpuis("R7FS7G27*CFP")) group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" newline bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x2 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" elif (cpuis("R7FS7G27*CLK")||cpuis("R7FS7G27*CFB")) group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" newline bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x2 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x2 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" elif (cpuis("R7FS7G27*CBG")||cpuis("R7FS7G27*CFC")) group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" bitfld.word 0x0 3. " CMPCHA03 ,Compare window a channel 3 select" "Disabled,Enabled" newline bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 3. " CMPCHA19 ,Compare window a channel 19 select" "Disabled,Enabled" bitfld.word 0x2 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x2 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" newline bitfld.word 0x2 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" elif cpuis("R7FS5D5*") group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 7. " CMPCHA07 ,Compare window a channel 7 select" "Disabled,Enabled" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" newline bitfld.word 0x0 4. " CMPCHA04 ,Compare window a channel 4 select" "Disabled,Enabled" bitfld.word 0x0 3. " CMPCHA03 ,Compare window a channel 3 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" newline bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x2 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x2 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" elif cpuis("R7FS5D9*") group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 7. " CMPCHA07 ,Compare window a channel 7 select" "Disabled,Enabled" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" newline bitfld.word 0x0 4. " CMPCHA04 ,Compare window a channel 4 select" "Disabled,Enabled" bitfld.word 0x0 3. " CMPCHA03 ,Compare window a channel 3 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" newline bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 3. " CMPCHA19 ,Compare window a channel 19 select" "Disabled,Enabled" bitfld.word 0x2 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" bitfld.word 0x2 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" newline bitfld.word 0x2 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" else group.word 0x94++0x03 line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 6. " CMPCHA06 ,Compare window a channel 6 select" "Disabled,Enabled" bitfld.word 0x0 5. " CMPCHA05 ,Compare window a channel 5 select" "Disabled,Enabled" bitfld.word 0x0 4. " CMPCHA04 ,Compare window a channel 4 select" "Disabled,Enabled" newline bitfld.word 0x0 3. " CMPCHA03 ,Compare window a channel 3 select" "Disabled,Enabled" bitfld.word 0x0 2. " CMPCHA02 ,Compare window a channel 2 select" "Disabled,Enabled" bitfld.word 0x0 1. " CMPCHA01 ,Compare window a channel 1 select" "Disabled,Enabled" newline bitfld.word 0x0 0. " CMPCHA00 ,Compare window a channel 0 select" "Disabled,Enabled" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 4. " CMPCHA20 ,Compare window a channel 20 select" "Disabled,Enabled" bitfld.word 0x2 3. " CMPCHA19 ,Compare window a channel 19 select" "Disabled,Enabled" bitfld.word 0x2 2. " CMPCHA18 ,Compare window a channel 18 select" "Disabled,Enabled" newline bitfld.word 0x2 1. " CMPCHA17 ,Compare window a channel 17 select" "Disabled,Enabled" bitfld.word 0x2 0. " CMPCHA16 ,Compare window a channel 16 select" "Disabled,Enabled" endif group.byte 0x92++0x00 line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" bitfld.byte 0x0 1. " CMPOCA ,Internal reference voltage compare select" "Excluded,Included" bitfld.byte 0x0 0. " CMPTSA ,Temperature sensor output compare select" "Excluded,Included" if (((per.l(ad:0x4005C200+0x90))&0x4000)==0x0) sif (cpuis("R7FS7G27*CFP")) group.word 0x98++0x01 line.word 0x0 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x0 6. " CMPLCHA06 ,Compare window a comparison condition select for channel 6" "ADCMPDR0>A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0A/D,ADCMPDR0gamma,Gamma->brightness/contrast" bitfld.long 0x00 8. " LCDEDGE ,LCD_DATA output phase control" "Rising edge,Falling edge" bitfld.long 0x00 6. " TCON0EDGE ,LCD_TCON0 output phase control" "Rising edge,Falling edge" bitfld.long 0x00 5. " TCON1EDGE ,LCD_TCON1 output phase control" "Rising edge,Falling edge" newline bitfld.long 0x00 4. " TCON2EDGE ,LCD_TCON2 output phase control" "Rising edge,Falling edge" bitfld.long 0x00 3. " TCON3EDGE ,LCD_TCON3 output phase control" "Rising edge,Falling edge" tree.end tree "TCON Settings" group.long 0x1404++0x0B line.long 0x00 "TCON_TIM,TCON Reference Timing Setting Register" hexmask.long.word 0x00 16.--26. 1. " HALF ,Vertical synchronization signal generation change timing" hexmask.long.word 0x00 0.--10. 1. " OFFSET ,Horizontal synchronization signal generation reference timing" line.long 0x04 "TCON_STVA1,TCON Vertical Timing Setting Register A1" hexmask.long.word 0x04 16.--26. 1. " VS ,Vertical synchronization signal STVA1 first change timing" hexmask.long.word 0x04 0.--10. 1. " VW ,Vertical synchronization signal STVA1 second change timing" line.long 0x08 "TCON_STVA2,TCON Vertical Timing Setting Register A2" bitfld.long 0x08 4. " INV ,Vertical synchronization signal STVA2 polarity inversion control" "Not inverted,Inverted" bitfld.long 0x08 0.--2. " SEL ,Output signal select control for VSOUT/VEOUT pin" "STVA,STVB,STHA,STHB,,,,DE" group.long 0x1410++0x0F line.long 0x00 "TCON_STVB1,TCON Vertical Timing Setting Register B1" hexmask.long.word 0x00 16.--26. 1. " VS ,Vertical synchronization signal STVB1 first change timing" hexmask.long.word 0x00 0.--10. 1. " VW ,Vertical synchronization signal STVB1 second change timing" line.long 0x04 "TCON_STVB2,TCON Vertical Timing Setting Register B2" hexmask.long.word 0x04 16.--26. 1. " VS ,Vertical synchronization signal STVB2 first change timing" hexmask.long.word 0x04 0.--10. 1. " VW ,Vertical synchronization signal STVB2 second change timing" line.long 0x08 "TCON_STHA1,TCON Horizontal Timing Setting Register STH1" hexmask.long.word 0x08 16.--26. 1. " HS ,Horizontal synchronization signal STHA1 first change timing" hexmask.long.word 0x08 0.--10. 1. " HW ,Horizontal synchronization signal STHA1 second change timing" line.long 0x0C "TCON_STHA2,TCON Horizontal Timing Setting Register STH2" bitfld.long 0x0C 8. " HSSEL ,Horizontal synchronization signal STHA2 reference timing control" "HSIN,TCON_TIM.OFFSET" bitfld.long 0x0C 4. " INV ,Horizontal synchronization signal STHA2 polarity inversion control" "Not inverted,Inverted" bitfld.long 0x0C 0.--2. " SEL ,Output signal select control for LCD_TCON2/LCD_TCON3 pin" "STVA,STVB,STHA,STHB,,,,DE" group.long 0x1420++0x0B line.long 0x00 "TCON_STHB1,TCON Horizontal Timing Setting Register STB1" hexmask.long.word 0x00 16.--26. 1. " HS ,Horizontal synchronization signal STHB1 first change timing" hexmask.long.word 0x00 0.--10. 1. " HW ,Horizontal synchronization signal STHB1 second change timing" line.long 0x04 "TCON_STHB2,TCON Horizontal Timing Setting Register STB2" bitfld.long 0x04 8. " HSSEL ,Horizontal synchronization signal STHB2 reference timing control" "HSIN,TCON_TIM.OFFSET" bitfld.long 0x04 4. " INV ,Horizontal synchronization signal STHB2 polarity inversion control" "Not inverted,Inverted" bitfld.long 0x04 0.--2. " SEL ,Output signal select control for LCD_TCON2/LCD_TCON3 pin" "STVA,STVB,STHA,STHB,,,,DE" line.long 0x08 "TCON_DE,TCON Data Enable Polarity Setting Register" bitfld.long 0x08 0. " INV ,Data enable signal DE polarity inversion control" "Not inverted,Inverted" tree.end tree "System And Panel Control" group.long 0x1440++0x0B line.long 0x00 "SYSCNT_DTCTEN,System Control Block State Detection Control Register" bitfld.long 0x00 2. " L2UNDFDTC ,Graphics 2 underflow detection control" "Disabled,Enabled" bitfld.long 0x00 1. " L1UNDFDTC ,Graphics 1 underflow detection control" "Disabled,Enabled" bitfld.long 0x00 0. " VPOSDTC ,Specified line detection control" "Disabled,Enabled" line.long 0x04 "SYSCNT_INTEN,System Control Block Interrupt Request Enable Control Register" bitfld.long 0x04 2. " L2UNDFINTEN ,Interrupt request signal GLCDC_L2UNDF enable control" "Disabled,Enabled" bitfld.long 0x04 1. " L1UNDFINTEN ,Interrupt request signal GLCDC_L1UNDF enable control" "Disabled,Enabled" bitfld.long 0x04 0. " VPOSINTEN ,Interrupt request signal GLCDC_VPOS enable control" "Disabled,Enabled" line.long 0x08 "SYSCNT_STCLR,System Control Block Status Clear Register" bitfld.long 0x08 2. " L2UNDFCLR ,Graphics 2 underflow detection flag clear" "Not cleared,Cleared" bitfld.long 0x08 1. " L1UNDFCLR ,Graphics 1 underflow detection flag clear" "Not cleared,Cleared" bitfld.long 0x08 0. " VPOSCLR ,Graphics 2 specified line detection flag clear" "Not cleared,Cleared" rgroup.long 0x144C++0x03 line.long 0x00 "SYSCNT_STMON,System Control Block Status Monitor Register" bitfld.long 0x00 2. " L2UNDF ,Graphics 2 underflow detection flag" "No underflow,Underflow" bitfld.long 0x00 1. " L1UNDF ,Graphics 1 underflow detection flag" "No underflow,Underflow" bitfld.long 0x00 0. " VPOS ,Graphics 2 specified line detection flag" "Not detected,Detected" if (((per.l(ad:0x400E0000+0x1450))&0x40)==0x40) group.long 0x1450++0x03 line.long 0x00 "SYSCNT_PANEL_CLK,System Control Block Version and Panel Clock Control Register" hexmask.long.word 0x00 16.--31. 1. " VER ,Version information" rbitfld.long 0x00 12. " PIXSEL ,Pixel clock select control" "Parallel RGB,Serial RGB" rbitfld.long 0x00 8. " CLKSEL ,Panel clock supply source control" "External clock,PLL output" bitfld.long 0x00 6. " CLKEN ,Panel clock output enable control" "Disabled,Enabled" newline rbitfld.long 0x00 0.--5. " DCDR ,Clock division ratio setting control" "1/2,1/1,1/2,1/3,1/4,1/5,1/6,1/7,1/8,1/9,1/12,1/16,1/24,1/32,?..." else group.long 0x1450++0x03 line.long 0x00 "SYSCNT_PANEL_CLK,System Control Block Version and Panel Clock Control Register" hexmask.long.word 0x00 16.--31. 1. " VER ,Version information" bitfld.long 0x00 12. " PIXSEL ,Pixel clock select control" "Parallel RGB,Serial RGB" bitfld.long 0x00 8. " CLKSEL ,Panel clock supply source control" "External clock,PLL output" bitfld.long 0x00 6. " CLKEN ,Panel clock output enable control" "Disabled,Enabled" newline bitfld.long 0x00 0.--5. " DCDR ,Clock division ratio setting control" "1/2,1/1,1/2,1/3,1/4,1/5,1/6,1/7,1/8,1/9,1/12,1/16,1/24,1/32,?..." endif tree.end width 0x0B tree.end endif textline " "