; -------------------------------------------------------------------------------- ; @Title: XSCALE IXP2325 on chip peripherals ; @Props: ; @Author: - ; @Changelog: ; @Manufacturer: ; @Doc: ; @Core: ; @Chip: ; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: peri2325.per 15985 2023-04-17 12:52:33Z bschroefel $ config 16. 8. width 8. ; -------------------------------------------------------------------------------- ; *** Coprocessors *** ; -------------------------------------------------------------------------------- ;begin include file xscale/cp15-manzano.ph ;parameters: ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; -------------------------------------------------------------------------------- tree "CP15" ; -------------------------------------------------------------------------------- ; *** Intel IXP2350 *** ; -------------------------------------------------------------------------------- if (d.l(c15:0x0)&0xffffe3f0)==0x69056200 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x0 4.--4. "ProdNum ,Product Number" "IXP2350,IXP2350" bitfld.long 0x0 0.--3. " ProdRev ,Product Revision" "A,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res" ; -------------------------------------------------------------------------------- ; *** other Intel XScale Manzano Core *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69056000 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--18. " Arch ,Architecture Version" "res,V4,V4T,V5,V5T,V5TE,res,res" textline " " bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number" hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffff0000)==0x69050000 group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" bitfld.long 0x0 24.--24. "Trademark ,Implementation Trademark" "Intel,Intel" bitfld.long 0x0 16.--23. " Arch ,Architecture Version" ",V4,V4T,V5,V5T,V5TE,?..." textline " " bitfld.long 0x0 13.--15. "CoreGen ,Core Generation" "0,1,2,Manzano,4,5,6,7" bitfld.long 0x0 10.--12. " CoreRev ,Core Revision" "1,2,3,4,5,6,7,8" textline " " hexmask.long 0x0 4.--9. 1. "ProdNum ,Product Number" hexmask.long 0x0 0.--3. 1. " ProdRev ,Product Revision" ; -------------------------------------------------------------------------------- ; *** any else *** ; -------------------------------------------------------------------------------- else group c15:0x0--0x0 line.long 0x0 "ID,ID Register (read only)" ; 0x41 = ARM, 0x44 = Digital, 0x69 = Intel hexmask.long 0x0 24.--31. 1. "Implementor ,Implementation Trademark" hexmask.long 0x0 20.--23. 1. " Variant ,Implementation defined variant number" textline " " hexmask.long 0x0 16.--19. 1. "Architecture ,Architecture Version Code" hexmask.long 0x0 13.--15. 1. " Primary part number ,Core Generation" textline " " hexmask.long 0x0 0.--3. 1. "Revision ,Product Revision" endif ; -------------------------------------------------------------------------------- group c15:0x100--0x100 line.long 0x0 "L1TYPE,L1 Cache Type Register" bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes" textline " " bitfld.long 0x0 18.--20. "DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k" bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16" textline " " bitfld.long 0x0 6.--8. "ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k" bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16" group c15:0x1000--0x1000 line.long 0x0 "L2ID,L2 System ID" hexmask.long 0x0 24.--31. 1. "Trademark ,Implementation Trademark" group c15:0x1100--0x1100 line.long 0x0 "L2TYPE,L2 Cache Type Register" bitfld.long 0x0 25.--28. "CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 20.--23. " Way Size ,L2 Unified Cache Way Size" "res,res,32k,64k,?..." bitfld.long 0x0 15.--19. " Associativity ,L2 Unified Cache Associativity" "not present,res,res,res,res,res,res,res,8-way,?..." bitfld.long 0x0 12.--13. " Line Length ,L2 Unified Cache Line Length" "32b,res,res,res" textline " " bitfld.long 0x0 8.--11. "Way Size ,L2 Unified Cache Way Size" "res,res,32k,64k,?..." bitfld.long 0x0 3.--7. " Associativity ,L2 Unified Cache Associativity" "not present,res,res,res,res,res,res,res,8-way,?..." bitfld.long 0x0 0.--1. " Line Length ,L2 Unified Cache Line Length" "32b,res,res,res" group c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 26. "L2 ,L2 Unified Cache Enable" "disable,enable" bitfld.long 0x0 13. " V ,Exception Vector Relocation" "0x00000000,0xffff0000" bitfld.long 0x0 12. " I ,Instruction Cache" "disable,enable" bitfld.long 0x0 11. " Z ,Branch Target Buffer" "disable,enable" bitfld.long 0x0 9. " R ,ROM Protection" "off,on" bitfld.long 0x0 8. " S ,System Protection" "off,on" textline " " bitfld.long 0x0 7. "B ,Endianism" "little,big" bitfld.long 0x0 2. " C ,Data Cache" "disable,enable" bitfld.long 0x0 1. " A ,Alignment Fault" "disable,enable" bitfld.long 0x0 0. " M ,Memory Management Unit" "disable,enable" group c15:0x101--0x101 line.long 0x0 "AuxCR,Auxiliary Control Register" bitfld.long 0x0 10.--11. "OC ,LLR Outer Cache Attributes" "non-cacheable,write back - write allocate,res,res" bitfld.long 0x0 4.--5. " IC ,LLR Inner (Data) Cache Attributes" "write back - read allocate,write back - read allocate,write through - read allocate,write back - read allocate" bitfld.long 0x0 1. " P ,Page Table Memory Attribute" "0,1" group c15:0x2--0x2 line.long 0x0 "TTB,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 "TTBA ,Translation Table Base Address" bitfld.long 0x0 3.--4. " OC ,Table Walk Outer Cache Attributes" "non-cacheable,res,non-cacheable,write back" bitfld.long 0x0 2. " P ,Table Walk Memory Attribute" "0,1" group c15:0x3--0x3 line.long 0x0 "DAC,Domain Access Control Register" bitfld.long 0x0 30.--31. "D15 ,Domain Access 15" "no access,client,reserved,manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "no access,client,reserved,manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "no access,client,reserved,manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "no access,client,reserved,manager" textline " " bitfld.long 0x0 22.--23. "D11 ,Domain Access 11" "no access,client,reserved,manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "no access,client,reserved,manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "no access,client,reserved,manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "no access,client,reserved,manager" textline " " bitfld.long 0x0 14.--15. "D7 ,Domain Access 7" "no access,client,reserved,manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "no access,client,reserved,manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "no access,client,reserved,manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "no access,client,reserved,manager" textline " " bitfld.long 0x0 6.--7. "D3 ,Domain Access 3" "no access,client,reserved,manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "no access,client,reserved,manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "no access,client,reserved,manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "no access,client,reserved,manager" group c15:0x5--0x5 line.long 0x0 "FSR,Fault Status Register" bitfld.long 0x0 10. "X ,Status Field Extension" "0,1" bitfld.long 0x0 9. " D ,Debug event" "no,yes" bitfld.long 0x0 4.--7. " Domain ,Domain for Data Abort" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " Status ,Status X=0/X=1" "reserved/IMMU Exception,alignment/reserved,reserved,alignment/reserved,reserved/lock abort,transl_sect/reserved,reserved/external,transl_page,reserved/cache parity,domain_sect/reserved,reserved,domain_page,trans_lev_1/reserved,permission_sect/reserved,trans_lev_2/reserved,permission_page" group c15:0x6--0x6 line.long 0x0 "FAR,Fault Address Registerr" group c15:0x29--0x29 line.long 0x0 "DCLR, Data Cache Lock Register" bitfld.long 0x0 0. "L ,Data Cache Lock Register" "no locking,fill with lock" group c15:0xd--0xd line.long 0x0 "PID,Process Identifier" hexmask.long 0x0 25.--31. 0x2000000 "PID ,Process Identifier" group c15:0x8e--0x8e line.long 0x0 "IBCR0,Inctruction Breakpoint Register 0" hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA" bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable" group c15:0x9e--0x9e line.long 0x0 "IBCR1,Inctruction Breakpoint Register 1" hexmask.long 0x0 1.--31. 2. "MVA ,Instruction Breakpoint MVA" bitfld.long 0x0 0. " E ,Breakpoint Enable" "disable,enable" group c15:0x0e--0x0e line.long 0x0 "DBR0,Data Breakpoint Register 0" group c15:0x3e--0x3e line.long 0x0 "DBR1,Data Breakpoint Register 1" group c15:0x4e--0x4e line.long 0x0 "DBCON,Data Breakpoint Configuration Register" bitfld.long 0x0 8. "M ,DBR1 Mode" "Data Breakpoint Address,Data Address Mask" bitfld.long 0x0 2.--3. " E1 ,DBR1 Breakpoint Enable" "disable,enable store,enable load/store,enable load" bitfld.long 0x0 0.--1. " E0 ,DBR0 Enable" "disable,enable store,enable load/store,enable load" ; -------------------------------------------------------------------------------- ; *** Intel 80200 *** ; -------------------------------------------------------------------------------- if (d.l(c15:0x0)&0xffffe3f0)==0x69052000 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel 80321 (IOP321) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 13. "CP13 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 7. " CP7 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 6. " CP6 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel PXA210, PXA250 (Sabinal, Cotulla) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel (Bulverde) *** ; -------------------------------------------------------------------------------- ; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!) elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel (Manitoba) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** Intel IXP2400, IXP2800 (Sausolito, Castine) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffff41a0)==0x69052120 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 7. "CP7 ,Coprocessor Access Rights" "denied,allowed" bitfld.long 0x0 0. " CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; *** includes XScale IXP425, because no product ID is available now *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69054000 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69052000 group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- ; *** any else *** ; -------------------------------------------------------------------------------- else group c15:0x1f--0x1f line.long 0x0 "CPAR,Coprocessor Access Register" bitfld.long 0x0 0. "CP0 ,Coprocessor Access Rights" "denied,allowed" ; -------------------------------------------------------------------------------- endif tree.end ;end include file xscale/cp15-manzano.ph ;begin include file xscale/cp14-manzano.ph ;parameters: ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; -------------------------------------------------------------------------------- tree "CP14" group c14:0x10++0x00 "Performance Monitoring" line.long 4*0x00 "PMNC, Performance Monitor control Register" bitfld.long 4*0x00 20.--27. "EvtCnt1 ,Source of Events that PMN1 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..." bitfld.long 4*0x00 12.--19. " EvtCnt0 ,Source of Events that PMN0 counts" "IC miss ext,IC no inst,Data stall,ITLB miss,DTLB miss,Branch,Branch mispr,Inst exec,DC full every,DC full once,DC acc,DC miss,DC wback,SW changed PC,res,res,BCU requ,BCU que full,BCU que drain,res,unlogged ECC,BCU 1-bit err,RMW,?..." textline " " bitfld.long 4*0x00 10. "CCNT-OV ,Clock Counter Overflow Flag" "no,yes" bitfld.long 4*0x00 9. " PMN1-OV ,Performace Counter 1 Overflow Flag" "no,yes" bitfld.long 4*0x00 8. " PMN0-OV ,Performace Counter 0 Overflow Flag" "no,yes" textline " " bitfld.long 4*0x00 6. "CCNT-IE ,Clock Counter Interrupt" "disable,enable" bitfld.long 4*0x00 5. " PMN1-IE ,Performace Counter 1 Interrupt" "disable,enable" bitfld.long 4*0x00 4. " PMN0-IE ,Performace Counter 0 Interrupt" "disable,enable" textline " " bitfld.long 4*0x00 3. "D ,Clock Count Divider" "1,64" bitfld.long 4*0x00 2. " C ,Clock Counter Reset" "no action,reset to 0" bitfld.long 4*0x00 1. " P ,Performace Counter Reset (both)" "no action,reset to 0" bitfld.long 4*0x00 0. " E ,Enable all 3 Counters" "disable,enable" group c14:0x11++0x00 line.long 4*0x00 "CCNT, 32-bit clock counter" group c14:0x14++0x00 line.long 4*0x00 "INTEN, 32-bit clock counter" group c14:0x15++0x00 line.long 4*0x00 "FLAG, 32-bit clock counter" group c14:0x18++0x00 line.long 4*0x00 "EVTSEL, 32-bit clock counter" group c14:0x20++0x03 line.long 4*0x00 "PMN0, 32-bit event counter" line.long 4*0x01 "PMN1, 32-bit event counter" line.long 4*0x02 "PMN2, 32-bit event counter" line.long 4*0x03 "PMN3, 32-bit event counter" ; -------------------------------------------------------------------------------- ; *** Intel 80200 *** ; -------------------------------------------------------------------------------- if (d.l(c15:0x0)&0xffffe3f0)==0x69052000 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" bitfld.long 4*0x00 0.--3. "CCLKCFG ,Core Clock Configuration" "res,3,4,5,6,7,8,9,res,res,res,res,res,res,res,res" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,IDLE,res,SLEEP" ; -------------------------------------------------------------------------------- ; *** Intel 80321 or IOP321 (Verde) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052020||(d.l(c15:0x0)&0xffffe3f0)==0x69052030 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** Intel PXA210, PXA250 (Sabinal, Cotulla) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100||(d.l(c15:0x0)&0xffffe3f0)==0x69052120 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" bitfld.long 4*0x00 1.--1. "FCS ,Frequency Change Sequence" "do not enter,enter" bitfld.long 4*0x00 0.--0. " TURBO ,Turbo Mode" "exit,enter" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "Run/Turbo,Idle,res,Sleep/Deep Sleep" ; -------------------------------------------------------------------------------- ; *** Intel (Bulverde) *** ; -------------------------------------------------------------------------------- ; wrong Product ID in developer's manual revision 0.1 (ID of PXA250!!!) elif (d.l(c15:0x0)&0xffffe3f0)==0x69052100 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** Intel IXP2400, IXP2800 (Sausolito, Castine) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x69054190||(d.l(c15:0x0)&0xffffe3f0)==0x690541a0 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** Intel (Manitoba) *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe3f0)==0x690540a0 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69052000 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** other Intel XScale V5TE *** ; *** includes XScale IXP425 *** ; -------------------------------------------------------------------------------- elif (d.l(c15:0x0)&0xffffe000)==0x69054000 group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" ; -------------------------------------------------------------------------------- ; *** any other XScale *** ; -------------------------------------------------------------------------------- else group c14:0x06--0x07 "Clock and Power Management" line.long 4*0x00 "CCLKCFG,Core Clock Configuration Register" line.long 4*0x01 "PWRMODE,Power Management Register" bitfld.long 4*0x01 0.--1. "M ,Mode" "ACTIVE,defined by ASSP,defined by ASSP,defined by ASSP" endif group c14:0x08--0x0d "Software Debug" line.long 4*0x02 "DCSR,Debug Control and Status Register" bitfld.long 4*0x02 31. "GE ,Global Enable" "disable,enable" bitfld.long 4*0x02 30. " H ,Halt Mode" "Monitor Mode,Halt Mode" textline " " bitfld.long 4*0x02 23. "TF ,Trap FIQ" "disable,enable" bitfld.long 4*0x02 22. " TI ,Trap IRQ" "disable,enable" bitfld.long 4*0x02 20. " TD ,Trap Data Abort" "disable,enable" textline " " bitfld.long 4*0x02 19. "TA ,Trap Prefetch Abort" "disable,enable" bitfld.long 4*0x02 18. " TS ,Trap Software Interrupt" "disable,enable" bitfld.long 4*0x02 17. " TU ,Trap Undefined Instruction" "disable,enable" bitfld.long 4*0x02 16. " TR ,Trap Reset" "disable,enable" textline " " bitfld.long 4*0x02 5. "SA ,Sticky Abort" "no,yes" bitfld.long 4*0x02 2.--4. " MOE ,Method of Entry" "Reset,Inst Bkpt, Data Bkpt, BKPT Inst, Ext Debug Event, Vector Trap, Trace Buffer full, reserved" bitfld.long 4*0x02 1. " M ,Trace Buffer Mode" "wrap around,fill-once" bitfld.long 4*0x02 0. " E ,Trace Buffer Enable" "no,yes" line.long 4*0x04 "CHKPT0,Checkpoint 0 Register" line.long 4*0x05 "CHKPT1,Checkpoint 1 Register" tree.end ;end include file xscale/cp14-manzano.ph ; -------------------------------------------------------------------------------- ; *** Peripherals on XSI side - address line A32 = 0 *** ; -------------------------------------------------------------------------------- TREE.OPEN "XSI space" ; *** bit description not complete tree "XSI-DDR SDRAM Controller" ;begin include file xscale/ixp23xx-xsiddr.ph ;parameters: 0xffffe500 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; State: ok ; ; IXP23xx-XSIDDR %1 ; ; %1 base address group asd:(0xffffe500+0x00)++0x1B line.long 0x00 "SDIR,SDRAM Initialization Register" bitfld.long 0x00 0.--3. " Cmd ,Special DDR SDRAM Command" "ModRegSet,ModRegSet,PrechgAll,NOP,ExtMRS,ExtMRS,AutoRefresh,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal" line.long 0x04 "SDCR,SDRAM Control Register" hexmask.long 0x04 28.--31. 1. " tRAS ,Active to Precharge duration in MCLK periods" bitfld.long 0x04 24.--26. " tRP ,Precharge Command Period in MCLK periods" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " tRCD ,Active to Read, Active to Write Period in MCLK periods" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 16.--17. " tEDP ,Data Path Latency in MCLK periods" "0,1,2,3" bitfld.long 0x04 12.--13. " tWL ,Write Latency in MCLK periods used by the Memory Controller state machine" "0MCLK,1MCLK,2MCLK,Reserved" bitfld.long 0x04 08.--09. " tCAS ,CAS Latency" "Reserved,2.5MCLK,3MCLK,4MCLK" textline " " bitfld.long 0x04 04.--05. " ODTTVal ,ODT Termination Value" "Disabled,75Ohm,150Ohm,Reserved" bitfld.long 0x04 01. " Width ,Data Bus Width" "64-bit,32-bit" textline " " bitfld.long 0x04 00. " DIMMT ,DIMM Type" "unbuffered,buffered" line.long 0x08 "SDCR1,DDR SDRAM Control Register 1" bitfld.long 0x08 31. " DD ,DQS# Disable" "Enabled,Disabled" bitfld.long 0x08 28.--30. " tRTCMD ,Read-to-Command (non-Write) turnaround period in MCLK periods" "Reserved,Reserved,2MCLK,3MCLK,Reserved,Reserved,Reserved,Reserved" bitfld.long 0x08 24.--27. " tWTCMD ,Write-to-Command (non-Read) turnaround period in MCLK periods" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x08 20.--22. " tRTW ,Read-to-Write turnaround period in MCLK periods" "0,1,2,3,4,5,6,7" bitfld.long 0x08 19. " IB-Port ,IB Port's discard timer mechanism for split completion discard" "2^15 cycles,2^10 cycles" hexmask.long 0x08 12.--16. 1. " tRFC ,Refresh-to-Active and Refresh-to-Refresh period in MCLK periods" bitfld.long 0x08 09.--11. " tWR ,Write Recovery time in MCLK periods" "DDR333,Reserved,DDRII 400,Reserved,Reserved,Reserved,Reserved,Reserved" textline " " hexmask.long 0x08 04.--08. 1. " tRC ,Active-to-Active and Active-to-Refresh period in MCLK periods" bitfld.long 0x08 00.--03. " tWTRD ,Write-to-Read turnaround period in MCLK periods" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" line.long 0x0C "SDBR,SDRAM Base Register" hexmask.long 0x0C 25.--31. 0x2000000 " Addr ,SDRAM Base Address" line.long 0x10 "SBR0,SDRAM Bank 0 Size Register" bitfld.long 0x10 30.--31. " Technology ,Defines the memory subsystem technology" "128/256/512Mbitx8/16 1Gbitx8,256Mbitx16,1Gbitx16,res" hexmask.long 0x10 0.--6. 0x2000000 " Boundary ,Defines the upper limit of SDRAM Bank 0" line.long 0x14 "SBR1,SDRAM Bank 1 Size Register" bitfld.long 0x14 30.--31. " Technology ,Defines the memory subsystem technology" "128/256/512Mbitx8/16 1Gbitx8,256Mbitx16,1Gbitx16,res" hexmask.long 0x14 0.--6. 0x2000000 " Boundary ,Defines the upper limit of SDRAM Bank 1" line.long 0x18 "S32SR,DDR SDRAM 32-bit Region Size Register" hexmask.long 0x18 20.--29. 0x100000 " SIZE ,32-bit Region Size in MByte" group asd:(0xffffe500+0x34)++3 line.long 0x00 "MCISR,Memory Controller Interrupt Status Register" bitfld.long 0x00 4. " IDTE ,IB Discard Timer Expired" "No error,Error" bitfld.long 0x00 3. " ARE ,Address Region Error" "No error,Error" bitfld.long 0x00 2. " ECCN ,ECC Error n" "No error,Error" textline " " bitfld.long 0x00 1. " ECC1 ,ECC Error 1" "No error,Error" bitfld.long 0x00 0. " ECC0 ,ECC Error 0" "No error,Error" group asd:(0xffffe500+0x38)++3 line.long 0x00 "MACR,Memory Arbiter Control Register" bitfld.long 0x00 2.--3. " IBMTQ ,IBMTQ Priority" "0,1,2,3" bitfld.long 0x00 0.--1. " CMTQ ,CMTQ Priority" "0,1,2,3" group asd:(0xffffe500+0x3C)++3 line.long 0x00 "MPTCR,MCU Port Transaction Count Register" bitfld.long 0x00 4.--7. " ITC ,IB Transaction Count" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " CTC ,Core Transaction Count" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group asd:(0xffffe500+0x40)++3 line.long 0x00 "MPCR,MCU Preemption Control Register" bitfld.long 0x00 0.--3. " PDPC ,Preemption Data Phase Count" "Disabled,Reserved,Reserved,Reserved,4Bursts,Reserved,Reserved,Reserved,Reserved,Reserved,?..." group asd:(0xffffe500+0x48)++3 line.long 0x00 "RFR,Refresh Frequency Register" hexmask.long 0x00 0.--12. 1. " RI ,Refresh Interval" group asd:(0xffffe500+0x50)++0x1f line.long 0x00 "SDPR0,SDRAM Page Register 0" hexmask.long 0x00 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x00 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x04 "SDPR1,SDRAM Page Register 1" hexmask.long 0x04 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x04 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x08 "SDPR2,SDRAM Page Register 2" hexmask.long 0x08 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x08 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x0c "SDPR3,SDRAM Page Register 3" hexmask.long 0x0C 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x0C 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x10 "SDPR4,SDRAM Page Register 4" hexmask.long 0x10 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x10 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x14 "SDPR5,SDRAM Page Register 5" hexmask.long 0x14 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x14 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x18 "SDPR6,SDRAM Page Register 6" hexmask.long 0x18 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x18 0. " Page valid ,Indicates if page address is a valid page" "no,yes" line.long 0x1c "SDPR7,SDRAM Page Register 7" hexmask.long 0x1C 12.--31. 0x1000 " Page Addr ,SDRAM Page Address" bitfld.long 0x1C 0. " Page valid ,Indicates if page address is a valid page" "no,yes" group asd:(0xffffe500+0x1C)--(0xffffe500+0x33) "ECC - Error Correction Control Registers" line.long 0x00 "ECCR,ECC Control Register" bitfld.long 0x00 3. " ECC ,ECC Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SBEC ,Single Bit Error Correction" "Disabled,Enabled" bitfld.long 0x00 1. " MBER ,Multi-Bit Error Reporting" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SBER ,Single Bit Error Reporting" "Disabled,Enabled" line.long 0x04 "ELOG0,ECC Log 0 Register" hexmask.long 0x04 16.--23. 1. " EER ,ECC Error Requester" bitfld.long 0x04 12. " R/W ,Read or Write" "Read,Write" bitfld.long 0x04 08. " EETYP ,ECC Error Type" "Single bit,Multi bit" textline " " hexmask.long 0x04 00.--07. 1. " Synd ,Syndrome" line.long 0x08 "ELOG1,ECC Log 1 Register" hexmask.long 0x08 16.--23. 1. " EER ,ECC Error Requester" bitfld.long 0x08 12. " R/W ,Read or Write" "Read,Write" bitfld.long 0x08 08. " EETYP ,ECC Error Type" "Single bit,Multi bit" textline " " hexmask.long 0x08 00.--07. 1. " Synd ,Syndrome" line.long 0x0C "ECAR0,ECC Address 0 Register" hexmask.long 0x0C 2.--31. 0x04 " ErrAddr ,Error Address" line.long 0x10 "ECAR1,ECC Address 1 Register" hexmask.long 0x10 2.--31. 0x04 " ErrAddr ,Error Address" line.long 0x14 "ECTST,ECC Test Register" hexmask.long 0x14 0.--07. 1. " ECCMsk ,8-bit ECC mask" width 8. ;end include file xscale/ixp23xx-xsiddr.ph ;begin include file xscale/ixp23xx-ddrrcmp.ph ;parameters: ASD:0: 0xc800d000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; IXP23xx-DDRRCMP %1 %2 ; ; %1 memory space ; %2 base address tree "DRAM RCOMP and I/O Registers" width 36. group ASD:0:(0xc800d000+0x200)++0x03 line.long 0x00 "D_RCMP_SETUP_CONTROL,DRAM RCOMP Setup and Control Register" bitfld.long 0x00 21. " UPDATE_SEQ_SEL ,Sequence of 1 binary and thermometer cycle" "continuous thermometer cycle,1 binary 7 thermometer cycle" textline " " bitfld.long 0x00 20. " GMII_RCOMP_OVERRIDE_SEL ,GMII RComp and SComp Override Select" "no,yes" bitfld.long 0x00 19. " RCVEN_RCOMP_OVERRIDE_SEL ,RCVEN RComp and SComp Override Select" "no,yes" textline " " bitfld.long 0x00 18. " CS_RCOMP_OVERRIDE_SEL ,CS RComp and SComp Override Select" "no,yes" bitfld.long 0x00 17. " SLEW_INX_SEL ,Slew Index Select" "RCOMP[4:1],RCOMP[3:0]" textline " " bitfld.long 0x00 16. " ZQ_INV_POLARITY ,Inc/Dec Invert: Invert the inc/dec signal from the pads" "no,yes" bitfld.long 0x00 15. " CTL_RCOMP_OVERRIDE_SEL ,CTL RComp and SComp Override Select" "no,yes" textline " " bitfld.long 0x00 14. " CKE_RCOMP_OVERRIDE_SEL ,CKE RComp and SComp Override Select" "no,yes" bitfld.long 0x00 13. " CK_RCOMP_OVERRIDE_SEL ,CK RComp and SComp Override Select" "no,yes" textline " " bitfld.long 0x00 12. " DQ_RCOMP_OVERRIDE_SEL ,DQ RComp and SComp Override Select" "no,yes" bitfld.long 0x00 11. " RCOMP_LOCK_RSH ,RCOMP Lock Bit: Once this bit is set, any further writes to this memory mapped space will be ignored" "no,yes" textline " " bitfld.long 0x00 10. " SLEW_RATE_TABLE ,Slew Rate Tables Programmed" "no,yes" bitfld.long 0x00 5.--07. " CR0_RCOMPPRD[ ,RCOMP Period (RCOMPPRD)" "4194304 cycles,2097152 cycles,1048576 cycles,524288 cycles,262144 cycles,131072 cycles,65536 cycles,Fast RCOMP" textline " " bitfld.long 0x00 4. " BLOCKATPADS ,Block RCOMP Updates (Block at pads)" "Normal Operation,RCOMP_UPDATE/auto pad update" textline " " bitfld.long 0x00 3. " BLOCKATWAIT ,RComp State Machine Disable (Block at WAIT)" "Normal Operation,stall at WAIT" textline " " bitfld.long 0x00 2. " FRCOMP ,Force RCOMP Operation (FRCOMP)" "no,yes" bitfld.long 0x00 1. " NRCOMP_OVER_EN ,RCOMP Override Enable for NMOS" "dis,ena" bitfld.long 0x00 0. " PRCOMP_OVER_EN ,RCOMP Override Enable for PMOS" "dis,ena" group ASD:0:(0xc800d000+0x208)++0x03 line.long 0x00 "D_RCMP_PMOS_MEASURED,D_RCMP_PMOS_MEASURED" bitfld.long 0x00 12. " INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1" hexmask.long 0x00 0.--11. 0x01 " DRPCNTRV ,PMOS RCOMP Measured Value from Eval block" group ASD:0:(0xc800d000+0x210)++0x03 line.long 0x00 "D_RCMP_NMOS_MEASURED,D_RCMP_NMOS_MEASURED" bitfld.long 0x00 12. " INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1" hexmask.long 0x00 0.--11. 0x01 " DRNCNTRV ,NMOS RCOMP Measured Value from Eval block" group ASD:0:(0xc800d000+0x218)++0x03 line.long 0x00 "D_RCMP_PMOS_OVERRIDE,D_RCMP_PMOS_OVERRIDE" hexmask.long 0x00 12.--23. 0x01 " CKE_PRCOMP_OV ,CKE PMOS RCOMP Override Values" hexmask.long 0x00 0.--11. 0x01 " CTL_PRCOMP_OV ,CTL PMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x220)++0x03 line.long 0x00 "D_RCMP_NMOS_OVERRIDE,D_RCMP_NMOS_OVERRIDE" hexmask.long 0x00 12.--23. 0x01 " CKE_NRCOMP_OV ,CKE NMOS RCOMP Override Values" hexmask.long 0x00 0.--11. 0x01 " CTL_NRCOMP_OV ,CTL NMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x228)++0x03 line.long 0x00 "D_RCMP_PMOS_NMOS_SCOMP_OVERRIDE,D_RCMP_PMOS_NMOS_SCOMP_OVERRIDE" hexmask.long 0x00 28.--31. 0x01 " CTL_PSCOMP_OV ,CTL PMOS Slew Override Value" hexmask.long 0x00 24.--27. 0x01 " CTL_NSCOMP_OV ,CTL NMOS Slew Override Value" textline " " hexmask.long 0x00 20.--23. 0x01 " CKE_PSCOMP_OV ,CKE PMOS Slew Override Value" hexmask.long 0x00 16.--19. 0x01 " CKE_NSCOMP_OV ,CKE NMOS Slew Override Value" textline " " hexmask.long 0x00 12.--15. 0x01 " CK_PSCOMP_OV ,CK PMOS Slew Override Value" hexmask.long 0x00 8.--11. 0x01 " CK_NSCOMP_OV ,CK NMOS Slew Override Value" textline " " hexmask.long 0x00 4.--07. 0x01 " DQ_PSCOMP_OV ,DQ PMOS Slew Override Value" hexmask.long 0x00 0.--03. 0x01 " DQ_NSCOMP_OV ,DQ NMOS Slew Override Value" group ASD:0:(0xc800d000+0x230)++0x03 line.long 0x00 "D_RCMP_STRENGTH_SLEW_INDEX_SEL,D_RCMP_STRENGTH_SLEW_INDEX_SEL" bitfld.long 0x00 29. " RCVEN_SLEWCLAMPEN ,RCVEN Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 25.--28. " RCVEN_STRENGTH ,RCVEN Clock Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 24. " CS_SLEWCLAMPEN ,CS Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 20.--23. " CS_STRENGTH ,CS Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 19. " DQ_SLEWCLAMPEN ,DQ Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 15.--18. " DQ_STRENGTH ,DQ Data Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 14. " CK_SLEWCLAMPEN ,CK Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 10.--13. " CK_STRENGTH ,Clock Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 9. " CKE_SLEWCLAMPEN ,CKE Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 5.--08. " CKE_STRENGTH ,CKE Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 4. " CTL_SLEWCLAMPEN ,CTL Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 0.--03. " CTL_STRENGTH ,CTL Strength Control which is used as the multipler factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" group ASD:0:(0xc800d000+0x238)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_OFFSET,D_RCMP_CTL_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CTLRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength" group ASD:0:(0xc800d000+0x240)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_OFFSET,D_RCMP_CTL_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CTLRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength" group ASD:0:(0xc800d000+0x248)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_OFFSET,D_RCMP_CKE_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKERCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the CKE signal group" group ASD:0:(0xc800d000+0x250)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_OFFSET,D_RCMP_CKE_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKERCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the CKE signal group" group ASD:0:(0xc800d000+0x258)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_OFFSET,D_RCMP_CK_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the CK signal group" group ASD:0:(0xc800d000+0x260)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_OFFSET,D_RCMP_CK_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the CK signal group" group ASD:0:(0xc800d000+0x268)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_OFFSET,D_RCMP_DQ_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_DQRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the DQ signal group" group ASD:0:(0xc800d000+0x270)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_OFFSET,D_RCMP_DQ_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_DQRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the DQ signal group" group ASD:0:(0xc800d000+0x278)++0x03 line.long 0x00 "D_RCMP_PMOS_NMOS_VERT_OVERRIDE,D_RCMP_PMOS_NMOS_VERT_OVERRIDE" hexmask.long 0x00 12.--23. 0x01 " CRO_OVERRIDE_N ,NMOS RCOMP Override Value to RCOMP buffer" hexmask.long 0x00 0.--11. 0x01 " CRO_OVERRIDE_P ,PMOS RCOMP Override Value to RCOMP buffer" group ASD:0:(0xc800d000+0x280)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_0,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x288)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_1,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x290)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_2,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x298)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_3,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x2a0)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_0,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x2a8)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_1,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x2b0)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_2,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x2b8)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_3,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:0:(0xc800d000+0x2c0)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_0,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2c8)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_1,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2d0)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_2,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2d8)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_3,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2e0)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_0,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2e8)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_1,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2f0)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_2,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x2f8)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_3,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:0:(0xc800d000+0x300)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_0,D_RCMP_CK_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x308)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_1,D_RCMP_CK_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x310)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_2,D_RCMP_CK_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x318)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_3,D_RCMP_CK_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x320)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_0,D_RCMP_CK_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x328)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_1,D_RCMP_CK_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x330)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_2,D_RCMP_CK_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x338)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_3,D_RCMP_CK_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:0:(0xc800d000+0x340)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_0,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x348)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_1,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x350)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_2,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x358)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_3,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x360)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_0,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x368)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_1,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x370)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_2,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x378)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_3,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:0:(0xc800d000+0x380)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_0,D_RCMP_CS_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x388)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_1,D_RCMP_CS_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x390)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_2,D_RCMP_CS_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x398)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_3,D_RCMP_CS_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x3a0)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_0,D_RCMP_CS_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x3a8)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_1,D_RCMP_CS_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x3b0)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_2,D_RCMP_CS_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x3b8)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_3,D_RCMP_CS_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:0:(0xc800d000+0x3c0)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_0,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3c8)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_1,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3d0)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_2,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3d8)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_3,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3e0)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_0,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3e8)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_1,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3f0)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_2,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x3f8)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_3,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:0:(0xc800d000+0x400)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_0,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x408)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_1,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x410)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_2,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x418)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_3,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x420)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_0,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x428)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_1,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x430)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_2,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x438)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_3,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:0:(0xc800d000+0x440)++0x03 line.long 0x00 "PMOS_RCMP_OVERRIDE_REGISTER_2,PMOS_RCMP_OVERRIDE_REGISTER_2" hexmask.long 0x00 12.--23. 0x01 " DQ_PRCOMP_OV ,DQ Data PMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CK_PRCOMP_OV ,CK PMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x448)++0x03 line.long 0x00 "NMOS_RCMP_OVERRIDE_REGISTER_2,NMOS_RCMP_OVERRIDE_REGISTER_2" hexmask.long 0x00 12.--23. 0x01 " DQ_NRCOMP_OV ,DQ Data NMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CK_NRCOMP_OV ,CK NMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x450)++0x03 line.long 0x00 "PMOS_RCMP_OVERRIDE_REGISTER_3,PMOS_RCMP_OVERRIDE_REGISTER_3" hexmask.long 0x00 12.--23. 0x01 " RCVEN_PRCOMP_OV ,RCVEN PMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CS_PRCOMP_OV ,CS PMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x458)++0x03 line.long 0x00 "NMOS_RCMP_OVERRIDE_REGISTER_3,NMOS_RCMP_OVERRIDE_REGISTER_3" hexmask.long 0x00 12.--23. 0x01 " RCVEN_NRCOMP_OV ,RCVEN NMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CS_NRCOMP_OV ,CS NMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x460)++0x03 line.long 0x00 "PMOS_RCMP_OVERRIDE_REGISTER_4,PMOS_RCMP_OVERRIDE_REGISTER_4" hexmask.long 0x00 0.--5. 0x01 " GMII_PRCOMP_OV ,GMII PMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x468)++0x03 line.long 0x00 "NMOS_RCMP_OVERRIDE_REGISTER_4,NMOS_RCMP_OVERRIDE_REGISTER_4" hexmask.long 0x00 0.--5. 0x01 " GMII_NRCOMP_OV ,GMII NMOS RCOMP Override Value" group ASD:0:(0xc800d000+0x470)++0x03 line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE_2,PMOS_NMOS_SCOMP_OVERRIDE_2" hexmask.long 0x00 20.--23. 0x01 " GMII_PSCOMP_OV ,GMII PMOS Slew Override Value." hexmask.long 0x00 16.--19. 0x01 " GMII_NSCOMP_OV ,GMII NMOS Slew Override Value." textline " " hexmask.long 0x00 12.--15. 0x01 " RCVEN_PSCOMP_OV ,RCVEN PMOS Slew Override Value." hexmask.long 0x00 8.--11. 0x01 " RCVEN_NSCOMP_OV ,RCVEN NMOS Slew Override Value." textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PSCOMP_OV ,CS PMOS Slew Override Value." hexmask.long 0x00 0.--3. 0x01 " CS_NSCOMP_OV ,CS NMOS Slew Override Value." group ASD:0:(0xc800d000+0x478)++0x03 line.long 0x00 "CS_PMOS_PULLUP_OFFSET,CS_PMOS_PULLUP_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CSRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the CS signal group" group ASD:0:(0xc800d000+0x480)++0x03 line.long 0x00 "CS_NMOS_PULLDOWN_OFFSET,CS_NMOS_PULLDOWN_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CSRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the CS signal group" group ASD:0:(0xc800d000+0x488)++0x03 line.long 0x00 "RCVEN_PMOS_PULLUP_OFFSET,RCVEN_PMOS_PULLUP_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_RCVENRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the RCVEN signal group" group ASD:0:(0xc800d000+0x490)++0x03 line.long 0x00 "RCVEN_NMOS_PULLDOWN_OFFSET,RCVEN_NMOS_PULLDOWN_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_RCVENRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the RCVEN signal group" group ASD:0:(0xc800d000+0x498)++0x03 line.long 0x00 "GMII_PMOS_PULLUP_OFFSET,GMII_PMOS_PULLUP_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_GMIIRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the GMII signal group" group ASD:0:(0xc800d000+0x4a0)++0x03 line.long 0x00 "GMII_NMOS_PULLDOWN_OFFSET,GMII_NMOS_PULLDOWN_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_GMIIRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the GMII signal group" group ASD:0:(0xc800d000+0x4a8)++0x03 line.long 0x00 "STRENGTH_SLEW_INDEX_SEL_2,STRENGTH_SLEW_INDEX_SEL_2" bitfld.long 0x00 4. " GMII_SLEWCLAMPEN ,Control Slew Rate Index RCOMP Clamp Enable" "dis,ena" hexmask.long 0x00 0.--3. 0x01 " GMII_STRENGTH ,CTL Strength Control which is used as the multiplier factor for raw RCOMP setting" group ASD:0:(0xc800d000+0x600)++0x03 line.long 0x00 "ACIO Setup and Control Register,ACIO Setup and Control Register" bitfld.long 0x00 10.--11. " OPHASSEL ,Course adjustment on RCVEN delay" "0.25 DRAM clk,0.50 DRAM clk,0.75 DRAM clk,1.00 DRAM clk" group ASD:0:(0xc800d000+0x650)++0x03 line.long 0x00 "DDR_ACIO_RX_DLL Settings,DDR_ACIO_RX_DLL Settings" hexmask.long 0x00 8.--12. 0x01 " RECEIVE DLL SETTING 2 ,Select the RX DLL tap for Slave 2 DLL" hexmask.long 0x00 0.--04. 0x01 " RECEIVE DLL SETTING 1 ,Select the RX DLL tap for Slave 1 DLL" group ASD:0:(0xc800d000+0x688)++0x03 line.long 0x00 "DDR_RX_Deskew,DDR_RX_Deskew" hexmask.long 0x00 0.--04. 0x01 " DLL_FREQ_SEL ,Sets the DLL to match the freq of DRR unit is programmed to run" group ASD:0:(0xc800d000+0x690)++0x03 line.long 0x00 "DDR_RDDLYSEL_RECVEN,DDR_RDDLYSEL_RECVEN" hexmask.long 0x00 0.--04. 0x01 " DLL_Tap_SEL_Recven ,Select the DLL Tap used for delaying the Rcvenin strobe. A related CKR is the DRR_Rx_DLL CKR" tree.end width 8. ;end include file xscale/ixp23xx-ddrrcmp.ph tree.end ;begin include file xscale/ixp23xx-msgsram.ph ;parameters: 0x88600000 ; -------------------------------------------------------------------------------- ; IXP2350, IXP2325 ; State: ok ; ; IXP23xx-MSGSRAM %1 ; ; %1 base Address ; ; -------------------------------------------------------------------------------- tree "MSG-SRAM" ; -------------------------------------------------------------------------------- width 24. group asd:(0x88600000+0x00)++0x03 line.long 0x00 "SRAM_CONTROL,SRAM Controller configuration" bitfld.long 0x00 17. "QDR_SWIZZLE ,Swizzel the QDR read data bits" "no change,swap" bitfld.long 0x00 14. " QC_IGN_EOP ,Queue Controller Ignore EOP" "always,EOP set" textline " " bitfld.long 0x00 13. " QC_IGN_SEG_CNT ,Queue Controller Ignore Segment Count" "always,if zero" bitfld.long 0x00 10.--12. " PIPELINE ,Indicates number of external pipeline delays" "0 cyc,1 cyc,2 cyc,3 cyc,4 cyc,5 cyc,6 cyc,7 cyc" textline " " bitfld.long 0x00 7.--9. " SRAM_SIZE ,Indicates the Size of each SRAM chip" "512KB x 18,1MB x 18,2MB x 18,4MB x 18,8MB x 18,16MB x 18,32MB x 18,ext port ena" textline " " bitfld.long 0x00 5. " PORT_CTL address[23:22] ,Usage of Port Controller address [23:22]" "address,R/WPE_L[2]" textline " " bitfld.long 0x00 4. " PORT_CTL address[21:20] ,Usage of Port Controller address [21:20]" "address,R/WPE_L[3]" bitfld.long 0x00 3. " PAR_EN ,Parity" "no,yes" group asd:(0x88600000+0x04)++0x03 line.long 0x00 "SRAM_PARITY_STATUS_1,Parity Control and recording of last faulty Address" bitfld.long 0x00 31. "WW_PAR byte3 ,Write Wrong Parity for byte 3" "correct,incorrect" bitfld.long 0x00 30. " byte2 ,Write Wrong Parity for byte 2" "correct,incorrect" textline " " bitfld.long 0x00 29. " WW_PAR byte1 ,Write Wrong Parity for byte 1" "correct,incorrect" bitfld.long 0x00 28. " byte0 ,Write Wrong Parity for byte 0" "correct,incorrect" textline " " hexmask.long 0x00 0.--23. 0x01 " ADDRRESS ,Records the address which has a perity error" ; -------------------------------------------------------------------------------- ; *** Error by Microengine *** ; -------------------------------------------------------------------------------- if (d.l(asd:(0x88600000+0x08))&0x00010000)==0x00010000 group asd:(0x88600000+0x08)++0x03 line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error" bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes" bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,MSG_XSI" bitfld.long 0x00 17.--19. " THD ,Indicates which Thread was the originator" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " SRC ,Source" "Bridge/PCI/NPE,ME/MSG_XSI" textline " " bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes" ; -------------------------------------------------------------------------------- ; *** Error by XScale/PCI *** ; -------------------------------------------------------------------------------- else group asd:(0x88600000+0x08)++0x03 line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error" bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes" bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "res,res,res,res,res,res,res,Bridge,res,PCI,res,res,res,res,res,res,res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 17.--19. " THD ,Indicates which Source was the originator" "XScale,PCI,res,res,res,res,res,res" bitfld.long 0x00 16. " SRC ,Source" "Bridge/PCI/NPE,ME/MSG_XSI" textline " " bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes" endif group asd:(0x88600000+0x0c)++0x03 line.long 0x00 "MSG_STAT,SRAM Controller configuration" bitfld.long 0x00 11. "Sticky Overflow ,A ring overflow has occured" "no,yes" bitfld.long 0x00 10. " Parity Error ,Parity Error has occured" "no,yes" bitfld.long 0x00 9. " Ring overflow Error ,Ring overflow Error has occured" "no,yes" textline " " bitfld.long 0x00 8. " Ring underflow Error ,Ring underflow Error has occured" "no,yes" hexmask.long 0x00 0.--5. 0x01 " Ring ID ,Indicates the number of ring whose pit failed" group asd:(0x88600000+0x10)++0x03 line.long 0x00 "MSG_RET_DATA,Data returned from last atomic/ring command" hexmask.long 0x00 0.--31. 0x01 "Data Return ,Data returned from last atomic/ring command" group asd:(0x88600000+0x14)++0x03 line.long 0x00 "MSG_OVFL_INT_ENB,Ring Overflow Interrupt Register" bitfld.long 0x00 0. "Int_en ,Ring overflow interrupt enable" "dis,ena" width 8. tree.end ;end include file xscale/ixp23xx-msgsram.ph ; *** will need some adaptions ;begin include file xscale/ixp23xx-ahb.ph ;parameters: 0xc4000000 ; -------------------------------------------------------------------------------- ; IXP2350, IXP2325 ; ; IXP23XX-AHB %1 ; ; %1 Base Address tree "AHB Expansion Bus" width 16. group asd:(0xc4000000+0x0)++0x3 line.long 0x00 " EXP_TIMING_CS0, Timing and Control Register for Chip Select 0" bitfld.long 0x0 31. " CS0_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x4)++0x3 line.long 0x00 " EXP_TIMING_CS1,Timing and Control Register for Chip Select 1" bitfld.long 0x0 31. " CS1_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x8)++0x3 line.long 0x00 " EXP_TIMING_CS2,Timing and Control Register for Chip Select 2" bitfld.long 0x0 31. " CS2_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0xc)++0x3 line.long 0x00 " EXP_TIMING_CS3,Timing and Control Register for Chip Select 3" bitfld.long 0x0 31. " CS3_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x10)++0x3 line.long 0x00 " EXP_TIMING_CS4,Timing and Control Register for Chip Select 4" bitfld.long 0x0 31. " CS4_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x14)++0x3 line.long 0x00 " EXP_TIMING_CS5,Timing and Control Register for Chip Select 5" bitfld.long 0x0 31. " CS5_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x18)++0x3 line.long 0x00 " EXP_TIMING_CS6 ,iming and Control Register for Chip Select 6" bitfld.long 0x0 31. " CS6_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x1c)++0x3 line.long 0x00 " EXP_TIMING_CS7,Timing and Control Register for Chip Select 7" bitfld.long 0x0 31. " CS7_EN ,Chip selection enable" "dis,ena" bitfld.long 0x0 28.--29. " T1 ,Address timing" "normal,Ext_by_1 clocks,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 26.--27. " T2 ,Setup / Chip Select Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" textline " " bitfld.long 0x0 22.--25. " T3 ,Strobe Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" bitfld.long 0x0 20.--21. " T4 ,Hold Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks" bitfld.long 0x0 16.--19. " T5 ,Recovery Timing" "normal,Ext_by_1 clock,Ext_by_2 clocks,Ext_by_3 clocks,Ext_by-4 clocks,Ext_by_5 clocks,Ext_by_6 clocks,Ext_by_7 clocks,Ext_by_8 clocks,Ext_by_9 clocks,Ext_by_10 clocks,Ext_by_11 clocks,Ext_by_12 clocks,Ext_by_13 clocks,Ext_by_14 clocks,Ext_by_15 clocks" textline " " bitfld.long 0x0 14.--15. " CYC_TYPE ,Cycle type" "Intel cycles,Motorola cycles,HPI cycles,res" bitfld.long 0x0 10.--13. " CNFG[3:0] ,Device Configuration Size=2 power of (9+CNFG[3:0])" "512 Bytes,1 Kbytes,2 Kbytes,4 Kbytes,8 Kbytes,16 Kbytes,32 Kbytes,64 Kbytes,128 Kbytes,256 Kbytes,512 Kbytes,1 Mbytes,2 Mbytes,4 Mbytes,8 Mbytes,16 Mbytes" bitfld.long 0x0 6. " BYTE_RD16 ,Byte read access to Half Word device" "dis,ena" textline " " bitfld.long 0x0 5. " HRDY_POL ,HPI HRDY polarity (reserved for exp_cs_n[7:4] only)" "Pol_low true,Pol_high true" bitfld.long 0x0 4. " MUX_EN ,Multiplexed enable" "dis,ena" bitfld.long 0x0 3. " SPLT_EN ,Split trandfers enable" "dis,ena" textline " " bitfld.long 0x0 1. " WR_EN ,Write to CS region enabled" "dis,ena" bitfld.long 0x0 0. " BYTE_EN ,Expansion bus uses 8 or 16 bit wide data bus" "16-bit data bus,8-bit data bus" group asd:(0xc4000000+0x20)++0x3 line.long 0x00 " EXP_CNFG0,General Purpose Configuration Register 0" bitfld.long 0x0 31. " MEM_MAP ,Location of EXPBus in memory map space" "normal mode,boot mode" bitfld.long 0x0 22.--23. " XSCALE_SPEED_SEL[1:0] ,XScale Core Speed setting" "0,1,2,3" bitfld.long 0x0 21. " XSCALE_SPEEDSEL_EN ,Enable for XScale Core Speed setting" "dis,ena" textline " " bitfld.long 0x0 19.--20. " CPP_SPEED_SEL[1:0] ,CPP Core Speed setting" "0,1,2,3" bitfld.long 0x0 18. " CPP_SPEEDSEL_EN ,Enable for CPP Core Speed setting" "dis,ena" bitfld.long 0x0 16.--17. " CFG_PCI_SWIN ,PCI SRAM BAR Window Size" "256 MB,128 MB,64 MB,32 MB" textline " " bitfld.long 0x0 14.--15. " CFG_PCI_DWIN ,PCI DRAM BAR Window Size" "1024 MB,512 MB,256 MB,128 MB" bitfld.long 0x0 13. " PCI33_MODE ,Sets the clock speed of the PCI Interface" "66 MHz,33 MHz" bitfld.long 0x0 12. " QDR_SPEED_SEL ,Sets the clock speed of the QDR DRAM Interface" "150 MHz,200 MHz" textline " " bitfld.long 0x0 5. " CPP_DDR_SPEED_SEL ,Sets the ratio between CPP_CLK and D0_CLK (CPP DDR CLK)" "2:1,3:1" bitfld.long 0x0 4. " XSI_DDR_NOT_PRES ,XSI-DDR not present" "present,not present" textline " " bitfld.long 0x0 3. " CFG_PROM_BOOT ,Specifies if boot flash is present" "not present,present" bitfld.long 0x0 2. " PCI_ARB ,Determines if the PCI Arbiter is provided internally from the chip or from an external arbiter" "external,internal" textline " " bitfld.long 0x0 1. " PCI_HOST ,Configures the PCC Controller as PCI Bus Host" "external host,IXP23xx host" bitfld.long 0x0 0. " 8/16 FLASH ,Specifies the data bus width of the FLASH memory device" "16-bit,8-bit" group asd:(0xc4000000+0x24)++0x3 line.long 0x00 " EXP_CNFG1,General Purpose Configuration Register 1" bitfld.long 0x0 8. " BYTE_SWAP_EN ,Sets byte swapping at the Core Gasket" "dis,ena" bitfld.long 0x0 1. " SW_INT1 ,Interrupt enabled" "dis,ena" bitfld.long 0x0 0. " SW_INT0 ,Interrupt enabled" "dis,ena" group asd:(0xc4000000+0x28)++0x3 line.long 0x00 " EXP_UNIT_FUSE,Unit Fuse Register" bitfld.long 0x0 9. " DDR_32 ,DDR 32 bit port enable" "dis,ena" bitfld.long 0x0 8. " QDR_CTRL ,QDR_CTRL enable" "dis,ena" bitfld.long 0x0 7. " DDR_64 ,DDR 64 bit port enable" "dis,ena" bitfld.long 0x0 6. " DDR_CPP_CTRLR ,DDR-CPP Ctrlr enable" "dis,ena" bitfld.long 0x0 5. " GBE1 ,GBE1 enable" "dis,ena" textline " " bitfld.long 0x0 4. " NPE0 ,NPE0 enable" "dis,ena" bitfld.long 0x0 3. " ME3 ,ME3 enable" "dis,ena" bitfld.long 0x0 2. " ME2 ,ME2 enable" "dis,ena" bitfld.long 0x0 1. " ME1 ,ME1 enable" "dis,ena" bitfld.long 0x0 0. " ME0 ,ME0 enable" "dis,ena" group asd:(0xc4000000+0x30)++0x3 line.long 0x00 " MSF_MUX_SEL,MSF MUX Select Register" bitfld.long 0x0 29. " GIGE_PAUSE_SEL[5] ,Gige 1" "XON,XOFF" bitfld.long 0x0 28. " GIGE_PAUSE_SEL[4] ,Frame Pause Gige 1" "0,1" textline " " bitfld.long 0x0 27. " GIGE_PAUSE_SEL[3] ,Gige 0" "XON,XOFF" bitfld.long 0x0 26. " GIGE_PAUSE_SEL[2] ,Frame Pause Gige 0" "0,1" textline " " bitfld.long 0x0 25. " GIGE_PAUSE_SEL[1] ,ahge1_ext_pause_en output" "ahge1_ext_pause_en equals gige_pause_sel[4],ahge1_ext_pause_en equals pad_gpio[10]" textline " " bitfld.long 0x0 25. " ,ahge1_ext_pause_xon_xoff output" "ahge1_ext_pause_xon_xoff equals gige_pause_sel[5],ahge1_ext_pause_xon_xoff equals pad_gpio[11]" textline " " bitfld.long 0x0 24. " GIGE_PAUSE_SEL[0] ,ahge1_ext_pause_en output" "ahge1_ext_pause_en equals gige_pause_sel[2],ahge1_ext_pause_en equals pad_gpio[8]" textline " " bitfld.long 0x0 24. " ,ahge1_ext_pause_xon_xoff output" "ahge1_ext_pause_xon_xoff equals gige_pause_sel[3],ahge1_ext_pause_xon_xoff equals pad_gpio[9]" textline " " bitfld.long 0x0 23. " XSI_DDR_32_64 ,XSI-DDR Pad selection" "XSI-DDR 32-bit/CPP-DDR 64-bit,XSI-DDR 64-bit/CPP-DDR unavailable" textline " " bitfld.long 0x00 22. " MSF_PAD_SEL[4] ,Mode of ports on the MSF_PAD" "high Z,normal" bitfld.long 0x00 21. " MSF_PAD_SEL[3] ,Signals muxed to MSF/UTOPIA shared chip pins" "UTOPIA output,MSF channel-0/channel-1" textline " " bitfld.long 0x00 20. " MSF_PAD_SEL[2] ,Signals muxed to MSF/Eth-1 shared chip pins" "Ethernet-0 output,MSF channel-2/channel-3" bitfld.long 0x00 19. " MSF_PAD_SEL[1] ,Signals muxed to MSF/HSS shared chip pins" "HSS output,MSF channel-2/channel-3" textline " " bitfld.long 0x00 18. " MSF_PAD_SEL[0] ,Signals muxed to MSF/GPIO shared chip pins" "GPIO output,MSF channel-2/channel-3" textline " " bitfld.long 0x00 16.--17. " Tx Mux3 ,Msf Channel 3 transmits destination" "Gige 1,Gige 0,Npe,Msf Pad Channel 3" bitfld.long 0x00 14.--15. " Tx Mux2 ,Msf Channel 2 transmits destination" "Gige 1,Gige 0,Npe,Msf Pad Channel 2" textline " " bitfld.long 0x00 12.--13. " Tx Mux1 ,Msf Channel 1 transmits destination" "Gige 1,Gige 0,Npe,Msf Pad Channel 1" bitfld.long 0x00 10.--11. " Tx Mux0 ,Msf Channel 0 transmits destination" "Gige 1,Gige 0,Npe,Msf Pad Channel 0" textline " " bitfld.long 0x00 8.--09. " Rx Mux3 ,Msf Channel 3 transmits source" "Gige 1,Gige 0,Npe,Msf Pad Channel 3" bitfld.long 0x00 6.--07. " Rx Mux2 ,Msf Channel 2 transmits source" "Gige 1,Gige 0,Npe,Msf Pad Channel 2" textline " " bitfld.long 0x00 4.--05. " Rx Mux1 ,Msf Channel 1 transmits source" "Gige 1,Gige 0,Npe,Msf Pad Channel 1" bitfld.long 0x00 2.--03. " Rx Mux0 ,Msf Channel 0 transmits source" "Gige 1,Gige 0,Npe,Msf Pad Channel 0" textline " " bitfld.long 0x00 1.--01. " Clk Mux[1] ,Msf (Rx Tx) Channel 2/3 clock" "pad generated clocks,cru generated clock" bitfld.long 0x00 0.--00. " Clk Mux[0] ,Msf (Rx Tx) Channel 0/1 clock" "pad generated clocks,cru generated clock" group asd:(0xc4000000+0x34)++0x3 line.long 0x00 " CFGFUSE,Configuration Fuse Register" bitfld.long 0x00 14. " QDR ,Status of the QDR Config Fuse" "fused out,active" bitfld.long 0x00 13. " GBE1 ,Status of the GBE1 Config Fuse" "fused out,active" bitfld.long 0x00 12. " NPE0 ,Status of the NPE0 Config Fuse" "fused out,active" textline " " bitfld.long 0x00 11. " ME3 ,Status of the ME3 Config Fuse" "fused out,active" bitfld.long 0x00 10. " ME2 ,Status of the ME2 Config Fuse" "fused out,active" bitfld.long 0x00 9. " ME1 ,Status of the ME1 Config Fuse" "fused out,active" bitfld.long 0x00 8. " ME0 ,Status of the ME0 Config Fuse" "fused out,active" textline " " bitfld.long 0x00 7. " DDR32 ,Status of the DDR32 Config Fuse" "fused out,active" bitfld.long 0x00 6. " DDR64 ,Status of the DDR64 Config Fuse" "fused out,active" bitfld.long 0x00 5. " CPP-DDR ,Status of the CPP-DDR Config Fuse" "fused out,active" textline " " bitfld.long 0x00 4. " MSF CLAV NUM ,Fuse to select 4 Clav/ Enb mode (supporting 64 ports) and 8 Clav/Enb mode 9 (supporting 128 ports) when MSF media is operating in the MPHY-128 mode" "8 Clav/Enb mode (128 ports),4 Clav/Enb mode (64 ports)" textline " " bitfld.long 0x00 2.--03. " CPP ,cpp clock" "450 MHz,300 MHz,unused,150 MHz" bitfld.long 0x00 0.--01. " XSC ,xsc clock" "1200 MHz,900 MHz,unused,600 MHz" width 8. tree.end ;end include file xscale/ixp23xx-ahb.ph ; *** will need some adaptions ;begin include file xscale/ixp23xx-uart.ph ;parameters: 0xc8000000 "UART1" ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; UART %1 %2 ; ; %1 Base Address ; %2 UART Name ; -------------------------------------------------------------------------------- tree "UART1" ; -------------------------------------------------------------------------------- width 12. ; -------------------------------------------------------------------------------- ; *** DLAB == 1 *** ; -------------------------------------------------------------------------------- if (d.l(asd:0xc8000000+0x0c)&0x80)==0x80 group asd:(0xc8000000+0x00)++0x03 line.long 0x00 "DLL,Divisor Latch Low Register" hexmask.long 0x00 0.--7. 0x01 "DLL ,Divisor Latch Register Low" group asd:(0xc8000000+0x04)++0x03 line.long 0x00 "DLH,Divisor Latch High Register" hexmask.long 0x00 0.--7. 0x100 "DLH ,Divisor Latch Register High" ; -------------------------------------------------------------------------------- ; *** DLAB == 0 *** ; -------------------------------------------------------------------------------- else rgroup asd:(0xc8000000+0x08)++0x03 hide.long -8. "RBR,Receive Buffer Register" IN wgroup asd:(0xc8000000+0x00)++0x03 line.long 0x00 "THR,Transmit Holding Register" group asd:(0xc8000000+0x04)++0x03 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 7.--7. "DMAE ,DMA Requests Enable" "dis,ena" bitfld.long 0x00 6.--6. " UUE ,UART Unit Enable" "dis,ena" bitfld.long 0x00 5.--5. " NRZE ,NRZ coding Enable" "dis,ena" bitfld.long 0x00 4.--4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena" bitfld.long 0x00 3.--3. " MIE ,Modem Interrupt Enable" "dis,ena" bitfld.long 0x00 2.--2. " RLSE ,Receiver Line Status Interrupt Enable" "dis,ena" bitfld.long 0x00 1.--1. " TIE ,Tranmit Data Request Interrupt Enable" "dis,ena" bitfld.long 0x00 0.--0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena" endif ; -------------------------------------------------------------------------------- rgroup asd:(0xc8000000+0x08)++0x03 line.long 0x00 "IIR,Interrupt ID Register" bitfld.long 0x00 6.--7. "FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" bitfld.long 0x00 1.--2. " IID ,Interrupt Source" "not used,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" wgroup asd:(0xc8000000+0x08)++0x03 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. "ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "-,clear" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "-,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" group asd:(0xc8000000+0x0c)++0x03 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7.--7. "DLAB ,Divisor Latch Access Bit" "THR-RBR-IER,DLL-DLH" bitfld.long 0x00 6.--6. " SB ,Set Break" "no effect,TXD out to 0" bitfld.long 0x00 5.--5. " STKYP ,Sticky Parity" "no effect,opposite of EPS" textline " " bitfld.long 0x00 4.--4. "EPS ,Even Parity Select" "odd,even" bitfld.long 0x00 3.--3. " PEN ,Parity Enable" "dis,ena" bitfld.long 0x00 2.--2. " STB ,Stop Bits" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" group asd:(0xc8000000+0x10)++0x03 line.long 0x00 "Modem_CNTL,Modem Control Modem Control Register" bitfld.long 0x00 4. "LOOP ,Provides a local Loopback feature for diagnostic testing of the UART" "dis,ena" bitfld.long 0x00 3. " OUT2 ,The bit is used to mask the UART interrupt output to the Interrupt Controller unit" "dis,ena" bitfld.long 0x00 2. " OUT1 ,This bit is used only in Loopback test mode. See (LOOP) Above" "dis,ena" bitfld.long 0x00 1. " RTS ,This bit controls the Request to Send (RTS#) output pin. Bit 1 affects the RTS# output for the DTR bit." "RTS# pin is 1,RTS# pin is 0" bitfld.long 0x00 0. " DTR ,This bit controls the Data Terminal Ready output" "DTR# pin is 1,DTR# pin is 0" rgroup asd:(0xc8000000+0x14)++0x03 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7.--7. "FIFOE ,FIFO Error Status" "no,yes" bitfld.long 0x00 6.--6. " TEMT ,Transmitter Empty" "no,yes" bitfld.long 0x00 5.--5. " TDRQ ,Transmit Data Request" "no,yes" bitfld.long 0x00 4.--4. " BI ,Break Interrupt" "no,yes" bitfld.long 0x00 3.--3. " FE ,Framing Error" "no,yes" bitfld.long 0x00 2.--2. " PE ,Parity Error" "no,yes" bitfld.long 0x00 1.--1. " OE ,Overrun Error" "no,yes" bitfld.long 0x00 0.--0. " DR ,Data Ready" "no,yes" group asd:(0xc8000000+0x18)++0x03 line.long 0x00 "Modem_STT,Modem Status Register" bitfld.long 0x00 7. "DCD ,This bit is the complement of the Data Carrier Detect (DCD#) input" "DCD# pin is 1,DCD# pin is 0" bitfld.long 0x00 6. " RI ,This bit is the complement of the ring Indicator (RI#) input" "RI# pin is 1,RI# pin is 0" bitfld.long 0x00 5. " DSR ,This bit is the complement of the Data Set Ready (DSR#) input" "DSR# pin is 1,DSR# pin is 0" bitfld.long 0x00 4. " CTS ,This bit is the complement of the Clear to Send (CTS#) input" "CTS# pin is 1,CTS# pin is 0" textline " " bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect, change in DCD# pin since last read of MSR" "No change,DCD# state changed" bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator, RI# pin change from 0 to 1 since last read of MSR" "no change from 0 to 1,RI# pin has changed from 0 to 1" textline " " bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready, change in DSR# pin since last read of MSR" "No change,DSR# state changed" bitfld.long 0x00 0. " DCTS ,Delta Clear To Send, change in CTS# pin since last read of MSR" "No change,CTS# state changed" group asd:(0xc8000000+0x1c)++0x03 line.long 0x00 "SPR,Scratch Pad Register" hexmask.long 0x00 0.--7. 0x01 "SP ,Scratch Pad" group asd:(0xc8000000+0x20)++0x03 line.long 0x00 "SL_IRED_SEL,Slow Infrared Select Register" bitfld.long 0x00 4. "RXPL ,Receive Data Polarity" "positive pulse as zero,negative pulse as zero" bitfld.long 0x00 3. " TXPL ,Transmit Data Polarity" "positive pulse as zero,negative pulse as zero" bitfld.long 0x00 2. " XMODE ,Transmit pulse width" "3/16 th of a bit time,1.6us" textline " " bitfld.long 0x00 1. " RCVEIR ,Receiver input mode" "normal UART mode,infrared mode" bitfld.long 0x00 0. " XMITIR ,Transmit output mode" "normal UART mode,infrared mode" width 8. tree.end ;end include file xscale/ixp23xx-uart.ph ;begin include file xscale/ixp23xx-uart.ph ;parameters: 0xc8001000 "UART2" ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; UART %1 %2 ; ; %1 Base Address ; %2 UART Name ; -------------------------------------------------------------------------------- tree "UART2" ; -------------------------------------------------------------------------------- width 12. ; -------------------------------------------------------------------------------- ; *** DLAB == 1 *** ; -------------------------------------------------------------------------------- if (d.l(asd:0xc8001000+0x0c)&0x80)==0x80 group asd:(0xc8001000+0x00)++0x03 line.long 0x00 "DLL,Divisor Latch Low Register" hexmask.long 0x00 0.--7. 0x01 "DLL ,Divisor Latch Register Low" group asd:(0xc8001000+0x04)++0x03 line.long 0x00 "DLH,Divisor Latch High Register" hexmask.long 0x00 0.--7. 0x100 "DLH ,Divisor Latch Register High" ; -------------------------------------------------------------------------------- ; *** DLAB == 0 *** ; -------------------------------------------------------------------------------- else rgroup asd:(0xc8001000+0x08)++0x03 hide.long -8. "RBR,Receive Buffer Register" IN wgroup asd:(0xc8001000+0x00)++0x03 line.long 0x00 "THR,Transmit Holding Register" group asd:(0xc8001000+0x04)++0x03 line.long 0x00 "IER,Interrupt Enable Register" bitfld.long 0x00 7.--7. "DMAE ,DMA Requests Enable" "dis,ena" bitfld.long 0x00 6.--6. " UUE ,UART Unit Enable" "dis,ena" bitfld.long 0x00 5.--5. " NRZE ,NRZ coding Enable" "dis,ena" bitfld.long 0x00 4.--4. " RTOIE ,Receiver Time Out Interrupt Enable" "dis,ena" bitfld.long 0x00 3.--3. " MIE ,Modem Interrupt Enable" "dis,ena" bitfld.long 0x00 2.--2. " RLSE ,Receiver Line Status Interrupt Enable" "dis,ena" bitfld.long 0x00 1.--1. " TIE ,Tranmit Data Request Interrupt Enable" "dis,ena" bitfld.long 0x00 0.--0. " RAVIE ,Receiver Data Available Interrupt Enable" "dis,ena" endif ; -------------------------------------------------------------------------------- rgroup asd:(0xc8001000+0x08)++0x03 line.long 0x00 "IIR,Interrupt ID Register" bitfld.long 0x00 6.--7. "FIFOES ,FIFO Mode Enable Status" "Non-FIFO Mode,res,res,FIFO Mode" bitfld.long 0x00 3.--3. " TOD ,Time Out Detected" "no,yes" bitfld.long 0x00 1.--2. " IID ,Interrupt Source" "not used,Transmit FIFO request data,Received data available,Receive error" bitfld.long 0x00 0.--0. " IP ,Interrupt Pending" "yes,no" wgroup asd:(0xc8001000+0x08)++0x03 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. "ITL ,Interrupt Trigger Level" "1 byte,8 bytes,16 bytes,32 bytes" bitfld.long 0x00 2.--2. " RESETTF ,Reset Transmitter FIFO" "-,clear" bitfld.long 0x00 1.--1. " RESETRF ,Reset Receive FIFO" "-,clear" bitfld.long 0x00 0.--0. " TRFIFOE ,Transmitter and Receive FIFO Enable" "dis,ena" group asd:(0xc8001000+0x0c)++0x03 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7.--7. "DLAB ,Divisor Latch Access Bit" "THR-RBR-IER,DLL-DLH" bitfld.long 0x00 6.--6. " SB ,Set Break" "no effect,TXD out to 0" bitfld.long 0x00 5.--5. " STKYP ,Sticky Parity" "no effect,opposite of EPS" textline " " bitfld.long 0x00 4.--4. "EPS ,Even Parity Select" "odd,even" bitfld.long 0x00 3.--3. " PEN ,Parity Enable" "dis,ena" bitfld.long 0x00 2.--2. " STB ,Stop Bits" "1,2" bitfld.long 0x00 0.--1. " WLS ,Word Length Select" "5-bit,6-bit,7-bit,8-bit" group asd:(0xc8001000+0x10)++0x03 line.long 0x00 "Modem_CNTL,Modem Control Modem Control Register" bitfld.long 0x00 4. "LOOP ,Provides a local Loopback feature for diagnostic testing of the UART" "dis,ena" bitfld.long 0x00 3. " OUT2 ,The bit is used to mask the UART interrupt output to the Interrupt Controller unit" "dis,ena" bitfld.long 0x00 2. " OUT1 ,This bit is used only in Loopback test mode. See (LOOP) Above" "dis,ena" bitfld.long 0x00 1. " RTS ,This bit controls the Request to Send (RTS#) output pin. Bit 1 affects the RTS# output for the DTR bit." "RTS# pin is 1,RTS# pin is 0" bitfld.long 0x00 0. " DTR ,This bit controls the Data Terminal Ready output" "DTR# pin is 1,DTR# pin is 0" rgroup asd:(0xc8001000+0x14)++0x03 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7.--7. "FIFOE ,FIFO Error Status" "no,yes" bitfld.long 0x00 6.--6. " TEMT ,Transmitter Empty" "no,yes" bitfld.long 0x00 5.--5. " TDRQ ,Transmit Data Request" "no,yes" bitfld.long 0x00 4.--4. " BI ,Break Interrupt" "no,yes" bitfld.long 0x00 3.--3. " FE ,Framing Error" "no,yes" bitfld.long 0x00 2.--2. " PE ,Parity Error" "no,yes" bitfld.long 0x00 1.--1. " OE ,Overrun Error" "no,yes" bitfld.long 0x00 0.--0. " DR ,Data Ready" "no,yes" group asd:(0xc8001000+0x18)++0x03 line.long 0x00 "Modem_STT,Modem Status Register" bitfld.long 0x00 7. "DCD ,This bit is the complement of the Data Carrier Detect (DCD#) input" "DCD# pin is 1,DCD# pin is 0" bitfld.long 0x00 6. " RI ,This bit is the complement of the ring Indicator (RI#) input" "RI# pin is 1,RI# pin is 0" bitfld.long 0x00 5. " DSR ,This bit is the complement of the Data Set Ready (DSR#) input" "DSR# pin is 1,DSR# pin is 0" bitfld.long 0x00 4. " CTS ,This bit is the complement of the Clear to Send (CTS#) input" "CTS# pin is 1,CTS# pin is 0" textline " " bitfld.long 0x00 3. " DDCD ,Delta Data Carrier Detect, change in DCD# pin since last read of MSR" "No change,DCD# state changed" bitfld.long 0x00 2. " TERI ,Trailing Edge Ring Indicator, RI# pin change from 0 to 1 since last read of MSR" "no change from 0 to 1,RI# pin has changed from 0 to 1" textline " " bitfld.long 0x00 1. " DDSR ,Delta Data Set Ready, change in DSR# pin since last read of MSR" "No change,DSR# state changed" bitfld.long 0x00 0. " DCTS ,Delta Clear To Send, change in CTS# pin since last read of MSR" "No change,CTS# state changed" group asd:(0xc8001000+0x1c)++0x03 line.long 0x00 "SPR,Scratch Pad Register" hexmask.long 0x00 0.--7. 0x01 "SP ,Scratch Pad" group asd:(0xc8001000+0x20)++0x03 line.long 0x00 "SL_IRED_SEL,Slow Infrared Select Register" bitfld.long 0x00 4. "RXPL ,Receive Data Polarity" "positive pulse as zero,negative pulse as zero" bitfld.long 0x00 3. " TXPL ,Transmit Data Polarity" "positive pulse as zero,negative pulse as zero" bitfld.long 0x00 2. " XMODE ,Transmit pulse width" "3/16 th of a bit time,1.6us" textline " " bitfld.long 0x00 1. " RCVEIR ,Receiver input mode" "normal UART mode,infrared mode" bitfld.long 0x00 0. " XMITIR ,Transmit output mode" "normal UART mode,infrared mode" width 8. tree.end ;end include file xscale/ixp23xx-uart.ph ;begin include file xscale/ixp23xx-xsi2cpp.ph ;parameters: 0xa0000000 ; -------------------------------------------------------------------------------- ; IXP2350, IXP2325 ; ; IXP23XX-XSI2CPP %1 ; ; %1 Base Address tree "XSI2CPP Bridge" width 24. TREE "Command 0" group.long asd:(0xa0000000+0x00)++0x7 "XSI2CPP Bridge CSRs" line.long 0x04 " XSI2CPPCmd0Reg1, Register #1 of manual command #0" line.long 0x00 " , Register #1 of manual command #0" bitfld.long 0x04 24.--25. " TOKEN ,Token field" "00,01,10,11" hexmask.long 0x04 16.--23. 0x01 " BYTE MASK ,Byte mask field for writes" bitfld.long 0x04 8.--11. " CMD TYPE ,Command type field" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " hexmask.long 0x04 0.--6. 0x01 " LENGTH ,Length field" hexmask.long 0x00 0.--31. 0x01 " ADDR/FAST_WR DATA ,Offset address to/from the target" group asd:(0xa0000000+0x08)++0x7 line.long 0x04 " XSI2CPPCmd0Reg2, Register #2 of manual command #0" line.long 0x00 " , Register #2 of manual command #0" bitfld.long 0x00 30. " FW ,Fast write bit" "no,yes" bitfld.long 0x00 28.--29. " SIG TYPE ,Signaling type" "No signal,Signal on push,Signal on pull,Signal on push and pull" textline " " bitfld.long 0x00 26.--27. " XFER TYPE ,Transfer type" "no data,push data to bridge,pull data from bridge,push/pull data to/from bridge" textline " " bitfld.long 0x00 24.--25. " TARGET ID ,Target ID[4:5] group encoding" "CPP,NPE,ME,res" bitfld.long 0x00 20.--23. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 20.--23. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 20.--23. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0xa0)++0x7 line.long 0x04 " XSI2CPPAtomData0, Register to which write data for atomic transfer is written" line.long 0x00 " , Register to which write data for atomic transfer is written" hexmask.long 0x00 0.--31. 0x01 " ATOMIC Data ,Write data for the atomic operation performed" wgroup asd:(0xa0000000+0x200)++0x1f line.long 0x00 " WriteBufCmd0, Write buffer data to select command #0" line.long 0x04 " , Write buffer data" line.long 0x08 " , Write buffer data" line.long 0x0c " , Write buffer data" line.long 0x10 " , Write buffer data" line.long 0x14 " , Write buffer data" line.long 0x18 " , Write buffer data" line.long 0x1c " , Write buffer data" hgroup asd:(0xa0000000+0x300)++0x1f "XSI2CPP Read Buffer aliased Address Regions" hide.long 0x00 " ReadBufCmd0, Read buffer data to select command #0" IN hide.long 0x04 " , Read buffer data" IN hide.long 0x08 " , Read buffer data" IN hide.long 0x0c " , Read buffer data" IN hide.long 0x10 " , Read buffer data" IN hide.long 0x14 " , Read buffer data" IN hide.long 0x18 " , Read buffer data" IN hide.long 0x1c " , Read buffer data" IN TREE.END TREE "Command 1" group asd:(0xa0000000+0x10)++0x7 line.long 0x04 " XSI2CPPCmd1Reg1, Register #1 of manual command #1" line.long 0x00 " , Register #1 of manual command #1" bitfld.long 0x04 24.--25. " TOKEN ,Token field" "00,01,10,11" hexmask.long 0x04 16.--23. 0x01 " BYTE MASK ,Byte mask field for writes" bitfld.long 0x04 8.--11. " CMD TYPE ,Command type field" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " hexmask.long 0x04 0.--6. 0x01 " LENGTH ,Length field" hexmask.long 0x00 0.--31. 0x01 " ADDR/FAST_WR DATA ,Offset address to/from the target" group asd:(0xa0000000+0x18)++0x7 line.long 0x04 " XSI2CPPCmd1Reg2, Register #2 of manual command #1" line.long 0x00 " , Register #2 of manual command #1" bitfld.long 0x00 30. " FW ,Fast write bit" "no,yes" bitfld.long 0x00 28.--29. " SIG TYPE ,Signaling type" "No signal,Signal on push,Signal on pull,Signal on push and pull" bitfld.long 0x00 26.--27. " XFER TYPE ,Transfer type" "no data,push data to bridge,pull data from bridge,push/pull data to/from bridge" textline " " bitfld.long 0x00 24.--25. " TARGET ID ,Target ID[4:5] group encoding" "CPP,NPE,ME,res" bitfld.long 0x00 20.--23. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 20.--23. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 20.--23. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0xa8)++0x7 line.long 0x04 " XSI2CPPAtomData1, Register to which write data for atomic transfer is written" line.long 0x00 " , Register to which write data for atomic transfer is written" hexmask.long 0x00 0.--31. 0x01 " ATOMIC Data ,Write data for the atomic operation performed" wgroup asd:(0xa0000000+0x220)++0x1f line.long 0x00 " WriteBufCmd1, Write buffer data to select command #1" line.long 0x04 " , Write buffer data" line.long 0x08 " , Write buffer data" line.long 0x0c " , Write buffer data" line.long 0x10 " , Write buffer data" line.long 0x14 " , Write buffer data" line.long 0x18 " , Write buffer data" line.long 0x1c " , Write buffer data" hgroup asd:(0xa0000000+0x320)++0x1f hide.long 0x00 " ReadBufCmd1, Read buffer data to select command #1" IN hide.long 0x04 " , Read buffer data" IN hide.long 0x08 " , Read buffer data" IN hide.long 0x0c " , Read buffer data" IN hide.long 0x10 " , Read buffer data" IN hide.long 0x14 " , Read buffer data" IN hide.long 0x18 " , Read buffer data" IN hide.long 0x1c " , Read buffer data" IN TREE.END TREE "Command 2" group asd:(0xa0000000+0x20)++0x7 line.long 0x04 " XSI2CPPCmd2Reg1, Register #1 of manual command #2" line.long 0x00 " , Register #1 of manual command #2" bitfld.long 0x04 24.--25. " TOKEN ,Token field" "00,01,10,11" hexmask.long 0x04 16.--23. 0x01 " BYTE MASK ,Byte mask field for writes" bitfld.long 0x04 8.--11. " CMD TYPE ,Command type field" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " hexmask.long 0x04 0.--6. 0x01 " LENGTH ,Length field" hexmask.long 0x00 0.--31. 0x01 " ADDR/FAST_WR DATA ,Offset address to/from the target" group asd:(0xa0000000+0x28)++0x7 line.long 0x04 " XSI2CPPCmd2Reg2, Register #2 of manual command #2" line.long 0x00 " , Register #2 of manual command #2" bitfld.long 0x00 30. " FW ,Fast write bit" "no,yes" bitfld.long 0x00 28.--29. " SIG TYPE ,Signaling type" "No signal,Signal on push,Signal on pull,Signal on push and pull" bitfld.long 0x00 26.--27. " XFER TYPE ,Transfer type" "no data,push data to bridge,pull data from bridge,push/pull data to/from bridge" textline " " bitfld.long 0x00 24.--25. " TARGET ID ,Target ID[4:5] group encoding" "CPP,NPE,ME,res" bitfld.long 0x00 20.--23. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 20.--23. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 20.--23. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0xb0)++0x7 line.long 0x04 " XSI2CPPAtomData2, Register to which write data for atomic transfer is written" line.long 0x00 " , Register to which write data for atomic transfer is written" hexmask.long 0x00 0.--31. 0x01 " ATOMIC Data ,Write data for the atomic operation performed" wgroup asd:(0xa0000000+0x240)++0x1f line.long 0x00 " WriteBufCmd2, Write buffer data to select command #2" line.long 0x04 " , Write buffer data" line.long 0x08 " , Write buffer data" line.long 0x0c " , Write buffer data" line.long 0x10 " , Write buffer data" line.long 0x14 " , Write buffer data" line.long 0x18 " , Write buffer data" line.long 0x1c " , Write buffer data" hgroup asd:(0xa0000000+0x340)++0x1f hide.long 0x00 " ReadBufCmd2, Read buffer data to select command #2" IN hide.long 0x04 " , Read buffer data" IN hide.long 0x08 " , Read buffer data" IN hide.long 0x0c " , Read buffer data" IN hide.long 0x10 " , Read buffer data" IN hide.long 0x14 " , Read buffer data" IN hide.long 0x18 " , Read buffer data" IN hide.long 0x1c " , Read buffer data" IN TREE.END TREE "Command 3" group asd:(0xa0000000+0x030)++0x7 line.long 0x04 " XSI2CPPCmd3Reg1, Register #1 of manual command #3" line.long 0x00 " , Register #1 of manual command #3" bitfld.long 0x04 24.--25. " TOKEN ,Token field" "00,01,10,11" hexmask.long 0x04 16.--23. 0x01 " BYTE MASK ,Byte mask field for writes" bitfld.long 0x04 8.--11. " CMD TYPE ,Command type field" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " hexmask.long 0x04 0.--6. 0x01 " LENGTH ,Length field" hexmask.long 0x00 0.--31. 0x01 " ADDR/FAST_WR DATA ,Offset address to/from the target" group asd:(0xa0000000+0x038)++0x7 line.long 0x04 " XSI2CPPCmd3Reg2, Register #2 of manual command #3" line.long 0x00 " , Register #2 of manual command #3" bitfld.long 0x00 30. " FW ,Fast write bit" "no,yes" bitfld.long 0x00 28.--29. " SIG TYPE ,Signaling type" "No signal,Signal on push,Signal on pull,Signal on push and pull" bitfld.long 0x00 26.--27. " XFER TYPE ,Transfer type" "no data,push data to bridge,pull data from bridge,push/pull data to/from bridge" textline " " bitfld.long 0x00 24.--25. " TARGET ID ,Target ID[4:5] group encoding" "CPP,NPE,ME,res" bitfld.long 0x00 20.--23. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 20.--23. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 20.--23. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0x0b8)++0x7 line.long 0x04 " XSI2CPPAtomData3, Register to which write data for atomic transfer is written" line.long 0x00 " , Register to which write data for atomic transfer is written" hexmask.long 0x00 0.--31. 0x01 " ATOMIC Data ,Write data for the atomic operation performed" wgroup asd:(0xa0000000+0x260)++0x1f line.long 0x00 " WriteBufCmd3, Write buffer data to select command #3" line.long 0x04 " , Write buffer data" line.long 0x08 " , Write buffer data" line.long 0x0c " , Write buffer data" line.long 0x10 " , Write buffer data" line.long 0x14 " , Write buffer data" line.long 0x18 " , Write buffer data" line.long 0x1c " , Write buffer data" hgroup asd:(0xa0000000+0x360)++0x1f hide.long 0x00 " ReadBufCmd3, Read buffer data to select command #3" IN hide.long 0x04 " , Read buffer data" IN hide.long 0x08 " , Read buffer data" IN hide.long 0x0c " , Read buffer data" IN hide.long 0x10 " , Read buffer data" IN hide.long 0x14 " , Read buffer data" IN hide.long 0x18 " , Read buffer data" IN hide.long 0x1c " , Read buffer data" IN TREE.END TREE "Command 4" group asd:(0xa0000000+0x040)++0x7 line.long 0x04 " XSI2CPPCmd4Reg1, Register #1 of manual command #4" line.long 0x00 " , Register #1 of manual command #4" bitfld.long 0x04 24.--25. " TOKEN ,Token field" "00,01,10,11" hexmask.long 0x04 16.--23. 0x01 " BYTE MASK ,Byte mask field for writes" bitfld.long 0x04 8.--11. " CMD TYPE ,Command type field" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " hexmask.long 0x04 0.--6. 0x01 " LENGTH ,Length field" hexmask.long 0x00 0.--31. 0x01 " ADDR/FAST_WR DATA ,Offset address to/from the target" group asd:(0xa0000000+0x048)++0x7 line.long 0x04 " XSI2CPPCmd4Reg2, Register #2 of manual command #4" line.long 0x00 " , Register #2 of manual command #4" bitfld.long 0x00 30. " FW ,Fast write bit" "no,yes" bitfld.long 0x00 28.--29. " SIG TYPE ,Signaling type" "No signal,Signal on push,Signal on pull,Signal on push and pull" bitfld.long 0x00 26.--27. " XFER TYPE ,Transfer type" "no data,push data to bridge,pull data from bridge,push/pull data to/from bridge" textline " " bitfld.long 0x00 24.--25. " TARGET ID ,Target ID[4:5] group encoding" "CPP,NPE,ME,res" bitfld.long 0x00 20.--23. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 20.--23. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 20.--23. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0x0c0)++0x7 line.long 0x04 " XSI2CPPAtomData4, Register to which write data for atomic transfer is written" line.long 0x00 " , Register to which write data for atomic transfer is written" hexmask.long 0x00 0.--31. 0x01 " ATOMIC Data ,Write data for the atomic operation performed" wgroup asd:(0xa0000000+0x280)++0x1f line.long 0x00 " WriteBufCmd4, Write buffer data to select command #4" line.long 0x04 " , Write buffer data" line.long 0x08 " , Write buffer data" line.long 0x0c " , Write buffer data" line.long 0x10 " , Write buffer data" line.long 0x14 " , Write buffer data" line.long 0x18 " , Write buffer data" line.long 0x1c " , Write buffer data" hgroup asd:(0xa0000000+0x380)++0x1f hide.long 0x00 " ReadBufCmd4, Read buffer data to select command #4" IN hide.long 0x04 " , Read buffer data" IN hide.long 0x08 " , Read buffer data" IN hide.long 0x0c " , Read buffer data" IN hide.long 0x10 " , Read buffer data" IN hide.long 0x14 " , Read buffer data" IN hide.long 0x18 " , Read buffer data" IN hide.long 0x1c " , Read buffer data" IN TREE.END TREE "Command 5" group asd:(0xa0000000+0x050)++0x7 line.long 0x04 " XSI2CPPCmd5Reg1, Register #1 of manual command #5" line.long 0x00 " , Register #1 of manual command #5" bitfld.long 0x04 24.--25. " TOKEN ,Token field" "00,01,10,11" hexmask.long 0x04 16.--23. 0x01 " BYTE MASK ,Byte mask field for writes" bitfld.long 0x04 8.--11. " CMD TYPE ,Command type field" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " hexmask.long 0x04 0.--6. 0x01 " LENGTH ,Length field" hexmask.long 0x00 0.--31. 0x01 " ADDR/FAST_WR DATA ,Offset address to/from the target" group asd:(0xa0000000+0x058)++0x7 line.long 0x04 " XSI2CPPCmd5Reg2, Register #2 of manual command #5" line.long 0x00 " , Register #2 of manual command #5" bitfld.long 0x00 30. " FW ,Fast write bit" "no,yes" bitfld.long 0x00 28.--29. " SIG TYPE ,Signaling type" "No signal,Signal on push,Signal on pull,Signal on push and pull" bitfld.long 0x00 26.--27. " XFER TYPE ,Transfer type" "no data,push data to bridge,pull data from bridge,push/pull data to/from bridge" textline " " bitfld.long 0x00 24.--25. " TARGET ID ,Target ID[4:5] group encoding" "CPP,NPE,ME,res" bitfld.long 0x00 20.--23. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 20.--23. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 20.--23. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0x0c8)++0x7 line.long 0x04 " XSI2CPPAtomData5, Register to which write data for atomic transfer is written" line.long 0x00 " , Register to which write data for atomic transfer is written" hexmask.long 0x00 0.--31. 0x01 " ATOMIC Data ,Write data for the atomic operation performed" wgroup asd:(0xa0000000+0x2a0)++0x1f line.long 0x00 " WriteBufCmd5, Write buffer data to select command #5" line.long 0x04 " , Write buffer data" line.long 0x08 " , Write buffer data" line.long 0x0c " , Write buffer data" line.long 0x10 " , Write buffer data" line.long 0x14 " , Write buffer data" line.long 0x18 " , Write buffer data" line.long 0x1c " , Write buffer data" hgroup asd:(0xa0000000+0x3a0)++0x1f hide.long 0x00 " ReadBufCmd5, Read buffer data to select command #5" IN hide.long 0x04 " , Read buffer data" IN hide.long 0x08 " , Read buffer data" IN hide.long 0x0c " , Read buffer data" IN hide.long 0x10 " , Read buffer data" IN hide.long 0x14 " , Read buffer data" IN hide.long 0x18 " , Read buffer data" IN hide.long 0x1c " , Read buffer data" IN TREE.END group asd:(0xa0000000+0x080)++0x7 "XSI2CPP Bridge CSRs" line.long 0x04 " XSI2CPPManReg, Register gives details of previous manual transfer" line.long 0x00 " , Register gives details of previous manual transfer" bitfld.long 0x00 0.--2. " CMD REG# ,Set of Command Register used on previous manual transfer" "Cmd0,Cmd1,Cmd2,Cmd3,Cmd4,Cmd5,res,res" group asd:(0xa0000000+0x088)++0x7 line.long 0x04 " XSI2CPPSrcDestIDReg, Register used to program Src/Dest ID" line.long 0x00 " , Register used to program Src/Dest ID" hexmask.long 0x00 0.--5. 0x01 " SRC_DEST_ID ,Src/Dest ID" group asd:(0xa0000000+0x090)++0x7 line.long 0x04 " XSI2CPPCurrXferReg1, Register gives details of current transfer that has completed" line.long 0x00 " , Register gives details of current transfer that has completed" hexmask.long 0x04 0.--31. 0x01 " CPP_ADDR ,Start address of current transfer in CPP space" hexmask.long 0x00 20.--27. 0x01 " BYTE MASK ,Byte mask for current transfer" bitfld.long 0x00 16.--19. " CMD TYPE ,Command of current transfer" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" textline " " bitfld.long 0x00 13.--14. " TOKEN ,Token of current transfer" "00,01,10,11" hexmask.long 0x00 6.--12. 0x01 " LENGTH ,Length of current transfer" textline " " bitfld.long 0x00 4.--05. " TARGET ID ,Target ID[4:5] group encoding of current transfer" "CPP,NPE,ME,res" bitfld.long 0x00 0.--03. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 0.--03. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 0.--03. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0x098)++0x7 line.long 0x04 " XSI2CPPCurrXferReg2, Register gives details of current transfer that has completed" line.long 0x00 " , Register gives details of current transfer that has completed" bitfld.long 0x00 11. " TO_ERR_MSK ,Masks the timeout causing an xsicpp_int" "no,yes" bitfld.long 0x00 10. " COH_ERR_MSK ,Masks the coherency error causing an xsicpp_int" "no,yes" bitfld.long 0x00 9. " XFER_ERR_MSK ,Masks the XFER error causing an xsicpp_int" "no,yes" bitfld.long 0x00 7. " D_DE_MSK ,Masks the DRAM data error causing an xsicpp_int" "no,yes" bitfld.long 0x00 6. " S_DE_MSK ,Masks the SRAM data error causing an xsicpp_int" "no,yes" textline " " bitfld.long 0x00 5. " TO_ERR ,Timeout occured on the CPP Master. Write 1 to clear" "no,yes" bitfld.long 0x00 4. " COH_ERR ,Coherent transfer was attempted on the XSI2CPP Bridge. Write 1 to clear" "no,yes" bitfld.long 0x00 3. " XFER_ERR ,Unsupported address or transfer type was received on XSI bus. Write 1 to clear" "no,yes" bitfld.long 0x00 1. " D_DE ,Data error has been on D_Bus. Write 1 to clear" "no,yes" bitfld.long 0x00 0. " S_DE ,Data error has been on S_Bus. Write 1 to clear" "no,yes" group asd:(0xa0000000+0x0e0)++0x7 "CPP2XSI Bridge CSRs" line.long 0x04 " CPP2XSITargetIDReg, Register used to program the target ID" line.long 0x00 " , Register used to program the target ID" bitfld.long 0x00 4.--05. " TARGET ID ,Target ID[4:5] group encoding of current transfer" "CPP,NPE,ME,res" bitfld.long 0x00 0.--03. " CPP ,Target ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x00 0.--03. " NPE ,Target ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 0.--03. " ME ,Target ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" group asd:(0xa0000000+0x0e8)++0x7 line.long 0x04 " CPP2XSICurrXferReg1, Register gives details of the first transfer" line.long 0x00 " , Register gives details of the first transfer" hexmask.long 0x04 27.--31. 0x01 " SIG_MASTER ,Master # to signal on the completion of a tranfer" bitfld.long 0x04 24.--26. " SIG_CTX ,Signal Context # required on the completion of a tranfer" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--23. " SIG ,Signal # required on the completion of a tranfer" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x04 18.--19. " SRC_DEST_ID ,SRC_DEST_ID[4:5] of the current transfer" "CPP,NPE,ME,res" bitfld.long 0x04 14.--17. " CPP ,SRC_DEST_ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x04 14.--17. " NPE ,SRC_DEST_ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x04 14.--17. " ME ,SRC_DEST_ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" textline " " hexmask.long 0x04 0.--13. 0x01 " SIG_MASTER ,Src/Dest offset of the current tranfer" textline " " bitfld.long 0x00 20. " BRG_BUSY_GO ,Transfer is taking place through the CPP2XSI Bridge" "complete,busy" bitfld.long 0x00 19. " BRG_BUSY ,Transfer is taking place through the CPP2XSI Bridge" "complete,busy" textline " " hexmask.long 0x00 11.--18. 0x01 " BYTE MASK ,Byte mask for current transfer" bitfld.long 0x00 7.--10. " CMD TYPE ,Command of current transfer" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" hexmask.long 0x00 0.--06. 0x01 " LENGTH ,Length of current transfer in double words" group asd:(0xa0000000+0x0f0)++0x7 line.long 0x04 " CPP2XSICurrXferReg2, Register gives details of the second transfer" line.long 0x00 " , Register gives details of the second transfer" hexmask.long 0x04 27.--31. 0x01 " SIG_MASTER ,Master # to signal on the completion of a tranfer" bitfld.long 0x04 24.--26. " SIG_CTX ,Signal Context # required on the completion of a tranfer" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--23. " SIG ,Signal # required on the completion of a tranfer" "0,1,2,3,4,5,6,7,?..." textline " " bitfld.long 0x04 18.--19. " SRC_DEST_ID ,SRC_DEST_ID[4:5] of the current transfer" "CPP,NPE,ME,res" bitfld.long 0x04 14.--17. " CPP ,SRC_DEST_ID[0:3] encoding - CPP side" "none,MSF,SRAM&MSGRAM,res,Hash,res,res,DRAM/BRIDGE,Scratch,PCI,res,res,res,CAP,res,res" bitfld.long 0x04 14.--17. " NPE ,SRC_DEST_ID[0:3] encoding - NPE" "res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x04 14.--17. " ME ,SRC_DEST_ID[0:3] encoding - ME" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res" textline " " hexmask.long 0x04 0.--13. 0x01 " SIG_MASTER ,Src/Dest offset of the current tranfer" textline " " bitfld.long 0x00 20. " BRG_BUSY_GO ,Transfer is taking place through the CPP2XSI Bridge" "complete,busy" bitfld.long 0x00 19. " BRG_BUSY ,Transfer is taking place through the CPP2XSI Bridge" "complete,busy" textline " " hexmask.long 0x00 11.--18. 0x01 " BYTE MASK ,Byte mask for current transfer" bitfld.long 0x00 7.--10. " CMD TYPE ,Command of current transfer" "read/hash,write,0010,0011,0100,0101,substract,increment,decrement,1001,1010,Deq,Enq,CSR,WrQDesc,RdQDescr" hexmask.long 0x00 0.--06. 0x01 " LENGTH ,Length of current transfer in double words" group asd:(0xa0000000+0x0f8)++0x7 line.long 0x04 " CPP2XSICurrXferReg3, Register gives details of the current transfer" line.long 0x00 " , Register gives details of the current transfer" bitfld.long 0x00 26. " PAUSE ,Suspend operation of the CPP2XSI Bridge when the currently active transfer complete" "no,suspend" bitfld.long 0x00 24.--25. " RESP_ERR_MSK ,Mask the response error bits causing a xsi2cpp_int" "00,01,10,11" bitfld.long 0x00 22.--23. " RESP_ERR ,Error response is received on the XSI Bus from an XSI Completer" "00,01,10,11" textline " " bitfld.long 0x00 21. " COH_OFF ,Disable XSI Bus Coherency" "ena,dis" bitfld.long 0x00 20. " PSH_OFF ,Disable XSI Push feature for PCI transfer only" "ena,dis" bitfld.long 0x00 19. " ADDR_31 ,Substitute ADDR[31] with value to/from the XSI address" "no,yes" textline " " bitfld.long 0x00 18. " ABT_MSK[1] ,Mask the XSI abort error of second transfer causing a xsi2cpp_int" "no,yes" bitfld.long 0x00 17. " ABT_MSK[0] ,Mask the XSI abort error of first transfer causing a xsi2cpp_int" "no,yes" bitfld.long 0x00 16. " TO_ERR_MSK ,Mask the timeout error causing a xsi2cpp_int" "no,yes" bitfld.long 0x00 15. " CMD_ERR_MSK ,Mask the command error causing a xsi2cpp_int" "no,yes" bitfld.long 0x00 14. " CQF_ERR_MSK ,Mask the command queue full error causing a xsi2cpp_int" "no,yes" textline " " bitfld.long 0x00 13. " ABT[1] ,XSI abort error of second transfer" "no,yes" bitfld.long 0x00 12. " ABT[0] ,XSI abort error of first transfer" "no,yes" bitfld.long 0x00 11. " TO_ERR ,Timeout ocurred on the CPP target I/F" "no,yes" bitfld.long 0x00 10. " CMD_ERR ,Command is received with error i.e. uncorrect command or invalid byte mask" "no,yes" bitfld.long 0x00 9. " CQF_ERR ,Command queue is full" "no,yes" textline " " bitfld.long 0x00 5.--08. " CMD_Q_THRESH ,Threshold at which the command queue full signal is asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--04. " CMD_Q_LENGTH ,Current length of the command queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." group asd:(0xa0000000+0x100)++0x7 line.long 0x04 " CPP2XSIBaseBound, PCI Base and Bound Register" line.long 0x00 " , PCI Base and Bound Register" hexmask.long 0x00 16.--25. 0x000400 " BOUND ,Limits the address range for which Push is enabled for Write Line transactions from PCI to XSI space" hexmask.long 0x00 0.--09. 0x200000 " BASE ,Base address of the address range for which Push is enabled for Write Line transactions from PCI to XSI space" group asd:(0xa0000000+0x110)++0x7 line.long 0x04 " CPP2XSIAbtStat1Reg, CPP2XSI transfer #1 - if the completer aborts on a read from the XSI space" line.long 0x00 " , CPP2XSI transfer #1 - if the completer aborts on a read from the XSI space" bitfld.long 0x04 11.--13. " ABORT_SIG_MASTER ,Captured ID of the master to be signaled for the aborted transfer" "0,1,2,3,4,5,6,7" hexmask.long 0x04 6.--10. 0x01 " ABORT_SIG_CTX ,Captured ID of the context to be signaled for the aborted transfer" textline " " hexmask.long 0x04 0.--5. 0x01 " ABORT_SRC_DEST_ID ,Captured Src/Dest ID for the aborted transfer" hexmask.long 0x00 0.--31. 0x01 " ABORT_ADDR ,Captured XSI Address for the aborted transfer" group asd:(0xa0000000+0x118)++0x7 line.long 0x04 " CPP2XSIAbtStat2Reg, CPP2XSI transfer #2 - if the completer aborts on a read from the XSI space" line.long 0x00 " , CPP2XSI transfer #2 - if the completer aborts on a read from the XSI space" bitfld.long 0x04 11.--13. " ABORT_SIG_MASTER ,Captured ID of the master to be signaled for the aborted transfer" "0,1,2,3,4,5,6,7" hexmask.long 0x04 6.--10. 0x01 " ABORT_SIG_CTX ,Captured ID of the context to be signaled for the aborted transfer" textline " " hexmask.long 0x04 0.--5. 0x01 " ABORT_SRC_DEST_ID ,Captured Src/Dest ID for the aborted transfer" hexmask.long 0x00 0.--31. 0x01 " ABORT_ADDR ,Captured XSI Address for the aborted transfer" group asd:(0xa0000000+0x0e0)++0x7 "Time-out Register" line.long 0x04 " TOReg, Register used to set the time out value" line.long 0x00 " , Register used to set the time out value" bitfld.long 0x00 5. " C2X_TO_DSA ,CPP2XSI time-out disable bit" "ena,dis" bitfld.long 0x00 4. " X2C_TO_DSA ,XSI2CPP time-out disable bit" "ena,dis" bitfld.long 0x00 0.--3. " TO ,Number of clock cycles at which a CPP time-out occurs and an interrupt is generated" "res,512clk,1024clk,1536clk,2048clk,2560clk,3072clk,3584clk,4096clk,4608clk,5120clk,5632clk,6144clk,6656clk,7168clk,7680clk" width 8. tree.end ;end include file xscale/ixp23xx-xsi2cpp.ph ;begin include file xscale/ixp23xx-xsipmu.ph ;parameters: ASD: 0xc8002000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; State: ok ; ; IXP23xx-PMU %1 %2 ; ; %1 memory space ; %2 base address ; -------------------------------------------------------------------------------- tree "XSI PMU" ; -------------------------------------------------------------------------------- width 8. group ASD:(0xc8002000+0x00)++0x03 line.long 0x00 "ESR,Event Select Register" bitfld.long 0x00 19.--19. "PEC1 ctrl ,Selects Enable conditions for counter PEC1" "Occur,Duration" bitfld.long 0x00 17.--18. ",Selects Enable conditions for counter PEC1" "00,01,10,11" bitfld.long 0x00 16.--16. "PEC2 ctrl ,Selects Enable conditions for counter PEC2" "Occur,Duration" bitfld.long 0x00 14.--15. ",Selects Enable conditions for counter PEC1" "00,01,10,11" bitfld.long 0x00 13.--13. "PEC3 ctrl ,Selects Enable conditions for counter PEC3" "Occur,Duration" bitfld.long 0x00 11.--12. ",Selects Enable conditions for counter PEC1" "00,01,10,11" textline " " bitfld.long 0x00 10.--10. "PEC4 ctrl ,Selects Enable conditions for counter PEC4" "Occur,Duration" bitfld.long 0x00 8.--09. ",Selects Enable conditions for counter PEC1" "00,01,10,11" bitfld.long 0x00 7.--07. "PEC5 ctrl ,Selects Enable conditions for counter PEC5" "Occur,Duration" bitfld.long 0x00 5.--06. ",Selects Enable conditions for counter PEC1" "00,01,10,11" bitfld.long 0x00 4.--04. "PEC6 ctrl ,Selects Enable conditions for counter PEC6" "Occur,Duration" bitfld.long 0x00 2.--03. ",Selects Enable conditions for counter PEC1" "00,01,10,11" textline " " bitfld.long 0x00 1. "Mode ,Value in this bit field determines the monitored interface on the Intel IXP23XX product line I/O processor." "dis,AHB Bus Events" group ASD:(0xc8002000+0x04)++0x03 line.long 0x00 "PSR,PMU Counter Interrupt Status Register" bitfld.long 0x00 5. "OFL6 ,PEC6 has overflowed" "no,yes" bitfld.long 0x00 4. "OFL5 ,PEC5 has overflowed" "no,yes" bitfld.long 0x00 3. "OFL4 ,PEC4 has overflowed" "no,yes" bitfld.long 0x00 2. "OFL3 ,PEC3 has overflowed" "no,yes" bitfld.long 0x00 1. "OFL2 ,PEC2 has overflowed" "no,yes" bitfld.long 0x00 0. "OFL1 ,PEC1 has overflowed" "no,yes" group ASD:(0xc8002000+0x08)++0x17 line.long 0x00 "PEC1,Programmable Event Counter" hexmask.long 0x00 0.--26. 0x01 "PEC1 ,This is a 27-bit read-only counter register" line.long 0x04 "PEC2,Programmable Event Counter" hexmask.long 0x04 0.--26. 0x01 "PEC2 ,This is a 27-bit read-only counter register" line.long 0x08 "PEC3,Programmable Event Counter" hexmask.long 0x08 0.--26. 0x01 "PEC3 ,This is a 27-bit read-only counter register" line.long 0x0c "PEC4,Programmable Event Counter" hexmask.long 0x0c 0.--26. 0x01 "PEC4 ,This is a 27-bit read-only counter register" line.long 0x10 "PEC5,Programmable Event Counter" hexmask.long 0x10 0.--26. 0x01 "PEC5 ,This is a 27-bit read-only counter register" line.long 0x14 "PEC6,Programmable Event Counter" hexmask.long 0x14 0.--26. 0x01 "PEC6 ,This is a 27-bit read-only counter register" tree.end ;end include file xscale/ixp23xx-xsipmu.ph ;begin include file xscale/ixp23xx-int.ph ;parameters: ASD: 0xc8003000 ; IXP2325, IXP2350 ; ; IXP23xx-INT %1 %2 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "APB Interrupt Controller" ; -------------------------------------------------------------------------------- width 16. group ASD:(0xc8003000+0x0)++0x03 line.long 0x00 "INTR_ST1,Interrupt Status Register 1" bitfld.long 0x00 31. " int31 (SRAM0_ERR) ,SRAM0_ERR interrupt" "no,yes" bitfld.long 0x00 30. " int30 (SRAM1_ERR) ,SRAM1_ERR interrupt" "no,yes" textline " " bitfld.long 0x00 29. " int29 (D0XG_DRAM_ECC_UNCORR) ,CPP DRAM0 D0XG_DRAM_ECC_UNCORR interrupt" "no,yes" bitfld.long 0x00 28. " int28 (D0XG_DRAM_ECC_CORR) ,CPP DRAM0 D0XG_DRAM_ECC_CORR interrupt" "no,yes" textline " " bitfld.long 0x00 27. " int27 (PCXG_PCI_ERR_RPH) ,PCXG_PCI_ERR_RPH interrupt" "no,yes" bitfld.long 0x00 26. " int26 (ME_ATTN3) ,ME_ATTN3 interrupt" "no,yes" textline " " bitfld.long 0x00 25. " int25 (ME_ATTN2) ,ME_ATTN2 interrupt" "no,yes" bitfld.long 0x00 24. " int24 (ME_ATTN1) ,ME_ATTN1 interrupt" "no,yes" textline " " bitfld.long 0x00 23. " int23 (ME_ATTN0) ,ME_ATTN0 interrupt" "no,yes" bitfld.long 0x00 22. " int22 (CPP2XSI Bridge) ,CPP2XSI Bridge Interrupt interrupt" "no,yes" textline " " bitfld.long 0x00 21. " int21 (XSI2CPP Bridge) ,XSI2CPP Bridge interrupt" "no,yes" bitfld.long 0x00 20. " int20 (XSI2AHB Bridge) ,xsi/ahb gasket: XSI2AHB Bridge interrupt" "no,yes" textline " " bitfld.long 0x00 19. " int19 (ece) ,xsi/ahb gasket: Intel XScale core Core ece interrupt" "no,yes" bitfld.long 0x00 18. " int18 (PM) ,xsi/ahb gasket: Intel XScale core Core PM interrupt" "no,yes" textline " " bitfld.long 0x00 17. " int17 (XSI PMU) ,XSI PMU AHB Performance Monitoring Unit counter rollover interrupt" "no,yes" bitfld.long 0x00 16. " int16 (UART0) ,UART0 interrupt" "no,yes" textline " " bitfld.long 0x00 15. " int15 (UART1) ,UART1 interrupt" "no,yes" bitfld.long 0x00 14. " int14 (S/W interrupt1) ,S/W interrupt1" "no,yes" textline " " bitfld.long 0x00 13. " int13 (S/W interrupt0) ,S/W interrupt0" "no,yes" bitfld.long 0x00 12. " int12 (PMUN) ,PMUN Interrupt" "no,yes" textline " " bitfld.long 0x00 11. " int11 (PCI) ,PCI interrupt" "no,yes" bitfld.long 0x00 10. " int10 (PCI DMA Channel 3) ,PCI DMA Channel 3 interrupt" "no,yes" textline " " bitfld.long 0x00 9. " int9 (PCI DMA Channel 2) ,PCI DMA Channel 2 interrupt" "no,yes" bitfld.long 0x00 8. " int8 (PCI DMA Channel 1) ,PCI DMA Channel 1 interrupt" "no,yes" textline " " bitfld.long 0x00 7. " int7 (PCI Doorbell) ,PCI Doorbell interrupt" "no,yes" bitfld.long 0x00 6. " int6 (Time[3] Watchdog) ,Time[3], Watchdog Timer interrupt" "no,yes" textline " " bitfld.long 0x00 5. " int5 (Timer[2] Time-stamp) ,Timer[2], Time-stamp interrupt" "no,yes" bitfld.long 0x00 4. " int4 (Timer[1]) ,Timer[1] interrupt" "no,yes" textline " " bitfld.long 0x00 3. " int3 (Timer[0]) ,Timer[0] interrupt" "no,yes" bitfld.long 0x00 2. " int2 (NPE1 npe_trigger) ,NPE1 npe_trigger interrupt" "no,yes" textline " " bitfld.long 0x00 1. " int1 (NPE1 Dbg/Exec/MBox) ,NPE1 Debug/Execution/MBox interrupt" "no,yes" bitfld.long 0x00 0. " int0 (NPE0 Dbg/Exec/MBox) ,NPE0 Debug/Execution/MBox interrupt" "no,yes" group ASD:(0xc8003000+0x04)++0x03 line.long 0x00 "INTR_ST2,Interrupt Status Register 2" bitfld.long 0x00 23. " int55 (Shac Ring Full[11]) ,Shac Ring Full[11] interrupt" "no,yes" bitfld.long 0x00 22. " int54 (Shac Ring Full[10]) ,Shac Ring Full[10] interrupt" "no,yes" textline " " bitfld.long 0x00 21. " int53 (Shac Ring Full[9]) ,Shac Ring Full[9] interrupt" "no,yes" bitfld.long 0x00 20. " int52 (Shac Ring Full[8]) ,Shac Ring Full[8] interrupt" "no,yes" textline " " bitfld.long 0x00 19. " int51 (Shac Ring Full[7]) ,Shac Ring Full[7] interrupt" "no,yes" bitfld.long 0x00 18. " int50 (Shac Ring Full[6]) ,Shac Ring Full[6] interrupt" "no,yes" textline " " bitfld.long 0x00 17. " int49 (Shac Ring Full[5]) ,Shac Ring Full[5] interrupt" "no,yes" bitfld.long 0x00 16. " int48 (Shac Ring Full[4]) ,Shac Ring Full[4] interrupt" "no,yes" textline " " bitfld.long 0x00 15. " int47 (Shac Ring Full[3]) ,Shac Ring Full[3] interrupt" "no,yes" bitfld.long 0x00 14. " int46 (Shac Ring Full[2]) ,Shac Ring Full[2] interrupt" "no,yes" textline " " bitfld.long 0x00 13. " int45 (Shac Ring Full[1]) ,Shac Ring Full[1] interrupt" "no,yes" bitfld.long 0x00 12. " int44 (Shac Ring Full[0]) ,Shac Ring Full[0] interrupt" "no,yes" textline " " bitfld.long 0x00 11. " int43 (GPIO[15]) ,GPIO[15] interrupt" "no,yes" bitfld.long 0x00 10. " int42 (GPIO[14]) ,GPIO[14] interrupt" "no,yes" textline " " bitfld.long 0x00 9. " int41 (GPIO[13]) ,GPIO[13] interrupt" "no,yes" bitfld.long 0x00 8. " int40 (GPIO[12]) ,GPIO[12] interrupt" "no,yes" textline " " bitfld.long 0x00 7. " int39 (GPIO[11]) ,GPIO[11] interrupt" "no,yes" bitfld.long 0x00 6. " int38 (GPIO[10]) ,GPIO[10] interrupt" "no,yes" textline " " bitfld.long 0x00 5. " int37 (GPIO[9]) ,GPIO[9] interrupt" "no,yes" bitfld.long 0x00 4. " int36 (GPIO[8]) ,GPIO[8] interrupt" "no,yes" textline " " bitfld.long 0x00 3. " int35 (GPIO[7]) ,GPIO[7] interrupt" "no,yes" bitfld.long 0x00 2. " int34 (GPIO[6]) ,GPIO[6] interrupt" "no,yes" textline " " bitfld.long 0x00 1. " int33 (XSI-DDR MCU) ,XSI-DDR MCU interrupt" "no,yes" bitfld.long 0x00 0. " int32 (MSF MEDIA_ERR) ,MSF MEDIA_ERR interrupt" "no,yes" group ASD:(0xc8003000+0x08)++0x03 line.long 0x00 "INTR_ST3,Interrupt Status Register 3" bitfld.long 0x00 31. " ME3 Thread A CTX[7] ,ME3 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 23. " ME2 Thread A CTX[7] ,ME2 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 15. " ME1 Thread A CTX[7] ,ME1 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 7. " ME0 Thread A CTX[7] ,ME0 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread A interrupt" "no,yes" group ASD:(0xc8003000+0xc)++0x03 line.long 0x00 "INTR_ST4,Interrupt Status Register 4" bitfld.long 0x00 31. " ME3 Thread B CTX[7] ,ME3 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 23. " ME2 Thread B CTX[7] ,ME2 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 15. " ME1 Thread B CTX[7] ,ME1 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 7. " ME0 Thread B CTX[7] ,ME0 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread B interrupt" "no,yes" group ASD:(0xc8003000+0x10)++0x03 line.long 0x00 "INTR_EN1,Interrupt Enable Register 1" bitfld.long 0x00 31. " int31 (SRAM0_ERR) ,SRAM0_ERR interrupt" "dis,ena" bitfld.long 0x00 30. " int30 (SRAM1_ERR) ,SRAM1_ERR interrupt" "dis,ena" textline " " bitfld.long 0x00 29. " int29 (D0XG_DRAM_ECC_UNCORR) ,CPP DRAM0 D0XG_DRAM_ECC_UNCORR interrupt" "dis,ena" bitfld.long 0x00 28. " int28 (D0XG_DRAM_ECC_CORR) ,CPP DRAM0 D0XG_DRAM_ECC_CORR interrupt" "dis,ena" textline " " bitfld.long 0x00 27. " int27 (PCXG_PCI_ERR_RPH) ,PCXG_PCI_ERR_RPH interrupt" "dis,ena" bitfld.long 0x00 26. " int26 (ME_ATTN3) ,ME_ATTN3 interrupt" "dis,ena" textline " " bitfld.long 0x00 25. " int25 (ME_ATTN2) ,ME_ATTN2 interrupt" "dis,ena" bitfld.long 0x00 24. " int24 (ME_ATTN1) ,ME_ATTN1 interrupt" "dis,ena" textline " " bitfld.long 0x00 23. " int23 (ME_ATTN0) ,ME_ATTN0 interrupt" "dis,ena" bitfld.long 0x00 22. " int22 (CPP2XSI Bridge) ,CPP2XSI Bridge Interrupt interrupt" "dis,ena" textline " " bitfld.long 0x00 21. " int21 (XSI2CPP Bridge) ,XSI2CPP Bridge interrupt" "dis,ena" bitfld.long 0x00 20. " int20 (XSI2AHB Bridge) ,xsi/ahb gasket: XSI2AHB Bridge interrupt" "dis,ena" textline " " bitfld.long 0x00 19. " int19 (ece) ,xsi/ahb gasket: Intel XScale core Core ece interrupt" "dis,ena" bitfld.long 0x00 18. " int18 (PM) ,xsi/ahb gasket: Intel XScale core Core PM interrupt" "dis,ena" textline " " bitfld.long 0x00 17. " int17 (XSI PMU) ,XSI PMU AHB Performance Monitoring Unit counter rollover interrupt" "dis,ena" bitfld.long 0x00 16. " int16 (UART0) ,UART0 interrupt" "dis,ena" textline " " bitfld.long 0x00 15. " int15 (UART1) ,UART1 interrupt" "dis,ena" bitfld.long 0x00 14. " int14 (S/W interrupt1) ,S/W interrupt1" "dis,ena" textline " " bitfld.long 0x00 13. " int13 (S/W interrupt0) ,S/W interrupt0" "dis,ena" bitfld.long 0x00 12. " int12 (PMUN) ,PMUN Interrupt" "dis,ena" textline " " bitfld.long 0x00 11. " int11 (PCI) ,PCI interrupt" "dis,ena" bitfld.long 0x00 10. " int10 (PCI DMA Channel 3) ,PCI DMA Channel 3 interrupt" "dis,ena" textline " " bitfld.long 0x00 9. " int9 (PCI DMA Channel 2) ,PCI DMA Channel 2 interrupt" "dis,ena" bitfld.long 0x00 8. " int8 (PCI DMA Channel 1) ,PCI DMA Channel 1 interrupt" "dis,ena" textline " " bitfld.long 0x00 7. " int7 (PCI Doorbell) ,PCI Doorbell interrupt" "dis,ena" bitfld.long 0x00 6. " int6 (Time[3] Watchdog) ,Time[3], Watchdog Timer interrupt" "dis,ena" textline " " bitfld.long 0x00 5. " int5 (Timer[2] Time-stamp) ,Timer[2], Time-stamp interrupt" "dis,ena" bitfld.long 0x00 4. " int4 (Timer[1]) ,Timer[1] interrupt" "dis,ena" textline " " bitfld.long 0x00 3. " int3 (Timer[0]) ,Timer[0] interrupt" "dis,ena" bitfld.long 0x00 2. " int2 (NPE1 npe_trigger) ,NPE1 npe_trigger interrupt" "dis,ena" textline " " bitfld.long 0x00 1. " int1 (NPE1 Dbg/Exec/MBox) ,NPE1 Debug/Execution/MBox interrupt" "dis,ena" bitfld.long 0x00 0. " int0 (NPE0 Dbg/Exec/MBox) ,NPE0 Debug/Execution/MBox interrupt" "dis,ena" group ASD:(0xc8003000+0x14)++0x03 line.long 0x00 "INTR_EN2,Interrupt Enable Register 2" bitfld.long 0x00 23. " int55 (Shac Ring Full[11]) ,Shac Ring Full[11] interrupt" "dis,ena" bitfld.long 0x00 22. " int54 (Shac Ring Full[10]) ,Shac Ring Full[10] interrupt" "dis,ena" textline " " bitfld.long 0x00 21. " int53 (Shac Ring Full[9]) ,Shac Ring Full[9] interrupt" "dis,ena" bitfld.long 0x00 20. " int52 (Shac Ring Full[8]) ,Shac Ring Full[8] interrupt" "dis,ena" textline " " bitfld.long 0x00 19. " int51 (Shac Ring Full[7]) ,Shac Ring Full[7] interrupt" "dis,ena" bitfld.long 0x00 18. " int50 (Shac Ring Full[6]) ,Shac Ring Full[6] interrupt" "dis,ena" textline " " bitfld.long 0x00 17. " int49 (Shac Ring Full[5]) ,Shac Ring Full[5] interrupt" "dis,ena" bitfld.long 0x00 16. " int48 (Shac Ring Full[4]) ,Shac Ring Full[4] interrupt" "dis,ena" textline " " bitfld.long 0x00 15. " int47 (Shac Ring Full[3]) ,Shac Ring Full[3] interrupt" "dis,ena" bitfld.long 0x00 14. " int46 (Shac Ring Full[2]) ,Shac Ring Full[2] interrupt" "dis,ena" textline " " bitfld.long 0x00 13. " int45 (Shac Ring Full[1]) ,Shac Ring Full[1] interrupt" "dis,ena" bitfld.long 0x00 12. " int44 (Shac Ring Full[0]) ,Shac Ring Full[0] interrupt" "dis,ena" textline " " bitfld.long 0x00 11. " int43 (GPIO[15]) ,GPIO[15] interrupt" "dis,ena" bitfld.long 0x00 10. " int42 (GPIO[14]) ,GPIO[14] interrupt" "dis,ena" textline " " bitfld.long 0x00 9. " int41 (GPIO[13]) ,GPIO[13] interrupt" "dis,ena" bitfld.long 0x00 8. " int40 (GPIO[12]) ,GPIO[12] interrupt" "dis,ena" textline " " bitfld.long 0x00 7. " int39 (GPIO[11]) ,GPIO[11] interrupt" "dis,ena" bitfld.long 0x00 6. " int38 (GPIO[10]) ,GPIO[10] interrupt" "dis,ena" textline " " bitfld.long 0x00 5. " int37 (GPIO[9]) ,GPIO[9] interrupt" "dis,ena" bitfld.long 0x00 4. " int36 (GPIO[8]) ,GPIO[8] interrupt" "dis,ena" textline " " bitfld.long 0x00 3. " int35 (GPIO[7]) ,GPIO[7] interrupt" "dis,ena" bitfld.long 0x00 2. " int34 (GPIO[6]) ,GPIO[6] interrupt" "dis,ena" textline " " bitfld.long 0x00 1. " int33 (XSI-DDR MCU) ,XSI-DDR MCU interrupt" "dis,ena" bitfld.long 0x00 0. " int32 (MSF MEDIA_ERR) ,MSF MEDIA_ERR interrupt" "dis,ena" group ASD:(0xc8003000+0x18)++0x03 line.long 0x00 "INTR_EN3,Interrupt Enable Register 3" bitfld.long 0x00 31. " ME3 Thread A CTX[7] ,ME3 CTX[7] Thread A interrupt" "dis,ena" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread A interrupt" "dis,ena" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread A interrupt" "dis,ena" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread A interrupt" "dis,ena" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread A interrupt" "dis,ena" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread A interrupt" "dis,ena" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 23. " ME2 Thread A CTX[7] ,ME2 CTX[7] Thread A interrupt" "dis,ena" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread A interrupt" "dis,ena" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread A interrupt" "dis,ena" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread A interrupt" "dis,ena" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread A interrupt" "dis,ena" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread A interrupt" "dis,ena" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 15. " ME1 Thread A CTX[7] ,ME1 CTX[7] Thread A interrupt" "dis,ena" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread A interrupt" "dis,ena" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread A interrupt" "dis,ena" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread A interrupt" "dis,ena" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread A interrupt" "dis,ena" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread A interrupt" "dis,ena" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 7. " ME0 Thread A CTX[7] ,ME0 CTX[7] Thread A interrupt" "dis,ena" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread A interrupt" "dis,ena" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread A interrupt" "dis,ena" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread A interrupt" "dis,ena" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread A interrupt" "dis,ena" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread A interrupt" "dis,ena" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread A interrupt" "dis,ena" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread A interrupt" "dis,ena" group ASD:(0xc8003000+0x1c)++0x03 line.long 0x00 "INTR_EN4,Interrupt Enable Register 4" bitfld.long 0x00 31. " ME3 Thread B CTX[7] ,ME3 CTX[7] Thread B interrupt" "dis,ena" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread B interrupt" "dis,ena" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread B interrupt" "dis,ena" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread B interrupt" "dis,ena" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread B interrupt" "dis,ena" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread B interrupt" "dis,ena" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 23. " ME2 Thread B CTX[7] ,ME2 CTX[7] Thread B interrupt" "dis,ena" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread B interrupt" "dis,ena" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread B interrupt" "dis,ena" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread B interrupt" "dis,ena" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread B interrupt" "dis,ena" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread B interrupt" "dis,ena" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 15. " ME1 Thread B CTX[7] ,ME1 CTX[7] Thread B interrupt" "dis,ena" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread B interrupt" "dis,ena" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread B interrupt" "dis,ena" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread B interrupt" "dis,ena" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread B interrupt" "dis,ena" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread B interrupt" "dis,ena" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 7. " ME0 Thread B CTX[7] ,ME0 CTX[7] Thread B interrupt" "dis,ena" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread B interrupt" "dis,ena" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread B interrupt" "dis,ena" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread B interrupt" "dis,ena" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread B interrupt" "dis,ena" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread B interrupt" "dis,ena" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread B interrupt" "dis,ena" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread B interrupt" "dis,ena" group ASD:(0xc8003000+0x20)++0x03 line.long 0x00 "INTR_SEL1,Interrupt Select Register 1" bitfld.long 0x00 31. " int31 (SRAM0_ERR) ,SRAM0_ERR interrupt" "IRQ,FIQ" bitfld.long 0x00 30. " int30 (SRAM1_ERR) ,SRAM1_ERR interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 29. " int29 (D0XG_DRAM_ECC_UNCORR) ,CPP DRAM0 D0XG_DRAM_ECC_UNCORR interrupt" "IRQ,FIQ" bitfld.long 0x00 28. " int28 (D0XG_DRAM_ECC_CORR) ,CPP DRAM0 D0XG_DRAM_ECC_CORR interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 27. " int27 (PCXG_PCI_ERR_RPH) ,PCXG_PCI_ERR_RPH interrupt" "IRQ,FIQ" bitfld.long 0x00 26. " int26 (ME_ATTN3) ,ME_ATTN3 interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " int25 (ME_ATTN2) ,ME_ATTN2 interrupt" "IRQ,FIQ" bitfld.long 0x00 24. " int24 (ME_ATTN1) ,ME_ATTN1 interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 23. " int23 (ME_ATTN0) ,ME_ATTN0 interrupt" "IRQ,FIQ" bitfld.long 0x00 22. " int22 (CPP2XSI Bridge) ,CPP2XSI Bridge Interrupt interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 21. " int21 (XSI2CPP Bridge) ,XSI2CPP Bridge interrupt" "IRQ,FIQ" bitfld.long 0x00 20. " int20 (XSI2AHB Bridge) ,xsi/ahb gasket: XSI2AHB Bridge interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " int19 (ece) ,xsi/ahb gasket: Intel XScale core Core ece interrupt" "IRQ,FIQ" bitfld.long 0x00 18. " int18 (PM) ,xsi/ahb gasket: Intel XScale core Core PM interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 17. " int17 (XSI PMU) ,XSI PMU AHB Performance Monitoring Unit counter rollover interrupt" "IRQ,FIQ" bitfld.long 0x00 16. " int16 (UART0) ,UART0 interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 15. " int15 (UART1) ,UART1 interrupt" "IRQ,FIQ" bitfld.long 0x00 14. " int14 (S/W interrupt1) ,S/W interrupt1" "IRQ,FIQ" textline " " bitfld.long 0x00 13. " int13 (S/W interrupt0) ,S/W interrupt0" "IRQ,FIQ" bitfld.long 0x00 12. " int12 (PMUN) ,PMUN Interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 11. " int11 (PCI) ,PCI interrupt" "IRQ,FIQ" bitfld.long 0x00 10. " int10 (PCI DMA Channel 3) ,PCI DMA Channel 3 interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 9. " int9 (PCI DMA Channel 2) ,PCI DMA Channel 2 interrupt" "IRQ,FIQ" bitfld.long 0x00 8. " int8 (PCI DMA Channel 1) ,PCI DMA Channel 1 interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " int7 (PCI Doorbell) ,PCI Doorbell interrupt" "IRQ,FIQ" bitfld.long 0x00 6. " int6 (Time[3] Watchdog) ,Time[3], Watchdog Timer interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 5. " int5 (Timer[2] Time-stamp) ,Timer[2], Time-stamp interrupt" "IRQ,FIQ" bitfld.long 0x00 4. " int4 (Timer[1]) ,Timer[1] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 3. " int3 (Timer[0]) ,Timer[0] interrupt" "IRQ,FIQ" bitfld.long 0x00 2. " int2 (NPE1 npe_trigger) ,NPE1 npe_trigger interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 1. " int1 (NPE1 Dbg/Exec/MBox) ,NPE1 Debug/Execution/MBox interrupt" "IRQ,FIQ" bitfld.long 0x00 0. " int0 (NPE0 Dbg/Exec/MBox) ,NPE0 Debug/Execution/MBox interrupt" "IRQ,FIQ" group ASD:(0xc8003000+0x24)++0x03 line.long 0x00 "INTR_SEL2,Interrupt Select Register 2" bitfld.long 0x00 23. " int55 (Shac Ring Full[11]) ,Shac Ring Full[11] interrupt" "IRQ,FIQ" bitfld.long 0x00 22. " int54 (Shac Ring Full[10]) ,Shac Ring Full[10] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 21. " int53 (Shac Ring Full[9]) ,Shac Ring Full[9] interrupt" "IRQ,FIQ" bitfld.long 0x00 20. " int52 (Shac Ring Full[8]) ,Shac Ring Full[8] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " int51 (Shac Ring Full[7]) ,Shac Ring Full[7] interrupt" "IRQ,FIQ" bitfld.long 0x00 18. " int50 (Shac Ring Full[6]) ,Shac Ring Full[6] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 17. " int49 (Shac Ring Full[5]) ,Shac Ring Full[5] interrupt" "IRQ,FIQ" bitfld.long 0x00 16. " int48 (Shac Ring Full[4]) ,Shac Ring Full[4] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 15. " int47 (Shac Ring Full[3]) ,Shac Ring Full[3] interrupt" "IRQ,FIQ" bitfld.long 0x00 14. " int46 (Shac Ring Full[2]) ,Shac Ring Full[2] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 13. " int45 (Shac Ring Full[1]) ,Shac Ring Full[1] interrupt" "IRQ,FIQ" bitfld.long 0x00 12. " int44 (Shac Ring Full[0]) ,Shac Ring Full[0] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 11. " int43 (GPIO[15]) ,GPIO[15] interrupt" "IRQ,FIQ" bitfld.long 0x00 10. " int42 (GPIO[14]) ,GPIO[14] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 9. " int41 (GPIO[13]) ,GPIO[13] interrupt" "IRQ,FIQ" bitfld.long 0x00 8. " int40 (GPIO[12]) ,GPIO[12] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " int39 (GPIO[11]) ,GPIO[11] interrupt" "IRQ,FIQ" bitfld.long 0x00 6. " int38 (GPIO[10]) ,GPIO[10] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 5. " int37 (GPIO[9]) ,GPIO[9] interrupt" "IRQ,FIQ" bitfld.long 0x00 4. " int36 (GPIO[8]) ,GPIO[8] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 3. " int35 (GPIO[7]) ,GPIO[7] interrupt" "IRQ,FIQ" bitfld.long 0x00 2. " int34 (GPIO[6]) ,GPIO[6] interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 1. " int33 (XSI-DDR MCU) ,XSI-DDR MCU interrupt" "IRQ,FIQ" bitfld.long 0x00 0. " int32 (MSF MEDIA_ERR) ,MSF MEDIA_ERR interrupt" "IRQ,FIQ" group ASD:(0xc8003000+0x28)++0x03 line.long 0x00 "INTR_SEL3,Interrupt Select Register 3" bitfld.long 0x00 31. " ME3 Thread A CTX[7] ,ME3 CTX[7] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 23. " ME2 Thread A CTX[7] ,ME2 CTX[7] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 15. " ME1 Thread A CTX[7] ,ME1 CTX[7] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " ME0 Thread A CTX[7] ,ME0 CTX[7] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread A interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread A interrupt" "IRQ,FIQ" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread A interrupt" "IRQ,FIQ" group ASD:(0xc8003000+0x2c)++0x03 line.long 0x00 "INTR_SEL4,Interrupt Select Register 4" bitfld.long 0x00 31. " ME3 Thread B CTX[7] ,ME3 CTX[7] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 23. " ME2 Thread B CTX[7] ,ME2 CTX[7] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 15. " ME1 Thread B CTX[7] ,ME1 CTX[7] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " ME0 Thread B CTX[7] ,ME0 CTX[7] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread B interrupt" "IRQ,FIQ" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread B interrupt" "IRQ,FIQ" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread B interrupt" "IRQ,FIQ" group ASD:(0xc8003000+0x30)++0x03 line.long 0x00 "INTR_IRQ_ST1,IRQ Active Status Register 1" bitfld.long 0x00 31. " int31 (SRAM0_ERR) ,SRAM0_ERR interrupt" "no,yes" bitfld.long 0x00 30. " int30 (SRAM1_ERR) ,SRAM1_ERR interrupt" "no,yes" textline " " bitfld.long 0x00 29. " int29 (D0XG_DRAM_ECC_UNCORR) ,CPP DRAM0 D0XG_DRAM_ECC_UNCORR interrupt" "no,yes" bitfld.long 0x00 28. " int28 (D0XG_DRAM_ECC_CORR) ,CPP DRAM0 D0XG_DRAM_ECC_CORR interrupt" "no,yes" textline " " bitfld.long 0x00 27. " int27 (PCXG_PCI_ERR_RPH) ,PCXG_PCI_ERR_RPH interrupt" "no,yes" bitfld.long 0x00 26. " int26 (ME_ATTN3) ,ME_ATTN3 interrupt" "no,yes" textline " " bitfld.long 0x00 25. " int25 (ME_ATTN2) ,ME_ATTN2 interrupt" "no,yes" bitfld.long 0x00 24. " int24 (ME_ATTN1) ,ME_ATTN1 interrupt" "no,yes" textline " " bitfld.long 0x00 23. " int23 (ME_ATTN0) ,ME_ATTN0 interrupt" "no,yes" bitfld.long 0x00 22. " int22 (CPP2XSI Bridge) ,CPP2XSI Bridge Interrupt interrupt" "no,yes" textline " " bitfld.long 0x00 21. " int21 (XSI2CPP Bridge) ,XSI2CPP Bridge interrupt" "no,yes" bitfld.long 0x00 20. " int20 (XSI2AHB Bridge) ,xsi/ahb gasket: XSI2AHB Bridge interrupt" "no,yes" textline " " bitfld.long 0x00 19. " int19 (ece) ,xsi/ahb gasket: Intel XScale core Core ece interrupt" "no,yes" bitfld.long 0x00 18. " int18 (PM) ,xsi/ahb gasket: Intel XScale core Core PM interrupt" "no,yes" textline " " bitfld.long 0x00 17. " int17 (XSI PMU) ,XSI PMU AHB Performance Monitoring Unit counter rollover interrupt" "no,yes" bitfld.long 0x00 16. " int16 (UART0) ,UART0 interrupt" "no,yes" textline " " bitfld.long 0x00 15. " int15 (UART1) ,UART1 interrupt" "no,yes" bitfld.long 0x00 14. " int14 (S/W interrupt1) ,S/W interrupt1" "no,yes" textline " " bitfld.long 0x00 13. " int13 (S/W interrupt0) ,S/W interrupt0" "no,yes" bitfld.long 0x00 12. " int12 (PMUN) ,PMUN Interrupt" "no,yes" textline " " bitfld.long 0x00 11. " int11 (PCI) ,PCI interrupt" "no,yes" bitfld.long 0x00 10. " int10 (PCI DMA Channel 3) ,PCI DMA Channel 3 interrupt" "no,yes" textline " " bitfld.long 0x00 9. " int9 (PCI DMA Channel 2) ,PCI DMA Channel 2 interrupt" "no,yes" bitfld.long 0x00 8. " int8 (PCI DMA Channel 1) ,PCI DMA Channel 1 interrupt" "no,yes" textline " " bitfld.long 0x00 7. " int7 (PCI Doorbell) ,PCI Doorbell interrupt" "no,yes" bitfld.long 0x00 6. " int6 (Time[3] Watchdog) ,Time[3], Watchdog Timer interrupt" "no,yes" textline " " bitfld.long 0x00 5. " int5 (Timer[2] Time-stamp) ,Timer[2], Time-stamp interrupt" "no,yes" bitfld.long 0x00 4. " int4 (Timer[1]) ,Timer[1] interrupt" "no,yes" textline " " bitfld.long 0x00 3. " int3 (Timer[0]) ,Timer[0] interrupt" "no,yes" bitfld.long 0x00 2. " int2 (NPE1 npe_trigger) ,NPE1 npe_trigger interrupt" "no,yes" textline " " bitfld.long 0x00 1. " int1 (NPE1 Dbg/Exec/MBox) ,NPE1 Debug/Execution/MBox interrupt" "no,yes" bitfld.long 0x00 0. " int0 (NPE0 Dbg/Exec/MBox) ,NPE0 Debug/Execution/MBox interrupt" "no,yes" group ASD:(0xc8003000+0x34)++0x03 line.long 0x00 "INTR_IRQ_ST2,IRQ Active Status Register 2" bitfld.long 0x00 23. " int55 (Shac Ring Full[11]) ,Shac Ring Full[11] interrupt" "no,yes" bitfld.long 0x00 22. " int54 (Shac Ring Full[10]) ,Shac Ring Full[10] interrupt" "no,yes" textline " " bitfld.long 0x00 21. " int53 (Shac Ring Full[9]) ,Shac Ring Full[9] interrupt" "no,yes" bitfld.long 0x00 20. " int52 (Shac Ring Full[8]) ,Shac Ring Full[8] interrupt" "no,yes" textline " " bitfld.long 0x00 19. " int51 (Shac Ring Full[7]) ,Shac Ring Full[7] interrupt" "no,yes" bitfld.long 0x00 18. " int50 (Shac Ring Full[6]) ,Shac Ring Full[6] interrupt" "no,yes" textline " " bitfld.long 0x00 17. " int49 (Shac Ring Full[5]) ,Shac Ring Full[5] interrupt" "no,yes" bitfld.long 0x00 16. " int48 (Shac Ring Full[4]) ,Shac Ring Full[4] interrupt" "no,yes" textline " " bitfld.long 0x00 15. " int47 (Shac Ring Full[3]) ,Shac Ring Full[3] interrupt" "no,yes" bitfld.long 0x00 14. " int46 (Shac Ring Full[2]) ,Shac Ring Full[2] interrupt" "no,yes" textline " " bitfld.long 0x00 13. " int45 (Shac Ring Full[1]) ,Shac Ring Full[1] interrupt" "no,yes" bitfld.long 0x00 12. " int44 (Shac Ring Full[0]) ,Shac Ring Full[0] interrupt" "no,yes" textline " " bitfld.long 0x00 11. " int43 (GPIO[15]) ,GPIO[15] interrupt" "no,yes" bitfld.long 0x00 10. " int42 (GPIO[14]) ,GPIO[14] interrupt" "no,yes" textline " " bitfld.long 0x00 9. " int41 (GPIO[13]) ,GPIO[13] interrupt" "no,yes" bitfld.long 0x00 8. " int40 (GPIO[12]) ,GPIO[12] interrupt" "no,yes" textline " " bitfld.long 0x00 7. " int39 (GPIO[11]) ,GPIO[11] interrupt" "no,yes" bitfld.long 0x00 6. " int38 (GPIO[10]) ,GPIO[10] interrupt" "no,yes" textline " " bitfld.long 0x00 5. " int37 (GPIO[9]) ,GPIO[9] interrupt" "no,yes" bitfld.long 0x00 4. " int36 (GPIO[8]) ,GPIO[8] interrupt" "no,yes" textline " " bitfld.long 0x00 3. " int35 (GPIO[7]) ,GPIO[7] interrupt" "no,yes" bitfld.long 0x00 2. " int34 (GPIO[6]) ,GPIO[6] interrupt" "no,yes" textline " " bitfld.long 0x00 1. " int33 (XSI-DDR MCU) ,XSI-DDR MCU interrupt" "no,yes" bitfld.long 0x00 0. " int32 (MSF MEDIA_ERR) ,MSF MEDIA_ERR interrupt" "no,yes" group ASD:(0xc8003000+0x38)++0x03 line.long 0x00 "INTR_IRQ_ST3,IRQ Active Status Register 3" bitfld.long 0x00 31. " ME3 Thread A CTX[7] ,ME3 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 23. " ME2 Thread A CTX[7] ,ME2 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 15. " ME1 Thread A CTX[7] ,ME1 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 7. " ME0 Thread A CTX[7] ,ME0 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread A interrupt" "no,yes" group ASD:(0xc8003000+0x3c)++0x03 line.long 0x00 "INTR_IRQ_ST4,IRQ Active Status Register 4" bitfld.long 0x00 31. " ME3 Thread B CTX[7] ,ME3 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 23. " ME2 Thread B CTX[7] ,ME2 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 15. " ME1 Thread B CTX[7] ,ME1 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 7. " ME0 Thread B CTX[7] ,ME0 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread B interrupt" "no,yes" group ASD:(0xc8003000+0x40)++0x03 line.long 0x00 "INTR_FIQ_ST1,FIQ Active Status Register 1" bitfld.long 0x00 31. " int31 (SRAM0_ERR) ,SRAM0_ERR interrupt" "no,yes" bitfld.long 0x00 30. " int30 (SRAM1_ERR) ,SRAM1_ERR interrupt" "no,yes" textline " " bitfld.long 0x00 29. " int29 (D0XG_DRAM_ECC_UNCORR) ,CPP DRAM0 D0XG_DRAM_ECC_UNCORR interrupt" "no,yes" bitfld.long 0x00 28. " int28 (D0XG_DRAM_ECC_CORR) ,CPP DRAM0 D0XG_DRAM_ECC_CORR interrupt" "no,yes" textline " " bitfld.long 0x00 27. " int27 (PCXG_PCI_ERR_RPH) ,PCXG_PCI_ERR_RPH interrupt" "no,yes" bitfld.long 0x00 26. " int26 (ME_ATTN3) ,ME_ATTN3 interrupt" "no,yes" textline " " bitfld.long 0x00 25. " int25 (ME_ATTN2) ,ME_ATTN2 interrupt" "no,yes" bitfld.long 0x00 24. " int24 (ME_ATTN1) ,ME_ATTN1 interrupt" "no,yes" textline " " bitfld.long 0x00 23. " int23 (ME_ATTN0) ,ME_ATTN0 interrupt" "no,yes" bitfld.long 0x00 22. " int22 (CPP2XSI Bridge) ,CPP2XSI Bridge Interrupt interrupt" "no,yes" textline " " bitfld.long 0x00 21. " int21 (XSI2CPP Bridge) ,XSI2CPP Bridge interrupt" "no,yes" bitfld.long 0x00 20. " int20 (XSI2AHB Bridge) ,xsi/ahb gasket: XSI2AHB Bridge interrupt" "no,yes" textline " " bitfld.long 0x00 19. " int19 (ece) ,xsi/ahb gasket: Intel XScale core Core ece interrupt" "no,yes" bitfld.long 0x00 18. " int18 (PM) ,xsi/ahb gasket: Intel XScale core Core PM interrupt" "no,yes" textline " " bitfld.long 0x00 17. " int17 (XSI PMU) ,XSI PMU AHB Performance Monitoring Unit counter rollover interrupt" "no,yes" bitfld.long 0x00 16. " int16 (UART0) ,UART0 interrupt" "no,yes" textline " " bitfld.long 0x00 15. " int15 (UART1) ,UART1 interrupt" "no,yes" bitfld.long 0x00 14. " int14 (S/W interrupt1) ,S/W interrupt1" "no,yes" textline " " bitfld.long 0x00 13. " int13 (S/W interrupt0) ,S/W interrupt0" "no,yes" bitfld.long 0x00 12. " int12 (PMUN) ,PMUN Interrupt" "no,yes" textline " " bitfld.long 0x00 11. " int11 (PCI) ,PCI interrupt" "no,yes" bitfld.long 0x00 10. " int10 (PCI DMA Channel 3) ,PCI DMA Channel 3 interrupt" "no,yes" textline " " bitfld.long 0x00 9. " int9 (PCI DMA Channel 2) ,PCI DMA Channel 2 interrupt" "no,yes" bitfld.long 0x00 8. " int8 (PCI DMA Channel 1) ,PCI DMA Channel 1 interrupt" "no,yes" textline " " bitfld.long 0x00 7. " int7 (PCI Doorbell) ,PCI Doorbell interrupt" "no,yes" bitfld.long 0x00 6. " int6 (Time[3] Watchdog) ,Time[3], Watchdog Timer interrupt" "no,yes" textline " " bitfld.long 0x00 5. " int5 (Timer[2] Time-stamp) ,Timer[2], Time-stamp interrupt" "no,yes" bitfld.long 0x00 4. " int4 (Timer[1]) ,Timer[1] interrupt" "no,yes" textline " " bitfld.long 0x00 3. " int3 (Timer[0]) ,Timer[0] interrupt" "no,yes" bitfld.long 0x00 2. " int2 (NPE1 npe_trigger) ,NPE1 npe_trigger interrupt" "no,yes" textline " " bitfld.long 0x00 1. " int1 (NPE1 Dbg/Exec/MBox) ,NPE1 Debug/Execution/MBox interrupt" "no,yes" bitfld.long 0x00 0. " int0 (NPE0 Dbg/Exec/MBox) ,NPE0 Debug/Execution/MBox interrupt" "no,yes" group ASD:(0xc8003000+0x44)++0x03 line.long 0x00 "INTR_FIQ_ST2,FIQ Active Status Register 2" bitfld.long 0x00 23. " int55 (Shac Ring Full[11]) ,Shac Ring Full[11] interrupt" "no,yes" bitfld.long 0x00 22. " int54 (Shac Ring Full[10]) ,Shac Ring Full[10] interrupt" "no,yes" textline " " bitfld.long 0x00 21. " int53 (Shac Ring Full[9]) ,Shac Ring Full[9] interrupt" "no,yes" bitfld.long 0x00 20. " int52 (Shac Ring Full[8]) ,Shac Ring Full[8] interrupt" "no,yes" textline " " bitfld.long 0x00 19. " int51 (Shac Ring Full[7]) ,Shac Ring Full[7] interrupt" "no,yes" bitfld.long 0x00 18. " int50 (Shac Ring Full[6]) ,Shac Ring Full[6] interrupt" "no,yes" textline " " bitfld.long 0x00 17. " int49 (Shac Ring Full[5]) ,Shac Ring Full[5] interrupt" "no,yes" bitfld.long 0x00 16. " int48 (Shac Ring Full[4]) ,Shac Ring Full[4] interrupt" "no,yes" textline " " bitfld.long 0x00 15. " int47 (Shac Ring Full[3]) ,Shac Ring Full[3] interrupt" "no,yes" bitfld.long 0x00 14. " int46 (Shac Ring Full[2]) ,Shac Ring Full[2] interrupt" "no,yes" textline " " bitfld.long 0x00 13. " int45 (Shac Ring Full[1]) ,Shac Ring Full[1] interrupt" "no,yes" bitfld.long 0x00 12. " int44 (Shac Ring Full[0]) ,Shac Ring Full[0] interrupt" "no,yes" textline " " bitfld.long 0x00 11. " int43 (GPIO[15]) ,GPIO[15] interrupt" "no,yes" bitfld.long 0x00 10. " int42 (GPIO[14]) ,GPIO[14] interrupt" "no,yes" textline " " bitfld.long 0x00 9. " int41 (GPIO[13]) ,GPIO[13] interrupt" "no,yes" bitfld.long 0x00 8. " int40 (GPIO[12]) ,GPIO[12] interrupt" "no,yes" textline " " bitfld.long 0x00 7. " int39 (GPIO[11]) ,GPIO[11] interrupt" "no,yes" bitfld.long 0x00 6. " int38 (GPIO[10]) ,GPIO[10] interrupt" "no,yes" textline " " bitfld.long 0x00 5. " int37 (GPIO[9]) ,GPIO[9] interrupt" "no,yes" bitfld.long 0x00 4. " int36 (GPIO[8]) ,GPIO[8] interrupt" "no,yes" textline " " bitfld.long 0x00 3. " int35 (GPIO[7]) ,GPIO[7] interrupt" "no,yes" bitfld.long 0x00 2. " int34 (GPIO[6]) ,GPIO[6] interrupt" "no,yes" textline " " bitfld.long 0x00 1. " int33 (XSI-DDR MCU) ,XSI-DDR MCU interrupt" "no,yes" bitfld.long 0x00 0. " int32 (MSF MEDIA_ERR) ,MSF MEDIA_ERR interrupt" "no,yes" group ASD:(0xc8003000+0x48)++0x03 line.long 0x00 "INTR_FIQ_ST3,FIQ Active Status Register 3" bitfld.long 0x00 31. " ME3 Thread A CTX[7] ,ME3 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 23. " ME2 Thread A CTX[7] ,ME2 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 15. " ME1 Thread A CTX[7] ,ME1 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 7. " ME0 Thread A CTX[7] ,ME0 CTX[7] Thread A interrupt" "no,yes" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread A interrupt" "no,yes" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread A interrupt" "no,yes" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread A interrupt" "no,yes" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread A interrupt" "no,yes" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread A interrupt" "no,yes" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread A interrupt" "no,yes" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread A interrupt" "no,yes" group ASD:(0xc8003000+0x4c)++0x03 line.long 0x00 "INTR_FIQ_ST4,FIQ Active Status Register 4" bitfld.long 0x00 31. " ME3 Thread B CTX[7] ,ME3 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 30. " CTX[6] ,ME3 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 29. " CTX[5] ,ME3 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 28. " CTX[4] ,ME3 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 27. " CTX[3] ,ME3 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 26. " CTX[2] ,ME3 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 25. " CTX[1] ,ME3 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 24. " CTX[0] ,ME3 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 23. " ME2 Thread B CTX[7] ,ME2 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 22. " CTX[6] ,ME2 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 21. " CTX[5] ,ME2 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 20. " CTX[4] ,ME2 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 19. " CTX[3] ,ME2 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 18. " CTX[2] ,ME2 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 17. " CTX[1] ,ME2 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 16. " CTX[0] ,ME2 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 15. " ME1 Thread B CTX[7] ,ME1 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 14. " CTX[6] ,ME1 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 13. " CTX[5] ,ME1 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 12. " CTX[4] ,ME1 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 11. " CTX[3] ,ME1 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 10. " CTX[2] ,ME1 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 9. " CTX[1] ,ME1 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 8. " CTX[0] ,ME1 CTX[0] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 7. " ME0 Thread B CTX[7] ,ME0 CTX[7] Thread B interrupt" "no,yes" bitfld.long 0x00 6. " CTX[6] ,ME0 CTX[6] Thread B interrupt" "no,yes" bitfld.long 0x00 5. " CTX[5] ,ME0 CTX[5] Thread B interrupt" "no,yes" bitfld.long 0x00 4. " CTX[4] ,ME0 CTX[4] Thread B interrupt" "no,yes" textline " " bitfld.long 0x00 3. " CTX[3] ,ME0 CTX[3] Thread B interrupt" "no,yes" bitfld.long 0x00 2. " CTX[2] ,ME0 CTX[2] Thread B interrupt" "no,yes" bitfld.long 0x00 1. " CTX[1] ,ME0 CTX[1] Thread B interrupt" "no,yes" bitfld.long 0x00 0. " CTX[0] ,ME0 CTX[0] Thread B interrupt" "no,yes" group ASD:(0xc8003000+0x50)++0x03 line.long 0x00 "INTR_PTY,interrupt Priority Register" bitfld.long 0x00 21.--23. " Prior_Intbus7 ,Set the priority on the Int7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " Prior_Intbus6 ,Set the priority on the Int6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. " Prior_Intbus5 ,Set the priority on the Int5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " Prior_Intbus4 ,Set the priority on the Int4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 09.--11. " Prior_Intbus3 ,Set the priority on the Int3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 06.--08. " Prior_Intbus2 ,Set the priority on the Int2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 03.--05. " Prior_Intbus1 ,Set the priority on the Int1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 00.--02. " Prior_Intbus0 ,Set the priority on the Int0" "0,1,2,3,4,5,6,7" group ASD:(0xc8003000+0x54)++0x03 line.long 0x00 "INTR_IRQ_ENC_ST,IRQ Encoded status Register" hexmask.long 0x00 02.--08. 0x01 " IRQ_ENC_ST ,Indicates the highest priority pending IRQ interrupt (interrupt number incremented by 1). A value of zero indicates that no interrupt is pending" group ASD:(0xc8003000+0x58)++0x03 line.long 0x00 "INTR_FIQ_ENC_ST,FIQ Encoded status Register" hexmask.long 0x00 02.--08. 0x01 " FIQ_ENC_ST ,Indicates the highest priority pending IRQ interrupt (interrupt number incremented by 1). A value of zero indicates that no interrupt is pending" group ASD:(0xc8003000+0x5c)++0x03 line.long 0x00 "ASYNC_SFTRST_N,Bridge Reset" bitfld.long 0x00 0. " Reset ,A write of 1 to this address will set the soft rest async_rstfst_n low, resetting the XSI-CPP bridge. A write of 0x0 will clear the reset" "deasserted,assert reset" width 8. tree.end ;end include file xscale/ixp23xx-int.ph ;begin include file xscale/ixp23xx-gpio.ph ;parameters: ASD: 0xc8004000 ; IXP2325, IXP2350 ; ; IXP23xx-GPIO %1 %2 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "GPIO" ; -------------------------------------------------------------------------------- width 12. group ASD:(0xc8004000+0x00)++0x03 line.long 0x00 "GPOUTR,GPIO pin data output register" bitfld.long 0x00 15. " DO15 ,GP15 Output Pin Set" "L,H" bitfld.long 0x00 14. " DO14 ,GP14 Output Pin Set" "L,H" bitfld.long 0x00 13. " DO13 ,GP13 Output Pin Set" "L,H" bitfld.long 0x00 12. " DO12 ,GP12 Output Pin Set" "L,H" textline " " bitfld.long 0x00 11. " DO11 ,GP11 Output Pin Set" "L,H" bitfld.long 0x00 10. " DO10 ,GP10 Output Pin Set" "L,H" bitfld.long 0x00 9. " DO7 ,GP7 Output Pin Set" "L,H" bitfld.long 0x00 8. " DO7 ,GP7 Output Pin Set" "L,H" textline " " bitfld.long 0x00 7. " DO7 ,GP7 Output Pin Set" "L,H" bitfld.long 0x00 6. " DO6 ,GP6 Output Pin Set" "L,H" bitfld.long 0x00 5. " DO5 ,GP5 Output Pin Set" "L,H" bitfld.long 0x00 4. " DO4 ,GP4 Output Pin Set" "L,H" textline " " bitfld.long 0x00 3. " DO3 ,GP3 Output Pin Set" "L,H" bitfld.long 0x00 2. " DO2 ,GP2 Output Pin Set" "L,H" bitfld.long 0x00 1. " DO1 ,GP1 Output Pin Set" "L,H" bitfld.long 0x00 0. " DO0 ,GP0 Output Pin Set" "L,H" group ASD:(0xc8004000+0x04)++0x03 line.long 0x00 "GPOER,GPIO pin out enable register" bitfld.long 0x00 15. " OE15 ,GP15 Output Enable" "ena,dis" bitfld.long 0x00 14. " OE14 ,GP14 Output Enable" "ena,dis" bitfld.long 0x00 13. " OE13 ,GP13 Output Enable" "ena,dis" bitfld.long 0x00 12. " OE12 ,GP12 Output Enable" "ena,dis" textline " " bitfld.long 0x00 11. " OE11 ,GP11 Output Enable" "ena,dis" bitfld.long 0x00 10. " OE10 ,GP10 Output Enable" "ena,dis" bitfld.long 0x00 9. " OE7 ,GP7 Output Enable" "ena,dis" bitfld.long 0x00 8. " OE7 ,GP7 Output Enable" "ena,dis" textline " " bitfld.long 0x00 7. " OE7 ,GP7 Output Enable" "ena,dis" bitfld.long 0x00 6. " OE6 ,GP6 Output Enable" "ena,dis" bitfld.long 0x00 5. " OE5 ,GP5 Output Enable" "ena,dis" bitfld.long 0x00 4. " OE4 ,GP4 Output Enable" "ena,dis" textline " " bitfld.long 0x00 3. " OE3 ,GP3 Output Enable" "ena,dis" bitfld.long 0x00 2. " OE2 ,GP2 Output Enable" "ena,dis" bitfld.long 0x00 1. " OE1 ,GP1 Output Enable" "ena,dis" bitfld.long 0x00 0. " OE0 ,GP0 Output Enable" "ena,dis" group ASD:(0xc8004000+0x08)++0x03 line.long 0x00 "GPINR,GPIO pin status register" bitfld.long 0x00 15. " IN_LVL15 ,GP15 Input Level" "L,H" bitfld.long 0x00 14. " IN_LVL14 ,GP14 Input Level" "L,H" bitfld.long 0x00 13. " IN_LVL13 ,GP13 Input Level" "L,H" bitfld.long 0x00 12. " IN_LVL12 ,GP12 Input Level" "L,H" textline " " bitfld.long 0x00 11. " IN_LVL11 ,GP11 Input Level" "L,H" bitfld.long 0x00 10. " IN_LVL10 ,GP10 Input Level" "L,H" bitfld.long 0x00 9. " IN_LVL7 ,GP7 Input Level" "L,H" bitfld.long 0x00 8. " IN_LVL7 ,GP7 Input Level" "L,H" textline " " bitfld.long 0x00 7. " IN_LVL7 ,GP7 Input Level" "L,H" bitfld.long 0x00 6. " IN_LVL6 ,GP6 Input Level" "L,H" bitfld.long 0x00 5. " IN_LVL5 ,GP5 Input Level" "L,H" bitfld.long 0x00 4. " IN_LVL4 ,GP4 Input Level" "L,H" textline " " bitfld.long 0x00 3. " IN_LVL3 ,GP3 Input Level" "L,H" bitfld.long 0x00 2. " IN_LVL2 ,GP2 Input Level" "L,H" bitfld.long 0x00 1. " IN_LVL1 ,GP1 Input Level" "L,H" bitfld.long 0x00 0. " IN_LVL0 ,GP0 Input Level" "L,H" group ASD:(0xc8004000+0x0c)++0x03 line.long 0x00 "GPISR,GPIO interrupt status register" bitfld.long 0x00 15. " INT_STAT15 ,GP15 Interrupt pending" "no,yes" bitfld.long 0x00 14. " INT_STAT14 ,GP14 Interrupt pending" "no,yes" bitfld.long 0x00 13. " INT_STAT13 ,GP13 Interrupt pending" "no,yes" bitfld.long 0x00 12. " INT_STAT12 ,GP12 Interrupt pending" "no,yes" textline " " bitfld.long 0x00 11. " INT_STAT11 ,GP11 Interrupt pending" "no,yes" bitfld.long 0x00 10. " INT_STAT10 ,GP10 Interrupt pending" "no,yes" bitfld.long 0x00 9. " INT_STAT7 ,GP7 Interrupt pending" "no,yes" bitfld.long 0x00 8. " INT_STAT7 ,GP7 Interrupt pending" "no,yes" textline " " bitfld.long 0x00 7. " INT_STAT7 ,GP7 Interrupt pending" "no,yes" bitfld.long 0x00 6. " INT_STAT6 ,GP6 Interrupt pending" "no,yes" bitfld.long 0x00 5. " INT_STAT5 ,GP5 Interrupt pending" "no,yes" bitfld.long 0x00 4. " INT_STAT4 ,GP4 Interrupt pending" "no,yes" textline " " bitfld.long 0x00 3. " INT_STAT3 ,GP3 Interrupt pending" "no,yes" bitfld.long 0x00 2. " INT_STAT2 ,GP2 Interrupt pending" "no,yes" bitfld.long 0x00 1. " INT_STAT1 ,GP1 Interrupt pending" "no,yes" bitfld.long 0x00 0. " INT_STAT0 ,GP0 Interrupt pending" "no,yes" group ASD:(0xc8004000+0x10)++0x03 line.long 0x00 "GPIT1R,GPIO interrupt type register for inputs 7:0" bitfld.long 0x00 21.--23. " GPIO7 ,Describes how to interpret GPIO7 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 18.--20. " GPIO6 ,Describes how to interpret GPIO6 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 15.--17. " GPIO5 ,Describes how to interpret GPIO5 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 12.--14. " GPIO4 ,Describes how to interpret GPIO4 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" textline " " bitfld.long 0x00 09.--11. " GPIO3 ,Describes how to interpret GPIO3 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 06.--08. " GPIO2 ,Describes how to interpret GPIO2 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 03.--05. " GPIO1 ,Describes how to interpret GPIO1 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 00.--02. " GPIO0 ,Describes how to interpret GPIO0 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" group ASD:(0xc8004000+0x14)++0x03 line.long 0x00 "GPIT2R,GPIO interrupt type register for inputs 7:0" bitfld.long 0x00 21.--23. " GPIO15 ,Describes how to interpret GPIO15 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 18.--20. " GPIO14 ,Describes how to interpret GPIO14 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 15.--17. " GPIO13 ,Describes how to interpret GPIO13 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 12.--14. " GPIO12 ,Describes how to interpret GPIO12 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" textline " " bitfld.long 0x00 09.--11. " GPIO11 ,Describes how to interpret GPIO11 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 06.--08. " GPIO10 ,Describes how to interpret GPIO10 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 03.--05. " GPIO9 ,Describes how to interpret GPIO9 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" bitfld.long 0x00 00.--02. " GPIO8 ,Describes how to interpret GPIO8 as interrupt" "Active High,Active Low,Rising Edge,Falling Edge,Transitional,Transitional,Transitional,Transitional" group ASD:(0xc8004000+0x18)++0x03 line.long 0x00 "GPCLKR,GPIO Clock control register" bitfld.long 0x00 24. " MUX15 ,GPIO15 MUX between the clock data and the data defined in GPOUTR" "Control from GPOUTR Register,Clock Output" bitfld.long 0x00 20.--23. " CLK1TC ,Terminal count for a 4 bit up counter @ PCLK. An F in this field and the CLK1DC field is a special case to provide PCLK/2" "dis,PCLK,PCLK*2,PCLK*3,PCLK*4,PCLK*5,PCLK*6,PCLK*7,PCLK*8,PCLK*9,PCLK*10,PCLK*11,PCLK*12,PCLK*13,PCLK*14,PCLK*15 or PCLK/2" bitfld.long 0x00 16.--19. " CLK1DC ,Represents the number of counts for which clock output should be low" "0clk,1clk,2clk,3clk,4clk,5clk,6clk,7clk,8clk,9clk,10clk,11clk,12clk,13clk,14clk,15clk" textline " " bitfld.long 0x00 8. " MUX14 ,GPIO14 MUX between the clock data and the data defined in GPOUTR" "Control from GPOUTR Register,Clock Output" bitfld.long 0x00 04.--07. " CLK0TC ,Terminal count for a 4 bit up counter @ PCLK. An F in this field and the CLK1DC field is a special case to provide PCLK/2" "dis,PCLK,PCLK*2,PCLK*3,PCLK*4,PCLK*5,PCLK*6,PCLK*7,PCLK*8,PCLK*9,PCLK*10,PCLK*11,PCLK*12,PCLK*13,PCLK*14,PCLK*15 or PCLK/2" bitfld.long 0x00 00.--03. " CLK0DC ,Represents the number of counts for which clock output should be low" "0clk,1clk,2clk,3clk,4clk,5clk,6clk,7clk,8clk,9clk,10clk,11clk,12clk,13clk,14clk,15clk" group ASD:(0xc8004000+0x1c)++0x03 line.long 0x00 "GPDSELR,GPIO Debug Mux Select Register" bitfld.long 0x00 2. " SEL2 ,Enable debug_in signals" "Control from the GPOUTR Register,Debug signals out" bitfld.long 0x00 00.--03. " SEL[0.1] ,Select debug_in signal" "debug_in[4:0],debug_in[9:5],debug_in[14:10],debug_in[19:15],?..." width 8. tree.end ;end include file xscale/ixp23xx-gpio.ph ;begin include file xscale/ixp23xx-ostimer.ph ;parameters: ASD: 0xc8005000 ; IXP2325, IXP2350 ; ; IXP23xx-OSTIMER %1 %2 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "OS Timer" ; -------------------------------------------------------------------------------- width 16. group ASD:(0xc8005000+0x0)++0x03 line.long 0x00 "Ost_Ts,Timestamp timer" hexmask.long 0x00 0.--31. 0x01 " Timer_val ,Current value of the timer" group ASD:(0xc8005000+0x4)++0x03 line.long 0x00 "Ost_Tim0,General Purpose Timer 0" hexmask.long 0x00 0.--31. 0x01 " Timer_val ,Current value of the timer" group ASD:(0xc8005000+0x8)++0x03 line.long 0x00 "Ost_Tim0_Rl,General Purpose Timer 0 Reload" hexmask.long 0x00 2.--31. 0x01 " Reload_val ,Value to be reloaded into Ost_Tim0" bitfld.long 0x00 1. " tim0_one_shot ,Specifies what action should be taken when the counter reaches zero" "reload and count,reload and stop" bitfld.long 0x00 0. " tim0_enable ,Counter enable" "dis,ena" group ASD:(0xc8005000+0xc)++0x03 line.long 0x00 "Ost_Tim1,General Purpose Timer 1" hexmask.long 0x00 0.--31. 0x01 " Timer_val ,Current value of the timer" group ASD:(0xc8005000+0x10)++0x03 line.long 0x00 "Ost_Tim1_Rl,General Purpose Timer 1 Reload" hexmask.long 0x00 2.--31. 0x01 " Reload_val ,Value to be reloaded into Ost_Tim1" bitfld.long 0x00 1. " tim1_one_shot ,Specifies what action should be taken when the counter reaches zero" "reload and count,reload and stop" bitfld.long 0x00 0. " tim1_enable ,Counter enable" "dis,ena" group ASD:(0xc8005000+0x14)++0x03 line.long 0x00 "Ost_Wdog,Watchdog Timer" hexmask.long 0x00 0.--31. 0x01 " Timer_val ,Current value of the timer. Write has no effect unless Ost_Wdog_Key = 0x482E" group ASD:(0xc8005000+0x18)++0x03 line.long 0x00 "Ost_Wdog_Enab,Watchdog Enable Register" bitfld.long 0x00 2. " wdog_cnt_en ,Count Enable. Write has no effect unless Ost_Wdog_Key = 0x482E" "ena,dis" bitfld.long 0x00 1. " wdog_int_en ,Interrupt Enable. Write has no effect unless Ost_Wdog_Key = 0x482E" "ena,dis" bitfld.long 0x00 0. " wdog_rst_en ,Watchdog Reset Enable. Write has no effect unless Ost_Wdog_Key = 0x482E" "ena,dis" group ASD:(0xc8005000+0x1c)++0x03 line.long 0x00 "Ost_Wdog_Key,Watchdog Key Register" hexmask.long 0x00 0.--15. 0x01 " key_value ,Reset Key Value. Value of the reset key in which access is allowed to Ost_Wdog_Enab and Ost_Wdog" group ASD:(0xc8005000+0x20)++0x03 line.long 0x00 "Ost_Sts,OST Status" bitfld.long 0x00 5. " sw_rst_history ,SW reset has occurred. Writing a 1 to this bit will clear it if set" "no,yes" bitfld.long 0x00 4. " warm_reset ,Warm reset has occurred. Writing a 1 to this bit will clear it if set" "no,yes" bitfld.long 0x00 3. " ost_wdog_int_val ,Ost_Wdog_Int has occurred. Writing a 1 to this bit will clear it if the condition that caused it is no longer present" "no,yes" textline " " bitfld.long 0x00 2. " ost_ts_int_val ,Ost_Ts_Int has occurred. Writing a 1 to this bit will clear it if the condition that caused it is no longer present" "no,yes" bitfld.long 0x00 1. " ost_tim1_int_val ,Ost_Tim1_Int has occurred. Writing a 1 to this bit will clear it if the condition that caused it is no longer present" "no,yes" bitfld.long 0x00 0. " ost_tim0_int_val ,Ost_Tim0_Int has occurred. Writing a 1 to this bit will clear it if the condition that caused it is no longer present" "no,yes" group ASD:(0xc8005000+0x24)++0x03 line.long 0x00 "Ost_Sw_Reset,SW Reset" bitfld.long 0x00 0. " SW_Rst ,SW_Rst generates Ost_Wdog_Reset_n and or Ost_Wdog_Int depending on enables. Write has no effect unless Ost_Wdog_Key=0x482E" "-,reset" group ASD:(0xc8005000+0x28)++0x03 line.long 0x00 "Ost_Sw_Rst_Enab,SW Reset Enable" bitfld.long 0x00 1. " sw_rst_int_ena ,Interrupt Enable. Enables Ost_Wdog_Int signal to be generated. Only writable when Ost_Wdog_Key=0x482E" "dis,ena" bitfld.long 0x00 0. " sw_rst_reset_ena ,SW Reset Enable. Enables Ost_Wdog_Reset_n signal to be generated. Write has no effect unless Ost_Wdog_Key=0x482E" "dis,ena" width 8. tree.end ;end include file xscale/ixp23xx-ostimer.ph ;begin include file xscale/ixp23xx-dsr.ph ;parameters: ASD: 0xc8007000 ; IXP2325, IXP2350 ; ; IXP23xx-DSR %1 %2 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "APB DSR Controller" ; -------------------------------------------------------------------------------- width 16. group ASD:(0xc8007000+0x00)++0x03 line.long 0x00 "Enet_Jtag_Drive,Ethernet/JTAG Drive Strength Register" hexmask.long 0x00 12.--23. 0x01 " N-Channel drive strength ,Ethernet and JTAG Group N-Channel Override Value" hexmask.long 0x00 0.--11. 0x01 " P-Channel drive strength ,Ethernet and JTAG Group P-Channel Override Value" group ASD:(0xc8007000+0x04)++0x03 line.long 0x00 "GPIO_UART_Drive,GPIO[8:15] UART Drive Strength Register" hexmask.long 0x00 12.--23. 0x01 " N-Channel drive strength ,GPIO[15:8] and UART Group N-Channel Override Value" hexmask.long 0x00 0.--11. 0x01 " P-Channel drive strength ,GPIO[15:8] and UART Group P-Channel Override Value" group ASD:(0xc8007000+0x08)++0x03 line.long 0x00 "Exp_Drive,EXP Drive Strength Register" hexmask.long 0x00 12.--23. 0x01 " N-Channel drive strength ,Expansion Bus Group N-Channel Override Value" hexmask.long 0x00 0.--11. 0x01 " P-Channel drive strength ,Expansion Bus Group P-Channel Override Value" width 8. tree.end ;end include file xscale/ixp23xx-dsr.ph ;begin include file xscale/ixp23xx-ethcp.ph ;parameters: ASD: 0xc8009000 0 ; IXP2325, IXP2350 ; ; IXP23xx-ETHCP %1 %2 %3 ; ; %1 memory space ; %2 Base Address ; %3 Ethernet Coprocessor number ; ; -------------------------------------------------------------------------------- tree "Ethernet Coprocessor-0" ; -------------------------------------------------------------------------------- width 16. group ASD:(0xc8009000+0x00)++0x03 line.long 0x00 "txctrl1,Transmit Control 1" bitfld.long 0x00 6. " RMII enable ,Configures the PHY interface to the RMII" "dis,ena" bitfld.long 0x00 5. " Two part deferral ,Causes the optional two part deferral to be used" "dis,ena" bitfld.long 0x00 4. " Append FCS ,Causes FCS to be computed and appended to transmit frames before they are sent to the PHY" "dis,ena" bitfld.long 0x00 3. " Pad enable ,Causes transmit frames less than to minimum frame size to be padded before they are sent to the PHY" "dis,ena" textline " " bitfld.long 0x00 2. " Retry enable ,Causes transmit frames to be retried until the maximum retry limit shown in the Transmit Control 2 Register is reached, when collisions occur" "dis,ena" bitfld.long 0x00 1. " Half duplex ,Half duplex operation enable" "full duplex,half duplex" bitfld.long 0x00 0. " Transmit enable ,Causes transmission to be enabled" "dis,ena" group ASD:(0xc8009000+0x04)++0x03 line.long 0x00 "txctrl2,Transmit Control 2" bitfld.long 0x00 0.--3. " MAXIMUMRETRIES ,Maximum number of retries for a packet when collisions occur" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:(0xc8009000+0x10)++0x03 line.long 0x00 "rxctrl1,Receive Control 1" bitfld.long 0x00 7. " Broadcast disable ,Prevents broadcast packets from being passed to the application logic" "ena,dis" bitfld.long 0x00 6. " Receive runt packet ,Causes runt packets to be passed to the application logic" "drop,pass" textline " " bitfld.long 0x00 5. " Address filter enable ,Causes address filtering to take place. Non-broadcast packets are only passed to the application logic if they pass the address filter" "dis,ena" bitfld.long 0x00 4. " Loopback enable ,Causes loopback operation" "dis,ena" textline " " bitfld.long 0x00 3. " Pause enable ,Enables detection of Pause frames" "dis,ena" bitfld.long 0x00 2. " Send CRC ,Causes the CRC data to be sent to the application logic" "dis,ena" bitfld.long 0x00 1. " Pad strip ,Causes the pad bytes to be stripped from receive data" "dis,ena" bitfld.long 0x00 0. " Receive enable ,Causes reception to be enabled" "dis,ena" group ASD:(0xc8009000+0x14)++0x03 line.long 0x00 "rxctrl2,Receive Control 2" bitfld.long 0x00 0. " Receive deferral enable ,Enables receive deferral checking" "dis,ena" group ASD:(0xc8009000+0x20)++0x03 line.long 0x00 "rndmseed,Random Seed" hexmask.long 0x00 0.--7. 0x01 " Random seed ,Random seed used for LFSR initialization in the Back-off block" group ASD:(0xc8009000+0x30)++0x03 line.long 0x00 "threshpe,Threshold For Partial Empty" hexmask.long 0x00 0.--7. 0x01 " PARTIAL EMPTY ,Marks the partial empty thresholds of the Transmit FIFO and Receive FIFO" group ASD:(0xc8009000+0x38)++0x03 line.long 0x00 "threshpf,Threshold For Partial Full" hexmask.long 0x00 0.--7. 0x01 " PARTIAL FULL ,Marks the partial full thresholds of the Transmit FIFO and Receive FIFO" group ASD:(0xc8009000+0x40)++0x03 line.long 0x00 "txbuffsize,Buffer Size For Transmit" hexmask.long 0x00 0.--7. 0x01 " TX BUFFER SIZE ,Holds minimum number of bytes of each frame that must be in the Transmit FIFO for that frame's transmission to start" group ASD:(0xc8009000+0x50)++0x03 line.long 0x00 "txdefpars,Transmit Single Deferral" hexmask.long 0x00 0.--7. 0x01 " SINGLE DEFERRAL ,Number of transmit clock cycles (tx_clk) in the transmit deferral period minus three when single deferral is used for transmission (Transmit Control 1 [5] = 0)" group ASD:(0xc8009000+0x54)++0x03 line.long 0x00 "rxdefpars,Receive Deferral Parameters" hexmask.long 0x00 0.--7. 0x01 " RECEIVE DEFERRAL,Number of receive clock cycles (rx_clk) in the receive deferral period minus three, when checking the Inter Frame Gap for packets received (Receive Control 2 [0] = 0)" group ASD:(0xc8009000+0x60)++0x03 line.long 0x00 "tx2partdefpars1,Transmit Two Part Deferral 1" hexmask.long 0x00 0.--7. 0x01 " FIRST DEFERRAL PERIOD ,Number of transmit clock cycles (tx_clk) in the first deferral period minus three, when two part deferral is used for transmission (Transmit Control 1 [5] = 1) and half duplex mode" group ASD:(0xc8009000+0x64)++0x03 line.long 0x00 "tx2partdefpars2,Transmit Two Part Deferral 2" hexmask.long 0x00 0.--7. 0x01 " SECOND DEFERRAL PERIOD ,Number of transmit clock cycles (tx_clk) in the second deferral period minus three, when two part deferral is used for transmission (Transmit Control 1 [5] = 1) and half duplex mode" group ASD:(0xc8009000+0x70)++0x03 line.long 0x00 "slottime,Slot Time" hexmask.long 0x00 0.--7. 0x01 " SLOT TIME ,Slot time for back-off algorithm Expressed in number of tx_clk cycles. 128 in MII mode. 255 in RMII mode." group ASD:(0xc8009000+0x80)++0x0f line.long 0x00 "mdiocmd1,MDIO Command 1" hexmask.long 0x00 0.--7. 0x01 " MDIO_COMMAND[7:0] ,MDIO_COMMAND[7:0]" line.long 0x04 "mdiocmd2,MDIO Command 2" hexmask.long 0x04 0.--7. 0x01 " MDIO_COMMAND[15:8] ,MDIO_COMMAND[15:8]" line.long 0x08 "mdiocmd3,MDIO Command 3" hexmask.long 0x08 0.--7. 0x01 " MDIO_COMMAND[23:16] ,MDIO_COMMAND[23:16]" line.long 0x0c "mdiocmd4,MDIO Command 4" hexmask.long 0x0c 0.--7. 0x01 " MDIO_COMMAND[31:24] ,MDIO_COMMAND[31:24]" group ASD:(0xc8009000+0x090)++0x0f line.long 0x00 "mdiosts1,MDIO Status 1" hexmask.long 0x00 0.--7. 0x01 " MDIO_STATUS[7:0] ,MDIO_STATUS[7:0]" line.long 0x04 "mdiosts2,MDIO Status 2" hexmask.long 0x00 0.--7. 0x01 " MDIO_STATUS[15:8] ,MDIO_STATUS[15:8]" line.long 0x08 "mdiosts3,MDIO Status 3" hexmask.long 0x08 0.--7. 0x01 " MDIO_STATUS[23:16] ,MDIO_STATUS[23:16]" line.long 0x0c "mdiosts4,MDIO Status 4" hexmask.long 0x0c 0.--7. 0x01 " MDIO_STATUS[31:24] ,MDIO_STATUS[31:24]" group ASD:(0xc8009000+0x0A0)++0x17 line.long 0x00 "addrmask1,Address Mask 1" hexmask.long 0x00 0.--7. 0x01 " ADDRESS MASK[47:40] ,ADDRESS MASK[47:40]" line.long 0x04 "addrmask2,Address Mask 2" hexmask.long 0x04 0.--7. 0x01 " ADDRESS MASK[39:32] ,ADDRESS MASK[39:32]" line.long 0x08 "addrmask3,Address Mask 3" hexmask.long 0x08 0.--7. 0x01 " ADDRESS MASK[31:24] ,ADDRESS MASK[31:24]" line.long 0x0c "addrmask4,Address Mask 4" hexmask.long 0x0c 0.--7. 0x01 " ADDRESS MASK[23:16] ,ADDRESS MASK[23:16]" line.long 0x10 "addrmask5,Address Mask 5" hexmask.long 0x10 0.--7. 0x01 " ADDRESS MASK[15:8] ,ADDRESS MASK[15:8]" line.long 0x14 "addrmask6,Address Mask 6" hexmask.long 0x14 0.--7. 0x01 " ADDRESS MASK[7:0] ,ADDRESS MASK[7:0]" group ASD:(0xc8009000+0x0C0)++0x17 line.long 0x00 "addr1,Address 1" hexmask.long 0x00 0.--7. 0x01 " ADDRESS[47:40] ,ADDRESS[47:40]" line.long 0x04 "addr2,Address 2" hexmask.long 0x04 0.--7. 0x01 " ADDRESS[39:32] ,ADDRESS[39:32]" line.long 0x08 "addr3,Address 3" hexmask.long 0x08 0.--7. 0x01 " ADDRESS[31:24] ,ADDRESS[31:24]" line.long 0x0c "addr4,Address 4" hexmask.long 0x0c 0.--7. 0x01 " ADDRESS[23:16] ,ADDRESS[23:16]" line.long 0x10 "addr5,Address 5" hexmask.long 0x10 0.--7. 0x01 " ADDRESS[15:8] ,ADDRESS[15:8]" line.long 0x14 "addr6,Address 6" hexmask.long 0x14 0.--7. 0x01 " ADDRESS[7:0] ,ADDRESS[7:0]" group ASD:(0xc8009000+0x0E0)++0x03 line.long 0x00 "thresh_intclk,Threshold for Internal Clock" hexmask.long 0x00 0.--7. 0x01 " CLOCK RATIO ,Holds ratio of PHY side clock (tx_clk or rx_clk) to sys_clk. Round up for value to be written to this register" group ASD:(0xc8009000+0x0F0)++0x17 line.long 0x00 "uniaddr1,Unicast Address Register #1" hexmask.long 0x00 0.--7. 0x01 " UNICAST ADDRESS[47:40] ,UNICAST ADDRESS[47:40]" line.long 0x00 "uniaddr2,Unicast Address Register #2" hexmask.long 0x04 0.--7. 0x01 " UNICAST ADDRESS[39:32] ,UNICAST ADDRESS[39:32]" line.long 0x00 "uniaddr3,Unicast Address Register #3" hexmask.long 0x08 0.--7. 0x01 " UNICAST ADDRESS[31:24] ,UNICAST ADDRESS[31:24]" line.long 0x00 "uniaddr4,Unicast Address Register #4" hexmask.long 0x0c 0.--7. 0x01 " UNICAST ADDRESS[23:16] ,UNICAST ADDRESS[23:16]" line.long 0x00 "uniaddr5,Unicast Address Register #5" hexmask.long 0x10 0.--7. 0x01 " UNICAST ADDRESS[15:8] ,UNICAST ADDRESS[15:8]" line.long 0x00 "uniaddr6,Unicast Address Register #6" hexmask.long 0x14 0.--7. 0x01 " UNICAST ADDRESS[7:0] ,UNICAST ADDRESS[7:0]" group ASD:(0xc8009000+0x1FC)++0x03 line.long 0x00 "core_control,Core Control" bitfld.long 0x00 4. " mdc_en ,Configures the MDC as an output clock" "dis,ena" bitfld.long 0x00 3. " send_jam ,Causes a jam sequence to be sent if reception of a packet begins" "dis,ena" bitfld.long 0x00 2. " clr_tx_err ,Assertion (1) causes the Transmit FIFO to be flushed. Data in the Transmit FIFO is discarded" "-,clear" bitfld.long 0x00 1. " clr_rx_err ,Assertion (1) causes the Receive FIFO to be flushed. Data in the Receive FIFO is discarded" "-,clear" bitfld.long 0x00 0. " rst_mac ,Assertion (1) causes the Stargate MAC to be reset" "-,clear" width 8. tree.end ;end include file xscale/ixp23xx-ethcp.ph ;begin include file xscale/ixp23xx-ethcp.ph ;parameters: ASD: 0xc800a000 1 ; IXP2325, IXP2350 ; ; IXP23xx-ETHCP %1 %2 %3 ; ; %1 memory space ; %2 Base Address ; %3 Ethernet Coprocessor number ; ; -------------------------------------------------------------------------------- tree "Ethernet Coprocessor-1" ; -------------------------------------------------------------------------------- width 16. group ASD:(0xc800a000+0x00)++0x03 line.long 0x00 "txctrl1,Transmit Control 1" bitfld.long 0x00 6. " RMII enable ,Configures the PHY interface to the RMII" "dis,ena" bitfld.long 0x00 5. " Two part deferral ,Causes the optional two part deferral to be used" "dis,ena" bitfld.long 0x00 4. " Append FCS ,Causes FCS to be computed and appended to transmit frames before they are sent to the PHY" "dis,ena" bitfld.long 0x00 3. " Pad enable ,Causes transmit frames less than to minimum frame size to be padded before they are sent to the PHY" "dis,ena" textline " " bitfld.long 0x00 2. " Retry enable ,Causes transmit frames to be retried until the maximum retry limit shown in the Transmit Control 2 Register is reached, when collisions occur" "dis,ena" bitfld.long 0x00 1. " Half duplex ,Half duplex operation enable" "full duplex,half duplex" bitfld.long 0x00 0. " Transmit enable ,Causes transmission to be enabled" "dis,ena" group ASD:(0xc800a000+0x04)++0x03 line.long 0x00 "txctrl2,Transmit Control 2" bitfld.long 0x00 0.--3. " MAXIMUMRETRIES ,Maximum number of retries for a packet when collisions occur" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:(0xc800a000+0x10)++0x03 line.long 0x00 "rxctrl1,Receive Control 1" bitfld.long 0x00 7. " Broadcast disable ,Prevents broadcast packets from being passed to the application logic" "ena,dis" bitfld.long 0x00 6. " Receive runt packet ,Causes runt packets to be passed to the application logic" "drop,pass" textline " " bitfld.long 0x00 5. " Address filter enable ,Causes address filtering to take place. Non-broadcast packets are only passed to the application logic if they pass the address filter" "dis,ena" bitfld.long 0x00 4. " Loopback enable ,Causes loopback operation" "dis,ena" textline " " bitfld.long 0x00 3. " Pause enable ,Enables detection of Pause frames" "dis,ena" bitfld.long 0x00 2. " Send CRC ,Causes the CRC data to be sent to the application logic" "dis,ena" bitfld.long 0x00 1. " Pad strip ,Causes the pad bytes to be stripped from receive data" "dis,ena" bitfld.long 0x00 0. " Receive enable ,Causes reception to be enabled" "dis,ena" group ASD:(0xc800a000+0x14)++0x03 line.long 0x00 "rxctrl2,Receive Control 2" bitfld.long 0x00 0. " Receive deferral enable ,Enables receive deferral checking" "dis,ena" group ASD:(0xc800a000+0x20)++0x03 line.long 0x00 "rndmseed,Random Seed" hexmask.long 0x00 0.--7. 0x01 " Random seed ,Random seed used for LFSR initialization in the Back-off block" group ASD:(0xc800a000+0x30)++0x03 line.long 0x00 "threshpe,Threshold For Partial Empty" hexmask.long 0x00 0.--7. 0x01 " PARTIAL EMPTY ,Marks the partial empty thresholds of the Transmit FIFO and Receive FIFO" group ASD:(0xc800a000+0x38)++0x03 line.long 0x00 "threshpf,Threshold For Partial Full" hexmask.long 0x00 0.--7. 0x01 " PARTIAL FULL ,Marks the partial full thresholds of the Transmit FIFO and Receive FIFO" group ASD:(0xc800a000+0x40)++0x03 line.long 0x00 "txbuffsize,Buffer Size For Transmit" hexmask.long 0x00 0.--7. 0x01 " TX BUFFER SIZE ,Holds minimum number of bytes of each frame that must be in the Transmit FIFO for that frame's transmission to start" group ASD:(0xc800a000+0x50)++0x03 line.long 0x00 "txdefpars,Transmit Single Deferral" hexmask.long 0x00 0.--7. 0x01 " SINGLE DEFERRAL ,Number of transmit clock cycles (tx_clk) in the transmit deferral period minus three when single deferral is used for transmission (Transmit Control 1 [5] = 0)" group ASD:(0xc800a000+0x54)++0x03 line.long 0x00 "rxdefpars,Receive Deferral Parameters" hexmask.long 0x00 0.--7. 0x01 " RECEIVE DEFERRAL,Number of receive clock cycles (rx_clk) in the receive deferral period minus three, when checking the Inter Frame Gap for packets received (Receive Control 2 [0] = 0)" group ASD:(0xc800a000+0x60)++0x03 line.long 0x00 "tx2partdefpars1,Transmit Two Part Deferral 1" hexmask.long 0x00 0.--7. 0x01 " FIRST DEFERRAL PERIOD ,Number of transmit clock cycles (tx_clk) in the first deferral period minus three, when two part deferral is used for transmission (Transmit Control 1 [5] = 1) and half duplex mode" group ASD:(0xc800a000+0x64)++0x03 line.long 0x00 "tx2partdefpars2,Transmit Two Part Deferral 2" hexmask.long 0x00 0.--7. 0x01 " SECOND DEFERRAL PERIOD ,Number of transmit clock cycles (tx_clk) in the second deferral period minus three, when two part deferral is used for transmission (Transmit Control 1 [5] = 1) and half duplex mode" group ASD:(0xc800a000+0x70)++0x03 line.long 0x00 "slottime,Slot Time" hexmask.long 0x00 0.--7. 0x01 " SLOT TIME ,Slot time for back-off algorithm Expressed in number of tx_clk cycles. 128 in MII mode. 255 in RMII mode." group ASD:(0xc800a000+0x80)++0x0f line.long 0x00 "mdiocmd1,MDIO Command 1" hexmask.long 0x00 0.--7. 0x01 " MDIO_COMMAND[7:0] ,MDIO_COMMAND[7:0]" line.long 0x04 "mdiocmd2,MDIO Command 2" hexmask.long 0x04 0.--7. 0x01 " MDIO_COMMAND[15:8] ,MDIO_COMMAND[15:8]" line.long 0x08 "mdiocmd3,MDIO Command 3" hexmask.long 0x08 0.--7. 0x01 " MDIO_COMMAND[23:16] ,MDIO_COMMAND[23:16]" line.long 0x0c "mdiocmd4,MDIO Command 4" hexmask.long 0x0c 0.--7. 0x01 " MDIO_COMMAND[31:24] ,MDIO_COMMAND[31:24]" group ASD:(0xc800a000+0x090)++0x0f line.long 0x00 "mdiosts1,MDIO Status 1" hexmask.long 0x00 0.--7. 0x01 " MDIO_STATUS[7:0] ,MDIO_STATUS[7:0]" line.long 0x04 "mdiosts2,MDIO Status 2" hexmask.long 0x00 0.--7. 0x01 " MDIO_STATUS[15:8] ,MDIO_STATUS[15:8]" line.long 0x08 "mdiosts3,MDIO Status 3" hexmask.long 0x08 0.--7. 0x01 " MDIO_STATUS[23:16] ,MDIO_STATUS[23:16]" line.long 0x0c "mdiosts4,MDIO Status 4" hexmask.long 0x0c 0.--7. 0x01 " MDIO_STATUS[31:24] ,MDIO_STATUS[31:24]" group ASD:(0xc800a000+0x0A0)++0x17 line.long 0x00 "addrmask1,Address Mask 1" hexmask.long 0x00 0.--7. 0x01 " ADDRESS MASK[47:40] ,ADDRESS MASK[47:40]" line.long 0x04 "addrmask2,Address Mask 2" hexmask.long 0x04 0.--7. 0x01 " ADDRESS MASK[39:32] ,ADDRESS MASK[39:32]" line.long 0x08 "addrmask3,Address Mask 3" hexmask.long 0x08 0.--7. 0x01 " ADDRESS MASK[31:24] ,ADDRESS MASK[31:24]" line.long 0x0c "addrmask4,Address Mask 4" hexmask.long 0x0c 0.--7. 0x01 " ADDRESS MASK[23:16] ,ADDRESS MASK[23:16]" line.long 0x10 "addrmask5,Address Mask 5" hexmask.long 0x10 0.--7. 0x01 " ADDRESS MASK[15:8] ,ADDRESS MASK[15:8]" line.long 0x14 "addrmask6,Address Mask 6" hexmask.long 0x14 0.--7. 0x01 " ADDRESS MASK[7:0] ,ADDRESS MASK[7:0]" group ASD:(0xc800a000+0x0C0)++0x17 line.long 0x00 "addr1,Address 1" hexmask.long 0x00 0.--7. 0x01 " ADDRESS[47:40] ,ADDRESS[47:40]" line.long 0x04 "addr2,Address 2" hexmask.long 0x04 0.--7. 0x01 " ADDRESS[39:32] ,ADDRESS[39:32]" line.long 0x08 "addr3,Address 3" hexmask.long 0x08 0.--7. 0x01 " ADDRESS[31:24] ,ADDRESS[31:24]" line.long 0x0c "addr4,Address 4" hexmask.long 0x0c 0.--7. 0x01 " ADDRESS[23:16] ,ADDRESS[23:16]" line.long 0x10 "addr5,Address 5" hexmask.long 0x10 0.--7. 0x01 " ADDRESS[15:8] ,ADDRESS[15:8]" line.long 0x14 "addr6,Address 6" hexmask.long 0x14 0.--7. 0x01 " ADDRESS[7:0] ,ADDRESS[7:0]" group ASD:(0xc800a000+0x0E0)++0x03 line.long 0x00 "thresh_intclk,Threshold for Internal Clock" hexmask.long 0x00 0.--7. 0x01 " CLOCK RATIO ,Holds ratio of PHY side clock (tx_clk or rx_clk) to sys_clk. Round up for value to be written to this register" group ASD:(0xc800a000+0x0F0)++0x17 line.long 0x00 "uniaddr1,Unicast Address Register #1" hexmask.long 0x00 0.--7. 0x01 " UNICAST ADDRESS[47:40] ,UNICAST ADDRESS[47:40]" line.long 0x00 "uniaddr2,Unicast Address Register #2" hexmask.long 0x04 0.--7. 0x01 " UNICAST ADDRESS[39:32] ,UNICAST ADDRESS[39:32]" line.long 0x00 "uniaddr3,Unicast Address Register #3" hexmask.long 0x08 0.--7. 0x01 " UNICAST ADDRESS[31:24] ,UNICAST ADDRESS[31:24]" line.long 0x00 "uniaddr4,Unicast Address Register #4" hexmask.long 0x0c 0.--7. 0x01 " UNICAST ADDRESS[23:16] ,UNICAST ADDRESS[23:16]" line.long 0x00 "uniaddr5,Unicast Address Register #5" hexmask.long 0x10 0.--7. 0x01 " UNICAST ADDRESS[15:8] ,UNICAST ADDRESS[15:8]" line.long 0x00 "uniaddr6,Unicast Address Register #6" hexmask.long 0x14 0.--7. 0x01 " UNICAST ADDRESS[7:0] ,UNICAST ADDRESS[7:0]" group ASD:(0xc800a000+0x1FC)++0x03 line.long 0x00 "core_control,Core Control" bitfld.long 0x00 4. " mdc_en ,Configures the MDC as an output clock" "dis,ena" bitfld.long 0x00 3. " send_jam ,Causes a jam sequence to be sent if reception of a packet begins" "dis,ena" bitfld.long 0x00 2. " clr_tx_err ,Assertion (1) causes the Transmit FIFO to be flushed. Data in the Transmit FIFO is discarded" "-,clear" bitfld.long 0x00 1. " clr_rx_err ,Assertion (1) causes the Receive FIFO to be flushed. Data in the Receive FIFO is discarded" "-,clear" bitfld.long 0x00 0. " rst_mac ,Assertion (1) causes the Stargate MAC to be reset" "-,clear" width 8. tree.end ;end include file xscale/ixp23xx-ethcp.ph ;begin include file xscale/ixp23xx-gbethmac.ph ;parameters: ASD: 0xc800b000 0 ; IXP2325, IXP2350 ; ; IXP23xx-GBETHMAC %1 %2 %3 ; ; %1 memory space ; %2 Base Address ; %3 Ethernet MAC number ; ; -------------------------------------------------------------------------------- tree "Gigabit Ethernet-0 MAC" ; -------------------------------------------------------------------------------- ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC core Control" width 28. group ASD:(0xc800b000+0x4*0x00000)++0x03 line.long 0x00 "StationAddressLow,Station Address Low" hexmask.long 0x00 0.--31. 0x01 " StationAddressLow ,Source MAC address bit 31-0. This address is inserted in the source address field when transmitting pause frames, and is also used to compare against unicast frames at the receiving side" group ASD:(0xc800b000+0x4*0x00001)++0x03 line.long 0x00 "StationAddressHigh,Station Address High" hexmask.long 0x00 0.--15. 0x01 " StationAddressHigh ,Source MAC address bit 47-32. This address is inserted in the source address field when transmitting pause frames, and is also used to compare against unicast frames at the receiving side" group ASD:(0xc800b000+0x4*0x00002)++0x03 line.long 0x00 "DesiredDuplex,Desired Duplex" bitfld.long 0x00 0. " Duplex Select ,GigEMC supports half-duplex operation only for 10/100 speed on copper media. It supports Gigabit speed on both Copper and Fiber media in full duplex mode of operation only" "Half-duplex,Full-duplex" group ASD:(0xc800b000+0x4*0x00003)++0x03 line.long 0x00 "FDFCType,FDFC Type" hexmask.long 0x00 0.--15. 0x01 " FDFCType ,This value is used to fill the Type field of the Transmitted Pause frames" group ASD:(0xc800b000+0x4*0x00005)++0x03 line.long 0x00 "CollisionDistance,Collision Distance" hexmask.long 0x00 0.--09. 0x01 " Collision Distance ,Sets the limit for late collision. Collisions happening at byte times beyond the configured value are considered to be late collisions. (Valid only in half-duplex)" group ASD:(0xc800b000+0x4*0x00006)++0x03 line.long 0x00 "CollisionThreshold,Collision Threshold" hexmask.long 0x00 0.--07. 0x01 " Collision Threshold ,Sets the limit for excessive collisions. When the number of transmission attempts performed for a packet exceeds this value it is considered to be an excessive collision and the frame is dropped. (Only valid in half-duplex)." group ASD:(0xc800b000+0x4*0x00007)++0x03 line.long 0x00 "FCTxTimerValue,FCTx Timer Value" hexmask.long 0x00 0.--15. 0x01 " FCTxTimerValue ,Pause length inserted in the flow control Pause Frame sent to the receiving station. The value is in 512-bit times" group ASD:(0xc800b000+0x4*0x00008)++0x03 line.long 0x00 "FDFCAddressLow,FDFC Address Low" hexmask.long 0x00 0.--31. 0x01 " FDFCAddressLow ,The lowest 32 bits of the 48-bit globally assigned multicast pause frame destination address" group ASD:(0xc800b000+0x4*0x00009)++0x03 line.long 0x00 "FDFCAddressHigh,FDFC Address High" hexmask.long 0x00 0.--15. 0x01 " FDFCAddressHigh ,The highest 16 bits 47:32 of the globally assigned multicast pause frame destination address" group ASD:(0xc800b000+0x4*0x0000A)++0x03 line.long 0x00 "IPGReceiveTime1,IPG Receive Time1" hexmask.long 0x00 0.--09. 0x01 " IPGReceiveTime1 ,This value is configuring the first part of the IPG time for non back-to-back transmissions" group ASD:(0xc800b000+0x4*0x0000B)++0x03 line.long 0x00 "IPGReceiveTime2,IPG Receive Time2" hexmask.long 0x00 0.--09. 0x01 " IPGReceiveTime2 ,This value is configuring the second part of the IPG time for non back-to-back transmissions" group ASD:(0xc800b000+0x4*0x0000C)++0x03 line.long 0x00 "IPGTransmitTime,IPG Transmit Time" hexmask.long 0x00 0.--09. 0x01 " IPGTransmitTime ,This value is configuring IPG time for back-to-back transmissions" group ASD:(0xc800b000+0x4*0x0000E)++0x03 line.long 0x00 "PauseThreshold,Pause Threshold" hexmask.long 0x00 0.--15. 0x01 " Pause Threshold ,When a pause frame has been sent, an internal timer checks when the next pause frame must be scheduled for transmission to keep the link partner in pause mode" group ASD:(0xc800b000+0x4*0x0000F)++0x03 line.long 0x00 "MaxFrameSize,Max Frame Size" hexmask.long 0x00 0.--13. 0x01 " MaxFrameSize ,Configuring the maximum frame size the MAC can receive or transmit without activating any error counters, and without truncation" group ASD:(0xc800b000+0x4*0x00010)++0x03 line.long 0x00 "MacIFMode Mac,IF Mode" bitfld.long 0x00 0.--02. " MAC_IF_MODE ,These bits are used to define the clock mode and the RGMII/GMII/MII mode of operation" "MAC 1.25MHz TX 2.5MHz in MII mode,MAC 12.5MHz TX 25MHz in MII mode,MAC 125MHz TX 125MHz in GMII mode,MAC 125MHz TX 125MHz in GMII mode,MAC 1.25MHz TX 2.5MHz in RGMII mode,MAC 12.5MHz TX 25MHz in RGMII mode,MAC 125MHz TX 125MHz in RGMII mode,MAC 125MHz TX 125MHz in RGMII mode" group ASD:(0xc800b000+0x4*0x00011)++0x03 line.long 0x00 "FlushTX,Flush TX" bitfld.long 0x00 0. " FlushTX ,This bit is used to flush all TX data. It is used if all the traffic sent to a port should be stopped" "-,flush" group ASD:(0xc800b000+0x4*0x00012)++0x03 line.long 0x00 "FCEnable,FC Enable" bitfld.long 0x00 2. " TX HDFC ,When TX HDFC (applicable only for Half-duplex mode) is enabled, MAC will generate deliberate collisions on the incoming packets when the Rx FIFO occupancy has crossed higher watermark (flow-control)" "dis,ena" bitfld.long 0x00 1. " TX FDFC ,When TX_FDFC is enabled (applicable only for Full-duplex mode) MAC will send pause frames to the link partner when Rx FIFO occupancy has crossed higher watermark (flow-control)" "dis,ena" bitfld.long 0x00 0. " RX FDFC ,When RXFDFC is enabled (applicable only for Full-duplex mode) MAC will defer transmission when a pause frame has been received from the link partner. The deference will be for the time given by the pause length field in the received pause frame" "dis,ena" group ASD:(0xc800b000+0x4*0x00013)++0x03 line.long 0x00 "FCBackPressureLength,FC Back Pressure Length" hexmask.long 0x00 0.--05. 0x01 " FCBackPressureLength ,Sets the number of byte cycles for which the collision has to be applied. The bits 5:0 of this register are alone used" group ASD:(0xc800b000+0x4*0x00014)++0x03 line.long 0x00 "ShortRuntsThreshold,Short Runts Threshold" bitfld.long 0x00 0.--4. " ShortRunts Threshold ,The configuration holds the value in bytes, which applies to the threshold in determining between runts and short" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group ASD:(0xc800b000+0x4*0x00015)++0x03 line.long 0x00 "DiscardUnknownControlFrame,Discard Unknown Control Frame" bitfld.long 0x00 0. " DiscardUnknownControlFrame ,ControlFrame ,Discard unknown control frames." "Forward,Discard" group.long ASD:(0xc800b000+0x4*0x00016)++0x03 line.long 0x00 "RxConfig word register,Rx Config Word" hexmask.long 0x00 26.--31. 0x01 " resync_count ,Gives the number of times resynchronization on comma boundary has happened since last read. Cleared on Read" bitfld.long 0x00 25. " ppm_fifo_underrun ,Indicates if PPM FIFO has underrun. Cleared on Read" "no,yes" bitfld.long 0x00 24. " ppm_fifo_overrun ,Indicates if PPM FIFO has overrun. Cleared on Read" "no,yes" textline " " bitfld.long 0x00 23. " An_rfce ,Auto-negotiation receive flow control enable. Derived from advertised Pause capability from the link partner and local capabilities" "dis,ena" bitfld.long 0x00 22. " An_tfce ,Auto-negotiation transmit flow control enable. Derived from advertised Pause capability from the link partner and local capabilities" "dis,ena" bitfld.long 0x00 21. " An_complete ,Auto-negotiation complete. This bit remains cleared from the time auto-negotiation is reset until auto-negotiation reaches the LINK_OK state. It remains set until auto-negotiation is disabled or restarted" "no,yes" textline " " bitfld.long 0x00 20. " Rx Sync ,Receive synchronization" "Loss of synchronization,Bit synchronization" bitfld.long 0x00 19. " RxConfig ,Rx Config" "Receiving idle/data stream,Receiving ordered sets" textline " " bitfld.long 0x00 18. " ConfigChanged ,RxConfigWord has changed since last read" "yes,no" bitfld.long 0x00 17. " InvalidWord ,Have received an invalid symbol" "no,yes" bitfld.long 0x00 16. " CarrierSense ,Device is receiving idle characters" "no,yes" textline " " bitfld.long 0x00 15. " NextPage ,Next Page request" "no,yes" bitfld.long 0x00 12.--13. " RemoteFault[1:0] ,Remote fault definitions" "00,01,10,11" bitfld.long 0x00 8. " AsymPause ,Asym Pause (ability to send pause frames)" "no,yes" textline " " bitfld.long 0x00 7. " SymPause ,Sym Pause (ability to send and receive pause frames)" "no,yes" bitfld.long 0x00 6. " HalfDuplex ,Half-duplex" "no,yes" bitfld.long 0x00 5. " FullDuplex ,Full-duplex" "no,yes" group ASD:(0xc800b000+0x4*0x00017)++0x03 line.long 0x00 "TxConfig word register,Tx Config Word" bitfld.long 0x00 15. " NextPage ,Next Page request" "no,yes" bitfld.long 0x00 12.--13. " RemoteFault[1:0] ,Remote fault definitions" "00,01,10,11" bitfld.long 0x00 8. " AsymPause ,Asym Pause (ability to send pause frames)" "no,yes" textline " " bitfld.long 0x00 7. " SymPause ,Sym Pause (ability to send and receive pause frames)" "no,yes" bitfld.long 0x00 6. " HalfDuplex ,Half-duplex" "no,yes" bitfld.long 0x00 5. " FullDuplex ,Full-duplex" "no,yes" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC core Rx Statistics" width 28. group ASD:(0xc800b000+0x4*0x020)++0x03 line.long 0x00 "RxOctetsTotalOK,Rx Octets Total OK" hexmask.long 0x00 0.--31. 0x01 " RxOctetsTotalOK ,Counts the bytes received in all legal frames, including all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800b000+0x4*0x021)++0x03 line.long 0x00 "RxOctetsBAD,RxOctetsBAD" hexmask.long 0x00 0.--31. 0x01 " RxOctetsBAD ,Counts the bytes received in all bad frames with legal size (frames with CRC error, alignment errors, or code violations), including all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800b000+0x4*0x022)++0x03 line.long 0x00 "RxUCPkts,RxUCPkts" hexmask.long 0x00 0.--31. 0x01 " RxUCPkts ,The total number of unicast packets received (excluding bad packets)" group ASD:(0xc800b000+0x4*0x023)++0x03 line.long 0x00 "RxMCPkts,RxMCPkts" hexmask.long 0x00 0.--31. 0x01 " RxMCPkts ,The total number of multicast packets received (excluding bad packets)" group ASD:(0xc800b000+0x4*0x024)++0x03 line.long 0x00 "RxBCPkts,RxBCPkts" hexmask.long 0x00 0.--31. 0x01 " RxBCPkts ,The total number of Broadcast packets received (excluding bad packets)" group ASD:(0xc800b000+0x4*0x025)++0x03 line.long 0x00 "RxPkts64Octets,RxPkts64Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts64Octets ,The total number of packets received (including bad packets) that were 64 octets in length" group ASD:(0xc800b000+0x4*0x026)++0x03 line.long 0x00 "RxPkts65to127Octets,RxPkts65to127Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts65to127Octets ,The total number of packets received (including bad packets) that were [65-127] octets in length" group ASD:(0xc800b000+0x4*0x027)++0x03 line.long 0x00 "RxPkts128t0255Octets,RxPkts128t0255Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts128t0255Octets ,The total number of packets received (including bad packets) that were [128-255] octets in length" group ASD:(0xc800b000+0x4*0x028)++0x03 line.long 0x00 "RxPkts256to511Octets,RxPkts256to511Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts256to511Octets ,The total number of packets received (including bad packets) that were [256-511] octets in length" group ASD:(0xc800b000+0x4*0x029)++0x03 line.long 0x00 "RxPkts512to1023Octets,RxPkts512to1023 Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts512to1023 ,The total number of packets received (including bad packets) that were [512-1023] octets in length" group ASD:(0xc800b000+0x4*0x02A)++0x03 line.long 0x00 "RxPkts1024to1518Octets,RxPkts1024to1518 Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts1024to1518 Octets ,The total number of packets received (including bad packets) that were [1024-1518] octets in length" group ASD:(0xc800b000+0x4*0x02B)++0x03 line.long 0x00 "RxPkts1519toMaxOctets,RxPkts1519toMax Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts1519toMax Octets ,The total number of packets received (including bad packets) that were >1518 octets in length" group ASD:(0xc800b000+0x4*0x02C)++0x03 line.long 0x00 "FCSErrors,FCSErrors" hexmask.long 0x00 0.--31. 0x01 " FCSErrors ,Number of frames received with legal size, but with wrong CRC field (also called FCS field)" group ASD:(0xc800b000+0x4*0x02D)++0x03 line.long 0x00 "Tagged,Tagged" hexmask.long 0x00 0.--31. 0x01 " Tagged ,Number of OK frames with VLAN tag(Type field = 0x8100)" group ASD:(0xc800b000+0x4*0x02E)++0x03 line.long 0x00 "RxDataError,RxDataError" hexmask.long 0x00 0.--31. 0x01 " RxDataError ,Number of frames received with legal length, containing a code violation (signaled with RX_ERR on RGMII)" group ASD:(0xc800b000+0x4*0x02F)++0x03 line.long 0x00 "AlignErrors,AlignErrors" hexmask.long 0x00 0.--31. 0x01 " AlignErrors ,Frames with a legal frame size, but containing less than 8 additional bits" group ASD:(0xc800b000+0x4*0x030)++0x03 line.long 0x00 "LongErrors,LongErrors" hexmask.long 0x00 0.--31. 0x01 " LongErrors ,Frames bigger than the maximum allowed, with both OK CRC and the integral number of octets" group ASD:(0xc800b000+0x4*0x031)++0x03 line.long 0x00 "JabberErrors,JabberErrors" hexmask.long 0x00 0.--31. 0x01 " JabberErrors ,Frames bigger than the maximum allowed, with either a bad CRC or a non-integral number of octets" group ASD:(0xc800b000+0x4*0x032)++0x03 line.long 0x00 "PauseMacControlRxCounter,PauseMacControlReceivedCounter" hexmask.long 0x00 0.--31. 0x01 " PauseMacControl ReceivedCounter ,Number of Pause MAC control frames received" group ASD:(0xc800b000+0x4*0x033)++0x03 line.long 0x00 "UnknownMacCtlFrameCounter,UnknownMacControlFrameCounter" hexmask.long 0x00 0.--31. 0x01 " UnknownMacControlFrameCounter ,Counter Number of MAC control frames received with an op code different from 0001 (Pause)" group ASD:(0xc800b000+0x4*0x034)++0x03 line.long 0x00 "VeryLongErrors,VeryLongErrors" hexmask.long 0x00 0.--31. 0x01 " VeryLongErrors ,Frames bigger than the larger of 2*maxframesize and 50000 bits" group ASD:(0xc800b000+0x4*0x035)++0x03 line.long 0x00 "RuntErrors,RuntErrors" hexmask.long 0x00 0.--31. 0x01 " RuntErrors ,The total number of packets received that are less than 64 octets in length, but longer than or equal to 96 bit times, which corresponds to a 4-byte frame with a well formed preamble and SFD" group ASD:(0xc800b000+0x4*0x036)++0x03 line.long 0x00 "Short,Errors,Short,Errors" hexmask.long 0x00 0.--31. 0x01 " Short Errors ,The total number of packets received that are less than 96 bit times, which corresponds to a 4 byte frame with a well formed preamble and SFD" group ASD:(0xc800b000+0x4*0x038)++0x03 line.long 0x00 "SequenceErrors,SequenceErrors" hexmask.long 0x00 0.--31. 0x01 " SequenceErrors ,Records the number of sequencing errors that occur in Fiber mode" group ASD:(0xc800b000+0x4*0x039)++0x03 line.long 0x00 "SymbolErrors,SymbolErrors" hexmask.long 0x00 0.--31. 0x01 " SymbolErrors ,Records the number of symbol errors encountered by the PHY" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC Tx Statistics" width 28. group ASD:(0xc800b000+0x4*0x040)++0x03 line.long 0x00 "OctetsTransmittedOK,OctetsTransmittedOK" hexmask.long 0x00 0.--31. 0x01 " OctetsTransmittedOK ,Counts the bytes transmitted in all legal frames. The count includes all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800b000+0x4*0x041)++0x03 line.long 0x00 "OctetsTransmittedBad,OctetsTransmittedBad" hexmask.long 0x00 0.--31. 0x01 " OctetsTransmittedBad ,Counts the bytes transmitted in all bad frames. The count includes all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800b000+0x4*0x042)++0x03 line.long 0x00 "TxUCPkts,TxUCPkts" hexmask.long 0x00 0.--31. 0x01 " TxUCPkts ,The total number of unicast packets transmitted (excluding bad packets)" group ASD:(0xc800b000+0x4*0x043)++0x03 line.long 0x00 "TxMCPkts,TxMCPkts" hexmask.long 0x00 0.--31. 0x01 " TxMCPkts ,The total number of multicast packets transmitted (excluding bad packets)" group ASD:(0xc800b000+0x4*0x044)++0x03 line.long 0x00 "TxBCPkts,TxBCPkts" hexmask.long 0x00 0.--31. 0x01 " TxBCPkts ,The total number of broadcast packets transmitted (excluding bad packets)" group ASD:(0xc800b000+0x4*0x045)++0x03 line.long 0x00 "TxPkts64Octets,TxPkts64Octets" hexmask.long 0x00 0.--31. 0x01 " TxPkts64Octets ,The total number of packets transmitted (including bad packets) that were 64 octets in length" group ASD:(0xc800b000+0x4*0x046)++0x03 line.long 0x00 "Txpkts65to127Octets,Txpkts65to127Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts65to127Octets ,The total number of packets transmitted (including bad packets) that were [65-127] octets in length" group ASD:(0xc800b000+0x4*0x047)++0x03 line.long 0x00 "Txpkts128to255Octets,Txpkts128to255Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts128to255Octets ,The total number of packets transmitted (including bad packets) that were [128-255] octets in length" group ASD:(0xc800b000+0x4*0x048)++0x03 line.long 0x00 "Txpkts256to511Octets,Txpkts256to511Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts256to511Octets ,The total number of packets transmitted (including bad packets) that were [256-511] octets in length" group ASD:(0xc800b000+0x4*0x049)++0x03 line.long 0x00 "Txpkts512to1023Octets,Txpkts512to1023Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts512to1023Octets ,The total number of packets transmitted (including bad packets) that were [512 - 1023] octets in length" group ASD:(0xc800b000+0x4*0x04A)++0x03 line.long 0x00 "Txpkts1024to1518Octets,Txpkts1024to1518Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts1024to1518Octets ,The total number of packets transmitted (including bad packets) that were [1024-1518] octets in length" group ASD:(0xc800b000+0x4*0x04B)++0x03 line.long 0x00 "Txpkts1519toMaxOctets,Txpkts1519toMaxOctets" hexmask.long 0x00 0.--31. 0x01 " Txpkts1519toMaxOctets ,The total number of packets transmitted (including bad packets) that were >1518 octets in length" group ASD:(0xc800b000+0x4*0x04C)++0x03 line.long 0x00 "DeferredTx(C),DeferredTx(C)" hexmask.long 0x00 0.--31. 0x01 " DeferredTx (C) ,Number of times the initial transmission attempt of a frame is postponed due to another frame already being transmitted on the Ethernet network" group ASD:(0xc800b000+0x4*0x04D)++0x03 line.long 0x00 "TxTotal Collisions,TxTotal Collisions" hexmask.long 0x00 0.--31. 0x01 " TxTotal Collisions ,Sum of all collision events" group ASD:(0xc800b000+0x4*0x04E)++0x03 line.long 0x00 "TxSingleCollisions,TxSingleCollisions" hexmask.long 0x00 0.--31. 0x01 " TxSingleCollisions ,A count of successfully transmitted frames on a particular interface where the transmission is inhibited by exactly one collision" group ASD:(0xc800b000+0x4*0x04F)++0x03 line.long 0x00 "TxMultipleCollisions,TxMultipleCollisions" hexmask.long 0x00 0.--31. 0x01 " TxMultipleCollisions ,A count of successfully transmitted frames on a particular interface for which transmission is inhibited by more than one collision" group ASD:(0xc800b000+0x4*0x050)++0x03 line.long 0x00 "TxLateCollisions,TxLateCollisions" hexmask.long 0x00 0.--31. 0x01 " TxLateCollisions ,The number of times a collision is detected on a particular interface later than 512 bit-times into the transmission of a packet" group ASD:(0xc800b000+0x4*0x051)++0x03 line.long 0x00 "ExcessiveCollisionErrors,ExcessiveCollisionErrors" hexmask.long 0x00 0.--31. 0x01 " ExcessiveCollisionErrors ,A count of frames, which collides 16 times and is then discarded by the MAC. Not effecting xMultipleCollisions" group ASD:(0xc800b000+0x4*0x052)++0x03 line.long 0x00 "ExcessiveDeferralErrors,ExcessiveDeferralErrors" hexmask.long 0x00 0.--31. 0x01 " ExcessiveDeferralErrors ,Number of times frame transmission is postponed more than 2*MaxFrameSize due to another frame already being transmitted on the Ethernet network" group ASD:(0xc800b000+0x4*0x053)++0x03 line.long 0x00 "TxExcessiveLengthDrop,TxExcessiveLengthDrop" hexmask.long 0x00 0.--31. 0x01 " TxExcessiveLengthDrop ,Frame transmissions aborted by the MAC because the frame is longer than maximum frame size" group ASD:(0xc800b000+0x4*0x054)++0x03 line.long 0x00 "TxUnderrun,TxUnderrun" hexmask.long 0x00 0.--31. 0x01 " TxUnderrun ,Internal TX error that causes the MAC to end the transmission before the end of the frame because the MAC did not get the needed data in time for transmission" group ASD:(0xc800b000+0x4*0x055)++0x03 line.long 0x00 "Tagged,Tagged" hexmask.long 0x00 0.--31. 0x01 " Tagged ,Number of OK frames with VLAN tag. (Type field = 0x8100)" group ASD:(0xc800b000+0x4*0x056)++0x03 line.long 0x00 "CRCError,CRCError" hexmask.long 0x00 0.--31. 0x01 " CRCError ,Number of frames transmitted with a legal size, but with the wrong CRC field (also called FCS field)" group ASD:(0xc800b000+0x4*0x057)++0x03 line.long 0x00 "TxPauseFrames,TxPauseFrames" hexmask.long 0x00 0.--31. 0x01 " TxPauseFrames ,Number of pause MAC frames transmitted" group ASD:(0xc800b000+0x4*0x058)++0x03 line.long 0x00 "FlowControlCollisionsSend,FlowControlCollisionsSend" hexmask.long 0x00 0.--31. 0x01 " FlowControlCollisionsSend ,Collisions generated on purpose on incoming frames, to avoid reception of traffic, while the port is in half-duplex and has flow control enabled, and have not sufficient memory to receive more frames" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General Configuration and Status" width 28. group ASD:(0xc800b000+0x4*0x070)++0x03 line.long 0x00 "Port Enable Register, Port Enable Register" bitfld.long 0x00 0. " Device enable ,Control register to enable the EMC device data path" "dis,ena" group ASD:(0xc800b000+0x4*0x071)++0x03 line.long 0x00 "Interface mode, Interface mode" bitfld.long 0x00 0. " IF_Mode ,The clk_switch_defer bit in the diverse configuration register has to be set to one before changing the value in this register" "PCS mode,Copper mode" group ASD:(0xc800b000+0x4*0x072)++0x03 line.long 0x00 "MAC clock change enable, MAC clock change enable" bitfld.long 0x00 0. " clock change enable ,Control register to enable the change in MAC clock frequency" "dis,ena" group ASD:(0xc800b000+0x4*0x073)++0x03 line.long 0x00 "MAC block status, MAC and PHY status" bitfld.long 0x00 2. " MII Clock ,Monitors MII clock activity" "not alive,alive" textline " " bitfld.long 0x00 1. " TX activity ,MAC Tx activity" "didn't occur,occurred" bitfld.long 0x00 0. " RX activity ,MAC Rx activity" "didn't occur,occurred" group ASD:(0xc800b000+0x4*0x075)++0x03 line.long 0x00 "MAC Soft Reset, MAC Soft Reset" bitfld.long 0x00 0. " Software Reset MAC ,Software reset to activate the reset of the MAC core" "Reset inactive,Enable" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General Rx Path" width 28. group ASD:(0xc800b000+0x4*0x080)++0x03 line.long 0x00 "RX FIFO High watermark,RX FIFO High watermark" hexmask.long 0x00 0.--11. 0x01 " High Water Mark ,The high water mark value" group ASD:(0xc800b000+0x4*0x08A)++0x03 line.long 0x00 "RX FIFO Low watermark,RX FIFO Low watermark" hexmask.long 0x00 0.--11. 0x01 " Low Water Mark ,The low water mark value" group ASD:(0xc800b000+0x4*0x094)++0x03 line.long 0x00 "Number of frames removed,Number of frames removed" hexmask.long 0x00 0.--31. 0x01 " Number of frames removed ,When RX FIFO on becomes full or reset, the number of frames lost/removed is shown in this register" group ASD:(0xc800b000+0x4*0x09E)++0x03 line.long 0x00 "Rx FIFO Port Reset,Rx FIFO Port Reset" bitfld.long 0x00 0. " Port reset ,To make the reset active, the bit must be set High. Setting the bit to 0 de-asserts the reset" "De-assert,Reset" group ASD:(0xc800b000+0x4*0x09F)++0x03 line.long 0x00 "Rx FIFO Errored Frame Drop,Rx FIFO Errored Frame Drop Enable" bitfld.long 0x00 0. " Drop Enable ,This bit is used in conjunction with MAC filter bits. This allows the user to select whether the errored packets are to be dropped or not" "dis,ena" group ASD:(0xc800b000+0x4*0x0A0)++0x03 line.long 0x00 "RX FIFO Overflow Event,RX FIFO Overflow Event" bitfld.long 0x00 0. " FIFO overflow event ,This register provides a status if a FIFO full situation has occurred. This register is cleared on read" "no,yes" group ASD:(0xc800b000+0x4*0x0A1)++0x03 line.long 0x00 "Info Out of Sequence,RX FIFO Info Out of Sequence" bitfld.long 0x00 0. " FIOut of Seq ,This register signals when out-of-sequence data is detected in the RX FIFO" "no,yes" group ASD:(0xc800b000+0x4*0x0A2)++0x03 line.long 0x00 "Number of Dropped Packet,Number of Error Packets Dropped in RX FIFO" hexmask.long 0x00 0.--31. 0x01 " Number of Dropped Packets ,This register gives the number of packets dropped by the RX FIFO, due to various errors.This register is cleared on Read" group ASD:(0xc800b000+0x4*0x0A6)++0x03 line.long 0x00 "Read/Write Ptr for RX FIFO,Read and Write Pointer for RX FIFO" hexmask.long 0x00 0.--11. 0x01 " Read Pointer ,Gives the read pointer value of FIFO" hexmask.long 0x00 16.--27. 0x01 " Write Pointer ,Gives the write pointer value of FIFO" group ASD:(0xc800b000+0x4*0x0AA)++0x03 line.long 0x00 "Occupancy for RX FIFO,Occupancy for RX FIFO" hexmask.long 0x00 0.--12. 0x01 " Occupancy ,Occupancy of RxFIFO in eight byte locations" group ASD:(0xc800b000+0x4*0x0AE)++0x03 line.long 0x00 "Captured Packet Length,Captured Packet Length" hexmask.long 0x00 0.--08. 0x01 " Packet Length in bytes ,Packet length when packet available bit is asserted signifies the length of 256bytes" group ASD:(0xc800b000+0x4*0x0AF)++0x03 line.long 0x00 "Indirect Addr and Control,Indirect Memory Read Access Control" bitfld.long 0x00 8. " Packet Available Flag ,Captured Packet available status. CPU needs to Reset the bit by writing '1' into the field after reading the complete packet" "Packet available,Packet Read complete" bitfld.long 0x00 7. " Start Reading ,Set by the CPU in Initiate indirect memory read and reset automatically when read complete" "no,yes" textline " " hexmask.long 0x00 0.--04. 0x01 " Address Location ,Address location to be read. Capture FIFO size is (32x64 = 256Bytes)" group ASD:(0xc800b000+0x4*0x0B0)++0x03 line.long 0x00 "Indirect Read Data Reg 0,Indirect Read Data Register 0" hexmask.long 0x00 0.--31. 0x01 " Data ,Four LSB bytes of read data" group ASD:(0xc800b000+0x4*0x0B1)++0x03 line.long 0x00 "Indirect Read Data Reg 1,Indirect Read Data Register 1" hexmask.long 0x00 0.--31. 0x01 " Data ,Four MSB bytes of read data" group ASD:(0xc800b000+0x4*0x0B2)++0x03 line.long 0x00 "Capture Enable FIFO,Capture and Loop back Enable" bitfld.long 0x00 8. " Loop back enable ,Enables Loop back in RX FIFO (i.e. TX SPI3 can pump packets into RX-FIFO instead of RX MAC)" "dis,ena" textline " " bitfld.long 0x00 0.--01. " Capture Enable mode ,Enables the different modes of capture" "Capture mode is disabled,Forward/capture FIFO for incoming packets,Matched to capture rest to forward FIFO,Matched to capture incoming to forward FIFO" group ASD:(0xc800b000+0x4*0x0B3)++0x03 line.long 0x00 "Padding and CRC stripping,Enable RX FIFO Pre-pending and CRC Stripping Enable" bitfld.long 0x00 4. " CRC stripping ,CRC stripping is enabled" "dis,ena" bitfld.long 0x00 0. " Pre-pending ,Enables pre-pending of two bytes at the start of every packet" "dis,ena" group ASD:(0xc800b000+0x4*0x0B4)++0x03 line.long 0x00 "Matching pattern RX FIFO,Matching Pattern for Packet Capture" hexmask.long 0x00 0.--15. 0x01 " Matching Pattern ,This matching pattern is checked with the TYPE/LEN field of every incoming packet to capture specific packets from data traffic" group ASD:(0xc800b000+0x4*0x0B8)++0x03 line.long 0x00 "Jumbo Packet Size for Port,RX FIFO Jumbo Packet Size" hexmask.long 0x00 0.--11. 0x01 " Jumbo Packet Size ,Jumbo Packet size. This must be less than the FIFO high water mark" group ASD:(0xc800b000+0x4*0x0BC)++0x03 line.long 0x00 "Packets dropped at Cap_FIFO,Packets Dropped at Capture FIFO" hexmask.long 0x00 0.--31. 0x01 " Packets dropped at Cap_FIFO ,Number of packets dropped at capture FIFO due to FIFO full or bad packets or during CPU not read the precious captured packet" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General Tx Path" width 28. group ASD:(0xc800b000+0x4*0x100)++0x03 line.long 0x00 "TX FIFO High watermark,TX FIFO High watermark" hexmask.long 0x00 0.--10. 0x01 " High Water Mark ,The high water mark value" group ASD:(0xc800b000+0x4*0x10A)++0x03 line.long 0x00 "TX FIFO Low watermark,TX FIFO Low watermark" hexmask.long 0x00 0.--10. 0x01 " Low Water Mark ,The low water mark value" group ASD:(0xc800b000+0x4*0x114)++0x03 line.long 0x00 "TX FIFO MAC threshold,TX FIFO MAC threshold" hexmask.long 0x00 0.--10. 0x01 " xTx FIFO MAC Threshold ,Indicates TX-FIFO read initiation threshold if packets are not available in the TX-FIFO" group ASD:(0xc800b000+0x4*0x11E)++0x03 line.long 0x00 "TX FIFO Event,TX FIFO Overflow/Underflow/Out of sequence/Internal Reset Event" bitfld.long 0x00 12. " FRE ,FIFO internal reset event occurred" "no,yes" bitfld.long 0x00 8. " FOSE ,FIFO out of sequence event occurred" "no,yes" bitfld.long 0x00 4. " FUE ,FIFO underflow event occurred" "no,yes" bitfld.long 0x00 0. " FOE ,FIFO overflow event occurred" "no,yes" group ASD:(0xc800b000+0x4*0x11F)++0x03 line.long 0x00 "TX FIFO External loop bac,TX FIFO external loop back" bitfld.long 0x00 0. " Loop RX data to TX FIFO ,This register enables performing external loop back (i.e. Rx-MAC data is looped back at TXFIFO)" "SPI-3 data from RX block to TX FIFO,Normal operation" group ASD:(0xc800b000+0x4*0x120)++0x03 line.long 0x00 "TX FIFO port reset,TX FIFO port reset" bitfld.long 0x00 0. " Block Reset ,This is a reset register for the TX block. To make the block active, the bit must be set to LOW" "Assert Reset,Deassert Reset" group ASD:(0xc800b000+0x4*0x121)++0x03 line.long 0x00 "Number of frames removed,Number of frames removed" hexmask.long 0x00 0.--31. 0x01 " Number of frames removed ,When TX FIFO becomes full or reset, the number of frames lost/removed on this port is shown in this register. This register is cleared on read" group ASD:(0xc800b000+0x4*0x125)++0x03 line.long 0x00 "Number of Dropped packet,Number of error packets dropped on TX FIFO" hexmask.long 0x00 0.--31. 0x01 " Number of Dropped Packet ,This register gives the number of packets dropped by the TX FIFO, due to various errors. This register is cleared on Read" group ASD:(0xc800b000+0x4*0x129)++0x03 line.long 0x00 "Read/Write Ptr for TX FIFO,Read/Write Pointer for TX FIFO" hexmask.long 0x00 11.--21. 0x01 " Read Pointer ,Gives the read pointer value of FIFO" hexmask.long 0x00 0.--10. 0x01 " Write Pointer ,Gives the write pointer value of FIFO" group ASD:(0xc800b000+0x4*0x12D)++0x03 line.long 0x00 "Occupancy for Tx FIFO,Occupancy for Tx FIFO" hexmask.long 0x00 0.--31. 0x01 " Occupancy for Tx FIFO ,This register gives the Occupancy for TX FIFO" group ASD:(0xc800b000+0x4*0x131)++0x03 line.long 0x00 "Insertion FIFO LSB data,Insertion FIFO Data register-0" hexmask.long 0x00 0.--31. 0x01 " Insertion FIFO LSB data bytes ,Gives the LSB four bytes (Data [31:0]) of insertion data" group ASD:(0xc800b000+0x4*0x132)++0x03 line.long 0x00 "Insertion FIFO MSB data,Insertion FIFO Data register-1" hexmask.long 0x00 0.--31. 0x01 " Insertion FIFO MSB data bytes ,Gives the MSB four bytes (Data [63:32]) of insertion data" group ASD:(0xc800b000+0x4*0x133)++0x03 line.long 0x00 "Info, Addr and Cmnd Insertion FIFO,Info, Address and Command" bitfld.long 0x00 9. " Write ,Write Command to do an indirect write access" "not active,active" bitfld.long 0x00 8. " Read ,Read command to do indirect read access" "not active,active" textline " " hexmask.long 0x00 3.--07. 0x01 " Address ,Address location at which to perform indirect access" bitfld.long 0x00 0.--02. " Info ,Info bits for corresponding data word" "res,SOP,Data Continuation,DexBytes,DeallBytes,DEBAD,res,res" group ASD:(0xc800b000+0x4*0x13D)++0x03 line.long 0x00 "TX FIFO drop/insertion,TX FIFO bad packet drop and packet insertion enable" bitfld.long 0x00 4. " Packet Insertion ,Enable read from insertion FIFO. This bit Automatically resets to '0', when insertion FIFO is empty" "dis,ena" bitfld.long 0x00 0. " Error packet Drop ,Enable hard discard of error packets in Tx FIFO" "dis,ena" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General SPI3 Burst Size Register" width 28. group ASD:(0xc800b000+0x4*0x150)++0x03 line.long 0x00 "Tx/Global configuration,Transmit and Global configuration register" bitfld.long 0x00 23. " SPI3 Transmitter Soft Reset ,When 1, Resets the SPI-3 Tx Block" "-,reset" bitfld.long 0x00 22. " SPI3 Receiver Soft Reset ,When 1, Resets the SPI-3 Rx Block" "-,reset" textline " " bitfld.long 0x00 16. " Dat_prtyer_drp ,Indicates whether to drop packets with data parity error" "don't drop,drop" textline " " bitfld.long 0x00 8.--09. " TX_BURST ,Selects maximum burst size on the TX path" "64 Bytes,64 Bytes,128 Bytes,256 Bytes" bitfld.long 0x00 4. " Tx_parity_sense ,Indicates the parity Sense to be used to check the parity on Tdat Bus" "odd,even" bitfld.long 0x00 0. " Tx_port_enable ,Enables the SPI-3 Transmit data path when set" "dis,ena" group ASD:(0xc800b000+0x4*0x151)++0x03 line.long 0x00 "Rx configuration register,Receive configuration register" bitfld.long 0x00 24. " B2B_PAUSE ,Indicates the number of pause cycles to be introduced between back-to-back transfers" "Zero pause cycles,2 Pause cycles" bitfld.long 0x00 16.--17. " RX_BURST ,Selects maximum burst size on the RX path." "64 Bytes,64 Bytes,128 Bytes,256 Bytes" bitfld.long 0x00 12. " Rx_parity_sense ,Indicates the parity Sense to be used to calculate the parity on Rdat Bus" "odd,even" textline " " bitfld.long 0x00 7. " Rx_port_enable ,Enables the Receive logical port. This enable is local to SPI-3 block. The packet will be terminated at cell boundary when the port is disabled during packet transfer" "dis,ena" bitfld.long 0x00 0. " SIG_BAD ,If this bit is '1' and the Packet Filter Control Register bit PassBad is also '1' then frames containing layer-2 errors are indicated with RERR on SPI-3" "no,yes" group ASD:(0xc800b000+0x4*0x152)++0x03 line.long 0x00 "Tx Interrupt Status reg,Transmit Interrupt Status register" bitfld.long 0x00 8. " Partial_sync_pkt_rxd ,Indicates that a partial packet Sync error (Sop not received when expected) has been received" "no,yes" bitfld.long 0x00 7. " Full_sync_pkt_rxd ,A full packet with full sync error (Eop without Sop) has been received" "no,yes" bitfld.long 0x00 6. " Dat_prty_err_pkt_rxd ,Indicates that Data parity error has been detected." "no,yes" textline " " bitfld.long 0x00 4. " Dis_port_pkt_rxd ,Indicates that a packet has been received from the Link processor when the port is disabled" "no,yes" bitfld.long 0x00 3. " Terr_rxd ,Indicates that a Terr signal has been received with Teop" "no,yes" bitfld.long 0x00 2. " Ssop_err_drop_pkt_rxd ,Indicates that a packet with short Sop has been received and hence dropped" "no,yes" textline " " bitfld.long 0x00 1. " Small_pkt_0_8_pkt_rxd ,Indicates that a packet of length between 1 and 8 bytes has been received and hence dropped" "no,yes" bitfld.long 0x00 0. " Small_pkt_9_14_pkt_rxd ,Indicates that a packet of length between 9 and 14 bytes has been received and hence dropped" "no,yes" group ASD:(0xc800b000+0x4*0x15B)++0x03 line.long 0x00 "Dis Port packet drop count,Disabled Port packet drop counter" hexmask.long 0x00 0.--07. 0x01 " Disabled Port packet drop counter ,Counts the number of packets dropped when the port was disabled. This gets cleared when read and saturates at 0xFF" group ASD:(0xc800b000+0x4*0x15C)++0x03 line.long 0x00 "Sync Err Packet drop count,Sync Error Packet drop counter" hexmask.long 0x00 0.--07. 0x01 " Disabled Port packet drop counter ,Counts the number of packets dropped due to reception of full Sync Error. This gets cleared when read and saturates at 0xFF. In SPHY mode of operation this counter reflects the number of packets dropped" group ASD:(0xc800b000+0x4*0x15D)++0x03 line.long 0x00 "Short Packet Drop count,Short Packet Drop counter" hexmask.long 0x00 0.--07. 0x01 " Short packet drop counter ,Counts the number of short packets of length 1-8 bytes dropped. This gets cleared when read and saturates at 0xFF" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "APB Ethernet MAC Command Register" width 28. group ASD:(0xc800b000+0x4*0x1b0)++0x03 line.long 0x00 "EMC Command Register,APB Ethernet MAC Command Register" bitfld.long 0x00 31. " S ,This bit remains 1 during the access. When the access is finished, the Ethernet MAC resets this bit to 0" "finished,access" bitfld.long 0x00 30. " WR_ERR ,Write to APB command and data register when Mailed access in progress" "no,yes" bitfld.long 0x00 28. " RD_ERR ,Read to data register occurred when mailed read access in progress" "no,yes" textline " " bitfld.long 0x00 26. " AT ,Single Write or Read register access" "Read,Write" hexmask.long 0x00 0.--08. 0x01 " EMC Mail Address ,Ethernet MAC Address register to be addressed" group ASD:(0xc800b000+0x4*0x1c0)++0x03 line.long 0x00 "EMC Data Register,APB Ethernet MAC Data Register" hexmask.long 0x00 0.--31. 0x01 " Data ,Write data to be written or read data from access Ethernet MAC sub-module" group ASD:(0xc800b000+0x4*0x1d0)++0x03 line.long 0x00 "EMC Write Wait Register,APB Ethernet write wait Register" hexmask.long 0x00 0.--31. 0x01 " Write Wait ,Number of system clocks to wait, before status of write mailed access is updated. Write wait=(3*(SPI3 clk period)-APB clk period) / core clk period" width 8. tree.end width 8. tree.end ;end include file xscale/ixp23xx-gbethmac.ph ;begin include file xscale/ixp23xx-gbethmac.ph ;parameters: ASD: 0xc800c000 1 ; IXP2325, IXP2350 ; ; IXP23xx-GBETHMAC %1 %2 %3 ; ; %1 memory space ; %2 Base Address ; %3 Ethernet MAC number ; ; -------------------------------------------------------------------------------- tree "Gigabit Ethernet-1 MAC" ; -------------------------------------------------------------------------------- ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC core Control" width 28. group ASD:(0xc800c000+0x4*0x00000)++0x03 line.long 0x00 "StationAddressLow,Station Address Low" hexmask.long 0x00 0.--31. 0x01 " StationAddressLow ,Source MAC address bit 31-0. This address is inserted in the source address field when transmitting pause frames, and is also used to compare against unicast frames at the receiving side" group ASD:(0xc800c000+0x4*0x00001)++0x03 line.long 0x00 "StationAddressHigh,Station Address High" hexmask.long 0x00 0.--15. 0x01 " StationAddressHigh ,Source MAC address bit 47-32. This address is inserted in the source address field when transmitting pause frames, and is also used to compare against unicast frames at the receiving side" group ASD:(0xc800c000+0x4*0x00002)++0x03 line.long 0x00 "DesiredDuplex,Desired Duplex" bitfld.long 0x00 0. " Duplex Select ,GigEMC supports half-duplex operation only for 10/100 speed on copper media. It supports Gigabit speed on both Copper and Fiber media in full duplex mode of operation only" "Half-duplex,Full-duplex" group ASD:(0xc800c000+0x4*0x00003)++0x03 line.long 0x00 "FDFCType,FDFC Type" hexmask.long 0x00 0.--15. 0x01 " FDFCType ,This value is used to fill the Type field of the Transmitted Pause frames" group ASD:(0xc800c000+0x4*0x00005)++0x03 line.long 0x00 "CollisionDistance,Collision Distance" hexmask.long 0x00 0.--09. 0x01 " Collision Distance ,Sets the limit for late collision. Collisions happening at byte times beyond the configured value are considered to be late collisions. (Valid only in half-duplex)" group ASD:(0xc800c000+0x4*0x00006)++0x03 line.long 0x00 "CollisionThreshold,Collision Threshold" hexmask.long 0x00 0.--07. 0x01 " Collision Threshold ,Sets the limit for excessive collisions. When the number of transmission attempts performed for a packet exceeds this value it is considered to be an excessive collision and the frame is dropped. (Only valid in half-duplex)" group ASD:(0xc800c000+0x4*0x00007)++0x03 line.long 0x00 "FCTxTimerValue,FCTx Timer Value" hexmask.long 0x00 0.--15. 0x01 " FCTxTimerValue ,Pause length inserted in the flow control Pause Frame sent to the receiving station. The value is in 512-bit times" group ASD:(0xc800c000+0x4*0x00008)++0x03 line.long 0x00 "FDFCAddressLow,FDFC Address Low" hexmask.long 0x00 0.--31. 0x01 " FDFCAddressLow ,The lowest 32 bits of the 48-bit globally assigned multicast pause frame destination address" group ASD:(0xc800c000+0x4*0x00009)++0x03 line.long 0x00 "FDFCAddressHigh,FDFC Address High" hexmask.long 0x00 0.--15. 0x01 " FDFCAddressHigh ,The highest 16 bits 47:32 of the globally assigned multicast pause frame destination address" group ASD:(0xc800c000+0x4*0x0000A)++0x03 line.long 0x00 "IPGReceiveTime1,IPG Receive Time1" hexmask.long 0x00 0.--09. 0x01 " IPGReceiveTime1 ,This value is configuring the first part of the IPG time for non back-to-back transmissions" group ASD:(0xc800c000+0x4*0x0000B)++0x03 line.long 0x00 "IPGReceiveTime2,IPG Receive Time2" hexmask.long 0x00 0.--09. 0x01 " IPGReceiveTime2 ,This value is configuring the second part of the IPG time for non back-to-back transmissions" group ASD:(0xc800c000+0x4*0x0000C)++0x03 line.long 0x00 "IPGTransmitTime,IPG Transmit Time" hexmask.long 0x00 0.--09. 0x01 " IPGTransmitTime ,This value is configuring IPG time for back-to-back transmissions" group ASD:(0xc800c000+0x4*0x0000E)++0x03 line.long 0x00 "PauseThreshold,Pause Threshold" hexmask.long 0x00 0.--15. 0x01 " Pause Threshold ,When a pause frame has been sent, an internal timer checks when the next pause frame must be scheduled for transmission to keep the link partner in pause mode" group ASD:(0xc800c000+0x4*0x0000F)++0x03 line.long 0x00 "MaxFrameSize,Max Frame Size" hexmask.long 0x00 0.--13. 0x01 " MaxFrameSize ,Configuring the maximum frame size the MAC can receive or transmit without activating any error counters, and without truncation" group ASD:(0xc800c000+0x4*0x00010)++0x03 line.long 0x00 "MacIFMode Mac,IF Mode" bitfld.long 0x00 0.--02. " MAC_IF_MODE ,These bits are used to define the clock mode and the RGMII/GMII/MII mode of operation" "MAC 1.25MHz TX 2.5MHz in MII mode,MAC 12.5MHz TX 25MHz in MII mode,MAC 125MHz TX 125MHz in GMII mode,MAC 125MHz TX 125MHz in GMII mode,MAC 1.25MHz TX 2.5MHz in RGMII mode,MAC 12.5MHz TX 25MHz in RGMII mode,MAC 125MHz TX 125MHz in RGMII mode,MAC 125MHz TX 125MHz in RGMII mode" group ASD:(0xc800c000+0x4*0x00011)++0x03 line.long 0x00 "FlushTX,Flush TX" bitfld.long 0x00 0. " FlushTX ,This bit is used to flush all TX data. It is used if all the traffic sent to a port should be stopped" "-,flush" group ASD:(0xc800c000+0x4*0x00012)++0x03 line.long 0x00 "FCEnable,FC Enable" bitfld.long 0x00 2. " TX HDFC ,When TX HDFC (applicable only for Half-duplex mode) is enabled, MAC will generate deliberate collisions on the incoming packets when the Rx FIFO occupancy has crossed higher watermark (flow-control)" "dis,ena" bitfld.long 0x00 1. " TX FDFC ,When TX_FDFC is enabled (applicable only for Full-duplex mode) MAC will send pause frames to the link partner when Rx FIFO occupancy has crossed higher watermark (flow-control)" "dis,ena" bitfld.long 0x00 0. " RX FDFC ,When RXFDFC is enabled (applicable only for Full-duplex mode) MAC will defer transmission when a pause frame has been received from the link partner. The deference will be for the time given by the pause length field in the received pause frame" "dis,ena" group ASD:(0xc800c000+0x4*0x00013)++0x03 line.long 0x00 "FCBackPressureLength,FC Back Pressure Length" hexmask.long 0x00 0.--05. 0x01 " FCBackPressureLength ,Sets the number of byte cycles for which the collision has to be applied. The bits 5:0 of this register are alone used" group ASD:(0xc800c000+0x4*0x00014)++0x03 line.long 0x00 "ShortRuntsThreshold,Short Runts Threshold" bitfld.long 0x00 0.--4. " ShortRunts Threshold ,The configuration holds the value in bytes, which applies to the threshold in determining between runts and short" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group ASD:(0xc800c000+0x4*0x00015)++0x03 line.long 0x00 "DiscardUnknownControlFrame,Discard Unknown Control Frame" bitfld.long 0x00 0. " DiscardUnknownControlFrame ,ControlFrame ,Discard unknown control frames." "Forward,Discard" group.long ASD:(0xc800c000+0x4*0x00016)++0x03 line.long 0x00 "RxConfig word register,Rx Config Word" hexmask.long 0x00 26.--31. 0x01 " resync_count ,Gives the number of times resynchronization on comma boundary has happened since last read. Cleared on Read" bitfld.long 0x00 25. " ppm_fifo_underrun ,Indicates if PPM FIFO has underrun. Cleared on Read" "no,yes" bitfld.long 0x00 24. " ppm_fifo_overrun ,Indicates if PPM FIFO has overrun. Cleared on Read" "no,yes" textline " " bitfld.long 0x00 23. " An_rfce ,Auto-negotiation receive flow control enable. Derived from advertised Pause capability from the link partner and local capabilities" "dis,ena" bitfld.long 0x00 22. " An_tfce ,Auto-negotiation transmit flow control enable. Derived from advertised Pause capability from the link partner and local capabilities" "dis,ena" bitfld.long 0x00 21. " An_complete ,Auto-negotiation complete. This bit remains cleared from the time auto-negotiation is reset until auto-negotiation reaches the LINK_OK state. It remains set until auto-negotiation is disabled or restarted" "no,yes" textline " " bitfld.long 0x00 20. " Rx Sync ,Receive synchronization" "Loss of synchronization,Bit synchronization" bitfld.long 0x00 19. " RxConfig ,Rx Config" "Receiving idle/data stream,Receiving ordered sets" textline " " bitfld.long 0x00 18. " ConfigChanged ,RxConfigWord has changed since last read" "yes,no" bitfld.long 0x00 17. " InvalidWord ,Have received an invalid symbol" "no,yes" bitfld.long 0x00 16. " CarrierSense ,Device is receiving idle characters" "no,yes" textline " " bitfld.long 0x00 15. " NextPage ,Next Page request" "no,yes" bitfld.long 0x00 12.--13. " RemoteFault[1:0] ,Remote fault definitions" "00,01,10,11" bitfld.long 0x00 8. " AsymPause ,Asym Pause (ability to send pause frames)" "no,yes" textline " " bitfld.long 0x00 7. " SymPause ,Sym Pause (ability to send and receive pause frames)" "no,yes" bitfld.long 0x00 6. " HalfDuplex ,Half-duplex" "no,yes" bitfld.long 0x00 5. " FullDuplex ,Full-duplex" "no,yes" group ASD:(0xc800c000+0x4*0x00017)++0x03 line.long 0x00 "TxConfig word register,Tx Config Word" bitfld.long 0x00 15. " NextPage ,Next Page request" "no,yes" bitfld.long 0x00 12.--13. " RemoteFault[1:0] ,Remote fault definitions" "00,01,10,11" bitfld.long 0x00 8. " AsymPause ,Asym Pause (ability to send pause frames)" "no,yes" textline " " bitfld.long 0x00 7. " SymPause ,Sym Pause (ability to send and receive pause frames)" "no,yes" bitfld.long 0x00 6. " HalfDuplex ,Half-duplex" "no,yes" bitfld.long 0x00 5. " FullDuplex ,Full-duplex" "no,yes" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC core Rx Statistics" width 28. group ASD:(0xc800c000+0x4*0x020)++0x03 line.long 0x00 "RxOctetsTotalOK,Rx Octets Total OK" hexmask.long 0x00 0.--31. 0x01 " RxOctetsTotalOK ,Counts the bytes received in all legal frames, including all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800c000+0x4*0x021)++0x03 line.long 0x00 "RxOctetsBAD,RxOctetsBAD" hexmask.long 0x00 0.--31. 0x01 " RxOctetsBAD ,Counts the bytes received in all bad frames with legal size (frames with CRC error, alignment errors, or code violations), including all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800c000+0x4*0x022)++0x03 line.long 0x00 "RxUCPkts,RxUCPkts" hexmask.long 0x00 0.--31. 0x01 " RxUCPkts ,The total number of unicast packets received (excluding bad packets)" group ASD:(0xc800c000+0x4*0x023)++0x03 line.long 0x00 "RxMCPkts,RxMCPkts" hexmask.long 0x00 0.--31. 0x01 " RxMCPkts ,The total number of multicast packets received (excluding bad packets)" group ASD:(0xc800c000+0x4*0x024)++0x03 line.long 0x00 "RxBCPkts,RxBCPkts" hexmask.long 0x00 0.--31. 0x01 " RxBCPkts ,The total number of Broadcast packets received (excluding bad packets)" group ASD:(0xc800c000+0x4*0x025)++0x03 line.long 0x00 "RxPkts64Octets,RxPkts64Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts64Octets ,The total number of packets received (including bad packets) that were 64 octets in length" group ASD:(0xc800c000+0x4*0x026)++0x03 line.long 0x00 "RxPkts65to127Octets,RxPkts65to127Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts65to127Octets ,The total number of packets received (including bad packets) that were [65-127] octets in length" group ASD:(0xc800c000+0x4*0x027)++0x03 line.long 0x00 "RxPkts128t0255Octets,RxPkts128t0255Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts128t0255Octets ,The total number of packets received (including bad packets) that were [128-255] octets in length" group ASD:(0xc800c000+0x4*0x028)++0x03 line.long 0x00 "RxPkts256to511Octets,RxPkts256to511Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts256to511Octets ,The total number of packets received (including bad packets) that were [256-511] octets in length" group ASD:(0xc800c000+0x4*0x029)++0x03 line.long 0x00 "RxPkts512to1023Octets,RxPkts512to1023 Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts512to1023 ,The total number of packets received (including bad packets) that were [512-1023] octets in length" group ASD:(0xc800c000+0x4*0x02A)++0x03 line.long 0x00 "RxPkts1024to1518Octets,RxPkts1024to1518 Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts1024to1518 Octets ,The total number of packets received (including bad packets) that were [1024-1518] octets in length" group ASD:(0xc800c000+0x4*0x02B)++0x03 line.long 0x00 "RxPkts1519toMaxOctets,RxPkts1519toMax Octets" hexmask.long 0x00 0.--31. 0x01 " RxPkts1519toMax Octets ,The total number of packets received (including bad packets) that were >1518 octets in length" group ASD:(0xc800c000+0x4*0x02C)++0x03 line.long 0x00 "FCSErrors,FCSErrors" hexmask.long 0x00 0.--31. 0x01 " FCSErrors ,Number of frames received with legal size, but with wrong CRC field (also called FCS field)" group ASD:(0xc800c000+0x4*0x02D)++0x03 line.long 0x00 "Tagged,Tagged" hexmask.long 0x00 0.--31. 0x01 " Tagged ,Number of OK frames with VLAN tag(Type field = 0x8100)" group ASD:(0xc800c000+0x4*0x02E)++0x03 line.long 0x00 "RxDataError,RxDataError" hexmask.long 0x00 0.--31. 0x01 " RxDataError ,Number of frames received with legal length, containing a code violation (signaled with RX_ERR on RGMII)" group ASD:(0xc800c000+0x4*0x02F)++0x03 line.long 0x00 "AlignErrors,AlignErrors" hexmask.long 0x00 0.--31. 0x01 " AlignErrors ,Frames with a legal frame size, but containing less than 8 additional bits" group ASD:(0xc800c000+0x4*0x030)++0x03 line.long 0x00 "LongErrors,LongErrors" hexmask.long 0x00 0.--31. 0x01 " LongErrors ,Frames bigger than the maximum allowed, with both OK CRC and the integral number of octets" group ASD:(0xc800c000+0x4*0x031)++0x03 line.long 0x00 "JabberErrors,JabberErrors" hexmask.long 0x00 0.--31. 0x01 " JabberErrors ,Frames bigger than the maximum allowed, with either a bad CRC or a non-integral number of octets" group ASD:(0xc800c000+0x4*0x032)++0x03 line.long 0x00 "PauseMacControlRxCounter,PauseMacControlReceivedCounter" hexmask.long 0x00 0.--31. 0x01 " PauseMacControl ReceivedCounter ,Number of Pause MAC control frames received" group ASD:(0xc800c000+0x4*0x033)++0x03 line.long 0x00 "UnknownMacCtlFrameCounter,UnknownMacControlFrameCounter" hexmask.long 0x00 0.--31. 0x01 " UnknownMacControlFrameCounter ,Counter Number of MAC control frames received with an op code different from 0001 (Pause)" group ASD:(0xc800c000+0x4*0x034)++0x03 line.long 0x00 "VeryLongErrors,VeryLongErrors" hexmask.long 0x00 0.--31. 0x01 " VeryLongErrors ,Frames bigger than the larger of 2*maxframesize and 50000 bits" group ASD:(0xc800c000+0x4*0x035)++0x03 line.long 0x00 "RuntErrors,RuntErrors" hexmask.long 0x00 0.--31. 0x01 " RuntErrors ,The total number of packets received that are less than 64 octets in length, but longer than or equal to 96 bit times, which corresponds to a 4-byte frame with a well formed preamble and SFD" group ASD:(0xc800c000+0x4*0x036)++0x03 line.long 0x00 "Short,Errors,Short,Errors" hexmask.long 0x00 0.--31. 0x01 " Short Errors ,The total number of packets received that are less than 96 bit times, which corresponds to a 4 byte frame with a well formed preamble and SFD" group ASD:(0xc800c000+0x4*0x038)++0x03 line.long 0x00 "SequenceErrors,SequenceErrors" hexmask.long 0x00 0.--31. 0x01 " SequenceErrors ,Records the number of sequencing errors that occur in Fiber mode" group ASD:(0xc800c000+0x4*0x039)++0x03 line.long 0x00 "SymbolErrors,SymbolErrors" hexmask.long 0x00 0.--31. 0x01 " SymbolErrors ,Records the number of symbol errors encountered by the PHY" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC Tx Statistics" width 28. group ASD:(0xc800c000+0x4*0x040)++0x03 line.long 0x00 "OctetsTransmittedOK,OctetsTransmittedOK" hexmask.long 0x00 0.--31. 0x01 " OctetsTransmittedOK ,Counts the bytes transmitted in all legal frames. The count includes all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800c000+0x4*0x041)++0x03 line.long 0x00 "OctetsTransmittedBad,OctetsTransmittedBad" hexmask.long 0x00 0.--31. 0x01 " OctetsTransmittedBad ,Counts the bytes transmitted in all bad frames. The count includes all bytes from the destination MAC address to and including the CRC" group ASD:(0xc800c000+0x4*0x042)++0x03 line.long 0x00 "TxUCPkts,TxUCPkts" hexmask.long 0x00 0.--31. 0x01 " TxUCPkts ,The total number of unicast packets transmitted (excluding bad packets)" group ASD:(0xc800c000+0x4*0x043)++0x03 line.long 0x00 "TxMCPkts,TxMCPkts" hexmask.long 0x00 0.--31. 0x01 " TxMCPkts ,The total number of multicast packets transmitted (excluding bad packets)" group ASD:(0xc800c000+0x4*0x044)++0x03 line.long 0x00 "TxBCPkts,TxBCPkts" hexmask.long 0x00 0.--31. 0x01 " TxBCPkts ,The total number of broadcast packets transmitted (excluding bad packets)" group ASD:(0xc800c000+0x4*0x045)++0x03 line.long 0x00 "TxPkts64Octets,TxPkts64Octets" hexmask.long 0x00 0.--31. 0x01 " TxPkts64Octets ,The total number of packets transmitted (including bad packets) that were 64 octets in length" group ASD:(0xc800c000+0x4*0x046)++0x03 line.long 0x00 "Txpkts65to127Octets,Txpkts65to127Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts65to127Octets ,The total number of packets transmitted (including bad packets) that were [65-127] octets in length" group ASD:(0xc800c000+0x4*0x047)++0x03 line.long 0x00 "Txpkts128to255Octets,Txpkts128to255Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts128to255Octets ,The total number of packets transmitted (including bad packets) that were [128-255] octets in length" group ASD:(0xc800c000+0x4*0x048)++0x03 line.long 0x00 "Txpkts256to511Octets,Txpkts256to511Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts256to511Octets ,The total number of packets transmitted (including bad packets) that were [256-511] octets in length" group ASD:(0xc800c000+0x4*0x049)++0x03 line.long 0x00 "Txpkts512to1023Octets,Txpkts512to1023Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts512to1023Octets ,The total number of packets transmitted (including bad packets) that were [512 - 1023] octets in length" group ASD:(0xc800c000+0x4*0x04A)++0x03 line.long 0x00 "Txpkts1024to1518Octets,Txpkts1024to1518Octets" hexmask.long 0x00 0.--31. 0x01 " Txpkts1024to1518Octets ,The total number of packets transmitted (including bad packets) that were [1024-1518] octets in length" group ASD:(0xc800c000+0x4*0x04B)++0x03 line.long 0x00 "Txpkts1519toMaxOctets,Txpkts1519toMaxOctets" hexmask.long 0x00 0.--31. 0x01 " Txpkts1519toMaxOctets ,The total number of packets transmitted (including bad packets) that were >1518 octets in length" group ASD:(0xc800c000+0x4*0x04C)++0x03 line.long 0x00 "DeferredTx(C),DeferredTx(C)" hexmask.long 0x00 0.--31. 0x01 " DeferredTx (C) ,Number of times the initial transmission attempt of a frame is postponed due to another frame already being transmitted on the Ethernet network" group ASD:(0xc800c000+0x4*0x04D)++0x03 line.long 0x00 "TxTotal Collisions,TxTotal Collisions" hexmask.long 0x00 0.--31. 0x01 " TxTotal Collisions ,Sum of all collision events" group ASD:(0xc800c000+0x4*0x04E)++0x03 line.long 0x00 "TxSingleCollisions,TxSingleCollisions" hexmask.long 0x00 0.--31. 0x01 " TxSingleCollisions ,A count of successfully transmitted frames on a particular interface where the transmission is inhibited by exactly one collision" group ASD:(0xc800c000+0x4*0x04F)++0x03 line.long 0x00 "TxMultipleCollisions,TxMultipleCollisions" hexmask.long 0x00 0.--31. 0x01 " TxMultipleCollisions ,A count of successfully transmitted frames on a particular interface for which transmission is inhibited by more than one collision" group ASD:(0xc800c000+0x4*0x050)++0x03 line.long 0x00 "TxLateCollisions,TxLateCollisions" hexmask.long 0x00 0.--31. 0x01 " TxLateCollisions ,The number of times a collision is detected on a particular interface later than 512 bit-times into the transmission of a packet" group ASD:(0xc800c000+0x4*0x051)++0x03 line.long 0x00 "ExcessiveCollisionErrors,ExcessiveCollisionErrors" hexmask.long 0x00 0.--31. 0x01 " ExcessiveCollisionErrors ,A count of frames, which collides 16 times and is then discarded by the MAC. Not effecting xMultipleCollisions" group ASD:(0xc800c000+0x4*0x052)++0x03 line.long 0x00 "ExcessiveDeferralErrors,ExcessiveDeferralErrors" hexmask.long 0x00 0.--31. 0x01 " ExcessiveDeferralErrors ,Number of times frame transmission is postponed more than 2*MaxFrameSize due to another frame already being transmitted on the Ethernet network" group ASD:(0xc800c000+0x4*0x053)++0x03 line.long 0x00 "TxExcessiveLengthDrop,TxExcessiveLengthDrop" hexmask.long 0x00 0.--31. 0x01 " TxExcessiveLengthDrop ,Frame transmissions aborted by the MAC because the frame is longer than maximum frame size" group ASD:(0xc800c000+0x4*0x054)++0x03 line.long 0x00 "TxUnderrun,TxUnderrun" hexmask.long 0x00 0.--31. 0x01 " TxUnderrun ,Internal TX error that causes the MAC to end the transmission before the end of the frame because the MAC did not get the needed data in time for transmission" group ASD:(0xc800c000+0x4*0x055)++0x03 line.long 0x00 "Tagged,Tagged" hexmask.long 0x00 0.--31. 0x01 " Tagged ,Number of OK frames with VLAN tag. (Type field = 0x8100)" group ASD:(0xc800c000+0x4*0x056)++0x03 line.long 0x00 "CRCError,CRCError" hexmask.long 0x00 0.--31. 0x01 " CRCError ,Number of frames transmitted with a legal size, but with the wrong CRC field (also called FCS field)" group ASD:(0xc800c000+0x4*0x057)++0x03 line.long 0x00 "TxPauseFrames,TxPauseFrames" hexmask.long 0x00 0.--31. 0x01 " TxPauseFrames ,Number of pause MAC frames transmitted" group ASD:(0xc800c000+0x4*0x058)++0x03 line.long 0x00 "FlowControlCollisionsSend,FlowControlCollisionsSend" hexmask.long 0x00 0.--31. 0x01 " FlowControlCollisionsSend ,Collisions generated on purpose on incoming frames, to avoid reception of traffic, while the port is in half-duplex and has flow control enabled, and have not sufficient memory to receive more frames" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General Configuration and Status" width 28. group ASD:(0xc800c000+0x4*0x070)++0x03 line.long 0x00 "Port Enable Register, Port Enable Register" bitfld.long 0x00 0. " Device enable ,Control register to enable the EMC device data path" "dis,ena" group ASD:(0xc800c000+0x4*0x071)++0x03 line.long 0x00 "Interface mode, Interface mode" bitfld.long 0x00 0. " IF_Mode ,The clk_switch_defer bit in the diverse configuration register has to be set to one before changing the value in this register" "PCS mode,Copper mode" group ASD:(0xc800c000+0x4*0x072)++0x03 line.long 0x00 "MAC clock change enable, MAC clock change enable" bitfld.long 0x00 0. " clock change enable ,Control register to enable the change in MAC clock frequency" "dis,ena" group ASD:(0xc800c000+0x4*0x073)++0x03 line.long 0x00 "MAC block status, MAC and PHY status" bitfld.long 0x00 2. " MII Clock ,Monitors MII clock activity" "not alive,alive" textline " " bitfld.long 0x00 1. " TX activity ,MAC Tx activity" "didn't occur,occurred" bitfld.long 0x00 0. " RX activity ,MAC Rx activity" "didn't occur,occurred" group ASD:(0xc800c000+0x4*0x075)++0x03 line.long 0x00 "MAC Soft Reset, MAC Soft Reset" bitfld.long 0x00 0. " Software Reset MAC ,Software reset to activate the reset of the MAC core" "Reset inactive,Enable" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General Rx Path" width 28. group ASD:(0xc800c000+0x4*0x080)++0x03 line.long 0x00 "RX FIFO High watermark,RX FIFO High watermark" hexmask.long 0x00 0.--11. 0x01 " High Water Mark ,The high water mark value" group ASD:(0xc800c000+0x4*0x08A)++0x03 line.long 0x00 "RX FIFO Low watermark,RX FIFO Low watermark" hexmask.long 0x00 0.--11. 0x01 " Low Water Mark ,The low water mark value" group ASD:(0xc800c000+0x4*0x094)++0x03 line.long 0x00 "Number of frames removed,Number of frames removed" hexmask.long 0x00 0.--31. 0x01 " Number of frames removed ,When RX FIFO on becomes full or reset, the number of frames lost/removed is shown in this register" group ASD:(0xc800c000+0x4*0x09E)++0x03 line.long 0x00 "Rx FIFO Port Reset,Rx FIFO Port Reset" bitfld.long 0x00 0. " Port reset ,To make the reset active, the bit must be set High. Setting the bit to 0 de-asserts the reset" "De-assert,Reset" group ASD:(0xc800c000+0x4*0x09F)++0x03 line.long 0x00 "Rx FIFO Errored Frame Drop,Rx FIFO Errored Frame Drop Enable" bitfld.long 0x00 0. " Drop Enable ,This bit is used in conjunction with MAC filter bits. This allows the user to select whether the errored packets are to be dropped or not" "dis,ena" group ASD:(0xc800c000+0x4*0x0A0)++0x03 line.long 0x00 "RX FIFO Overflow Event,RX FIFO Overflow Event" bitfld.long 0x00 0. " FIFO overflow event ,This register provides a status if a FIFO full situation has occurred. This register is cleared on read" "no,yes" group ASD:(0xc800c000+0x4*0x0A1)++0x03 line.long 0x00 "Info Out of Sequence,RX FIFO Info Out of Sequence" bitfld.long 0x00 0. " FIOut of Seq ,This register signals when out-of-sequence data is detected in the RX FIFO" "no,yes" group ASD:(0xc800c000+0x4*0x0A2)++0x03 line.long 0x00 "Number of Dropped Packet,Number of Error Packets Dropped in RX FIFO" hexmask.long 0x00 0.--31. 0x01 " Number of Dropped Packets ,This register gives the number of packets dropped by the RX FIFO, due to various errors.This register is cleared on Read" group ASD:(0xc800c000+0x4*0x0A6)++0x03 line.long 0x00 "Read/Write Ptr for RX FIFO,Read and Write Pointer for RX FIFO" hexmask.long 0x00 0.--11. 0x01 " Read Pointer ,Gives the read pointer value of FIFO" hexmask.long 0x00 16.--27. 0x01 " Write Pointer ,Gives the write pointer value of FIFO" group ASD:(0xc800c000+0x4*0x0AA)++0x03 line.long 0x00 "Occupancy for RX FIFO,Occupancy for RX FIFO" hexmask.long 0x00 0.--12. 0x01 " Occupancy ,Occupancy of RxFIFO in eight byte locations" group ASD:(0xc800c000+0x4*0x0AE)++0x03 line.long 0x00 "Captured Packet Length,Captured Packet Length" hexmask.long 0x00 0.--08. 0x01 " Packet Length in bytes ,Packet length when packet available bit is asserted signifies the length of 256bytes" group ASD:(0xc800c000+0x4*0x0AF)++0x03 line.long 0x00 "Indirect Addr and Control,Indirect Memory Read Access Control" bitfld.long 0x00 8. " Packet Available Flag ,Captured Packet available status. CPU needs to Reset the bit by writing '1' into the field after reading the complete packet" "Packet available,Packet Read complete" bitfld.long 0x00 7. " Start Reading ,Set by the CPU in Initiate indirect memory read and reset automatically when read complete" "no,yes" textline " " hexmask.long 0x00 0.--04. 0x01 " Address Location ,Address location to be read. Capture FIFO size is (32x64 = 256Bytes)" group ASD:(0xc800c000+0x4*0x0B0)++0x03 line.long 0x00 "Indirect Read Data Reg 0,Indirect Read Data Register 0" hexmask.long 0x00 0.--31. 0x01 " Data ,Four LSB bytes of read data" group ASD:(0xc800c000+0x4*0x0B1)++0x03 line.long 0x00 "Indirect Read Data Reg 1,Indirect Read Data Register 1" hexmask.long 0x00 0.--31. 0x01 " Data ,Four MSB bytes of read data" group ASD:(0xc800c000+0x4*0x0B2)++0x03 line.long 0x00 "Capture Enable FIFO,Capture and Loop back Enable" bitfld.long 0x00 8. " Loop back enable ,Enables Loop back in RX FIFO (i.e. TX SPI3 can pump packets into RX-FIFO instead of RX MAC)" "dis,ena" textline " " bitfld.long 0x00 0.--01. " Capture Enable mode ,Enables the different modes of capture" "Capture mode is disabled,Forward/capture FIFO for incoming packets,Matched to capture rest to forward FIFO,Matched to capture incoming to forward FIFO" group ASD:(0xc800c000+0x4*0x0B3)++0x03 line.long 0x00 "Padding and CRC stripping,Enable RX FIFO Pre-pending and CRC Stripping Enable" bitfld.long 0x00 4. " CRC stripping ,CRC stripping is enabled" "dis,ena" bitfld.long 0x00 0. " Pre-pending ,Enables pre-pending of two bytes at the start of every packet" "dis,ena" group ASD:(0xc800c000+0x4*0x0B4)++0x03 line.long 0x00 "Matching pattern RX FIFO,Matching Pattern for Packet Capture" hexmask.long 0x00 0.--15. 0x01 " Matching Pattern ,This matching pattern is checked with the TYPE/LEN field of every incoming packet to capture specific packets from data traffic" group ASD:(0xc800c000+0x4*0x0B8)++0x03 line.long 0x00 "Jumbo Packet Size for Port,RX FIFO Jumbo Packet Size" hexmask.long 0x00 0.--11. 0x01 " Jumbo Packet Size ,Jumbo Packet size. This must be less than the FIFO high water mark" group ASD:(0xc800c000+0x4*0x0BC)++0x03 line.long 0x00 "Packets dropped at Cap_FIFO,Packets Dropped at Capture FIFO" hexmask.long 0x00 0.--31. 0x01 " Packets dropped at Cap_FIFO ,Number of packets dropped at capture FIFO due to FIFO full or bad packets or during CPU not read the precious captured packet" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General Tx Path" width 28. group ASD:(0xc800c000+0x4*0x100)++0x03 line.long 0x00 "TX FIFO High watermark,TX FIFO High watermark" hexmask.long 0x00 0.--10. 0x01 " High Water Mark ,The high water mark value" group ASD:(0xc800c000+0x4*0x10A)++0x03 line.long 0x00 "TX FIFO Low watermark,TX FIFO Low watermark" hexmask.long 0x00 0.--10. 0x01 " Low Water Mark ,The low water mark value" group ASD:(0xc800c000+0x4*0x114)++0x03 line.long 0x00 "TX FIFO MAC threshold,TX FIFO MAC threshold" hexmask.long 0x00 0.--10. 0x01 " xTx FIFO MAC Threshold ,Indicates TX-FIFO read initiation threshold if packets are not available in the TX-FIFO" group ASD:(0xc800c000+0x4*0x11E)++0x03 line.long 0x00 "TX FIFO Event,TX FIFO Overflow/Underflow/Out of sequence/Internal Reset Event" bitfld.long 0x00 12. " FRE ,FIFO internal reset event occurred" "no,yes" bitfld.long 0x00 8. " FOSE ,FIFO out of sequence event occurred" "no,yes" bitfld.long 0x00 4. " FUE ,FIFO underflow event occurred" "no,yes" bitfld.long 0x00 0. " FOE ,FIFO overflow event occurred" "no,yes" group ASD:(0xc800c000+0x4*0x11F)++0x03 line.long 0x00 "TX FIFO External loop bac,TX FIFO external loop back" bitfld.long 0x00 0. " Loop RX data to TX FIFO ,This register enables performing external loop back (i.e. Rx-MAC data is looped back at TXFIFO)" "SPI-3 data from RX block to TX FIFO,Normal operation" group ASD:(0xc800c000+0x4*0x120)++0x03 line.long 0x00 "TX FIFO port reset,TX FIFO port reset" bitfld.long 0x00 0. " Block Reset ,This is a reset register for the TX block. To make the block active, the bit must be set to LOW" "Assert Reset,Deassert Reset" group ASD:(0xc800c000+0x4*0x121)++0x03 line.long 0x00 "Number of frames removed,Number of frames removed" hexmask.long 0x00 0.--31. 0x01 " Number of frames removed ,When TX FIFO becomes full or reset, the number of frames lost/removed on this port is shown in this register. This register is cleared on read" group ASD:(0xc800c000+0x4*0x125)++0x03 line.long 0x00 "Number of Dropped packet,Number of error packets dropped on TX FIFO" hexmask.long 0x00 0.--31. 0x01 " Number of Dropped Packet ,This register gives the number of packets dropped by the TX FIFO, due to various errors. This register is cleared on Read" group ASD:(0xc800c000+0x4*0x129)++0x03 line.long 0x00 "Read/Write Ptr for TX FIFO,Read/Write Pointer for TX FIFO" hexmask.long 0x00 11.--21. 0x01 " Read Pointer ,Gives the read pointer value of FIFO" hexmask.long 0x00 0.--10. 0x01 " Write Pointer ,Gives the write pointer value of FIFO" group ASD:(0xc800c000+0x4*0x12D)++0x03 line.long 0x00 "Occupancy for Tx FIFO,Occupancy for Tx FIFO" hexmask.long 0x00 0.--31. 0x01 " Occupancy for Tx FIFO ,This register gives the Occupancy for TX FIFO" group ASD:(0xc800c000+0x4*0x131)++0x03 line.long 0x00 "Insertion FIFO LSB data,Insertion FIFO Data register-0" hexmask.long 0x00 0.--31. 0x01 " Insertion FIFO LSB data bytes ,Gives the LSB four bytes (Data [31:0]) of insertion data" group ASD:(0xc800c000+0x4*0x132)++0x03 line.long 0x00 "Insertion FIFO MSB data,Insertion FIFO Data register-1" hexmask.long 0x00 0.--31. 0x01 " Insertion FIFO MSB data bytes ,Gives the MSB four bytes (Data [63:32]) of insertion data" group ASD:(0xc800c000+0x4*0x133)++0x03 line.long 0x00 "Info, Addr and Cmnd Insertion FIFO,Info, Address and Command" bitfld.long 0x00 9. " Write ,Write Command to do an indirect write access" "not active,active" bitfld.long 0x00 8. " Read ,Read command to do indirect read access" "not active,active" textline " " hexmask.long 0x00 3.--07. 0x01 " Address ,Address location at which to perform indirect access" bitfld.long 0x00 0.--02. " Info ,Info bits for corresponding data word" "res,SOP,Data Continuation,DexBytes,DeallBytes,DEBAD,res,res" group ASD:(0xc800c000+0x4*0x13D)++0x03 line.long 0x00 "TX FIFO drop/insertion,TX FIFO bad packet drop and packet insertion enable" bitfld.long 0x00 4. " Packet Insertion ,Enable read from insertion FIFO. This bit Automatically resets to '0', when insertion FIFO is empty" "dis,ena" bitfld.long 0x00 0. " Error packet Drop ,Enable hard discard of error packets in Tx FIFO" "dis,ena" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "Ethernet MAC General SPI3 Burst Size Register" width 28. group ASD:(0xc800c000+0x4*0x150)++0x03 line.long 0x00 "Tx/Global configuration,Transmit and Global configuration register" bitfld.long 0x00 23. " SPI3 Transmitter Soft Reset ,When 1, Resets the SPI-3 Tx Block" "-,reset" bitfld.long 0x00 22. " SPI3 Receiver Soft Reset ,When 1, Resets the SPI-3 Rx Block" "-,reset" textline " " bitfld.long 0x00 16. " Dat_prtyer_drp ,Indicates whether to drop packets with data parity error" "don't drop,drop" textline " " bitfld.long 0x00 8.--09. " TX_BURST ,Selects maximum burst size on the TX path" "64 Bytes,64 Bytes,128 Bytes,256 Bytes" bitfld.long 0x00 4. " Tx_parity_sense ,Indicates the parity Sense to be used to check the parity on Tdat Bus" "odd,even" bitfld.long 0x00 0. " Tx_port_enable ,Enables the SPI-3 Transmit data path when set" "dis,ena" group ASD:(0xc800c000+0x4*0x151)++0x03 line.long 0x00 "Rx configuration register,Receive configuration register" bitfld.long 0x00 24. " B2B_PAUSE ,Indicates the number of pause cycles to be introduced between back-to-back transfers" "Zero pause cycles,2 Pause cycles" bitfld.long 0x00 16.--17. " RX_BURST ,Selects maximum burst size on the RX path." "64 Bytes,64 Bytes,128 Bytes,256 Bytes" bitfld.long 0x00 12. " Rx_parity_sense ,Indicates the parity Sense to be used to calculate the parity on Rdat Bus" "odd,even" textline " " bitfld.long 0x00 7. " Rx_port_enable ,Enables the Receive logical port. This enable is local to SPI-3 block. The packet will be terminated at cell boundary when the port is disabled during packet transfer" "dis,ena" bitfld.long 0x00 0. " SIG_BAD ,If this bit is '1' and the Packet Filter Control Register bit PassBad is also '1' then frames containing layer-2 errors are indicated with RERR on SPI-3" "no,yes" group ASD:(0xc800c000+0x4*0x152)++0x03 line.long 0x00 "Tx Interrupt Status reg,Transmit Interrupt Status register" bitfld.long 0x00 8. " Partial_sync_pkt_rxd ,Indicates that a partial packet Sync error (Sop not received when expected) has been received" "no,yes" bitfld.long 0x00 7. " Full_sync_pkt_rxd ,A full packet with full sync error (Eop without Sop) has been received" "no,yes" bitfld.long 0x00 6. " Dat_prty_err_pkt_rxd ,Indicates that Data parity error has been detected." "no,yes" textline " " bitfld.long 0x00 4. " Dis_port_pkt_rxd ,Indicates that a packet has been received from the Link processor when the port is disabled" "no,yes" bitfld.long 0x00 3. " Terr_rxd ,Indicates that a Terr signal has been received with Teop" "no,yes" bitfld.long 0x00 2. " Ssop_err_drop_pkt_rxd ,Indicates that a packet with short Sop has been received and hence dropped" "no,yes" textline " " bitfld.long 0x00 1. " Small_pkt_0_8_pkt_rxd ,Indicates that a packet of length between 1 and 8 bytes has been received and hence dropped" "no,yes" bitfld.long 0x00 0. " Small_pkt_9_14_pkt_rxd ,Indicates that a packet of length between 9 and 14 bytes has been received and hence dropped" "no,yes" group ASD:(0xc800c000+0x4*0x15B)++0x03 line.long 0x00 "Dis Port packet drop count,Disabled Port packet drop counter" hexmask.long 0x00 0.--07. 0x01 " Disabled Port packet drop counter ,Counts the number of packets dropped when the port was disabled. This gets cleared when read and saturates at 0xFF" group ASD:(0xc800c000+0x4*0x15C)++0x03 line.long 0x00 "Sync Err Packet drop count,Sync Error Packet drop counter" hexmask.long 0x00 0.--07. 0x01 " Disabled Port packet drop counter ,Counts the number of packets dropped due to reception of full Sync Error. This gets cleared when read and saturates at 0xFF. In SPHY mode of operation this counter reflects the number of packets dropped" group ASD:(0xc800c000+0x4*0x15D)++0x03 line.long 0x00 "Short Packet Drop count,Short Packet Drop counter" hexmask.long 0x00 0.--07. 0x01 " Short packet drop counter ,Counts the number of short packets of length 1-8 bytes dropped. This gets cleared when read and saturates at 0xFF" width 8. tree.end ; -------------------------------------------------------------------------------- tree.open "APB Ethernet MAC Command Register" width 28. group ASD:(0xc800c000+0x4*0x1b0)++0x03 line.long 0x00 "EMC Command Register,APB Ethernet MAC Command Register" bitfld.long 0x00 31. " S ,This bit remains 1 during the access. When the access is finished, the Ethernet MAC resets this bit to 0" "finished,access" bitfld.long 0x00 30. " WR_ERR ,Write to APB command and data register when Mailed access in progress" "no,yes" bitfld.long 0x00 28. " RD_ERR ,Read to data register occurred when mailed read access in progress" "no,yes" textline " " bitfld.long 0x00 26. " AT ,Single Write or Read register access" "Read,Write" hexmask.long 0x00 0.--08. 0x01 " EMC Mail Address ,Ethernet MAC Address register to be addressed" group ASD:(0xc800c000+0x4*0x1c0)++0x03 line.long 0x00 "EMC Data Register,APB Ethernet MAC Data Register" hexmask.long 0x00 0.--31. 0x01 " Data ,Write data to be written or read data from access Ethernet MAC sub-module" group ASD:(0xc800c000+0x4*0x1d0)++0x03 line.long 0x00 "EMC Write Wait Register,APB Ethernet write wait Register" hexmask.long 0x00 0.--31. 0x01 " Write Wait ,Number of system clocks to wait, before status of write mailed access is updated. Write wait=(3*(SPI3 clk period)-APB clk period) / core clk period" width 8. tree.end width 8. tree.end ;end include file xscale/ixp23xx-gbethmac.ph TREE.END ; -------------------------------------------------------------------------------- ; *** Peripherals on CPP side - address line A32 = 1 *** ; -------------------------------------------------------------------------------- TREE.OPEN "CPP space" ;begin include file xscale/ixp23xx-me.ph ;parameters: ASD:1: 0xc0018000 0_0 ; -------------------------------------------------------------------------------- ; IXP2400 ; State: ok ; ; IXP2400-ME %2 %3 ; ; %1 memory space ; %2 address offset ; %3 ME number ; -------------------------------------------------------------------------------- tree "ME_0_0" ; -------------------------------------------------------------------------------- width 24. group ASD:1:(0x000+0xc0018000)++0x03 line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS" bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr" hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location" group ASD:1:(0x004+0xc0018000)++0x03 line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]" group ASD:1:(0x008+0xc0018000)++0x03 line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits" bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1" bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1" hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]" group ASD:1:(0x00c+0xc0018000)++0x03 line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads" bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7" hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error" group ASD:1:(0x010+0xc0018000)++0x03 line.long 0x00 "ALU_OUT,ALU Output" group ASD:1:(0x014+0xc0018000)++0x03 line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register" bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7" group ASD:1:(0x018+0xc0018000)++0x03 line.long 0x00 "CTX_ENABLES,Context Enable Register" bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6" bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle" textline " " bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes" bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena" bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes" textline " " bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME" bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries" textline " " bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global" textline " " bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global" textline " " bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena" bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena" bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena" bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena" textline " " bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena" bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena" bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena" bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena" group ASD:1:(0x01c+0xc0018000)++0x03 line.long 0x00 "CC_ENABLE,CC_ENABLE" bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena" bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7" group ASD:1:(0x020+0xc0018000)++0x03 line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read" bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7" group ASD:1:(0x040+0xc0018000)++0x03 line.long 0x00 "IND_CTX_STS,Indirect Context Status Register" bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes" hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter" group ASD:1:(0x044+0xc0018000)++0x03 line.long 0x00 "ACT_CTX_STS,Active Context Status Register" bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes" hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context" bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15" bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7" group ASD:1:(0x048+0xc0018000)++0x03 line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information" bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes" bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes" bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes" bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes" bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes" bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes" bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes" bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes" bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes" bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes" bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes" bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes" group ASD:1:(0x04c+0xc0018000)++0x03 line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information" bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes" bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes" bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes" bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes" bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes" bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes" bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes" bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes" bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes" bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes" bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes" bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes" group ASD:1:(0x050+0xc0018000)++0x03 line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information" bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode" textline " " bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes" bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes" bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes" bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes" bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes" bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes" bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes" bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes" bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes" bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes" bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes" bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes" group ASD:1:(0x054+0xc0018000)++0x03 line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information" bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode" textline " " bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes" bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes" bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes" bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes" bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes" bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes" bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes" bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes" bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes" bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes" bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes" bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes" group ASD:1:(0x058+0xc0018000)++0x03 line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value" hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp" group ASD:1:(0x05c+0xc0018000)++0x03 line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value" hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp" group ASD:1:(0x060+0xc0018000)++0x0f line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer" hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0" hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer" hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1" hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" group ASD:1:(0x070+0xc0018000)++0x03 line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions" bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" group ASD:1:(0x0e0+0xc0018000)++0x0f line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX" hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX" hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX" hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX" hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" group ASD:1:(0x0f4+0xc0018000)++0x03 line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register" hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index" bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" group ASD:1:(0x074+0xc0018000)++0x03 line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER" hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index" group ASD:1:(0x078+0xc0018000)++0x03 line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register" bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0x07c+0xc0018000)++0x03 line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register" bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0x080+0xc0018000)++0x03 line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring" hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write" group ASD:1:(0x084+0xc0018000)++0x03 line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring" hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read" group ASD:1:(0x0c0+0xc0018000)++0x07 line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]" line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]" group ASD:1:(0x100+0xc0018000)++0x03 line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine" bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX" bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7" group ASD:1:(0x104+0xc0018000)++0x03 line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine" bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX" bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7" group ASD:1:(0x108+0xc0018000)++0x03 line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine" bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX" bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7" group ASD:1:(0x140+0xc0018000)++0x03 line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction" group ASD:1:(0x144+0xc0018000)++0x03 line.long 0x00 "PROFILE_COUNT,Profile Count" hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle" group ASD:1:(0x148+0xc0018000)++0x03 line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number" ;group %1(0x180+%2)++0x03 hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS" in ; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc" group ASD:1:(0x3fc+0xc0018000)++0x03 line.long 0x00 "RESERVED,This address can always be used and no register will be written" width 8. tree.end ;end include file xscale/ixp23xx-me.ph ;begin include file xscale/ixp23xx-me.ph ;parameters: ASD:1: 0xc0018400 0_1 ; -------------------------------------------------------------------------------- ; IXP2400 ; State: ok ; ; IXP2400-ME %2 %3 ; ; %1 memory space ; %2 address offset ; %3 ME number ; -------------------------------------------------------------------------------- tree "ME_0_1" ; -------------------------------------------------------------------------------- width 24. group ASD:1:(0x000+0xc0018400)++0x03 line.long 0x00 "USTORE_ADDRESS,USTORE_ADDRESS" bitfld.long 0x00 31. "ECS ,Execution" "norm,rd/wr" hexmask.long 0x00 0.--12. 0x01 " UADR ,Contains the address of the Control Store location" group ASD:1:(0x004+0xc0018400)++0x03 line.long 0x00 "USTORE_DATA_LOWER,Control Store Data Bits [31..0]" group ASD:1:(0x008+0xc0018400)++0x03 line.long 0x00 "USTORE_DATA_UPPER,Upper Control Store Data Bits" bitfld.long 0x00 9.--9. "PAR[39:20] ,Contains odd Parity for data bits [39:20]" "0,1" bitfld.long 0x00 8.--8. " PAR[19:0] ,Contains odd Parity for data bits [19:0]" "0,1" hexmask.long 0x00 0.--7. 0x01 " UDATA_UPPER ,Control Store Data Bits [39..32]" group ASD:1:(0x00c+0xc0018400)++0x03 line.long 0x00 "USTORE_ERROR_STATUS,Information about parity error during instruction reads" bitfld.long 0x00 16.--18. "CTX ,Context that was executed when parity error occurred" "0,1,2,3,4,5,6,7" hexmask.long 0x00 0.--12. 0x01 " UADDR ,Adress that had the Parity Error" group ASD:1:(0x010+0xc0018400)++0x03 line.long 0x00 "ALU_OUT,ALU Output" group ASD:1:(0x014+0xc0018400)++0x03 line.long 0x00 "CTX_ARB_CNTL,Context Arbiter Control Register" bitfld.long 0x00 4.--6. "PCTX ,Previous Context" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " NCTX ,Next Context" "0,1,2,3,4,5,6,7" group ASD:1:(0x018+0xc0018400)++0x03 line.long 0x00 "CTX_ENABLES,Context Enable Register" bitfld.long 0x00 31. "IN_USE_CTX ,in-use contexts" "0-7,0/2/4/6" bitfld.long 0x00 30. " PRN Mode ,Operation of Pseudo Random Number Update" "load/read,every cycle" textline " " bitfld.long 0x00 29. " CTL_STR_PAR_ER ,Parity error detected" "no,yes" bitfld.long 0x00 28. " CTL_STR_PAR_EN ,Enables parity checking on Control Store" "dis,ena" bitfld.long 0x00 27. " BREAKPOINT ,Breakpoint instruction was executed" "no,yes" textline " " bitfld.long 0x00 20. " NN_MODE ,Controls how the Next Neighbor Registers are written" "prev ME,this ME" bitfld.long 0x00 18.--19. " NN_RING_EMPTY ,Controls Threshold when NN_EMPTY asserts" "0 entries,1 entry,2 entries,3 entries" textline " " bitfld.long 0x00 17. " LM_ADDR_1_GLOB ,Control usage of LM_ADDR_1" "context relative,global" textline " " bitfld.long 0x00 16. " LM_ADDR_0_GLOB ,Control usage of LM_ADDR_0" "context relative,global" textline " " bitfld.long 0x00 15. " CTX_EN7 ,Context 7 Enable" "dis,ena" bitfld.long 0x00 14. " CTX_EN6 ,Context 6 Enable" "dis,ena" bitfld.long 0x00 13. " CTX_EN5 ,Context 5 Enable" "dis,ena" bitfld.long 0x00 12. " CTX_EN4 ,Context 4 Enable" "dis,ena" textline " " bitfld.long 0x00 11. " CTX_EN3 ,Context 3 Enable" "dis,ena" bitfld.long 0x00 10. " CTX_EN2 ,Context 2 Enable" "dis,ena" bitfld.long 0x00 9. " CTX_EN1 ,Context 1 Enable" "dis,ena" bitfld.long 0x00 8. " CTX_EN0 ,Context 0 Enable" "dis,ena" group ASD:1:(0x01c+0xc0018400)++0x03 line.long 0x00 "CC_ENABLE,CC_ENABLE" bitfld.long 0x00 13. "CCCE ,Current Condition Code Enable" "dis,ena" bitfld.long 0x00 0.--2. " PMU CTX Monitor ,Number of the context to be monitored" "0,1,2,3,4,5,6,7" group ASD:1:(0x020+0xc0018400)++0x03 line.long 0x00 "CSR_CTX_POINTER,Pointer to select which Cobntexts' registers is read" bitfld.long 0x00 0.--2. "CTX ,Selects which contexts local CSR is accessed" "0,1,2,3,4,5,6,7" group ASD:1:(0x040+0xc0018400)++0x03 line.long 0x00 "IND_CTX_STS,Indirect Context Status Register" bitfld.long 0x00 16. "RR ,Ready to Run" "no,yes" hexmask.long 0x00 0.--12. 0x01 " CTX_PC ,Program Counter" group ASD:1:(0x044+0xc0018400)++0x03 line.long 0x00 "ACT_CTX_STS,Active Context Status Register" bitfld.long 0x00 31. "AB0 ,Microengine has a Context in executing state" "no,yes" hexmask.long 0x00 8.--20. 0x01 " ACTXPC ,PC of Execution Context" bitfld.long 0x00 3.--7. " ME_NO ,Number of Microengine" "ME_0_0,ME_0_1,ME_0_2,ME_0_3,ME_0_4,ME_0_5,ME_0_6,ME_0_7,ME_0_8,ME_0_9,ME_0_10,ME_0_11,ME_0_12,ME_0_13,ME_0_14,ME_0_15,ME_1_0,ME_1_1,ME_1_2,ME_1_3,ME_1_4,ME_1_5,ME_1_6,ME_1_7,ME_1_8,ME_1_9,ME_1_10,ME_1_11,ME_1_12,ME_1_13,ME_1_14,ME_1_15" bitfld.long 0x00 0.--2. " ACNO ,Number of Executing Context" "0,1,2,3,4,5,6,7" group ASD:1:(0x048+0xc0018400)++0x03 line.long 0x00 "IND_CTX_SIG_EVENTS,Indirect Contexts' Event Signals Status Information" bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes" bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes" bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes" bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes" bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes" bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes" bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes" bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes" bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes" bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes" bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes" bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes" group ASD:1:(0x04c+0xc0018400)++0x03 line.long 0x00 "ACT_CTX_SIG_EVENTS,Active Contexts' Event Signals Status Information" bitfld.long 0x00 15. "SIGNAL_15 ,Event Signal" "no,yes" bitfld.long 0x00 14. " SIGNAL_14 ,Event Signal" "no,yes" bitfld.long 0x00 13. " SIGNAL_13 ,Event Signal" "no,yes" bitfld.long 0x00 12. " SIGNAL_12 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 11. " SIGNAL_11 ,Event Signal" "no,yes" bitfld.long 0x00 10. " SIGNAL_10 ,Event Signal" "no,yes" bitfld.long 0x00 9. " SIGNAL_9 ,Event Signal" "no,yes" bitfld.long 0x00 8. " SIGNAL_8 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 7. " SIGNAL_7 ,Event Signal" "no,yes" bitfld.long 0x00 6. " SIGNAL_6 ,Event Signal" "no,yes" bitfld.long 0x00 5. " SIGNAL_5 ,Event Signal" "no,yes" bitfld.long 0x00 4. " SIGNAL_4 ,Event Signal" "no,yes" textline " " bitfld.long 0x00 3. " SIGNAL_3 ,Event Signal" "no,yes" bitfld.long 0x00 2. " SIGNAL_2 ,Event Signal" "no,yes" bitfld.long 0x00 1. " SIGNAL_1 ,Event Signal" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary Arbiter Wakeup Event" "no,yes" group ASD:1:(0x050+0xc0018400)++0x03 line.long 0x00 "IND_CTX_WAKEUP_EVENTS,Indirect Contexts' Wakeup Event Signals Status Information" bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode" textline " " bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes" bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes" bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes" bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes" bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes" bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes" bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes" bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes" bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes" bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes" bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes" bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes" group ASD:1:(0x054+0xc0018400)++0x03 line.long 0x00 "ACT_CTX_WAKEUP_EVENTS,Active Contexts' Wakeup Event Signals Status Information" bitfld.long 0x00 16. "ANY_WK_EVENTS ,ANY Wake up Event" "All mode,Any mode" textline " " bitfld.long 0x00 15. " WK_EV_15 ,Wake up Event" "no,yes" bitfld.long 0x00 14. " WK_EV_14 ,Wake up Event" "no,yes" bitfld.long 0x00 13. " WK_EV_13 ,Wake up Event" "no,yes" bitfld.long 0x00 12. " WK_EV_12 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 11. " WK_EV_11 ,Wake up Event" "no,yes" bitfld.long 0x00 10. " WK_EV_10 ,Wake up Event" "no,yes" bitfld.long 0x00 9. " WK_EV_9 ,Wake up Event" "no,yes" bitfld.long 0x00 8. " WK_EV_8 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 7. " WK_EV_7 ,Wake up Event" "no,yes" bitfld.long 0x00 6. " WK_EV_6 ,Wake up Event" "no,yes" bitfld.long 0x00 5. " WK_EV_5 ,Wake up Event" "no,yes" bitfld.long 0x00 4. " WK_EV_4 ,Wake up Event" "no,yes" textline " " bitfld.long 0x00 3. " WK_EV_3 ,Wake up Event" "no,yes" bitfld.long 0x00 2. " WK_EV_2 ,Wake up Event" "no,yes" bitfld.long 0x00 1. " WK_EV_1 ,Wake up Event" "no,yes" bitfld.long 0x00 0. " VOL ,Voluntary" "no,yes" group ASD:1:(0x058+0xc0018400)++0x03 line.long 0x00 "IND_CTX_FUTURE_COUNT,Indirect Contexts' Timestamp compare value" hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp" group ASD:1:(0x05c+0xc0018400)++0x03 line.long 0x00 "ACT_CTX_FUTURE_COUNT,Active Contexts' Timestamp compare value" hexmask.long 0x00 0.--15. 0x01 "FUTURE_CNT ,Value to match against low bits of Timestamp" group ASD:1:(0x060+0xc0018400)++0x0f line.long 0x00 "IND_LM_ADDR_0,LM_ADDR_0 selected by CSR_CTX_Pointer" hexmask.long 0x00 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" line.long 0x04 "ACT_LM_ADDR_0,Access working copy LM_ADDR_0" hexmask.long 0x04 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" line.long 0x08 "IND_LM_ADDR_1,LM_ADDR_1 selected by CSR_CTX_Pointer" hexmask.long 0x08 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" line.long 0x0c "ACT_LM_ADDR_1,Access working copy LM_ADDR_1" hexmask.long 0x0c 2.--11. 0x04 "LM_ADDR ,Selects 32-bit word in Local Memory" group ASD:1:(0x070+0xc0018400)++0x03 line.long 0x00 "BYTE_IDX,Controls the byte shift amount during Byte_Align instructions" bitfld.long 0x00 0.--1. "BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" group ASD:1:(0x0e0+0xc0018400)++0x0f line.long 0x00 "IND_LM_ADDR_0_BYTE_IDX,Read or writes IND_LM_ADDR_0 and BYTE_IDX" hexmask.long 0x00 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" line.long 0x04 "ACT_LM_ADDR_0_BYTE_IDX,ACT_LM_ADDR_0_BYTE_IDX" hexmask.long 0x04 2.--11. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x04 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" line.long 0x08 "IND_LM_ADDR_1_BYTE_IDX,IND_LM_ADDR_1_BYTE_IDX" hexmask.long 0x08 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x08 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" line.long 0x0c "ACT_LM_ADDR_1_BYTE_IDX,ACT_LM_ADDR_1_BYTE_IDX" hexmask.long 0x0c 2.--12. 0x01 "LM_ADDR ,Selects 32-bit word in Local Memory" bitfld.long 0x0c 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" group ASD:1:(0x0f4+0xc0018400)++0x03 line.long 0x00 "T_IDX_BYTE_IDX,Read or writes T_IDX and BYTE_IDX register" hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index" bitfld.long 0x00 0.--1. " BYTE_NO ,Specifies a Byte Number for use with byte_align instruction" "0,1,2,3" group ASD:1:(0x074+0xc0018400)++0x03 line.long 0x00 "T_IDX,Index register for S_TRANSFER or D_TRANSFER" hexmask.long 0x00 2.--8. 0x01 "XFER_INDEX ,Transfer Register Index" group ASD:1:(0x078+0xc0018400)++0x03 line.long 0x00 "IND_FUTURE_COUNT_SIGNAL,Indirect Contexts' FUTURE_COUNT Signal Register" bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0x07c+0xc0018400)++0x03 line.long 0x00 "ACT_FUTURE_COUNT_SIGNAL,Active Contexts' FUTURE_COUNT Signal Register" bitfld.long 0x00 0.--3. "SIG_NO ,Signal Number to set when FUTURE_COUNT matches TIMESTAMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0x080+0xc0018400)++0x03 line.long 0x00 "NN_PUT,Put Pointer Register for Next Neighbor Ring" hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to write" group ASD:1:(0x084+0xc0018400)++0x03 line.long 0x00 "NN_GET,Get Pointer Register for Next Neighbor Ring" hexmask.long 0x00 0.--6. 0x01 "NN_REG_INDEX ,Specifies one of 128 NN registers to read" group ASD:1:(0x0c0+0xc0018400)++0x07 line.long 0x00 "TIMESTAMP_LOW,Timestamp[31:0]" line.long 0x04 "TIMESTAMP_HIGH,Timestamp[63:32]" group ASD:1:(0x100+0xc0018400)++0x03 line.long 0x00 "NEXT_NEIGHBOR_SIGNAL,Signal a Context in the Next Neighbor Microengine" bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX" bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Next Neighbor Microengine" "0,1,2,3,4,5,6,7" group ASD:1:(0x104+0xc0018400)++0x03 line.long 0x00 "PREV_NEIGHBOR_SIGNAL,Signal a Context in the Previous Neighbor Microengine" bitfld.long 0x00 7. "THIS_CTX ,Controls" "use CTX field,same CTX" bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " CTX ,Context to signal in the Previous Neighbor Microengine" "0,1,2,3,4,5,6,7" group ASD:1:(0x108+0xc0018400)++0x03 line.long 0x00 "SAME_ME_SIGNAL,Signal another Context in the same Microengine" bitfld.long 0x00 7. "NEXT_CTX ,Controls" "use CTX field,next CTX" bitfld.long 0x00 3.--6. " SIG_NO ,Signal to set in the same Microengine" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " CTX ,Context to signal in the same Neighbor Microengine" "0,1,2,3,4,5,6,7" group ASD:1:(0x140+0xc0018400)++0x03 line.long 0x00 "CRC_REMAINDER,Input Operand and result of CRC instruction" group ASD:1:(0x144+0xc0018400)++0x03 line.long 0x00 "PROFILE_COUNT,Profile Count" hexmask.long 0x00 0.--15. 0x01 "PROFILE_COUNT ,Count advances by one every cycle" group ASD:1:(0x148+0xc0018400)++0x03 line.long 0x00 "PSEUDO_RANDOM_NUMBER,Pseudo Random Number" ;group %1(0x180+%2)++0x03 hide.long 0x38 "LOCAL_CSR_STATUS,LOCAL_CSR_STATUS" in ; bitfld.long 0x0 0. " STATUS ,Local CSR Status" "no acc,acc" group ASD:1:(0x3fc+0xc0018400)++0x03 line.long 0x00 "RESERVED,This address can always be used and no register will be written" width 8. tree.end ;end include file xscale/ixp23xx-me.ph ; *** bit description not complete tree "CPP-DDR SDRAM Controller" ;begin include file xscale/ixp23xx-cppddr.ph ;parameters: ASD:1: 0xd0000000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; State: ok ; ; IXP23xx-CPPDDR %1 %2 ; ; %1 memory space ; %2 base address width 20. group ASD:1:(0xd0000000+0x00)++0x03 line.long 0x00 "DU_CONTROL,DRAM Controller Control Register" bitfld.long 0x00 31. "X32_PART_SIZE ,Size of x32 parts" "2M x 32,4M x 32" bitfld.long 0x00 30. " DIS_CAP ,Disable Concurrent Auto Precharge" "dis,ena" textline " " bitfld.long 0x00 29. " TRFC ,Refresh Command Period" "11 clk,10 clk" bitfld.long 0x00 28. " TRRD ,Active BankA to active BankB delay" "3 clk,2 clk" bitfld.long 0x00 27. " TWR ,Write recovery time" "3 clk,2 clk" bitfld.long 0x00 26. " NUM_SIDES ,Number of DIMM Sides" "1,2" textline " " bitfld.long 0x00 23.--25. " NUM_ROW_COL ,number of divice row and column" "8Mx8/8Mx16,16Mx8,16Mx16,32Mx8/32Mx16,64Mx8,64Mx16,128Mx8,res" hexmask.long 0x00 15.--22. 0x01 " REF_COUNT ,Refresh Counter Reload Value" bitfld.long 0x00 14. " REF_EN ,Enables refresh operation" "no,yes" textline " " bitfld.long 0x00 10. " TWTR ,Write command to read command delay" "2 clk,1 clk" bitfld.long 0x00 9. " RD_WR_SPACING ,Back to Back Read-write turn around" "2 clk,1 clk" bitfld.long 0x00 8. " RD_RD_SPACING ,Back to Back read turn around" "2 clk,1 clk" textline " " bitfld.long 0x00 6.--7. " TRC ,Active to Active Delay (tRC)" "10 clk,9 clk,8 clk,7 clk" bitfld.long 0x00 4.--5. " TRAS ,Activate to Precharge Delay (tRAS)" "7 clk,6 clk,5 clk,res" bitfld.long 0x00 2.--3. " TCL ,CAS# Latency (tCL)" "3 clk,2.5 clk,2 clk,res" bitfld.long 0x00 1. " TRCD ,DRAM RAS# to CAS# Delay (tRCD)" "3 clk,2 clk" bitfld.long 0x00 0. " TRP ,DRAM RAS# Precharge (tRP)" "3 clk,2 clk" group ASD:1:(0xd0000000+0x08)++0x03 line.long 0x00 "DU_ERROR_STATUS_1,DRAM Error Status Register 1" hexmask.long 0x00 3.--30. 0x08 "ERR_ADDR ,Error Address of DRAM request which had an ECC Error" bitfld.long 0x00 1. " UNCORR_ERR ,Uncorrectable Error" "no,yes" bitfld.long 0x00 0. " CORR_ERR ,correctabele Error" "no,yes" if (d.l(ASD:1:0xd0000000+0x10)&0x10000)==0x10000 group ASD:1:(0xd0000000+0x10)++0x03 line.long 0x00 "DU_ERROR_STATUS_2,DRAM Error Status Register 2" bitfld.long 0x00 31. "MULT_CORR_ERR ,Multiple correctable error" "no,yes" bitfld.long 0x00 30. " MULT_UNCORR_ERR ,Multiple uncorrectable error" "no,yes" bitfld.long 0x00 29. " RMW_ERR ,Error Information captured was from RMW operation" "no,yes" bitfld.long 0x00 20.--24. " MSTR_INT ,Indicates which internal Master was the originator of the transaction" "ME_0_0,ME_0_1,ME_0_2,ME_0_3, , , , , , , , , , , , , , , , , , , , , , , , , ,XScale Core,NPE0,NPE1" textline " " bitfld.long 0x00 17.--19. " CONTEXT ,Indicates the origin of the transaction" "res,PCI,res,res,res,res,res,res" bitfld.long 0x00 16. " SOURCE ,Indicates the originator of the transaction" "PCI,ME/NPE/XScale Core" hexmask.long 0x00 0.--7. 0x01 " ERR_SYND ,Syndrome bits generated by the ECC check logic" else group ASD:1:(0xd0000000+0x10)++0x03 line.long 0x00 "DU_ERROR_STATUS_2,DRAM Error Status Register 2" bitfld.long 0x00 31. "MULT_CORR_ERR ,Multiple correctable error" "no,yes" bitfld.long 0x00 30. " MULT_UNCORR_ERR ,Multiple uncorrectable error" "no,yes" bitfld.long 0x00 29. " RMW_ERR ,Error Information captured was from RMW operation" "no,yes" bitfld.long 0x00 20.--24. " MSTR_INT ,Indicates which internal Master was the originator of the transaction" "ME_0_0,ME_0_1,ME_0_2,ME_0_3, , , , , , , , , , , , , , , , , , , , , , , , , ,XScale Core,NPE0,NPE1" textline " " bitfld.long 0x00 17.--19. " CONTEXT ,ME context number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " SOURCE ,Indicates the originator of the transaction" "PCI,ME/NPE/XScale Core" hexmask.long 0x00 0.--7. 0x01 " ERR_SYND ,Syndrome bits generated by the ECC check logic" endif group ASD:1:(0xd0000000+0x18)++0x03 line.long 0x00 "DU_ECC_TEST,DRAM ECC Test Register" bitfld.long 0x00 8. "DISABLE_CHK ,Disable ECC checking bit" "no,yes" hexmask.long 0x00 0.--7. 0x01 " ECC_INV ,Bits provided bvy user which are XORed with generated ECC bits" group ASD:1:(0xd0000000+0x20)++0x03 line.long 0x00 "DU_INIT,DRAM Initialization Register" bitfld.long 0x00 31. "LD_MODE_REG ,Perform Load Mode Register operation to DRAM" "no,yes" bitfld.long 0x00 30. " REFRESH ,Perform a Auto Refresh operation to DRAM" "no,yes" bitfld.long 0x00 29. " PRECHARGE ,Perform a Precharge operation to DRAM" "no,yes" bitfld.long 0x00 16. " CKE ,Clock Enable" "dis,ena" textline " " bitfld.long 0x00 15. " SIDE1 ,Apply command to Side 1 of a two sided DIMM" "no,yes" bitfld.long 0x00 14. " SIDE0 ,Apply command to Side 0 of a two sided DIMM" "no,yes" bitfld.long 0x00 12.--13. " BANK_SEL ,Bank Selection" "0,1,2,3" hexmask.long 0x00 0.--11. 0x01 " MODE_BITS ,Mode Bits written to the DRAM when a Load Mode Register command is issued" group ASD:1:(0xd0000000+0x28)++0x03 line.long 0x00 "DU_CONTROL2,DRAM Controller Control Register 2" bitfld.long 0x00 11. "RCVEN_OV ,Receive Enable Override" "PHASSEL/RCVEN_DLY,CAS Latency" bitfld.long 0x00 9.--10. " PHASSEL ,Receive Enable Phase Select" "no delay,0.25 clk,0.5 clk,0.75 clk" textline " " bitfld.long 0x00 8. " RCVEN_DLY ,Receive Enable Delay" "no delay,1 clk" bitfld.long 0x00 4.--7. " RD_SKIP ,Read Skip Thershold" "res,res,res,3,4,5,6,7,8,9,10,11,12,res,res,res" bitfld.long 0x00 0.--3. " WRT_SKIP ,Write Skip Thershold" "res,res,res,3,4,5,6,7,8,9,10,11,12,res,res,res" width 8. ;end include file xscale/ixp23xx-cppddr.ph ;begin include file xscale/ixp23xx-ddrrcmp.ph ;parameters: ASD:1: 0xd0000000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; IXP23xx-DDRRCMP %1 %2 ; ; %1 memory space ; %2 base address tree "DRAM RCOMP and I/O Registers" width 36. group ASD:1:(0xd0000000+0x200)++0x03 line.long 0x00 "D_RCMP_SETUP_CONTROL,DRAM RCOMP Setup and Control Register" bitfld.long 0x00 21. " UPDATE_SEQ_SEL ,Sequence of 1 binary and thermometer cycle" "continuous thermometer cycle,1 binary 7 thermometer cycle" textline " " bitfld.long 0x00 20. " GMII_RCOMP_OVERRIDE_SEL ,GMII RComp and SComp Override Select" "no,yes" bitfld.long 0x00 19. " RCVEN_RCOMP_OVERRIDE_SEL ,RCVEN RComp and SComp Override Select" "no,yes" textline " " bitfld.long 0x00 18. " CS_RCOMP_OVERRIDE_SEL ,CS RComp and SComp Override Select" "no,yes" bitfld.long 0x00 17. " SLEW_INX_SEL ,Slew Index Select" "RCOMP[4:1],RCOMP[3:0]" textline " " bitfld.long 0x00 16. " ZQ_INV_POLARITY ,Inc/Dec Invert: Invert the inc/dec signal from the pads" "no,yes" bitfld.long 0x00 15. " CTL_RCOMP_OVERRIDE_SEL ,CTL RComp and SComp Override Select" "no,yes" textline " " bitfld.long 0x00 14. " CKE_RCOMP_OVERRIDE_SEL ,CKE RComp and SComp Override Select" "no,yes" bitfld.long 0x00 13. " CK_RCOMP_OVERRIDE_SEL ,CK RComp and SComp Override Select" "no,yes" textline " " bitfld.long 0x00 12. " DQ_RCOMP_OVERRIDE_SEL ,DQ RComp and SComp Override Select" "no,yes" bitfld.long 0x00 11. " RCOMP_LOCK_RSH ,RCOMP Lock Bit: Once this bit is set, any further writes to this memory mapped space will be ignored" "no,yes" textline " " bitfld.long 0x00 10. " SLEW_RATE_TABLE ,Slew Rate Tables Programmed" "no,yes" bitfld.long 0x00 5.--07. " CR0_RCOMPPRD[ ,RCOMP Period (RCOMPPRD)" "4194304 cycles,2097152 cycles,1048576 cycles,524288 cycles,262144 cycles,131072 cycles,65536 cycles,Fast RCOMP" textline " " bitfld.long 0x00 4. " BLOCKATPADS ,Block RCOMP Updates (Block at pads)" "Normal Operation,RCOMP_UPDATE/auto pad update" textline " " bitfld.long 0x00 3. " BLOCKATWAIT ,RComp State Machine Disable (Block at WAIT)" "Normal Operation,stall at WAIT" textline " " bitfld.long 0x00 2. " FRCOMP ,Force RCOMP Operation (FRCOMP)" "no,yes" bitfld.long 0x00 1. " NRCOMP_OVER_EN ,RCOMP Override Enable for NMOS" "dis,ena" bitfld.long 0x00 0. " PRCOMP_OVER_EN ,RCOMP Override Enable for PMOS" "dis,ena" group ASD:1:(0xd0000000+0x208)++0x03 line.long 0x00 "D_RCMP_PMOS_MEASURED,D_RCMP_PMOS_MEASURED" bitfld.long 0x00 12. " INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1" hexmask.long 0x00 0.--11. 0x01 " DRPCNTRV ,PMOS RCOMP Measured Value from Eval block" group ASD:1:(0xd0000000+0x210)++0x03 line.long 0x00 "D_RCMP_NMOS_MEASURED,D_RCMP_NMOS_MEASURED" bitfld.long 0x00 12. " INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1" hexmask.long 0x00 0.--11. 0x01 " DRNCNTRV ,NMOS RCOMP Measured Value from Eval block" group ASD:1:(0xd0000000+0x218)++0x03 line.long 0x00 "D_RCMP_PMOS_OVERRIDE,D_RCMP_PMOS_OVERRIDE" hexmask.long 0x00 12.--23. 0x01 " CKE_PRCOMP_OV ,CKE PMOS RCOMP Override Values" hexmask.long 0x00 0.--11. 0x01 " CTL_PRCOMP_OV ,CTL PMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x220)++0x03 line.long 0x00 "D_RCMP_NMOS_OVERRIDE,D_RCMP_NMOS_OVERRIDE" hexmask.long 0x00 12.--23. 0x01 " CKE_NRCOMP_OV ,CKE NMOS RCOMP Override Values" hexmask.long 0x00 0.--11. 0x01 " CTL_NRCOMP_OV ,CTL NMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x228)++0x03 line.long 0x00 "D_RCMP_PMOS_NMOS_SCOMP_OVERRIDE,D_RCMP_PMOS_NMOS_SCOMP_OVERRIDE" hexmask.long 0x00 28.--31. 0x01 " CTL_PSCOMP_OV ,CTL PMOS Slew Override Value" hexmask.long 0x00 24.--27. 0x01 " CTL_NSCOMP_OV ,CTL NMOS Slew Override Value" textline " " hexmask.long 0x00 20.--23. 0x01 " CKE_PSCOMP_OV ,CKE PMOS Slew Override Value" hexmask.long 0x00 16.--19. 0x01 " CKE_NSCOMP_OV ,CKE NMOS Slew Override Value" textline " " hexmask.long 0x00 12.--15. 0x01 " CK_PSCOMP_OV ,CK PMOS Slew Override Value" hexmask.long 0x00 8.--11. 0x01 " CK_NSCOMP_OV ,CK NMOS Slew Override Value" textline " " hexmask.long 0x00 4.--07. 0x01 " DQ_PSCOMP_OV ,DQ PMOS Slew Override Value" hexmask.long 0x00 0.--03. 0x01 " DQ_NSCOMP_OV ,DQ NMOS Slew Override Value" group ASD:1:(0xd0000000+0x230)++0x03 line.long 0x00 "D_RCMP_STRENGTH_SLEW_INDEX_SEL,D_RCMP_STRENGTH_SLEW_INDEX_SEL" bitfld.long 0x00 29. " RCVEN_SLEWCLAMPEN ,RCVEN Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 25.--28. " RCVEN_STRENGTH ,RCVEN Clock Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 24. " CS_SLEWCLAMPEN ,CS Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 20.--23. " CS_STRENGTH ,CS Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 19. " DQ_SLEWCLAMPEN ,DQ Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 15.--18. " DQ_STRENGTH ,DQ Data Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 14. " CK_SLEWCLAMPEN ,CK Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 10.--13. " CK_STRENGTH ,Clock Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 9. " CKE_SLEWCLAMPEN ,CKE Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 5.--08. " CKE_STRENGTH ,CKE Strength Control which is used as the multiplier factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 4. " CTL_SLEWCLAMPEN ,CTL Slew Rate Index RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 0.--03. " CTL_STRENGTH ,CTL Strength Control which is used as the multipler factor for raw RCOMP setting" "0.125,0.250,0.375,0.500,0.625,0.750,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" group ASD:1:(0xd0000000+0x238)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_OFFSET,D_RCMP_CTL_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CTLRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength" group ASD:1:(0xd0000000+0x240)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_OFFSET,D_RCMP_CTL_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CTLRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength" group ASD:1:(0xd0000000+0x248)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_OFFSET,D_RCMP_CKE_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKERCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the CKE signal group" group ASD:1:(0xd0000000+0x250)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_OFFSET,D_RCMP_CKE_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKERCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the CKE signal group" group ASD:1:(0xd0000000+0x258)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_OFFSET,D_RCMP_CK_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the CK signal group" group ASD:1:(0xd0000000+0x260)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_OFFSET,D_RCMP_CK_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CKRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the CK signal group" group ASD:1:(0xd0000000+0x268)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_OFFSET,D_RCMP_DQ_PMOS_PU_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_DQRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the DQ signal group" group ASD:1:(0xd0000000+0x270)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_OFFSET,D_RCMP_DQ_NMOS_PD_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_DQRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the DQ signal group" group ASD:1:(0xd0000000+0x278)++0x03 line.long 0x00 "D_RCMP_PMOS_NMOS_VERT_OVERRIDE,D_RCMP_PMOS_NMOS_VERT_OVERRIDE" hexmask.long 0x00 12.--23. 0x01 " CRO_OVERRIDE_N ,NMOS RCOMP Override Value to RCOMP buffer" hexmask.long 0x00 0.--11. 0x01 " CRO_OVERRIDE_P ,PMOS RCOMP Override Value to RCOMP buffer" group ASD:1:(0xd0000000+0x280)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_0,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x288)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_1,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x290)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_2,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x298)++0x03 line.long 0x00 "D_RCMP_CTL_PMOS_PU_SLEW_TABLE_3,D_RCMP_CTL_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CTL_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x2a0)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_0,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x2a8)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_1,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x2b0)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_2,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x2b8)++0x03 line.long 0x00 "D_RCMP_CTL_NMOS_PD_SLEW_TABLE_3,D_RCMP_CTL_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CTL_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 8.--11. 0x01 " CTL_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CTL_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" hexmask.long 0x00 0.--3. 0x01 " CTL_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CTL signal group" group ASD:1:(0xd0000000+0x2c0)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_0,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2c8)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_1,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2d0)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_2,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2d8)++0x03 line.long 0x00 "D_RCMP_CKE_PMOS_PU_SLEW_TABLE_3,D_RCMP_CKE_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CKE_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2e0)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_0,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2e8)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_1,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2f0)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_2,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x2f8)++0x03 line.long 0x00 "D_RCMP_CKE_NMOS_PD_SLEW_TABLE_3,D_RCMP_CKE_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CKE_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 8.--11. 0x01 " CKE_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CKE_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" hexmask.long 0x00 0.--3. 0x01 " CKE_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CKE signal group" group ASD:1:(0xd0000000+0x300)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_0,D_RCMP_CK_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x308)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_1,D_RCMP_CK_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x310)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_2,D_RCMP_CK_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x318)++0x03 line.long 0x00 "D_RCMP_CK_PMOS_PU_SLEW_TABLE_3,D_RCMP_CK_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CK_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x320)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_0,D_RCMP_CK_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x328)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_1,D_RCMP_CK_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x330)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_2,D_RCMP_CK_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x338)++0x03 line.long 0x00 "D_RCMP_CK_NMOS_PD_SLEW_TABLE_3,D_RCMP_CK_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CK_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 8.--11. 0x01 " CK_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CK_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" hexmask.long 0x00 0.--3. 0x01 " CK_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CK signal group" group ASD:1:(0xd0000000+0x340)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_0,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x348)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_1,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x350)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_2,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x358)++0x03 line.long 0x00 "D_RCMP_DQ_PMOS_PU_SLEW_TABLE_3,D_RCMP_DQ_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " DQ_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x360)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_0,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x368)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_1,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x370)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_2,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x378)++0x03 line.long 0x00 "D_RCMP_DQ_NMOS_PD_SLEW_TABLE_3,D_RCMP_DQ_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " DQ_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the DQ signal group" group ASD:1:(0xd0000000+0x380)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_0,D_RCMP_CS_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x388)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_1,D_RCMP_CS_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x390)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_2,D_RCMP_CS_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x398)++0x03 line.long 0x00 "D_RCMP_CS_PMOS_PU_SLEW_TABLE_3,D_RCMP_CS_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CS_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x3a0)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_0,D_RCMP_CS_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x3a8)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_1,D_RCMP_CS_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x3b0)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_2,D_RCMP_CS_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x3b8)++0x03 line.long 0x00 "D_RCMP_CS_NMOS_PD_SLEW_TABLE_3,D_RCMP_CS_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " CS_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 8.--11. 0x01 " CS_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " CS_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" hexmask.long 0x00 0.--3. 0x01 " CS_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the CS signal group" group ASD:1:(0xd0000000+0x3c0)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_0,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3c8)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_1,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3d0)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_2,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3d8)++0x03 line.long 0x00 "D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_3,D_RCMP_RCVEN_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " RCVEN_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3e0)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_0,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3e8)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_1,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3f0)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_2,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x3f8)++0x03 line.long 0x00 "D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_3,D_RCMP_RCVEN_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " RCVEN_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 8.--11. 0x01 " RCVEN_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " RCVEN_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" hexmask.long 0x00 0.--3. 0x01 " RCVEN_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the RCVEN signal group" group ASD:1:(0xd0000000+0x400)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_0,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_3 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_2 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_1 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_0 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x408)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_1,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_7 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_6 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_5 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_4 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x410)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_2,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_11 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_10 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_9 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_8 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x418)++0x03 line.long 0x00 "D_RCMP_GMII_PMOS_PU_SLEW_TABLE_3,D_RCMP_GMII_PMOS_PU_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " GMII_PMOS_15 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_PMOS_14 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_PMOS_13 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_PMOS_12 ,Contain the slew-rate lookup for pull-up (PMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x420)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_0,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_0" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_3 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_2 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_1 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_0 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x428)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_1,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_1" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_7 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_6 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_5 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_4 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x430)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_2,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_2" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_11 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_10 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_9 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_8 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x438)++0x03 line.long 0x00 "D_RCMP_GMII_NMOS_PD_SLEW_TABLE_3,D_RCMP_GMII_NMOS_PD_SLEW_TABLE_3" hexmask.long 0x00 12.--15. 0x01 " GMII_NMOS_15 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 8.--11. 0x01 " GMII_NMOS_14 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " GMII_NMOS_13 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" hexmask.long 0x00 0.--3. 0x01 " GMII_NMOS_12 ,Contain the slew-rate lookup for pull-down (NMOS) devices in the I/O buffers for the GMII signal group" group ASD:1:(0xd0000000+0x440)++0x03 line.long 0x00 "PMOS_RCMP_OVERRIDE_REGISTER_2,PMOS_RCMP_OVERRIDE_REGISTER_2" hexmask.long 0x00 12.--23. 0x01 " DQ_PRCOMP_OV ,DQ Data PMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CK_PRCOMP_OV ,CK PMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x448)++0x03 line.long 0x00 "NMOS_RCMP_OVERRIDE_REGISTER_2,NMOS_RCMP_OVERRIDE_REGISTER_2" hexmask.long 0x00 12.--23. 0x01 " DQ_NRCOMP_OV ,DQ Data NMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CK_NRCOMP_OV ,CK NMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x450)++0x03 line.long 0x00 "PMOS_RCMP_OVERRIDE_REGISTER_3,PMOS_RCMP_OVERRIDE_REGISTER_3" hexmask.long 0x00 12.--23. 0x01 " RCVEN_PRCOMP_OV ,RCVEN PMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CS_PRCOMP_OV ,CS PMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x458)++0x03 line.long 0x00 "NMOS_RCMP_OVERRIDE_REGISTER_3,NMOS_RCMP_OVERRIDE_REGISTER_3" hexmask.long 0x00 12.--23. 0x01 " RCVEN_NRCOMP_OV ,RCVEN NMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " CS_NRCOMP_OV ,CS NMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x460)++0x03 line.long 0x00 "PMOS_RCMP_OVERRIDE_REGISTER_4,PMOS_RCMP_OVERRIDE_REGISTER_4" hexmask.long 0x00 0.--5. 0x01 " GMII_PRCOMP_OV ,GMII PMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x468)++0x03 line.long 0x00 "NMOS_RCMP_OVERRIDE_REGISTER_4,NMOS_RCMP_OVERRIDE_REGISTER_4" hexmask.long 0x00 0.--5. 0x01 " GMII_NRCOMP_OV ,GMII NMOS RCOMP Override Value" group ASD:1:(0xd0000000+0x470)++0x03 line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE_2,PMOS_NMOS_SCOMP_OVERRIDE_2" hexmask.long 0x00 20.--23. 0x01 " GMII_PSCOMP_OV ,GMII PMOS Slew Override Value." hexmask.long 0x00 16.--19. 0x01 " GMII_NSCOMP_OV ,GMII NMOS Slew Override Value." textline " " hexmask.long 0x00 12.--15. 0x01 " RCVEN_PSCOMP_OV ,RCVEN PMOS Slew Override Value." hexmask.long 0x00 8.--11. 0x01 " RCVEN_NSCOMP_OV ,RCVEN NMOS Slew Override Value." textline " " hexmask.long 0x00 4.--7. 0x01 " CS_PSCOMP_OV ,CS PMOS Slew Override Value." hexmask.long 0x00 0.--3. 0x01 " CS_NSCOMP_OV ,CS NMOS Slew Override Value." group ASD:1:(0xd0000000+0x478)++0x03 line.long 0x00 "CS_PMOS_PULLUP_OFFSET,CS_PMOS_PULLUP_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CSRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the CS signal group" group ASD:1:(0xd0000000+0x480)++0x03 line.long 0x00 "CS_NMOS_PULLDOWN_OFFSET,CS_NMOS_PULLDOWN_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_CSRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the CS signal group" group ASD:1:(0xd0000000+0x488)++0x03 line.long 0x00 "RCVEN_PMOS_PULLUP_OFFSET,RCVEN_PMOS_PULLUP_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_RCVENRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the RCVEN signal group" group ASD:1:(0xd0000000+0x490)++0x03 line.long 0x00 "RCVEN_NMOS_PULLDOWN_OFFSET,RCVEN_NMOS_PULLDOWN_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_RCVENRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the RCVEN signal group" group ASD:1:(0xd0000000+0x498)++0x03 line.long 0x00 "GMII_PMOS_PULLUP_OFFSET,GMII_PMOS_PULLUP_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_GMIIRCOMP ,Signed 6-bit offset to be applied to the PMOS drive strength for the GMII signal group" group ASD:1:(0xd0000000+0x4a0)++0x03 line.long 0x00 "GMII_NMOS_PULLDOWN_OFFSET,GMII_NMOS_PULLDOWN_OFFSET" hexmask.long 0x00 0.--5. 0x01 " CR0_GMIIRCOMP ,Signed 6-bit offset to be applied to the NMOS drive strength for the GMII signal group" group ASD:1:(0xd0000000+0x4a8)++0x03 line.long 0x00 "STRENGTH_SLEW_INDEX_SEL_2,STRENGTH_SLEW_INDEX_SEL_2" bitfld.long 0x00 4. " GMII_SLEWCLAMPEN ,Control Slew Rate Index RCOMP Clamp Enable" "dis,ena" hexmask.long 0x00 0.--3. 0x01 " GMII_STRENGTH ,CTL Strength Control which is used as the multiplier factor for raw RCOMP setting" group ASD:1:(0xd0000000+0x600)++0x03 line.long 0x00 "ACIO Setup and Control Register,ACIO Setup and Control Register" bitfld.long 0x00 10.--11. " OPHASSEL ,Course adjustment on RCVEN delay" "0.25 DRAM clk,0.50 DRAM clk,0.75 DRAM clk,1.00 DRAM clk" group ASD:1:(0xd0000000+0x650)++0x03 line.long 0x00 "DDR_ACIO_RX_DLL Settings,DDR_ACIO_RX_DLL Settings" hexmask.long 0x00 8.--12. 0x01 " RECEIVE DLL SETTING 2 ,Select the RX DLL tap for Slave 2 DLL" hexmask.long 0x00 0.--04. 0x01 " RECEIVE DLL SETTING 1 ,Select the RX DLL tap for Slave 1 DLL" group ASD:1:(0xd0000000+0x688)++0x03 line.long 0x00 "DDR_RX_Deskew,DDR_RX_Deskew" hexmask.long 0x00 0.--04. 0x01 " DLL_FREQ_SEL ,Sets the DLL to match the freq of DRR unit is programmed to run" group ASD:1:(0xd0000000+0x690)++0x03 line.long 0x00 "DDR_RDDLYSEL_RECVEN,DDR_RDDLYSEL_RECVEN" hexmask.long 0x00 0.--04. 0x01 " DLL_Tap_SEL_Recven ,Select the DLL Tap used for delaying the Rcvenin strobe. A related CKR is the DRR_Rx_DLL CKR" tree.end width 8. ;end include file xscale/ixp23xx-ddrrcmp.ph tree.end ;begin include file xscale/ixp23xx-cpppmu.ph ;parameters: ASD:1: 0xc0050000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; State: ok ; ; IXP23xx-PMU %1 %2 ; ; %1 memory space ; %2 base address ; -------------------------------------------------------------------------------- tree "CPP PMU" ; -------------------------------------------------------------------------------- width 12. group ASD:1:(0xc0050000+0xf00)++0x03 line.long 0x000 "PMUCONTCFG,PMU Control Bus Configuration Register" bitfld.long 0x00 18. "AUTOCFG ,AUTOCFG Command" "no,yes" bitfld.long 0x00 16.--17. " PMU_TAR_DESG_BL ,PMU Target Design Block Command" "res,reset,init,config" hexmask.long 0x00 13.--15. 0x01 " SEL_EV_BUS ,Select Event Bus" textline " " hexmask.long 0x00 7.--12. 0x01 " SEL_DESG_BL ,Select Design Block" hexmask.long 0x00 0.--6. 0x01 " SEL_DESG_EV ,Select design Event" group ASD:1:(0xc0050000+0xE00)++0x03 line.long 0x00 "PMUSTAT,PMU Counter Interrupt Status Register" bitfld.long 0x00 31. "TCD ,PMU Target Design Configuration Command was executed" "no,yes" textline " " bitfld.long 0x00 22. " CHAP_CNTR_5_STATUS ,Threshold Compare was observed" "no,Threshold" bitfld.long 0x00 21. " ,Command got Triggered" "no,Triggered" bitfld.long 0x00 20. " ,Over Flow on Counter" "no,Overflow" textline " " bitfld.long 0x00 18. " CHAP_CNTR_4_STATUS ,Threshold Compare was observed" "no,Threshold" bitfld.long 0x00 17. " ,Command got Triggered" "no,Triggered" bitfld.long 0x00 16. " ,Over Flow on Counter" "no,Overflow" textline " " bitfld.long 0x00 14. " CHAP_CNTR_3_STATUS ,Threshold Compare was observed" "no,Threshold" bitfld.long 0x00 13. " ,Command got Triggered" "no,Triggered" bitfld.long 0x00 12. " ,Over Flow on Counter" "no,Overflow" textline " " bitfld.long 0x00 10. " CHAP_CNTR_2_STATUS ,Threshold Compare was observed" "no,Threshold" bitfld.long 0x00 9. " ,Command got Triggered" "no,Triggered" bitfld.long 0x00 8. " ,Over Flow on Counter" "no,Overflow" textline " " bitfld.long 0x00 6. " CHAP_CNTR_1_STATUS ,Threshold Compare was observed" "no,Threshold" bitfld.long 0x00 5. " ,Command got Triggered" "no,Triggered" bitfld.long 0x00 4. " ,Over Flow on Counter" "no,Overflow" textline " " bitfld.long 0x00 2. " CHAP_CNTR_0_STATUS ,Threshold Compare was observed" "no,Threshold" bitfld.long 0x00 1. " ,Command got Triggered" "no,Triggered" bitfld.long 0x00 0. " ,Over Flow on Counter" "no,Overflow" group ASD:1:(0xc0050000+0xD00)++0x03 line.long 0x00 "PMUMASK,PMU Counter Interrupt Mask Register" bitfld.long 0x00 31. "TCM ,PMU Target Configuration MASK" "ena,dis" textline " " bitfld.long 0x00 22. " CHAP_CNTR_5_MASK ,Threshold Compare Mask" "Threshold,dis" bitfld.long 0x00 21. " ,Command got Triggered Mask" "Trigger,dis" bitfld.long 0x00 20. " ,Over Flow on Counter Mask" "Overflow,dis" textline " " bitfld.long 0x00 18. " CHAP_CNTR_4_MASK ,Threshold Compare Mask" "Threshold,dis" bitfld.long 0x00 17. " ,Command got Triggered Mask" "Trigger,dis" bitfld.long 0x00 16. " ,Over Flow on Counter Mask" "Overflow,dis" textline " " bitfld.long 0x00 14. " CHAP_CNTR_3_MASK ,Threshold Compare Mask" "Threshold,dis" bitfld.long 0x00 13. " ,Command got Triggered Mask" "Trigger,dis" bitfld.long 0x00 12. " ,Over Flow on Counter Mask" "Overflow,dis" textline " " bitfld.long 0x00 10. " CHAP_CNTR_2_MASK ,Threshold Compare Mask" "Threshold,dis" bitfld.long 0x00 9. " ,Command got Triggered Mask" "Trigger,dis" bitfld.long 0x00 8. " ,Over Flow on Counter Mask" "Overflow,dis" textline " " bitfld.long 0x00 6. " CHAP_CNTR_1_MASK ,Threshold Compare Mask" "Threshold,dis" bitfld.long 0x00 5. " ,Command got Triggered Mask" "Trigger,dis" bitfld.long 0x00 4. " ,Over Flow on Counter Mask" "Overflow,dis" textline " " bitfld.long 0x00 2. " CHAP_CNTR_0_MASK ,Threshold Compare Mask" "Threshold,dis" bitfld.long 0x00 1. " ,Command got Triggered Mask" "Trigger,dis" bitfld.long 0x00 0. " ,Over Flow on Counter Mask" "Overflow,dis" group ASD:1:(0xc0050000+0xC00)++0x03 line.long 0x00 "PMUINTEN,PMU Counter Interrupt Enable Register" bitfld.long 0x00 31. "TCE ,PMU Target design command Execute Interrupt Enable" "dis,ena" textline " " bitfld.long 0x00 22. " CHAP_CNTR_5_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold" bitfld.long 0x00 21. " ,Command got Triggered Interrupt Enable" "dis,Trigger" bitfld.long 0x00 20. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow" textline " " bitfld.long 0x00 18. " CHAP_CNTR_4_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold" bitfld.long 0x00 17. " ,Command got Triggered Interrupt Enable" "dis,Trigger" bitfld.long 0x00 16. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow" textline " " bitfld.long 0x00 14. " CHAP_CNTR_3_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold" bitfld.long 0x00 13. " ,Command got Triggered Interrupt Enable" "dis,Trigger" bitfld.long 0x00 12. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow" textline " " bitfld.long 0x00 10. " CHAP_CNTR_2_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold" bitfld.long 0x00 9. " ,Command got Triggered Interrupt Enable" "dis,Trigger" bitfld.long 0x00 8. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow" textline " " bitfld.long 0x00 6. " CHAP_CNTR_1_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold" bitfld.long 0x00 5. " ,Command got Triggered Interrupt Enable" "dis,Trigger" bitfld.long 0x00 4. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow" textline " " bitfld.long 0x00 2. " CHAP_CNTR_0_INT_ENABLE ,Threshold Compare Interrupt Enable" "dis,Threshold" bitfld.long 0x00 1. " ,Command got Triggered Interrupt Enable" "dis,Trigger" bitfld.long 0x00 0. " ,Over Flow on Counter Interrupt Enable" "dis,Overflow" group ASD:1:(0xc0050000+0x000)++0x0f "Counter 0" line.long 0x00 "CHAPCMD,Chap Counter Command Register" bitfld.long 0x00 31. "DBG ,PMU DEBUG Mode" "norm,debug" bitfld.long 0x00 26. " OUIE ,Overflow/Underflow Indicator Enable" "no,yes" bitfld.long 0x00 25. " CTIE ,Command Trigger Indicator Enable" "no,yes" bitfld.long 0x00 24. " THIE ,Threshold Indicator Enable" "no,yes" bitfld.long 0x00 21.--23. " CC ,Condition Code" "false,greater,equal,greater/equal,less not equal,less/equal,true,?..." bitfld.long 0x00 20. " SAC ,Select ALL Counters" "only,all" textline " " bitfld.long 0x00 16.--19. " OPCODE ,Opcode" "stop,start,sample,res,reset,restart,sample&restart,res,res,res,res,res,res,res,res,preload" bitfld.long 0x00 12.--14. " CTEMS ,Command Trigger Event Mux Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--11. " CTDBS ,Command Trigger Design Block Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " ACT ,Always Command Trigger" "upon,by com trig" line.long 0x04 "CHAPEVN,CHAP Counter Event Register" bitfld.long 0x04 31. "DOCE ,Decrement Occurrence Count Enable" "duration,occurrence" bitfld.long 0x04 28.--30. " DEC1_MUX_SEL ,Contain the Event Selection" "0,1,2,3,4,5,dis,dis" bitfld.long 0x04 23.--25. " DEC0_MUX_SEL ,Contain the Event Selection" "0,1,2,3,4,5,dis,dis" bitfld.long 0x04 16.--19. " DDBS ,Decrement Design Block Selection" "0,1,2,3,4,5,dis,dis,?..." textline " " bitfld.long 0x04 15. " IOCE ,Increment Occurrence Count Enable" "duration,occurrence" bitfld.long 0x04 12.--14. " INC1_MUX_SEL ,Inc 1 Mux Select" "0,1,2,3,4,5,dis,dis" bitfld.long 0x04 7.--9. " INC0_MUX_SEL ,Inc 0 Mux Select" "0,1,2,3,4,5,dis,dis" bitfld.long 0x04 0.--3. " IDBS ,Increment Design Block Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CHAPSTAT,CHAP Counter Status Register" bitfld.long 0x08 31. "DEI ,Decrement Event Indicator" "no,yes" bitfld.long 0x08 30. " IEI ,Increment Event Indicator" "no,yes" bitfld.long 0x08 29. " CAI ,Counter Active Indicator" "no,yes" bitfld.long 0x08 27. " UEI ,Unsupported Event Indicator" "no,yes" bitfld.long 0x08 26. " OUI ,Overflow/Underflow Indicator " "no,yes" bitfld.long 0x08 25. " CTI ,Command Trigger Indicator " "no,yes" bitfld.long 0x08 24. " THI ,Threshold Indicator" "no,yes" textline " " bitfld.long 0x08 20. " DME increment0 ,Debug Mode Event increment0" "no,yes" bitfld.long 0x08 19. " DME increment1 ,Debug Mode Event increment1" "no,yes" textline " " bitfld.long 0x08 18. " DME decrement0 ,Debug Mode Event decrement0" "no,yes" bitfld.long 0x08 17. " DME decrement1 ,Debug Mode Event decrement1" "no,yes" bitfld.long 0x08 16. " DME trigger ,Debug Mode Event trigger" "no,yes" line.long 0x0c "CHAPDATA,CHAP Counter data Register" group ASD:1:(0xc0050000+0x010)++0x0f "Counter 1" copy group ASD:1:(0xc0050000+0x020)++0x0f "Counter 2" copy group ASD:1:(0xc0050000+0x030)++0x0f "Counter 3 " copy group ASD:1:(0xc0050000+0x040)++0x0f "Counter 4 " copy group ASD:1:(0xc0050000+0x050)++0x0f "Counter 5 " copy tree.end ;end include file xscale/ixp23xx-cpppmu.ph ;begin include file xscale/ixp23xx-global.ph ;parameters: ASD:1: 0xc0004a00 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; State: ok ; ; IXP23xx-GLOBAL %1 ; ; %1 address space ; %2 base address ; -------------------------------------------------------------------------------- tree "Global Control" ; -------------------------------------------------------------------------------- width 16. group ASD:1:(0xc0004a00+0x00)++0x03 line.long 0x00 "PRODUCT_ID,Product Identification" hexmask.long 0x00 16.--20. 1. "MAJ_PROD_TYPE ,MAJ_PROD_TYPE" hexmask.long 0x00 8.--15. 1. " MIN_PROD_TYPE ,MIN_PROD_TYPE" textline " " bitfld.long 0x00 4.--7. " MAJ_REV ,Current Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " MIN_REV ,Current Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0xc0004a00+0x04)++0x03 line.long 0x00 "MISC_CONTROL,MISC_CONTROL" hexmask.long 0x00 16.--20. 0x01 " XSCALE_CMD_PRIO ,Priority for Xscale" bitfld.long 0x00 7. " TIMESTAMP_EN ,Timestamp Enable in the Microengines" "dis,ena" group ASD:1:(0xc0004a00+0x08)++0x03 line.long 0x00 "MCCR,MSF Clock control CSR" bitfld.long 0x00 25.--25. "MSF_TX_CLK_MODE ,Number of clocks on the transmit interface" "TXCLK01,TXCLK01/TXCLK23" bitfld.long 0x00 24.--24. " MSF_RX_CLK_MODE ,Number of clocks on the receive interface" "RXCLK01,RXCLK01/RXCLK23" group ASD:1:(0xc0004a00+0x0c)++0x07 line.long 0x00 "RESET_0,Software reset control register 0" bitfld.long 0x00 25. "XS_RST_GET_READY ,XScale core independent Reset control bit, reset if XSCALE_BUSY deasserted" "no,yes" bitfld.long 0x00 24. " WATCHDOG ,Watch Dog Timer Soft Reset Enable" "no,yes" textline " " bitfld.long 0x00 21. " SHPC_INIT_COMP_RPH ,Indicates that Initialization is complete, that is fed into the PCI controller" "no,yes" bitfld.long 0x00 20. " SHTA_RESET_RPH ,Command bus arbiter Reset" "-,reset" bitfld.long 0x00 19. " SHSP_RESET_RPH ,CPP SBUS Arbiter reset" "-,reset" bitfld.long 0x00 18. " SHDP_RESET_RPH ,CPP DBUS Arbiter reset" "-,reset" textline " " bitfld.long 0x00 17. " SHXP_RESET_RPH ,Scratch Unit Reset" "-,reset" bitfld.long 0x00 16. " RSTALL ,General software reset bit" "-,reset" bitfld.long 0x00 15. " SHPA_EXT_RST_RPH ,Used to drive an external reset_out in Intel IXP 23XX product line on the SYS_RESET_OUT_L pin" "-,reset" textline " " bitfld.long 0x00 11. " SHD0_RESET_RPH ,CPP DDR-SDRAM Controller reset. This bit does not auto-deassert. It must be deasserted by software" "-,reset" bitfld.long 0x00 7. " SHMS_RESET_RPH ,MSF (Media Switch Fabric) reset. This bit does not auto-deassert. It must be deasserted by software" "-,reset" bitfld.long 0x00 4. " SHS1_RESET_RPH ,This is the MSG-SRAM Controller reset" "-,reset" bitfld.long 0x00 3. " SHS0_RESET_RPH ,This is the QDR-SRAM Controller reset" "-,reset" textline " " bitfld.long 0x00 2. " SHPC_PCI_RESET_RPH ,This drives the PCI reset out pin (PCI_RST_L) as distinct from acting as a reset to the PCI controller which is the function of bit[1]" "no,yes" bitfld.long 0x00 1. " SHPC_RESET_RPH ,This is the PCI-Unit Reset" "-,reset" bitfld.long 0x00 0. " SHXS_RESET_RPL ,This is the Intel XScale core Reset" "reset,-" line.long 0x04 "RESET_1,Software reset control register 1" bitfld.long 0x04 19. "SHT13_RESET_RPL ,XSI system controller module and XSI-to-AHB gasket reset" "reset,-" bitfld.long 0x04 18. " SHT12_RESET_RPL ,GIG-Ethernet-1 module reset" "reset,-" bitfld.long 0x04 17. " SHT11_RESET_RPL ,GIG-Ethernet-0 module reset" "reset,-" textline " " bitfld.long 0x04 16. " SHT10_RESET_RPL ,XSI-CPP bridge module reset" "reset,-" bitfld.long 0x04 8. " COLD_RESET_RPL ,Cold reset signal for the exp_unit and ost_unit" "reset,-" textline " " bitfld.long 0x04 7. " SHT7_RESET_RPL ,XSI DDR-SDRAM controller reset" "reset,-" bitfld.long 0x04 6. " SHT6_RESET_RPL ,AHB-APB subsystem reset" "reset,-" bitfld.long 0x04 5. " SHT5_RESET_RPL ,NPE-1 reset" "reset,-" bitfld.long 0x04 4. " SHT4_RESET_RPL ,NPE-0 reset" "reset,-" textline " " bitfld.long 0x04 3. " SHT3_RESET_RPL ,ME-3 reset" "-,reset" bitfld.long 0x04 2. " SHT2_RESET_RPL ,ME-2 reset" "-,reset" bitfld.long 0x04 1. " SHT1_RESET_RPL ,ME-1 reset" "-,reset" bitfld.long 0x04 0. " SHT0_RESET_RPL ,ME-0 reset" "-,reset" group ASD:1:(0xc0004a00+0x18)++0x03 line.long 0x00 "STRAP_OPTIONS,Board strapping options" bitfld.long 0x00 14. "RESET_OUT_STRAP ,Determines when the external reset pin NRESET_OUT is deasserted" "PLL Lock,Ext. Reset" hexmask.long 0x00 8.--13. 0x01 " CFG_PLL_MULT ,Selects PLL multiplier" textline " " bitfld.long 0x00 6.--7. " CFG_PCI_SWIN ,SRAM BAR Window Size" "32 MByte,64 MByte,128 MByte,256 MByte" bitfld.long 0x00 4.--5. " CFG_PCI_DWIN ,DRAM BAR Window Size" "128 MByte,256 MByte,512 MByte,1024 MByte" textline " " bitfld.long 0x00 3. " CFG_PCI_ARB ,PCI Arbiter Used" "external,internal" bitfld.long 0x00 2. " CFG_PCI_BOOT_HOST ,Indicates who will configure PCI devices" "external,IXP2x00" textline " " bitfld.long 0x00 1. " CFG_PROM_BOOT ,Boot ROM present" "no,yes" bitfld.long 0x00 0. " CFG_RST_DIR ,Direction of PCI_RST# Signal" "output,input" width 8. tree.end ;end include file xscale/ixp23xx-global.ph ;begin include file xscale/ixp23xx-hash.ph ;parameters: ASD:1: 0xc0004900 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; State: ok ; ; IXP23xx-HASH %1 %2 ; ; %1 memory space ; %2 base address ; ; -------------------------------------------------------------------------------- tree "Hash Configuration" ; -------------------------------------------------------------------------------- width 20. group ASD:1:(0xc0004900+0x00)++0x07 line.long 0x00 "HASH_MULT_48_0,Least significant 32 bits of 48-bit Hash Multiplier" line.long 0x04 "HASH_MULT_48_1,Most significant 16 bits of 48-bit Hash Multiplier" group ASD:1:(0xc0004900+0x08)++0x07 line.long 0x00 "HASH_MULT_64_0,Least significant 32 bits of 64-bit Hash Multiplier" line.long 0x04 "HASH_MULT_64_1,Most significant 32 bits of 64-bit Hash Multiplier" group ASD:1:(0xc0004900+0x10)++0x0f line.long 0x00 "HASH_MULT_128_0,Least significant 32 bits of 128-bit Hash Multiplier" line.long 0x04 "HASH_MULT_128_1,Bits 32 to 63 of the 128-bit Hash Multiplier" line.long 0x08 "HASH_MULT_128_2,Bits 64 to 95 of the 128-bit Hash Multiplier" line.long 0x0c "HASH_MULT_128_3,Most significant 32 bits of 128-bit Hash Multiplier" width 8. tree.end ;end include file xscale/ixp23xx-hash.ph ;begin include file xscale/ixp23xx-scratchpad.ph ;parameters: ASD:1: 0xc0004800 ; -------------------------------------------------------------------------------- ; IXP2350, IXP2325 ; State: ok ; ; IXP23xx-SCRATCHPAD %1 %2 ; ; %1 memory space ; %2 base Address ; ; -------------------------------------------------------------------------------- tree "Scratchpad Configuration" ; -------------------------------------------------------------------------------- width 12. group ASD:1:(0xc0004800+0x00)++0x0b "Ring 0" line.long 0x00 "RING_BASE,Base address of the Ring" bitfld.long 0x00 30.--31. "SIZE ,Size of ring in 32-bit words" "128,256,512,1024" bitfld.long 0x00 26. " RING_STATUS_FLAG ,Ring Status Flag" "Full,Empty" hexmask.long 0x00 9.--13. 0x200 " BASE ,Ring base Address" line.long 0x04 "RING_HEAD,Offset of Head entry from Base" hexmask.long 0x04 2.--11. 0x4 "OFFSET ,Next address to be read on a get" line.long 0x08 "RING_TAIL,Offset of Tail entry from Base" hexmask.long 0x08 2.--11. 0x4 "OFFSET ,Next address to be write on a put" group ASD:1:(0xc0004800+0x10)++0x0b "Ring 1" copy group ASD:1:(0xc0004800+0x20)++0x0b "Ring 2" copy group ASD:1:(0xc0004800+0x30)++0x0b "Ring 3" copy group ASD:1:(0xc0004800+0x40)++0x0b "Ring 4" copy group ASD:1:(0xc0004800+0x50)++0x0b "Ring 5" copy group ASD:1:(0xc0004800+0x60)++0x0b "Ring 6" copy group ASD:1:(0xc0004800+0x70)++0x0b "Ring 7" copy group ASD:1:(0xc0004800+0x80)++0x0b "Ring 8" copy group ASD:1:(0xc0004800+0x90)++0x0b "Ring 9" copy group ASD:1:(0xc0004800+0xa0)++0x0b "Ring 10" copy group ASD:1:(0xc0004800+0xb0)++0x0b "Ring 11" copy group ASD:1:(0xc0004800+0xc0)++0x0b "Ring 12" copy group ASD:1:(0xc0004800+0xd0)++0x0b "Ring 13" copy group ASD:1:(0xc0004800+0xe0)++0x0b "Ring 14" copy group ASD:1:(0xc0004800+0xf0)++0x0b "Ring 15" copy width 8. tree.end ;end include file xscale/ixp23xx-scratchpad.ph ;begin include file xscale/ixp2325-fastwrite.ph ;parameters: ASD:1: 0xc0004000 ; -------------------------------------------------------------------------------- ; IXP2325 ; State: OK ; see also: IXP2400, IXP2800, IXP2350 ; ; IXP2325-FASTWRITE %1 %2 ; ; %1 memory space ; %2 base address ; ; -------------------------------------------------------------------------------- tree "Fast Write" ; -------------------------------------------------------------------------------- width 20. group ASD:1:(0xc0004000+0x000)++0x03 line.long 0x00 "THD_MSG,Thread Message" hexmask.long 0x00 0.--7. 0x01 "THD_MESSAGE ,Thread status" group ASD:1:(0xc0004000+0x004)++0x03 line.long 0x00 "THD_MSG_SUMMARY_0_0,Indication of new messages for ME cluster 0 register 0" hexmask.long 0x00 8.--15. 0x01 " THD_MSG_VALID ME_0_1 ,Thread message valid status for ME_0_1" hexmask.long 0x00 0.--7. 0x01 " THD_MSG_VALID ME_0_0 ,Thread message valid status for ME_0_0" group ASD:1:(0xc0004000+0x014)++0x07 line.long 0x00 "SELF_DESTRUCT_0,Self destruct register 0" bitfld.long 0x00 0.--4. "SELF_DEST_DATA ,Set bit corresponding to value, cleared by read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group ASD:1:(0xc0004000+0x01c)++0x03 line.long 0x00 "INTERTHREAD_SIG,INTERTHREAD_SIG" bitfld.long 0x00 11. "ME CLUS ,ME Cluster" "0,1" bitfld.long 0x00 7.--9. " ME_NO ,Microengine Number" "0,1,2,3,res,res,res,res" bitfld.long 0x00 4.--6. " THD_NO ,THREAD Number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " SIG ,Number of signals" "no,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0xc0004000+0xb20)++0x07 line.long 0x00 "XSCALE_INT_A,Write any data to generate a XScale interrupt" line.long 0x04 "XSCALE_INT_B,Write any data to generate a XScale interrupt" group ASD:1:(0xc0004000+0x500)++0x7f "THD_MSG Cluster 0" textline "Thread 0 1 2 3 4 5 6 7 " textline "ME 0 " hexfld.long 0x00 " ,ME Cluster 0 ME 0 Thread 0 Status" hexfld.long 0x04 " ,ME Cluster 0 ME 0 Thread 1 Status" hexfld.long 0x08 " ,ME Cluster 0 ME 0 Thread 2 Status" hexfld.long 0x0c " ,ME Cluster 0 ME 0 Thread 3 Status" hexfld.long 0x10 " ,ME Cluster 0 ME 0 Thread 4 Status " hexfld.long 0x14 " ,ME Cluster 0 ME 0 Thread 5 Status " hexfld.long 0x18 " ,ME Cluster 0 ME 0 Thread 6 Status " hexfld.long 0x1c " ,ME Cluster 0 ME 0 Thread 7 Status " textline "ME 1 " hexfld.long 0x20 " ,ME Cluster 0 ME 1 Thread 0 Status " hexfld.long 0x24 " ,ME Cluster 0 ME 1 Thread 1 Status " hexfld.long 0x28 " ,ME Cluster 0 ME 1 Thread 2 Status " hexfld.long 0x2c " ,ME Cluster 0 ME 1 Thread 3 Status " hexfld.long 0x30 " ,ME Cluster 0 ME 1 Thread 4 Status " hexfld.long 0x34 " ,ME Cluster 0 ME 1 Thread 5 Status " hexfld.long 0x38 " ,ME Cluster 0 ME 1 Thread 6 Status " hexfld.long 0x3c " ,ME Cluster 0 ME 1 Thread 7 Status " width 8. tree.end ;end include file xscale/ixp2325-fastwrite.ph ;begin include file xscale/ixp23xx-sram.ph ;parameters: ASD:1: 0xcc000000 ; -------------------------------------------------------------------------------- ; IXP2350,resIXP2325 ; ; IXP23xx-SRAM %1 %2 ; ; %1 memory space ; %2 base Address ; ; -------------------------------------------------------------------------------- tree "QDR-SRAM" ; -------------------------------------------------------------------------------- width 28. group ASD:1:(0xcc000000+0x00)++0x03 line.long 0x00 "SRAM_CONTROL,SRAM Controller configuration" bitfld.long 0x00 17. "QDR_SWIZZLE ,Swizzel the QDR read data bits" "no change,swap" bitfld.long 0x00 14. " QC_IGN_EOP ,Queue Controller Ignore EOP" "always,EOP set" textline " " bitfld.long 0x00 13. " QC_IGN_SEG_CNT ,Queue Controller Ignore Segment Count" "always,if zero" bitfld.long 0x00 10.--12. " PIPELINE ,Indicates number of external pipeline delays" "0 cyc,1 cyc,2 cyc,3 cyc,4 cyc,5 cyc,6 cyc,7 cyc" textline " " bitfld.long 0x00 7.--9. " SRAM_SIZE ,Indicates the Size of each SRAM chip" "512KB x 18,1MB x 18,2MB x 18,4MB x 18,8MB x 18,16MB x 18,32MB x 18,ext port ena" textline " " bitfld.long 0x00 5. " PORT_CTL address[23:22] ,Usage of Port Controller address [23:22]" "address,R/WPE_L[2]" textline " " bitfld.long 0x00 4. " PORT_CTL address[21:20] ,Usage of Port Controller address [21:20]" "address,R/WPE_L[3]" bitfld.long 0x00 3. " PAR_EN ,Parity" "no,yes" group ASD:1:(0xcc000000+0x04)++0x03 line.long 0x00 "SRAM_PARITY_STATUS_1,Parity Control and recording of last faulty Address" bitfld.long 0x00 31. "WW_PAR byte3 ,Write Wrong Parity for byte 3" "correct,incorrect" bitfld.long 0x00 30. " byte2 ,Write Wrong Parity for byte 2" "correct,incorrect" textline " " bitfld.long 0x00 29. " WW_PAR byte1 ,Write Wrong Parity for byte 1" "correct,incorrect" bitfld.long 0x00 28. " byte0 ,Write Wrong Parity for byte 0" "correct,incorrect" textline " " hexmask.long 0x00 0.--23. 0x01 " ADDRRESS ,Records the address which has a perity error" ; -------------------------------------------------------------------------------- ; *** Error by Microengine *** ; -------------------------------------------------------------------------------- if (d.l(ASD:1:(0xcc000000+0x08))&0x00010000)==0x00010000 group ASD:1:(0xcc000000+0x08)++0x03 line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error" bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes" bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "ME0,ME1,ME2,ME3,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,res,MSG_XSI" bitfld.long 0x00 17.--19. " THD ,Indicates which Thread was the originator" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " SRC ,Source" "Bridge/PCI/NPE,ME/MSG_XSI" textline " " bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes" ; -------------------------------------------------------------------------------- ; *** Error by XScale/PCI *** ; -------------------------------------------------------------------------------- else group ASD:1:(0xcc000000+0x08)++0x03 line.long 0x00 "SRAM_PARITY_STATUS_2,Recording of source or request which generated parity error" bitfld.long 0x00 31. "MULT_ERR ,Multiple Errors" "no,yes" bitfld.long 0x00 20.--24. " ME ,Indicates which Microengine was the originator" "res,res,res,res,res,res,res,Bridge,res,PCI,res,res,res,res,res,res,res,res,res,res,NPE0,NPE1,res,res,res,res,res,res,res,res,res,res" bitfld.long 0x00 17.--19. " THD ,Indicates which Source was the originator" "XScale,PCI,res,res,res,res,res,res" bitfld.long 0x00 16. " SRC ,Source" "Bridge/PCI/NPE,ME/MSG_XSI" textline " " bitfld.long 0x00 3. " ERR byte3 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 2. " byte2 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 1. " byte1 ,Indictaes error on a read" "no,yes" bitfld.long 0x00 0. " byte0 ,Indictaes error on a read" "no,yes" endif group ASD:1:(0xcc000000+0x228)++0x03 line.long 0x00 "QDR_RX_DLL,Adjusts receiving clock delay" bitfld.long 0x00 8.--12. "SDFT_RX_DLL_SETTING_2_RSH ,Selects the Rx DLL tap for Slave 2" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f" bitfld.long 0x00 6.--6. " SGXPA_FIXED_DLY_SEL_RSH ,Enable OnDie Termination" "dis,ena" textline " " bitfld.long 0x00 0.--4. " SDFT_RX_DLL_SETTING_1_RSH ,Selects the Rx DLL tap for Slave 1. Sets the numerator of DLL delay." "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f" group ASD:1:(0xcc000000+0x240)++0x03 line.long 0x00 "QDR_Rd_Ptr_Offset,Register for Configuration of QDR I vs. QDR II interface" bitfld.long 0x00 2. "QDRn_Rx_Descramble ,Adjusts the 1/2 clock incrementing of the read pointer" "QDR I,QDR II" bitfld.long 0x00 0.--1. " Rd_Wr_Ptr_Offset_sel ,Selects the offset between the write & read pointers" "0,1,2,3" group ASD:1:(0xcc000000+0x244)++0x03 line.long 0x00 "QDR_RX_DESKEW,Adjusts receiving clock delay" bitfld.long 0x00 5.--5. "BYPASS ,For Intel use only" "no,yes" bitfld.long 0x00 0.--4. " DLL_MASTER ,Selects the number of master taps in the DLL" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,res,res,res,res,res,res,res,res" tree "RCOMP Registers" group ASD:1:(0xcc000000+0x300)++0x03 line.long 0x00 "SETUP_CONTROL,QDR RCOMP Setup and Control Register" bitfld.long 0x00 19. "UPDATE_SEQ_SEL ,Thermometer cycles following one binary" "continuous,7" bitfld.long 0x00 18. " PASX_DYN_ONDIE ,Dynamic Power Management On Die Termination" "no,yes" textline " " bitfld.long 0x00 17. " SLEW_INDEX_SELECT ,Use to select either RComp[6:3] or [5:2] to be the index to slew rate" "RComp[6:3],RComp[5:2]" bitfld.long 0x00 16. " INC_DEC_INVERT ,Invert the inc/dec signal from the pads" "no,yes" textline " " bitfld.long 0x00 15. " ARSOS ,Address RCOMP and SCOMP Override Select" "no,yes" bitfld.long 0x00 14. " DRSOS ,Data RCOMP and SCOMP Override Select" "no,yes" bitfld.long 0x00 13. " KCSOS ,K Clock RCOMP and SCOMP Override Select" "no,yes" bitfld.long 0x00 12. " DQDRSOS ,DQ Data RCOMP and SCOMP Override Select" "no,yes" textline " " bitfld.long 0x00 11. " RCOMP_LOCK ,RCOMP Lock Bit" "unlocked,locked" bitfld.long 0x00 10. " SLEW_RATE_TABLES ,Slew Rate Tables Programmed" "no,yes" textline " " bitfld.long 0x00 8.--9. " SXPA_K_LATENCY ,To control K clock latency in QDR pad" "disabled,1 change/cycle,2 change/cycle,4 change/cycle" bitfld.long 0x00 5.--7. " RCOMPPRD ,RCOMP Period" "4194304 clk,2097153 clk,1048576 clk,524288 clk,262144 clk,131072 clk,65536 clk,16 clk" textline " " bitfld.long 0x00 4. " BLOCK_RCOMP_UPDATES ,Block RCOMP Updates" "normal,DRrcomp_pad_update" textline " " bitfld.long 0x00 3. " RCOMP_SM_DISABLE ,RComp State Machine Disable" "normal,stall at WAIT" textline " " bitfld.long 0x00 2. " FRCOMP ,Force RComp operation " "-,perform" bitfld.long 0x00 1. " ROE_NMOS ,RCOMP Override Enable for NMOS" "dis,ena" bitfld.long 0x00 0. " ROE_PMOS ,RCOMP Override Enable for PMOS" "dis,ena" group ASD:1:(0xcc000000+0x304)++0x03 line.long 0x00 "PMOS_MEASURED,RCOMP value for the PMOS drivers" bitfld.long 0x00 12. "INC_DEC_SIGNAL ,Inc/dec signal in PMOS Eval block" "0,1" hexmask.long 0x00 0.--11. 0x01 " PMOS_RCOMP_MEASURED_VALUE ,PMOS RCOMP Measured Value" group ASD:1:(0xcc000000+0x308)++0x03 line.long 0x00 "NMOS_MEASURED,RCOMP value for the NMOS drivers" bitfld.long 0x00 12. "INC_DEC_SIGNAL ,Inc/dec signal in NMOS Eval block" "0,1" hexmask.long 0x00 0.--11. 0x01 " NMOS_RCOMP_MEASURED_VALUE ,NMOS RCOMP Measured Value" group ASD:1:(0xcc000000+0x30C)++0x03 line.long 0x00 "PMOS_OVERRIDE,RCOMP value for the PMOS drivers" hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address PMOS RCOMP Override Value" hexmask.long 0x00 12.--23. 0x01 " DATA ,Data PMOS RCOMP Override Value" textline " " hexmask.long 0x00 0.--11. 0x01 " DQ_DATA ,DQ Data PMOS RCOMP Override Value" group ASD:1:(0xcc000000+0x3C0)++0x03 line.long 0x00 "PMOS_OVERRIDE_2,RCOMP value for the PMOS drivers" hexmask.long 0x00 12.--23. 0x01 "DQ_PRCOMP_OV ,DQ Data PMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " K_CLOCK_PRCOMP_OV ,K Clock PMOS RCOMP Override Value" group ASD:1:(0xcc000000+0x310)++0x03 line.long 0x00 "NMOS_OVERRIDE,RCOMP value for the NMOS drivers" hexmask.long 0x00 24.--31. 0x01 "ADDRESS ,Address NMOS RCOMP Override Value" hexmask.long 0x00 12.--23. 0x01 " DATA ,Data NMOS RCOMP Override Value" textline " " hexmask.long 0x00 0.--11. 0x01 " DQ_DATA ,DQ Data NMOS RCOMP Override Value" group ASD:1:(0xcc000000+0x3C4)++0x03 line.long 0x00 "NMOS_OVERRIDE_2,RCOMP value for the NMOS drivers" hexmask.long 0x00 12.--23. 0x01 "DQ_NRCOMP_OV ,DQ Data NMOS RCOMP Override Value" hexmask.long 0x00 0.--11. 0x01 " K_CLOCK_PRCOMP_OV ,K Clock NMOS RCOMP Override Value" group ASD:1:(0xcc000000+0x314)++0x03 line.long 0x00 "PMOS_NMOS_SCOMP_OVERRIDE,Override values for PMOS/NMOS SComp drivers" hexmask.long 0x00 28.--31. 0x01 "ADDR_PMOS ,Address PMOS SCOMP Override Value" hexmask.long 0x00 24.--27. 0x01 " ADDR_NMOS ,Address NMOS SCOMP Override Value" textline " " hexmask.long 0x00 20.--23. 0x01 " D_PMOS ,Data PMOS SCOMP Override Value" hexmask.long 0x00 16.--19. 0x01 " D_NMOS ,Data NMOS SCOMP Override Value" textline " " hexmask.long 0x00 12.--15. 0x01 " K_CLOCK_PMOS ,K Clock PMOS SCOMP Override Value" hexmask.long 0x00 8.--11. 0x01 " K_CLOCK_NMOS ,K Clock NMOS SCOMP Override Value" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_DATA_PMOS ,DQ Data PMOS SCOMP Override Value" hexmask.long 0x00 0.--3. 0x01 " DQ_DATA_NMOS ,DQ Data NMOS SCOMP Override Value" group ASD:1:(0xcc000000+0x318)++0x03 line.long 0x00 "STREGTH_SLEW_INDEX_SEL," bitfld.long 0x00 19. "ADDR_SLEW_RATE_IDX ,ADDR SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 15.--18. " ADDR_STRENGTH_CTL ,Address strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 14. " DATA_SLEW_RATE_IDX ,DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 10.--13. " DATA_STRENGTH_CTL ,Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 9. " K_CLOCK_SLEW_RATE_IDX ,K CLOCK SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 5.--8. " K_CLOCK_STRENGTH_CTL ,K Clock strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" textline " " bitfld.long 0x00 4. " DQ_DATA_SLEW_RATE_IDX ,DQ DATA SLEW RATE INDEX RCOMP Clamp Enable" "dis,ena" bitfld.long 0x00 0.--3. " DQ_DATA_STRENGTH_CTL ,DQ Data strength Control" "0.125,0.25,0.375,0.50,0.625,0.75,1.00,1.125,1.25,1.50,2.00,2.125,2.25,2.50,3.00,4.00" group ASD:1:(0xcc000000+0x31C)++0x03 line.long 0x00 "ADDR_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for address signal group" hexmask.long 0x00 0.--5. 0x01 "ADDR_PMOS_OFFSET ,Signed offset applied to PMOS drive strength" group ASD:1:(0xcc000000+0x320)++0x03 line.long 0x00 "ADDR_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for address signal group" hexmask.long 0x00 0.--5. 0x01 "ADDR_NMOS_OFFSET ,Signed offset applied to NMOS drive strength" group ASD:1:(0xcc000000+0x324)++0x03 line.long 0x00 "DATA_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for Data signal group" hexmask.long 0x00 0.--7. 0x01 "DATA_PMOS_OFFSET ,Signed offset applied to PMOS drive strength" group ASD:1:(0xcc000000+0x328)++0x03 line.long 0x00 "DATA_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for Data signal group" hexmask.long 0x00 0.--5. 0x01 "DATA_NMOS_OFFSET ,Signed offset applied to NMOS drive strength" group ASD:1:(0xcc000000+0x32C)++0x03 line.long 0x00 "K_CLK_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for K Clock signal group" hexmask.long 0x00 0.--5. 0x01 "K_CLK_PMOS_OFFSET ,Signed offset applied to PMOS drive strength" group ASD:1:(0xcc000000+0x330)++0x03 line.long 0x00 "K_CLK_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for K Clock signal group" hexmask.long 0x00 0.--5. 0x01 "K_CLK_NMOS_OFFSET ,Signed offset applied to NMOS drive strength" group ASD:1:(0xcc000000+0x334)++0x03 line.long 0x00 "DQ_PMOS_PU_OFFSET,Signed offset applied to final PMOS RCOMP/Strength value for DQ signal group" hexmask.long 0x00 0.--5. 0x01 "DQ_PMOS_OFFSET ,Signed offset applied to PMOS drive strength" group ASD:1:(0xcc000000+0x338)++0x03 line.long 0x00 "DQ_NMOS_PD_OFFSET,Signed offset applied to final NMOS RCOMP/Strength value for DQ signal group" hexmask.long 0x00 0.--5. 0x01 "DQ_NMOS_OFFSET ,Signed offset applied to NMOS drive strength" group ASD:1:(0xcc000000+0x33C)++0x03 line.long 0x00 "PMOS_NMOS_VERT_OVERRIDE," hexmask.long 0x00 12.--23. 0x01 "NMOS_RCOMP_OVERRIDE ,Signed offset" textline " " hexmask.long 0x00 0.--11. 0x01 " PMOS_RCOMP_OVERRIDE ,Signed offset" group ASD:1:(0xcc000000+0x340)++0x0f line.long 0x00 "ADDR_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group" hexmask.long 0x00 12.--15. 0x01 "ADDR_PMOS_3 ,Slew-rate for Address signal group" hexmask.long 0x00 8.--11. 0x01 " ADDR_PMOS_2 ,Slew-rate for Address signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " ADDR_PMOS_1 ,Slew-rate for Address signal group" hexmask.long 0x00 0.--3. 0x01 " ADDR_PMOS_0 ,Slew-rate for Address signal group" line.long 0x4 "ADDR_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group" hexmask.long 0x04 12.--15. 0x01 "ADDR_PMOS_7 ,Slew-rate for Address signal group" hexmask.long 0x04 8.--11. 0x01 " ADDR_PMOS_6 ,Slew-rate for Address signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " ADDR_PMOS_5 ,Slew-rate for Address signal group" hexmask.long 0x04 0.--3. 0x01 " ADDR_PMOS_4 ,Slew-rate for Address signal group" line.long 0x8 "ADDR_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group" hexmask.long 0x08 12.--15. 0x01 "ADDR_PMOS_11 ,Slew-rate for Address signal group" hexmask.long 0x08 8.--11. 0x01 " ADDR_PMOS_10 ,Slew-rate for Address signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " ADDR_PMOS_9 ,Slew-rate for Address signal group" hexmask.long 0x08 0.--3. 0x01 " ADDR_PMOS_8 ,Slew-rate for Address signal group" line.long 0xc "ADDR_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group" hexmask.long 0x0c 12.--15. 0x01 "ADDR_PMOS_15 ,Slew-rate for Address signal group" hexmask.long 0x0c 8.--11. 0x01 " ADDR_PMOS_14 ,Slew-rate for Address signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " ADDR_PMOS_13 ,Slew-rate for Address signal group" hexmask.long 0x0c 0.--3. 0x01 " ADDR_PMOS_12 ,Slew-rate for Address signal group" group ASD:1:(0xcc000000+0x350)++0x0f line.long 0x00 "ADDR_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Address Signal group" hexmask.long 0x00 12.--15. 0x01 "ADDR_NMOS_3 ,Slew-rate for Address signal group" hexmask.long 0x00 8.--11. 0x01 " ADDR_NMOS_2 ,Slew-rate for Address signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " ADDR_NMOS_1 ,Slew-rate for Address signal group" hexmask.long 0x00 0.--3. 0x01 " ADDR_NMOS_0 ,Slew-rate for Address signal group" line.long 0x4 "ADDR_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Address Signal group" hexmask.long 0x04 12.--15. 0x01 "ADDR_NMOS_7 ,Slew-rate for Address signal group" hexmask.long 0x04 8.--11. 0x01 " ADDR_NMOS_6 ,Slew-rate for Address signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " ADDR_NMOS_5 ,Slew-rate for Address signal group" hexmask.long 0x04 0.--3. 0x01 " ADDR_NMOS_4 ,Slew-rate for Address signal group" line.long 0x8 "ADDR_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Address Signal group" hexmask.long 0x08 12.--15. 0x01 "ADDR_NMOS_11 ,Slew-rate for Address signal group" hexmask.long 0x08 8.--11. 0x01 " ADDR_NMOS_10 ,Slew-rate for Address signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " ADDR_NMOS_9 ,Slew-rate for Address signal group" hexmask.long 0x08 0.--3. 0x01 " ADDR_NMOS_8 ,Slew-rate for Address signal group" line.long 0xc "ADDR_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Address Signal group" hexmask.long 0x0c 12.--15. 0x01 "ADDR_NMOS_15 ,Slew-rate for Address signal group" hexmask.long 0x0c 8.--11. 0x01 " ADDR_NMOS_14 ,Slew-rate for Address signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " ADDR_NMOS_13 ,Slew-rate for Address signal group" hexmask.long 0x0c 0.--3. 0x01 " ADDR_NMOS_12 ,Slew-rate for Address signal group" group ASD:1:(0xcc000000+0x360)++0x0f line.long 0x00 "DATA_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group" hexmask.long 0x00 12.--15. 0x01 "DATA_PMOS_3 ,Slew-rate for Data signal group" hexmask.long 0x00 8.--11. 0x01 " DATA_PMOS_2 ,Slew-rate for Data signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DATA_PMOS_1 ,Slew-rate for Data signal group" hexmask.long 0x00 0.--3. 0x01 " DATA_PMOS_0 ,Slew-rate for Data signal group" line.long 0x4 "DATA_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group" hexmask.long 0x04 12.--15. 0x01 "DATA_PMOS_7 ,Slew-rate for Data signal group" hexmask.long 0x04 8.--11. 0x01 " DATA_PMOS_6 ,Slew-rate for Data signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " DATA_PMOS_5 ,Slew-rate for Data signal group" hexmask.long 0x04 0.--3. 0x01 " DATA_PMOS_4 ,Slew-rate for Data signal group" line.long 0x8 "DATA_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group" hexmask.long 0x08 12.--15. 0x01 "DATA_PMOS_11 ,Slew-rate for Data signal group" hexmask.long 0x08 8.--11. 0x01 " DATA_PMOS_10 ,Slew-rate for Data signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " DATA_PMOS_9 ,Slew-rate for Data signal group" hexmask.long 0x08 0.--3. 0x01 " DATA_PMOS_8 ,Slew-rate for Data signal group" line.long 0xc "DATA_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group" hexmask.long 0x0c 12.--15. 0x01 "DATA_PMOS_15 ,Slew-rate for Data signal group" hexmask.long 0x0c 8.--11. 0x01 " DATA_PMOS_14 ,Slew-rate for Data signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " DATA_PMOS_13 ,Slew-rate for Data signal group" hexmask.long 0x0c 0.--3. 0x01 " DATA_PMOS_12 ,Slew-rate for Data signal group" group ASD:1:(0xcc000000+0x370)++0x0f line.long 0x00 "DATA_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for Data Signal group" hexmask.long 0x00 12.--15. 0x01 "DATA_NMOS_3 ,Slew-rate for Data signal group" hexmask.long 0x00 8.--11. 0x01 " DATA_NMOS_2 ,Slew-rate for Data signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DATA_NMOS_1 ,Slew-rate for Data signal group" hexmask.long 0x00 0.--3. 0x01 " DATA_NMOS_0 ,Slew-rate for Data signal group" line.long 0x4 "DATA_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for Data Signal group" hexmask.long 0x04 12.--15. 0x01 "DATA_NMOS_7 ,Slew-rate for Data signal group" hexmask.long 0x04 8.--11. 0x01 " DATA_NMOS_6 ,Slew-rate for Data signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " DATA_NMOS_5 ,Slew-rate for Data signal group" hexmask.long 0x04 0.--3. 0x01 " DATA_NMOS_4 ,Slew-rate for Data signal group" line.long 0x8 "DATA_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for Data Signal group" hexmask.long 0x08 12.--15. 0x01 "DATA_NMOS_11 ,Slew-rate for Data signal group" hexmask.long 0x08 8.--11. 0x01 " DATA_NMOS_10 ,Slew-rate for Data signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " DATA_NMOS_9 ,Slew-rate for Data signal group" hexmask.long 0x08 0.--3. 0x01 " DATA_NMOS_8 ,Slew-rate for Data signal group" line.long 0xc "DATA_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for Data Signal group" hexmask.long 0x0c 12.--15. 0x01 "DATA_NMOS_15 ,Slew-rate for Data signal group" hexmask.long 0x0c 8.--11. 0x01 " DATA_NMOS_14 ,Slew-rate for Data signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " DATA_NMOS_13 ,Slew-rate for Data signal group" hexmask.long 0x0c 0.--3. 0x01 " DATA_NMOS_12 ,Slew-rate for Data signal group" group ASD:1:(0xcc000000+0x380)++0x0f line.long 0x00 "K_CLK_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x00 12.--15. 0x01 "K_CLK_PMOS_3 ,Slew-rate for K Clock signal group" hexmask.long 0x00 8.--11. 0x01 " K_CLK_PMOS_2 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " K_CLK_PMOS_1 ,Slew-rate for K Clock signal group" hexmask.long 0x00 0.--3. 0x01 " K_CLK_PMOS_0 ,Slew-rate for K Clock signal group" line.long 0x4 "K_CLK_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x04 12.--15. 0x01 "K_CLK_PMOS_7 ,Slew-rate for K Clock signal group" hexmask.long 0x04 8.--11. 0x01 " K_CLK_PMOS_6 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " K_CLK_PMOS_5 ,Slew-rate for K Clock signal group" hexmask.long 0x04 0.--3. 0x01 " K_CLK_PMOS_4 ,Slew-rate for K Clock signal group" line.long 0x8 "K_CLK_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x08 12.--15. 0x01 "K_CLK_PMOS_11 ,Slew-rate for K Clock signal group" hexmask.long 0x08 8.--11. 0x01 " K_CLK_PMOS_10 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " K_CLK_PMOS_9 ,Slew-rate for K Clock signal group" hexmask.long 0x08 0.--3. 0x01 " K_CLK_PMOS_8 ,Slew-rate for K Clock signal group" line.long 0xc "K_CLK_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x0c 12.--15. 0x01 "K_CLK_PMOS_15 ,Slew-rate for K Clock signal group" hexmask.long 0x0c 8.--11. 0x01 " K_CLK_PMOS_14 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " K_CLK_PMOS_13 ,Slew-rate for K Clock signal group" hexmask.long 0x0c 0.--3. 0x01 " K_CLK_PMOS_12 ,Slew-rate for K Clock signal group" group ASD:1:(0xcc000000+0x390)++0x0f line.long 0x00 "K_CLK_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x00 12.--15. 0x01 "K_CLK_NMOS_3 ,Slew-rate for K Clock signal group" hexmask.long 0x00 8.--11. 0x01 " K_CLK_NMOS_2 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " K_CLK_NMOS_1 ,Slew-rate for K Clock signal group" hexmask.long 0x00 0.--3. 0x01 " K_CLK_NMOS_0 ,Slew-rate for K Clock signal group" line.long 0x4 "K_CLK_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x04 12.--15. 0x01 "K_CLK_NMOS_7 ,Slew-rate for K Clock signal group" hexmask.long 0x04 8.--11. 0x01 " K_CLK_NMOS_6 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " K_CLK_NMOS_5 ,Slew-rate for K Clock signal group" hexmask.long 0x04 0.--3. 0x01 " K_CLK_NMOS_4 ,Slew-rate for K Clock signal group" line.long 0x8 "K_CLK_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x08 12.--15. 0x01 "K_CLK_NMOS_11 ,Slew-rate for K Clock signal group" hexmask.long 0x08 8.--11. 0x01 " K_CLK_NMOS_10 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " K_CLK_NMOS_9 ,Slew-rate for K Clock signal group" hexmask.long 0x08 0.--3. 0x01 " K_CLK_NMOS_8 ,Slew-rate for K Clock signal group" line.long 0xc "K_CLK_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for K Clock Signal group" hexmask.long 0x0c 12.--15. 0x01 "K_CLK_NMOS_15 ,Slew-rate for K Clock signal group" hexmask.long 0x0c 8.--11. 0x01 " K_CLK_NMOS_14 ,Slew-rate for K Clock signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " K_CLK_NMOS_13 ,Slew-rate for K Clock signal group" hexmask.long 0x0c 0.--3. 0x01 " K_CLK_NMOS_12 ,Slew-rate for K Clock signal group" group ASD:1:(0xcc000000+0x3A0)++0x0f line.long 0x00 "DQ_PMOS_PU_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group" hexmask.long 0x00 12.--15. 0x01 "DQ_PMOS_3 ,Slew-rate for DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_PMOS_2 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_PMOS_1 ,Slew-rate for DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_PMOS_0 ,Slew-rate for DQ signal group" line.long 0x4 "DQ_PMOS_PU_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group" hexmask.long 0x04 12.--15. 0x01 "DQ_PMOS_7 ,Slew-rate for DQ signal group" hexmask.long 0x04 8.--11. 0x01 " DQ_PMOS_6 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " DQ_PMOS_5 ,Slew-rate for DQ signal group" hexmask.long 0x04 0.--3. 0x01 " DQ_PMOS_4 ,Slew-rate for DQ signal group" line.long 0x8 "DQ_PMOS_PU_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group" hexmask.long 0x08 12.--15. 0x01 "DQ_PMOS_11 ,Slew-rate for DQ signal group" hexmask.long 0x08 8.--11. 0x01 " DQ_PMOS_10 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " DQ_PMOS_9 ,Slew-rate for DQ signal group" hexmask.long 0x08 0.--3. 0x01 " DQ_PMOS_8 ,Slew-rate for DQ signal group" line.long 0xc "DQ_PMOS_PU_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group" hexmask.long 0x0c 12.--15. 0x01 "DQ_PMOS_15 ,Slew-rate for DQ signal group" hexmask.long 0x0c 8.--11. 0x01 " DQ_PMOS_14 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " DQ_PMOS_13 ,Slew-rate for DQ signal group" hexmask.long 0x0c 0.--3. 0x01 " DQ_PMOS_12 ,Slew-rate for DQ signal group" group ASD:1:(0xcc000000+0x3B0)++0x0f line.long 0x00 "DQ_NMOS_PD_SLEW_TABLE_0,Slew-rate lookup table for DQ Signal group" hexmask.long 0x00 12.--15. 0x01 "DQ_NMOS_3 ,Slew-rate for DQ signal group" hexmask.long 0x00 8.--11. 0x01 " DQ_NMOS_2 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x00 4.--7. 0x01 " DQ_NMOS_1 ,Slew-rate for DQ signal group" hexmask.long 0x00 0.--3. 0x01 " DQ_NMOS_0 ,Slew-rate for DQ signal group" line.long 0x4 "DQ_NMOS_PD_SLEW_TABLE_1,Slew-rate lookup table for DQ Signal group" hexmask.long 0x04 12.--15. 0x01 "DQ_NMOS_7 ,Slew-rate for DQ signal group" hexmask.long 0x04 8.--11. 0x01 " DQ_NMOS_6 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x04 4.--7. 0x01 " DQ_NMOS_5 ,Slew-rate for DQ signal group" hexmask.long 0x04 0.--3. 0x01 " DQ_NMOS_4 ,Slew-rate for DQ signal group" line.long 0x8 "DQ_NMOS_PD_SLEW_TABLE_2,Slew-rate lookup table for DQ Signal group" hexmask.long 0x08 12.--15. 0x01 "DQ_NMOS_11 ,Slew-rate for DQ signal group" hexmask.long 0x08 8.--11. 0x01 " DQ_NMOS_10 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x08 4.--7. 0x01 " DQ_NMOS_9 ,Slew-rate for DQ signal group" hexmask.long 0x08 0.--3. 0x01 " DQ_NMOS_8 ,Slew-rate for DQ signal group" line.long 0xc "DQ_NMOS_PD_SLEW_TABLE_3,Slew-rate lookup table for DQ Signal group" hexmask.long 0x0c 12.--15. 0x01 "DQ_NMOS_15 ,Slew-rate for DQ signal group" hexmask.long 0x0c 8.--11. 0x01 " DQ_NMOS_14 ,Slew-rate for DQ signal group" textline " " hexmask.long 0x0c 4.--7. 0x01 " DQ_NMOS_13 ,Slew-rate for DQ signal group" hexmask.long 0x0c 0.--3. 0x01 " DQ_NMOS_12 ,Slew-rate for DQ signal group" tree.end width 8. tree.end ;end include file xscale/ixp23xx-sram.ph ;begin include file xscale/ixp23xx-msf.ph ;parameters: ASD:1: 0xc8000000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; IXP23xx-MSF %1 %2 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "MSF" ; -------------------------------------------------------------------------------- width 20. group ASD:1:(0xc8000000+0x0000)++0x03 line.long 0x00 "MSF_Rx_Control,Receive Configuration Parameters" bitfld.long 0x00 31. "Rx_EN3 ,Receive Enable Channel 3" "ignore,ena" bitfld.long 0x00 30. " Rx_EN2 ,Receive Enable Channel 2" "ignore,ena" bitfld.long 0x00 29. " Rx_EN1 ,Receive Enable Channel 1" "ignore,ena" bitfld.long 0x00 28. " Rx_EN0 ,Receive Enable Channel 0" "ignore,ena" textline " " bitfld.long 0x00 22. "Rx_Mode ,Control use of receive bus pins" "UTOPIA/POS,CSIX" bitfld.long 0x00 20.--21. " Rx_Width ,Control use of receive pins" "1x32,2x16,4x8,1x16/2x8" bitfld.long 0x00 19. " Rx_MPHY_EN ,Enable MPHY operation on receive interface" "single,multi" textline " " bitfld.long 0x00 18. "Rx_MPHY_Mode ,Select MPHY mode on receive interface" "MOHY-4,MPHY-16" bitfld.long 0x00 17. " Rx_MPHY_Poll_Mode ,Select FIFO status polling method" "direct,polled" textline " " bitfld.long 0x00 15. "RX_Width_Ext ,Used along with Rx_Width to configure bus mode" "0,1" bitfld.long 0x00 14. " Rx_MPHY_Level2 ,When MSF is configured for UTOPIA or POS MPHY operation" "Level 3,Level 2" textline " " bitfld.long 0x00 12. " Rx_MPHY128_Mode ,enable MPHY-128 mode" "dis,ena" bitfld.long 0x00 2.--3. " RBUF_Element_Size ,Element Size of RBUF" "64,128,256,res" group ASD:1:(0xc8000000+0x0004)++0x03 line.long 0x00 "MSF_Tx_Control,MSF_Tx_Control" bitfld.long 0x00 31. "Tx_EN3 ,Transmit Enable Segment 3" "dis,ena" bitfld.long 0x00 30. " Tx_EN2 ,Transmit Enable Segment 2" "dis,ena" bitfld.long 0x00 29. " Tx_EN1 ,Transmit Enable Segment 1" "dis,ena" bitfld.long 0x00 28. " Tx_EN0 ,Transmit Enable Segment 0" "dis,ena" textline " " bitfld.long 0x00 27. "Tx_Flush3 ,Tx_Flush for TBUF Partition 3" "no,yes" bitfld.long 0x00 26. " Tx_Flush2 ,Tx_Flush for TBUF Partition 2" "no,yes" bitfld.long 0x00 25. " Tx_Flush1 ,Tx_Flush for TBUF Partition 1" "no,yes" bitfld.long 0x00 24. " Tx_Flush0 ,Tx_Flush for TBUF Partition 0" "no,yes" textline " " bitfld.long 0x00 22. "Tx_Mode ,Control use of transmit bus pins" "UTOPIA/POS,CSIX" bitfld.long 0x00 20.--21. " Tx_Width ,Control use of transmit pins" "1x32,2x16,4x8,1x16/2x8" bitfld.long 0x00 19. " Tx_MPHY_En ,Enable MPHY operation on transmit interface" "single,multi" textline " " bitfld.long 0x00 18. "Tx_MPHY_Mode ,Select MPHY mode on transmit interface" "MOHY-4,MPHY-16" bitfld.long 0x00 17. " Tx_MPHY_Poll_Mode ,Select FIFO status polling method" "direct,polled" textline " " bitfld.long 0x00 15. "TX_Width_Ext ,Used along with Tx_Width to configure bus mode" "0,1" bitfld.long 0x00 14. " Tx_MPHY_Level2 ,When MSF is configured for UTOPIA or POS MPHY operation" "Level 3,Level 2" textline " " bitfld.long 0x00 12. " Tx_MPHY128_Mode ,enable MPHY-128 mode" "dis,ena" bitfld.long 0x00 2.--3. " TBUF_Element_Size ,Element Size of TBUF" "64,128,256,res" group ASD:1:(0xc8000000+0x0008)++0x07 line.long 0x00 "MSF_Int_Status,MSF_Interrupt_Status" hexmask.long 0x00 8.--15. 0x01 " RBUF_Overflow_Count ,RBUF_Overflow_Count" textline " " bitfld.long 0x00 7. "Tx_MPHY_32_128_Timeout ,Mpacket reaches the head of the Tx FIFO and does not get transmitted before timeout" "no,yes" bitfld.long 0x00 4. " TBUF_Error ,Transmit Control Word programming error" "no,yes" bitfld.long 0x00 0. " HP_Error ,Incorrect Horizontal Parity received" "no,yes" line.long 0x04 "MSF_Int_Enable,MSF_Interrupt_Enable" bitfld.long 0x04 8. " RBUF_Overflow_Count ,RBUF_Overflow_Count interrupt enable" "dis,ena" textline " " bitfld.long 0x00 7. "Tx_MPHY_32_128_Timeout ,Tx_MPHY_32_128_Timeout interrupt enable" "dis,ena" bitfld.long 0x04 4. " TBUF_Error ,Transmit Control Word programming error interrupt" "dis,ena" bitfld.long 0x04 0. " HP_Error ,Incorrect Horizontal Parity received interrupt" "dis,ena" group ASD:1:(0xc8000000+0x0030)++0x0f line.long 0x00 "RxThread_Freelist_0,RxThread_Freelist_0" bitfld.long 0x00 12.--15. "Signal_Nr ,Signal Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7.--9. " ME_Nr ,ME Number" "ME-0,ME-1,ME-2,ME-3,res,res,res,res" bitfld.long 0x00 4.--6. " Thread ,Thread number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " Transfer Reg ,SRAM Transfer Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RxThread_Freelist_1,RxThread_Freelist_1" bitfld.long 0x04 12.--15. "Signal_Nr ,Signal Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7.--9. " ME_Nr ,ME Number" "ME-0,ME-1,ME-2,ME-3,res,res,res,res" bitfld.long 0x04 4.--6. " Thread ,Thread number" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " Transfer Reg ,SRAM Transfer Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RxThread_Freelist_2,RxThread_Freelist_2" bitfld.long 0x08 12.--15. "Signal_Nr ,Signal Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7.--9. " ME_Nr ,ME Number" "ME-0,ME-1,ME-2,ME-3,res,res,res,res" bitfld.long 0x08 4.--6. " Thread ,Thread number" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--3. " Transfer Reg ,SRAM Transfer Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0c "RxThread_Freelist_3,RxThread_Freelist_3" bitfld.long 0x0c 12.--15. "Signal_Nr ,Signal Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7.--9. " ME_Nr ,ME Number" "ME-0,ME-1,ME-2,ME-3,res,res,res,res" bitfld.long 0x0c 4.--6. " Thread ,Thread number" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 0.--3. " Transfer Reg ,SRAM Transfer Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0xc8000000+0x0044)++0x03 line.long 0x00 "RBUF_Element_Done,Free up RBUF Element" hexmask.long 0x00 0.--6. 0x01 "Element to Free ,Number of the Element to free up" group ASD:1:(0xc8000000+0x0048)++0x03 line.long 0x00 "Rx_MPHY_Poll_Limit,Present ports for MPHY-16 and MPHY-4" bitfld.long 0x00 0.--4. "POLL_LIMIT ,Poll Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group ASD:1:(0xc8000000+0x0050)++0x0f line.long 0x00 "RxThd_Freelst_TO_0,RxThread Freelist Timeout Register 0" hexmask.long 0x00 0.--12. 0x01 "Timeout_Interval ,Number of CCP bus clocks" line.long 0x04 "RxThd_Freelst_TO_1,RxThread Freelist Timeout Register 1" hexmask.long 0x04 0.--12. 0x01 "Timeout_Interval ,Number of CCP bus clocks" line.long 0x08 "RxThd_Freelst_TO_2,RxThread Freelist Timeout Register 2" hexmask.long 0x08 0.--12. 0x01 "Timeout_Interval ,Number of CCP bus clocks" line.long 0x0c "RxThd_Freelst_TO_3,RxThread Freelist Timeout Register 3" hexmask.long 0x0c 0.--12. 0x01 "Timeout_Interval ,Number of CCP bus clocks" group ASD:1:(0xc8000000+0x0060)++0x0f line.long 0x00 "Tx_Sequence_0,Wrapping count of the number of transmitted TBUF elements" bitfld.long 0x00 31. "Empty ,Any valid Elements" "one or more,yes" hexmask.long 0x00 0.--7. 0x1 " Sequence ,Sequence Count of elements transmitted" line.long 0x04 "Tx_Sequence_1,Wrapping count of the number of transmitted TBUF elements" bitfld.long 0x04 31. "Empty ,Any valid Elements" "one or more,yes" hexmask.long 0x04 0.--7. 0x1 " Sequence ,Sequence Count of elements transmitted" line.long 0x08 "Tx_Sequence_2,Wrapping count of the number of transmitted TBUF elements" bitfld.long 0x08 31. "Empty ,Any valid Elements" "one or more,yes" hexmask.long 0x08 0.--7. 0x1 " Sequence ,Sequence Count of elements transmitted" line.long 0x0c "Tx_Sequence_3,Wrapping count of the number of transmitted TBUF elements" bitfld.long 0x0c 31. "Empty ,Any valid Elements" "one or more,yes" hexmask.long 0x0c 0.--7. 0x1 " Sequence ,Sequence Count of elements transmitted" group ASD:1:(0xc8000000+0x0070)++0x03 line.long 0x00 "Tx_MPHY_Poll_Limit,Tx_MPHY_Poll_Limit" bitfld.long 0x00 0.--4. "Poll_Limit ,Highest Port number for polling sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group ASD:1:(0xc8000000+0x00b0)++0x03 line.long 0x00 "Tx_MPHY_Status_0,Tx_MPHY_Status ports [0:15]" bitfld.long 0x00 31. "TX_Pending_P15 ,TX Pending Port 15" "no,yes" bitfld.long 0x00 30. " TX_Pending_P14 ,TX Pending Port 14" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P13 ,TX Pending Port 13" "no,yes" bitfld.long 0x00 28. " TX_Pending_P12 ,TX Pending Port 12" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P11 ,TX Pending Port 11" "no,yes" bitfld.long 0x00 26. " TX_Pending_P10 ,TX Pending Port 10" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P9 ,TX Pending Port 9" "no,yes" bitfld.long 0x00 24. " TX_Pending_P8 ,TX Pending Port 8" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P7 ,TX Pending Port 7" "no,yes" bitfld.long 0x00 22. " TX_Pending_P6 ,TX Pending Port 6" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P5 ,TX Pending Port 5" "no,yes" bitfld.long 0x00 20. " TX_Pending_P4 ,TX Pending Port 4" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P3 ,TX Pending Port 3" "no,yes" bitfld.long 0x00 18. " TX_Pending_P2 ,TX Pending Port 2" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P1 ,TX Pending Port 1" "no,yes" bitfld.long 0x00 16. " TX_Pending_P0 ,TX Pending Port 0" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P15 ,TX Status Port 15" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P14 ,TX Status Port 14" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P13 ,TX Status Port 13" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P12 ,TX Status Port 12" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P11 ,TX Status Port 11" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P10 ,TX Status Port 10" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P9 ,TX Status Port 9" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P8 ,TX Status Port 8" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P7 ,TX Status Port 7" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P6 ,TX Status Port 6" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P5 ,TX Status Port 5" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P4 ,TX Status Port 4" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P3 ,TX Status Port 3" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P2 ,TX Status Port 2" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P1 ,TX Status Port 1" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P0 ,TX Status Port 0" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00b4)++0x03 line.long 0x00 "Tx_MPHY_Status_1,Tx_MPHY_Status ports [16:31]" bitfld.long 0x00 31. "TX_Pending_P31 ,TX Pending Port 31" "no,yes" bitfld.long 0x00 30. " TX_Pending_P30 ,TX Pending Port 30" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P29 ,TX Pending Port 29" "no,yes" bitfld.long 0x00 28. " TX_Pending_P28 ,TX Pending Port 28" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P27 ,TX Pending Port 27" "no,yes" bitfld.long 0x00 26. " TX_Pending_P26 ,TX Pending Port 26" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P25 ,TX Pending Port 25" "no,yes" bitfld.long 0x00 24. " TX_Pending_P24 ,TX Pending Port 24" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P23 ,TX Pending Port 23" "no,yes" bitfld.long 0x00 22. " TX_Pending_P22 ,TX Pending Port 22" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P21 ,TX Pending Port 21" "no,yes" bitfld.long 0x00 20. " TX_Pending_P20 ,TX Pending Port 20" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P19 ,TX Pending Port 19" "no,yes" bitfld.long 0x00 18. " TX_Pending_P18 ,TX Pending Port 18" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P17 ,TX Pending Port 17" "no,yes" bitfld.long 0x00 16. " TX_Pending_P16 ,TX Pending Port 16" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P31 ,TX Status Port 31" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P30 ,TX Status Port 30" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P29 ,TX Status Port 29" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P28 ,TX Status Port 28" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P27 ,TX Status Port 27" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P26 ,TX Status Port 26" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P25 ,TX Status Port 25" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P24 ,TX Status Port 24" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P23 ,TX Status Port 23" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P22 ,TX Status Port 22" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P21 ,TX Status Port 21" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P20 ,TX Status Port 20" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P19 ,TX Status Port 19" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P18 ,TX Status Port 18" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P17 ,TX Status Port 17" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P16 ,TX Status Port 16" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00b8)++0x03 line.long 0x00 "Tx_MPHY_Status_2,Tx_MPHY_Status ports [32:47]" bitfld.long 0x00 31. "TX_Pending_P47 ,TX Pending Port 47" "no,yes" bitfld.long 0x00 30. " TX_Pending_P46 ,TX Pending Port 46" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P45 ,TX Pending Port 45" "no,yes" bitfld.long 0x00 28. " TX_Pending_P44 ,TX Pending Port 44" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P43 ,TX Pending Port 43" "no,yes" bitfld.long 0x00 26. " TX_Pending_P42 ,TX Pending Port 42" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P41 ,TX Pending Port 41" "no,yes" bitfld.long 0x00 24. " TX_Pending_P40 ,TX Pending Port 40" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P39 ,TX Pending Port 39" "no,yes" bitfld.long 0x00 22. " TX_Pending_P38 ,TX Pending Port 38" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P37 ,TX Pending Port 37" "no,yes" bitfld.long 0x00 20. " TX_Pending_P36 ,TX Pending Port 36" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P35 ,TX Pending Port 35" "no,yes" bitfld.long 0x00 18. " TX_Pending_P34 ,TX Pending Port 34" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P33 ,TX Pending Port 33" "no,yes" bitfld.long 0x00 16. " TX_Pending_P32 ,TX Pending Port 32" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P47 ,TX Status Port 47" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P46 ,TX Status Port 46" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P45 ,TX Status Port 45" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P44 ,TX Status Port 44" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P43 ,TX Status Port 43" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P42 ,TX Status Port 42" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P41 ,TX Status Port 41" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P40 ,TX Status Port 40" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P39 ,TX Status Port 39" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P38 ,TX Status Port 38" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P37 ,TX Status Port 37" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P36 ,TX Status Port 36" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P35 ,TX Status Port 35" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P34 ,TX Status Port 34" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P33 ,TX Status Port 33" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P32 ,TX Status Port 32" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00bc)++0x03 line.long 0x00 "Tx_MPHY_Status_3,Tx_MPHY_Status ports [48:63]" bitfld.long 0x00 31. "TX_Pending_P63 ,TX Pending Port 63" "no,yes" bitfld.long 0x00 30. " TX_Pending_P62 ,TX Pending Port 62" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P61 ,TX Pending Port 61" "no,yes" bitfld.long 0x00 28. " TX_Pending_P60 ,TX Pending Port 60" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P59 ,TX Pending Port 59" "no,yes" bitfld.long 0x00 26. " TX_Pending_P58 ,TX Pending Port 58" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P57 ,TX Pending Port 57" "no,yes" bitfld.long 0x00 24. " TX_Pending_P56 ,TX Pending Port 56" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P55 ,TX Pending Port 55" "no,yes" bitfld.long 0x00 22. " TX_Pending_P54 ,TX Pending Port 54" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P53 ,TX Pending Port 53" "no,yes" bitfld.long 0x00 20. " TX_Pending_P52 ,TX Pending Port 52" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P51 ,TX Pending Port 51" "no,yes" bitfld.long 0x00 18. " TX_Pending_P50 ,TX Pending Port 50" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P49 ,TX Pending Port 49" "no,yes" bitfld.long 0x00 16. " TX_Pending_P48 ,TX Pending Port 48" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P63 ,TX Status Port 63" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P62 ,TX Status Port 62" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P61 ,TX Status Port 61" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P60 ,TX Status Port 60" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P59 ,TX Status Port 59" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P58 ,TX Status Port 58" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P57 ,TX Status Port 57" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P56 ,TX Status Port 56" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P55 ,TX Status Port 55" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P54 ,TX Status Port 54" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P53 ,TX Status Port 53" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P52 ,TX Status Port 52" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P51 ,TX Status Port 51" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P50 ,TX Status Port 50" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P49 ,TX Status Port 49" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P48 ,TX Status Port 48" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00c0)++0x03 line.long 0x00 "Tx_MPHY_Status_4,Tx_MPHY_Status ports [64:79]" bitfld.long 0x00 31. "TX_Pending_P79 ,TX Pending Port 79" "no,yes" bitfld.long 0x00 30. " TX_Pending_P78 ,TX Pending Port 78" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P77 ,TX Pending Port 77" "no,yes" bitfld.long 0x00 28. " TX_Pending_P76 ,TX Pending Port 76" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P75 ,TX Pending Port 75" "no,yes" bitfld.long 0x00 26. " TX_Pending_P74 ,TX Pending Port 74" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P73 ,TX Pending Port 73" "no,yes" bitfld.long 0x00 24. " TX_Pending_P72 ,TX Pending Port 72" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P71 ,TX Pending Port 71" "no,yes" bitfld.long 0x00 22. " TX_Pending_P70 ,TX Pending Port 70" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P69 ,TX Pending Port 69" "no,yes" bitfld.long 0x00 20. " TX_Pending_P68 ,TX Pending Port 68" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P67 ,TX Pending Port 67" "no,yes" bitfld.long 0x00 18. " TX_Pending_P66 ,TX Pending Port 66" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P65 ,TX Pending Port 65" "no,yes" bitfld.long 0x00 16. " TX_Pending_P64 ,TX Pending Port 64" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P79 ,TX Status Port 79" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P78 ,TX Status Port 78" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P77 ,TX Status Port 77" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P76 ,TX Status Port 76" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P75 ,TX Status Port 75" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P74 ,TX Status Port 74" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P73 ,TX Status Port 73" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P72 ,TX Status Port 72" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P71 ,TX Status Port 71" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P70 ,TX Status Port 70" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P69 ,TX Status Port 69" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P68 ,TX Status Port 68" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P67 ,TX Status Port 67" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P66 ,TX Status Port 66" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P65 ,TX Status Port 65" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P64 ,TX Status Port 64" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00c4)++0x03 line.long 0x00 "Tx_MPHY_Status_5,Tx_MPHY_Status ports [80:95]" bitfld.long 0x00 31. "TX_Pending_P95 ,TX Pending Port 95" "no,yes" bitfld.long 0x00 30. " TX_Pending_P94 ,TX Pending Port 94" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P93 ,TX Pending Port 93" "no,yes" bitfld.long 0x00 28. " TX_Pending_P92 ,TX Pending Port 92" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P91 ,TX Pending Port 91" "no,yes" bitfld.long 0x00 26. " TX_Pending_P90 ,TX Pending Port 90" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P89 ,TX Pending Port 89" "no,yes" bitfld.long 0x00 24. " TX_Pending_P88 ,TX Pending Port 88" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P87 ,TX Pending Port 87" "no,yes" bitfld.long 0x00 22. " TX_Pending_P86 ,TX Pending Port 86" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P85 ,TX Pending Port 85" "no,yes" bitfld.long 0x00 20. " TX_Pending_P84 ,TX Pending Port 84" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P83 ,TX Pending Port 83" "no,yes" bitfld.long 0x00 18. " TX_Pending_P82 ,TX Pending Port 82" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P81 ,TX Pending Port 81" "no,yes" bitfld.long 0x00 16. " TX_Pending_P80 ,TX Pending Port 80" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P95 ,TX Status Port 95" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P94 ,TX Status Port 94" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P93 ,TX Status Port 93" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P92 ,TX Status Port 92" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P91 ,TX Status Port 91" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P90 ,TX Status Port 90" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P89 ,TX Status Port 89" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P88 ,TX Status Port 88" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P87 ,TX Status Port 87" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P86 ,TX Status Port 86" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P85 ,TX Status Port 85" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P84 ,TX Status Port 84" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P83 ,TX Status Port 83" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P82 ,TX Status Port 82" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P81 ,TX Status Port 81" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P80 ,TX Status Port 80" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00c8)++0x03 line.long 0x00 "Tx_MPHY_Status_6,Tx_MPHY_Status ports [96:111]" bitfld.long 0x00 31. "TX_Pending_P111 ,TX Pending Port 111" "no,yes" bitfld.long 0x00 30. " TX_Pending_P110 ,TX Pending Port 110" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P109 ,TX Pending Port 109" "no,yes" bitfld.long 0x00 28. " TX_Pending_P108 ,TX Pending Port 108" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P107 ,TX Pending Port 107" "no,yes" bitfld.long 0x00 26. " TX_Pending_P106 ,TX Pending Port 106" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P105 ,TX Pending Port 105" "no,yes" bitfld.long 0x00 24. " TX_Pending_P104 ,TX Pending Port 104" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P103 ,TX Pending Port 103" "no,yes" bitfld.long 0x00 22. " TX_Pending_P102 ,TX Pending Port 102" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P101 ,TX Pending Port 101" "no,yes" bitfld.long 0x00 20. " TX_Pending_P100 ,TX Pending Port 100" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P99 ,TX Pending Port 99" "no,yes" bitfld.long 0x00 18. " TX_Pending_P98 ,TX Pending Port 98" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P97 ,TX Pending Port 97" "no,yes" bitfld.long 0x00 16. " TX_Pending_P96 ,TX Pending Port 96" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P111 ,TX Status Port 111" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P110 ,TX Status Port 110" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P109 ,TX Status Port 109" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P108 ,TX Status Port 108" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P107 ,TX Status Port 107" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P106 ,TX Status Port 106" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P105 ,TX Status Port 105" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P104 ,TX Status Port 104" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P103 ,TX Status Port 103" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P102 ,TX Status Port 102" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P101 ,TX Status Port 101" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P100 ,TX Status Port 100" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P99 ,TX Status Port 99" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P98 ,TX Status Port 98" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P97 ,TX Status Port 97" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P96 ,TX Status Port 96" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x00cc)++0x03 line.long 0x00 "Tx_MPHY_Status_7,Tx_MPHY_Status ports [112:127]" bitfld.long 0x00 31. "TX_Pending_P127 ,TX Pending Port 127" "no,yes" bitfld.long 0x00 30. " TX_Pending_P126 ,TX Pending Port 126" "no,yes" textline " " bitfld.long 0x00 29. " TX_Pending_P125 ,TX Pending Port 125" "no,yes" bitfld.long 0x00 28. " TX_Pending_P124 ,TX Pending Port 124" "no,yes" textline " " bitfld.long 0x00 27. " TX_Pending_P123 ,TX Pending Port 123" "no,yes" bitfld.long 0x00 26. " TX_Pending_P122 ,TX Pending Port 122" "no,yes" textline " " bitfld.long 0x00 25. " TX_Pending_P121 ,TX Pending Port 121" "no,yes" bitfld.long 0x00 24. " TX_Pending_P120 ,TX Pending Port 120" "no,yes" textline " " bitfld.long 0x00 23. " TX_Pending_P119 ,TX Pending Port 119" "no,yes" bitfld.long 0x00 22. " TX_Pending_P118 ,TX Pending Port 118" "no,yes" textline " " bitfld.long 0x00 21. " TX_Pending_P117 ,TX Pending Port 117" "no,yes" bitfld.long 0x00 20. " TX_Pending_P116 ,TX Pending Port 116" "no,yes" textline " " bitfld.long 0x00 19. " TX_Pending_P115 ,TX Pending Port 115" "no,yes" bitfld.long 0x00 18. " TX_Pending_P114 ,TX Pending Port 114" "no,yes" textline " " bitfld.long 0x00 17. " TX_Pending_P113 ,TX Pending Port 113" "no,yes" bitfld.long 0x00 16. " TX_Pending_P112 ,TX Pending Port 112" "no,yes" textline " " bitfld.long 0x00 15. " TX_Status_P127 ,TX Status Port 127" "(near)Full,Not Full" bitfld.long 0x00 14. " TX_Status_P126 ,TX Status Port 126" "(near)Full,Not Full" textline " " bitfld.long 0x00 13. " TX_Status_P125 ,TX Status Port 125" "(near)Full,Not Full" bitfld.long 0x00 12. " TX_Status_P124 ,TX Status Port 124" "(near)Full,Not Full" textline " " bitfld.long 0x00 11. " TX_Status_P123 ,TX Status Port 123" "(near)Full,Not Full" bitfld.long 0x00 10. " TX_Status_P122 ,TX Status Port 122" "(near)Full,Not Full" textline " " bitfld.long 0x00 9. " TX_Status_P121 ,TX Status Port 121" "(near)Full,Not Full" bitfld.long 0x00 8. " TX_Status_P120 ,TX Status Port 120" "(near)Full,Not Full" textline " " bitfld.long 0x00 7. " TX_Status_P119 ,TX Status Port 119" "(near)Full,Not Full" bitfld.long 0x00 6. " TX_Status_P118 ,TX Status Port 118" "(near)Full,Not Full" textline " " bitfld.long 0x00 5. " TX_Status_P117 ,TX Status Port 117" "(near)Full,Not Full" bitfld.long 0x00 4. " TX_Status_P116 ,TX Status Port 116" "(near)Full,Not Full" textline " " bitfld.long 0x00 3. " TX_Status_P115 ,TX Status Port 115" "(near)Full,Not Full" bitfld.long 0x00 2. " TX_Status_P114 ,TX Status Port 114" "(near)Full,Not Full" textline " " bitfld.long 0x00 1. " TX_Status_P113 ,TX Status Port 113" "(near)Full,Not Full" bitfld.long 0x00 0. " TX_Status_P112 ,TX Status Port 112" "(near)Full,Not Full" group ASD:1:(0xc8000000+0x0080)++0x0f line.long 0x00 "Rx_UP_Control_0,Rx_UP_Control_0" bitfld.long 0x00 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 5. "PP_Mode ,POS-PHY Mode" "Level 2,Level 3" bitfld.long 0x00 4. " CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" textline " " bitfld.long 0x00 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" bitfld.long 0x00 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x00 0. " DR_Time ,Decode Response time" "1 clk,2 clk" line.long 0x04 "Rx_UP_Control_1,Rx_UP_Control_1" bitfld.long 0x04 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x04 5. "PP_Mode ,POS-PHY Mode" "Level 2,Level 3" bitfld.long 0x04 4. " CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" textline " " bitfld.long 0x04 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" bitfld.long 0x04 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x04 0. " DR_Time ,Decode Response time" "1 clk,2 clk" line.long 0x08 "Rx_UP_Control_2,Rx_UP_Control_2" bitfld.long 0x08 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x08 5. "PP_Mode ,POS-PHY Mode" "Level 2,Level 3" bitfld.long 0x08 4. " CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" textline " " bitfld.long 0x08 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" bitfld.long 0x08 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x08 0. " DR_Time ,Decode Response time" "1 clk,2 clk" line.long 0x0c "Rx_UP_Control_3,Rx_UP_Control_3" bitfld.long 0x0c 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x0c 5. "PP_Mode ,POS-PHY Mode" "Level 2,Level 3" bitfld.long 0x0c 4. " CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" textline " " bitfld.long 0x0c 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" bitfld.long 0x0c 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x0c 0. " DR_Time ,Decode Response time" "1 clk,2 clk" group ASD:1:(0xc8000000+0x0090)++0x0f line.long 0x00 "Tx_UP_Control_0,Tx_UP_Control_0" bitfld.long 0x00 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x00 4. "CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" bitfld.long 0x00 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" textline " " bitfld.long 0x00 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x00 0. " DR_Time ,Decode Response time" "1 clk,2 clk" line.long 0x04 "Tx_UP_Control_1,Tx_UP_Control_1" bitfld.long 0x04 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x04 4. "CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" bitfld.long 0x04 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" textline " " bitfld.long 0x04 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x04 0. " DR_Time ,Decode Response time" "1 clk,2 clk" line.long 0x08 "Tx_UP_Control_2,Tx_UP_Control_2" bitfld.long 0x08 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x08 4. "CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" bitfld.long 0x08 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" textline " " bitfld.long 0x08 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x08 0. " DR_Time ,Decode Response time" "1 clk,2 clk" line.long 0x0c "Tx_UP_Control_3,Tx_UP_Control_3" bitfld.long 0x0c 6. "MS_Mode ,Master/Slave Mode" "Master,Slave" bitfld.long 0x0c 4. "CP_Mode ,Cell (UTOPIA) or Packet (POS-PHY) mode" "cell,packet" bitfld.long 0x0c 2.--3. " Parity_Mode ,Parity Mode" "no,no,odd,even" textline " " bitfld.long 0x0c 1. " Cell_Size ,Cell Size" "52,53(x8)/54(x16)/56(x32)" bitfld.long 0x0c 0. " DR_Time ,Decode Response time" "1 clk,2 clk" group ASD:1:(0xc8000000+0x00a0)++0x0f line.long 0x00 "Rx_FIFO_Control_0,Rx FIFO control for slave mode" hexmask.long 0x00 8.--15. 0x01 "Rx_D_FIFO_HWM ,Rx Data FIFO High Watermark" hexmask.long 0x00 0.--5. 0x01 " Rx_S_FIFO_HWM ,Rx Status FIFO High Watermark" line.long 0x04 "Rx_FIFO_Control_1,Rx FIFO control for slave mode" hexmask.long 0x04 8.--15. 0x01 "Rx_D_FIFO_HWM ,Rx Data FIFO High Watermark" hexmask.long 0x04 0.--5. 0x01 " Rx_S_FIFO_HWM ,Rx Status FIFO High Watermark" line.long 0x08 "Rx_FIFO_Control_2,Rx FIFO control for slave mode" hexmask.long 0x08 8.--15. 0x01 "Rx_D_FIFO_HWM ,Rx Data FIFO High Watermark" hexmask.long 0x08 0.--5. 0x01 " Rx_S_FIFO_HWM ,Rx Status FIFO High Watermark" line.long 0x0c "Rx_FIFO_Control_3,Rx FIFO control for slave mode" hexmask.long 0x0c 8.--15. 0x01 "Rx_D_FIFO_HWM ,Rx Data FIFO High Watermark" hexmask.long 0x0c 0.--5. 0x01 " Rx_S_FIFO_HWM ,Rx Status FIFO High Watermark" width 32. group ASD:1:(0xc8000000+0x00d0)++0x03 line.long 0x00 "Tx_MPHY_32_128_Timeout_Control,MPHY-32 and MPHY-128 Mode Timeout Control" bitfld.long 0x00 31. "TIMEOUT_ENABLE ,Enable Tx Timer" "dis,ena" hexmask.long 0x00 0.--23. 0x01 " TIMEOUT_VALUE ,Timeout value in TXCLK01 clocks" group ASD:1:(0xc8000000+0x00d4)++0x03 line.long 0x00 "Tx_MPHY_32_128_Timeout_Status,MPHY-32 and MPHY-128 Mode Timeout Status" bitfld.long 0x00 31. "SERR ,Single Timeout Error" "no,yes" bitfld.long 0x00 30. " MERR ,Multiple Timeout Error" "no,yes" hexmask.long 0x00 0.--6. 0x01 " PORT_NUM ,The number of the port which encountered the timeout" width 20. group ASD:1:(0xc8000000+0x00d8)++0x03 line.long 0x00 "Rx_MPHY_128_Control,MPHY-128 Receive Control register" bitfld.long 0x00 31. "CLAV_NUM ,This field reflects the maximum number of enb/clav pairs" "8 ENB/CLAV,4 ENB/CLAV" bitfld.long 0x00 30. " CLAV_NUM_OVERRIDE ,When CLAV_NUM indicates maximum of 8 enb/clav pairs then a one written to this register will reduce it to 4 enb/clav pairs" "no,yes" textline " " bitfld.long 0x00 14.--15. " RXCLAV[7] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" bitfld.long 0x00 12.--13. " RXCLAV[6] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" textline " " bitfld.long 0x00 10.--11. " RXCLAV[5] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" bitfld.long 0x00 8.--09. " RXCLAV[4] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" textline " " bitfld.long 0x00 6.--07. " RXCLAV[3] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" bitfld.long 0x00 4.--05. " RXCLAV[2] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" textline " " bitfld.long 0x00 2.--03. " RXCLAV[1] ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" bitfld.long 0x00 0.--01. " RXCLAV[0](RXPFA) ,It is used to changed the receive hardwares handling of the RXCLAV pins" "present,not present,res,res" group ASD:1:(0xc8000000+0x00dc)++0x03 line.long 0x00 "Tx_MPHY_128_Control,MPHY-128 Transmit Control register" bitfld.long 0x00 31. "CLAV_NUM ,This field reflects the maximum number of enb/clav pairs" "8 ENB/CLAV,4 ENB/CLAV" bitfld.long 0x00 30. " CLAV_NUM_OVERRIDE ,When CLAV_NUM indicates maximum of 8 enb/clav pairs then a one written to this register will reduce it to 4 enb/clav pairs" "no,yes" group ASD:1:(0xc8000000+0x00f0)++0x03 line.long 0x00 "MSF_RCOMP_Status,Rx IO buffers RCOMP Status" bitfld.long 0x00 31. "Ready ,Self check signal from RCOMP Controller" "0,1" bitfld.long 0x00 30. " CMPM ,Control Signal to RCOMP controller from MSF pads" "0,1" bitfld.long 0x00 29. " CMPP ,Control Signal to RCOMP controller from MSF pads" "0,1" textline " " hexmask.long 0x00 12.--23. 0x01 " N Drive Srength ,N drive strength from MSF Rcomp to MSF pads" hexmask.long 0x00 0.--11. 0x01 " P Drive Srength ,P drive strength from MSF Rcomp to MSF pads" group ASD:1:(0xc8000000+0x00f8)++0x03 line.long 0x00 "MSF_RCOMP_Override,This register provides override values for the N and P drive strength values for all 4 channels of MSF PADS." hexmask.long 0x00 16.--27. 0x01 "N Drive Srength Override ,Programmable N drive strength for PCI pads" hexmask.long 0x00 0.--11. 0x01 " P Drive Srength Override ,Programmable P drive strength for PCI pads" group ASD:1:(0xc8000000+0x00fc)++0x03 line.long 0x00 "MSF_RCOMP_Controlec,This register provides various control bits for the operation of the RCOMP controller" bitfld.long 0x00 10. "i_sw_reset ,reset activity" "inactive,active" bitfld.long 0x00 9. " Overwrite Channel Tx23 ,Overwrite Rcomp generated N and P drive strengths with programmed N and P drive strengths" "no,yes" textline " " bitfld.long 0x00 8. " Overwrite Channel Tx01 ,Overwrite Rcomp generated N and P drive strengths with programmed N and P drive strengths" "no,yes" bitfld.long 0x00 7. " Overwrite Channel Rx23 ,Overwrite Rcomp generated N and P drive strengths with programmed N and P drive strengths" "no,yes" textline " " bitfld.long 0x00 6. " Overwrite Channel Rx01 ,Overwrite Rcomp generated N and P drive strengths with programmed N and P drive strengths" "no,yes" bitfld.long 0x00 5. " CMPO ,Overwrite comparator output, selected when CMPOWR is set to 1" "no,yes" bitfld.long 0x00 4. " CMPOWR ,Select cmpo as comparator output" "no,yes" bitfld.long 0x00 3. " CMPORD ,Disable digital part of Rcomp" "ena,dis" textline " " bitfld.long 0x00 2. " Monitor ,Bypass Rcomp update logic, update on each clock cycle" "no,yes" bitfld.long 0x00 1. " stop ,Disable Rcomp update logic" "ena,dis" bitfld.long 0x00 0. " div_bps ,Use internal clock divider" "no,yes" ; TBUF_Element_Control_V_# (%2+0x1800)++0x03ff ; RBUF(read)/TBUF(write) (%2+0x2000)++0x1fff width 8. tree.end ;end include file xscale/ixp23xx-msf.ph ;begin include file xscale/ixp23xx-pcicfg.ph ;parameters: ASD:1: 0xde000000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; IXP23XX-PCICFG %1 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "PCI Configuration" ; -------------------------------------------------------------------------------- width 18. ; -------------------------------------------------------------------------------- ; *** IXP23xx *** ; -------------------------------------------------------------------------------- if d.l(ASD:1:(0xde000000+0x00))==0x90028086 group ASD:1:(0xde000000+0x00)++0x03 line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register" bitfld.long 0x00 16.--16. "DEV_ID ,Device ID" "IXP23xx,IXP23xx" bitfld.long 0x00 0.--0. " VEND_ID ,Vendor ID" "Intel,Intel" ; -------------------------------------------------------------------------------- ; *** any other Intel *** ; -------------------------------------------------------------------------------- elif (d.l(ASD:1:(0xde000000+0x00))&0x0000ffff)==0x00008086 group ASD:1:(0xde000000+0x00)++0x03 line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register" hexmask.long 0x00 16.--31. 0x01 "DEV_ID ,Divice ID" bitfld.long 0x00 0.--0. " VEND_ID ,Vendor ID" "Intel,Intel" ; -------------------------------------------------------------------------------- ; *** any else *** ; -------------------------------------------------------------------------------- else group ASD:1:(0xde000000+0x00)++0x03 line.long 0x00 "PCI_VEN_DEV_ID,PCI Device and Vendor Register" hexmask.long 0x00 16.--31. 0x01 "DEV_ID ,Divice ID" hexmask.long 0x00 0.--15. 0x01 " VEND_ID ,Vendor ID" endif group ASD:1:(0xde000000+0x04)++0x03 line.long 0x00 "PCI_CMD_STAT,PCI Command and Status Register" bitfld.long 0x00 31. "PERR_2 ,Parity Error" "no,yes" bitfld.long 0x00 30. " SIG_SERR ,Signalled SERR" "no,yes" bitfld.long 0x00 29. " RX_MA ,Master Abort" "no,yes" bitfld.long 0x00 28. " RX_TA ,Received Target Abort as a master" "no,yes" textline " " bitfld.long 0x00 27. " SIG_TA ,Signalled Target Abort as a target" "no,yes" bitfld.long 0x00 25.--26. " DEVSEL ,DEVSEL speed" "00,01,10,11" bitfld.long 0x00 24. " PERR ,PCI_PERR" "no,yes" bitfld.long 0x00 23. " FAST_BACK_T ,Target is capable accepting fast back-to-back" "no,yes" textline " " bitfld.long 0x00 22. " UDF ,User Definable Features" "no,yes" bitfld.long 0x00 21. " 66MHZ ,66Mhz capability" "no,yes" bitfld.long 0x00 9. " FAST_BACK_I ,Enables fast back-to-backtransactions" "dis,ena" bitfld.long 0x00 8. " SERR_EN ,Enables assertion of PCI_SERR" "dis,ena" textline " " bitfld.long 0x00 7. " STEP_EN ,Enables bizarre AD stepping" "dis,ena" bitfld.long 0x00 6. " PERR_RESP ,Enables PCI parity check" "dis,ena" bitfld.long 0x00 5. " VGA_EN ,Enables VGA palette snoooping" "dis,ena" bitfld.long 0x00 4. " WR_INV_EN ,Enables use of Memory Write" "dis,ena" textline " " bitfld.long 0x00 3. " SPEC_CYC ,Enables response to PCI Special Cycles" "dis,ena" bitfld.long 0x00 2. " BUS_MASTER ,Enables PE to act as PCI master" "dis,ena" bitfld.long 0x00 1. " MEM_SPACE ,Enables MEM Space" "dis,ena" bitfld.long 0x00 0. " IO_SPACE ,Enables IO Space" "dis,ena" group ASD:1:(0xde000000+0x08)++0x03 line.long 0x00 "PCI_REV_CLASS,PCI Class Code Register" hexmask.long 0x00 24.--31. 0x01 "CLASS ,Processor (0x0B)" hexmask.long 0x00 16.--23. 0x01 " SUB_CLASS ,CO-Processor (0x40)" textline " " hexmask.long 0x00 8.--15. 0x01 " INTERFACE ,Programming Interface (0x01)" hexmask.long 0x00 0.--7. 0x01 " REV ,Chip Revision" group ASD:1:(0xde000000+0x0c)++0x03 line.long 0x00 "PCI_CH_LAT_HDR,PCI Miscellaneous BIST" bitfld.long 0x00 31. "BSUP ,BIST Support Device" "no,yes" bitfld.long 0x00 30. " BSTRT ,BIST Start Control Bit" "IXP,BIST Int." bitfld.long 0x00 24.--27. " BCMPT ,BIST Complete Status" "passed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed,failed" hexmask.long 0x00 16.--23. 0x01 " HDR_TYPE ,Header Format code" textline " " hexmask.long 0x00 11.--15. 0x01 " LAT_TMR_VAL ,Latency timer value" hexmask.long 0x00 8.--10. 0x01 " LAT_TMR_FIX ,Latency timer by PCI" hexmask.long 0x00 0.--7. 0x01 " CACHE_LINE ,Cache line Size" group ASD:1:(0xde000000+0x10)++0x03 line.long 0x00 "PCI_CSR_BAR,PCI Base Address Register for CSRs" hexmask.long 0x00 20.--31. 0x00100000 "BASE_ADDR ,PCI Base Address" hexmask.long 0x00 4.--19. 0x01 " SIZE ,Size" bitfld.long 0x00 0.--3. " TYPE ,Not prefetchable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0xde000000+0x14)++0x03 line.long 0x00 "PCI_SRAM_BAR,PCI Base Address Register for SRAM" hexmask.long 0x00 28.--31. 0x10000000 "BASE_ADDR ,PCI base address for SRAM" hexmask.long 0x00 18.--27. 0x00040000 " PROG_ADDR ,Window size by CFG_PROM_BOOT" hexmask.long 0x00 4.--17. 0x00000010 " FIX_ADDR ,Read as 0x0" textline " " bitfld.long 0x00 3. " PREF ,Prefetchable space determined" "0,1" bitfld.long 0x00 0.--2. " TYPE ,Locatable anywhere" "0,1,2,3,4,5,6,7" group ASD:1:(0xde000000+0x18)++0x03 line.long 0x00 "PCI_DRAM_BAR,PCI Base Address Register for DRAM" hexmask.long 0x00 30.--31. 0x40000000 "BASE_ADDR ,PCI base address for DRAM" hexmask.long 0x00 20.--29. 0x00100000 " PROG_ADDR ,Window size by CFG_PROM_BOOT" hexmask.long 0x00 4.--19. 0x00000010 " FIX_ADDR ,Read as 0x0" textline " " bitfld.long 0x00 3. " PREF ,Prefetchable space determined" "0,1" bitfld.long 0x00 0.--2. " TYPE ,Locatable anywhere" "0,1,2,3,4,5,6,7" group ASD:1:(0xde000000+0x2c)++0x03 line.long 0x00 "PCI_SUBSYS,PCI Subsystem ID" hexmask.long 0x00 16.--31. 0x01 "SID ,Subsystem ID" hexmask.long 0x00 0.--15. 0x01 " SVID ,Subsystem Vendor ID" group ASD:1:(0xde000000+0x3c)++0x03 line.long 0x00 "PCI_INT_LAT,PCI Interrupt Latency" hexmask.long 0x00 24.--31. 0x01 "MAX_LAT ,How often device get to bus in units" hexmask.long 0x00 16.--23. 0x01 " MIN_GNT ,Time need for a burst" textline " " hexmask.long 0x00 8.--15. 0x01 " INT_PIN ,Which interrupt pin is used" hexmask.long 0x00 0.--7. 0x01 " INT_LINE ,System interrupt information" group ASD:1:(0xde000000+0x60)++0x03 line.long 0x00 "PCI_RCOMP_CONTROL,PCI RCOMP Control Register" bitfld.long 0x00 31. "s/w reset ,software reset bit asserted" "no,yes" bitfld.long 0x00 30. " overwrite ,override Rcomp generated P and N drive strengths with programmed P and N drive strengths" "no,yes" bitfld.long 0x00 29. " cmpo ,Overwrite comparator output, selected when cmpowr is set to 1" "no,yes" textline " " bitfld.long 0x00 28. " cmpowr ,select cmpo as comparator output" "cmpo,PAPC_O_CMPP_RPCIH/PAPC_O_CMPN_RPCIH" bitfld.long 0x00 27. " cmpord ,disable digital part of Rcomp" "ena,dis" textline " " bitfld.long 0x00 26. " monitor ,Bypass Rcomp update logic, update on each clock cycle" "Rcomp update logic,update on each clock cycle" bitfld.long 0x00 25. " stop ,Disable Rcomp update logic" "ena,dis" bitfld.long 0x00 24. " div_bps ,Use internal clock divider" "bypass int clk div,use int clk div" textline " " hexmask.long 0x00 12.--23. 0x01 " N drive strength ,Programmable N drive strength for PCI pads. Selected when overwrite is set to 1" hexmask.long 0x00 0.--11. 0x01 " P drive strength ,Programmable P drive strength for PCI pads. Selected when overwrite is set to 1" group ASD:1:(0xde000000+0x64)++0x03 line.long 0x00 "PCI_RCOMP_STAT,PCI RCOMP Status" bitfld.long 0x00 31. "Ready ,Self check signal from rcomp controller" "no,yes" bitfld.long 0x00 30. " cmpn ,Control signal to Rcomp controller from PCI Pads" "no,yes" bitfld.long 0x00 29. " cmpp ,Control signal to Rcomp controller from PCI Pads" "no,yes" textline " " hexmask.long 0x00 12.--23. 0x01 " N Drive Strength ,N-drive strength from PCI rcomp to PCI pads" hexmask.long 0x00 0.--11. 0x01 " P Drive Strength ,P-drive strength from PCI rcomp to PCI pads" group ASD:1:(0xde000000+0x78)++0x03 line.long 0x00 "PCI_IXP_PARAM,IXP PArameters Register" bitfld.long 0x00 8. "TWLEN ,Target write long burst enable. PCI write burst will not be disconnected unless the write FIFO/ buffer is busy" "no,yes" bitfld.long 0x00 1. " DPATH ,Current PCI UNIT 64bit mode" "system,inversion" bitfld.long 0x00 0. " D64 ,Attempts D64 tranactions" "no,yes" width 8. tree.end ;end include file xscale/ixp23xx-pcicfg.ph ;begin include file xscale/ixp23xx-pcictrl.ph ;parameters: ASD:1: 0xdf000000 ; -------------------------------------------------------------------------------- ; IXP2325, IXP2350 ; ; IXP23XX-PCICTRL %1 ; ; %1 memory space ; %2 Base Address ; ; -------------------------------------------------------------------------------- tree "PCI Controller" ; -------------------------------------------------------------------------------- width 24. group ASD:1:(0xdf000000+0x030)++0x03 line.long 0x00 "PCI_OUT_INT_STATUS,PCI Outbound Interrupt Status" bitfld.long 0x00 10. "DMAD1 ,Channel 1 DMA Done Interrupt" "no,yes" bitfld.long 0x00 9. " DMAD2 ,Channel 2 DMA Done Interrupt" "no,yes" bitfld.long 0x00 8. " DMAD3 ,Channel 3 DMA Done Interrupt" "no,yes" bitfld.long 0x00 3. " WDI ,XPI Wachtdog Timer" "no,yes" textline " " bitfld.long 0x00 2. " PDI ,PCI Doorbell Interrupt" "no,yes" bitfld.long 0x00 1. " XSI ,XScale Interrrupt" "no,yes" bitfld.long 0x00 0. " PIS ,PCI Interrrupt Status" "no,yes" group ASD:1:(0xdf000000+0x034)++0x03 line.long 0x00 "PCI_OUT_INT_MASK,PCI Outbound Interrupt Mask" bitfld.long 0x00 10. "DMAD1M ,Channel 1 DMA Done Interrupt Mask" "dis,ena" bitfld.long 0x00 9. " DMAD2M ,Channel 2 DMA Done Interrupt Mask" "dis,ena" bitfld.long 0x00 8. " DMAD3M ,Channel 3 DMA Done Interrupt Mask" "dis,ena" bitfld.long 0x00 3. " WDIM ,XPI Wachtdog Timer Mask" "dis,ena" textline " " bitfld.long 0x00 2. " PDIM ,PCI Doorbell Interrupt Mask" "dis,ena" bitfld.long 0x00 1. " XSIM ,XScale Interrrupt Mask" "dis,ena" bitfld.long 0x00 0. " PISM ,PCI Interrrupt Status Mask" "dis,ena" group ASD:1:(0xdf000000+0x050)++0x0f line.long 0x00 "MAILBOX_0,Mailbox Register" hexmask.long 0x00 0.--31. 0x01 "MAILBOX_DATA ,Mailbox Data passes messages between the Intel XScale core and the host processor. Usage is application dependent" line.long 0x04 "MAILBOX_1,Mailbox Register" hexmask.long 0x04 0.--31. 0x01 "MAILBOX_DATA ,Mailbox Data passes messages between the Intel XScale core and the host processor. Usage is application dependent" line.long 0x08 "MAILBOX_2,Mailbox Register" hexmask.long 0x08 0.--31. 0x01 "MAILBOX_DATA ,Mailbox Data passes messages between the Intel XScale core and the host processor. Usage is application dependent" line.long 0x0c "MAILBOX_3,Mailbox Register" hexmask.long 0x0c 0.--31. 0x01 "MAILBOX_DATA ,Mailbox Data passes messages between the Intel XScale core and the host processor. Usage is application dependent" group ASD:1:(0xdf000000+0x060)++0x03 line.long 0x00 "XSCALE_DOORBELL,XScale Doorbell, Software Interrupt from host to XScale" hexmask.long 0x00 0.--31. 0x01 "XSCALE_INT_F_HOST ,Software Interrupt from host to the Intel XScale core" group ASD:1:(0xdf000000+0x064)++0x03 line.long 0x00 "XSCALE_DOORBELL_SETUP,XScale Doorbell Setup, Read/Write data Address" hexmask.long 0x00 0.--31. 0x01 "RW_DATA_ADDR ,Read/Write Data Address" group ASD:1:(0xdf000000+0x070)++0x03 line.long 0x00 "PCI_DOORBELL,PCI Doorbell, Software Interrupt from XScale to host" hexmask.long 0x00 0.--31. 0x01 "PCI_SW_INT_T_HOST ,Software Interrupt from the Intel XScale core to host" group ASD:1:(0xdf000000+0x074)++0x03 line.long 0x00 "PCI_DOORBELL_SETUP,PCI doorbell Setup, Read/Write data Address" hexmask.long 0x00 0.--31. 0x01 "RW_DATA_ADDR ,Read/Write Data Address" group ASD:1:(0xdf000000+0x080)++0x17 "Channel 1" line.long 0x00 "CHAN_BYTE_COUNT,DMA Channel Byte Transfer Count" bitfld.long 0x00 31. "EOC ,End of Chain" "no,yes" bitfld.long 0x00 30. " CTD ,Control Transfer Direction" "PCI to DRAM,DRAM to PCI" hexmask.long 0x00 0.--23. 0x01 " DMA_BYTE_CNT ,DMA Byte Count" line.long 0x04 "CHAN_PCI_ADDR,DMA Channel PCI Address" hexmask.long 0x00 0.--31. 0x01 "PCI_ADDR ,PCI Address. Contains the address on the PCI bus for reads or writes. It is updated internally as the DMA operation progresses" line.long 0x08 "CHAN_DRAM_ADDR,DMA Channel DRAM Address" hexmask.long 0x00 0.--31. 0x01 "DMA_ADDR ,DRAM Address. Contains the address of the DRAM for reads or writes. It is updated internally as the DMA operation progresses" line.long 0x0c "CHAN_DESC_PTR,SRAM address of the next DMA descriptor for this channel" bitfld.long 0x0c 30.--31. "CH ,SRAM Channel number" "0,1,2,3" hexmask.long 0x0c 4.--29. 0x10 " DESCR_PTR ,Descriptor Pionter contains the address of the next descriptor in SRAM" line.long 0x10 "CHAN_CONTROL,DMA Channel Control for the durection of a chain operation" hexmask.long 0x10 16.--31. 0x01 "CHAN_XFER_DONE_CNT ,Channel Transfer Done Descriptor Count" bitfld.long 0x10 15. " UDR ,Unlinked Descriptor" "read,completed" bitfld.long 0x10 14. " PAUSED ,Set by channel when it completes an unlinked decriptor" "no,yes" textline " " bitfld.long 0x10 13. " DA ,Notify the Channel that it has linked a new descriptor to an unlinked descritpro" "no,yes" bitfld.long 0x10 7. " CCD ,Channel chain done" "no,yes" bitfld.long 0x10 4. " CIDR ,Channel initial descriptor" "no,yes" bitfld.long 0x10 3. " CH_ERR ,Channel error" "no,yes" bitfld.long 0x10 2. " CXD ,Channel transfer done" "no,yes" bitfld.long 0x10 0. " CE ,Channel enable" "dis,ena" line.long 0x14 "CHAN_ME_PARAM,DMA Channel ME Microengine Parameter" bitfld.long 0x14 31. "CTX_MODE ,Number of ME contexts" "8,4" bitfld.long 0x14 16. " ME_CLUS ,ME Cluster" "0,1" bitfld.long 0x14 12.--14. " ME_NO ,Microengine Number" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9.--11. " CTX_NO ,Context Number" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--8. " REG_NO ,Register Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 0.--3. " SIG_NO ,Signal Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group ASD:1:(0xdf000000+0x0A0)++0x17 "Channel 2" copy group ASD:1:(0xdf000000+0x0C0)++0x17 "Channel 3" copy textline " " textline " " group ASD:1:(0xdf000000+0x0E0)++0x03 line.long 0x00 "DMA_INF_MODE,DMA Information Mode" bitfld.long 0x00 2.--3. "CH3 ,DMA Channel 3 allocation" "ME,XScale,PCI,res" bitfld.long 0x00 0.--1. " MODE ,DMA Channel 1 and 2 allocation" "CH1-XScale/CH2-ME,both XScale,both ME,both PCI" group ASD:1:(0xdf000000+0x0FC)++0x03 line.long 0x00 "SRAM_BASE_ADDR_MASK,SRAM Address Mask" bitfld.long 0x00 31. "DIS ,SRAM Window Disable" "ena,dis" bitfld.long 0x00 30. " NPR ,Non Perfetchable" "no,yes" hexmask.long 0x00 18.--27. 0x040000 " MASK ,Address Window Size Mask" group ASD:1:(0xdf000000+0x100)++0x03 line.long 0x00 "DRAM_BASE_ADDR_MASK,DRAM Address Mask" bitfld.long 0x00 31. "DIS ,DRAM Window Disable" "ena,dis" bitfld.long 0x00 30. " NPR ,Non Perfetchable" "no,yes" hexmask.long 0x00 20.--29. 0x100000 " MASK ,Address Window Size Mask" group ASD:1:(0xdf000000+0x13C)++0x03 line.long 0x00 "PCI_CONTROL,PCI Block CSR" bitfld.long 0x00 31. "CFG_PCI_BOOT ,Boot Host, reflects the value of the CFG_PCI_BOOT pin" "Ext host,IXP" bitfld.long 0x00 30. " CFG_PROM_BOOT ,PCI Prom Boot, reflects the value of the CFG_PCI_BOOT_HOST pin" "DRAM,PROM" textline " " bitfld.long 0x00 29. " CFG_PCI_ARB ,PCI Internal Arbiter pin status, pin CFG_PCI_ARB" "Ext host,IXP" bitfld.long 0x00 28. " CFG_RST_DIR ,PCI central function pin" "Ext PCI,IXP" textline " " bitfld.long 0x00 27. " DMA_IDLE ,DMA Idle" "no,yes" bitfld.long 0x00 26. " PIN_IN_RST ,PCI Bus in Reset" "no,yes" bitfld.long 0x00 25. " TABT_DISABLE ,Target Abort on PCI Bus disable" "no,yes" bitfld.long 0x00 24. " XS_INT ,XScale Interrupt, perform soft interrupt to PCI" "no,yes" textline " " bitfld.long 0x00 22. " BE_DEO ,Big Endian Data Enable Out" "no,yes" bitfld.long 0x00 21. " BE_DEI ,Big Endian Data Enable IN" "no,yes" bitfld.long 0x00 20. " BE_BEO ,Big Endian Byte Enable Enable Out" "no,yes" bitfld.long 0x00 19. " BE_BEI ,Big Endian Byte Enable Enable IN" "no,yes" textline " " bitfld.long 0x00 18. " ATWE ,Atomic Write Enable" "no,yes" bitfld.long 0x00 17. " IEE ,I/O cycles big endian data swap enable" "dis,ena" textline " " bitfld.long 0x00 16. " DTE ,Discard Timer expired" "no,yes" bitfld.long 0x00 15. " TRB ,TGT_REG_BE, A target access of Registers detected an address byte enable error" "no,yes" bitfld.long 0x00 14. " TWR ,TGT_WR_PAR, Target write with bad data" "no,yes" bitfld.long 0x00 13. " TAE ,TGT_ADR_ERR, Detected address parity error" "no,yes" bitfld.long 0x00 12. " TDE ,TGT_DRAM_ERR, Detected parity error on data from the DRAM" "no,yes" bitfld.long 0x00 11. " TSE ,TGT_SRAM_ERR, Detected parity error on data from the SRAM" "no,yes" textline " " bitfld.long 0x00 10. " DDE ,DMA_DRAM_ERR, Detected parity error on data from the DRAM during data transfer from DRAM" "no,yes" bitfld.long 0x00 9. " DSE ,DMA_SRAM_ERR, Detected parity error on data from the SRAM during descriptor fetch" "no,yes" bitfld.long 0x00 8. " DCT ,Detected Command Target Interface Error" "no,yes" bitfld.long 0x00 7. " DPE ,Detected PCI write Parity Error" "no,yes" bitfld.long 0x00 6. " RTA ,Receive target abort" "no,yes" bitfld.long 0x00 5. " RMA ,Receive master abort" "no,yes" textline " " bitfld.long 0x00 4. " DPED ,MST_RD_PAR, Data parity error detected when PCI unit is initiating a PCI read" "no,yes" bitfld.long 0x00 3. " RS ,Receive SERR" "no,yes" bitfld.long 0x00 2. " PCII ,PCI Interrupt to XScale" "no,yes" bitfld.long 0x00 1. " AS ,Assert SERR" "no,yes" bitfld.long 0x00 0. " CA ,Clock Active" "no,yes" group ASD:1:(0xdf000000+0x140)++0x03 line.long 0x00 "PCI_ADDR_EXT,PCI Address Extension" hexmask.long 0x00 16.--31. 0x00010000 "PIO_ADD ,PCI IO Space upper Address Field" hexmask.long 0x00 13.--15. 0x20000000 " PMSA ,PCI Memory Space Address Field" group ASD:1:(0xdf000000+0x148)++0x03 line.long 0x00 "ME_PUSH_STATUS,DMA completion signal to wakeup the Microengine that started the DMA" bitfld.long 0x00 31. "DMA3M ,DMA Channel 3" "no,yes" bitfld.long 0x00 30. " DMA2M ,DMA Channel 2" "no,yes" bitfld.long 0x00 29. " DMA1M ,DMA Channel 1" "no,yes" group ASD:1:(0xdf000000+0x14c)++0x03 line.long 0x00 "ME_PUSH_ENABLE,Microengine Auto-Push Source channel Enable" bitfld.long 0x00 31. "DMA3 ,DMA Channel 3" "dis,ena" bitfld.long 0x00 30. " DMA2 ,DMA Channel 2" "dis,ena" bitfld.long 0x00 29. " DMA1 ,DMA Channel 1" "dis,ena" group ASD:1:(0xdf000000+0x150)++0x03 line.long 0x00 "XSCALE_ERR-STATUS,Xscale Error Status" bitfld.long 0x00 31. "DPE ,Detected PCI write Parity Error" "no,yes" bitfld.long 0x00 30. " RTA ,Receive target abort" "no,yes" bitfld.long 0x00 29. " RMA ,Receive master abort" "no,yes" bitfld.long 0x00 28. " DPED ,MST_RD_PAR" "no,yes" bitfld.long 0x00 27. " DTE ,Discard timer expired" "no,yes" textline " " bitfld.long 0x00 26. " RSERR ,Receive SERR" "no,yes" bitfld.long 0x00 25. " TRB ,TGR_REG_BE, A Slave access of Registers detected a byte anbale error" "no,yes" bitfld.long 0x00 24. " TWP ,TGT_WR_PAR, Target write with bad data" "no,yes" bitfld.long 0x00 23. " TAE ,TGT_ADR_ERR, Detected address parity error" "no,yes" bitfld.long 0x00 22. " TDE ,TGT_DRAM_ERR, Detected parity error on data from the DRAM" "no,yes" textline " " bitfld.long 0x00 21. " TSE ,TGT_SRAM_ERR, Detected parity error on data from the SRAM" "no,yes" bitfld.long 0x00 20. " DDE ,DMA_DRAM_ERR, Detected parity error on data from the DRAM" "no,yes" bitfld.long 0x00 19. " DSE ,DMA_SRAM_ERR, Detected parity error on data from the SRAM" "no,yes" textline " " bitfld.long 0x00 10. " MEDIA_ERR ,Media error indicator. To clear, write 1 to the error bit in the MSF interrupt status register" "no,yes" bitfld.long 0x00 7. " SRAM1_ERR ,SRAM parity error has occurred in SRAM channel 1. To clear, write 1 to the error bit in the SRAM1 parity status register" "no,yes" bitfld.long 0x00 6. " SRAM0_ERR ,SRAM parity error has occurred in SRAM channel 0. To clear, write 1 to the error bit in the SRAM0 parity status register" "no,yes" textline " " bitfld.long 0x00 1. " DRAM0_ECC_MAJ ,Uncorrectable ECC error occurred in DRAM channel 0. To clear, write 1 to the error bit in the DRAM0 error status register" "no,yes" bitfld.long 0x00 0. " DRAM0_ECC_MIN ,Correctable ECC error occurred in DRAM channel 0. To clear, write 1 to the error bit in the DRAM0 error status register" "no,yes" group ASD:1:(0xdf000000+0x154)++0x03 line.long 0x00 "XSCALE_ERR_ENABLE,Xscale Error Interrupt Enable" bitfld.long 0x00 31. "DPEM ,Detected PCI write Parity Error" "dis,ena" bitfld.long 0x00 30. " RTAM ,Receive target abort" "dis,ena" bitfld.long 0x00 29. " RMAM ,Receive master abort" "dis,ena" bitfld.long 0x00 28. " DPEDM ,MST_RD_PAR" "dis,ena" bitfld.long 0x00 27. " DTEM ,Discard timer expired" "dis,ena" textline " " bitfld.long 0x00 26. " RSERRM ,Receive SERR" "dis,ena" bitfld.long 0x00 25. " TRBM ,TGR_REG_BE" "dis,ena" bitfld.long 0x00 24. " TWRM ,TGT_WR_PAR, Target write with bad data" "dis,ena" bitfld.long 0x00 23. " TAEM ,TGT_ADR_ERR, Detected address parity error" "dis,ena" bitfld.long 0x00 22. " TDEM ,TGT_DRAM_ERR, Detected parity error on data from the DRAM" "dis,ena" textline " " bitfld.long 0x00 21. " TSEM ,TGT_SRAM_ERR, Detected parity error on data from the SRAM" "dis,ena" bitfld.long 0x00 20. " DDEM ,DMA_DRAM_ERR, Detected parity error on data from the DRAM" "dis,ena" bitfld.long 0x00 19. " DSEM ,DMA_SRAM_ERR, Detected parity error on data from the SRAM" "dis,ena" textline " " bitfld.long 0x00 10. " MEDIA_ERRE ,Media error indicator interrupt redirect enable" "no,yes" bitfld.long 0x00 7. " SRAM1_ERRE ,Interrupt redirect enable for SRAM parity error occurred in SRAM channel 1" "no,yes" bitfld.long 0x00 6. " SRAM0_ERRE ,Interrupt redirect enable for SRAM parity error occurred in SRAM channel 0" "no,yes" textline " " bitfld.long 0x00 1. " DRAM0_ECC_MAJE ,Interrupt redirect enable for Uncorrectable ECC error occurred in DRAM channel 0" "no,yes" bitfld.long 0x00 0. " DRAM0_ECC_MINE ,Interrupt redirect enable for Correctable ECC error occurred in DRAM channel 0" "no,yes" group ASD:1:(0xdf000000+0x158)++0x03 line.long 0x00 "XSCALE_INT_STATUS,Xscale Interrupt Status Register" bitfld.long 0x00 31. "SB ,Start BIST" "no,yes" bitfld.long 0x00 30. " DMA3NB ,DMA Channel 3 not busy" "busy,not busy" bitfld.long 0x00 29. " DMA2NB ,DMA Channel 2 not busy" "busy,not busy" bitfld.long 0x00 28. " DMA1NB ,DMA Channel 1 not busy" "busy,not busy" textline " " bitfld.long 0x00 27. " PIL_A ,State of PCI interrupt pin PCI_INTA_L" "no,yes" bitfld.long 0x00 26. " PIL_B ,State of PCI interrupt pin PCI_INTB_L" "no,yes" bitfld.long 0x00 25. " PCII ,Soft Interrupt from PCI to XScale" "no,yes" bitfld.long 0x00 22. " PMU_INT ,PMU interrupt. To clear, write 0 to the PMU status register" "no,yes" textline " " bitfld.long 0x00 3. " ME0_3 ,Indicates that the associated interrupt source is both active and enabled." "no,yes" bitfld.long 0x00 2. " ME0_2 ,Indicates that the associated interrupt source is both active and enabled." "no,yes" bitfld.long 0x00 1. " ME0_1 ,Indicates that the associated interrupt source is both active and enabled." "no,yes" bitfld.long 0x00 0. " ME0_0 ,Indicates that the associated interrupt source is both active and enabled." "no,yes" group ASD:1:(0xdf000000+0x15C)++0x03 line.long 0x00 "XSCALE_INT_ENABLE,Xscale Interrupt Enable Register" bitfld.long 0x00 31. "SBM ,Start BIST" "dis,ena" bitfld.long 0x00 30. " DMA3NBM ,DMA Channel 3 not busy" "dis,ena" bitfld.long 0x00 29. " DMA2NBM ,DMA Channel 2 not busy" "dis,ena" bitfld.long 0x00 28. " DMA1NBM ,DMA Channel 1 not busy" "dis,ena" textline " " bitfld.long 0x00 27. " PILM_A ,Interrupt enable for PCI_INTA_L" "dis,ena" bitfld.long 0x00 26. " PILM_B ,Interrupt enable for PCI_INTB_L" "dis,ena" bitfld.long 0x00 25. " PCIIM ,Soft Interrupt from PCI to XScale" "dis,ena" bitfld.long 0x00 22. " PMU_INT ,PMU interrupt enable" "dis,ena" textline " " bitfld.long 0x00 3. " ME0_3 ,ME0_3 interrupt enable" "dis,ena" bitfld.long 0x00 2. " ME0_2 ,ME0_2 interrupt enable" "dis,ena" bitfld.long 0x00 1. " ME0_1 ,ME0_1 interrupt enable" "dis,ena" bitfld.long 0x00 0. " ME0_0 ,ME0_0 interrupt enable" "dis,ena" group ASD:1:(0xdf000000+0x160)++0x03 line.long 0x00 "PCI_CPP_DR_ADDR,PCI_CPP DRAM Address" bitfld.long 0x00 2.--03. "PCI_CSR_DRAM_CSR_ADDR ,The value placed on these two bits is transferred to bits[31:30] on the CPP command bus when PCI issues a DRAM CSR read or write command" "00,01,10,11" bitfld.long 0x00 0.--01. " PCI_CSR_DRAM_ADDR ,The value placed on these two bits is transferred to bits[31:30] on the CPP command bus when PCI issues a DRAM read or write command" "00,01,10,11" width.8 tree.end ;end include file xscale/ixp23xx-pcictrl.ph TREE.END ; -------------------------------------------------------------------------------- ; *** no decription available yet *** ; -------------------------------------------------------------------------------- ;%include xscale/ixp23xx-npe.ph ASD: 0xc8006000 0 ;%include xscale/ixp23xx-npe.ph ASD: 0xc8008000 1