; -------------------------------------------------------------------------------- ; @Title: Cortex-M23 On-Chip Peripherals ; @Props: Released ; @Author: SIK, KRZ ; @Changelog: 2017-07-18 SIK ; 2022-11-16 KRZ ; @Manufacturer: ARM - ARM Ltd. ; @Doc: cortex_m23_r1p0_technical_reference_manual_DDI0550C_en.pdf ; DDI0553A_e_armv8m_arm.pdf ; @Core: Cortex-M23 ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: percortexm23.per 15440 2022-11-16 16:08:48Z kwisniewski $ config 16. 8. ASSERT VERSION.BUILD.BASE()>=80109. sif PER.isNOTIFICATION() base AVM:0x00000000 wgroup AVM:0x00++0 textline " Peripheral File Notification - " button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()" textline " ---------------------------------------------------------------" textline " The peripheral file for this SoC cannot be displayed. " textline " Possible reasons are: " textline " - it is missing in the local installation or under development " textline " - it is confidential " textline " " textline " As fallback only the core registers are shown. " textline " Please check www.lauterbach.com/scripts.html " textline " or contact support@lauterbach.com . " textline " " endif AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 29. " EXTEXCLALL ,LDREX and STREX instructions use the Global Exclusive Monitor" "Only on Shared regions,Always" newline group.long 0x10++0x03 line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" newline bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" group.long 0x14++0x07 line.long 0x00 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x04 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " CURRENT ,Current counter value" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/o Main extension,Reserved,Reserved,ARMv8-M w/ Main extension" newline hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xD04++0x13 line.long 0x00 "ICSR,Interrupt Control and State Register" setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET ,On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" newline bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure" rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" newline hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled" newline bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only" newline bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" newline bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" newline bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" newline bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" group.long 0xD1C++0x0B line.long 0x00 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall" line.long 0x04 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x04 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick" hexmask.long.byte 0x04 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV" hexmask.long.byte 0x04 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor" line.long 0x08 "SHCSR,System Handler Control and State Register" bitfld.long 0x08 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending" bitfld.long 0x08 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending" bitfld.long 0x08 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled" newline bitfld.long 0x08 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled" bitfld.long 0x08 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled" bitfld.long 0x08 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled" newline bitfld.long 0x08 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending" bitfld.long 0x08 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending" bitfld.long 0x08 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending" newline bitfld.long 0x08 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending" bitfld.long 0x08 11. " SYSTICKACT ,SysTick exception status" "Not active,Active" bitfld.long 0x08 10. " PENDSVACT ,PendSV exception status" "Not active,Active" newline bitfld.long 0x08 8. " MONITORACT ,Monitor exception status" "Not active,Active" bitfld.long 0x08 7. " SVCALLACT ,SVCall exception status" "Not active,Active" bitfld.long 0x08 5. " NMIACT ,NMI exception status" "Not active,Active" newline bitfld.long 0x08 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active" bitfld.long 0x08 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active" bitfld.long 0x08 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active" newline bitfld.long 0x08 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active" bitfld.long 0x08 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active" tree "Memory System" width 10. rgroup.long 0xD78++0x0B line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest" bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..." textline " " bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..." line.long 0x04 "CTR,Cache Type Register" bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,?..." bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,?..." textline " " bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CCSIDR,Cache Size ID Register" bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" textline " " bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512" group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU" wgroup.long 0xF58++0x23 line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU" line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC" line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way" hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU" line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC" line.long 0x14 "DCCSW,D-Cache Clean by Set-Way" hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC" line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way" hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x20 "BPIALL,Branch Predictor Invalidate All" tree.end width 11. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "DPIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DPIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DPIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DPIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DCIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DCIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DCIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0C "DCIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,,,,4,,,,8,,,,,,,,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Not permitted,Permitted" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" newline hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" endif tree.end newline group.long 0xDC0++0x07 line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Memory attribute encoding for MPU regions with an AttrIndex of 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Memory attribute encoding for MPU regions with an AttrIndex of 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Memory attribute encoding for MPU regions with an AttrIndex of 1" hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Memory attribute encoding for MPU regions with an AttrIndex of 0" line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR7 ,Memory attribute encoding for MPU regions with an AttrIndex of 7" hexmask.long.byte 0x04 16.--23. 1. " ATTR6 ,Memory attribute encoding for MPU regions with an AttrIndex of 6" hexmask.long.byte 0x04 8.--15. 1. " ATTR5 ,Memory attribute encoding for MPU regions with an AttrIndex of 5" hexmask.long.byte 0x04 0.--7. 1. " ATTR4 ,Memory attribute encoding for MPU regions with an AttrIndex of 4" width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Security Attribution Unit (SAU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. group.long 0xDD0++0x03 line.long 0x00 "SAU_CTRL,SAU Control Register" bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure" bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled" rgroup.long 0xDD4++0x03 line.long 0x00 "SAU_TYPE,SAU Type Register" bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,,,,4,,,,8,?..." group.long 0xDD8++0x03 line.long 0x00 "SAU_RNR,SAU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR" tree.close "SAU regions" if ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0) if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x0 group.long 0xDDC++0x03 "Region 0" saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 0 (not implemented)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x1 group.long 0xDDC++0x03 "Region 1" saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 1 (not implemented)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x2 group.long 0xDDC++0x03 "Region 2" saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 2 (not implemented)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x3 group.long 0xDDC++0x03 "Region 3" saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 3 (not implemented)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x4 group.long 0xDDC++0x03 "Region 4" saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 4 (not implemented)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x5 group.long 0xDDC++0x03 "Region 5" saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 5 (not implemented)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x6 group.long 0xDDC++0x03 "Region 6" saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 6 (not implemented)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x7 group.long 0xDDC++0x03 "Region 7" saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 7 (not implemented)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif else hgroup.long 0xDDC++0x03 "Region 0 (not accessible)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hgroup.long 0xDDC++0x03 "Region 1 (not accessible)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hgroup.long 0xDDC++0x03 "Region 2 (not accessible)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hgroup.long 0xDDC++0x03 "Region 3 (not accessible)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hgroup.long 0xDDC++0x03 "Region 4 (not accessible)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hgroup.long 0xDDC++0x03 "Region 5 (not accessible)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hgroup.long 0xDDC++0x03 "Region 6 (not accessible)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hgroup.long 0xDDC++0x03 "Region 7 (not accessible)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" hgroup.long 0xDDC++0x03 "Region 8 (not accessible)" saveout 0xDD8 %l 0x8 hide.long 0x00 "SAU_RBAR8,SAU Region Base Address Register 8" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x8 hide.long 0x00 "SAU_RLAR8,SAU Region Limit Address Register 8" hgroup.long 0xDDC++0x03 "Region 9 (not accessible)" saveout 0xDD8 %l 0x9 hide.long 0x00 "SAU_RBAR9,SAU Region Base Address Register 9" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x9 hide.long 0x00 "SAU_RLAR9,SAU Region Limit Address Register 9" hgroup.long 0xDDC++0x03 "Region 10 (not accessible)" saveout 0xDD8 %l 0xA hide.long 0x00 "SAU_RBAR10,SAU Region Base Address Register 10" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0xA hide.long 0x00 "SAU_RLAR10,SAU Region Limit Address Register 10" hgroup.long 0xDDC++0x03 "Region 11 (not accessible)" saveout 0xDD8 %l 0xB hide.long 0x00 "SAU_RBAR11,SAU Region Base Address Register 11" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0xB hide.long 0x00 "SAU_RLAR11,SAU Region Limit Address Register 11" hgroup.long 0xDDC++0x03 "Region 12 (not accessible)" saveout 0xDD8 %l 0xC hide.long 0x00 "SAU_RBAR12,SAU Region Base Address Register 12" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0xC hide.long 0x00 "SAU_RLAR12,SAU Region Limit Address Register 12" hgroup.long 0xDDC++0x03 "Region 13 (not accessible)" saveout 0xDD8 %l 0xD hide.long 0x00 "SAU_RBAR13,SAU Region Base Address Register 13" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0xD hide.long 0x00 "SAU_RLAR13,SAU Region Limit Address Register 13" hgroup.long 0xDDC++0x03 "Region 14 (not accessible)" saveout 0xDD8 %l 0xE hide.long 0x00 "SAU_RBAR14,SAU Region Base Address Register 14" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0xE hide.long 0x00 "SAU_RLAR14,SAU Region Limit Address Register 14" hgroup.long 0xDDC++0x03 "Region 15 (not accessible)" saveout 0xDD8 %l 0xF hide.long 0x00 "SAU_RBAR15,SAU Region Base Address Register 15" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0xF hide.long 0x00 "SAU_RLAR15,SAU Region Limit Address Register 15" endif tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. group.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-239,?..." tree "Interrupt Enable Registers" width 24. group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x104++0x03 line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x104++0x03 hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x108++0x03 line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x108++0x03 hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x10C++0x03 line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x10C++0x03 hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x110++0x03 line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x110++0x03 hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x114++0x03 line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x114++0x03 hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x118++0x03 line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x118++0x03 hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x11C++0x03 line.long 0x00 "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x11C++0x03 hide.long 0x00 "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 24. group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x204++0x03 line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x204++0x03 hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x208++0x03 line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x208++0x03 hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x20C++0x03 line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x20C++0x03 hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x210++0x03 line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x210++0x03 hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x214++0x03 line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x214++0x03 hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x218++0x03 line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x218++0x03 hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x21C++0x03 line.long 0x00 "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x21C++0x03 hide.long 0x00 "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 11. rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE0,Active Bit Register 0" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) rgroup.long 0x304++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x304++0x03 hide.long 0x00 "ACTIVE1,Active Bit Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) rgroup.long 0x308++0x03 line.long 0x00 "ACTIVE2,Active Bit Register 2" bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x308++0x03 hide.long 0x00 "ACTIVE2,Active Bit Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) rgroup.long 0x30C++0x03 line.long 0x00 "ACTIVE3,Active Bit Register 3" bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x30C++0x03 hide.long 0x00 "ACTIVE3,Active Bit Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) rgroup.long 0x310++0x03 line.long 0x00 "ACTIVE4,Active Bit Register 4" bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x310++0x03 hide.long 0x00 "ACTIVE4,Active Bit Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) rgroup.long 0x314++0x03 line.long 0x00 "ACTIVE5,Active Bit Register 5" bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x314++0x03 hide.long 0x00 "ACTIVE5,Active Bit Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) rgroup.long 0x318++0x03 line.long 0x00 "ACTIVE6,Active Bit Register 6" bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x318++0x03 hide.long 0x00 "ACTIVE6,Active Bit Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) rgroup.long 0x31C++0x03 line.long 0x00 "ACTIVE7,Active Bit Register 7" bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x31C++0x03 hide.long 0x00 "ACTIVE7,Active Bit Register 7" endif tree.end tree "Interrupt Target Non-Secure Registers" width 13. group.long 0x380++0x03 line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0" bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x384++0x03 line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure" else hgroup.long 0x384++0x03 hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x388++0x03 line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure" else hgroup.long 0x388++0x03 hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x38C++0x03 line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure" else hgroup.long 0x38C++0x03 hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x390++0x03 line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure" else hgroup.long 0x390++0x03 hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x394++0x03 line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure" else hgroup.long 0x394++0x03 hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x398++0x03 line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure" else hgroup.long 0x398++0x03 hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x39C++0x03 line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure" bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure" textline " " bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure" bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure" textline " " bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure" bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure" textline " " bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure" bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure" textline " " bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure" bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure" textline " " bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure" else hgroup.long 0x39C++0x03 hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" endif tree.end tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x420++0x1F line.long 0x0 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x4 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x8 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0xC "IPR11,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x10 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x14 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x18 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x1C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" else hgroup.long 0x420++0x1F hide.long 0x0 "IPR8,Interrupt Priority Register" hide.long 0x4 "IPR9,Interrupt Priority Register" hide.long 0x8 "IPR10,Interrupt Priority Register" hide.long 0xC "IPR11,Interrupt Priority Register" hide.long 0x10 "IPR12,Interrupt Priority Register" hide.long 0x14 "IPR13,Interrupt Priority Register" hide.long 0x18 "IPR14,Interrupt Priority Register" hide.long 0x1C "IPR15,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x440++0x1F line.long 0x0 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x4 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x8 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0xC "IPR19,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x10 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x14 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x18 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x1C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" else hgroup.long 0x440++0x1F hide.long 0x0 "IPR16,Interrupt Priority Register" hide.long 0x4 "IPR17,Interrupt Priority Register" hide.long 0x8 "IPR18,Interrupt Priority Register" hide.long 0xC "IPR19,Interrupt Priority Register" hide.long 0x10 "IPR20,Interrupt Priority Register" hide.long 0x14 "IPR21,Interrupt Priority Register" hide.long 0x18 "IPR22,Interrupt Priority Register" hide.long 0x1C "IPR23,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x460++0x1F line.long 0x0 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x4 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x8 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0xC "IPR27,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x10 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x14 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x18 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x1C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" else hgroup.long 0x460++0x1F hide.long 0x0 "IPR24,Interrupt Priority Register" hide.long 0x4 "IPR25,Interrupt Priority Register" hide.long 0x8 "IPR26,Interrupt Priority Register" hide.long 0xC "IPR27,Interrupt Priority Register" hide.long 0x10 "IPR28,Interrupt Priority Register" hide.long 0x14 "IPR29,Interrupt Priority Register" hide.long 0x18 "IPR30,Interrupt Priority Register" hide.long 0x1C "IPR31,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x480++0x1F line.long 0x0 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x4 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x8 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0xC "IPR35,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x10 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x14 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x18 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x1C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" else hgroup.long 0x480++0x1F hide.long 0x0 "IPR32,Interrupt Priority Register" hide.long 0x4 "IPR33,Interrupt Priority Register" hide.long 0x8 "IPR34,Interrupt Priority Register" hide.long 0xC "IPR35,Interrupt Priority Register" hide.long 0x10 "IPR36,Interrupt Priority Register" hide.long 0x14 "IPR37,Interrupt Priority Register" hide.long 0x18 "IPR38,Interrupt Priority Register" hide.long 0x1C "IPR39,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x4A0++0x1F line.long 0x0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0x4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0x8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0x10 "IPR44,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0x14 "IPR45,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0x18 "IPR46,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0x1C "IPR47,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" else hgroup.long 0x4A0++0x1F hide.long 0x0 "IPR40,Interrupt Priority Register" hide.long 0x4 "IPR41,Interrupt Priority Register" hide.long 0x8 "IPR42,Interrupt Priority Register" hide.long 0xC "IPR43,Interrupt Priority Register" hide.long 0x10 "IPR44,Interrupt Priority Register" hide.long 0x14 "IPR45,Interrupt Priority Register" hide.long 0x18 "IPR46,Interrupt Priority Register" hide.long 0x1C "IPR47,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x4C0++0x1F line.long 0x0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0x4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0x8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0x10 "IPR52,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0x14 "IPR53,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0x18 "IPR54,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0x1C "IPR55,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" else hgroup.long 0x4C0++0x1F hide.long 0x0 "IPR48,Interrupt Priority Register" hide.long 0x4 "IPR49,Interrupt Priority Register" hide.long 0x8 "IPR50,Interrupt Priority Register" hide.long 0xC "IPR51,Interrupt Priority Register" hide.long 0x10 "IPR52,Interrupt Priority Register" hide.long 0x14 "IPR53,Interrupt Priority Register" hide.long 0x18 "IPR54,Interrupt Priority Register" hide.long 0x1C "IPR55,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x4E0++0x0F line.long 0x0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0x4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0x8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x4E0++0x0F hide.long 0x0 "IPR56,Interrupt Priority Register" hide.long 0x4 "IPR57,Interrupt Priority Register" hide.long 0x8 "IPR58,Interrupt Priority Register" hide.long 0xC "IPR59,Interrupt Priority Register" endif tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" textline " " eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" rbitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" rbitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif newline width 13. group.long 0xE04++0x07 line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register" bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN" bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN" textline " " line.long 0x04 "DSCSR,Debug Security Control and Status Register" bitfld.long 0x04 17. " CDSKEY ,CDS write-enable key" "Not ignored,Ignored" textline " " bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure" bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure" bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled" rgroup.long 0xFB8++0x03 line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1" bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented" textline " " bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1" bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 12. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" rbitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" newline if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" newline hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" newline hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" newline hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" newline hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" newline hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" newline hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" newline hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" newline hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif tree "CoreSight Identification Registers" width 12. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "FP_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "FP_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "FP_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "FP_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "FP_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "FP_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0C "FP_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0B else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 16. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" bitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" textline " " bitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count register" line.long 0x08 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,Base instruction overhead counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store overhead counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" endif group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" endif group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" endif group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)==0x1) group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0x4) group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0xC) group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08)&0xF)<0xF) group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" endif group.long (0x60+0x08)++0x03 line.long 0x00 "DWT_FUNCTION4,DWT Function Register 4" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)==0x1) group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0x4) group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0xC) group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08)&0xF)<0xF) group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" endif group.long (0x70+0x08)++0x03 line.long 0x00 "DWT_FUNCTION5,DWT Function Register 5" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)==0x1) group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0x4) group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0xC) group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08)&0xF)<0xF) group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" endif group.long (0x80+0x08)++0x03 line.long 0x00 "DWT_FUNCTION6,DWT Function Register 6" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)==0x1) group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0x4) group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0xC) group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08)&0xF)<0xF) group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" endif group.long (0x90+0x08)++0x03 line.long 0x00 "DWT_FUNCTION7,DWT Function Register 7" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)==0x1) group.long 0xA0++0x03 line.long 0x00 "DWT_COMP8,DWT Comparator Register 8" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0x4) group.long 0xA0++0x03 line.long 0x00 "DWT_COMP8,DWT Comparator Register 8" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0xC) group.long 0xA0++0x03 line.long 0x00 "DWT_COMP8,DWT Comparator Register 8" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xA0+0x08)&0xF)<0xF) group.long 0xA0++0x03 line.long 0x00 "DWT_COMP8,DWT Comparator Register 8" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0xA0++0x03 line.long 0x00 "DWT_COMP8,DWT Comparator Register 8" endif group.long (0xA0+0x08)++0x03 line.long 0x00 "DWT_FUNCTION8,DWT Function Register 8" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)==0x1) group.long 0xB0++0x03 line.long 0x00 "DWT_COMP9,DWT Comparator Register 9" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0x4) group.long 0xB0++0x03 line.long 0x00 "DWT_COMP9,DWT Comparator Register 9" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0xC) group.long 0xB0++0x03 line.long 0x00 "DWT_COMP9,DWT Comparator Register 9" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xB0+0x08)&0xF)<0xF) group.long 0xB0++0x03 line.long 0x00 "DWT_COMP9,DWT Comparator Register 9" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0xB0++0x03 line.long 0x00 "DWT_COMP9,DWT Comparator Register 9" endif group.long (0xB0+0x08)++0x03 line.long 0x00 "DWT_FUNCTION9,DWT Function Register 9" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)==0x1) group.long 0xC0++0x03 line.long 0x00 "DWT_COMP10,DWT Comparator Register 10" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0x4) group.long 0xC0++0x03 line.long 0x00 "DWT_COMP10,DWT Comparator Register 10" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0xC) group.long 0xC0++0x03 line.long 0x00 "DWT_COMP10,DWT Comparator Register 10" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xC0+0x08)&0xF)<0xF) group.long 0xC0++0x03 line.long 0x00 "DWT_COMP10,DWT Comparator Register 10" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0xC0++0x03 line.long 0x00 "DWT_COMP10,DWT Comparator Register 10" endif group.long (0xC0+0x08)++0x03 line.long 0x00 "DWT_FUNCTION10,DWT Function Register 10" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)==0x1) group.long 0xD0++0x03 line.long 0x00 "DWT_COMP11,DWT Comparator Register 11" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0x4) group.long 0xD0++0x03 line.long 0x00 "DWT_COMP11,DWT Comparator Register 11" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0xC) group.long 0xD0++0x03 line.long 0x00 "DWT_COMP11,DWT Comparator Register 11" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xD0+0x08)&0xF)<0xF) group.long 0xD0++0x03 line.long 0x00 "DWT_COMP11,DWT Comparator Register 11" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0xD0++0x03 line.long 0x00 "DWT_COMP11,DWT Comparator Register 11" endif group.long (0xD0+0x08)++0x03 line.long 0x00 "DWT_FUNCTION11,DWT Function Register 11" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)==0x1) group.long 0xE0++0x03 line.long 0x00 "DWT_COMP12,DWT Comparator Register 12" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0x4) group.long 0xE0++0x03 line.long 0x00 "DWT_COMP12,DWT Comparator Register 12" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0xC) group.long 0xE0++0x03 line.long 0x00 "DWT_COMP12,DWT Comparator Register 12" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xE0+0x08)&0xF)<0xF) group.long 0xE0++0x03 line.long 0x00 "DWT_COMP12,DWT Comparator Register 12" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0xE0++0x03 line.long 0x00 "DWT_COMP12,DWT Comparator Register 12" endif group.long (0xE0+0x08)++0x03 line.long 0x00 "DWT_FUNCTION12,DWT Function Register 12" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)==0x1) group.long 0xF0++0x03 line.long 0x00 "DWT_COMP13,DWT Comparator Register 13" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0x4) group.long 0xF0++0x03 line.long 0x00 "DWT_COMP13,DWT Comparator Register 13" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0xC) group.long 0xF0++0x03 line.long 0x00 "DWT_COMP13,DWT Comparator Register 13" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xF0+0x08)&0xF)<0xF) group.long 0xF0++0x03 line.long 0x00 "DWT_COMP13,DWT Comparator Register 13" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0xF0++0x03 line.long 0x00 "DWT_COMP13,DWT Comparator Register 13" endif group.long (0xF0+0x08)++0x03 line.long 0x00 "DWT_FUNCTION13,DWT Function Register 13" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)==0x1) group.long 0x100++0x03 line.long 0x00 "DWT_COMP14,DWT Comparator Register 14" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0x4) group.long 0x100++0x03 line.long 0x00 "DWT_COMP14,DWT Comparator Register 14" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0xC) group.long 0x100++0x03 line.long 0x00 "DWT_COMP14,DWT Comparator Register 14" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x100+0x08)&0xF)<0xF) group.long 0x100++0x03 line.long 0x00 "DWT_COMP14,DWT Comparator Register 14" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x100++0x03 line.long 0x00 "DWT_COMP14,DWT Comparator Register 14" endif group.long (0x100+0x08)++0x03 line.long 0x00 "DWT_FUNCTION14,DWT Function Register 14" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)==0x1) group.long 0x110++0x03 line.long 0x00 "DWT_COMP15,DWT Comparator Register 15" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0x4) group.long 0x110++0x03 line.long 0x00 "DWT_COMP15,DWT Comparator Register 15" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0xC) group.long 0x110++0x03 line.long 0x00 "DWT_COMP15,DWT Comparator Register 15" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x110+0x08)&0xF)<0xF) group.long 0x110++0x03 line.long 0x00 "DWT_COMP15,DWT Comparator Register 15" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x110++0x03 line.long 0x00 "DWT_COMP15,DWT Comparator Register 15" endif group.long (0x110+0x08)++0x03 line.long 0x00 "DWT_FUNCTION15,DWT Function Register 15" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." tree "CoreSight Identification Registers" width 13. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "DWT_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DWT_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DWT_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DWT_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DWT_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DWT_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DWT_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP newline