; --------------------------------------------------------------------------------
; @Title: VERSAL-ACAP Specific Menu
; @Props: Released
; @Author: TRJ, PID, KMB
; @Changelog: 2021-07-29 PID
; @Manufacturer: XILINX - XILINX
; @Core: Cortex-A72, Cortex-R5F, MicroBlaze
; @Chip: VERSAL-ACAP
; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menversalacap.men 17621 2024-03-12 13:49:26Z kwisniewski $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (CORENAME()=="CORTEXA72")
(
popup "[:chip]Core Registers (Cortex-A72)"
(
menuitem "[:chip]ID Registers[AArch64]"                               "per , ""Core Registers (Cortex-A72),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"           "per , ""Core Registers (Cortex-A72),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                     "per , ""Core Registers (Cortex-A72),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                  "per , ""Core Registers (Cortex-A72),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"            "per , ""Core Registers (Cortex-A72),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                 "per , ""Core Registers (Cortex-A72),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                     "per , ""Core Registers (Cortex-A72),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]" "per , ""Core Registers (Cortex-A72),AArch64,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                            "per , ""Core Registers (Cortex-A72),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                       "per , ""Core Registers (Cortex-A72),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Registers[AArch64]"                       "per , ""Core Registers (Cortex-A72),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                               "per , ""Core Registers (Cortex-A72),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"           "per , ""Core Registers (Cortex-A72),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                     "per , ""Core Registers (Cortex-A72),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                  "per , ""Core Registers (Cortex-A72),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"            "per , ""Core Registers (Cortex-A72),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                 "per , ""Core Registers (Cortex-A72),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                     "per , ""Core Registers (Cortex-A72),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]" "per , ""Core Registers (Cortex-A72),AArch32,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                            "per , ""Core Registers (Cortex-A72),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                       "per , ""Core Registers (Cortex-A72),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Registers[AArch32]"                       "per , ""Core Registers (Cortex-A72),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-500)"                      "per , ""Core Registers (Cortex-A72),Interrupt Controller (GIC-500)"""
)
)
else if (CORENAME()=="CORTEXR5F")
(
popup "[:chip]Core Registers (Cortex-R5F)"
(
menuitem "[:chip]ID Registers"                      "per , ""Core Registers (Cortex-R5F),ID Registers"""
menuitem "[:chip]System Control and Configuration"  "per , ""Core Registers (Cortex-R5F),System Control and Configuration"""
menuitem "[:chip]MPU Control and Configuration"     "per , ""Core Registers (Cortex-R5F),MPU Control and Configuration"""
menuitem "[:chip]Cache Control and Configuration"   "per , ""Core Registers (Cortex-R5F),Cache Control and Configuration"""
menuitem "[:chip]TCM Control and Configuration"     "per , ""Core Registers (Cortex-R5F),TCM Control and Configuration"""
menuitem "[:chip]System Performance Monitor"        "per , ""Core Registers (Cortex-R5F),System Performance Monitor"""
separator
menuitem "[:chip]Debug Registers"                   "per , ""Core Registers (Cortex-R5F),Debug Registers"""
menuitem "[:chip]Breakpoint Registers"              "per , ""Core Registers (Cortex-R5F),Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers"      "per , ""Core Registers (Cortex-R5F),Watchpoint Control Registers"""
)
popup "GIC_PL390"
(
menuitem "Distributor"                                                                    "per , ""GIC_PL390,Distributor"""
menuitem "CPU Interface"                                                                  "per , ""GIC_PL390,CPU Interface"""
)
)
else if ((CPU()=="VERSAL-ACAP-PPU")||(CPU()=="VERSAL-ACAP-PSM"))
(
popup "[:chip]Core Registers (MicroBlaze)"
(
menuitem "[:chip]Microblaze Core Configuration"                                     "per , ""Core Registers (MicroBlaze),Microblaze Core Configuration"""
menuitem "[:chip]MDM UART Configuration"                                            "per , ""Core Registers (MicroBlaze),MDM UART Configuration"""
menuitem "[:chip]XMTC Configuration"                                                "per , ""Core Registers (MicroBlaze),XMTC Configuration"""
)
)
separator
popup "CANFD;CAN FD CONTROLER"
(
menuitem "CANFD0"                                                                       "per , ""CANFD (CAN FD CONTROLER),CANFD0"""
menuitem "CANFD1"                                                                       "per , ""CANFD (CAN FD CONTROLER),CANFD1"""
)
popup "CFRAME;CFRAME Configuration"
(
menuitem "CFRAME0"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME0"""
menuitem "CFRAME1"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME1"""
menuitem "CFRAME2"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME2"""
menuitem "CFRAME3"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME3"""
menuitem "CFRAME4"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME4"""
menuitem "CFRAME5"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME5"""
menuitem "CFRAME6"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME6"""
menuitem "CFRAME7"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME7"""
menuitem "CFRAME8"                                                                      "per , ""CFRAME (CFRAME Configuration),CFRAME8"""
menuitem "CFU_CF_BCAST_CSR"                                                             "per , ""CFRAME (CFRAME Configuration),CFU_CF_BCAST_CSR"""
)
menuitem "CFU_CSR;CFU Configuration Unit"                                                   "per , ""CFU_CSR (CFU Configuration Unit)"""
menuitem "CRF;FPD Clock and Reset Controllers"                                              "per , ""CRF (FPD Clock and Reset Controllers)"""
menuitem "CRL;LPD Clock and Reset Controllers"                                              "per , ""CRL (LPD Clock and Reset Controllers)"""
menuitem "CRP;PMC Clock and Reset Controllers"                                              "per , ""CRP (PMC Clock and Reset Controllers)"""
menuitem "FPD_CCI_CORE;FPD CCI500 Core"                                                     "per , ""FPD_CCI_CORE (FPD CCI500 Core)"""
menuitem "FPD_CCI_CSR;FPD CCI Wrapper"                                                      "per , ""FPD_CCI_CSR (FPD CCI Wrapper)"""
menuitem "FPD_INT_CSR;FPD Interconnect Control and Status"                                  "per , ""FPD_INT_CSR (FPD Interconnect Control and Status)"""
menuitem "FPD_SLCR;FPD System Control Registers"                                            "per , ""FPD_SLCR (FPD System Control Registers)"""
menuitem "FPD_SLCR_SECURE;FPD System Control Secure Registers"                              "per , ""FPD_SLCR_SECURE (FPD System Control Secure Registers)"""
menuitem "FPD_SMMU_CSR;FPD System Memory Management Unit"                                   "per , ""FPD_SMMU_CSR (FPD System Memory Management Unit)"""
menuitem "FPD_SMMU_SECURE;FPD System Memory Management TCU"                                 "per , ""FPD_SMMU_SECURE (FPD System Memory Management TCU)"""
popup "XMPU;Xilinx Memory Protection Unit"
(
menuitem "FPD_XMPU"                                                                     "per , ""XMPU (Xilinx Memory Protection Unit),FPD_XMPU"""
menuitem "OCM_XMPU"                                                                     "per , ""XMPU (Xilinx Memory Protection Unit),OCM_XMPU"""
menuitem "PMC_XMPU"                                                                     "per , ""XMPU (Xilinx Memory Protection Unit),PMC_XMPU"""
menuitem "XRAM_XMPU0"                                                                   "per , ""XMPU (Xilinx Memory Protection Unit),XRAM_XMPU0"""
menuitem "XRAM_XMPU1"                                                                   "per , ""XMPU (Xilinx Memory Protection Unit),XRAM_XMPU1"""
menuitem "XRAM_XMPU2"                                                                   "per , ""XMPU (Xilinx Memory Protection Unit),XRAM_XMPU2"""
menuitem "XRAM_XMPU3"                                                                   "per , ""XMPU (Xilinx Memory Protection Unit),XRAM_XMPU3"""
)
popup "GEM;Gigabit Ethernet MAC"
(
menuitem "GEM0"                                                                         "per , ""GEM (Gigabit Ethernet MAC),GEM0"""
menuitem "GEM1"                                                                         "per , ""GEM (Gigabit Ethernet MAC),GEM1"""
)
menuitem "HSDP_AURORA;High-Speed Debug Port Interface"                                      "per , ""HSDP_AURORA (High-Speed Debug Port Interface)"""
menuitem "HSDP_DMA;High-speed Debug Port DMA"                                               "per , ""HSDP_DMA (High-speed Debug Port DMA)"""
menuitem "IPI;PS Inter-Processor Interrupts"                                                "per , ""IPI (PS Inter-Processor Interrupts)"""
popup "PS_DMA;PS General Purpose DMA Channel"
(
menuitem "LPD_DMA_CH0"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH0"""
menuitem "LPD_DMA_CH1"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH1"""
menuitem "LPD_DMA_CH2"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH2"""
menuitem "LPD_DMA_CH3"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH3"""
menuitem "LPD_DMA_CH4"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH4"""
menuitem "LPD_DMA_CH5"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH5"""
menuitem "LPD_DMA_CH6"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH6"""
menuitem "LPD_DMA_CH7"                                                                  "per , ""PS_DMA (PS General Purpose DMA Channel),LPD_DMA_CH7"""
)
menuitem "PS GPIO;LPD GPIO I/O Peripheral Controller"                                       "per , ""PS GPIO (LPD GPIO I/O Peripheral Controller)"""
popup "LPD I2C;Inter Integrated Circuit"
(
menuitem "I2C 0"                                                                        "per , ""LPD I2C (Inter Integrated Circuit),I2C 0"""
menuitem "I2C 1"                                                                        "per , ""LPD I2C (Inter Integrated Circuit),I2C 1"""
)
menuitem "LPD INT CSR;LPD Interconnect Config"                                              "per , ""LPD INT CSR (LPD Interconnect Config)"""
menuitem "LPD IOP SLCR;LPD IOP System-level Control"                                        "per , ""LPD IOP SLCR (LPD IOP System-level Control)"""
menuitem "LPD IOP SLCR SECURE;LPD IOP System-level Control Secure"                          "per , ""LPD IOP SLCR SECURE (LPD IOP System-level Control Secure)"""
menuitem "LPD SLCR;LPD System-level Control"                                                "per , ""LPD SLCR (LPD System-level Control)"""
menuitem "LPD SLCR SECURE;LPD System-level Control Secure"                                  "per , ""LPD SLCR SECURE (LPD System-level Control Secure)"""
popup "XPPU;Xilinx Peripheral Protection Unit"
(
menuitem "LPD_XPPU"                                                                     "per , ""XPPU (Xilinx Peripheral Protection Unit),LPD_XPPU"""
menuitem "PMC_XPPU"                                                                     "per , ""XPPU (Xilinx Peripheral Protection Unit),PMC_XPPU"""
menuitem "PMC_XPPU_NPI"                                                                 "per , ""XPPU (Xilinx Peripheral Protection Unit),PMC_XPPU_NPI"""
)
menuitem "OCM_CSR;OnChip Memory Control and Status"                                         "per , ""OCM_CSR (OnChip Memory Control and Status)"""
menuitem "OSPI;Octal-SPI Flash Memory Controller"                                           "per , ""OSPI (Octal-SPI Flash Memory Controller)"""
popup "PMC Modules"
(
menuitem "PMC_ANLG;PMC Misc Analog Control"                                             "per , ""PMC Modules,PMC_ANLG (PMC Misc Analog Control)"""
menuitem "PMC_DMA0;PMC DMA Controller 0"                                                "per , ""PMC Modules,PMC_DMA0 (PMC DMA Controller 0)"""
menuitem "PMC_DMA1;PMC DMA Controller 1"                                                "per , ""PMC Modules,PMC_DMA1 (PMC DMA Controller 1)"""
menuitem "PMC_EFUSE_CACHE;PMC EFuse Cache Control"                                      "per , ""PMC Modules,PMC_EFUSE_CACHE (PMC EFuse Cache Control)"""
menuitem "PMC_EFUSE_CTRL;PMC EFuse Controller"                                          "per , ""PMC Modules,PMC_EFUSE_CTRL (PMC EFuse Controller)"""
menuitem "PMC_GLOBAL;PMC Global"                                                        "per , ""PMC Modules,PMC_GLOBAL (PMC Global)"""
menuitem "PMC_GPIO;PMC GPIO Controller"                                                 "per , ""PMC Modules,PMC_GPIO (PMC GPIO Controller)"""
menuitem "PMC_I2C;PMC I2C Controller"                                                   "per , ""PMC Modules,PMC_I2C (PMC I2C Controller)"""
menuitem "PMC_INT_CSR;PMC Interconnect"                                                 "per , ""PMC Modules,PMC_INT_CSR (PMC Interconnect)"""
menuitem "PMC_IOP_SLCR;PMC I/O Peripheral Control And Status Registers"                 "per , ""PMC Modules,PMC_IOP_SLCR (PMC I/O Peripheral Control And Status Registers)"""
menuitem "PMC_IOP_SLCR_SECURE;PMC I/O Peripheral Control And Status Secure Registers"   "per , ""PMC Modules,PMC_IOP_SLCR_SECURE (PMC I/O Peripheral Control And Status Secure Registers)"""
menuitem "PMC_LOCAL;PMC Local Registers"                                                "per , ""PMC Modules,PMC_LOCAL (PMC Local Registers)"""
menuitem "PMC_PUF;PMC PUF Configuration"                                                "per , ""PMC Modules,PMC_PUF (PMC PUF Configuration)"""
menuitem "PMC_RAM_CSR;PMC RAM Configuration"                                            "per , ""PMC Modules,PMC_RAM_CSR (PMC RAM Configuration)"""
menuitem "PMC_RTC;PMC Real-Time Clock"                                                  "per , ""PMC Modules,PMC_RTC (PMC Real-Time Clock)"""
menuitem "PMC_SBI;PMC Slave Boot Interface"                                             "per , ""PMC Modules,PMC_SBI (PMC Slave Boot Interface)"""
menuitem "PMC_TAP;PMC TAP Controller"                                                   "per , ""PMC Modules,PMC_TAP (PMC TAP Controller)"""
)
popup "MB_RAM_ECC_CTRL"
(
menuitem "PPU_DCACHE_CTRL"                                                              "per , ""MB_RAM_ECC_CTRL,PPU_DCACHE_CTRL"""
menuitem "PPU_ICACHE_CTRL"                                                              "per , ""MB_RAM_ECC_CTRL,PPU_ICACHE_CTRL"""
menuitem "PSM_DCACHE_CTRL"                                                              "per , ""MB_RAM_ECC_CTRL,PSM_DCACHE_CTRL"""
menuitem "PSM_ICACHE_CTRL"                                                              "per , ""MB_RAM_ECC_CTRL,PSM_ICACHE_CTRL"""
)
popup "MB_IOMODULE"
(
menuitem "PPU_IOMODULE"                                                                 "per , ""MB_IOMODULE,PPU_IOMODULE"""
menuitem "PSM_IOMODULE"                                                                 "per , ""MB_IOMODULE,PSM_IOMODULE"""
)
popup "MB_MDM;Debug Module"
(
menuitem "PPU_MDM"                                                                      "per , ""MB_MDM (Debug Module),PPU_MDM"""
menuitem "PSM_MDM"                                                                      "per , ""MB_MDM (Debug Module),PSM_MDM"""
)
popup "MB_TMR_INJECT;Error Injection"
(
menuitem "PPU_TMR_INJECT"                                                               "per , ""MB_TMR_INJECT (Error Injection),PPU_TMR_INJECT"""
menuitem "PSM_TMR_INJECT"                                                               "per , ""MB_TMR_INJECT (Error Injection),PSM_TMR_INJECT"""
)
popup "MB_TMR_MANAGER;Redundancy Manager"
(
menuitem "PPU_TMR_MGR"                                                                  "per , ""MB_TMR_MANAGER (Redundancy Manager),PPU_TMR_MGR"""
menuitem "PSM_TMR_MGR"                                                                  "per , ""MB_TMR_MANAGER (Redundancy Manager),PSM_TMR_MGR"""
)
popup "MB_TMR_TRACE;Trace Debug"
(
menuitem "PPU_TMR_TRACE"                                                                "per , ""MB_TMR_TRACE (Trace Debug),PPU_TMR_TRACE"""
menuitem "PSM_TMR_TRACE"                                                                "per , ""MB_TMR_TRACE (Trace Debug),PSM_TMR_TRACE"""
)
menuitem "PSM_GLOBAL;PSM Global Registers"                                                  "per , ""PSM_GLOBAL (PSM Global Registers)"""
menuitem "PSM_LOCAL;PSM Local Registers"                                                    "per , ""PSM_LOCAL (PSM Local Registers)"""
menuitem "QSPI;Quad-SPI Flash Memory Controller"                                            "per , ""QSPI (Quad-SPI Flash Memory Controller)"""
menuitem "RPU;Realtime Processing Unit"                                                     "per , ""RPU (Realtime Processing Unit)"""
popup "SCNTR;PS System Counter"
(
menuitem "IOU_SCNTR"                                                                    "per , ""SCNTR (PS System Counter),IOU_SCNTR"""
menuitem "IOU_SCNTRS"                                                                   "per , ""SCNTR (PS System Counter),IOU_SCNTRS"""
)
popup "SDIO;SD_eMMC Flash Interface Controller"
(
menuitem "SD_eMMC0"                                                                     "per , ""SDIO (SD_eMMC Flash Interface Controller),SD_eMMC0"""
menuitem "SD_eMMC1"                                                                     "per , ""SDIO (SD_eMMC Flash Interface Controller),SD_eMMC1"""
)
popup "SPI;SPI Controller"
(
menuitem "SPI 0"                                                                        "per , ""SPI (SPI Controller),SPI 0"""
menuitem "SPI 1"                                                                        "per , ""SPI (SPI Controller),SPI 1"""
)
popup "SWDT;System Watchdog Timer Registers"
(
menuitem "SWDT_FPD"                                                                     "per , ""SWDT (System Watchdog Timer Registers),SWDT_FPD"""
menuitem "SWDT_LPD"                                                                     "per , ""SWDT (System Watchdog Timer Registers),SWDT_LPD"""
)
menuitem "SYSMON_PMC;PMC System Monitor"                                                    "per , ""SYSMON_PMC (PMC System Monitor)"""
popup "PS_AXI;PL To PS AXI FIFO Interface Control"
(
menuitem "S_ACE_LITE_FPD"                                                               "per , ""PS_AXI (PL To PS AXI FIFO Interface Control),S_ACE_LITE_FPD"""
menuitem "S_AXI_FPD"                                                                    "per , ""PS_AXI (PL To PS AXI FIFO Interface Control),S_AXI_FPD"""
menuitem "S_AXI_LPD"                                                                    "per , ""PS_AXI (PL To PS AXI FIFO Interface Control),S_AXI_LPD"""
)
popup "TTC;Triple Timer Counter"
(
menuitem "TTC0"                                                                         "per , ""TTC (Triple Timer Counter),TTC0"""
menuitem "TTC1"                                                                         "per , ""TTC (Triple Timer Counter),TTC1"""
menuitem "TTC2"                                                                         "per , ""TTC (Triple Timer Counter),TTC2"""
menuitem "TTC3"                                                                         "per , ""TTC (Triple Timer Counter),TTC3"""
)
popup "UART;UART Controller"
(
menuitem "UART 0"                                                                       "per , ""UART (UART Controller),UART 0"""
menuitem "UART 1"                                                                       "per , ""UART (UART Controller),UART 1"""
)
popup "USB2.0;Universal Serial Bus 2.0"
(
menuitem "USB2_0_CSR;USB 2.0 Control And Status Registers"                              "per , ""USB2.0 (Universal Serial Bus 2.0),USB2_0_CSR (USB 2.0 Control And Status Registers)"""
menuitem "USB2_0_XHCI;USB 2.0 XHCI Registers"                                           "per , ""USB2.0 (Universal Serial Bus 2.0),USB2_0_XHCI (USB 2.0 XHCI Registers)"""
)
popup "XRAM;Accelerator RAM"
(
popup "XRAM_CTRL;XRAM Control And Status Registers"
(
menuitem "XRAM_CTRL0"                                                               "per , ""XRAM (Accelerator RAM),XRAM_CTRL (XRAM Control And Status Registers),XRAM_CTRL0"""
menuitem "XRAM_CTRL1"                                                               "per , ""XRAM (Accelerator RAM),XRAM_CTRL (XRAM Control And Status Registers),XRAM_CTRL1"""
menuitem "XRAM_CTRL2"                                                               "per , ""XRAM (Accelerator RAM),XRAM_CTRL (XRAM Control And Status Registers),XRAM_CTRL2"""
menuitem "XRAM_CTRL3"                                                               "per , ""XRAM (Accelerator RAM),XRAM_CTRL (XRAM Control And Status Registers),XRAM_CTRL3"""
)
menuitem "XRAM_SLCR"                                                                    "per , ""XRAM (Accelerator RAM),XRAM_SLCR"""
)
menuitem "AIE_PL"                                                                           "per , ""AIE_PL (AIE Programmable Logic Module)"""
menuitem "AIE_CORE;AIE Core Module"                                                         "per , ""AIE_CORE (AIE Core Module)"""
menuitem "AIE_MEMORY;AIE Memory Module"                                                     "per , ""AIE_MEMORY (AIE Memory Module)"""
menuitem "AIE_NOC"                                                                          "per , ""AIE_NOC (AI Engine NoC Module)"""
)
)