; -------------------------------------------------------------------------------- ; @Title: STM32x Specific Menu ; @Props: Released ; @Author: ADI, BIC, CNA, DAN, PAC, ZUB ; @Changelog: ; 2007-11-09 ; 2008-11-15 ; 2009-03-30 ; 2010-05-28 ; 2012-06-19 ; @Manufacturer: STM - ST Microelectronics N.V. ; @Core: Cortex-M3 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: menstm32f10x.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M3)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M3),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M3),Memory Protection Unit""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M3),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "Flash" "per , ""Flash Memory Interface""" menuitem "CRC" "per , ""CRC (Cyclic Redundancy Check)""" menuitem "PWR_CR" "per , ""PWR_CR (Power Control Register)""" menuitem "BKP" "per , ""BKP (Backup)""" menuitem "RCC" "per , ""RCC (Reset and Clock Control)""" popup "GPIO/AFIO" ( popup "GPIO" ( menuitem "GPIO A" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO A""" menuitem "GPIO B" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO B""" if (cpu()!="STM32F103T8"&&cpu()!="STM32F103T6"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103TB"&&cpu()!="STM32F101T8"&&cpu()!="STM32F101T6"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101TB") ( menuitem "GPIO C" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO C""" ) menuitem "GPIO D" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO D""" if (cpuis("STM32F103Z*")||cpuis("STM32F103V*")||cpuis("STM32F101Z*")||cpuis("STM32F101V*")||cpuis("STM32F100V*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105V*")||cpuis("STM32F107V*")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "GPIO E" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO E""" ) if (cpuis("STM32F103Z*")||cpuis("STM32F101Z*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "GPIO F" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO F""" menuitem "GPIO G" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),GPIO,GPIO G""" ) ) menuitem "AFIO" "per , ""GPIO/AFIO (General Purpose and Alternate Function I/O),AFIO,AFIO""" ) menuitem "EXTI" "per , ""EXTI (External Interrupt/Event Controller)""" if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( popup "DMA Controller" ( menuitem "DMA 1" "per , ""DMA Controller,DMA 1""" menuitem "DMA 2" "per , ""DMA Controller,DMA 2""" ) ) else ( menuitem "DMA" "per , ""DMA""" ) if (cpuis("STM32F103*")||cpu()=="STM32F103"||cpuis("STM32F105*")||cpuis("STM32F107*")) ( popup "ADC" ( menuitem "ADC 1" "per , ""ADC (Analog/Digital Converter),ADC 1""" menuitem "ADC 2" "per , ""ADC (Analog/Digital Converter),ADC 2""" if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103") ( menuitem "ADC 3" "per , ""ADC (Analog/Digital Converter),ADC 3""" ) ) ) else ( menuitem "ADC" "per , ""ADC (Analog/Digital Converter)""" ) if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpuis("STM32F100*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")) ( menuitem "DAC" "per , ""DAC (Digital-to-Analog Converter)""" ) if (cpuis("STM32F100*")||cpuis("STM32F103*")||cpu()=="STM32F103"||cpuis("STM32F105*")||cpuis("STM32F107*")) ( popup "Advanced Control Timer" ( menuitem "TIM 1" "per , ""Advanced Control Timer,TIM 1""" if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103") ( menuitem "TIM 8" "per , ""Advanced Control Timer,TIM 8""" ) ) ) popup "General Purpose Timer" ( menuitem "TIM 2" "per , ""General Purpose Timer,TIM 2""" menuitem "TIM 3" "per , ""General Purpose Timer,TIM 3""" if (cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F103C4"&&cpu()!="STM32F103R4"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103C6"&&cpu()!="STM32F103R6"&&cpu()!="STM32F103T6"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F101C4"&&cpu()!="STM32F101R4"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101C6"&&cpu()!="STM32F101R6"&&cpu()!="STM32F101T6"&&cpu()!="STM32F100C4"&&cpu()!="STM32F100C6"&&cpu()!="STM32F100R4"&&cpu()!="STM32F100R6") ( menuitem "TIM 4" "per , ""General Purpose Timer,TIM 4""" ) if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*G")||cpuis("STM32F101*F")||cpuis("STM32F101*E")||cpuis("STM32F101*D")||cpuis("STM32F101*C")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "TIM 5" "per , ""General Purpose Timer,TIM 5""" ) if (cpuis("STM32F101*G")||cpuis("STM32F101*F")||cpuis("STM32F103*F")||cpuis("STM32F103*G")) ( menuitem "TIM 9" "per , ""General Purpose Timer,TIM 9""" menuitem "TIM 10" "per , ""General Purpose Timer,TIM 10""" menuitem "TIM 11" "per , ""General Purpose Timer,TIM 11""" ) if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F101*G")||cpuis("STM32F101*F")||cpuis("STM32F101*E")||cpuis("STM32F101*D")||cpuis("STM32F101*C")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "TIM 12" "per , ""General Purpose Timer,TIM 12""" menuitem "TIM 13" "per , ""General Purpose Timer,TIM 13""" menuitem "TIM 14" "per , ""General Purpose Timer,TIM 14""" ) if (cpuis("STM32F100*")) ( menuitem "TIM 15" "per , ""General Purpose Timer,TIM 15""" menuitem "TIM 16" "per , ""General Purpose Timer,TIM 16""" menuitem "TIM 17" "per , ""General Purpose Timer,TIM 17""" ) ) if (cpuis("STM32F103*C")||cpuis("STM32F103*D")||cpuis("STM32F103*E")||cpuis("STM32F103*F")||cpuis("STM32F103*G")||cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpuis("STM32F100C*")||cpuis("STM32F100R*")||cpuis("STM32F100V*")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")) ( if (!cpuis("STM32F100RC")&&!cpuis("STM32F100RD")&&!cpuis("STM32F100RE")&&!cpuis("STM32F100VC")&&!cpuis("STM32F100VD")&&!cpuis("STM32F100VE")&&!cpuis("STM32F100ZC")&&!cpuis("STM32F100ZD")&&!cpuis("STM32F100ZE")) ( popup "Basic Timer" ( menuitem "TIM 6" "per , ""Basic Timer,TIM 6""" menuitem "TIM 7" "per , ""Basic Timer,TIM 7""" ) ) ) menuitem "RTC" "per , ""RTC (Real-Time Clock)""" menuitem "IWDG" "per , ""IWDG (Independent Watchdog)""" menuitem "WWDG" "per , ""WWDG (Window Watchdog)""" if (cpuis("STM32F103Z*")||cpu()=="STM32F103VG"||cpu()=="STM32F103VF"||cpu()=="STM32F103VE"||cpu()=="STM32F103VD"||cpu()=="STM32F103VC"||cpuis("STM32F101Z*")||cpu()=="STM32F101VG"||cpu()=="STM32F101VF"||cpu()=="STM32F101VE"||cpu()=="STM32F101VD"||cpu()=="STM32F101VC"||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "FSMC" "per , ""FSMC (Flexible Static Memory Controller)""" ) if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103") ( menuitem "SDIO" "per , ""SDIO (SDIO Interface)""" ) if (cpuis("STM32F103*")||cpuis("STM32F102*")) ( menuitem "USB" "per , ""SB (USB Full Speed Device)""" ) if (cpuis("STM32F103*")) ( menuitem "CAN" "per , ""CAN (Controller Area Network)""" ) if (cpuis("STM32F105*")||cpuis("STM32F107*")) ( popup "CAN" ( menuitem "CAN 1" "per , ""CAN (Controller Area Network),CAN 1""" menuitem "CAN 2" "per , ""CAN (Controller Area Network),CAN 2""" ) ) popup "SPI" ( if (cpuis("STM32F103*G")||cpuis("STM32F103*F")||cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpu()=="STM32F103"||cpuis("STM32F105*")||cpuis("STM32F107*")) ( menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1""" menuitem "SPI 2/I2S2" "per , ""SPI (Serial Peripheral Interface),SPI 2/I2S2""" menuitem "SPI 3/I2S3" "per , ""SPI (Serial Peripheral Interface),SPI 3/I2S3""" ) if (cpuis("STM32F101*C")||cpuis("STM32F101*D")||cpuis("STM32F101*E")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpu()=="STM32F101"||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1""" menuitem "SPI 2" "per , ""SPI (Serial Peripheral Interface),SPI 2""" menuitem "SPI 3" "per , ""SPI (Serial Peripheral Interface),SPI 3""" ) if (cpu()=="STM32F103T8"||cpu()=="STM32F103TB"||cpuis("STM32F103*4")||cpuis("STM32F103*6")||cpuis("STM32F102*4")||cpuis("STM32F102*6")||cpuis("STM32F101T*")||cpuis("STM32F101*4")||cpuis("STM32F101*6")||cpu()=="STM32F100C4"||cpu()=="STM32F100C6"||cpu()=="STM32F100R4"||cpu()=="STM32F100R6") ( menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1""" ) if (cpuis("STM32F100V*")||cpu()=="STM32F100RB"||cpu()=="STM32F100R8"||cpu()=="STM32F100CB"||cpu()=="STM32F100C8"||cpuis("STM32F102*8")||cpuis("STM32F102*B")||cpu()=="STM32F101C8"||cpu()=="STM32F101R8"||cpu()=="STM32F101V8"||cpuis("STM32F101*B")||cpuis("STM32F103*B")||cpu()=="STM32F103C8"||cpu()=="STM32F103R8"||cpu()=="STM32F103V8") ( if ((!cpuis("STM32F100VC"))&&(!cpuis("STM32F100VD"))&&(!cpuis("STM32F100VE"))) ( menuitem "SPI 1" "per , ""SPI (Serial Peripheral Interface),SPI 1""" menuitem "SPI 2" "per , ""SPI (Serial Peripheral Interface),SPI 2""" ) ) ) popup "I2C" ( menuitem "I2C 1" "per , ""I2C (Inter-Integrated Circuit),I2C 1""" if (cpu()!="STM32F103T8"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F103C4"&&cpu()!="STM32F103R4"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103C6"&&cpu()!="STM32F103R6"&&cpu()!="STM32F103T6"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F101T8"&&cpu()!="STM32F101C4"&&cpu()!="STM32F101R4"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101C6"&&cpu()!="STM32F101R6"&&cpu()!="STM32F101T6"&&(!(cpuis("STM32F100*4")))&&(!(cpuis("STM32F100*6")))&&!cpuis("STM32F101TB")&&!cpuis("STM32F103TB")) ( menuitem "I2C 2" "per , ""I2C (Inter-Integrated Circuit),I2C 2""" ) ) popup "USART" ( menuitem "USART 1" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 1""" menuitem "USART 2" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 2""" if (cpu()!="STM32F103T8"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F103C4"&&cpu()!="STM32F103R4"&&cpu()!="STM32F103T4"&&cpu()!="STM32F103C6"&&cpu()!="STM32F103R6"&&cpu()!="STM32F103T6"&&cpu()!="STM32F102C4"&&cpu()!="STM32F102R4"&&cpu()!="STM32F102C6"&&cpu()!="STM32F102R6"&&cpu()!="STM32F101T8"&&cpu()!="STM32F101C4"&&cpu()!="STM32F101R4"&&cpu()!="STM32F101T4"&&cpu()!="STM32F101C6"&&cpu()!="STM32F101R6"&&cpu()!="STM32F101T6"&&cpu()!="STM32F100C4"&&cpu()!="STM32F100C6"&&cpu()!="STM32F100R4"&&cpu()!="STM32F100R6"&&!cpuis("STM32F101TB")&&!cpuis("STM32F103TB")) ( menuitem "USART 3" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),USART 3""" ) if (cpuis("STM32F103*E")||cpuis("STM32F103*D")||cpuis("STM32F103*C")||cpuis("STM32F103*F")||cpuis("STM32F103*G")||cpuis("STM32F101*E")||cpuis("STM32F101*D")||cpuis("STM32F101*C")||cpuis("STM32F101*F")||cpuis("STM32F101*G")||cpu()=="STM32F103"||cpu()=="STM32F101"||cpuis("STM32F105*")||cpuis("STM32F107*")||cpuis("STM32F100RC")||cpuis("STM32F100RD")||cpuis("STM32F100RE")||cpuis("STM32F100VC")||cpuis("STM32F100VD")||cpuis("STM32F100VE")||cpuis("STM32F100ZC")||cpuis("STM32F100ZD")||cpuis("STM32F100ZE")) ( menuitem "UART 4" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),UART 4""" menuitem "UART 5" "per , ""USART (Universal Synchronous Asynchronous Receiver Transmitter),UART 5""" ) ) if (cpuis("STM32F100*")) ( menuitem "HDMI-CEC" "per , ""HDMI-CEC (Consumer Electronics Control)""" ) if (cpuis("STM32F105*")||cpuis("STM32F107*")) ( popup "USB_OTG_FS" ( menuitem "OTG_FS Global Registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),OTG_FS Global Registers""" menuitem "Host mode registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),Host mode registers""" menuitem "Device mode registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),Device mode registers""" menuitem "Power and clock gating control and status registers" "per , ""USB_OTG_FS (USB on-the-go full-speed),Power and clock gating control and status registers""" ) ) if (cpuis("STM32F107*")) ( popup "Ethernet" ( menuitem "MAC registers" "per , ""Ethernet,MAC registers""" menuitem "MMC registers" "per , ""Ethernet,MMC registers""" menuitem "IEEE 1588 time stamp registers" "per , ""Ethernet,IEEE 1588 time stamp registers""" menuitem "DMA registers" "per , ""Ethernet,DMA registers""" ) ) menuitem "Device Electronic Signature" "per , ""Device Electronic Signature""" ) )