; -------------------------------------------------------------------------------- ; @Title: S6J311 Specific Menu ; @Props: Released ; @Author: DRD, AMM, WIL, MMK ; @Changelog: 2014-12-19 DRD ; 2016-03-14 MMK ; @Manufacturer: CYPRESS - Cypress Semiconductor Corporation ; @Core: Cortex-R5 ; @Chip: S6J311*JAA, S6J311*HAA, S6J312*HAA ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: mens6j311.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-R5)" ( menuitem "[:chip]ID Registers" "per , ""Core Registers (Cortex-R5),ID Registers""" menuitem "[:chip]System Control and Configuration" "per , ""Core Registers (Cortex-R5),System Control and Configuration""" menuitem "[:chip]MPU Control and Configuration" "per , ""Core Registers (Cortex-R5),MPU Control and Configuration""" menuitem "[:chip]Cache Control and Configuration" "per , ""Core Registers (Cortex-R5),Cache Control and Configuration""" menuitem "[:chip]TCM Control and Configuration" "per , ""Core Registers (Cortex-R5),TCM Control and Configuration""" menuitem "[:chip]System Performance Monitor" "per , ""Core Registers (Cortex-R5),System Performance Monitor""" separator menuitem "[:chip]Debug Registers" "per , ""Core Registers (Cortex-R5),Debug Registers""" menuitem "[:chip]Breakpoint Registers" "per , ""Core Registers (Cortex-R5),Breakpoint Registers""" menuitem "[:chip]Watchpoint Control Registers" "per , ""Core Registers (Cortex-R5),Watchpoint Control Registers""" ) separator menuitem "MODEC" "PER , ""MODEC (Operation Mode)""" menuitem "RESET" "PER , ""RESET""" menuitem "CLOCK SYSTEM" "PER , ""CLOCK SYSTEM""" menuitem "LOW POWER CONSUPTION" "PER , ""LOW POWER CONSUPTION""" menuitem "CLOCK SUPERVISOR" "PER , ""CLOCK SUPERVISOR""" menuitem "SOURCE CLOCK TIMER" "PER , ""SOURCE CLOCK TIMER""" menuitem "RTC" "PER , ""RTC (REAL TIME CLOCK)""" menuitem "CR CALIBRATION" "PER , ""CR CALIBRATION""" menuitem "BURIF" "PER , ""BURIF (BACKUP RAM INTERFACE)""" menuitem "EXTERNAL INTERRUPT" "PER , ""EXTERNAL INTERRUPT""" menuitem "HWDT" "PER , ""HWDT (HARDWARE WATCHDOG TIMER)""" menuitem "SWDT" "PER , ""SWDT (SOFTWARE WATCHDOG TIMER)""" menuitem "TCRAM" "PER , ""TCRAM (TCRAM INTERFACE)""" menuitem "TCFLASH" "PER , ""TCFLASH""" menuitem "SECURITY" "PER , ""SECURITY""" menuitem "WORKFLASH" "PER , ""WORKFLASH""" menuitem "BOOTROM HARDWARE INTERFACE" "PER , ""BOOTROM HARDWARE INTERFACE""" ;menuitem "BOOTROM SOFTWARE INTERFACE" "PER , ""BOOTROM SOFTWARE INTERFACE""" ;menuitem "EAM" "PER , ""EAM (EXCLUSIVE ACCESS MEMORY)""" menuitem "INTC" "PER , ""INTC (INTERRUPT CONTROLER)""" menuitem "TPU" "PER , ""TPU (TIME PROTECTION)""" menuitem "SHE" "PER , ""SHE (SECURE HARDWARE EXTENSION)""" menuitem "DMA CONTROLLER" "PER , ""DMA CONTROLLER""" menuitem "DMA COMPLEX SUBSYSTEM" "PER , ""DMA COMPLEX SUBSYSTEM""" menuitem "MPUH" "PER , ""MPUH (Memory Protection Unit for the AMBA Advanced High Speed Bus)""" menuitem "CANFD" "PER , ""CANFD (CAN FD CONTROLER)""" menuitem "CANP" "PER , ""CANP (CAN PRESCALER)""" menuitem "MULTI-FUNCTION SERIAL INTERFACE" "PER , ""MULTI-FUNCTION SERIAL INTERFACE""" menuitem "BT_PWM" "PER , ""BT_PWM (Base Timer PWM)""" menuitem "BT_PPG" "PER , ""BT_PPG (Base Timer PPG)""" menuitem "BT_RT" "PER , ""BT_RT (Reload Timer Function)""" menuitem "BT_PWC" "PER , ""BT_PWC (Base Timer PWC)""" menuitem "BTSEL" "PER , ""BTSEL (base timer I/O selection function)""" menuitem "32-bit free-run timer" "PER , ""32-bit free-run timer""" menuitem "ICU" "PER , ""ICU (32-bit Input Capture)""" menuitem "OCU" "PER , ""OCU (32-bit Output Compare)""" if cpuis("S6J312?HAA") ( menuitem "RLT" "PER , ""RLT (32-bit Reload Timer)""" menuitem "RLTSSS" "PER , ""RLTSSS (Reload Timer Simultaneous Soft Start)""" menuitem "QC" "PER , ""QC (QUAD POSITION & REVOLUTION COUTER)""" ) menuitem "EICU" "PER , ""EICU (External Interrupt Capture Unit)""" menuitem "CRC" "PER , ""CRC (Cyclic Redundancy Check)""" menuitem "I/O port" "PER , ""I/O port""" menuitem "PPU" "PER , ""PPU (Peripheral Protection Unit)""" if cpuis("S6J312?HAA") ( menuitem "DDRHSSPI" "PER , ""DDRHSSPI (DDR HIGH SPEED SPI CONTROLER)""" menuitem "EBI" "PER , ""EBI (External Bus Interface)""" ) menuitem "SRCFG" "PER , ""SRCFG (System SRAM Module)""" menuitem "ADC12B" "PER , ""ADC12B (12-bit A/D converter)""" if cpuis("S6J311?JAA") ( menuitem "PWU" "PER , ""PWU (Partial Wakeup Control Register)""" ) if cpuis("S6J312?HAA") ( menuitem "LCDC" "PER , ""LCDC (LCD CONTROLER)""" menuitem "SG" "PER , ""SG (SOUND GENERATOR)""" menuitem "SMC" "PER , ""SMC (STEPPER MOTOR CONTROLER)""" menuitem "SMCTG" "PER , ""SMCTG (Trigger Configuration Of Stepper Motor Controller)""" ) ) )