; --------------------------------------------------------------------------------
; @Title: PSOC4100SMAX Specific Menu
; @Props: Released
; @Author: NEJ
; @Changelog: 2023-10-30 NEJ
; @Manufacturer: INFINEON - Infineon Technologies AG
; @Core: Cortex-M0+
; @Chip: CY8C4147AZE-S598, CY8C4147AZE-S578, CY8C4148AZE-S598, CY8C4148LDE-S573,
;        CY8C4148LDE-S593, CY8C4147AZA-S548, CY8C4147AZE-S548, CY8C4147AZS-S548,
;        CY8C4147AZA-S555, CY8C4147AZS-S555, CY8C4147AZE-S555, CY8C4147AZA-S558,
;        CY8C4147AZS-S558, CY8C4147AZE-S558, CY8C4147AZA-S565, CY8C4147AZS-S565,
;        CY8C4147AZE-S565, CY8C4147AZA-S568, CY8C4147AZS-S568, CY8C4147AZE-S568,
;        CY8C4147AZA-S575, CY8C4147AZS-S575, CY8C4147AZE-S575, CY8C4147AZA-S578,
;        CY8C4147AZS-S578, CY8C4147AZA-S585, CY8C4147AZS-S585, CY8C4147AZE-S585,
;        CY8C4147AZA-S588, CY8C4147AZS-S588, CY8C4147AZE-S588, CY8C4147AZA-S595,
;        CY8C4147AZS-S595, CY8C4147AZE-S595, CY8C4147AZA-S598, CY8C4147AZS-S598,
;        CY8C4148AZA-S545, CY8C4148AZS-S545, CY8C4148AZE-S545, CY8C4148AZA-S548,
;        CY8C4148AZS-S548, CY8C4148AZE-S548, CY8C4148AZA-S555, CY8C4148AZS-S555,
;        CY8C4148AZE-S555, CY8C4148AZA-S558, CY8C4148AZS-S558, CY8C4148AZE-S558,
;        CY8C4148AZA-S565, CY8C4148AZS-S565, CY8C4148AZE-S565, CY8C4148AZA-S568,
;        CY8C4148AZS-S568, CY8C4148AZE-S568, CY8C4148AZA-S575, CY8C4148AZS-S575,
;        CY8C4148AZE-S575, CY8C4148AZA-S578, CY8C4148AZS-S578, CY8C4148AZE-S578,
;        CY8C4148AZA-S585, CY8C4148AZS-S585, CY8C4148AZE-S585, CY8C4148AZA-S588,
;        CY8C4148AZS-S588, CY8C4148AZE-S588, CY8C4148AZA-S595, CY8C4148AZS-S595,
;        CY8C4148AZE-S595, CY8C4148AZA-S598, CY8C4148AZS-S598, CY8C4149AZA-S545,
;        CY8C4149AZS-S545, CY8C4149AZE-S545, CY8C4149AZA-S548, CY8C4149AZS-S548,
;        CY8C4149AZE-S548, CY8C4149AZA-S555, CY8C4149AZS-S555, CY8C4149AZE-S555,
;        CY8C4149AZA-S558, CY8C4149AZS-S558, CY8C4149AZE-S558, CY8C4149AZA-S565,
;        CY8C4149AZS-S565, CY8C4149AZE-S565, CY8C4149AZA-S568, CY8C4149AZS-S568,
;        CY8C4149AZE-S568, CY8C4149AZA-S575, CY8C4149AZS-S575, CY8C4149AZE-S575,
;        CY8C4149AZA-S578, CY8C4149AZS-S578, CY8C4149AZE-S578, CY8C4149AZA-S585,
;        CY8C4149AZS-S585, CY8C4149AZE-S585, CY8C4149AZA-S588, CY8C4149AZS-S588,
;        CY8C4149AZE-S588, CY8C4149AZA-S595, CY8C4149AZS-S595, CY8C4149AZE-S595,
;        CY8C4149AZA-S598, CY8C4149AZS-S598, CY8C4149AZE-S598, CY8C4147LDA-S543,
;        CY8C4147LDE-S543, CY8C4147LDS-S543, CY8C4147LDA-S553, CY8C4147LDS-S553,
;        CY8C4147LDE-S553, CY8C4147LDA-S563, CY8C4147LDS-S563, CY8C4147LDE-S563,
;        CY8C4147LDA-S573, CY8C4147LDS-S573, CY8C4147LDE-S573, CY8C4147LDA-S583,
;        CY8C4147LDS-S583, CY8C4147LDE-S583, CY8C4147LDA-S593, CY8C4147LDS-S593,
;        CY8C4147LDE-S593, CY8C4148LDA-S543, CY8C4148LDS-S543, CY8C4148LDE-S543,
;        CY8C4148LDA-S553, CY8C4148LDS-S553, CY8C4148LDE-S553, CY8C4148LDA-S563,
;        CY8C4148LDS-S563, CY8C4148LDE-S563, CY8C4148LDA-S573, CY8C4148LDS-S573,
;        CY8C4148LDA-S583, CY8C4148LDS-S583, CY8C4148LDE-S583, CY8C4148LDA-S593,
;        CY8C4148LDS-S593, CY8C4149LDA-S543, CY8C4149LDS-S543, CY8C4149LDE-S543,
;        CY8C4149LDA-S553, CY8C4149LDS-S553, CY8C4149LDE-S553, CY8C4149LDA-S563,
;        CY8C4149LDS-S563, CY8C4149LDE-S563, CY8C4149LDA-S573, CY8C4149LDS-S573,
;        CY8C4149LDE-S573, CY8C4149LDA-S583, CY8C4149LDS-S583, CY8C4149LDE-S583,
;        CY8C4149LDA-S593, CY8C4149LDS-S593, CY8C4149LDE-S593
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menpsoc4100smax.men 16888 2023-10-31 16:58:24Z kwisniewski $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
)
add
menu
(
permenu "" "Peripherals"
)