; -------------------------------------------------------------------------------- ; @Title: NRF9160 Specific Menu ; @Props: Released ; @Author: KWI, KRZ ; @Changelog: 2020-03-12 KWI ; 2022-01-27 KRZ ; @Manufacturer: NORDICSEMI - Nordic Semiconductor ; @Core: Cortex-M33F ; @Chip: NRF9160SIAA, NRF9160SIBA, NRF9160SICA ; @Copyright: (C) 1989-2022 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: mennrf9160.men 16339 2023-07-03 13:30:14Z pegold $ add menu ( IF SOFTWARE.BUILD.BASE()>=69655. ( popup "&CPU" ( separator IF CPU.FEATURE(MMU) ( popup "[:mmu]MMU" ( menuitem "[:mmureg]MMU Control" "MMU.view" separator menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable" menuitem "[:mmu]MMU Table List" "MMU.List.PageTable" separator IF CPU.FEATURE(ITLBDUMP) ( menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB" ) IF CPU.FEATURE(DTLBDUMP) ( menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB" ) IF CPU.FEATURE(TLB0DUMP) ( menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0" ) IF CPU.FEATURE(TLB1DUMP) ( menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1" ) ) ) IF COMPonent.AVAILable("SMMU") ( popup "[:mmu]SMMU" ( menuitem "[:chip]SMMU1 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU1 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.)) SMMU.StreamMapTable &(name) ) IF COMPonent.AVAILable("SMMU2") ( separator menuitem "[:chip]SMMU2 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU2 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU3") ( separator menuitem "[:chip]SMMU3 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU3 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU4") ( separator menuitem "[:chip]SMMU4 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU4 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU5") ( separator menuitem "[:chip]SMMU5 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU5 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.)) SMMU.StreamMapTable &(name) ) ) IF COMPonent.AVAILable("SMMU6") ( separator menuitem "[:chip]SMMU6 Registers" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.Register.Global &(name) ) menuitem "[:mmureg]SMMU6 StreamMapTable" ( PRIVATE &name &name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.)) SMMU.StreamMapTable &(name) ) ) ) ) IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE) ( popup "[:cache]Cache" ( IF CPU.FEATURE(L1ICACHEDUMP) ( menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC" menuitem "[:cache]ICACHE List" "CACHE.List IC" menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC" ) IF CPU.FEATURE(L1DCACHEDUMP) ( separator menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC" menuitem "[:cache]DCACHE List" "CACHE.List DC" menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC" ) IF CPU.FEATURE(L2CACHEDUMP) ( separator menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2" menuitem "[:cache]L2CACHE List" "CACHE.List L2" menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2" ) ) ) ) popup "&Trace" ( separator IF COMPonent.AVAILable("ITM") ( popup "ITM" ( default menuitem "[:oconfig]ITM settings..." "ITM.state" separator menuitem "[:alist]ITMTrace List" "ITMTrace.List" ) ) IF COMPonent.AVAILable("STM") ( popup "STM" ( default menuitem "[:oconfig]STM settings..." "STM.state" separator menuitem "[:alist]STMTrace List" "STMTrace.List" ) ) IF COMPonent.AVAILable("HTM") ( popup "HTM" ( default menuitem "[:oconfig]HTM settings..." "HTM.state" separator menuitem "[:alist]HTMTrace List" "HTMTrace.List" ) ) IF COMPonent.AVAILable("TPIU") ( menuitem "[:oconfig]TPIU settings..." "TPIU.state" ) IF COMPonent.AVAILable("ETR") ( menuitem "[:oconfig]ETR settings..." ( PRIVATE &pdd &pdd=OS.PDD() DO "&pdd/etc/embedded_trace_router/etr_utility.cmm" ) ) ) popup "&Misc" ( popup "Tools" ( IF CPUIS64BIT()||CPU.FEATURE("SPR") ( menuitem "ARM System Register Converter" ( DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm" ) ) IF CPU.FEATURE("C15") ( menuitem "ARM Coprocessor Converter" ( DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm" ) ) ) ) popup "&Perf" ( IF CPU.FEATURE(BMC) ( before "Reset" menuitem "[:bmc]Benchmark Counters" "BMC.state" before "Reset" separator ) ) ) popup "Peripherals" ( popup "[:chip]Core Registers (Cortex-M33F)" ( menuitem "[:chip]System Control" "per , ""Core Registers (Cortex-M33F),System Control""" menuitem "[:chip]MPU;Memory Protection Unit" "per , ""Core Registers (Cortex-M33F),Memory Protection Unit (MPU)""" menuitem "[:chip]SAU;Security Attribution Unit" "per , ""Core Registers (Cortex-M33F),Security Attribution Unit (SAU)""" menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller" "per , ""Core Registers (Cortex-M33F),Nested Vectored Interrupt Controller (NVIC)""" menuitem "[:chip]FPU;Floating-point Unit" "per , ""Core Registers (Cortex-M33F),Floating-point Unit (FPU)""" popup "[:chip]Debug" ( menuitem "[:chip]Core Debug" "per , ""Core Registers (Cortex-M33F),Debug,Core Debug""" menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit" "per , ""Core Registers (Cortex-M33F),Debug,Flash Patch and Breakpoint Unit (FPB)""" menuitem "[:chip]DWT;Data Watchpoint and Trace Unit" "per , ""Core Registers (Cortex-M33F),Debug,Data Watchpoint and Trace Unit (DWT)""" ) ) separator menuitem "FICR_S" "per , ""FICR (Factory Information Configuration Registers)""" menuitem "UICR_S" "per , ""UICR (User Information Configuration Registers)""" menuitem "TAD_S" "per , ""TAD (Trace and Debug Control)""" menuitem "SPU_S" "per , ""SPU (System Protection Unit)""" popup "REGULATORS (Voltage Regulators)" ( menuitem "REGULATORS_NS" "per , ""REGULATORS (Voltage Regulators),REGULATORS_NS""" menuitem "REGULATORS_S" "per , ""REGULATORS (Voltage Regulators),REGULATORS_S""" ) popup "CLOCK (Clock Management)" ( menuitem "CLOCK_NS" "per , ""CLOCK (Clock Management),CLOCK_NS""" menuitem "CLOCK_S" "per , ""CLOCK (Clock Management),CLOCK_S""" ) popup "POWER (Power Control)" ( menuitem "POWER_NS" "per , ""POWER (Power Control),POWER_NS""" menuitem "POWER_S" "per , ""POWER (Power Control),POWER_S""" ) menuitem "CTRL_AP_PERI_S" "per , ""CTRLAPPERI (Control Access Port)""" popup "SPIM (Serial Peripheral Interface Master with EasyDMA)" ( menuitem "SPIM0_NS" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM0_NS""" menuitem "SPIM0_S" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM0_S""" menuitem "SPIM1_NS" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM1_NS""" menuitem "SPIM1_S" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM1_S""" menuitem "SPIM2_NS" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM2_NS""" menuitem "SPIM2_S" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM2_S""" menuitem "SPIM3_NS" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM3_NS""" menuitem "SPIM3_S" "per , ""SPIM (Serial Peripheral Interface Master with EasyDMA),SPIM3_S""" ) popup "SPIS (Serial Peripheral Interface Slave with EasyDMA)" ( menuitem "SPIS0_NS" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS0_NS""" menuitem "SPIS0_S" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS0_S""" menuitem "SPIS1_NS" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS1_NS""" menuitem "SPIS1_S" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS1_S""" menuitem "SPIS2_NS" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS2_NS""" menuitem "SPIS2_S" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS2_S""" menuitem "SPIS3_NS" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS3_NS""" menuitem "SPIS3_S" "per , ""SPIS (Serial Peripheral Interface Slave with EasyDMA),SPIS3_S""" ) popup "TWIM (I2C compatible Two-Wire Master Interface with EasyDMA)" ( menuitem "TWIM0_NS" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM0_NS""" menuitem "TWIM0_S" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM0_S""" menuitem "TWIM1_NS" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM1_NS""" menuitem "TWIM1_S" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM1_S""" menuitem "TWIM2_NS" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM2_NS""" menuitem "TWIM2_S" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM2_S""" menuitem "TWIM3_NS" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM3_NS""" menuitem "TWIM3_S" "per , ""TWIM (I2C compatible Two-Wire Master Interface with EasyDMA),TWIM3_S""" ) popup "TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA)" ( menuitem "TWIS0_NS" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS0_NS""" menuitem "TWIS0_S" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS0_S""" menuitem "TWIS1_NS" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS1_NS""" menuitem "TWIS1_S" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS1_S""" menuitem "TWIS2_NS" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS2_NS""" menuitem "TWIS2_S" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS2_S""" menuitem "TWIS3_NS" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS3_NS""" menuitem "TWIS3_S" "per , ""TWIS (I2C compatible Two-Wire Slave Interface with EasyDMA),TWIS3_S""" ) popup "UARTE (UART with EasyDMA)" ( menuitem "UARTE0_NS" "per , ""UARTE (UART with EasyDMA),UARTE0_NS""" menuitem "UARTE0_S" "per , ""UARTE (UART with EasyDMA),UARTE0_S""" menuitem "UARTE1_NS" "per , ""UARTE (UART with EasyDMA),UARTE1_NS""" menuitem "UARTE1_S" "per , ""UARTE (UART with EasyDMA),UARTE1_S""" menuitem "UARTE2_NS" "per , ""UARTE (UART with EasyDMA),UARTE2_NS""" menuitem "UARTE2_S" "per , ""UARTE (UART with EasyDMA),UARTE2_S""" menuitem "UARTE3_NS" "per , ""UARTE (UART with EasyDMA),UARTE3_NS""" menuitem "UARTE3_S" "per , ""UARTE (UART with EasyDMA),UARTE3_S""" ) popup "GPIOTE (PIO Tasks and Events)" ( menuitem "GPIOTE0_S" "per , ""GPIOTE (PIO Tasks and Events),GPIOTE0_S""" menuitem "GPIOTE1_NS" "per , ""GPIOTE (PIO Tasks and Events),GPIOTE1_NS""" ) popup "SAADC (Analog to Digital Converter)" ( menuitem "SAADC_NS" "per , ""SAADC (Analog to Digital Converter),SAADC_NS""" menuitem "SAADC_S" "per , ""SAADC (Analog to Digital Converter),SAADC_S""" ) popup "TIMER (Timer/Counter)" ( menuitem "TIMER0_NS" "per , ""TIMER (Timer/Counter),TIMER0_NS""" menuitem "TIMER0_S" "per , ""TIMER (Timer/Counter),TIMER0_S""" menuitem "TIMER1_NS" "per , ""TIMER (Timer/Counter),TIMER1_NS""" menuitem "TIMER1_S" "per , ""TIMER (Timer/Counter),TIMER1_S""" menuitem "TIMER2_NS" "per , ""TIMER (Timer/Counter),TIMER2_NS""" menuitem "TIMER2_S" "per , ""TIMER (Timer/Counter),TIMER2_S""" ) popup "RTC (Real-time Counter)" ( menuitem "RTC0_NS" "per , ""RTC (Real-time Counter),RTC0_NS""" menuitem "RTC0_S" "per , ""RTC (Real-time Counter),RTC0_S""" menuitem "RTC1_NS" "per , ""RTC (Real-time Counter),RTC1_NS""" menuitem "RTC1_S" "per , ""RTC (Real-time Counter),RTC1_S""" ) popup "DPPIC (Distributed Programmable Peripheral Interconnect Controller)" ( menuitem "DPPIC_NS" "per , ""DPPIC (Distributed Programmable Peripheral Interconnect Controller),DPPIC_NS""" menuitem "DPPIC_S" "per , ""DPPIC (Distributed Programmable Peripheral Interconnect Controller),DPPIC_S""" ) popup "WDT (Watchdog Timer Unit)" ( menuitem "WDT_NS" "per , ""WDT (Watchdog Timer Unit),WDT_NS""" menuitem "WDT_S" "per , ""WDT (Watchdog Timer Unit),WDT_S""" ) popup "EGU (Event Generator Unit)" ( menuitem "EGU0_NS" "per , ""EGU (Event Generator Unit),EGU0_NS""" menuitem "EGU0_S" "per , ""EGU (Event Generator Unit),EGU0_S""" menuitem "EGU1_NS" "per , ""EGU (Event Generator Unit),EGU1_NS""" menuitem "EGU1_S" "per , ""EGU (Event Generator Unit),EGU1_S""" menuitem "EGU2_NS" "per , ""EGU (Event Generator Unit),EGU2_NS""" menuitem "EGU2_S" "per , ""EGU (Event Generator Unit),EGU2_S""" menuitem "EGU3_NS" "per , ""EGU (Event Generator Unit),EGU3_NS""" menuitem "EGU3_S" "per , ""EGU (Event Generator Unit),EGU3_S""" menuitem "EGU4_NS" "per , ""EGU (Event Generator Unit),EGU4_NS""" menuitem "EGU4_S" "per , ""EGU (Event Generator Unit),EGU4_S""" menuitem "EGU5_NS" "per , ""EGU (Event Generator Unit),EGU5_NS""" menuitem "EGU5_S" "per , ""EGU (Event Generator Unit),EGU5_S""" ) popup "PWM (Pulse-Width Modulator)" ( menuitem "PWM0_NS" "per , ""PWM (Pulse-Width Modulator),PWM0_NS""" menuitem "PWM0_S" "per , ""PWM (Pulse-Width Modulator),PWM0_S""" menuitem "PWM1_NS" "per , ""PWM (Pulse-Width Modulator),PWM1_NS""" menuitem "PWM1_S" "per , ""PWM (Pulse-Width Modulator),PWM1_S""" menuitem "PWM2_NS" "per , ""PWM (Pulse-Width Modulator),PWM2_NS""" menuitem "PWM2_S" "per , ""PWM (Pulse-Width Modulator),PWM2_S""" menuitem "PWM3_NS" "per , ""PWM (Pulse-Width Modulator),PWM3_NS""" menuitem "PWM3_S" "per , ""PWM (Pulse-Width Modulator),PWM3_S""" ) popup "PDM (Pulse Density Modulation (Digital Microphone) Interface)" ( menuitem "PDM_NS" "per , ""PDM (Pulse Density Modulation (Digital Microphone) Interface),PDM_NS""" menuitem "PDM_S" "per , ""PDM (Pulse Density Modulation (Digital Microphone) Interface),PDM_S""" ) popup "I2S (Inter-Integrated Sound Bus Controller)" ( menuitem "I2S_NS" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S_NS""" menuitem "I2S_S" "per , ""I2S (Inter-Integrated Sound Bus Controller),I2S_S""" ) popup "IPC (Interprocessor Communication)" ( menuitem "IPC_NS" "per , ""IPC (Interprocessor Communication),IPC_NS""" menuitem "IPC_S" "per , ""IPC (Interprocessor Communication),IPC_S""" ) popup "FPU (FPU Control Peripheral)" ( menuitem "FPU_NS" "per , ""FPU (FPU Control Peripheral),FPU_NS""" menuitem "FPU_S" "per , ""FPU (FPU Control Peripheral),FPU_S""" ) popup "KMU (Key Management Unit)" ( menuitem "KMU_NS" "per , ""KMU (Key Management Unit),KMU_NS""" menuitem "KMU_S" "per , ""KMU (Key Management Unit),KMU_S""" ) popup "NVMC (Non-volatile Memory Controller)" ( menuitem "NVMC_NS" "per , ""NVMC (Non-volatile Memory Controller),NVMC_NS""" menuitem "NVMC_S" "per , ""NVMC (Non-volatile Memory Controller),NVMC_S""" ) popup "VMC (Volatile Memory Controller)" ( menuitem "VMC_NS" "per , ""VMC (Volatile Memory Controller),VMC_NS""" menuitem "VMC_S" "per , ""VMC (Volatile Memory Controller),VMC_S""" ) menuitem "CC_HOST_RGF_S" "per , ""CC_HOST_RGF (CRYPTOCELL HOST_RGF Interface)""" menuitem "CRYPTOCELL_S" "per , ""CRYPTOCELL (ARM TrustZone CryptoCell Register Interface)""" popup "GPIO (General Purpose I/O Ports And Peripheral I/O Lines)" ( menuitem "P0_NS" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),P0_NS""" menuitem "P0_S" "per , ""GPIO (General Purpose I/O Ports And Peripheral I/O Lines),P0_S""" ) ) )