; --------------------------------------------------------------------------------
; @Title: LPC181x/2x/3x/5x Specific Menu
; @Props: Released
; @Author: EMK, STR, TPP
; @Changelog:
;   2012-06-06
;   2013-09-25
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-M3
; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menlpc18xx.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
popup "[:chip]Core Registers (Cortex-M3)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M3),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M3),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M3),Nested Vectored Interrupt Controller"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M3),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M3),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M3),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
separator
menuitem "OTP"                      "per , ""OTP (One-Time Programmable)"""
menuitem "NVIC"                     "per , ""NVIC (Nested Vectored Interrupt Controller)"""
menuitem "ER"                       "per , ""ER (Event router)"""
menuitem "CREG"                     "per , ""CREG (Configuration Registers)"""
menuitem "PMC"                      "per , ""PMC (Power Management Controller)"""
menuitem "CGU"                      "per , ""CGU (Clock Generation Unit)"""
menuitem "CCU"                      "per , ""CCU (Clock Control Unit)"""
menuitem "RGU"                      "per , ""RGU (Reset Generation Unit)"""
menuitem "SCU"                      "per , ""SCU (System Control Unit / IO configuration)"""
menuitem "GIMA"                     "per , ""GIMA (Global Input Multiplexer Array)"""
menuitem "GPIO"                     "per , ""GPIO (General Purpose Input/Output)"""
menuitem "GPDMA"                    "per , ""GPDMA (General Purpose DMA)"""
menuitem "SD"                       "per , ""SD (SD/MMC interface)"""
menuitem "SPIFI"                    "per , ""SPIFI (SPI Flash Interface)"""
menuitem "EMC "                     "per , ""EMC (External Memory Controller)"""
if cpuis("LPC182*")||cpuis("LPC183*")||cpuis("LPC185*")
(
menuitem "USB"                  "per , ""USB (USB Host/Device/OTG controller)"""
)
if cpuis("LPC183*")||cpuis("LPC185*")
(
menuitem "ETH"                  "per , ""ETH (Ethernet)"""
)
if cpuis("LPC185*")
(
menuitem "LCD"                  "per , ""LCD"""
)
menuitem "SCT"                      "per , ""SCT (State Configurable Timer)"""
menuitem "TIMER 0/1/2/3"            "per , ""TIMER 0/1/2/3"""
menuitem "MC PWM"                   "per , ""MC PWM (Motor Control Pulse Width Modulator)"""
if cpuis("LPC183*")||cpuis("LPC185*")
(
menuitem "QEI"                  "per , ""QEI (Quadrature Encoder Interface)"""
)
menuitem "RIT"                      "per , ""RIT (Repetitive Interrupt Timer)"""
menuitem "AT"                       "per , ""AT (Alarm timer)"""
menuitem "WWDT"                     "per , ""WWDT (Windowed Watchdog timer)"""
menuitem "RTC"                      "per , ""RTC (Real-Time Clock)"""
if !cpuis("LPC1810")&&!cpuis("LPC1820")&&!cpuis("LPC1830")&&!cpuis("LPC1850")
(
menuitem "EMR"                  "per , ""EMR (Event monitor/recorder)"""
)
menuitem "USART"                    "per , ""USART"""
menuitem "SSP"                      "per , ""SSP (Synchronous Serial Port)"""
menuitem "I2S interface"            "per , ""I2S interface"""
menuitem "I2C-bus interface"        "per , ""I2C-bus interface"""
menuitem "CAN"                      "per , ""CAN"""
menuitem "ADC"                      "per , ""ADC"""
menuitem "DAC"                      "per , ""DAC"""
if !cpuis("LPC1810")&&!cpuis("LPC1820")&&!cpuis("LPC1830")&&!cpuis("LPC1850")
(
menuitem "FMC"                  "per , ""FMC (Flash programming/ISP and IAP)"""
)
if cpuis("LPC1857")||cpuis("LPC1853")
(
menuitem "EEPROM"               "per , ""EEPROM memory"""
)
)
)