; --------------------------------------------------------------------------------
; @Title: IMX8M Specific Menu
; @Props: Released
; @Author: BCA
; @Changelog: 2018-02-24 BCA
; @Manufacturer: NXP - NXP Semiconductors
; @Core: Cortex-A53, Cortex-M4F
; @Chip: IMX8MQ, IMX8MQ-CM4
; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: menimx8m.men 16339 2023-07-03 13:30:14Z pegold $

add
menu
(
IF SOFTWARE.BUILD.BASE()>=69655.
(
popup "&CPU"
(
separator
IF CPU.FEATURE(MMU)
(
popup "[:mmu]MMU"
(
menuitem "[:mmureg]MMU Control" "MMU.view"
separator
menuitem "[:mmu]MMU Table Dump" "MMU.DUMP.PageTable"
menuitem "[:mmu]MMU Table List" "MMU.List.PageTable"
separator
IF CPU.FEATURE(ITLBDUMP)
(
menuitem "[:mmu]ITLB Dump" "MMU.DUMP.ITLB"
)
IF CPU.FEATURE(DTLBDUMP)
(
menuitem "[:mmu]DTLB Dump" "MMU.DUMP.DTLB"
)
IF CPU.FEATURE(TLB0DUMP)
(
menuitem "[:mmu]TLB0 Dump (Associative)" "MMU.DUMP.TLB0"
)
IF CPU.FEATURE(TLB1DUMP)
(
menuitem "[:mmu]TLB1 Dump (Lockable)" "MMU.DUMP.TLB1"
)
)
)
IF COMPonent.AVAILable("SMMU")
(
popup "[:mmu]SMMU"
(
menuitem "[:chip]SMMU1 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU1 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU1",0.))
SMMU.StreamMapTable &(name)
)
IF COMPonent.AVAILable("SMMU2")
(
separator
menuitem "[:chip]SMMU2 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU2 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU2",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU3")
(
separator
menuitem "[:chip]SMMU3 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU3 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU3",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU4")
(
separator
menuitem "[:chip]SMMU4 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU4 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU4",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU5")
(
separator
menuitem "[:chip]SMMU5 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU5 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU5",0.))
SMMU.StreamMapTable &(name)
)
)
IF COMPonent.AVAILable("SMMU6")
(
separator
menuitem "[:chip]SMMU6 Registers"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.Register.Global &(name)
)
menuitem "[:mmureg]SMMU6 StreamMapTable"
(
PRIVATE &name
&name=SMMU.COMPonentNAME(COMPonent.Base("SMMU6",0.))
SMMU.StreamMapTable &(name)
)
)
)
)
IF CPU.FEATURE(L1ICACHE)||CPU.FEATURE(L1DCACHE)||CPU.FEATURE(L2CACHE)
(
popup "[:cache]Cache"
(
IF CPU.FEATURE(L1ICACHEDUMP)
(
menuitem "[:cache]ICACHE Dump" "CACHE.DUMP IC"
menuitem "[:cache]ICACHE List" "CACHE.List IC"
menuitem "[:cache]ICACHE List Functions" "CACHE.ListFunc.IC"
)
IF CPU.FEATURE(L1DCACHEDUMP)
(
separator
menuitem "[:cache]DCACHE Dump" "CACHE.DUMP DC"
menuitem "[:cache]DCACHE List" "CACHE.List DC"
menuitem "[:cache]DCACHE List Variables" "CACHE.ListVar.DC"
)
IF CPU.FEATURE(L2CACHEDUMP)
(
separator
menuitem "[:cache]L2CACHE Dump" "CACHE.DUMP L2"
menuitem "[:cache]L2CACHE List" "CACHE.List L2"
menuitem "[:cache]L2CACHE List Variables" "CACHE.ListVar.L2"
)
)
)
)
popup "&Trace"
(
separator
IF COMPonent.AVAILable("ITM")
(
popup "ITM"
(
default
menuitem "[:oconfig]ITM settings..." "ITM.state"
separator
menuitem "[:alist]ITMTrace List" "ITMTrace.List"
)
)
IF COMPonent.AVAILable("STM")
(
popup "STM"
(
default
menuitem "[:oconfig]STM settings..." "STM.state"
separator
menuitem "[:alist]STMTrace List" "STMTrace.List"
)
)
IF COMPonent.AVAILable("HTM")
(
popup "HTM"
(
default
menuitem "[:oconfig]HTM settings..." "HTM.state"
separator
menuitem "[:alist]HTMTrace List" "HTMTrace.List"
)
)
IF COMPonent.AVAILable("TPIU")
(
menuitem "[:oconfig]TPIU settings..." "TPIU.state"
)
IF COMPonent.AVAILable("ETR")
(
menuitem "[:oconfig]ETR settings..."
(
PRIVATE &pdd
&pdd=OS.PDD()
DO "&pdd/etc/embedded_trace_router/etr_utility.cmm"
)
)
)
popup "&Misc"
(
popup "Tools"
(
IF CPUIS64BIT()||CPU.FEATURE("SPR")
(
menuitem "ARM System Register Converter"
(
DO "~~/demo/arm/etc/systemregister/systemregister_converter.cmm"
)
)
IF CPU.FEATURE("C15")
(
menuitem "ARM Coprocessor Converter"
(
DO "~~/demo/arm/etc/coprocessor/coprocessor_converter.cmm"
)
)
)
)
popup "&Perf"
(
IF CPU.FEATURE(BMC)
(
before "Reset"
menuitem "[:bmc]Benchmark Counters" "BMC.state"
before "Reset"
separator
)
)
)
popup "Peripherals"
(
if (CORENAME()=="CORTEXM4F")
(
popup "[:chip]Core Registers (Cortex-M4F)"
(
menuitem "[:chip]System Control"                                "per , ""Core Registers (Cortex-M4F),System Control"""
menuitem "[:chip]MPU;Memory Protection Unit"                    "per , ""Core Registers (Cortex-M4F),Memory Protection Unit"""
menuitem "[:chip]NVIC;Nested Vectored Interrupt Controller"     "per , ""Core Registers (Cortex-M4F),Nested Vectored Interrupt Controller"""
menuitem "[:chip]FPU;Floating-point Unit"                       "per , ""Core Registers (Cortex-M4F),Floating-point Unit"""
popup "[:chip]Debug"
(
menuitem "[:chip]Core Debug"                                "per , ""Core Registers (Cortex-M4F),Debug,Core Debug"""
menuitem "[:chip]FPB;Flash Patch and Breakpoint Unit"       "per , ""Core Registers (Cortex-M4F),Debug,Flash Patch and Breakpoint Unit (FPB)"""
menuitem "[:chip]DWT;Data Watchpoint and Trace Unit"        "per , ""Core Registers (Cortex-M4F),Debug,Data Watchpoint and Trace Unit (DWT)"""
)
)
)
if (CORENAME()=="CORTEXA53")
(
popup "[:chip]Core Registers (Cortex-A53)"
(
menuitem "[:chip]ID Registers[AArch64]"                                     "per , ""Core Registers (Cortex-A53),AArch64,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch64]"                 "per , ""Core Registers (Cortex-A53),AArch64,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch64]"                        "per , ""Core Registers (Cortex-A53),AArch64,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch64]"                  "per , ""Core Registers (Cortex-A53),AArch64,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch64]"                       "per , ""Core Registers (Cortex-A53),AArch64,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch64]"                           "per , ""Core Registers (Cortex-A53),AArch64,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch64]"       "per , ""Core Registers (Cortex-A53),AArch64,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch64]"                                  "per , ""Core Registers (Cortex-A53),AArch64,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch64]"                             "per , ""Core Registers (Cortex-A53),AArch64,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch64]"                     "per , ""Core Registers (Cortex-A53),AArch64,Watchpoint Control Registers"""
separator
menuitem "[:chip]ID Registers[AArch32]"                                     "per , ""Core Registers (Cortex-A53),AArch32,ID Registers"""
menuitem "[:chip]System Control and Configuration[AArch32]"                 "per , ""Core Registers (Cortex-A53),AArch32,System Control and Configuration"""
menuitem "[:chip]Memory Management Unit[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,Memory Management Unit"""
menuitem "[:chip]Virtualization Extensions[AArch32]"                        "per , ""Core Registers (Cortex-A53),AArch32,Virtualization Extensions"""
menuitem "[:chip]Cache Control and Configuration[AArch32]"                  "per , ""Core Registers (Cortex-A53),AArch32,Cache Control and Configuration"""
menuitem "[:chip]System Performance Monitor[AArch32]"                       "per , ""Core Registers (Cortex-A53),AArch32,System Performance Monitor"""
menuitem "[:chip]System Timer Registers[AArch32]"                           "per , ""Core Registers (Cortex-A53),AArch32,System Timer Registers"""
menuitem "[:chip]Generic Interrupt Controller CPU Interface[AArch32]"       "per , ""Core Registers (Cortex-A53),AArch32,Generic Interrupt Controller CPU Interface"""
separator
menuitem "[:chip]Debug Registers[AArch32]"                                  "per , ""Core Registers (Cortex-A53),AArch32,Debug Registers"""
separator
menuitem "[:chip]Breakpoint Registers[AArch32]"                             "per , ""Core Registers (Cortex-A53),AArch32,Breakpoint Registers"""
menuitem "[:chip]Watchpoint Control Registers[AArch32]"                     "per , ""Core Registers (Cortex-A53),AArch32,Watchpoint Control Registers"""
separator
menuitem "[:chip]Interrupt Controller (GIC-500)"                            "per , ""Core Registers (Cortex-A53),Interrupt Controller (GIC-500)"""
)
)
separator
popup "Security"
(
menuitem "RDC"                                   "per , ""Security,RDC (Resources Domain Controller)"""
popup "RDC_SEMA42"
(
menuitem "RDC_SEMAPHORE_1"                   "per , ""Security,RDC_SEMA42 (Resources Domain Controller Semaphore),RDC_SEMAPHORE_1"""
menuitem "RDC_SEMAPHORE_2"                   "per , ""Security,RDC_SEMA42 (Resources Domain Controller Semaphore),RDC_SEMAPHORE_2"""
)
)
popup "Arm platform and debug"
(
menuitem "LMEM"                                  "per , ""ARM Platform and Debug,LMEM (Local Memory Controller)"""
menuitem "MCM"                                   "per , ""ARM Platform and Debug,MCM (Miscellaneous Control Module)"""
popup "MU"
(
menuitem "MUA"                               "per , ""ARM Platform and Debug,MU (Messaging Unit),MUA (MU Processor A-side"""
menuitem "MUB"                               "per , ""ARM Platform and Debug,MU (Messaging Unit),MUB (MU Processor B-side"""
)
menuitem "SEMA4"                                 "per , ""ARM Platform and Debug,SEMA4 (Semaphore)"""
menuitem "AIPSTZ"                                "per , ""ARM Platform and Debug,AIPSTZ (AHB to IP Bridge)"""
popup "SPBA"
(
menuitem "Channel 2"                         "per , ""ARM Platform and Debug,SPBA (Shared Peripheral Bus Arbiter),Channel 2"""
menuitem "Channel 1"                         "per , ""ARM Platform and Debug,SPBA (Shared Peripheral Bus Arbiter),Channel 1"""
)
menuitem "ROMPC"                                 "per , ""ARM Platform and Debug,ROMPC (ROM Controller with Patch)"""
popup "WDOG"
(
menuitem "Channel 1"                         "per , ""ARM Platform and Debug,WDOG (Watchdog Timer),Channel 1"""
menuitem "Channel 2"                         "per , ""ARM Platform and Debug,WDOG (Watchdog Timer),Channel 2"""
menuitem "Channel 3"                         "per , ""ARM Platform and Debug,WDOG (Watchdog Timer),Channel 3"""
)
menuitem "TZASC"                                 "per , ""ARM Platform and Debug,TZASC"""
)
popup "Clocks and Power Management"
(
menuitem "CCM"                                   "per , ""Clocks and Power Management,CCM (Clock Control Module)"""
menuitem "CCMA"                                  "per , ""Clocks and Power Management,CCMA (Clock Control Module Analog)"""
menuitem "GPC"                                   "per , ""Clocks and Power Management,GPC (General Power Controller)"""
menuitem "GPC_PGC"                               "per , ""Clocks and Power Management,GPC_PGC (General Power Controller - Power Gating Controller)"""
popup "XTALOSC"
(
menuitem "XTALOSC_OSC275"                    "per , ""Clocks and Power Management,XTALOSC (Crystal Oscillator),XTALOSC_OSC25M (25M Oscillator)"""
menuitem "XTALOSC_OSC27M"                    "per , ""Clocks and Power Management,XTALOSC (Crystal Oscillator),XTALOSC_OSC27M (27M Oscillator)"""
)
menuitem "TMU"                                   "per , ""Clocks and Power Management,TMU (Thermal Management Unit)"""
)
popup "SNVS/Reset/Fuse/Boot"
(
menuitem "OCOTP"                                 "per , ""SNVS and Reset and Fuse and Boot,OCOTP (On-chip OTP Controller)"""
menuitem "SNVS"                                  "per , ""SNVS and Reset and Fuse and Boot,SNVS (Secure Non-Volatile Storage)"""
menuitem "SRC"                                   "per , ""SNVS and Reset and Fuse and Boot,SRC (System Reset Controller)"""
)
popup "SDMAARM"
(
menuitem "SDMAARM1"                         "per , ""SDMA (Smart DIrect Memory Access Controller),SDMAARM (Smart Direct Memory Access - Arm Platform),SDMAARM1"""
menuitem "SDMAARM2"                         "per , ""SDMA (Smart DIrect Memory Access Controller),SDMAARM (Smart Direct Memory Access - Arm Platform),SDMAARM2"""
)
popup "Chip IO and Pinmux"
(
menuitem "IOMUXC_GPR"                            "per , ""Chip IO and Pinmux,IOMUXC_GPR (IOMUX Controller General Purpose Registers)"""
menuitem "IOMUXC"                                "per , ""Chip IO and Pinmux,IOMUXC (IOMUX Controller)"""
popup "GPIO"
(
menuitem "GPIO 1"                            "per , ""Chip IO and Pinmux,GPIO (General Purpose Input/Output),GPIO 1"""
menuitem "GPIO 2"                            "per , ""Chip IO and Pinmux,GPIO (General Purpose Input/Output),GPIO 2"""
menuitem "GPIO 3"                            "per , ""Chip IO and Pinmux,GPIO (General Purpose Input/Output),GPIO 3"""
menuitem "GPIO 4"                            "per , ""Chip IO and Pinmux,GPIO (General Purpose Input/Output),GPIO 4"""
menuitem "GPIO 5"                            "per , ""Chip IO and Pinmux,GPIO (General Purpose Input/Output),GPIO 5"""
)
)
popup "External Memory"
(
menuitem "DDRC"                                  "per , ""External Memory,DDRC (DDR Controller)"""
menuitem "APBH"                                  "per , ""External Memory,APBH (AHB-to-APBH Bridge with DMA)"""
menuitem "BCH"                                   "per , ""External Memory,BCH (62BIT Correcting ECC Accelrator)"""
menuitem "GPMI"                                  "per , ""External Memory,GPMI (General Purpose Media Interface)"""
)
popup "Mass Storage"
(
popup "ECSPI"
(
menuitem "ECSPI1"                            "per , ""Mass Storage,ECSPI (Enhanced Configurable SPI),ECSPI 1"""
menuitem "ECSPI2"                            "per , ""Mass Storage,ECSPI (Enhanced Configurable SPI),ECSPI 2"""
menuitem "ECSPI3"                            "per , ""Mass Storage,ECSPI (Enhanced Configurable SPI),ECSPI 3"""
)
menuitem "QuadSPI"                               "per , ""Mass Storage,QuadSPI (Quad Serial Peripheral Interface"""
popup "uSDHC"
(
menuitem "uSDHC1"                            "per , ""Mass Storage,uSDHC (Ultra Secured Digital Host Controller,uSDHC1"""
menuitem "uSDHC2"                            "per , ""Mass Storage,uSDHC (Ultra Secured Digital Host Controller,uSDHC2"""
)
)
popup "Connectivity"
(
popup "USB3.0"
(
menuitem "USB1"                              "per , ""Connectivity,USB3.0 (Universal Serial Bus Control 3.0),USB1"""
menuitem "USB2"                              "per , ""Connectivity,USB3.0 (Universal Serial Bus Control 3.0),USB2"""
)
popup "PCIe"
(
menuitem "PCIe 1"                            "per , ""Connectivity,PCIe (PCI express),PCIe 1"""
menuitem "PCIe 2"                            "per , ""Connectivity,PCIe (PCI express),PCIe 2"""
)
menuitem "ENET"                                  "per , ""Connectivity,ENET (Ethernet MAC)"""
)
popup "Timers"
(
popup "GPT"
(
menuitem "GPT1"                              "per , ""Timers,GPT (General Purpose Timer),GPT1"""
menuitem "GPT2"                              "per , ""Timers,GPT (General Purpose Timer),GPT2"""
menuitem "GPT3"                              "per , ""Timers,GPT (General Purpose Timer),GPT3"""
menuitem "GPT4"                              "per , ""Timers,GPT (General Purpose Timer),GPT4"""
menuitem "GPT5"                              "per , ""Timers,GPT (General Purpose Timer),GPT5"""
menuitem "GPT6"                              "per , ""Timers,GPT (General Purpose Timer),GPT6"""
)
popup "PWM"
(
menuitem "PWM1"                              "per , ""Timers,PWM (Pulse Width Modulation),PWM1"""
menuitem "PWM2"                              "per , ""Timers,PWM (Pulse Width Modulation),PWM2"""
)
)
popup "Multimedia"
(
menuitem "eLCDIF"                                "per , ""Multimedia,eLCDIF (Enhanced LCD Interface)"""
menuitem "HDMI TX"                               "per , ""Multimedia,HDMI TX (HD Display Transmitter Controller)"""
popup "MIPI_DSI"
(
menuitem "MIPI_DSI_HOST"                     "per , ""Multimedia,MIPI_DSI (MIPI DSI Host Controller),MIPI_DSI_HOST"""
menuitem "MIPI_DSI_HOST_DPI_INTFC"           "per , ""Multimedia,MIPI_DSI (MIPI DSI Host Controller),MIPI_DSI_HOST_DPI_INTFC"""
menuitem "MIPI_DSI_HOST_APB_PKT_IF"          "per , ""Multimedia,MIPI_DSI (MIPI DSI Host Controller),MIPI_DSI_HOST_APB_PKT_IF"""
menuitem "MIPI_DSI_HOST_FSL_IP1_DPHY_INTFC"  "per , ""Multimedia,MIPI_DSI (MIPI DSI Host Controller),MIPI_DSI_HOST_FSL_IP1_DPHY_INTFC"""
)
menuitem "MIPI_CSI"                              "per , ""Multimedia,MIPI_CSI (MIPI CSI Host Controller)"""
popup "SPDIF"
(
menuitem "SPDIF1"                            "per , ""Multimedia,SPDIF (Sony/Philips Digital Interface),SPDIF1"""
menuitem "SPDIF2"                            "per , ""Multimedia,SPDIF (Sony/Philips Digital Interface),SPDIF2"""
)
popup "SAI"
(
menuitem "SAI1"                              "per , ""Multimedia,SAI (Synchronous Audio Interface),SAI1"""
menuitem "SAI2"                              "per , ""Multimedia,SAI (Synchronous Audio Interface),SAI2"""
menuitem "SAI3"                              "per , ""Multimedia,SAI (Synchronous Audio Interface),SAI3"""
menuitem "SAI4"                              "per , ""Multimedia,SAI (Synchronous Audio Interface),SAI4"""
menuitem "SAI5"                              "per , ""Multimedia,SAI (Synchronous Audio Interface),SAI5"""
menuitem "SAI6"                              "per , ""Multimedia,SAI (Synchronous Audio Interface),SAI6"""
)
)
popup "VPU"
(
menuitem "VPU_G1"                            "per , ""VPU (Video Processing Unit),VPU_G1"""
menuitem "VPU_G2"                            "per , ""VPU (Video Processing Unit),VPU_G2"""
)
popup "Display Controller Subsystem"
(
menuitem "BLK_CTL"                               "per , ""Display Controller Subsystem,BLK_CTL (DCSS Block Control)"""
menuitem "DTG"                                   "per , ""Display Controller Subsystem,DTG (Display Timing Generator)"""
menuitem "CTX_LD"                                "per , ""Display Controller Subsystem,CTX_LD (Context Load)"""
menuitem "DEC400D"                               "per , ""Display Controller Subsystem,DEC400D (Graphics Decompression)"""
popup "DTRC"
(
menuitem "DTRC_CHAN2"                        "per , ""Display Controller Subsystem,DTRC (Decompression and Tile to Raster Conversion),DTRC_CHAN2"""
menuitem "DTRC_CHAN3"                        "per , ""Display Controller Subsystem,DTRC (Decompression and Tile to Raster Conversion),DTRC_CHAN3"""
)
popup "DPR"
(
menuitem "DPR1"                              "per , ""Display Controller Subsystem,DPR (Display Prefetch and Resolve),DPR1"""
menuitem "DPR2"                              "per , ""Display Controller Subsystem,DPR (Display Prefetch and Resolve),DPR2"""
menuitem "DPR3"                              "per , ""Display Controller Subsystem,DPR (Display Prefetch and Resolve),DPR3"""
)
menuitem "MED_DC_SCALE"                          "per , ""Display Controller Subsystem,MED_DC_SCALE (Scaler)"""
menuitem "LUT_LD"                                "per , ""Display Controller Subsystem,LUT_LD (Look Up Table Load)"""
menuitem "MED_HDR10"                             "per , ""Display Controller Subsystem,MED_HDR10 (HDR10 Image Processing)"""
menuitem "SUBSAM"                                "per , ""Display Controller Subsystem,SUBSAM (Color Sub-Sampler)"""
menuitem "WR_SCL"                                "per , ""Display Controller Subsystem,WR_SCL (Write Scale)"""
menuitem "RD_SRC"                                "per , ""Display Controller Subsystem,RD_SRC (Read Surface)"""
menuitem "IRQ_STEER"                             "per , ""Display Controller Subsystem,IRQ_STEER (Interrupt Request Steering)"""
)
popup "Low Speed Communication and Interconnects"
(
popup "I2C"
(
menuitem "I2C1"                              "per , ""Low Speed Communication and Interconnects,I2C (I2C Controller),I2C1"""
menuitem "I2C2"                              "per , ""Low Speed Communication and Interconnects,I2C (I2C Controller),I2C2"""
menuitem "I2C3"                              "per , ""Low Speed Communication and Interconnects,I2C (I2C Controller),I2C3"""
menuitem "I2C4"                              "per , ""Low Speed Communication and Interconnects,I2C (I2C Controller),I2C4"""
)
popup "UART"
(
menuitem "UART1"                             "per , ""Low Speed Communication and Interconnects,UART (Universal Asynchronous Receiver/Transmitter),UART1"""
menuitem "UART2"                             "per , ""Low Speed Communication and Interconnects,UART (Universal Asynchronous Receiver/Transmitter),UART2"""
menuitem "UART3"                             "per , ""Low Speed Communication and Interconnects,UART (Universal Asynchronous Receiver/Transmitter),UART3"""
menuitem "UART4"                             "per , ""Low Speed Communication and Interconnects,UART (Universal Asynchronous Receiver/Transmitter),UART4"""
)
)
)
)