; --------------------------------------------------------------------------------
; @Title: TXZ3 On-Chip Peripherals
; @Props: Released
; @Author: JON, KRZ, NEJ
; @Changelog: 2022-04-05 KRZ
;             2024-01-23 NEJ
; @Manufacturer: TOSHIBA - Toshiba
; @Doc: Generated (TRACE32, build: 166176.), based on:
;       M3HLA.svd (Ver. 0.1), M3HLB.svd (Ver. 0.1),
;       M3HMA.svd (Ver. 0.1), M3HMB.svd (Ver. 0.1),
;       M3HNB.svd (Ver. 0.1), M3HNB.svd (Ver. 0.1),
;       M3HPA.svd (Ver. 0.1), M3HPB.svd (Ver. 0.1),
;       M3HQA.svd (Ver. 0.1), M3HQB.svd (Ver. 0.1)
; @Core: Cortex-M3
; @Chip: TMPM3H0FMDUG, TMPM3H0FSDUG, TMPM3H1FPUG, TMPM3H1FSUG,
;        TMPM3H1FUUG, TMPM3H1FWUG, TMPM3H2FSDUG, TMPM3H2FSQG,
;        TMPM3H2FUDUG, TMPM3H2FUQG, TMPM3H2FWDUG, TMPM3H2FWQG,
;        TMPM3H3FSUG, TMPM3H3FUUG, TMPM3H3FWUG, TMPM3H4FSFG,
;        TMPM3H4FSUG, TMPM3H4FUFG, TMPM3H4FUUG, TMPM3H4FWFG,
;        TMPM3H4FWUG, TMPM3H5FSDFG, TMPM3H5FSFG, TMPM3H5FUDFG,
;        TMPM3H5FUFG, TMPM3H5FWDFG, TMPM3H5FWFG, TMPM3H6FSDFG,
;        TMPM3H6FSFG, TMPM3H6FUDFG, TMPM3H6FUFG, TMPM3H6FWDFG,
;        TMPM3H6FWFG, TMPM3HLF10BUG, TMPM3HLFDAUG, TMPM3HLFDUG,
;        TMPM3HLFYAUG, TMPM3HLFYUG, TMPM3HLFZAUG, TMPM3HLFZUG,
;        TMPM3HMF10BFG, TMPM3HMFDAFG, TMPM3HMFDFG, TMPM3HMFYAFG,
;        TMPM3HMFYFG, TMPM3HMFZAFG, TMPM3HMFZFG, TMPM3HNF10BDFG,
;        TMPM3HNF10BFG, TMPM3HNFDADFG, TMPM3HNFDAFG, TMPM3HNFDBFG,
;        TMPM3HNFDDFG, TMPM3HNFDFG, TMPM3HNFYADFG, TMPM3HNFYAFG,
;        TMPM3HNFYDFG, TMPM3HNFYFG, TMPM3HNFZADFG, TMPM3HNFZAFG,
;        TMPM3HNFZDFG, TMPM3HNFZFG, TMPM3HPF10BDFG, TMPM3HPF10BFG,
;        TMPM3HPFDADFG, TMPM3HPFDAFG, TMPM3HPFDFG, TMPM3HPFYADFG,
;        TMPM3HPFYAFG, TMPM3HPFYFG, TMPM3HPFZADFG, TMPM3HPFZAFG,
;        TMPM3HPFZFG, TMPM3HQF10BFG, TMPM3HQFDAFG, TMPM3HQFDFG,
;        TMPM3HQFYAFG, TMPM3HQFYFG, TMPM3HQFZAFG, TMPM3HQFZFG
; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pertxz3.per 17380 2024-01-25 10:09:14Z kwisniewski $

AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree.close "Core Registers (Cortex-M3)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
group 0x10--0x1b
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
bitfld.long 0x00 16. " COUNTFLAG    ,Counter Flag" "Not counted,Counted"
bitfld.long 0x00 2. "      CLKSOURCE       ,Clock Source" "External,Core"
bitfld.long 0x00 1. "                  TICKINT        ,SysTick Handler" "Not SysTick,SysTick"
textline "                    "
bitfld.long 0x00 0. " ENABLE       ,Counter Enable" "Disabled,Enabled"
;group 0x14++0x03
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD       ,The value to load into the SYST_CVR when the counter reaches 0"
;group 0x18++0x03
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT      ,Current Value"
rgroup 0x1c++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
bitfld.long 0x00 31. " NOREF        ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. "  SKEW            ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. "                   TENMS          ,Holds a reload value to be used for 10ms (100Hz) timing"
textline "                    "
rgroup 0xd00++0x03
line.long 0x00 "CPUID,CPU ID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER  ,Implementer Code"
bitfld.long 0x00 20.--23. "               VARIANT         ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "                        CONSTANT       ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                    "
hexmask.long.word 0x00 4.--15. 1. " PARTNO       ,Number of Processor"
bitfld.long 0x00 0.--3. "             REVISION        ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group 0xd04--0xd17
line.long 0x00 "ICSR,Interrupt Control State Register"
bitfld.long 0x00 31. " NMIPENDSET   ,Set Pending NMI Bit" "Not set,Set"
bitfld.long 0x00 28. "          PENDSVSET       ,Set Pending pendSV Bit" "Not set,Set"
bitfld.long 0x00 27. "                   PENDSVCLR      ,Clear Pending pendSV Bit" "Not cleared,Cleared"
textline "                    "
bitfld.long 0x00 26. " PENDSTSET    ,Set Pending SysTick Bit" "Not set,Set"
bitfld.long 0x00 25. "          PENDSTCLR       ,Clear Pending SysTick Bit" "Not cleared,Cleared"
bitfld.long 0x00 23. "               ISRPREEMPT     ,Use Only at Debug Time" "Not active,Active"
textline "                    "
bitfld.long 0x00 22. " ISRPENDING   ,Interrupt Pending Flag" "Not pending,Pending"
hexmask.long.word 0x00 12.--21. 1. "      VECTPENDING     ,Pending ISR Number Field"
bitfld.long 0x00 11. "                      RETTOBASE      ,Interrupt Exception" "Active,Not active"
textline "                    "
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE   ,Active ISR Number Field"
;group 0xd08++0x03
line.long 0x04 "VTOR,Vector Table Offset Register"
bitfld.long 0x04 29. " TBLBASE      ,Table Base" "Code,RAM"
hexmask.long.tbyte 0x04 7.--28. 1. "             TBLOFF          ,Vector Table Base Offset Field"
;group 0xd0c++0x03
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEY      ,Register Key"
rbitfld.long 0x08 15. "             ENDIANESS       ,Data endianness Bit" "Little,Big"
bitfld.long 0x08 8.--10. "                    PRIGROUP       ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
textline "                    "
bitfld.long 0x08 2. " SYSRESETREQ  ,System Reset Request" "Not requested,Requested"
bitfld.long 0x08 1. "    VECTCLRACTIVE   ,Clear Active Vector Bit" "Not cleared,Cleared all"
bitfld.long 0x08 0. "               VECTRESET      ,System Reset" "No reset,Reset"
;group 0xd10++0x03
line.long 0x0c "SCR,System Control Register"
bitfld.long 0x0c 4. " SEVONPEND    ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0c 2. "       SLEEPDEEP       ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline "                    "
bitfld.long 0x0c 1. " SLEEPONEXIT  ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
;group 0xd14++0x03
line.long 0x10 "CCR,Configuration Control Register"
bitfld.long 0x10 9. " STKALIGN     ,8-byte Stack Frame Alignment" "4-byte,8-byte"
bitfld.long 0x10 8. "           BFHFNMIGN       ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
textline "                    "
bitfld.long 0x10 4. " DIV_0_TRP    ,Trap Divide by Zero" "Disabled,Enabled"
bitfld.long 0x10 3. "         UNALIGN_TRP     ,Trap for Unaligned Access" "Disabled,Enabled"
textline "                    "
bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled"
bitfld.long 0x10 0. "         NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
group 0xd18--0xd23
line.long 0x00 "SHPR1,SSystem Handler Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " PRI_7        ,Priority of System Handler 7"
hexmask.long.byte 0x00 16.--23. 1. "               PRI_6           ,Priority of system handler 6(UsageFault)"
hexmask.long.byte 0x00 8.--15. 1. "                        PRI_5          ,Priority of system handler 5(BusFault)"
textline "                    "
hexmask.long.byte 0x00 0.--7. 1. " PRI_4        ,Priority of system handler 4(MemManage)"
line.long 0x04 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x04 24.--31. 1. " PRI_11       ,Priority of system handler 11(SVCall)"
hexmask.long.byte 0x04 16.--23. 1. "               PRI_10          ,Priority of System Handler 10"
hexmask.long.byte 0x04 8.--15. 1. "                        PRI_9          ,Priority of System Handler 9"
textline "                    "
hexmask.long.byte 0x04 0.--7. 1. " PRI_8        ,Priority of System Handler 8"
line.long 0x08 "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x08 24.--31. 1. " PRI_15       ,Priority of System Handler 15(SysTick)"
hexmask.long.byte 0x08 16.--23. 1. "               PRI_14          ,Priority of System Handler 14(PendSV)"
hexmask.long.byte 0x08 8.--15. 1. "                        PRI_13         ,Priority of System Handler 13"
textline "                    "
hexmask.long.byte 0x08 0.--7. 1. " PRI_12       ,Priority of System Handler 12(DebugMonitor)"
group 0xd24++0x3
line.long 0x00 "SHCSR,System Handler Control and State Register"
bitfld.long 0x00 18. " USGFAULTENA  ,USGFAULTENA" "Disabled,Enabled"
bitfld.long 0x00 17. "         BUSFAULTENA     ,BUSFAULTENA" "Disabled,Enabled"
bitfld.long 0x00 16. "                  MEMFAULTENA    ,MEMFAULTENA" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced"
bitfld.long 0x00 14. "     BUSFAULTPENDED  ,BusFault is Pended Started" "Not replaced,Replaced"
bitfld.long 0x00 13. "              MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced"
textline "                    "
bitfld.long 0x00 11. " SYSTICKACT   ,SysTick is Active" "Not active,Active"
bitfld.long 0x00 10. "       PENDSVACT       ,PendSV is Active" "Not active,Active"
bitfld.long 0x00 8. "                MONITORACT     ,Monitor is Active" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " SVCALLACT    ,SVCall is Active" "Not active,Active"
bitfld.long 0x00 3. "       USGFAULTACT     ,UsageFault is Active" "Not active,Active"
bitfld.long 0x00 1. "                BUSFAULTACT    ,BusFault is Active" "Not active,Active"
textline "                    "
bitfld.long 0x00 0. " MEMFAULTACT  ,MemManage is Active" "Not active,Active"
group 0xd28--0xd3b
line.byte 0x0 "MMFSR,Memory Manage Fault Status Register"
bitfld.byte 0x0 7. "       MMARVALID    ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x0 4. "        MSTKERR         ,Stacking Access Violations" "No error,Error"
bitfld.byte 0x0 3. "                  MUNSTKERR      ,Unstack Access Violations" "No error,Error"
textline "                    "
bitfld.byte 0x0 1. " DACCVIOL     ,Data Access Violation" "No error,Error"
bitfld.byte 0x0 0. "         IACCVIOL        ,Instruction Access Violation" "No error,Error"
;group 0xd29++0x00
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. "       BFARVALID    ,Address Valid" "Not valid,Valid"
bitfld.byte 0x01 4. "        STKERR          ,Stacking from Exception has Caused Bus Faults" "No error,Error"
bitfld.byte 0x01 3. "                  UNSTKERR       ,Unstack from Exception Return has Caused Bus Faults" "No error,Error"
textline "                    "
bitfld.byte 0x01 2. " IMPRECISERR  ,Imprecise Data Bus Error" "No error,Error"
bitfld.byte 0x01 1. "         PRECISERR       ,Precise Data Bus Error Return" "No error,Error"
bitfld.byte 0x01 0. "                  IBUSERR        ,Instruction Bus Error Flag" "No error,Error"
;group 0xd2a++0x01
line.word 0x02 "USAFAULT,Usage Fault Status Register"
bitfld.word 0x02 9. "     DIVBYZERO    ,Illegal PC Load" "No error,Error"
bitfld.word 0x02 8. "         UNALIGNED       ,Illegal Unaligned Access" "No error,Error"
bitfld.word 0x02 3. "                  NOCP           ,Attempt to use a coprocessor instruction" "No error,Error"
textline "                    "
bitfld.word 0x02 2. " INVPC        ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error"
bitfld.word 0x02 1. "         INVSTATE        , Invalid Combination of EPSR and Instruction" "No error,Error"
bitfld.word 0x02 0. "                  UNDEFINSTR     ,Illegal Processor State" "No error,Error"
;group 0xd2c++0x03
line.long 0x04 "HFSR,Hard Fault Status Register"
bitfld.long 0x04 31. " DEBUGEVT     ,This Bit is Set if There is a Fault Related to Debug" "No error,Error"
bitfld.long 0x04 30. "         FORCED          ,Hard Fault Activated" "No error,Error"
bitfld.long 0x04 1. "                  VECTTBL        ,Bus Fault" "No error,Error"
;group 0xd30++0x03
line.long 0x08 "DFSR,Debug Fault Status Register"
bitfld.long 0x08 4. " EXTERNAL     ,External Debug Request Flag" "Not asserted,Asserted"
bitfld.long 0x08 3. "     VCATCH          ,Vector Catch Flag" "Not occurred,Occurred"
bitfld.long 0x08 2. "              DWTTRAP        ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched"
textline "                    "
bitfld.long 0x08 1. " BKPT         ,BKPT Flag" "Not executed,Executed"
bitfld.long 0x08 0. "     HALTED          ,Halt Request Flag" "Not requested,Requested"
;group 0xd34++0x03
line.long 0xc "MMFAR,Memory Manage Fault Address Register"
;group 0xd38++0x03
line.long 0x10 "BFAR,Bus Fault Address Register"
wgroup 0xf00++0x03
line.long 0x00 "STIR,Software Trigger Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID        ,Indicates the interrupt to be triggered"
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1    ,Thumb instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. "              STATE0         ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF     ,M profile programmers' model" ",,2-stack,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " DBGMOD    ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
hgroup.long 0xD4C++0x03
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG    ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
bitfld.long 0x00 16.--19. "          TCMSUP         ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. "        SHRLEV    ,Indicates the number of shareability levels implemented" "Level 1,?..."
textline "                   "
bitfld.long 0x00 8.--11. " OUTMSHR   ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. "          PMSASUP        ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
hgroup.long 0xD54++0x03
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL  ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD60++0x13
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE    ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. "          DEBUG          ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. "        COPROC    ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
textline "                   "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. "          BITFIELD       ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. "    BITCOUNT  ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x04 20.--23. "          IMMEDIATE      ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x04 16.--19. "  IFTHEN    ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline "                   "
bitfld.long 0x04 12.--15. " EXTEND    ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x08 24.--27. " REVERSAL  ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x08 20.--23. "   MULTU          ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x08 16.--19. "    MULTS     ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
textline "                   "
bitfld.long 0x08 12.--15. " MULT      ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
bitfld.long 0x08 8.--11. "          MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x08 4.--7. "  MEMHINT   ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline "                   "
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x0C 24.--27. " TRUENOP   ,Indicates the support for a true  NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x0C 20.--23. "          THUMBCOPY      ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x0C 16.--19. "        TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline "                   "
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
bitfld.long 0x0C 8.--11. "          SVC            ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x0C 4.--7. "        SIMD      ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
textline "                   "
bitfld.long 0x0C 0.--3. " SATURATE  ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x10 24.--27. " PSR_M     ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
bitfld.long 0x10 20.--23. "          SYNCHPRIMFRAC  ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
bitfld.long 0x10 16.--19. "        BARRIER   ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
textline "                   "
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x10 4.--7. "          WITHSHIFTS     ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
bitfld.long 0x10 0.--3. "        UNPRIV    ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
tree.end
tree "CoreSight Identification Registers"
width 6.
rgroup.long 0xFE0++0x0F
line.long 0x00 "PID0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "PID1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. "  Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "PID2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision      ,Revision"
bitfld.long 0x08 3. "  JEDEC          ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. "  JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "PID3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd        ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. "  CMB            ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count         ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. "  JEP106_CC      ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "CID0,Component ID0 (Preamble)"
line.long 0x04 "CID1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC            ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. "  Preamble       ,Preamble"
line.long 0x08 "CID2,Component ID2"
line.long 0x0c "CID3,Component ID3"
tree.end
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 16.--23. " IREGION    ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 8.--15. "               DREGION   ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. "                    SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. "         HFNMIENA  ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. "          ENABLE   ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION     ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
textline "                        "
textline "                        "
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
bitfld.long 0x00 28. " XN         ,eXecute Never" "Execute,Not execute"
bitfld.long 0x00 24.--26. "      AP        ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
bitfld.long 0x00 19.--21. "             TEX      ,Type Extension Field" "0,1,2,3,4,5,6,7"
textline "                        "
bitfld.long 0x00 18. " S          ,Shareable Bit" "Not shareable,Shareable"
bitfld.long 0x00 17. "    C         ,Cacheable Bit" "Not cacheable,Cacheable"
bitfld.long 0x00 16. "         B        ,Bufferable Bit" "Not bufferable,Bufferable"
textline "                        "
bitfld.long 0x00 15. " SRD[7..0]  ,Subregion 7 Disable" "0,1"
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
bitfld.long 0x00 1.--5. "         SIZE      ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
bitfld.long 0x00 0. "                ENABLE   ,Enables this region" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
textline "                        "
textline "                        "
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
rgroup.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
tree "Interrupt Enable Registers"
width 23.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
group.long 0x100++0x7
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
group.long 0x100++0x0B
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
group.long 0x100++0x0F
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  ENA99  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  ENA98  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  ENA96  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
group.long 0x100++0x13
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  ENA99  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  ENA98  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  ENA96  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
group.long 0x100++0x17
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  ENA99  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  ENA98  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  ENA96  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 30. 0x14 30. 0x94 30. "  ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 29. 0x14 29. 0x94 29. "  ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 28. 0x14 28. 0x94 28. "  ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 27. 0x14 27. 0x94 27. "  ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 26. 0x14 26. 0x94 26. "  ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 24. 0x14 24. 0x94 24. "  ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 23. 0x14 23. 0x94 23. "  ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 22. 0x14 22. 0x94 22. "  ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 21. 0x14 21. 0x94 21. "  ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 20. 0x14 20. 0x94 20. "  ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 18. 0x14 18. 0x94 18. "  ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 17. 0x14 17. 0x94 17. "  ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 16. 0x14 16. 0x94 16. "  ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 15. 0x14 15. 0x94 15. "  ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 14. 0x14 14. 0x94 14. "  ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 12. 0x14 12. 0x94 12. "  ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 11. 0x14 11. 0x94 11. "  ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 10. 0x14 10. 0x94 10. "  ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 9. 0x14 9. 0x94 9. "  ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 8. 0x14 8. 0x94 8. "  ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 6. 0x14 6. 0x94 6. "  ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 5. 0x14 5. 0x94 5. "  ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 4. 0x14 4. 0x94 4. "  ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 3. 0x14 3. 0x94 3. "  ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 2. 0x14 2. 0x94 2. "  ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 0. 0x14 0. 0x94 0. "  ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
group.long 0x100++0x1B
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  ENA99  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  ENA98  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  ENA96  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 30. 0x14 30. 0x94 30. "  ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 29. 0x14 29. 0x94 29. "  ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 28. 0x14 28. 0x94 28. "  ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 27. 0x14 27. 0x94 27. "  ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 26. 0x14 26. 0x94 26. "  ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 24. 0x14 24. 0x94 24. "  ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 23. 0x14 23. 0x94 23. "  ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 22. 0x14 22. 0x94 22. "  ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 21. 0x14 21. 0x94 21. "  ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 20. 0x14 20. 0x94 20. "  ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 18. 0x14 18. 0x94 18. "  ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 17. 0x14 17. 0x94 17. "  ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 16. 0x14 16. 0x94 16. "  ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 15. 0x14 15. 0x94 15. "  ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 14. 0x14 14. 0x94 14. "  ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 12. 0x14 12. 0x94 12. "  ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 11. 0x14 11. 0x94 11. "  ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 10. 0x14 10. 0x94 10. "  ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 9. 0x14 9. 0x94 9. "  ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 8. 0x14 8. 0x94 8. "  ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 6. 0x14 6. 0x94 6. "  ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 5. 0x14 5. 0x94 5. "  ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 4. 0x14 4. 0x94 4. "  ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 3. 0x14 3. 0x94 3. "  ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 2. 0x14 2. 0x94 2. "  ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 0. 0x14 0. 0x94 0. "  ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 30. 0x18 30. 0x98 30. "  ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 29. 0x18 29. 0x98 29. "  ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 28. 0x18 28. 0x98 28. "  ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 27. 0x18 27. 0x98 27. "  ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 26. 0x18 26. 0x98 26. "  ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 24. 0x18 24. 0x98 24. "  ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 23. 0x18 23. 0x98 23. "  ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 22. 0x18 22. 0x98 22. "  ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 21. 0x18 21. 0x98 21. "  ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 20. 0x18 20. 0x98 20. "  ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 18. 0x18 18. 0x98 18. "  ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 17. 0x18 17. 0x98 17. "  ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 16. 0x18 16. 0x98 16. "  ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 15. 0x18 15. 0x98 15. "  ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 14. 0x18 14. 0x98 14. "  ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 12. 0x18 12. 0x98 12. "  ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 11. 0x18 11. 0x98 11. "  ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 10. 0x18 10. 0x98 10. "  ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 9. 0x18 9. 0x98 9. "  ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 8. 0x18 8. 0x98 8. "  ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 6. 0x18 6. 0x98 6. "  ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 5. 0x18 5. 0x98 5. "  ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 4. 0x18 4. 0x98 4. "  ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 3. 0x18 3. 0x98 3. "  ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 2. 0x18 2. 0x98 2. "  ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 0. 0x18 0. 0x98 0. "  ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
group.long 0x100++0x1F
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  ENA99  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  ENA98  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  ENA96  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 30. 0x14 30. 0x94 30. "  ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 29. 0x14 29. 0x94 29. "  ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 28. 0x14 28. 0x94 28. "  ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 27. 0x14 27. 0x94 27. "  ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 26. 0x14 26. 0x94 26. "  ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 24. 0x14 24. 0x94 24. "  ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 23. 0x14 23. 0x94 23. "  ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 22. 0x14 22. 0x94 22. "  ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 21. 0x14 21. 0x94 21. "  ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 20. 0x14 20. 0x94 20. "  ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 18. 0x14 18. 0x94 18. "  ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 17. 0x14 17. 0x94 17. "  ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 16. 0x14 16. 0x94 16. "  ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 15. 0x14 15. 0x94 15. "  ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 14. 0x14 14. 0x94 14. "  ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 12. 0x14 12. 0x94 12. "  ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 11. 0x14 11. 0x94 11. "  ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 10. 0x14 10. 0x94 10. "  ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 9. 0x14 9. 0x94 9. "  ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 8. 0x14 8. 0x94 8. "  ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 6. 0x14 6. 0x94 6. "  ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 5. 0x14 5. 0x94 5. "  ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 4. 0x14 4. 0x94 4. "  ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 3. 0x14 3. 0x94 3. "  ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 2. 0x14 2. 0x94 2. "  ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x14 0. 0x14 0. 0x94 0. "  ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 30. 0x18 30. 0x98 30. "  ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 29. 0x18 29. 0x98 29. "  ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 28. 0x18 28. 0x98 28. "  ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 27. 0x18 27. 0x98 27. "  ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 26. 0x18 26. 0x98 26. "  ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 24. 0x18 24. 0x98 24. "  ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 23. 0x18 23. 0x98 23. "  ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 22. 0x18 22. 0x98 22. "  ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 21. 0x18 21. 0x98 21. "  ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 20. 0x18 20. 0x98 20. "  ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 18. 0x18 18. 0x98 18. "  ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 17. 0x18 17. 0x98 17. "  ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 16. 0x18 16. 0x98 16. "  ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 15. 0x18 15. 0x98 15. "  ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 14. 0x18 14. 0x98 14. "  ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 12. 0x18 12. 0x98 12. "  ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 11. 0x18 11. 0x98 11. "  ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 10. 0x18 10. 0x98 10. "  ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 9. 0x18 9. 0x98 9. "  ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 8. 0x18 8. 0x98 8. "  ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 6. 0x18 6. 0x98 6. "  ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 5. 0x18 5. 0x98 5. "  ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 4. 0x18 4. 0x98 4. "  ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 3. 0x18 3. 0x98 3. "  ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 2. 0x18 2. 0x98 2. "  ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x18 0. 0x18 0. 0x98 0. "  ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. "  ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. "  ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. "  ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. "  ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. "  ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. "  ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. "  ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. "  ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. "  ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. "  ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                "
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. "  ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. "  ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. "  ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x100++0x1F
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
tree "Interrupt Pending Registers"
width 23.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
group.long 0x200++0x07
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
group.long 0x200++0x0B
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
group.long 0x200++0x0F
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  PEN99  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  PEN98  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  PEN96  ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
group.long 0x200++0x13
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  PEN99  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  PEN98  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  PEN96  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
group.long 0x200++0x17
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  PEN99  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  PEN98  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  PEN96  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 30. 0x14 30. 0x94 30. "  PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 29. 0x14 29. 0x94 29. "  PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 28. 0x14 28. 0x94 28. "  PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 27. 0x14 27. 0x94 27. "  PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 26. 0x14 26. 0x94 26. "  PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 24. 0x14 24. 0x94 24. "  PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 23. 0x14 23. 0x94 23. "  PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 22. 0x14 22. 0x94 22. "  PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 21. 0x14 21. 0x94 21. "  PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 20. 0x14 20. 0x94 20. "  PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 18. 0x14 18. 0x94 18. "  PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 17. 0x14 17. 0x94 17. "  PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 16. 0x14 16. 0x94 16. "  PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 15. 0x14 15. 0x94 15. "  PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 14. 0x14 14. 0x94 14. "  PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 12. 0x14 12. 0x94 12. "  PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 11. 0x14 11. 0x94 11. "  PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 10. 0x14 10. 0x94 10. "  PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 9. 0x14 9. 0x94 9. "  PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 8. 0x14 8. 0x94 8. "  PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 6. 0x14 6. 0x94 6. "  PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 5. 0x14 5. 0x94 5. "  PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 4. 0x14 4. 0x94 4. "  PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 3. 0x14 3. 0x94 3. "  PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 2. 0x14 2. 0x94 2. "  PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 0. 0x14 0. 0x94 0. "  PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
group.long 0x200++0x1B
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  PEN99  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  PEN98  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  PEN96  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 30. 0x14 30. 0x94 30. "  PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 29. 0x14 29. 0x94 29. "  PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 28. 0x14 28. 0x94 28. "  PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 27. 0x14 27. 0x94 27. "  PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 26. 0x14 26. 0x94 26. "  PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 24. 0x14 24. 0x94 24. "  PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 23. 0x14 23. 0x94 23. "  PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 22. 0x14 22. 0x94 22. "  PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 21. 0x14 21. 0x94 21. "  PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 20. 0x14 20. 0x94 20. "  PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 18. 0x14 18. 0x94 18. "  PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 17. 0x14 17. 0x94 17. "  PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 16. 0x14 16. 0x94 16. "  PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 15. 0x14 15. 0x94 15. "  PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 14. 0x14 14. 0x94 14. "  PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 12. 0x14 12. 0x94 12. "  PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 11. 0x14 11. 0x94 11. "  PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 10. 0x14 10. 0x94 10. "  PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 9. 0x14 9. 0x94 9. "  PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 8. 0x14 8. 0x94 8. "  PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 6. 0x14 6. 0x94 6. "  PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 5. 0x14 5. 0x94 5. "  PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 4. 0x14 4. 0x94 4. "  PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 3. 0x14 3. 0x94 3. "  PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 2. 0x14 2. 0x94 2. "  PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 0. 0x14 0. 0x94 0. "  PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 30. 0x18 30. 0x98 30. "  PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 29. 0x18 29. 0x98 29. "  PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 28. 0x18 28. 0x98 28. "  PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 27. 0x18 27. 0x98 27. "  PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 26. 0x18 26. 0x98 26. "  PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 24. 0x18 24. 0x98 24. "  PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 23. 0x18 23. 0x98 23. "  PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 22. 0x18 22. 0x98 22. "  PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 21. 0x18 21. 0x98 21. "  PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 20. 0x18 20. 0x98 20. "  PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 18. 0x18 18. 0x98 18. "  PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 17. 0x18 17. 0x98 17. "  PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 16. 0x18 16. 0x98 16. "  PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 15. 0x18 15. 0x98 15. "  PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 14. 0x18 14. 0x98 14. "  PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 12. 0x18 12. 0x98 12. "  PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 11. 0x18 11. 0x98 11. "  PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 10. 0x18 10. 0x98 10. "  PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 9. 0x18 9. 0x98 9. "  PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 8. 0x18 8. 0x98 8. "  PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 6. 0x18 6. 0x98 6. "  PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 5. 0x18 5. 0x98 5. "  PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 4. 0x18 4. 0x98 4. "  PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 3. 0x18 3. 0x98 3. "  PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 2. 0x18 2. 0x98 2. "  PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 0. 0x18 0. 0x98 0. "  PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
group.long 0x200++0x1F
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 30. 0x04 30. 0x84 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 29. 0x04 29. 0x84 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 28. 0x04 28. 0x84 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 27. 0x04 27. 0x84 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 26. 0x04 26. 0x84 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 24. 0x04 24. 0x84 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 23. 0x04 23. 0x84 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 22. 0x04 22. 0x84 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 21. 0x04 21. 0x84 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 20. 0x04 20. 0x84 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 18. 0x04 18. 0x84 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 17. 0x04 17. 0x84 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 16. 0x04 16. 0x84 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 15. 0x04 15. 0x84 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 14. 0x04 14. 0x84 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 12. 0x04 12. 0x84 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 11. 0x04 11. 0x84 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 10. 0x04 10. 0x84 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 9. 0x04 9. 0x84 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 8. 0x04 8. 0x84 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 6. 0x04 6. 0x84 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 5. 0x04 5. 0x84 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 4. 0x04 4. 0x84 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 3. 0x04 3. 0x84 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 2. 0x04 2. 0x84 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x04 0. 0x04 0. 0x84 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 30. 0x08 30. 0x88 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 29. 0x08 29. 0x88 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 28. 0x08 28. 0x88 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 27. 0x08 27. 0x88 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 26. 0x08 26. 0x88 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 24. 0x08 24. 0x88 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 23. 0x08 23. 0x88 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 22. 0x08 22. 0x88 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 21. 0x08 21. 0x88 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 20. 0x08 20. 0x88 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 18. 0x08 18. 0x88 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 17. 0x08 17. 0x88 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 16. 0x08 16. 0x88 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 15. 0x08 15. 0x88 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 14. 0x08 14. 0x88 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 12. 0x08 12. 0x88 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 11. 0x08 11. 0x88 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 10. 0x08 10. 0x88 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 9. 0x08 9. 0x88 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 8. 0x08 8. 0x88 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 6. 0x08 6. 0x88 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 5. 0x08 5. 0x88 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 4. 0x08 4. 0x88 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 3. 0x08 3. 0x88 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 2. 0x08 2. 0x88 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x08 0. 0x08 0. 0x88 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. "  PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. "  PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. "  PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. "  PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. "  PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. "  PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. "  PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. "  PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. "  PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. "  PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. "  PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. "  PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. "  PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. "  PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. "  PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. "  PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. "  PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. "  PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. "  PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. "  PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. "  PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. "  PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. "  PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. "  PEN99  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. "  PEN98  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. "  PEN96  ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 30. 0x10 30. 0x90 30. "  PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 29. 0x10 29. 0x90 29. "  PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 28. 0x10 28. 0x90 28. "  PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 27. 0x10 27. 0x90 27. "  PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 26. 0x10 26. 0x90 26. "  PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 24. 0x10 24. 0x90 24. "  PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 23. 0x10 23. 0x90 23. "  PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 22. 0x10 22. 0x90 22. "  PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 21. 0x10 21. 0x90 21. "  PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 20. 0x10 20. 0x90 20. "  PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 18. 0x10 18. 0x90 18. "  PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 17. 0x10 17. 0x90 17. "  PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 16. 0x10 16. 0x90 16. "  PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 15. 0x10 15. 0x90 15. "  PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 14. 0x10 14. 0x90 14. "  PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 12. 0x10 12. 0x90 12. "  PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 11. 0x10 11. 0x90 11. "  PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 10. 0x10 10. 0x90 10. "  PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 9. 0x10 9. 0x90 9. "  PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 8. 0x10 8. 0x90 8. "  PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 6. 0x10 6. 0x90 6. "  PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 5. 0x10 5. 0x90 5. "  PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 4. 0x10 4. 0x90 4. "  PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 3. 0x10 3. 0x90 3. "  PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 2. 0x10 2. 0x90 2. "  PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x10 0. 0x10 0. 0x90 0. "  PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 30. 0x14 30. 0x94 30. "  PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 29. 0x14 29. 0x94 29. "  PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 28. 0x14 28. 0x94 28. "  PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 27. 0x14 27. 0x94 27. "  PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 26. 0x14 26. 0x94 26. "  PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 24. 0x14 24. 0x94 24. "  PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 23. 0x14 23. 0x94 23. "  PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 22. 0x14 22. 0x94 22. "  PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 21. 0x14 21. 0x94 21. "  PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 20. 0x14 20. 0x94 20. "  PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 18. 0x14 18. 0x94 18. "  PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 17. 0x14 17. 0x94 17. "  PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 16. 0x14 16. 0x94 16. "  PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 15. 0x14 15. 0x94 15. "  PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 14. 0x14 14. 0x94 14. "  PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 12. 0x14 12. 0x94 12. "  PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 11. 0x14 11. 0x94 11. "  PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 10. 0x14 10. 0x94 10. "  PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 9. 0x14 9. 0x94 9. "  PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 8. 0x14 8. 0x94 8. "  PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 6. 0x14 6. 0x94 6. "  PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 5. 0x14 5. 0x94 5. "  PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 4. 0x14 4. 0x94 4. "  PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 3. 0x14 3. 0x94 3. "  PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 2. 0x14 2. 0x94 2. "  PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x14 0. 0x14 0. 0x94 0. "  PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 30. 0x18 30. 0x98 30. "  PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 29. 0x18 29. 0x98 29. "  PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 28. 0x18 28. 0x98 28. "  PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 27. 0x18 27. 0x98 27. "  PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 26. 0x18 26. 0x98 26. "  PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 24. 0x18 24. 0x98 24. "  PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 23. 0x18 23. 0x98 23. "  PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 22. 0x18 22. 0x98 22. "  PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 21. 0x18 21. 0x98 21. "  PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 20. 0x18 20. 0x98 20. "  PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 18. 0x18 18. 0x98 18. "  PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 17. 0x18 17. 0x98 17. "  PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 16. 0x18 16. 0x98 16. "  PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 15. 0x18 15. 0x98 15. "  PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 14. 0x18 14. 0x98 14. "  PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 12. 0x18 12. 0x98 12. "  PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 11. 0x18 11. 0x98 11. "  PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 10. 0x18 10. 0x98 10. "  PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 9. 0x18 9. 0x98 9. "  PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 8. 0x18 8. 0x98 8. "  PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 6. 0x18 6. 0x98 6. "  PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 5. 0x18 5. 0x98 5. "  PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 4. 0x18 4. 0x98 4. "  PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 3. 0x18 3. 0x98 3. "  PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 2. 0x18 2. 0x98 2. "  PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x18 0. 0x18 0. 0x98 0. "  PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. "  PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. "  PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. "  PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. "  PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. "  PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. "  PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. "  PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. "  PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. "  PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. "  PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                "
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. "  PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. "  PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. "  PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x200++0x1F
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
tree "Interrupt Active Bit Registers"
width 9.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
rgroup.long 0x300++0x07
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
rgroup.long 0x300++0x0B
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
line.long 0x08 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x08 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
rgroup.long 0x300++0x0F
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
line.long 0x08 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x08 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
line.long 0x0c "ACTIVE4,Active Bit Register 4"
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 30. "  ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 29. "  ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 28. "  ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 27. "  ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 26. "  ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 24. "  ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 23. "  ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 22. "  ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 21. "  ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 20. "  ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 18. "  ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 17. "  ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 16. "  ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 15. "  ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 14. "  ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 12. "  ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 11. "  ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 10. "  ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 9. "  ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 8. "  ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 6. "  ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 5. "  ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 4. "  ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 3. "  ACTIVE99  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 2. "  ACTIVE98  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 1. " ACTIVE97  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 0. "  ACTIVE96  ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
rgroup.long 0x300++0x13
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
line.long 0x08 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x08 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
line.long 0x0c "ACTIVE4,Active Bit Register 4"
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 30. "  ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 29. "  ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 28. "  ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 27. "  ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 26. "  ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 24. "  ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 23. "  ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 22. "  ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 21. "  ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 20. "  ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 18. "  ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 17. "  ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 16. "  ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 15. "  ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 14. "  ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 12. "  ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 11. "  ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 10. "  ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 9. "  ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 8. "  ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 6. "  ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 5. "  ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 4. "  ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 3. "  ACTIVE99  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 2. "  ACTIVE98  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 1. " ACTIVE97  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 0. "  ACTIVE96  ,Interrupt Active Flag" "Not active,Active"
line.long 0x10 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 30. "  ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 29. "  ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 28. "  ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 27. "  ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 26. "  ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 24. "  ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 23. "  ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 22. "  ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 21. "  ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 20. "  ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 18. "  ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 17. "  ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 16. "  ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 15. "  ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 14. "  ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 12. "  ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 11. "  ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 10. "  ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 9. "  ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 8. "  ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 6. "  ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 5. "  ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 4. "  ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 3. "  ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 2. "  ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 0. "  ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
rgroup.long 0x300++0x17
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
line.long 0x08 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x08 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
line.long 0x0c "ACTIVE4,Active Bit Register 4"
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 30. "  ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 29. "  ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 28. "  ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 27. "  ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 26. "  ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 24. "  ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 23. "  ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 22. "  ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 21. "  ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 20. "  ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 18. "  ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 17. "  ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 16. "  ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 15. "  ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 14. "  ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 12. "  ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 11. "  ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 10. "  ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 9. "  ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 8. "  ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 6. "  ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 5. "  ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 4. "  ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 3. "  ACTIVE99  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 2. "  ACTIVE98  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 1. " ACTIVE97  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 0. "  ACTIVE96  ,Interrupt Active Flag" "Not active,Active"
line.long 0x10 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 30. "  ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 29. "  ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 28. "  ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 27. "  ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 26. "  ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 24. "  ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 23. "  ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 22. "  ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 21. "  ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 20. "  ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 18. "  ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 17. "  ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 16. "  ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 15. "  ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 14. "  ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 12. "  ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 11. "  ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 10. "  ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 9. "  ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 8. "  ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 6. "  ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 5. "  ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 4. "  ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 3. "  ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 2. "  ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 0. "  ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
line.long 0x14 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 30. "  ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 29. "  ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 28. "  ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 27. "  ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 26. "  ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 24. "  ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 23. "  ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 22. "  ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 21. "  ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 20. "  ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 18. "  ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 17. "  ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 16. "  ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 15. "  ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 14. "  ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 12. "  ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 11. "  ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 10. "  ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 9. "  ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 8. "  ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 6. "  ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 5. "  ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 4. "  ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 3. "  ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 2. "  ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 0. "  ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
rgroup.long 0x300++0x1B
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
line.long 0x08 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x08 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
line.long 0x0c "ACTIVE4,Active Bit Register 4"
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 30. "  ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 29. "  ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 28. "  ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 27. "  ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 26. "  ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 24. "  ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 23. "  ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 22. "  ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 21. "  ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 20. "  ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 18. "  ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 17. "  ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 16. "  ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 15. "  ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 14. "  ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 12. "  ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 11. "  ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 10. "  ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 9. "  ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 8. "  ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 6. "  ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 5. "  ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 4. "  ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 3. "  ACTIVE99  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 2. "  ACTIVE98  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 1. " ACTIVE97  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 0. "  ACTIVE96  ,Interrupt Active Flag" "Not active,Active"
line.long 0x10 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 30. "  ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 29. "  ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 28. "  ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 27. "  ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 26. "  ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 24. "  ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 23. "  ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 22. "  ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 21. "  ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 20. "  ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 18. "  ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 17. "  ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 16. "  ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 15. "  ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 14. "  ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 12. "  ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 11. "  ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 10. "  ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 9. "  ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 8. "  ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 6. "  ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 5. "  ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 4. "  ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 3. "  ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 2. "  ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 0. "  ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
line.long 0x14 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 30. "  ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 29. "  ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 28. "  ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 27. "  ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 26. "  ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 24. "  ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 23. "  ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 22. "  ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 21. "  ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 20. "  ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 18. "  ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 17. "  ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 16. "  ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 15. "  ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 14. "  ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 12. "  ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 11. "  ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 10. "  ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 9. "  ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 8. "  ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 6. "  ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 5. "  ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 4. "  ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 3. "  ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 2. "  ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 0. "  ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
line.long 0x18 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 30. "  ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 29. "  ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 28. "  ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 27. "  ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 26. "  ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 24. "  ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 23. "  ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 22. "  ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 21. "  ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 20. "  ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 18. "  ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 17. "  ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 16. "  ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 15. "  ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 14. "  ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 12. "  ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 11. "  ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 10. "  ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 9. "  ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 8. "  ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 6. "  ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 5. "  ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 4. "  ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 3. "  ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 2. "  ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 0. "  ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
rgroup.long 0x300++0x1F
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
line.long 0x04 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x04 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x04 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x04 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
line.long 0x08 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x08 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x08 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x08 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
line.long 0x0c "ACTIVE4,Active Bit Register 4"
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 30. "  ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 29. "  ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 28. "  ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 27. "  ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 26. "  ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 24. "  ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 23. "  ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 22. "  ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 21. "  ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 20. "  ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 18. "  ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 17. "  ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 16. "  ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 15. "  ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 14. "  ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 12. "  ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 11. "  ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 10. "  ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 9. "  ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 8. "  ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 6. "  ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 5. "  ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 4. "  ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 3. "  ACTIVE99  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 2. "  ACTIVE98  ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x0c 1. " ACTIVE97  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x0c 0. "  ACTIVE96  ,Interrupt Active Flag" "Not active,Active"
line.long 0x10 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 30. "  ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 29. "  ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 28. "  ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 27. "  ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 26. "  ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 24. "  ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 23. "  ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 22. "  ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 21. "  ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 20. "  ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 18. "  ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 17. "  ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 16. "  ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 15. "  ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 14. "  ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 12. "  ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 11. "  ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 10. "  ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 9. "  ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 8. "  ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 6. "  ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 5. "  ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 4. "  ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 3. "  ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 2. "  ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x10 0. "  ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
line.long 0x14 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 30. "  ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 29. "  ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 28. "  ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 27. "  ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 26. "  ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 24. "  ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 23. "  ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 22. "  ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 21. "  ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 20. "  ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 18. "  ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 17. "  ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 16. "  ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 15. "  ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 14. "  ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 12. "  ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 11. "  ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 10. "  ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 9. "  ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 8. "  ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 6. "  ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 5. "  ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 4. "  ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 3. "  ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 2. "  ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x14 0. "  ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
line.long 0x18 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 30. "  ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 29. "  ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 28. "  ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 27. "  ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 26. "  ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 24. "  ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 23. "  ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 22. "  ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 21. "  ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 20. "  ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 18. "  ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 17. "  ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 16. "  ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 15. "  ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 14. "  ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 12. "  ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 11. "  ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 10. "  ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 9. "  ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 8. "  ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 6. "  ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 5. "  ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 4. "  ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 3. "  ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 2. "  ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x18 0. "  ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
line.long 0x1c "ACTIVE8,Active Bit Register 8"
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 14. "  ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 13. "  ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 12. "  ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 11. "  ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 10. "  ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 8. "  ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 7. "  ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 6. "  ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 5. "  ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 4. "  ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
textline "                  "
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 2. "  ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 1. "  ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x1c 0. "  ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x300++0x1F
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
endif
tree.end
tree "Interrupt Priority Registers"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
group.long 0x400++0x3F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
group.long 0x400++0x5F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
line.long 0x40 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x40 24.--31. 1. " PRI_67  ,Interrupt 67  Priority"
hexmask.long.byte 0x40 16.--23. 1. "  PRI_66  ,Interrupt 66  Priority"
hexmask.long.byte 0x40 8.--15. 1. "  PRI_65  ,Interrupt 65  Priority"
hexmask.long.byte 0x40 0.--7. 1. "  PRI_64  ,Interrupt 64  Priority"
line.long 0x44 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x44 24.--31. 1. " PRI_71  ,Interrupt 71  Priority"
hexmask.long.byte 0x44 16.--23. 1. "  PRI_70  ,Interrupt 70  Priority"
hexmask.long.byte 0x44 8.--15. 1. "  PRI_69  ,Interrupt 69  Priority"
hexmask.long.byte 0x44 0.--7. 1. "  PRI_68  ,Interrupt 68  Priority"
line.long 0x48 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x48 24.--31. 1. " PRI_75  ,Interrupt 75  Priority"
hexmask.long.byte 0x48 16.--23. 1. "  PRI_74  ,Interrupt 74  Priority"
hexmask.long.byte 0x48 8.--15. 1. "  PRI_73  ,Interrupt 73  Priority"
hexmask.long.byte 0x48 0.--7. 1. "  PRI_72  ,Interrupt 72  Priority"
line.long 0x4C "IPR19,Interrupt Priority Register"
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79  ,Interrupt 79  Priority"
hexmask.long.byte 0x4C 16.--23. 1. "  PRI_78  ,Interrupt 78  Priority"
hexmask.long.byte 0x4C 8.--15. 1. "  PRI_77  ,Interrupt 77  Priority"
hexmask.long.byte 0x4C 0.--7. 1. "  PRI_76  ,Interrupt 76  Priority"
line.long 0x50 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x50 24.--31. 1. " PRI_83  ,Interrupt 83  Priority"
hexmask.long.byte 0x50 16.--23. 1. "  PRI_82  ,Interrupt 82  Priority"
hexmask.long.byte 0x50 8.--15. 1. "  PRI_81  ,Interrupt 81  Priority"
hexmask.long.byte 0x50 0.--7. 1. "  PRI_80  ,Interrupt 80  Priority"
line.long 0x54 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x54 24.--31. 1. " PRI_87  ,Interrupt 87  Priority"
hexmask.long.byte 0x54 16.--23. 1. "  PRI_86  ,Interrupt 86  Priority"
hexmask.long.byte 0x54 8.--15. 1. "  PRI_85  ,Interrupt 85  Priority"
hexmask.long.byte 0x54 0.--7. 1. "  PRI_84  ,Interrupt 84  Priority"
line.long 0x58 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x58 24.--31. 1. " PRI_91  ,Interrupt 91  Priority"
hexmask.long.byte 0x58 16.--23. 1. "  PRI_90  ,Interrupt 90  Priority"
hexmask.long.byte 0x58 8.--15. 1. "  PRI_89  ,Interrupt 89  Priority"
hexmask.long.byte 0x58 0.--7. 1. "  PRI_88  ,Interrupt 88  Priority"
line.long 0x5C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95  ,Interrupt 95  Priority"
hexmask.long.byte 0x5C 16.--23. 1. "  PRI_94  ,Interrupt 94  Priority"
hexmask.long.byte 0x5C 8.--15. 1. "  PRI_93  ,Interrupt 93  Priority"
hexmask.long.byte 0x5C 0.--7. 1. "  PRI_92  ,Interrupt 92  Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
group.long 0x400++0x7F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
line.long 0x40 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x40 24.--31. 1. " PRI_67  ,Interrupt 67  Priority"
hexmask.long.byte 0x40 16.--23. 1. "  PRI_66  ,Interrupt 66  Priority"
hexmask.long.byte 0x40 8.--15. 1. "  PRI_65  ,Interrupt 65  Priority"
hexmask.long.byte 0x40 0.--7. 1. "  PRI_64  ,Interrupt 64  Priority"
line.long 0x44 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x44 24.--31. 1. " PRI_71  ,Interrupt 71  Priority"
hexmask.long.byte 0x44 16.--23. 1. "  PRI_70  ,Interrupt 70  Priority"
hexmask.long.byte 0x44 8.--15. 1. "  PRI_69  ,Interrupt 69  Priority"
hexmask.long.byte 0x44 0.--7. 1. "  PRI_68  ,Interrupt 68  Priority"
line.long 0x48 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x48 24.--31. 1. " PRI_75  ,Interrupt 75  Priority"
hexmask.long.byte 0x48 16.--23. 1. "  PRI_74  ,Interrupt 74  Priority"
hexmask.long.byte 0x48 8.--15. 1. "  PRI_73  ,Interrupt 73  Priority"
hexmask.long.byte 0x48 0.--7. 1. "  PRI_72  ,Interrupt 72  Priority"
line.long 0x4C "IPR19,Interrupt Priority Register"
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79  ,Interrupt 79  Priority"
hexmask.long.byte 0x4C 16.--23. 1. "  PRI_78  ,Interrupt 78  Priority"
hexmask.long.byte 0x4C 8.--15. 1. "  PRI_77  ,Interrupt 77  Priority"
hexmask.long.byte 0x4C 0.--7. 1. "  PRI_76  ,Interrupt 76  Priority"
line.long 0x50 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x50 24.--31. 1. " PRI_83  ,Interrupt 83  Priority"
hexmask.long.byte 0x50 16.--23. 1. "  PRI_82  ,Interrupt 82  Priority"
hexmask.long.byte 0x50 8.--15. 1. "  PRI_81  ,Interrupt 81  Priority"
hexmask.long.byte 0x50 0.--7. 1. "  PRI_80  ,Interrupt 80  Priority"
line.long 0x54 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x54 24.--31. 1. " PRI_87  ,Interrupt 87  Priority"
hexmask.long.byte 0x54 16.--23. 1. "  PRI_86  ,Interrupt 86  Priority"
hexmask.long.byte 0x54 8.--15. 1. "  PRI_85  ,Interrupt 85  Priority"
hexmask.long.byte 0x54 0.--7. 1. "  PRI_84  ,Interrupt 84  Priority"
line.long 0x58 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x58 24.--31. 1. " PRI_91  ,Interrupt 91  Priority"
hexmask.long.byte 0x58 16.--23. 1. "  PRI_90  ,Interrupt 90  Priority"
hexmask.long.byte 0x58 8.--15. 1. "  PRI_89  ,Interrupt 89  Priority"
hexmask.long.byte 0x58 0.--7. 1. "  PRI_88  ,Interrupt 88  Priority"
line.long 0x5C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95  ,Interrupt 95  Priority"
hexmask.long.byte 0x5C 16.--23. 1. "  PRI_94  ,Interrupt 94  Priority"
hexmask.long.byte 0x5C 8.--15. 1. "  PRI_93  ,Interrupt 93  Priority"
hexmask.long.byte 0x5C 0.--7. 1. "  PRI_92  ,Interrupt 92  Priority"
line.long 0x60 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x60 24.--31. 1. " PRI_99  ,Interrupt 99  Priority"
hexmask.long.byte 0x60 16.--23. 1. "  PRI_98  ,Interrupt 98  Priority"
hexmask.long.byte 0x60 8.--15. 1. "  PRI_97  ,Interrupt 97  Priority"
hexmask.long.byte 0x60 0.--7. 1. "  PRI_96  ,Interrupt 96  Priority"
line.long 0x64 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x64 16.--23. 1. "  PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x64 8.--15. 1. "  PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x64 0.--7. 1. "  PRI_100 ,Interrupt 100 Priority"
line.long 0x68 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x68 16.--23. 1. "  PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x68 8.--15. 1. "  PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x68 0.--7. 1. "  PRI_104 ,Interrupt 104 Priority"
line.long 0x6C "IPR27,Interrupt Priority Register"
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0x6C 16.--23. 1. "  PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0x6C 8.--15. 1. "  PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0x6C 0.--7. 1. "  PRI_108 ,Interrupt 108 Priority"
line.long 0x70 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x70 16.--23. 1. "  PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x70 8.--15. 1. "  PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x70 0.--7. 1. "  PRI_112 ,Interrupt 112 Priority"
line.long 0x74 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x74 16.--23. 1. "  PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x74 8.--15. 1. "  PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x74 0.--7. 1. "  PRI_116 ,Interrupt 116 Priority"
line.long 0x78 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x78 16.--23. 1. "  PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x78 8.--15. 1. "  PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x78 0.--7. 1. "  PRI_120 ,Interrupt 120 Priority"
line.long 0x7C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x7C 16.--23. 1. "  PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x7C 8.--15. 1. "  PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x7C 0.--7. 1. "  PRI_124 ,Interrupt 124 Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
group.long 0x400++0x9F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
line.long 0x40 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x40 24.--31. 1. " PRI_67  ,Interrupt 67  Priority"
hexmask.long.byte 0x40 16.--23. 1. "  PRI_66  ,Interrupt 66  Priority"
hexmask.long.byte 0x40 8.--15. 1. "  PRI_65  ,Interrupt 65  Priority"
hexmask.long.byte 0x40 0.--7. 1. "  PRI_64  ,Interrupt 64  Priority"
line.long 0x44 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x44 24.--31. 1. " PRI_71  ,Interrupt 71  Priority"
hexmask.long.byte 0x44 16.--23. 1. "  PRI_70  ,Interrupt 70  Priority"
hexmask.long.byte 0x44 8.--15. 1. "  PRI_69  ,Interrupt 69  Priority"
hexmask.long.byte 0x44 0.--7. 1. "  PRI_68  ,Interrupt 68  Priority"
line.long 0x48 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x48 24.--31. 1. " PRI_75  ,Interrupt 75  Priority"
hexmask.long.byte 0x48 16.--23. 1. "  PRI_74  ,Interrupt 74  Priority"
hexmask.long.byte 0x48 8.--15. 1. "  PRI_73  ,Interrupt 73  Priority"
hexmask.long.byte 0x48 0.--7. 1. "  PRI_72  ,Interrupt 72  Priority"
line.long 0x4C "IPR19,Interrupt Priority Register"
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79  ,Interrupt 79  Priority"
hexmask.long.byte 0x4C 16.--23. 1. "  PRI_78  ,Interrupt 78  Priority"
hexmask.long.byte 0x4C 8.--15. 1. "  PRI_77  ,Interrupt 77  Priority"
hexmask.long.byte 0x4C 0.--7. 1. "  PRI_76  ,Interrupt 76  Priority"
line.long 0x50 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x50 24.--31. 1. " PRI_83  ,Interrupt 83  Priority"
hexmask.long.byte 0x50 16.--23. 1. "  PRI_82  ,Interrupt 82  Priority"
hexmask.long.byte 0x50 8.--15. 1. "  PRI_81  ,Interrupt 81  Priority"
hexmask.long.byte 0x50 0.--7. 1. "  PRI_80  ,Interrupt 80  Priority"
line.long 0x54 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x54 24.--31. 1. " PRI_87  ,Interrupt 87  Priority"
hexmask.long.byte 0x54 16.--23. 1. "  PRI_86  ,Interrupt 86  Priority"
hexmask.long.byte 0x54 8.--15. 1. "  PRI_85  ,Interrupt 85  Priority"
hexmask.long.byte 0x54 0.--7. 1. "  PRI_84  ,Interrupt 84  Priority"
line.long 0x58 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x58 24.--31. 1. " PRI_91  ,Interrupt 91  Priority"
hexmask.long.byte 0x58 16.--23. 1. "  PRI_90  ,Interrupt 90  Priority"
hexmask.long.byte 0x58 8.--15. 1. "  PRI_89  ,Interrupt 89  Priority"
hexmask.long.byte 0x58 0.--7. 1. "  PRI_88  ,Interrupt 88  Priority"
line.long 0x5C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95  ,Interrupt 95  Priority"
hexmask.long.byte 0x5C 16.--23. 1. "  PRI_94  ,Interrupt 94  Priority"
hexmask.long.byte 0x5C 8.--15. 1. "  PRI_93  ,Interrupt 93  Priority"
hexmask.long.byte 0x5C 0.--7. 1. "  PRI_92  ,Interrupt 92  Priority"
line.long 0x60 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x60 24.--31. 1. " PRI_99  ,Interrupt 99  Priority"
hexmask.long.byte 0x60 16.--23. 1. "  PRI_98  ,Interrupt 98  Priority"
hexmask.long.byte 0x60 8.--15. 1. "  PRI_97  ,Interrupt 97  Priority"
hexmask.long.byte 0x60 0.--7. 1. "  PRI_96  ,Interrupt 96  Priority"
line.long 0x64 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x64 16.--23. 1. "  PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x64 8.--15. 1. "  PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x64 0.--7. 1. "  PRI_100 ,Interrupt 100 Priority"
line.long 0x68 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x68 16.--23. 1. "  PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x68 8.--15. 1. "  PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x68 0.--7. 1. "  PRI_104 ,Interrupt 104 Priority"
line.long 0x6C "IPR27,Interrupt Priority Register"
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0x6C 16.--23. 1. "  PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0x6C 8.--15. 1. "  PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0x6C 0.--7. 1. "  PRI_108 ,Interrupt 108 Priority"
line.long 0x70 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x70 16.--23. 1. "  PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x70 8.--15. 1. "  PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x70 0.--7. 1. "  PRI_112 ,Interrupt 112 Priority"
line.long 0x74 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x74 16.--23. 1. "  PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x74 8.--15. 1. "  PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x74 0.--7. 1. "  PRI_116 ,Interrupt 116 Priority"
line.long 0x78 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x78 16.--23. 1. "  PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x78 8.--15. 1. "  PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x78 0.--7. 1. "  PRI_120 ,Interrupt 120 Priority"
line.long 0x7C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x7C 16.--23. 1. "  PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x7C 8.--15. 1. "  PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x7C 0.--7. 1. "  PRI_124 ,Interrupt 124 Priority"
line.long 0x80 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x80 16.--23. 1. "  PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x80 8.--15. 1. "  PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x80 0.--7. 1. "  PRI_128 ,Interrupt 128 Priority"
line.long 0x84 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x84 16.--23. 1. "  PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x84 8.--15. 1. "  PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x84 0.--7. 1. "  PRI_132 ,Interrupt 132 Priority"
line.long 0x88 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x88 16.--23. 1. "  PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x88 8.--15. 1. "  PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x88 0.--7. 1. "  PRI_136 ,Interrupt 136 Priority"
line.long 0x8C "IPR35,Interrupt Priority Register"
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0x8C 16.--23. 1. "  PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0x8C 8.--15. 1. "  PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0x8C 0.--7. 1. "  PRI_140 ,Interrupt 140 Priority"
line.long 0x90 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x90 16.--23. 1. "  PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x90 8.--15. 1. "  PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x90 0.--7. 1. "  PRI_144 ,Interrupt 144 Priority"
line.long 0x94 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x94 16.--23. 1. "  PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x94 8.--15. 1. "  PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x94 0.--7. 1. "  PRI_148 ,Interrupt 148 Priority"
line.long 0x98 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x98 16.--23. 1. "  PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x98 8.--15. 1. "  PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x98 0.--7. 1. "  PRI_152 ,Interrupt 152 Priority"
line.long 0x9C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x9C 16.--23. 1. "  PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x9C 8.--15. 1. "  PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x9C 0.--7. 1. "  PRI_156 ,Interrupt 156 Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
group.long 0x400++0xBF
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
line.long 0x40 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x40 24.--31. 1. " PRI_67  ,Interrupt 67  Priority"
hexmask.long.byte 0x40 16.--23. 1. "  PRI_66  ,Interrupt 66  Priority"
hexmask.long.byte 0x40 8.--15. 1. "  PRI_65  ,Interrupt 65  Priority"
hexmask.long.byte 0x40 0.--7. 1. "  PRI_64  ,Interrupt 64  Priority"
line.long 0x44 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x44 24.--31. 1. " PRI_71  ,Interrupt 71  Priority"
hexmask.long.byte 0x44 16.--23. 1. "  PRI_70  ,Interrupt 70  Priority"
hexmask.long.byte 0x44 8.--15. 1. "  PRI_69  ,Interrupt 69  Priority"
hexmask.long.byte 0x44 0.--7. 1. "  PRI_68  ,Interrupt 68  Priority"
line.long 0x48 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x48 24.--31. 1. " PRI_75  ,Interrupt 75  Priority"
hexmask.long.byte 0x48 16.--23. 1. "  PRI_74  ,Interrupt 74  Priority"
hexmask.long.byte 0x48 8.--15. 1. "  PRI_73  ,Interrupt 73  Priority"
hexmask.long.byte 0x48 0.--7. 1. "  PRI_72  ,Interrupt 72  Priority"
line.long 0x4C "IPR19,Interrupt Priority Register"
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79  ,Interrupt 79  Priority"
hexmask.long.byte 0x4C 16.--23. 1. "  PRI_78  ,Interrupt 78  Priority"
hexmask.long.byte 0x4C 8.--15. 1. "  PRI_77  ,Interrupt 77  Priority"
hexmask.long.byte 0x4C 0.--7. 1. "  PRI_76  ,Interrupt 76  Priority"
line.long 0x50 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x50 24.--31. 1. " PRI_83  ,Interrupt 83  Priority"
hexmask.long.byte 0x50 16.--23. 1. "  PRI_82  ,Interrupt 82  Priority"
hexmask.long.byte 0x50 8.--15. 1. "  PRI_81  ,Interrupt 81  Priority"
hexmask.long.byte 0x50 0.--7. 1. "  PRI_80  ,Interrupt 80  Priority"
line.long 0x54 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x54 24.--31. 1. " PRI_87  ,Interrupt 87  Priority"
hexmask.long.byte 0x54 16.--23. 1. "  PRI_86  ,Interrupt 86  Priority"
hexmask.long.byte 0x54 8.--15. 1. "  PRI_85  ,Interrupt 85  Priority"
hexmask.long.byte 0x54 0.--7. 1. "  PRI_84  ,Interrupt 84  Priority"
line.long 0x58 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x58 24.--31. 1. " PRI_91  ,Interrupt 91  Priority"
hexmask.long.byte 0x58 16.--23. 1. "  PRI_90  ,Interrupt 90  Priority"
hexmask.long.byte 0x58 8.--15. 1. "  PRI_89  ,Interrupt 89  Priority"
hexmask.long.byte 0x58 0.--7. 1. "  PRI_88  ,Interrupt 88  Priority"
line.long 0x5C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95  ,Interrupt 95  Priority"
hexmask.long.byte 0x5C 16.--23. 1. "  PRI_94  ,Interrupt 94  Priority"
hexmask.long.byte 0x5C 8.--15. 1. "  PRI_93  ,Interrupt 93  Priority"
hexmask.long.byte 0x5C 0.--7. 1. "  PRI_92  ,Interrupt 92  Priority"
line.long 0x60 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x60 24.--31. 1. " PRI_99  ,Interrupt 99  Priority"
hexmask.long.byte 0x60 16.--23. 1. "  PRI_98  ,Interrupt 98  Priority"
hexmask.long.byte 0x60 8.--15. 1. "  PRI_97  ,Interrupt 97  Priority"
hexmask.long.byte 0x60 0.--7. 1. "  PRI_96  ,Interrupt 96  Priority"
line.long 0x64 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x64 16.--23. 1. "  PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x64 8.--15. 1. "  PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x64 0.--7. 1. "  PRI_100 ,Interrupt 100 Priority"
line.long 0x68 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x68 16.--23. 1. "  PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x68 8.--15. 1. "  PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x68 0.--7. 1. "  PRI_104 ,Interrupt 104 Priority"
line.long 0x6C "IPR27,Interrupt Priority Register"
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0x6C 16.--23. 1. "  PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0x6C 8.--15. 1. "  PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0x6C 0.--7. 1. "  PRI_108 ,Interrupt 108 Priority"
line.long 0x70 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x70 16.--23. 1. "  PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x70 8.--15. 1. "  PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x70 0.--7. 1. "  PRI_112 ,Interrupt 112 Priority"
line.long 0x74 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x74 16.--23. 1. "  PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x74 8.--15. 1. "  PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x74 0.--7. 1. "  PRI_116 ,Interrupt 116 Priority"
line.long 0x78 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x78 16.--23. 1. "  PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x78 8.--15. 1. "  PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x78 0.--7. 1. "  PRI_120 ,Interrupt 120 Priority"
line.long 0x7C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x7C 16.--23. 1. "  PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x7C 8.--15. 1. "  PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x7C 0.--7. 1. "  PRI_124 ,Interrupt 124 Priority"
line.long 0x80 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x80 16.--23. 1. "  PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x80 8.--15. 1. "  PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x80 0.--7. 1. "  PRI_128 ,Interrupt 128 Priority"
line.long 0x84 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x84 16.--23. 1. "  PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x84 8.--15. 1. "  PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x84 0.--7. 1. "  PRI_132 ,Interrupt 132 Priority"
line.long 0x88 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x88 16.--23. 1. "  PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x88 8.--15. 1. "  PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x88 0.--7. 1. "  PRI_136 ,Interrupt 136 Priority"
line.long 0x8C "IPR35,Interrupt Priority Register"
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0x8C 16.--23. 1. "  PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0x8C 8.--15. 1. "  PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0x8C 0.--7. 1. "  PRI_140 ,Interrupt 140 Priority"
line.long 0x90 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x90 16.--23. 1. "  PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x90 8.--15. 1. "  PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x90 0.--7. 1. "  PRI_144 ,Interrupt 144 Priority"
line.long 0x94 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x94 16.--23. 1. "  PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x94 8.--15. 1. "  PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x94 0.--7. 1. "  PRI_148 ,Interrupt 148 Priority"
line.long 0x98 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x98 16.--23. 1. "  PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x98 8.--15. 1. "  PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x98 0.--7. 1. "  PRI_152 ,Interrupt 152 Priority"
line.long 0x9C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x9C 16.--23. 1. "  PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x9C 8.--15. 1. "  PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x9C 0.--7. 1. "  PRI_156 ,Interrupt 156 Priority"
line.long 0xA0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0xA0 16.--23. 1. "  PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0xA0 8.--15. 1. "  PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0xA0 0.--7. 1. "  PRI_160 ,Interrupt 160 Priority"
line.long 0xA4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0xA4 16.--23. 1. "  PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0xA4 8.--15. 1. "  PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0xA4 0.--7. 1. "  PRI_164 ,Interrupt 164 Priority"
line.long 0xA8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0xA8 16.--23. 1. "  PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0xA8 8.--15. 1. "  PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0xA8 0.--7. 1. "  PRI_168 ,Interrupt 168 Priority"
line.long 0xAC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xAC 16.--23. 1. "  PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xAC 8.--15. 1. "  PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xAC 0.--7. 1. "  PRI_172 ,Interrupt 172 Priority"
line.long 0xB0 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0xB0 16.--23. 1. "  PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0xB0 8.--15. 1. "  PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0xB0 0.--7. 1. "  PRI_176 ,Interrupt 176 Priority"
line.long 0xB4 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0xB4 16.--23. 1. "  PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0xB4 8.--15. 1. "  PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0xB4 0.--7. 1. "  PRI_180 ,Interrupt 180 Priority"
line.long 0xB8 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0xB8 16.--23. 1. "  PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0xB8 8.--15. 1. "  PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0xB8 0.--7. 1. "  PRI_184 ,Interrupt 184 Priority"
line.long 0xBC "IPR47,Interrupt Priority Register"
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0xBC 16.--23. 1. "  PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0xBC 8.--15. 1. "  PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0xBC 0.--7. 1. "  PRI_188 ,Interrupt 188 Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
group.long 0x400++0xDF
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
line.long 0x40 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x40 24.--31. 1. " PRI_67  ,Interrupt 67  Priority"
hexmask.long.byte 0x40 16.--23. 1. "  PRI_66  ,Interrupt 66  Priority"
hexmask.long.byte 0x40 8.--15. 1. "  PRI_65  ,Interrupt 65  Priority"
hexmask.long.byte 0x40 0.--7. 1. "  PRI_64  ,Interrupt 64  Priority"
line.long 0x44 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x44 24.--31. 1. " PRI_71  ,Interrupt 71  Priority"
hexmask.long.byte 0x44 16.--23. 1. "  PRI_70  ,Interrupt 70  Priority"
hexmask.long.byte 0x44 8.--15. 1. "  PRI_69  ,Interrupt 69  Priority"
hexmask.long.byte 0x44 0.--7. 1. "  PRI_68  ,Interrupt 68  Priority"
line.long 0x48 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x48 24.--31. 1. " PRI_75  ,Interrupt 75  Priority"
hexmask.long.byte 0x48 16.--23. 1. "  PRI_74  ,Interrupt 74  Priority"
hexmask.long.byte 0x48 8.--15. 1. "  PRI_73  ,Interrupt 73  Priority"
hexmask.long.byte 0x48 0.--7. 1. "  PRI_72  ,Interrupt 72  Priority"
line.long 0x4C "IPR19,Interrupt Priority Register"
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79  ,Interrupt 79  Priority"
hexmask.long.byte 0x4C 16.--23. 1. "  PRI_78  ,Interrupt 78  Priority"
hexmask.long.byte 0x4C 8.--15. 1. "  PRI_77  ,Interrupt 77  Priority"
hexmask.long.byte 0x4C 0.--7. 1. "  PRI_76  ,Interrupt 76  Priority"
line.long 0x50 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x50 24.--31. 1. " PRI_83  ,Interrupt 83  Priority"
hexmask.long.byte 0x50 16.--23. 1. "  PRI_82  ,Interrupt 82  Priority"
hexmask.long.byte 0x50 8.--15. 1. "  PRI_81  ,Interrupt 81  Priority"
hexmask.long.byte 0x50 0.--7. 1. "  PRI_80  ,Interrupt 80  Priority"
line.long 0x54 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x54 24.--31. 1. " PRI_87  ,Interrupt 87  Priority"
hexmask.long.byte 0x54 16.--23. 1. "  PRI_86  ,Interrupt 86  Priority"
hexmask.long.byte 0x54 8.--15. 1. "  PRI_85  ,Interrupt 85  Priority"
hexmask.long.byte 0x54 0.--7. 1. "  PRI_84  ,Interrupt 84  Priority"
line.long 0x58 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x58 24.--31. 1. " PRI_91  ,Interrupt 91  Priority"
hexmask.long.byte 0x58 16.--23. 1. "  PRI_90  ,Interrupt 90  Priority"
hexmask.long.byte 0x58 8.--15. 1. "  PRI_89  ,Interrupt 89  Priority"
hexmask.long.byte 0x58 0.--7. 1. "  PRI_88  ,Interrupt 88  Priority"
line.long 0x5C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95  ,Interrupt 95  Priority"
hexmask.long.byte 0x5C 16.--23. 1. "  PRI_94  ,Interrupt 94  Priority"
hexmask.long.byte 0x5C 8.--15. 1. "  PRI_93  ,Interrupt 93  Priority"
hexmask.long.byte 0x5C 0.--7. 1. "  PRI_92  ,Interrupt 92  Priority"
line.long 0x60 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x60 24.--31. 1. " PRI_99  ,Interrupt 99  Priority"
hexmask.long.byte 0x60 16.--23. 1. "  PRI_98  ,Interrupt 98  Priority"
hexmask.long.byte 0x60 8.--15. 1. "  PRI_97  ,Interrupt 97  Priority"
hexmask.long.byte 0x60 0.--7. 1. "  PRI_96  ,Interrupt 96  Priority"
line.long 0x64 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x64 16.--23. 1. "  PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x64 8.--15. 1. "  PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x64 0.--7. 1. "  PRI_100 ,Interrupt 100 Priority"
line.long 0x68 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x68 16.--23. 1. "  PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x68 8.--15. 1. "  PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x68 0.--7. 1. "  PRI_104 ,Interrupt 104 Priority"
line.long 0x6C "IPR27,Interrupt Priority Register"
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0x6C 16.--23. 1. "  PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0x6C 8.--15. 1. "  PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0x6C 0.--7. 1. "  PRI_108 ,Interrupt 108 Priority"
line.long 0x70 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x70 16.--23. 1. "  PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x70 8.--15. 1. "  PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x70 0.--7. 1. "  PRI_112 ,Interrupt 112 Priority"
line.long 0x74 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x74 16.--23. 1. "  PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x74 8.--15. 1. "  PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x74 0.--7. 1. "  PRI_116 ,Interrupt 116 Priority"
line.long 0x78 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x78 16.--23. 1. "  PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x78 8.--15. 1. "  PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x78 0.--7. 1. "  PRI_120 ,Interrupt 120 Priority"
line.long 0x7C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x7C 16.--23. 1. "  PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x7C 8.--15. 1. "  PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x7C 0.--7. 1. "  PRI_124 ,Interrupt 124 Priority"
line.long 0x80 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x80 16.--23. 1. "  PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x80 8.--15. 1. "  PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x80 0.--7. 1. "  PRI_128 ,Interrupt 128 Priority"
line.long 0x84 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x84 16.--23. 1. "  PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x84 8.--15. 1. "  PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x84 0.--7. 1. "  PRI_132 ,Interrupt 132 Priority"
line.long 0x88 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x88 16.--23. 1. "  PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x88 8.--15. 1. "  PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x88 0.--7. 1. "  PRI_136 ,Interrupt 136 Priority"
line.long 0x8C "IPR35,Interrupt Priority Register"
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0x8C 16.--23. 1. "  PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0x8C 8.--15. 1. "  PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0x8C 0.--7. 1. "  PRI_140 ,Interrupt 140 Priority"
line.long 0x90 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x90 16.--23. 1. "  PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x90 8.--15. 1. "  PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x90 0.--7. 1. "  PRI_144 ,Interrupt 144 Priority"
line.long 0x94 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x94 16.--23. 1. "  PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x94 8.--15. 1. "  PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x94 0.--7. 1. "  PRI_148 ,Interrupt 148 Priority"
line.long 0x98 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x98 16.--23. 1. "  PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x98 8.--15. 1. "  PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x98 0.--7. 1. "  PRI_152 ,Interrupt 152 Priority"
line.long 0x9C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x9C 16.--23. 1. "  PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x9C 8.--15. 1. "  PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x9C 0.--7. 1. "  PRI_156 ,Interrupt 156 Priority"
line.long 0xA0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0xA0 16.--23. 1. "  PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0xA0 8.--15. 1. "  PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0xA0 0.--7. 1. "  PRI_160 ,Interrupt 160 Priority"
line.long 0xA4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0xA4 16.--23. 1. "  PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0xA4 8.--15. 1. "  PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0xA4 0.--7. 1. "  PRI_164 ,Interrupt 164 Priority"
line.long 0xA8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0xA8 16.--23. 1. "  PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0xA8 8.--15. 1. "  PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0xA8 0.--7. 1. "  PRI_168 ,Interrupt 168 Priority"
line.long 0xAC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xAC 16.--23. 1. "  PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xAC 8.--15. 1. "  PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xAC 0.--7. 1. "  PRI_172 ,Interrupt 172 Priority"
line.long 0xB0 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0xB0 16.--23. 1. "  PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0xB0 8.--15. 1. "  PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0xB0 0.--7. 1. "  PRI_176 ,Interrupt 176 Priority"
line.long 0xB4 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0xB4 16.--23. 1. "  PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0xB4 8.--15. 1. "  PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0xB4 0.--7. 1. "  PRI_180 ,Interrupt 180 Priority"
line.long 0xB8 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0xB8 16.--23. 1. "  PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0xB8 8.--15. 1. "  PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0xB8 0.--7. 1. "  PRI_184 ,Interrupt 184 Priority"
line.long 0xBC "IPR47,Interrupt Priority Register"
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0xBC 16.--23. 1. "  PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0xBC 8.--15. 1. "  PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0xBC 0.--7. 1. "  PRI_188 ,Interrupt 188 Priority"
line.long 0xC0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0xC0 16.--23. 1. "  PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0xC0 8.--15. 1. "  PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0xC0 0.--7. 1. "  PRI_192 ,Interrupt 192 Priority"
line.long 0xC4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0xC4 16.--23. 1. "  PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0xC4 8.--15. 1. "  PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0xC4 0.--7. 1. "  PRI_196 ,Interrupt 196 Priority"
line.long 0xC8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0xC8 16.--23. 1. "  PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0xC8 8.--15. 1. "  PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0xC8 0.--7. 1. "  PRI_200 ,Interrupt 200 Priority"
line.long 0xCC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xCC 16.--23. 1. "  PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xCC 8.--15. 1. "  PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xCC 0.--7. 1. "  PRI_204 ,Interrupt 204 Priority"
line.long 0xD0 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0xD0 16.--23. 1. "  PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0xD0 8.--15. 1. "  PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0xD0 0.--7. 1. "  PRI_208 ,Interrupt 208 Priority"
line.long 0xD4 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0xD4 16.--23. 1. "  PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0xD4 8.--15. 1. "  PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0xD4 0.--7. 1. "  PRI_212 ,Interrupt 212 Priority"
line.long 0xD8 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0xD8 16.--23. 1. "  PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0xD8 8.--15. 1. "  PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0xD8 0.--7. 1. "  PRI_216 ,Interrupt 216 Priority"
line.long 0xDC "IPR55,Interrupt Priority Register"
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0xDC 16.--23. 1. "  PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0xDC 8.--15. 1. "  PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0xDC 0.--7. 1. "  PRI_220 ,Interrupt 220 Priority"
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
group.long 0x400++0xEF
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2 ,Interrupt 2 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1 ,Interrupt 1 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0 ,Interrupt 0 Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6 ,Interrupt 6 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5 ,Interrupt 5 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4 ,Interrupt 4 Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10 ,Interrupt 10 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9 ,Interrupt 9 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8 ,Interrupt 8 Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14 ,Interrupt 14 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13 ,Interrupt 13 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12 ,Interrupt 12 Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18 ,Interrupt 18 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17 ,Interrupt 17 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16 ,Interrupt 16 Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22 ,Interrupt 22 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21 ,Interrupt 21 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20 ,Interrupt 20 Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26 ,Interrupt 26 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25 ,Interrupt 25 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24 ,Interrupt 24 Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30 ,Interrupt 30 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29 ,Interrupt 29 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28 ,Interrupt 28 Priority"
line.long 0x20 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
hexmask.long.byte 0x20 16.--23. 1. "  PRI_34 ,Interrupt 34 Priority"
hexmask.long.byte 0x20 8.--15. 1. "  PRI_33 ,Interrupt 33 Priority"
hexmask.long.byte 0x20 0.--7. 1. "  PRI_32 ,Interrupt 32 Priority"
line.long 0x24 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
hexmask.long.byte 0x24 16.--23. 1. "  PRI_38 ,Interrupt 38 Priority"
hexmask.long.byte 0x24 8.--15. 1. "  PRI_37 ,Interrupt 37 Priority"
hexmask.long.byte 0x24 0.--7. 1. "  PRI_36 ,Interrupt 36 Priority"
line.long 0x28 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
hexmask.long.byte 0x28 16.--23. 1. "  PRI_42 ,Interrupt 42 Priority"
hexmask.long.byte 0x28 8.--15. 1. "  PRI_41 ,Interrupt 41 Priority"
hexmask.long.byte 0x28 0.--7. 1. "  PRI_40 ,Interrupt 40 Priority"
line.long 0x2C "IPR11,Interrupt Priority Register"
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
hexmask.long.byte 0x2C 16.--23. 1. "  PRI_46 ,Interrupt 46 Priority"
hexmask.long.byte 0x2C 8.--15. 1. "  PRI_45 ,Interrupt 45 Priority"
hexmask.long.byte 0x2C 0.--7. 1. "  PRI_44 ,Interrupt 44 Priority"
line.long 0x30 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
hexmask.long.byte 0x30 16.--23. 1. "  PRI_50 ,Interrupt 50 Priority"
hexmask.long.byte 0x30 8.--15. 1. "  PRI_49 ,Interrupt 49 Priority"
hexmask.long.byte 0x30 0.--7. 1. "  PRI_48 ,Interrupt 48 Priority"
line.long 0x34 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
hexmask.long.byte 0x34 16.--23. 1. "  PRI_54 ,Interrupt 54 Priority"
hexmask.long.byte 0x34 8.--15. 1. "  PRI_53 ,Interrupt 53 Priority"
hexmask.long.byte 0x34 0.--7. 1. "  PRI_52 ,Interrupt 52 Priority"
line.long 0x38 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
hexmask.long.byte 0x38 16.--23. 1. "  PRI_58 ,Interrupt 58 Priority"
hexmask.long.byte 0x38 8.--15. 1. "  PRI_57 ,Interrupt 57 Priority"
hexmask.long.byte 0x38 0.--7. 1. "  PRI_56 ,Interrupt 56 Priority"
line.long 0x3C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
hexmask.long.byte 0x3C 16.--23. 1. "  PRI_62 ,Interrupt 62 Priority"
hexmask.long.byte 0x3C 8.--15. 1. "  PRI_61 ,Interrupt 61 Priority"
hexmask.long.byte 0x3C 0.--7. 1. "  PRI_60 ,Interrupt 60 Priority"
line.long 0x40 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
hexmask.long.byte 0x40 16.--23. 1. "  PRI_66 ,Interrupt 66 Priority"
hexmask.long.byte 0x40 8.--15. 1. "  PRI_65 ,Interrupt 65 Priority"
hexmask.long.byte 0x40 0.--7. 1. "  PRI_64 ,Interrupt 64 Priority"
line.long 0x44 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
hexmask.long.byte 0x44 16.--23. 1. "  PRI_70 ,Interrupt 70 Priority"
hexmask.long.byte 0x44 8.--15. 1. "  PRI_69 ,Interrupt 69 Priority"
hexmask.long.byte 0x44 0.--7. 1. "  PRI_68 ,Interrupt 68 Priority"
line.long 0x48 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
hexmask.long.byte 0x48 16.--23. 1. "  PRI_74 ,Interrupt 74 Priority"
hexmask.long.byte 0x48 8.--15. 1. "  PRI_73 ,Interrupt 73 Priority"
hexmask.long.byte 0x48 0.--7. 1. "  PRI_72 ,Interrupt 72 Priority"
line.long 0x4C "IPR19,Interrupt Priority Register"
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
hexmask.long.byte 0x4C 16.--23. 1. "  PRI_78 ,Interrupt 78 Priority"
hexmask.long.byte 0x4C 8.--15. 1. "  PRI_77 ,Interrupt 77 Priority"
hexmask.long.byte 0x4C 0.--7. 1. "  PRI_76 ,Interrupt 76 Priority"
line.long 0x50 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
hexmask.long.byte 0x50 16.--23. 1. "  PRI_82 ,Interrupt 82 Priority"
hexmask.long.byte 0x50 8.--15. 1. "  PRI_81 ,Interrupt 81 Priority"
hexmask.long.byte 0x50 0.--7. 1. "  PRI_80 ,Interrupt 80 Priority"
line.long 0x54 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
hexmask.long.byte 0x54 16.--23. 1. "  PRI_86 ,Interrupt 86 Priority"
hexmask.long.byte 0x54 8.--15. 1. "  PRI_85 ,Interrupt 85 Priority"
hexmask.long.byte 0x54 0.--7. 1. "  PRI_84 ,Interrupt 84 Priority"
line.long 0x58 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
hexmask.long.byte 0x58 16.--23. 1. "  PRI_90 ,Interrupt 90 Priority"
hexmask.long.byte 0x58 8.--15. 1. "  PRI_89 ,Interrupt 89 Priority"
hexmask.long.byte 0x58 0.--7. 1. "  PRI_88 ,Interrupt 88 Priority"
line.long 0x5C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
hexmask.long.byte 0x5C 16.--23. 1. "  PRI_94 ,Interrupt 94 Priority"
hexmask.long.byte 0x5C 8.--15. 1. "  PRI_93 ,Interrupt 93 Priority"
hexmask.long.byte 0x5C 0.--7. 1. "  PRI_92 ,Interrupt 92 Priority"
line.long 0x60 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
hexmask.long.byte 0x60 16.--23. 1. "  PRI_98 ,Interrupt 98 Priority"
hexmask.long.byte 0x60 8.--15. 1. "  PRI_97 ,Interrupt 97 Priority"
hexmask.long.byte 0x60 0.--7. 1. "  PRI_96 ,Interrupt 96 Priority"
line.long 0x64 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x64 16.--23. 1. "  PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x64 8.--15. 1. "  PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x64 0.--7. 1. "  PRI_100 ,Interrupt 100 Priority"
line.long 0x68 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x68 16.--23. 1. "  PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x68 8.--15. 1. "  PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x68 0.--7. 1. "  PRI_104 ,Interrupt 104 Priority"
line.long 0x6C "IPR27,Interrupt Priority Register"
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0x6C 16.--23. 1. "  PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0x6C 8.--15. 1. "  PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0x6C 0.--7. 1. "  PRI_108 ,Interrupt 108 Priority"
line.long 0x70 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x70 16.--23. 1. "  PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x70 8.--15. 1. "  PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x70 0.--7. 1. "  PRI_112 ,Interrupt 112 Priority"
line.long 0x74 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x74 16.--23. 1. "  PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x74 8.--15. 1. "  PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x74 0.--7. 1. "  PRI_116 ,Interrupt 116 Priority"
line.long 0x78 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x78 16.--23. 1. "  PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x78 8.--15. 1. "  PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x78 0.--7. 1. "  PRI_120 ,Interrupt 120 Priority"
line.long 0x7C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x7C 16.--23. 1. "  PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x7C 8.--15. 1. "  PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x7C 0.--7. 1. "  PRI_124 ,Interrupt 124 Priority"
line.long 0x80 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x80 16.--23. 1. "  PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x80 8.--15. 1. "  PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x80 0.--7. 1. "  PRI_128 ,Interrupt 128 Priority"
line.long 0x84 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x84 16.--23. 1. "  PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x84 8.--15. 1. "  PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x84 0.--7. 1. "  PRI_132 ,Interrupt 132 Priority"
line.long 0x88 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x88 16.--23. 1. "  PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x88 8.--15. 1. "  PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x88 0.--7. 1. "  PRI_136 ,Interrupt 136 Priority"
line.long 0x8C "IPR35,Interrupt Priority Register"
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0x8C 16.--23. 1. "  PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0x8C 8.--15. 1. "  PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0x8C 0.--7. 1. "  PRI_140 ,Interrupt 140 Priority"
line.long 0x90 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x90 16.--23. 1. "  PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x90 8.--15. 1. "  PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x90 0.--7. 1. "  PRI_144 ,Interrupt 144 Priority"
line.long 0x94 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x94 16.--23. 1. "  PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x94 8.--15. 1. "  PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x94 0.--7. 1. "  PRI_148 ,Interrupt 148 Priority"
line.long 0x98 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x98 16.--23. 1. "  PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x98 8.--15. 1. "  PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x98 0.--7. 1. "  PRI_152 ,Interrupt 152 Priority"
line.long 0x9C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x9C 16.--23. 1. "  PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x9C 8.--15. 1. "  PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x9C 0.--7. 1. "  PRI_156 ,Interrupt 156 Priority"
line.long 0xA0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0xA0 16.--23. 1. "  PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0xA0 8.--15. 1. "  PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0xA0 0.--7. 1. "  PRI_160 ,Interrupt 160 Priority"
line.long 0xA4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0xA4 16.--23. 1. "  PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0xA4 8.--15. 1. "  PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0xA4 0.--7. 1. "  PRI_164 ,Interrupt 164 Priority"
line.long 0xA8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0xA8 16.--23. 1. "  PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0xA8 8.--15. 1. "  PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0xA8 0.--7. 1. "  PRI_168 ,Interrupt 168 Priority"
line.long 0xAC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xAC 16.--23. 1. "  PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xAC 8.--15. 1. "  PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xAC 0.--7. 1. "  PRI_172 ,Interrupt 172 Priority"
line.long 0xB0 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0xB0 16.--23. 1. "  PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0xB0 8.--15. 1. "  PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0xB0 0.--7. 1. "  PRI_176 ,Interrupt 176 Priority"
line.long 0xB4 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0xB4 16.--23. 1. "  PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0xB4 8.--15. 1. "  PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0xB4 0.--7. 1. "  PRI_180 ,Interrupt 180 Priority"
line.long 0xB8 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0xB8 16.--23. 1. "  PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0xB8 8.--15. 1. "  PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0xB8 0.--7. 1. "  PRI_184 ,Interrupt 184 Priority"
line.long 0xBC "IPR47,Interrupt Priority Register"
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0xBC 16.--23. 1. "  PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0xBC 8.--15. 1. "  PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0xBC 0.--7. 1. "  PRI_188 ,Interrupt 188 Priority"
line.long 0xC0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0xC0 16.--23. 1. "  PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0xC0 8.--15. 1. "  PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0xC0 0.--7. 1. "  PRI_192 ,Interrupt 192 Priority"
line.long 0xC4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0xC4 16.--23. 1. "  PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0xC4 8.--15. 1. "  PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0xC4 0.--7. 1. "  PRI_196 ,Interrupt 196 Priority"
line.long 0xC8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0xC8 16.--23. 1. "  PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0xC8 8.--15. 1. "  PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0xC8 0.--7. 1. "  PRI_200 ,Interrupt 200 Priority"
line.long 0xCC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xCC 16.--23. 1. "  PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xCC 8.--15. 1. "  PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xCC 0.--7. 1. "  PRI_204 ,Interrupt 204 Priority"
line.long 0xD0 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0xD0 16.--23. 1. "  PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0xD0 8.--15. 1. "  PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0xD0 0.--7. 1. "  PRI_208 ,Interrupt 208 Priority"
line.long 0xD4 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0xD4 16.--23. 1. "  PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0xD4 8.--15. 1. "  PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0xD4 0.--7. 1. "  PRI_212 ,Interrupt 212 Priority"
line.long 0xD8 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0xD8 16.--23. 1. "  PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0xD8 8.--15. 1. "  PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0xD8 0.--7. 1. "  PRI_216 ,Interrupt 216 Priority"
line.long 0xDC "IPR55,Interrupt Priority Register"
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0xDC 16.--23. 1. "  PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0xDC 8.--15. 1. "  PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0xDC 0.--7. 1. "  PRI_220 ,Interrupt 220 Priority"
line.long 0xE0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0xE0 16.--23. 1. "  PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0xE0 8.--15. 1. "  PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0xE0 0.--7. 1. "  PRI_224 ,Interrupt 224 Priority"
line.long 0xE4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0xE4 16.--23. 1. "  PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0xE4 8.--15. 1. "  PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0xE4 0.--7. 1. "  PRI_228 ,Interrupt 228 Priority"
line.long 0xE8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0xE8 16.--23. 1. "  PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0xE8 8.--15. 1. "  PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0xE8 0.--7. 1. "  PRI_232 ,Interrupt 232 Priority"
line.long 0xEC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xEC 16.--23. 1. "  PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xEC 8.--15. 1. "  PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xEC 0.--7. 1. "  PRI_236 ,Interrupt 236 Priority"
else
hgroup.long 0x400++0xEF
hide.long 0x0 "IPR0,Interrupt Priority Register"
hide.long 0x4 "IPR1,Interrupt Priority Register"
hide.long 0x8 "IPR2,Interrupt Priority Register"
hide.long 0xC "IPR3,Interrupt Priority Register"
hide.long 0x10 "IPR4,Interrupt Priority Register"
hide.long 0x14 "IPR5,Interrupt Priority Register"
hide.long 0x18 "IPR6,Interrupt Priority Register"
hide.long 0x1C "IPR7,Interrupt Priority Register"
hide.long 0x20 "IPR8,Interrupt Priority Register"
hide.long 0x24 "IPR9,Interrupt Priority Register"
hide.long 0x28 "IPR10,Interrupt Priority Register"
hide.long 0x2C "IPR11,Interrupt Priority Register"
hide.long 0x30 "IPR12,Interrupt Priority Register"
hide.long 0x34 "IPR13,Interrupt Priority Register"
hide.long 0x38 "IPR14,Interrupt Priority Register"
hide.long 0x3C "IPR15,Interrupt Priority Register"
hide.long 0x40 "IPR16,Interrupt Priority Register"
hide.long 0x44 "IPR17,Interrupt Priority Register"
hide.long 0x48 "IPR18,Interrupt Priority Register"
hide.long 0x4C "IPR19,Interrupt Priority Register"
hide.long 0x50 "IPR20,Interrupt Priority Register"
hide.long 0x54 "IPR21,Interrupt Priority Register"
hide.long 0x58 "IPR22,Interrupt Priority Register"
hide.long 0x5C "IPR23,Interrupt Priority Register"
hide.long 0x60 "IPR24,Interrupt Priority Register"
hide.long 0x64 "IPR25,Interrupt Priority Register"
hide.long 0x68 "IPR26,Interrupt Priority Register"
hide.long 0x6C "IPR27,Interrupt Priority Register"
hide.long 0x70 "IPR28,Interrupt Priority Register"
hide.long 0x74 "IPR29,Interrupt Priority Register"
hide.long 0x78 "IPR30,Interrupt Priority Register"
hide.long 0x7C "IPR31,Interrupt Priority Register"
hide.long 0x80 "IPR32,Interrupt Priority Register"
hide.long 0x84 "IPR33,Interrupt Priority Register"
hide.long 0x88 "IPR34,Interrupt Priority Register"
hide.long 0x8C "IPR35,Interrupt Priority Register"
hide.long 0x90 "IPR36,Interrupt Priority Register"
hide.long 0x94 "IPR37,Interrupt Priority Register"
hide.long 0x98 "IPR38,Interrupt Priority Register"
hide.long 0x9C "IPR39,Interrupt Priority Register"
hide.long 0xA0 "IPR40,Interrupt Priority Register"
hide.long 0xA4 "IPR41,Interrupt Priority Register"
hide.long 0xA8 "IPR42,Interrupt Priority Register"
hide.long 0xAC "IPR43,Interrupt Priority Register"
hide.long 0xB0 "IPR44,Interrupt Priority Register"
hide.long 0xB4 "IPR45,Interrupt Priority Register"
hide.long 0xB8 "IPR46,Interrupt Priority Register"
hide.long 0xBC "IPR47,Interrupt Priority Register"
hide.long 0xC0 "IPR48,Interrupt Priority Register"
hide.long 0xC4 "IPR49,Interrupt Priority Register"
hide.long 0xC8 "IPR50,Interrupt Priority Register"
hide.long 0xCC "IPR51,Interrupt Priority Register"
hide.long 0xD0 "IPR52,Interrupt Priority Register"
hide.long 0xD4 "IPR53,Interrupt Priority Register"
hide.long 0xD8 "IPR54,Interrupt Priority Register"
hide.long 0xDC "IPR55,Interrupt Priority Register"
hide.long 0xE0 "IPR56,Interrupt Priority Register"
hide.long 0xE4 "IPR57,Interrupt Priority Register"
hide.long 0xE8 "IPR58,Interrupt Priority Register"
hide.long 0xEC "IPR59,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 7.
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000)
group 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 30. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 29. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 28. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 27. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 26. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. "     S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline "                "
bitfld.long 0x00 23. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 22. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 21. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 20. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY   ,Core running and Lockup/Debug Key" "Not running,Running"
bitfld.long 0x00 18. "  S_SLEEP/DBGKEY     ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
textline "                "
bitfld.long 0x00 17. " S_HALT/DBGKEY     ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. "   S_REGRDY/DBGKEY    ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline "                "
bitfld.long 0x00 3. " C_MASKINTS        ,Interrupts Mask" "Not masked,Masked"
bitfld.long 0x00 1. "   C_HALT             ,Core Halted" "Not halted,Halted"
textline "                "
bitfld.long 0x00 0. " C_DEBUGEN         ,Debug Enable" "Disabled,Enabled"
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001)
group 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 30. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 29. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 28. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 27. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 26. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. "     S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline "                "
bitfld.long 0x00 23. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 22. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 21. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 20. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY   ,Core running and Lockup/Debug Key" "Not running,Running"
bitfld.long 0x00 18. "  S_SLEEP/DBGKEY     ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
textline "                "
bitfld.long 0x00 17. " S_HALT/DBGKEY     ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. "   S_REGRDY/DBGKEY    ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline "                "
bitfld.long 0x00 5. " C_SNAPSTALL       ,Halting debug to gain control of the core" "Disabled,Enabled"
bitfld.long 0x00 3. "     C_MASKINTS         ,Interrupts Mask" "Not masked,Masked"
textline "                "
bitfld.long 0x00 2. " C_STEP            ,Core Step" "No step,Step"
bitfld.long 0x00 1. "      C_HALT             ,Core Halted" "Not halted,Halted"
textline "                "
bitfld.long 0x00 0. " C_DEBUGEN         ,Debug Enable" "Disabled,Enabled"
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0)
group 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 30. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 29. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 28. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 27. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 26. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. "     S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline "                "
bitfld.long 0x00 23. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 22. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 21. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 20. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY   ,Core running and Lockup/Debug Key" "Not running,Running"
bitfld.long 0x00 18. "  S_SLEEP/DBGKEY     ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
textline "                "
bitfld.long 0x00 17. " S_HALT/DBGKEY     ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. "   S_REGRDY/DBGKEY    ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline "                "
bitfld.long 0x00 1. " C_HALT            ,Core Halted" "Not halted,Halted"
textline "                "
bitfld.long 0x00 0. " C_DEBUGEN         ,Debug Enable" "Disabled,Enabled"
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001)
group 0xDF0++0x03
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
bitfld.long 0x00 31. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 30. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 29. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 28. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 27. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 26. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
bitfld.long 0x00 24. "     S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
textline "                "
bitfld.long 0x00 23. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 22. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 21. " DBGKEY            ,Debug Key" "0,1"
bitfld.long 0x00 20. "            DBGKEY             ,Debug Key" "0,1"
textline "                "
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY   ,Core running and Lockup/Debug Key" "Not running,Running"
bitfld.long 0x00 18. "  S_SLEEP/DBGKEY     ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
textline "                "
bitfld.long 0x00 17. " S_HALT/DBGKEY     ,Core Halted Status/Debug Key" "Not halted,Halted"
bitfld.long 0x00 16. "   S_REGRDY/DBGKEY    ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
textline "                "
bitfld.long 0x00 2. " C_STEP            ,Core Step" "No step,Step"
bitfld.long 0x00 1. "      C_HALT             ,Core Halted" "Not halted,Halted"
textline "                "
bitfld.long 0x00 0. " C_DEBUGEN         ,Debug Enable" "Disabled,Enabled"
endif
wgroup 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR            ,Register Read/Write" "Read,Write"
bitfld.long 0x00 0.--4. "        REGSEL             ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..."
group 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA       ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 19. "     MON_REQ    ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. "         MON_STEP   ,Setting this bit to 1 makes the step request pending" "No step,Step"
textline "                "
bitfld.long 0x00 17. " MON_PEND     ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. "  MON_EN     ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 10. "  VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
textline "                "
bitfld.long 0x00 9. " VC_INTERR    ,Enable halting debug trap" "Disabled,Enabled"
bitfld.long 0x00 8. "     VC_BUSERR  ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. "  VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
textline "                "
bitfld.long 0x00 6. " VC_CHKERR    ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
bitfld.long 0x00 5. "     VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. "  VC_MMERR   ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
textline "                "
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA       ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 19. "     MON_REQ    ,DebugMonitor semaphore bit" "0,1"
textline "                "
bitfld.long 0x00 17. " MON_PEND     ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. "  MON_EN     ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 10. "  VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
textline "                "
bitfld.long 0x00 9. " VC_INTERR    ,Enable halting debug trap" "Disabled,Enabled"
bitfld.long 0x00 8. "     VC_BUSERR  ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. "  VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
textline "                "
bitfld.long 0x00 6. " VC_CHKERR    ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
bitfld.long 0x00 5. "     VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. "  VC_MMERR   ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
textline "                "
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 10.
group 0x00--0x27
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "  NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1. "  KEY ,Key Field" "Low,High"
bitfld.long 0x00 0. "  ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
;group 0x04++0x03
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
hexmask.long.tbyte 0x04 5.--28. 1. " REMAP   ,Remap Base Address Field"
;group 0x08++0x03
line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x8 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x8 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0xC 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0xC 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x10 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x10 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x14 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x14 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x18 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x18 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x1C 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x1C 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x20 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x20 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
hexmask.long 0x24 2.--28. 1. "  COMP ,Comparison Address"
bitfld.long 0x24 0. "  ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
tree "Coresight Management Registers"
rgroup 0xfd0--0xfff
line.long 0x00 "PID4,Peripheral ID4"
line.long 0x04 "PID5,Peripheral ID5"
line.long 0x08 "PID6,Peripheral ID6"
line.long 0x0c "PID7,Peripheral ID7"
line.long 0x10 "PID0,Peripheral ID0"
line.long 0x14 "PID1,Peripheral ID1"
line.long 0x18 "PID2,Peripheral ID2"
line.long 0x1c "PID3,Peripheral ID3"
line.long 0x20 "CID0,Component ID0"
line.long 0x24 "CID1,Component ID1"
line.long 0x28 "CID2,Component ID2"
line.long 0x2c "CID3,Component ID3"
tree.end
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 15.
group 0x00--0x1B
line.long 0x00 "DWT_CTRL,DWT Control Register"
bitfld.long 0x00 28.--31. " NUMCOMP    ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 22. "        CYCEVTENA   ,Enables Cycle Count Event" "Disabled,Enabled"
bitfld.long 0x00 21. "  FOLDEVTENA  ,Enables Folded Instruction Count Event" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 20. " LSUEVTENA  ,Enables LSU Count Event" "Disabled,Enabled"
bitfld.long 0x00 19. "  SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled"
bitfld.long 0x00 18. "  EXCEVTENA   ,Enables Interrupt Overhead Event" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 17. " CPIEVTENA  ,Enables CPI Count Event" "Disabled,Enabled"
bitfld.long 0x00 16. "  EXCTRCENA   ,Enables Interrupt Event Tracing" "Disabled,Enabled"
bitfld.long 0x00 12. "  PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 10.--11. " SYNCTAP    ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28"
bitfld.long 0x00 9. "  CYCTAP      ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10"
bitfld.long 0x00 5.--8. "    POSTCNT     ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                        "
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        CYCCNTENA   ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled"
;group 0x04++0x03
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
;group 0x08++0x03
line.long 0x08 "DWT_CPICNT,DWT CPI Count Register"
hexmask.long.byte 0x08 0.--7. 1. " CPICNT     ,The base CPI counter"
;group 0x0c++0x03
line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register"
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT     ,The exception overhead counter"
;group 0x10++0x03
line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register"
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT   ,Sleep Counter"
;group 0x14++0x03
line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register"
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT     ,Load-store counter"
;group 0x18++0x03
line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register"
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT    ,Folded-instruction counter"
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
group.long 0x24++0x03
line.long 0x00 "DWT_MASK0,DWT Mask Registers 0"
bitfld.long 0x00 0.--3. " MASK       ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x34++0x03
line.long 0x00 "DWT_MASK1,DWT Mask Registers 1"
bitfld.long 0x00 0.--3. " MASK       ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x44++0x03
line.long 0x00 "DWT_MASK2,DWT Mask Registers 2"
bitfld.long 0x00 0.--3. " MASK       ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x54++0x03
line.long 0x00 "DWT_MASK3,DWT Mask Registers 3"
bitfld.long 0x00 0.--3. " MASK       ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00)
group.long 0x28++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
else
group.long 0x28++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
endif
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00)
group.long 0x38++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
else
group.long 0x38++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
endif
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00)
group.long 0x48++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
else
group.long 0x48++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
endif
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00)
group.long 0x58++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
else
group.long 0x58++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "         DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--11. "        DATAVSIZE ,Data Value Size" "byte,half,word,res"
bitfld.long 0x00 9. "  LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
bitfld.long 0x00 8. "  DATAVMATCH ,Data value compare" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 7. " CYCMATCH   ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
bitfld.long 0x00 5. "    EMITRANGE  ,Emit Range Field" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0.--3. " FUNCTION   ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
endif
tree "Coresight Management Registers"
rgroup 0xfd0--0xfff
line.long 0x00 "PID4,Peripheral ID4"
line.long 0x04 "PID5,Peripheral ID5"
line.long 0x08 "PID6,Peripheral ID6"
line.long 0x0c "PID7,Peripheral ID7"
line.long 0x10 "PID0,Peripheral ID1"
line.long 0x14 "PID1,Peripheral ID2"
line.long 0x18 "PID2,Peripheral ID3"
line.long 0x1c "PID3,Peripheral ID4"
line.long 0x20 "CID0,Component ID0"
line.long 0x24 "CID1,Component ID1"
line.long 0x28 "CID2,Component ID2"
line.long 0x2c "CID3,Component ID3"
tree.end
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
tree "ADC (12-bit Analog to Digital Converter)"
base ad:0x400B8800
group.long 0x0++0x7
line.long 0x0 "CR0,AD Control Register 0"
bitfld.long 0x0 7. "ADEN,ADEN" "0,1"
bitfld.long 0x0 1. "SGL,SGL" "0,1"
bitfld.long 0x0 0. "CNT,CNT" "0,1"
line.long 0x4 "CR1,AD Control Register 1"
bitfld.long 0x4 6. "CNTDMEN,CNTDMEN" "0,1"
bitfld.long 0x4 5. "SGLDMEN,SGLDMEN" "0,1"
bitfld.long 0x4 4. "TRGDMEN,TRGDMEN" "0,1"
bitfld.long 0x4 0. "TRGEN,TRGEN" "0,1"
rgroup.long 0x8++0x3
line.long 0x0 "ST,AD Status Register"
bitfld.long 0x0 7. "ADBF,ADBF" "0,1"
bitfld.long 0x0 3. "CNTF,CNTF" "0,1"
bitfld.long 0x0 2. "SNGF,SNGF" "0,1"
bitfld.long 0x0 1. "TRGF,TRGF" "0,1"
bitfld.long 0x0 0. "PMDF,PMDF" "0,1"
group.long 0xC++0x27
line.long 0x0 "CLK,AD Conversion Clock Setting Register"
hexmask.long.byte 0x0 8.--11. 1. "EXAZ1,EXAZ1"
hexmask.long.byte 0x0 3.--6. 1. "EXAZ0,EXAZ0"
bitfld.long 0x0 0.--2. "VADCLK,VADCLK" "0,1,2,3,4,5,6,7"
line.long 0x4 "MOD0,AD Mode Control Register 0"
bitfld.long 0x4 1. "RCUT,RCUT" "0,1"
bitfld.long 0x4 0. "DACON,DACON" "0,1"
line.long 0x8 "MOD1,AD Mode Control Register 1"
hexmask.long 0x8 0.--31. 1. "MOD1,MOD1"
line.long 0xC "MOD2,AD Mode Control Register 2"
hexmask.long 0xC 0.--31. 1. "MOD2,MOD2"
line.long 0x10 "MOD3,AD Mode Control Register 3"
hexmask.long 0x10 0.--31. 1. "MOD3,MOD3"
line.long 0x14 "CMPEN,AD Monitoring interrupt permission register"
bitfld.long 0x14 1. "CMP1EN,CMP1EN" "0,1"
bitfld.long 0x14 0. "CMP0EN,CMP0EN" "0,1"
line.long 0x18 "CMPCR0,AD Monitoring Setting Register 0"
hexmask.long.byte 0x18 8.--11. 1. "CMPCNT0,CMPCNT0"
bitfld.long 0x18 6. "COMPCND0,COMPCND0" "0,1"
bitfld.long 0x18 5. "ADBIG0,ADBIG0" "0,1"
hexmask.long.byte 0x18 0.--4. 1. "REGS0,REGS0"
line.long 0x1C "CMPCR1,AD Monitoring Setting Register 1"
hexmask.long.byte 0x1C 8.--11. 1. "CMPCNT1,CMPCNT1"
bitfld.long 0x1C 6. "COMPCND1,COMPCND1" "0,1"
bitfld.long 0x1C 5. "ADBIG1,ADBIG1" "0,1"
hexmask.long.byte 0x1C 0.--4. 1. "REGS1,REGS1"
line.long 0x20 "CMP0,AD Conversion Result Comparison Register 0"
hexmask.long.word 0x20 4.--15. 1. "AD0CMP0,AD0CMP0"
line.long 0x24 "CMP1,AD Conversion Result Comparison Register 1"
hexmask.long.word 0x24 4.--15. 1. "AD0CMP1,AD0CMP1"
group.long 0x40++0x57
line.long 0x0 "PSEL0,AD PMD Trigger Program Number Select Register 0"
bitfld.long 0x0 7. "PENS0,PENS0" "0,1"
bitfld.long 0x0 0.--2. "PMDS0,PMDS0" "0,1,2,3,4,5,6,7"
line.long 0x4 "PSEL1,AD PMD Trigger Program Number Select Register 1"
bitfld.long 0x4 7. "PENS1,PENS1" "0,1"
bitfld.long 0x4 0.--2. "PMDS1,PMDS1" "0,1,2,3,4,5,6,7"
line.long 0x8 "PSEL2,AD PMD Trigger Program Number Select Register 2"
bitfld.long 0x8 7. "PENS2,PENS2" "0,1"
bitfld.long 0x8 0.--2. "PMDS2,PMDS2" "0,1,2,3,4,5,6,7"
line.long 0xC "PSEL3,AD PMD Trigger Program Number Select Register 3"
bitfld.long 0xC 7. "PENS3,PENS3" "0,1"
bitfld.long 0xC 0.--2. "PMDS3,PMDS3" "0,1,2,3,4,5,6,7"
line.long 0x10 "PSEL4,AD PMD Trigger Program Number Select Register 4"
bitfld.long 0x10 7. "PENS4,PENS4" "0,1"
bitfld.long 0x10 0.--2. "PMDS4,PMDS4" "0,1,2,3,4,5,6,7"
line.long 0x14 "PSEL5,AD PMD Trigger Program Number Select Register 5"
bitfld.long 0x14 7. "PENS5,PENS5" "0,1"
bitfld.long 0x14 0.--2. "PMDS5,PMDS5" "0,1,2,3,4,5,6,7"
line.long 0x18 "PSEL6,AD PMD Trigger Program Number Select Register 6"
bitfld.long 0x18 7. "PENS6,PENS6" "0,1"
bitfld.long 0x18 0.--2. "PMDS6,PMDS6" "0,1,2,3,4,5,6,7"
line.long 0x1C "PSEL7,AD PMD Trigger Program Number Select Register 7"
bitfld.long 0x1C 7. "PENS7,PENS7" "0,1"
bitfld.long 0x1C 0.--2. "PMDS7,PMDS7" "0,1,2,3,4,5,6,7"
line.long 0x20 "PSEL8,AD PMD Trigger Program Number Select Register 8"
bitfld.long 0x20 7. "PENS8,PENS8" "0,1"
bitfld.long 0x20 0.--2. "PMDS8,PMDS8" "0,1,2,3,4,5,6,7"
line.long 0x24 "PSEL9,AD PMD Trigger Program Number Select Register 9"
bitfld.long 0x24 7. "PENS9,PENS9" "0,1"
bitfld.long 0x24 0.--2. "PMDS9,PMDS9" "0,1,2,3,4,5,6,7"
line.long 0x28 "PSEL10,AD PMD Trigger Program Number Select Register 10"
bitfld.long 0x28 7. "PENS10,PENS10" "0,1"
bitfld.long 0x28 0.--2. "PMDS10,PMDS10" "0,1,2,3,4,5,6,7"
line.long 0x2C "PSEL11,AD PMD Trigger Program Number Select Register 11"
bitfld.long 0x2C 7. "PENS11,PENS11" "0,1"
bitfld.long 0x2C 0.--2. "PMDS11,PMDS11" "0,1,2,3,4,5,6,7"
line.long 0x30 "PINTS0,AD PMD Trigger Interrupt Select Register 0"
bitfld.long 0x30 0.--1. "INTSEL0,INTSEL0" "0,1,2,3"
line.long 0x34 "PINTS1,AD PMD Trigger Interrupt Select Register 1"
bitfld.long 0x34 0.--1. "INTSEL1,INTSEL1" "0,1,2,3"
line.long 0x38 "PINTS2,AD PMD Trigger Interrupt Select Register 2"
bitfld.long 0x38 0.--1. "INTSEL2,INTSEL2" "0,1,2,3"
line.long 0x3C "PINTS3,AD PMD Trigger Interrupt Select Register 3"
bitfld.long 0x3C 0.--1. "INTSEL3,INTSEL3" "0,1,2,3"
line.long 0x40 "PINTS4,AD PMD Trigger Interrupt Select Register 4"
bitfld.long 0x40 0.--1. "INTSEL4,INTSEL4" "0,1,2,3"
line.long 0x44 "PINTS5,AD PMD Trigger Interrupt Select Register 5"
bitfld.long 0x44 0.--1. "INTSEL5,INTSEL5" "0,1,2,3"
line.long 0x48 "PINTS6,AD PMD Trigger Interrupt Select Register 6"
bitfld.long 0x48 0.--1. "INTSEL6,INTSEL6" "0,1,2,3"
line.long 0x4C "PINTS7,AD PMD Trigger Interrupt Select Register 7"
bitfld.long 0x4C 0.--1. "INTSEL7,INTSEL7" "0,1,2,3"
line.long 0x50 "PREGS,AD PMD Trigger Conversion Result Storage Select Register"
bitfld.long 0x50 28.--30. "REGSEL7,REGSEL7" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 24.--26. "REGSEL6,REGSEL6" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 20.--22. "REGSEL5,REGSEL5" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 16.--18. "REGSEL4,REGSEL4" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 12.--14. "REGSEL3,REGSEL3" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 8.--10. "REGSEL2,REGSEL2" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 4.--6. "REGSEL1,REGSEL1" "0,1,2,3,4,5,6,7"
bitfld.long 0x50 0.--2. "REGSEL0,REGSEL0" "0,1,2,3,4,5,6,7"
line.long 0x54 "TRM,AD Trimming Setting Register"
hexmask.long 0x54 0.--31. 1. "TRM,TRM"
group.long 0x9C++0x83
line.long 0x0 "EXAZSEL,AD Sampling Time Select Register"
hexmask.long 0x0 0.--31. 1. "EXAZSEL,EXAZSEL"
line.long 0x4 "PSET0,AD PMD Trigger Program Register 0"
bitfld.long 0x4 31. "ENSP03,ENSP03" "0,1"
hexmask.long.byte 0x4 24.--28. 1. "AINSP03,AINSP03"
bitfld.long 0x4 23. "ENSP02,ENSP02" "0,1"
hexmask.long.byte 0x4 16.--20. 1. "AINSP02,AINSP02"
bitfld.long 0x4 15. "ENSP01,ENSP01" "0,1"
hexmask.long.byte 0x4 8.--12. 1. "AINSP01,AINSP01"
bitfld.long 0x4 7. "ENSP00,ENSP00" "0,1"
hexmask.long.byte 0x4 0.--4. 1. "AINSP00,AINSP00"
line.long 0x8 "PSET1,AD PMD Trigger Program Register 1"
bitfld.long 0x8 31. "ENSP13,ENSP13" "0,1"
hexmask.long.byte 0x8 24.--28. 1. "AINSP13,AINSP13"
bitfld.long 0x8 23. "ENSP12,ENSP12" "0,1"
hexmask.long.byte 0x8 16.--20. 1. "AINSP12,AINSP12"
bitfld.long 0x8 15. "ENSP11,ENSP11" "0,1"
hexmask.long.byte 0x8 8.--12. 1. "AINSP11,AINSP11"
bitfld.long 0x8 7. "ENSP10,ENSP10" "0,1"
hexmask.long.byte 0x8 0.--4. 1. "AINSP10,AINSP10"
line.long 0xC "PSET2,AD PMD Trigger Program Register 2"
bitfld.long 0xC 31. "ENSP23,ENSP23" "0,1"
hexmask.long.byte 0xC 24.--28. 1. "AINSP23,AINSP23"
bitfld.long 0xC 23. "ENSP22,ENSP22" "0,1"
hexmask.long.byte 0xC 16.--20. 1. "AINSP22,AINSP22"
bitfld.long 0xC 15. "ENSP21,ENSP21" "0,1"
hexmask.long.byte 0xC 8.--12. 1. "AINSP21,AINSP21"
bitfld.long 0xC 7. "ENSP20,ENSP20" "0,1"
hexmask.long.byte 0xC 0.--4. 1. "AINSP20,AINSP20"
line.long 0x10 "PSET3,AD PMD Trigger Program Register 3"
bitfld.long 0x10 31. "ENSP33,ENSP33" "0,1"
hexmask.long.byte 0x10 24.--28. 1. "AINSP33,AINSP33"
bitfld.long 0x10 23. "ENSP32,ENSP32" "0,1"
hexmask.long.byte 0x10 16.--20. 1. "AINSP32,AINSP32"
bitfld.long 0x10 15. "ENSP31,ENSP31" "0,1"
hexmask.long.byte 0x10 8.--12. 1. "AINSP31,AINSP31"
bitfld.long 0x10 7. "ENSP30,ENSP30" "0,1"
hexmask.long.byte 0x10 0.--4. 1. "AINSP30,AINSP30"
line.long 0x14 "PSET4,AD PMD Trigger Program Register 4"
bitfld.long 0x14 31. "ENSP43,ENSP43" "0,1"
hexmask.long.byte 0x14 24.--28. 1. "AINSP43,AINSP43"
bitfld.long 0x14 23. "ENSP42,ENSP42" "0,1"
hexmask.long.byte 0x14 16.--20. 1. "AINSP42,AINSP42"
bitfld.long 0x14 15. "ENSP41,ENSP41" "0,1"
hexmask.long.byte 0x14 8.--12. 1. "AINSP41,AINSP41"
bitfld.long 0x14 7. "ENSP40,ENSP40" "0,1"
hexmask.long.byte 0x14 0.--4. 1. "AINSP40,AINSP40"
line.long 0x18 "PSET5,AD PMD Trigger Program Register 5"
bitfld.long 0x18 31. "ENSP53,ENSP53" "0,1"
hexmask.long.byte 0x18 24.--28. 1. "AINSP53,AINSP53"
bitfld.long 0x18 23. "ENSP52,ENSP52" "0,1"
hexmask.long.byte 0x18 16.--20. 1. "AINSP52,AINSP52"
bitfld.long 0x18 15. "ENSP51,ENSP51" "0,1"
hexmask.long.byte 0x18 8.--12. 1. "AINSP51,AINSP51"
bitfld.long 0x18 7. "ENSP50,ENSP50" "0,1"
hexmask.long.byte 0x18 0.--4. 1. "AINSP50,AINSP50"
line.long 0x1C "PSET6,AD PMD Trigger Program Register 6"
bitfld.long 0x1C 31. "ENSP63,ENSP63" "0,1"
hexmask.long.byte 0x1C 24.--28. 1. "AINSP63,AINSP63"
bitfld.long 0x1C 23. "ENSP62,ENSP62" "0,1"
hexmask.long.byte 0x1C 16.--20. 1. "AINSP62,AINSP62"
bitfld.long 0x1C 15. "ENSP61,ENSP61" "0,1"
hexmask.long.byte 0x1C 8.--12. 1. "AINSP61,AINSP61"
bitfld.long 0x1C 7. "ENSP60,ENSP60" "0,1"
hexmask.long.byte 0x1C 0.--4. 1. "AINSP60,AINSP60"
line.long 0x20 "PSET7,AD PMD Trigger Program Register 7"
bitfld.long 0x20 31. "ENSP73,ENSP73" "0,1"
hexmask.long.byte 0x20 24.--28. 1. "AINSP73,AINSP73"
bitfld.long 0x20 23. "ENSP72,ENSP72" "0,1"
hexmask.long.byte 0x20 16.--20. 1. "AINSP72,AINSP72"
bitfld.long 0x20 15. "ENSP71,ENSP71" "0,1"
hexmask.long.byte 0x20 8.--12. 1. "AINSP71,AINSP71"
bitfld.long 0x20 7. "ENSP70,ENSP70" "0,1"
hexmask.long.byte 0x20 0.--4. 1. "AINSP70,AINSP70"
line.long 0x24 "TSET0,AD General purpose Trigger Program Register 0"
bitfld.long 0x24 7. "ENINT0,ENINT0" "0,1"
bitfld.long 0x24 5.--6. "TRGS0,TRGS0" "0,1,2,3"
hexmask.long.byte 0x24 0.--4. 1. "AINST0,AINST0"
line.long 0x28 "TSET1,AD General purpose Trigger Program Register 1"
bitfld.long 0x28 7. "ENINT1,ENINT1" "0,1"
bitfld.long 0x28 5.--6. "TRGS1,TRGS1" "0,1,2,3"
hexmask.long.byte 0x28 0.--4. 1. "AINST1,AINST1"
line.long 0x2C "TSET2,AD General purpose Trigger Program Register 2"
bitfld.long 0x2C 7. "ENINT2,ENINT2" "0,1"
bitfld.long 0x2C 5.--6. "TRGS2,TRGS2" "0,1,2,3"
hexmask.long.byte 0x2C 0.--4. 1. "AINST2,AINST2"
line.long 0x30 "TSET3,AD General purpose Trigger Program Register 3"
bitfld.long 0x30 7. "ENINT3,ENINT3" "0,1"
bitfld.long 0x30 5.--6. "TRGS3,TRGS3" "0,1,2,3"
hexmask.long.byte 0x30 0.--4. 1. "AINST3,AINST3"
line.long 0x34 "TSET4,AD General purpose Trigger Program Register 4"
bitfld.long 0x34 7. "ENINT4,ENINT4" "0,1"
bitfld.long 0x34 5.--6. "TRGS4,TRGS4" "0,1,2,3"
hexmask.long.byte 0x34 0.--4. 1. "AINST4,AINST4"
line.long 0x38 "TSET5,AD General purpose Trigger Program Register 5"
bitfld.long 0x38 7. "ENINT5,ENINT5" "0,1"
bitfld.long 0x38 5.--6. "TRGS5,TRGS5" "0,1,2,3"
hexmask.long.byte 0x38 0.--4. 1. "AINST5,AINST5"
line.long 0x3C "TSET6,AD General purpose Trigger Program Register 6"
bitfld.long 0x3C 7. "ENINT6,ENINT6" "0,1"
bitfld.long 0x3C 5.--6. "TRGS6,TRGS6" "0,1,2,3"
hexmask.long.byte 0x3C 0.--4. 1. "AINST6,AINST6"
line.long 0x40 "TSET7,AD General purpose Trigger Program Register 7"
bitfld.long 0x40 7. "ENINT7,ENINT7" "0,1"
bitfld.long 0x40 5.--6. "TRGS7,TRGS7" "0,1,2,3"
hexmask.long.byte 0x40 0.--4. 1. "AINST7,AINST7"
line.long 0x44 "TSET8,AD General purpose Trigger Program Register 8"
bitfld.long 0x44 7. "ENINT8,ENINT8" "0,1"
bitfld.long 0x44 5.--6. "TRGS8,TRGS8" "0,1,2,3"
hexmask.long.byte 0x44 0.--4. 1. "AINST8,AINST8"
line.long 0x48 "TSET9,AD General purpose Trigger Program Register 9"
bitfld.long 0x48 7. "ENINT9,ENINT9" "0,1"
bitfld.long 0x48 5.--6. "TRGS9,TRGS9" "0,1,2,3"
hexmask.long.byte 0x48 0.--4. 1. "AINST9,AINST9"
line.long 0x4C "TSET10,AD General purpose Trigger Program Register 10"
bitfld.long 0x4C 7. "ENINT10,ENINT10" "0,1"
bitfld.long 0x4C 5.--6. "TRGS10,TRGS10" "0,1,2,3"
hexmask.long.byte 0x4C 0.--4. 1. "AINST10,AINST10"
line.long 0x50 "TSET11,AD General purpose Trigger Program Register 11"
bitfld.long 0x50 7. "ENINT11,ENINT11" "0,1"
bitfld.long 0x50 5.--6. "TRGS11,TRGS11" "0,1,2,3"
hexmask.long.byte 0x50 0.--4. 1. "AINST11,AINST11"
line.long 0x54 "TSET12,AD General purpose Trigger Program Register 12"
bitfld.long 0x54 7. "ENINT12,ENINT12" "0,1"
bitfld.long 0x54 5.--6. "TRGS12,TRGS12" "0,1,2,3"
hexmask.long.byte 0x54 0.--4. 1. "AINST12,AINST12"
line.long 0x58 "TSET13,AD General purpose Trigger Program Register 13"
bitfld.long 0x58 7. "ENINT13,ENINT13" "0,1"
bitfld.long 0x58 5.--6. "TRGS13,TRGS13" "0,1,2,3"
hexmask.long.byte 0x58 0.--4. 1. "AINST13,AINST13"
line.long 0x5C "TSET14,AD General purpose Trigger Program Register 14"
bitfld.long 0x5C 7. "ENINT14,ENINT14" "0,1"
bitfld.long 0x5C 5.--6. "TRGS14,TRGS14" "0,1,2,3"
hexmask.long.byte 0x5C 0.--4. 1. "AINST14,AINST14"
line.long 0x60 "TSET15,AD General purpose Trigger Program Register 15"
bitfld.long 0x60 7. "ENINT15,ENINT15" "0,1"
bitfld.long 0x60 5.--6. "TRGS15,TRGS15" "0,1,2,3"
hexmask.long.byte 0x60 0.--4. 1. "AINST15,AINST15"
line.long 0x64 "TSET16,AD General purpose Trigger Program Register 16"
bitfld.long 0x64 7. "ENINT16,ENINT16" "0,1"
bitfld.long 0x64 5.--6. "TRGS16,TRGS16" "0,1,2,3"
hexmask.long.byte 0x64 0.--4. 1. "AINST16,AINST16"
line.long 0x68 "TSET17,AD General purpose Trigger Program Register 17"
bitfld.long 0x68 7. "ENINT17,ENINT17" "0,1"
bitfld.long 0x68 5.--6. "TRGS17,TRGS17" "0,1,2,3"
hexmask.long.byte 0x68 0.--4. 1. "AINST17,AINST17"
line.long 0x6C "TSET18,AD General purpose Trigger Program Register 18"
bitfld.long 0x6C 7. "ENINT18,ENINT18" "0,1"
bitfld.long 0x6C 5.--6. "TRGS18,TRGS18" "0,1,2,3"
hexmask.long.byte 0x6C 0.--4. 1. "AINST18,AINST18"
line.long 0x70 "TSET19,AD General purpose Trigger Program Register 19"
bitfld.long 0x70 7. "ENINT19,ENINT19" "0,1"
bitfld.long 0x70 5.--6. "TRGS19,TRGS19" "0,1,2,3"
hexmask.long.byte 0x70 0.--4. 1. "AINST19,AINST19"
line.long 0x74 "TSET20,AD General purpose Trigger Program Register 20"
bitfld.long 0x74 7. "ENINT20,ENINT20" "0,1"
bitfld.long 0x74 5.--6. "TRGS20,TRGS20" "0,1,2,3"
hexmask.long.byte 0x74 0.--4. 1. "AINST20,AINST20"
line.long 0x78 "TSET21,AD General purpose Trigger Program Register 21"
bitfld.long 0x78 7. "ENINT21,ENINT21" "0,1"
bitfld.long 0x78 5.--6. "TRGS21,TRGS21" "0,1,2,3"
hexmask.long.byte 0x78 0.--4. 1. "AINST21,AINST21"
line.long 0x7C "TSET22,AD General purpose Trigger Program Register 22"
bitfld.long 0x7C 7. "ENINT22,ENINT22" "0,1"
bitfld.long 0x7C 5.--6. "TRGS22,TRGS22" "0,1,2,3"
hexmask.long.byte 0x7C 0.--4. 1. "AINST22,AINST22"
line.long 0x80 "TSET23,AD General purpose Trigger Program Register 23"
bitfld.long 0x80 7. "ENINT23,ENINT23" "0,1"
bitfld.long 0x80 5.--6. "TRGS23,TRGS23" "0,1,2,3"
hexmask.long.byte 0x80 0.--4. 1. "AINST23,AINST23"
rgroup.long 0x140++0x5F
line.long 0x0 "REG0,AD AD Conversion Result Register 0"
bitfld.long 0x0 29. "ADOVR_M0,ADOVR_M0" "0,1"
bitfld.long 0x0 28. "ADRF_M0,ADRF_M0" "0,1"
hexmask.long.word 0x0 16.--27. 1. "ADR_M0,ADR_M0"
hexmask.long.word 0x0 4.--15. 1. "ADR0,ADR0"
bitfld.long 0x0 1. "ADOVRF0,ADOVRF0" "0,1"
bitfld.long 0x0 0. "ADRF0,ADRF0" "0,1"
line.long 0x4 "REG1,AD Conversion Result Register 1"
bitfld.long 0x4 29. "ADOVR_M1,ADOVR_M1" "0,1"
bitfld.long 0x4 28. "ADRF_M1,ADRF_M1" "0,1"
hexmask.long.word 0x4 16.--27. 1. "ADR_M1,ADR_M1"
hexmask.long.word 0x4 4.--15. 1. "ADR1,ADR1"
bitfld.long 0x4 1. "ADOVRF1,ADOVRF1" "0,1"
bitfld.long 0x4 0. "ADRF1,ADRF1" "0,1"
line.long 0x8 "REG2,AD Conversion Result Register 2"
bitfld.long 0x8 29. "ADOVR_M2,ADOVR_M2" "0,1"
bitfld.long 0x8 28. "ADRF_M2,ADRF_M2" "0,1"
hexmask.long.word 0x8 16.--27. 1. "ADR_M2,ADR_M2"
hexmask.long.word 0x8 4.--15. 1. "ADR2,ADR2"
bitfld.long 0x8 1. "ADOVRF2,ADOVRF2" "0,1"
bitfld.long 0x8 0. "ADRF2,ADRF2" "0,1"
line.long 0xC "REG3,AD Conversion Result Register 3"
bitfld.long 0xC 29. "ADOVR_M3,ADOVR_M3" "0,1"
bitfld.long 0xC 28. "ADRF_M3,ADRF_M3" "0,1"
hexmask.long.word 0xC 16.--27. 1. "ADR_M3,ADR_M3"
hexmask.long.word 0xC 4.--15. 1. "ADR3,ADR3"
bitfld.long 0xC 1. "ADOVRF3,ADOVRF3" "0,1"
bitfld.long 0xC 0. "ADRF3,ADRF3" "0,1"
line.long 0x10 "REG4,AD Conversion Result Register 4"
bitfld.long 0x10 29. "ADOVR_M4,ADOVR_M4" "0,1"
bitfld.long 0x10 28. "ADRF_M4,ADRF_M4" "0,1"
hexmask.long.word 0x10 16.--27. 1. "ADR_M4,ADR_M4"
hexmask.long.word 0x10 4.--15. 1. "ADR4,ADR4"
bitfld.long 0x10 1. "ADOVRF4,ADOVRF4" "0,1"
bitfld.long 0x10 0. "ADRF4,ADRF4" "0,1"
line.long 0x14 "REG5,AD Conversion Result Register 5"
bitfld.long 0x14 29. "ADOVR_M5,ADOVR_M5" "0,1"
bitfld.long 0x14 28. "ADRF_M5,ADRF_M5" "0,1"
hexmask.long.word 0x14 16.--27. 1. "ADR_M5,ADR_M5"
hexmask.long.word 0x14 4.--15. 1. "ADR5,ADR5"
bitfld.long 0x14 1. "ADOVRF5,ADOVRF5" "0,1"
bitfld.long 0x14 0. "ADRF5,ADRF5" "0,1"
line.long 0x18 "REG6,AD Conversion Result Register 6"
bitfld.long 0x18 29. "ADOVR_M6,ADOVR_M6" "0,1"
bitfld.long 0x18 28. "ADRF_M6,ADRF_M6" "0,1"
hexmask.long.word 0x18 16.--27. 1. "ADR_M6,ADR_M6"
hexmask.long.word 0x18 4.--15. 1. "ADR6,ADR6"
bitfld.long 0x18 1. "ADOVRF6,ADOVRF6" "0,1"
bitfld.long 0x18 0. "ADRF6,ADRF6" "0,1"
line.long 0x1C "REG7,AD Conversion Result Register 7"
bitfld.long 0x1C 29. "ADOVR_M7,ADOVR_M7" "0,1"
bitfld.long 0x1C 28. "ADRF_M7,ADRF_M7" "0,1"
hexmask.long.word 0x1C 16.--27. 1. "ADR_M7,ADR_M7"
hexmask.long.word 0x1C 4.--15. 1. "ADR7,ADR7"
bitfld.long 0x1C 1. "ADOVRF7,ADOVRF7" "0,1"
bitfld.long 0x1C 0. "ADRF7,ADRF7" "0,1"
line.long 0x20 "REG8,AD Conversion Result Register 8"
bitfld.long 0x20 29. "ADOVR_M8,ADOVR_M8" "0,1"
bitfld.long 0x20 28. "ADRF_M8,ADRF_M8" "0,1"
hexmask.long.word 0x20 16.--27. 1. "ADR_M8,ADR_M8"
hexmask.long.word 0x20 4.--15. 1. "ADR8,ADR8"
bitfld.long 0x20 1. "ADOVRF8,ADOVRF8" "0,1"
bitfld.long 0x20 0. "ADRF8,ADRF8" "0,1"
line.long 0x24 "REG9,AD Conversion Result Register 9"
bitfld.long 0x24 29. "ADOVR_M9,ADOVR_M9" "0,1"
bitfld.long 0x24 28. "ADRF_M9,ADRF_M9" "0,1"
hexmask.long.word 0x24 16.--27. 1. "ADR_M9,ADR_M9"
hexmask.long.word 0x24 4.--15. 1. "ADR9,ADR9"
bitfld.long 0x24 1. "ADOVRF9,ADOVRF9" "0,1"
bitfld.long 0x24 0. "ADRF9,ADRF9" "0,1"
line.long 0x28 "REG10,AD Conversion Result Register 10"
bitfld.long 0x28 29. "ADOVR_M10,ADOVR_M10" "0,1"
bitfld.long 0x28 28. "ADRF_M10,ADRF_M10" "0,1"
hexmask.long.word 0x28 16.--27. 1. "ADR_M10,ADR_M10"
hexmask.long.word 0x28 4.--15. 1. "ADR10,ADR10"
bitfld.long 0x28 1. "ADOVRF10,ADOVRF10" "0,1"
bitfld.long 0x28 0. "ADRF10,ADRF10" "0,1"
line.long 0x2C "REG11,AD Conversion Result Register 11"
bitfld.long 0x2C 29. "ADOVR_M11,ADOVR_M11" "0,1"
bitfld.long 0x2C 28. "ADRF_M11,ADRF_M11" "0,1"
hexmask.long.word 0x2C 16.--27. 1. "ADR_M11,ADR_M11"
hexmask.long.word 0x2C 4.--15. 1. "ADR11,ADR11"
bitfld.long 0x2C 1. "ADOVRF11,ADOVRF11" "0,1"
bitfld.long 0x2C 0. "ADRF11,ADRF11" "0,1"
line.long 0x30 "REG12,AD Conversion Result Register 12"
bitfld.long 0x30 29. "ADOVR_M12,ADOVR_M12" "0,1"
bitfld.long 0x30 28. "ADRF_M12,ADRF_M12" "0,1"
hexmask.long.word 0x30 16.--27. 1. "ADR_M12,ADR_M12"
hexmask.long.word 0x30 4.--15. 1. "ADR12,ADR12"
bitfld.long 0x30 1. "ADOVRF12,ADOVRF12" "0,1"
bitfld.long 0x30 0. "ADRF12,ADRF12" "0,1"
line.long 0x34 "REG13,AD Conversion Result Register 13"
bitfld.long 0x34 29. "ADOVR_M13,ADOVR_M13" "0,1"
bitfld.long 0x34 28. "ADRF_M13,ADRF_M13" "0,1"
hexmask.long.word 0x34 16.--27. 1. "ADR_M13,ADR_M13"
hexmask.long.word 0x34 4.--15. 1. "ADR13,ADR13"
bitfld.long 0x34 1. "ADOVRF13,ADOVRF13" "0,1"
bitfld.long 0x34 0. "ADRF13,ADRF13" "0,1"
line.long 0x38 "REG14,AD Conversion Result Register 14"
bitfld.long 0x38 29. "ADOVR_M14,ADOVR_M14" "0,1"
bitfld.long 0x38 28. "ADRF_M14,ADRF_M14" "0,1"
hexmask.long.word 0x38 16.--27. 1. "ADR_M14,ADR_M14"
hexmask.long.word 0x38 4.--15. 1. "ADR14,ADR14"
bitfld.long 0x38 1. "ADOVRF14,ADOVRF14" "0,1"
bitfld.long 0x38 0. "ADRF14,ADRF14" "0,1"
line.long 0x3C "REG15,AD Conversion Result Register 15"
bitfld.long 0x3C 29. "ADOVR_M15,ADOVR_M15" "0,1"
bitfld.long 0x3C 28. "ADRF_M15,ADRF_M15" "0,1"
hexmask.long.word 0x3C 16.--27. 1. "ADR_M15,ADR_M15"
hexmask.long.word 0x3C 4.--15. 1. "ADR15,ADR15"
bitfld.long 0x3C 1. "ADOVRF15,ADOVRF15" "0,1"
bitfld.long 0x3C 0. "ADRF15,ADRF15" "0,1"
line.long 0x40 "REG16,AD Conversion Result Register 16"
bitfld.long 0x40 29. "ADOVR_M16,ADOVR_M16" "0,1"
bitfld.long 0x40 28. "ADRF_M16,ADRF_M16" "0,1"
hexmask.long.word 0x40 16.--27. 1. "ADR_M16,ADR_M16"
hexmask.long.word 0x40 4.--15. 1. "ADR16,ADR16"
bitfld.long 0x40 1. "ADOVRF16,ADOVRF16" "0,1"
bitfld.long 0x40 0. "ADRF16,ADRF16" "0,1"
line.long 0x44 "REG17,AD Conversion Result Register 17"
bitfld.long 0x44 29. "ADOVR_M17,ADOVR_M17" "0,1"
bitfld.long 0x44 28. "ADRF_M17,ADRF_M17" "0,1"
hexmask.long.word 0x44 16.--27. 1. "ADR_M17,ADR_M17"
hexmask.long.word 0x44 4.--15. 1. "ADR17,ADR17"
bitfld.long 0x44 1. "ADOVRF17,ADOVRF17" "0,1"
bitfld.long 0x44 0. "ADRF17,ADRF17" "0,1"
line.long 0x48 "REG18,AD Conversion Result Register 18"
bitfld.long 0x48 29. "ADOVR_M18,ADOVR_M18" "0,1"
bitfld.long 0x48 28. "ADRF_M18,ADRF_M18" "0,1"
hexmask.long.word 0x48 16.--27. 1. "ADR_M18,ADR_M18"
hexmask.long.word 0x48 4.--15. 1. "ADR18,ADR18"
bitfld.long 0x48 1. "ADOVRF18,ADOVRF18" "0,1"
bitfld.long 0x48 0. "ADRF18,ADRF18" "0,1"
line.long 0x4C "REG19,AD Conversion Result Register 19"
bitfld.long 0x4C 29. "ADOVR_M19,ADOVR_M19" "0,1"
bitfld.long 0x4C 28. "ADRF_M19,ADRF_M19" "0,1"
hexmask.long.word 0x4C 16.--27. 1. "ADR_M19,ADR_M19"
hexmask.long.word 0x4C 4.--15. 1. "ADR19,ADR19"
bitfld.long 0x4C 1. "ADOVRF19,ADOVRF19" "0,1"
bitfld.long 0x4C 0. "ADRF19,ADRF19" "0,1"
line.long 0x50 "REG20,AD Conversion Result Register 20"
bitfld.long 0x50 29. "ADOVR_M20,ADOVR_M20" "0,1"
bitfld.long 0x50 28. "ADRF_M20,ADRF_M20" "0,1"
hexmask.long.word 0x50 16.--27. 1. "ADR_M20,ADR_M20"
hexmask.long.word 0x50 4.--15. 1. "ADR20,ADR20"
bitfld.long 0x50 1. "ADOVRF20,ADOVRF20" "0,1"
bitfld.long 0x50 0. "ADRF20,ADRF20" "0,1"
line.long 0x54 "REG21,AD Conversion Result Register 21"
bitfld.long 0x54 29. "ADOVR_M21,ADOVR_M21" "0,1"
bitfld.long 0x54 28. "ADRF_M21,ADRF_M21" "0,1"
hexmask.long.word 0x54 16.--27. 1. "ADR_M21,ADR_M21"
hexmask.long.word 0x54 4.--15. 1. "ADR21,ADR21"
bitfld.long 0x54 1. "ADOVRF21,ADOVRF21" "0,1"
bitfld.long 0x54 0. "ADRF21,ADRF21" "0,1"
line.long 0x58 "REG22,AD Conversion Result Register 22"
bitfld.long 0x58 29. "ADOVR_M22,ADOVR_M22" "0,1"
bitfld.long 0x58 28. "ADRF_M22,ADRF_M22" "0,1"
hexmask.long.word 0x58 16.--27. 1. "ADR_M22,ADR_M22"
hexmask.long.word 0x58 4.--15. 1. "ADR22,ADR22"
bitfld.long 0x58 1. "ADOVRF22,ADOVRF22" "0,1"
bitfld.long 0x58 0. "ADRF22,ADRF22" "0,1"
line.long 0x5C "REG23,AD Conversion Result Register 23"
bitfld.long 0x5C 29. "ADOVR_M23,ADOVR_M23" "0,1"
bitfld.long 0x5C 28. "ADRF_M23,ADRF_M23" "0,1"
hexmask.long.word 0x5C 16.--27. 1. "ADR_M23,ADR_M23"
hexmask.long.word 0x5C 4.--15. 1. "ADR23,ADR23"
bitfld.long 0x5C 1. "ADOVRF23,ADOVRF23" "0,1"
bitfld.long 0x5C 0. "ADRF23,ADRF23" "0,1"
tree.end
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "AGP (Port Driving Control)"
base ad:0x4003FF00
group.byte 0x0++0x1
line.byte 0x0 "REG0,GPREG register for LCD"
bitfld.byte 0x0 0. "PDNKEEP,PDNKEEP" "0,1"
line.byte 0x1 "REG1,GPREG register"
bitfld.byte 0x1 6. "REG6,REG6" "0,1"
bitfld.byte 0x1 5. "REG5,REG5" "0,1"
bitfld.byte 0x1 4. "REG4,REG4" "0,1"
bitfld.byte 0x1 3. "REG3,REG3" "0,1"
bitfld.byte 0x1 2. "REG2,REG2" "0,1"
bitfld.byte 0x1 1. "REG1,REG1" "0,1"
bitfld.byte 0x1 0. "REG0,REG0" "0,1"
tree.end
endif
tree "CG (Clock Control)"
base ad:0x400F3000
group.long 0x0++0x13
line.long 0x0 "PROTECT,CG Protect Register"
hexmask.long.byte 0x0 0.--7. 1. "PROTECT,PROTECT"
line.long 0x4 "OSCCR,CG Oscillation Control Register"
rbitfld.long 0x4 19. "IHOSC2F,IHOSC2F" "0,1"
rbitfld.long 0x4 16. "IHOSC1F,IHOSC1F" "0,1"
rbitfld.long 0x4 9. "OSCF,OSCF" "0,1"
bitfld.long 0x4 8. "OSCSEL,OSCSEL" "0,1"
bitfld.long 0x4 3. "IHOSC2EN,IHOSC2EN" "0,1"
bitfld.long 0x4 1.--2. "EOSCEN,EOSCEN" "0,1,2,3"
bitfld.long 0x4 0. "IHOSC1EN,IHOSC1EN" "0,1"
line.long 0x8 "SYSCR,CG System clock control register"
hexmask.long.byte 0x8 24.--27. 1. "PRCKST,PRCKST"
rbitfld.long 0x8 16.--18. "GEARST,GEARST" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 8.--11. 1. "PRCK,PRCK"
bitfld.long 0x8 0.--2. "GEAR,GEAR" "0,1,2,3,4,5,6,7"
line.long 0xC "STBYCR,CG Standby Control Register"
bitfld.long 0xC 0.--1. "STBY,STBY" "0,1,2,3"
line.long 0x10 "SCOCR,CG SCOUT Control Register"
bitfld.long 0x10 4.--6. "SCODIV,SCODIV" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 1.--3. "SCOSEL,SCOSEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0. "SCOEN,SCOEN" "0,1"
group.long 0x20++0x3
line.long 0x0 "PLL0SEL,CG PLL select register for fsys"
hexmask.long.tbyte 0x0 8.--31. 1. "PLL0SET,PLL0SET"
rbitfld.long 0x0 2. "PLL0ST,PLL0ST" "0,1"
bitfld.long 0x0 1. "PLL0SEL,PLL0SEL" "0,1"
bitfld.long 0x0 0. "PLL0ON,PLL0ON" "0,1"
group.long 0x30++0x7
line.long 0x0 "WUPHCR,CG Warmup register for HOSC"
hexmask.long.word 0x0 20.--31. 1. "WUPT,WUPT"
bitfld.long 0x0 8. "WUCLK,WUCLK" "0,1"
rbitfld.long 0x0 1. "WUEF,WUEF" "0,1"
bitfld.long 0x0 0. "WUON,WUON" "0,1"
line.long 0x4 "WUPLCR,CG Low-speed oscillation warm-up register"
hexmask.long.word 0x4 12.--26. 1. "WUPTL,WUPTL"
rbitfld.long 0x4 1. "WULEF,WULEF" "0,1"
bitfld.long 0x4 0. "WULON,WULON" "0,1"
group.long 0x4C++0x13
line.long 0x0 "FSYSMENB,FSYSMENB"
rbitfld.long 0x0 31. "IPMENB31,IPMENB31" "0,1"
rbitfld.long 0x0 30. "IPMENB30,IPMENB30" "0,1"
rbitfld.long 0x0 29. "IPMENB29,IPMENB29" "0,1"
rbitfld.long 0x0 28. "IPMENB28,IPMENB28" "0,1"
rbitfld.long 0x0 27. "IPMENB27,IPMENB27" "0,1"
rbitfld.long 0x0 26. "IPMENB26,IPMENB26" "0,1"
rbitfld.long 0x0 25. "IPMENB25,IPMENB25" "0,1"
newline
rbitfld.long 0x0 24. "IPMENB24,IPMENB24" "0,1"
rbitfld.long 0x0 23. "IPMENB23,IPMENB23" "0,1"
rbitfld.long 0x0 22. "IPMENB22,IPMENB22" "0,1"
rbitfld.long 0x0 21. "IPMENB21,IPMENB21" "0,1"
rbitfld.long 0x0 20. "IPMENB20,IPMENB20" "0,1"
rbitfld.long 0x0 19. "IPMENB19,IPMENB19" "0,1"
rbitfld.long 0x0 18. "IPMENB18,IPMENB18" "0,1"
rbitfld.long 0x0 17. "IPMENB17,IPMENB17" "0,1"
newline
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
rbitfld.long 0x0 16. "IPMENB16,IPMENB16" "0,1"
rbitfld.long 0x0 15. "IPMENB15,IPMENB15" "0,1"
bitfld.long 0x0 14. "IPMENB14,IPMENB14" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
rbitfld.long 0x0 16. "IPMENB16,IPMENB16" "0,1"
rbitfld.long 0x0 15. "IPMENB15,IPMENB15" "0,1"
bitfld.long 0x0 14. "IPMENB14,IPMENB14" "0,1"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
rbitfld.long 0x0 15. "IPMENB15,IPMENB15" "0,1"
bitfld.long 0x0 14. "IPMENB14,IPMENB14" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
rbitfld.long 0x0 15. "IPMENB15,IPMENB15" "0,1"
bitfld.long 0x0 14. "IPMENB14,IPMENB14" "0,1"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
bitfld.long 0x0 14. "IPMENB14,IPMENB14" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x0 14. "IPMENB14,IPMENB14" "0,1"
endif
bitfld.long 0x0 13. "IPMENB13,IPMENB13" "0,1"
bitfld.long 0x0 12. "IPMENB12,IPMENB12" "0,1"
bitfld.long 0x0 11. "IPMENB11,IPMENB11" "0,1"
newline
rbitfld.long 0x0 10. "IPMENB10,IPMENB10" "0,1"
rbitfld.long 0x0 9. "IPMENB09,IPMENB09" "0,1"
rbitfld.long 0x0 8. "IPMENB08,IPMENB08" "0,1"
rbitfld.long 0x0 7. "IPMENB07,IPMENB07" "0,1"
rbitfld.long 0x0 6. "IPMENB06,IPMENB06" "0,1"
newline
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
rbitfld.long 0x0 5. "IPMENB05,IPMENB05" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
rbitfld.long 0x0 5. "IPMENB05,IPMENB05" "0,1"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
rbitfld.long 0x0 5. "IPMENB05,IPMENB05" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
rbitfld.long 0x0 5. "IPMENB05,IPMENB05" "0,1"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
rbitfld.long 0x0 5. "IPMENB05,IPMENB05" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
rbitfld.long 0x0 5. "IPMENB05,IPMENB05" "0,1"
endif
rbitfld.long 0x0 4. "IPMENB04,IPMENB04" "0,1"
rbitfld.long 0x0 3. "IPMENB03,IPMENB03" "0,1"
rbitfld.long 0x0 2. "IPMENB02,IPMENB02" "0,1"
rbitfld.long 0x0 1. "IPMENB01,IPMENB01" "0,1"
rbitfld.long 0x0 0. "IPMENB00,IPMENB00" "0,1"
line.long 0x4 "FSYSENA,CG output control register A for fsys clock"
bitfld.long 0x4 31. "IPENA31,IPENA31" "0,1"
bitfld.long 0x4 30. "IPENA30,IPENA30" "0,1"
bitfld.long 0x4 29. "IPENA29,IPENA29" "0,1"
bitfld.long 0x4 28. "IPENA28,IPENA28" "0,1"
bitfld.long 0x4 27. "IPENA27,IPENA27" "0,1"
bitfld.long 0x4 26. "IPENA26,IPENA26" "0,1"
bitfld.long 0x4 25. "IPENA25,IPENA25" "0,1"
bitfld.long 0x4 24. "IPENA24,IPENA24" "0,1"
newline
bitfld.long 0x4 23. "IPENA23,IPENA23" "0,1"
bitfld.long 0x4 22. "IPENA22,IPENA22" "0,1"
bitfld.long 0x4 21. "IPENA21,IPENA21" "0,1"
bitfld.long 0x4 20. "IPENA20,IPENA20" "0,1"
bitfld.long 0x4 19. "IPENA19,IPENA19" "0,1"
bitfld.long 0x4 18. "IPENA18,IPENA18" "0,1"
bitfld.long 0x4 17. "IPENA17,IPENA17" "0,1"
newline
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
bitfld.long 0x4 16. "IPENA16,IPENA16" "0,1"
bitfld.long 0x4 15. "IPENA15,IPENA15" "0,1"
bitfld.long 0x4 14. "IPENA14,IPENA14" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x4 16. "IPENA16,IPENA16" "0,1"
bitfld.long 0x4 15. "IPENA15,IPENA15" "0,1"
bitfld.long 0x4 14. "IPENA14,IPENA14" "0,1"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
bitfld.long 0x4 15. "IPENA15,IPENA15" "0,1"
bitfld.long 0x4 14. "IPENA14,IPENA14" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x4 15. "IPENA15,IPENA15" "0,1"
bitfld.long 0x4 14. "IPENA14,IPENA14" "0,1"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
bitfld.long 0x4 14. "IPENA14,IPENA14" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x4 14. "IPENA14,IPENA14" "0,1"
endif
bitfld.long 0x4 13. "IPENA13,IPENA13" "0,1"
bitfld.long 0x4 12. "IPENA12,IPENA12" "0,1"
bitfld.long 0x4 11. "IPENA11,IPENA11" "0,1"
newline
bitfld.long 0x4 10. "IPENA10,IPENA10" "0,1"
bitfld.long 0x4 9. "IPENA09,IPENA09" "0,1"
bitfld.long 0x4 8. "IPENA08,IPENA08" "0,1"
bitfld.long 0x4 7. "IPENA07,IPENA07" "0,1"
bitfld.long 0x4 6. "IPENA06,IPENA06" "0,1"
bitfld.long 0x4 5. "IPENA05,IPENA05" "0,1"
bitfld.long 0x4 4. "IPENA04,IPENA04" "0,1"
bitfld.long 0x4 3. "IPENA03,IPENA03" "0,1"
newline
bitfld.long 0x4 2. "IPENA02,IPENA02" "0,1"
bitfld.long 0x4 1. "IPENA01,IPENA01" "0,1"
bitfld.long 0x4 0. "IPENA00,IPENA00" "0,1"
line.long 0x8 "FSYSENB,CG output control register B for fsys clock"
bitfld.long 0x8 31. "IPENB31,IPENB31" "0,1"
bitfld.long 0x8 27. "IPENB27,IPENB27" "0,1"
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
bitfld.long 0x8 25. "IPENB25,IPENB25" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x8 25. "IPENB25,IPENB25" "0,1"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
bitfld.long 0x8 25. "IPENB25,IPENB25" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x8 25. "IPENB25,IPENB25" "0,1"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
bitfld.long 0x8 25. "IPENB25,IPENB25" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x8 25. "IPENB25,IPENB25" "0,1"
endif
bitfld.long 0x8 24. "IPENB24,IPENB24" "0,1"
bitfld.long 0x8 23. "IPENB23,IPENB23" "0,1"
bitfld.long 0x8 22. "IPENB22,IPENB22" "0,1"
bitfld.long 0x8 21. "IPENB21,IPENB21" "0,1"
newline
bitfld.long 0x8 20. "IPENB20,IPENB20" "0,1"
bitfld.long 0x8 19. "IPENB19,IPENB19" "0,1"
bitfld.long 0x8 18. "IPENB18,IPENB18" "0,1"
bitfld.long 0x8 17. "IPENB17,IPENB17" "0,1"
bitfld.long 0x8 16. "IPENB16,IPENB16" "0,1"
bitfld.long 0x8 15. "IPENB15,IPENB15" "0,1"
newline
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
bitfld.long 0x8 14. "IPENB14,IPENB14" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x8 14. "IPENB14,IPENB14" "0,1"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
bitfld.long 0x8 14. "IPENB14,IPENB14" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x8 14. "IPENB14,IPENB14" "0,1"
endif
bitfld.long 0x8 13. "IPENB13,IPENB13" "0,1"
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HM*B*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x8 12. "IPENB12,IPENB12" "0,1"
endif
bitfld.long 0x8 11. "IPENB11,IPENB11" "0,1"
bitfld.long 0x8 10. "IPENB10,IPENB10" "0,1"
bitfld.long 0x8 9. "IPENB09,IPENB09" "0,1"
newline
bitfld.long 0x8 8. "IPENB08,IPENB08" "0,1"
bitfld.long 0x8 7. "IPENB07,IPENB07" "0,1"
bitfld.long 0x8 6. "IPENB06,IPENB06" "0,1"
bitfld.long 0x8 5. "IPENB05,IPENB05" "0,1"
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
bitfld.long 0x8 4. "IPENB04,IPENB04" "0,1"
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x8 4. "IPENB04,IPENB04" "0,1"
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
bitfld.long 0x8 4. "IPENB04,IPENB04" "0,1"
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x8 4. "IPENB04,IPENB04" "0,1"
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HM*B*"))
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x8 3. "IPENB03,IPENB03" "0,1"
bitfld.long 0x8 2. "IPENB02,IPENB02" "0,1"
bitfld.long 0x8 1. "IPENB01,IPENB01" "0,1"
endif
newline
bitfld.long 0x8 0. "IPENB00,IPENB00" "0,1"
line.long 0xC "FCEN,CG output control register for fc clock"
bitfld.long 0xC 7. "FCIPEN07,FCIPEN07" "0,1"
line.long 0x10 "SPCLKEN,CG Output control register for ADC AND TRACE CLOCK"
bitfld.long 0x10 16. "ADCKEN,ADCKEN" "0,1"
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HM*B*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x10 0. "TRCKEN,TRCKEN" "0,1"
endif
tree.end
tree "COMP (Comparator)"
base ad:0x400BC100
group.long 0x0++0x3
line.long 0x0 "CTRLA,CMP control register A"
bitfld.long 0x0 1. "CMPISEL,CMPISEL" "0,1"
bitfld.long 0x0 0. "CMPEN,CMPEN" "0,1"
tree.end
tree "CRC (Cyclic Redundancy Check Calculation)"
base ad:0x400BBC00
group.long 0x0++0x3
line.long 0x0 "DIN,CRC input data register"
hexmask.long 0x0 0.--31. 1. "CRCDIN,CRCDIN"
group.long 0x14++0x3
line.long 0x0 "TYP,CRC data type register"
bitfld.long 0x0 2.--3. "CFMT,CFMT" "0,1,2,3"
bitfld.long 0x0 0.--1. "DBIT,DBIT" "0,1,2,3"
group.long 0x2C++0x3
line.long 0x0 "CLC,CRC calculation result register"
hexmask.long 0x0 0.--31. 1. "CRCCLC,CRCCLC"
tree.end
tree "DAC (8-bit Digital to Analog Converter)"
base ad:0x0
tree "DAC0"
base ad:0x40054000
group.long 0x0++0x7
line.long 0x0 "CTL,DAC Control Register"
bitfld.long 0x0 0. "EN,EN" "0,1"
line.long 0x4 "REG,DAC output Register"
hexmask.long.byte 0x4 0.--7. 1. "DAC,DAC"
tree.end
tree "DAC1"
base ad:0x40055000
group.long 0x0++0x7
line.long 0x0 "CTL,DAC Control Register"
bitfld.long 0x0 0. "EN,EN" "0,1"
line.long 0x4 "REG,DAC output Register"
hexmask.long.byte 0x4 0.--7. 1. "DAC,DAC"
tree.end
tree.end
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "DLCD (LCD Display Control)"
base ad:0x4003F200
group.byte 0x0++0x6
line.byte 0x0 "EN,LCD Enable register"
bitfld.byte 0x0 0. "LCDE,LCDE" "0,1"
line.byte 0x1 "CR1,LCD Control register1"
rbitfld.byte 0x1 4. "LCDF,LCDF" "0,1"
bitfld.byte 0x1 0.--1. "EDSP,EDSP" "0,1,2,3"
line.byte 0x2 "CR2,LCD Control register2"
bitfld.byte 0x2 3. "CONTSEL,CONTSEL" "0,1"
bitfld.byte 0x2 2. "CLKSEL,CLKSEL" "0,1"
bitfld.byte 0x2 0.--1. "DUTY,DUTY" "0,1,2,3"
line.byte 0x3 "CR3,LCD Control register3"
rbitfld.byte 0x3 7. "BFLG,BFLG" "0,1"
bitfld.byte 0x3 2.--3. "BTGL,BTGL" "0,1,2,3"
bitfld.byte 0x3 0.--1. "BSEL,BSEL" "0,1,2,3"
line.byte 0x4 "CR4,LCD Control register4"
bitfld.byte 0x4 0.--2. "RVDPIN,RVDPIN" "0,1,2,3,4,5,6,7"
line.byte 0x5 "STCLKCYC,LCD State clock control register"
hexmask.byte 0x5 0.--7. 1. "STCYC,STCYC"
line.byte 0x6 "CONTCYC,LCD Contrast control register"
hexmask.byte 0x6 0.--7. 1. "LRES,LRES"
rgroup.byte 0x8++0x0
line.byte 0x0 "REGBSY,LCD register busy flag"
bitfld.byte 0x0 3. "CONF,CONF" "0,1"
bitfld.byte 0x0 2. "STCF,STCF" "0,1"
bitfld.byte 0x0 1. "CR3F,CR3F" "0,1"
bitfld.byte 0x0 0. "CR1F,CR1F" "0,1"
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
group.byte 0x14++0x0
line.byte 0x0 "BUF04,LCD Buffer register04"
hexmask.byte 0x0 4.--7. 1. "SEG04H,SEG04H"
hexmask.byte 0x0 0.--3. 1. "SEG04L,SEG04L"
group.byte 0x2C++0x0
line.byte 0x0 "BUF28,LCD Buffer register28"
hexmask.byte 0x0 4.--7. 1. "SEG28H,SEG28H"
hexmask.byte 0x0 0.--3. 1. "SEG28L,SEG28L"
group.byte 0x31++0x3
line.byte 0x0 "BUF33,LCD Buffer register33"
hexmask.byte 0x0 4.--7. 1. "SEG33H,SEG33H"
hexmask.byte 0x0 0.--3. 1. "SEG33L,SEG33L"
line.byte 0x1 "BUF34,LCD Buffer register34"
hexmask.byte 0x1 4.--7. 1. "SEG34H,SEG34H"
hexmask.byte 0x1 0.--3. 1. "SEG34L,SEG34L"
line.byte 0x2 "BUF35,LCD Buffer register35"
hexmask.byte 0x2 4.--7. 1. "SEG35H,SEG35H"
hexmask.byte 0x2 0.--3. 1. "SEG35L,SEG35L"
line.byte 0x3 "BUF36,LCD Buffer register36"
hexmask.byte 0x3 4.--7. 1. "SEG36H,SEG36H"
hexmask.byte 0x3 0.--3. 1. "SEG36L,SEG36L"
endif
sif (cpuis("TMPM3HN*B*"))
group.byte 0x14++0x0
line.byte 0x0 "BUF04,LCD Buffer register04"
hexmask.byte 0x0 4.--7. 1. "SEG04H,SEG04H"
hexmask.byte 0x0 0.--3. 1. "SEG04L,SEG04L"
group.byte 0x2C++0x0
line.byte 0x0 "BUF28,LCD Buffer register28"
hexmask.byte 0x0 4.--7. 1. "SEG28H,SEG28H"
hexmask.byte 0x0 0.--3. 1. "SEG28L,SEG28L"
group.byte 0x31++0x3
line.byte 0x0 "BUF33,LCD Buffer register33"
hexmask.byte 0x0 4.--7. 1. "SEG33H,SEG33H"
hexmask.byte 0x0 0.--3. 1. "SEG33L,SEG33L"
line.byte 0x1 "BUF34,LCD Buffer register34"
hexmask.byte 0x1 4.--7. 1. "SEG34H,SEG34H"
hexmask.byte 0x1 0.--3. 1. "SEG34L,SEG34L"
line.byte 0x2 "BUF35,LCD Buffer register35"
hexmask.byte 0x2 4.--7. 1. "SEG35H,SEG35H"
hexmask.byte 0x2 0.--3. 1. "SEG35L,SEG35L"
line.byte 0x3 "BUF36,LCD Buffer register36"
hexmask.byte 0x3 4.--7. 1. "SEG36H,SEG36H"
hexmask.byte 0x3 0.--3. 1. "SEG36L,SEG36L"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
group.byte 0x10++0x4
line.byte 0x0 "BUF00,LCD Buffer register00"
hexmask.byte 0x0 4.--7. 1. "SEG00H,SEG00H"
hexmask.byte 0x0 0.--3. 1. "SEG00L,SEG00L"
line.byte 0x1 "BUF01,LCD Buffer register01"
hexmask.byte 0x1 4.--7. 1. "SEG01H,SEG01H"
hexmask.byte 0x1 0.--3. 1. "SEG01L,SEG01L"
line.byte 0x2 "BUF02,LCD Buffer register02"
hexmask.byte 0x2 4.--7. 1. "SEG02H,SEG02H"
hexmask.byte 0x2 0.--3. 1. "SEG02L,SEG02L"
line.byte 0x3 "BUF03,LCD Buffer register03"
hexmask.byte 0x3 4.--7. 1. "SEG03H,SEG03H"
hexmask.byte 0x3 0.--3. 1. "SEG03L,SEG03L"
line.byte 0x4 "BUF04,LCD Buffer register04"
hexmask.byte 0x4 4.--7. 1. "SEG04H,SEG04H"
hexmask.byte 0x4 0.--3. 1. "SEG04L,SEG04L"
group.byte 0x2C++0x8
line.byte 0x0 "BUF28,LCD Buffer register28"
hexmask.byte 0x0 4.--7. 1. "SEG28H,SEG28H"
hexmask.byte 0x0 0.--3. 1. "SEG28L,SEG28L"
line.byte 0x1 "BUF29,LCD Buffer register29"
hexmask.byte 0x1 4.--7. 1. "SEG29H,SEG29H"
hexmask.byte 0x1 0.--3. 1. "SEG29L,SEG29L"
line.byte 0x2 "BUF30,LCD Buffer register30"
hexmask.byte 0x2 4.--7. 1. "SEG30H,SEG30H"
hexmask.byte 0x2 0.--3. 1. "SEG30L,SEG30L"
line.byte 0x3 "BUF31,LCD Buffer register31"
hexmask.byte 0x3 4.--7. 1. "SEG31H,SEG31H"
hexmask.byte 0x3 0.--3. 1. "SEG31L,SEG31L"
line.byte 0x4 "BUF32,LCD Buffer register32"
hexmask.byte 0x4 4.--7. 1. "SEG32H,SEG32H"
hexmask.byte 0x4 0.--3. 1. "SEG32L,SEG32L"
line.byte 0x5 "BUF33,LCD Buffer register33"
hexmask.byte 0x5 4.--7. 1. "SEG33H,SEG33H"
hexmask.byte 0x5 0.--3. 1. "SEG33L,SEG33L"
line.byte 0x6 "BUF34,LCD Buffer register34"
hexmask.byte 0x6 4.--7. 1. "SEG34H,SEG34H"
hexmask.byte 0x6 0.--3. 1. "SEG34L,SEG34L"
line.byte 0x7 "BUF35,LCD Buffer register35"
hexmask.byte 0x7 4.--7. 1. "SEG35H,SEG35H"
hexmask.byte 0x7 0.--3. 1. "SEG35L,SEG35L"
line.byte 0x8 "BUF36,LCD Buffer register36"
hexmask.byte 0x8 4.--7. 1. "SEG36H,SEG36H"
hexmask.byte 0x8 0.--3. 1. "SEG36L,SEG36L"
endif
sif (cpuis("TMPM3HP*B*"))
group.byte 0x10++0x4
line.byte 0x0 "BUF00,LCD Buffer register00"
hexmask.byte 0x0 4.--7. 1. "SEG00H,SEG00H"
hexmask.byte 0x0 0.--3. 1. "SEG00L,SEG00L"
line.byte 0x1 "BUF01,LCD Buffer register01"
hexmask.byte 0x1 4.--7. 1. "SEG01H,SEG01H"
hexmask.byte 0x1 0.--3. 1. "SEG01L,SEG01L"
line.byte 0x2 "BUF02,LCD Buffer register02"
hexmask.byte 0x2 4.--7. 1. "SEG02H,SEG02H"
hexmask.byte 0x2 0.--3. 1. "SEG02L,SEG02L"
line.byte 0x3 "BUF03,LCD Buffer register03"
hexmask.byte 0x3 4.--7. 1. "SEG03H,SEG03H"
hexmask.byte 0x3 0.--3. 1. "SEG03L,SEG03L"
line.byte 0x4 "BUF04,LCD Buffer register04"
hexmask.byte 0x4 4.--7. 1. "SEG04H,SEG04H"
hexmask.byte 0x4 0.--3. 1. "SEG04L,SEG04L"
group.byte 0x2C++0x8
line.byte 0x0 "BUF28,LCD Buffer register28"
hexmask.byte 0x0 4.--7. 1. "SEG28H,SEG28H"
hexmask.byte 0x0 0.--3. 1. "SEG28L,SEG28L"
line.byte 0x1 "BUF29,LCD Buffer register29"
hexmask.byte 0x1 4.--7. 1. "SEG29H,SEG29H"
hexmask.byte 0x1 0.--3. 1. "SEG29L,SEG29L"
line.byte 0x2 "BUF30,LCD Buffer register30"
hexmask.byte 0x2 4.--7. 1. "SEG30H,SEG30H"
hexmask.byte 0x2 0.--3. 1. "SEG30L,SEG30L"
line.byte 0x3 "BUF31,LCD Buffer register31"
hexmask.byte 0x3 4.--7. 1. "SEG31H,SEG31H"
hexmask.byte 0x3 0.--3. 1. "SEG31L,SEG31L"
line.byte 0x4 "BUF32,LCD Buffer register32"
hexmask.byte 0x4 4.--7. 1. "SEG32H,SEG32H"
hexmask.byte 0x4 0.--3. 1. "SEG32L,SEG32L"
line.byte 0x5 "BUF33,LCD Buffer register33"
hexmask.byte 0x5 4.--7. 1. "SEG33H,SEG33H"
hexmask.byte 0x5 0.--3. 1. "SEG33L,SEG33L"
line.byte 0x6 "BUF34,LCD Buffer register34"
hexmask.byte 0x6 4.--7. 1. "SEG34H,SEG34H"
hexmask.byte 0x6 0.--3. 1. "SEG34L,SEG34L"
line.byte 0x7 "BUF35,LCD Buffer register35"
hexmask.byte 0x7 4.--7. 1. "SEG35H,SEG35H"
hexmask.byte 0x7 0.--3. 1. "SEG35L,SEG35L"
line.byte 0x8 "BUF36,LCD Buffer register36"
hexmask.byte 0x8 4.--7. 1. "SEG36H,SEG36H"
hexmask.byte 0x8 0.--3. 1. "SEG36L,SEG36L"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
group.byte 0x10++0x4
line.byte 0x0 "BUF00,LCD Buffer register00"
hexmask.byte 0x0 4.--7. 1. "SEG00H,SEG00H"
hexmask.byte 0x0 0.--3. 1. "SEG00L,SEG00L"
line.byte 0x1 "BUF01,LCD Buffer register01"
hexmask.byte 0x1 4.--7. 1. "SEG01H,SEG01H"
hexmask.byte 0x1 0.--3. 1. "SEG01L,SEG01L"
line.byte 0x2 "BUF02,LCD Buffer register02"
hexmask.byte 0x2 4.--7. 1. "SEG02H,SEG02H"
hexmask.byte 0x2 0.--3. 1. "SEG02L,SEG02L"
line.byte 0x3 "BUF03,LCD Buffer register03"
hexmask.byte 0x3 4.--7. 1. "SEG03H,SEG03H"
hexmask.byte 0x3 0.--3. 1. "SEG03L,SEG03L"
line.byte 0x4 "BUF04,LCD Buffer register04"
hexmask.byte 0x4 4.--7. 1. "SEG04H,SEG04H"
hexmask.byte 0x4 0.--3. 1. "SEG04L,SEG04L"
group.byte 0x2C++0x8
line.byte 0x0 "BUF28,LCD Buffer register28"
hexmask.byte 0x0 4.--7. 1. "SEG28H,SEG28H"
hexmask.byte 0x0 0.--3. 1. "SEG28L,SEG28L"
line.byte 0x1 "BUF29,LCD Buffer register29"
hexmask.byte 0x1 4.--7. 1. "SEG29H,SEG29H"
hexmask.byte 0x1 0.--3. 1. "SEG29L,SEG29L"
line.byte 0x2 "BUF30,LCD Buffer register30"
hexmask.byte 0x2 4.--7. 1. "SEG30H,SEG30H"
hexmask.byte 0x2 0.--3. 1. "SEG30L,SEG30L"
line.byte 0x3 "BUF31,LCD Buffer register31"
hexmask.byte 0x3 4.--7. 1. "SEG31H,SEG31H"
hexmask.byte 0x3 0.--3. 1. "SEG31L,SEG31L"
line.byte 0x4 "BUF32,LCD Buffer register32"
hexmask.byte 0x4 4.--7. 1. "SEG32H,SEG32H"
hexmask.byte 0x4 0.--3. 1. "SEG32L,SEG32L"
line.byte 0x5 "BUF33,LCD Buffer register33"
hexmask.byte 0x5 4.--7. 1. "SEG33H,SEG33H"
hexmask.byte 0x5 0.--3. 1. "SEG33L,SEG33L"
line.byte 0x6 "BUF34,LCD Buffer register34"
hexmask.byte 0x6 4.--7. 1. "SEG34H,SEG34H"
hexmask.byte 0x6 0.--3. 1. "SEG34L,SEG34L"
line.byte 0x7 "BUF35,LCD Buffer register35"
hexmask.byte 0x7 4.--7. 1. "SEG35H,SEG35H"
hexmask.byte 0x7 0.--3. 1. "SEG35L,SEG35L"
line.byte 0x8 "BUF36,LCD Buffer register36"
hexmask.byte 0x8 4.--7. 1. "SEG36H,SEG36H"
hexmask.byte 0x8 0.--3. 1. "SEG36L,SEG36L"
endif
sif (cpuis("TMPM3HQ*B*"))
group.byte 0x10++0x4
line.byte 0x0 "BUF00,LCD Buffer register00"
hexmask.byte 0x0 4.--7. 1. "SEG00H,SEG00H"
hexmask.byte 0x0 0.--3. 1. "SEG00L,SEG00L"
line.byte 0x1 "BUF01,LCD Buffer register01"
hexmask.byte 0x1 4.--7. 1. "SEG01H,SEG01H"
hexmask.byte 0x1 0.--3. 1. "SEG01L,SEG01L"
line.byte 0x2 "BUF02,LCD Buffer register02"
hexmask.byte 0x2 4.--7. 1. "SEG02H,SEG02H"
hexmask.byte 0x2 0.--3. 1. "SEG02L,SEG02L"
line.byte 0x3 "BUF03,LCD Buffer register03"
hexmask.byte 0x3 4.--7. 1. "SEG03H,SEG03H"
hexmask.byte 0x3 0.--3. 1. "SEG03L,SEG03L"
line.byte 0x4 "BUF04,LCD Buffer register04"
hexmask.byte 0x4 4.--7. 1. "SEG04H,SEG04H"
hexmask.byte 0x4 0.--3. 1. "SEG04L,SEG04L"
group.byte 0x2C++0x8
line.byte 0x0 "BUF28,LCD Buffer register28"
hexmask.byte 0x0 4.--7. 1. "SEG28H,SEG28H"
hexmask.byte 0x0 0.--3. 1. "SEG28L,SEG28L"
line.byte 0x1 "BUF29,LCD Buffer register29"
hexmask.byte 0x1 4.--7. 1. "SEG29H,SEG29H"
hexmask.byte 0x1 0.--3. 1. "SEG29L,SEG29L"
line.byte 0x2 "BUF30,LCD Buffer register30"
hexmask.byte 0x2 4.--7. 1. "SEG30H,SEG30H"
hexmask.byte 0x2 0.--3. 1. "SEG30L,SEG30L"
line.byte 0x3 "BUF31,LCD Buffer register31"
hexmask.byte 0x3 4.--7. 1. "SEG31H,SEG31H"
hexmask.byte 0x3 0.--3. 1. "SEG31L,SEG31L"
line.byte 0x4 "BUF32,LCD Buffer register32"
hexmask.byte 0x4 4.--7. 1. "SEG32H,SEG32H"
hexmask.byte 0x4 0.--3. 1. "SEG32L,SEG32L"
line.byte 0x5 "BUF33,LCD Buffer register33"
hexmask.byte 0x5 4.--7. 1. "SEG33H,SEG33H"
hexmask.byte 0x5 0.--3. 1. "SEG33L,SEG33L"
line.byte 0x6 "BUF34,LCD Buffer register34"
hexmask.byte 0x6 4.--7. 1. "SEG34H,SEG34H"
hexmask.byte 0x6 0.--3. 1. "SEG34L,SEG34L"
line.byte 0x7 "BUF35,LCD Buffer register35"
hexmask.byte 0x7 4.--7. 1. "SEG35H,SEG35H"
hexmask.byte 0x7 0.--3. 1. "SEG35L,SEG35L"
line.byte 0x8 "BUF36,LCD Buffer register36"
hexmask.byte 0x8 4.--7. 1. "SEG36H,SEG36H"
hexmask.byte 0x8 0.--3. 1. "SEG36L,SEG36L"
endif
group.byte 0x15++0x16
line.byte 0x0 "BUF05,LCD Buffer register05"
hexmask.byte 0x0 4.--7. 1. "SEG05H,SEG05H"
hexmask.byte 0x0 0.--3. 1. "SEG05L,SEG05L"
line.byte 0x1 "BUF06,LCD Buffer register06"
hexmask.byte 0x1 4.--7. 1. "SEG06H,SEG06H"
hexmask.byte 0x1 0.--3. 1. "SEG06L,SEG06L"
line.byte 0x2 "BUF07,LCD Buffer register07"
hexmask.byte 0x2 4.--7. 1. "SEG07H,SEG07H"
hexmask.byte 0x2 0.--3. 1. "SEG07L,SEG07L"
line.byte 0x3 "BUF08,LCD Buffer register08"
hexmask.byte 0x3 4.--7. 1. "SEG08H,SEG08H"
hexmask.byte 0x3 0.--3. 1. "SEG08L,SEG08L"
line.byte 0x4 "BUF09,LCD Buffer register09"
hexmask.byte 0x4 4.--7. 1. "SEG09H,SEG09H"
hexmask.byte 0x4 0.--3. 1. "SEG09L,SEG09L"
line.byte 0x5 "BUF10,LCD Buffer register10"
hexmask.byte 0x5 4.--7. 1. "SEG10H,SEG10H"
hexmask.byte 0x5 0.--3. 1. "SEG10L,SEG10L"
line.byte 0x6 "BUF11,LCD Buffer register11"
hexmask.byte 0x6 4.--7. 1. "SEG11H,SEG11H"
hexmask.byte 0x6 0.--3. 1. "SEG11L,SEG11L"
line.byte 0x7 "BUF12,LCD Buffer register12"
hexmask.byte 0x7 4.--7. 1. "SEG12H,SEG12H"
hexmask.byte 0x7 0.--3. 1. "SEG12L,SEG12L"
line.byte 0x8 "BUF13,LCD Buffer register13"
hexmask.byte 0x8 4.--7. 1. "SEG13H,SEG13H"
hexmask.byte 0x8 0.--3. 1. "SEG13L,SEG13L"
line.byte 0x9 "BUF14,LCD Buffer register14"
hexmask.byte 0x9 4.--7. 1. "SEG14H,SEG14H"
hexmask.byte 0x9 0.--3. 1. "SEG14L,SEG14L"
line.byte 0xA "BUF15,LCD Buffer register15"
hexmask.byte 0xA 4.--7. 1. "SEG15H,SEG15H"
hexmask.byte 0xA 0.--3. 1. "SEG15L,SEG15L"
line.byte 0xB "BUF16,LCD Buffer register16"
hexmask.byte 0xB 4.--7. 1. "SEG16H,SEG16H"
hexmask.byte 0xB 0.--3. 1. "SEG16L,SEG16L"
line.byte 0xC "BUF17,LCD Buffer register17"
hexmask.byte 0xC 4.--7. 1. "SEG17H,SEG17H"
hexmask.byte 0xC 0.--3. 1. "SEG17L,SEG17L"
line.byte 0xD "BUF18,LCD Buffer register18"
hexmask.byte 0xD 4.--7. 1. "SEG18H,SEG18H"
hexmask.byte 0xD 0.--3. 1. "SEG18L,SEG18L"
line.byte 0xE "BUF19,LCD Buffer register19"
hexmask.byte 0xE 4.--7. 1. "SEG19H,SEG19H"
hexmask.byte 0xE 0.--3. 1. "SEG19L,SEG19L"
line.byte 0xF "BUF20,LCD Buffer register20"
hexmask.byte 0xF 4.--7. 1. "SEG20H,SEG20H"
hexmask.byte 0xF 0.--3. 1. "SEG20L,SEG20L"
line.byte 0x10 "BUF21,LCD Buffer register21"
hexmask.byte 0x10 4.--7. 1. "SEG21H,SEG21H"
hexmask.byte 0x10 0.--3. 1. "SEG21L,SEG21L"
line.byte 0x11 "BUF22,LCD Buffer register22"
hexmask.byte 0x11 4.--7. 1. "SEG22H,SEG22H"
hexmask.byte 0x11 0.--3. 1. "SEG22L,SEG22L"
line.byte 0x12 "BUF23,LCD Buffer register23"
hexmask.byte 0x12 4.--7. 1. "SEG23H,SEG23H"
hexmask.byte 0x12 0.--3. 1. "SEG23L,SEG23L"
line.byte 0x13 "BUF24,LCD Buffer register24"
hexmask.byte 0x13 4.--7. 1. "SEG24H,SEG24H"
hexmask.byte 0x13 0.--3. 1. "SEG24L,SEG24L"
line.byte 0x14 "BUF25,LCD Buffer register25"
hexmask.byte 0x14 4.--7. 1. "SEG25H,SEG25H"
hexmask.byte 0x14 0.--3. 1. "SEG25L,SEG25L"
line.byte 0x15 "BUF26,LCD Buffer register26"
hexmask.byte 0x15 4.--7. 1. "SEG26H,SEG26H"
hexmask.byte 0x15 0.--3. 1. "SEG26L,SEG26L"
line.byte 0x16 "BUF27,LCD Buffer register27"
hexmask.byte 0x16 4.--7. 1. "SEG27H,SEG27H"
hexmask.byte 0x16 0.--3. 1. "SEG27L,SEG27L"
group.byte 0x35++0x2
line.byte 0x0 "BUF37,LCD Buffer register37"
hexmask.byte 0x0 4.--7. 1. "SEG37H,SEG37H"
hexmask.byte 0x0 0.--3. 1. "SEG37L,SEG37L"
line.byte 0x1 "BUF38,LCD Buffer register38"
hexmask.byte 0x1 4.--7. 1. "SEG38H,SEG38H"
hexmask.byte 0x1 0.--3. 1. "SEG38L,SEG38L"
line.byte 0x2 "BUF39,LCD Buffer register39"
hexmask.byte 0x2 4.--7. 1. "SEG39H,SEG39H"
hexmask.byte 0x2 0.--3. 1. "SEG39L,SEG39L"
tree.end
endif
tree "DMA (Direct Memory Access)"
base ad:0x0
tree "DMAA"
base ad:0x4004C000
rgroup.long 0x0++0x3
line.long 0x0 "STATUS,DMA Status Register"
bitfld.long 0x0 0. "MASTER_ENABLE,MASTER_ENABLE" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "CFG,DMA Configuration Register"
bitfld.long 0x0 0. "MASTER_ENABLE,MASTER_ENABLE" "0,1"
group.long 0x8++0x3
line.long 0x0 "CTRLBASEPTR,DMA Control Data Base Pointer Register"
hexmask.long.tbyte 0x0 10.--31. 1. "CTRL_BASE_PTR,CTRL_BASE_PTR"
rgroup.long 0xC++0x3
line.long 0x0 "ALTCTRLBASEPTR,DMA Channel Alternate Control Data Base"
hexmask.long 0x0 0.--31. 1. "ALT_CTRL_BASE_PTR,ALT_CTRL_BASE_PTR"
wgroup.long 0x14++0x3
line.long 0x0 "CHNLSWREQUEST,DMA Channel Software Request Register"
hexmask.long 0x0 0.--31. 1. "CHNL_SW_REQUEST,CHNL_SW_REQUEST"
group.long 0x18++0x3
line.long 0x0 "CHNLUSEBURSTSET,DMA Channel Useburst Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_USEBURST_SET,CHNL_USEBURST_SET"
wgroup.long 0x1C++0x3
line.long 0x0 "CHNLUSEBURSTCLR,DMA Channel Useburst Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_USEBURST_CLR,CHNL_USEBURST_CLR"
group.long 0x20++0x3
line.long 0x0 "CHNLREQMASKSET,DMA Channel Request Mask Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_REQ_MASK_SET,CHNL_REQ_MASK_SET"
wgroup.long 0x24++0x3
line.long 0x0 "CHNLREQMASKCLR,DMA Channel Request Mask Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_REQ_MASK_CLR,CHNL_REQ_MASK_CLR"
group.long 0x28++0x3
line.long 0x0 "CHNLENABLESET,DMA Channel Enable Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_ENABLE_SET,CHNL_ENABLE_SET"
wgroup.long 0x2C++0x3
line.long 0x0 "CHNLENABLECLR,DMA Channel Enable Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_ENABLE_CLR,CHNL_ENABLE_CLR"
group.long 0x30++0x3
line.long 0x0 "CHNLPRIALTSET,DMA Channel Primary-Alternate Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRI_ALT_SET,CHNL_PRI_ALT_SET"
wgroup.long 0x34++0x3
line.long 0x0 "CHNLPRIALTCLR,DMA Channel Primary-Alternate Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRI_ALT_CLR,CHNL_PRI_ALT_CLR"
group.long 0x38++0x3
line.long 0x0 "CHNLPRIORITYSET,DMA Channel Priority Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRIORITY_SET,CHNL_PRIORITY_SET"
wgroup.long 0x3C++0x3
line.long 0x0 "CHNLPRIORITYCLR,DMA Channel Priority Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRIORITY_CLR,CHNL_PRIORITY_CLR"
group.long 0x4C++0x3
line.long 0x0 "ERRCLR,DMA Bus Error Clear Register"
bitfld.long 0x0 0. "ERR_CLR,ERR_CLR" "0,1"
tree.end
tree "DMAB"
base ad:0x4004D000
rgroup.long 0x0++0x3
line.long 0x0 "STATUS,DMA Status Register"
bitfld.long 0x0 0. "MASTER_ENABLE,MASTER_ENABLE" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "CFG,DMA Configuration Register"
bitfld.long 0x0 0. "MASTER_ENABLE,MASTER_ENABLE" "0,1"
group.long 0x8++0x3
line.long 0x0 "CTRLBASEPTR,DMA Control Data Base Pointer Register"
hexmask.long.tbyte 0x0 10.--31. 1. "CTRL_BASE_PTR,CTRL_BASE_PTR"
rgroup.long 0xC++0x3
line.long 0x0 "ALTCTRLBASEPTR,DMA Channel Alternate Control Data Base"
hexmask.long 0x0 0.--31. 1. "ALT_CTRL_BASE_PTR,ALT_CTRL_BASE_PTR"
wgroup.long 0x14++0x3
line.long 0x0 "CHNLSWREQUEST,DMA Channel Software Request Register"
hexmask.long 0x0 0.--31. 1. "CHNL_SW_REQUEST,CHNL_SW_REQUEST"
group.long 0x18++0x3
line.long 0x0 "CHNLUSEBURSTSET,DMA Channel Useburst Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_USEBURST_SET,CHNL_USEBURST_SET"
wgroup.long 0x1C++0x3
line.long 0x0 "CHNLUSEBURSTCLR,DMA Channel Useburst Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_USEBURST_CLR,CHNL_USEBURST_CLR"
group.long 0x20++0x3
line.long 0x0 "CHNLREQMASKSET,DMA Channel Request Mask Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_REQ_MASK_SET,CHNL_REQ_MASK_SET"
wgroup.long 0x24++0x3
line.long 0x0 "CHNLREQMASKCLR,DMA Channel Request Mask Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_REQ_MASK_CLR,CHNL_REQ_MASK_CLR"
group.long 0x28++0x3
line.long 0x0 "CHNLENABLESET,DMA Channel Enable Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_ENABLE_SET,CHNL_ENABLE_SET"
wgroup.long 0x2C++0x3
line.long 0x0 "CHNLENABLECLR,DMA Channel Enable Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_ENABLE_CLR,CHNL_ENABLE_CLR"
group.long 0x30++0x3
line.long 0x0 "CHNLPRIALTSET,DMA Channel Primary-Alternate Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRI_ALT_SET,CHNL_PRI_ALT_SET"
wgroup.long 0x34++0x3
line.long 0x0 "CHNLPRIALTCLR,DMA Channel Primary-Alternate Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRI_ALT_CLR,CHNL_PRI_ALT_CLR"
group.long 0x38++0x3
line.long 0x0 "CHNLPRIORITYSET,DMA Channel Priority Set Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRIORITY_SET,CHNL_PRIORITY_SET"
wgroup.long 0x3C++0x3
line.long 0x0 "CHNLPRIORITYCLR,DMA Channel Priority Clear Register"
hexmask.long 0x0 0.--31. 1. "CHNL_PRIORITY_CLR,CHNL_PRIORITY_CLR"
group.long 0x4C++0x3
line.long 0x0 "ERRCLR,DMA Bus Error Clear Register"
bitfld.long 0x0 0. "ERR_CLR,ERR_CLR" "0,1"
tree.end
tree.end
tree "DNF (Digital Noise Filter)"
base ad:0x0
tree "DNFA"
base ad:0x400BB600
group.long 0x0++0x7
line.long 0x0 "CKCR,DNF clock Control register"
bitfld.long 0x0 0.--2. "NFCKS,NFCKS" "0,1,2,3,4,5,6,7"
line.long 0x4 "ENCR,DNF Enable register"
bitfld.long 0x4 15. "NFEN15,NFEN15" "0,1"
bitfld.long 0x4 14. "NFEN14,NFEN14" "0,1"
bitfld.long 0x4 13. "NFEN13,NFEN13" "0,1"
bitfld.long 0x4 12. "NFEN12,NFEN12" "0,1"
bitfld.long 0x4 11. "NFEN11,NFEN11" "0,1"
bitfld.long 0x4 10. "NFEN10,NFEN10" "0,1"
bitfld.long 0x4 9. "NFEN9,NFEN9" "0,1"
bitfld.long 0x4 8. "NFEN8,NFEN8" "0,1"
bitfld.long 0x4 7. "NFEN7,NFEN7" "0,1"
bitfld.long 0x4 6. "NFEN6,NFEN6" "0,1"
bitfld.long 0x4 5. "NFEN5,NFEN5" "0,1"
bitfld.long 0x4 4. "NFEN4,NFEN4" "0,1"
bitfld.long 0x4 3. "NFEN3,NFEN3" "0,1"
newline
bitfld.long 0x4 2. "NFEN2,NFEN2" "0,1"
bitfld.long 0x4 1. "NFEN1,NFEN1" "0,1"
bitfld.long 0x4 0. "NFEN0,NFEN0" "0,1"
tree.end
tree "DNFB"
base ad:0x400BB700
group.long 0x0++0x7
line.long 0x0 "CKCR,DNF clock Control register"
bitfld.long 0x0 0.--2. "NFCKS,NFCKS" "0,1,2,3,4,5,6,7"
line.long 0x4 "ENCR,DNF Enable register"
bitfld.long 0x4 15. "NFEN15,NFEN15" "0,1"
bitfld.long 0x4 14. "NFEN14,NFEN14" "0,1"
bitfld.long 0x4 13. "NFEN13,NFEN13" "0,1"
bitfld.long 0x4 12. "NFEN12,NFEN12" "0,1"
bitfld.long 0x4 11. "NFEN11,NFEN11" "0,1"
bitfld.long 0x4 10. "NFEN10,NFEN10" "0,1"
bitfld.long 0x4 9. "NFEN9,NFEN9" "0,1"
bitfld.long 0x4 8. "NFEN8,NFEN8" "0,1"
bitfld.long 0x4 7. "NFEN7,NFEN7" "0,1"
bitfld.long 0x4 6. "NFEN6,NFEN6" "0,1"
bitfld.long 0x4 5. "NFEN5,NFEN5" "0,1"
bitfld.long 0x4 4. "NFEN4,NFEN4" "0,1"
bitfld.long 0x4 3. "NFEN3,NFEN3" "0,1"
newline
bitfld.long 0x4 2. "NFEN2,NFEN2" "0,1"
bitfld.long 0x4 1. "NFEN1,NFEN1" "0,1"
bitfld.long 0x4 0. "NFEN0,NFEN0" "0,1"
tree.end
tree "DNFC"
base ad:0x400BE000
group.long 0x0++0x7
line.long 0x0 "CKCR,DNF clock Control register"
bitfld.long 0x0 0.--2. "NFCKS,NFCKS" "0,1,2,3,4,5,6,7"
line.long 0x4 "ENCR,DNF Enable register"
bitfld.long 0x4 15. "NFEN15,NFEN15" "0,1"
bitfld.long 0x4 14. "NFEN14,NFEN14" "0,1"
bitfld.long 0x4 13. "NFEN13,NFEN13" "0,1"
bitfld.long 0x4 12. "NFEN12,NFEN12" "0,1"
bitfld.long 0x4 11. "NFEN11,NFEN11" "0,1"
bitfld.long 0x4 10. "NFEN10,NFEN10" "0,1"
bitfld.long 0x4 9. "NFEN9,NFEN9" "0,1"
bitfld.long 0x4 8. "NFEN8,NFEN8" "0,1"
bitfld.long 0x4 7. "NFEN7,NFEN7" "0,1"
bitfld.long 0x4 6. "NFEN6,NFEN6" "0,1"
bitfld.long 0x4 5. "NFEN5,NFEN5" "0,1"
bitfld.long 0x4 4. "NFEN4,NFEN4" "0,1"
bitfld.long 0x4 3. "NFEN3,NFEN3" "0,1"
newline
bitfld.long 0x4 2. "NFEN2,NFEN2" "0,1"
bitfld.long 0x4 1. "NFEN1,NFEN1" "0,1"
bitfld.long 0x4 0. "NFEN0,NFEN0" "0,1"
tree.end
tree.end
tree "EI2C (I2C Interface Ver. A)"
base ad:0x0
tree "EI2C0"
base ad:0x400A5000
wgroup.long 0x0++0x3
line.long 0x0 "ARST,EI2C Reset Register"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
group.long 0x4++0xF
line.long 0x0 "AEN,EI2C Enable Register"
bitfld.long 0x0 0. "I2CM,I2CM" "0,1"
line.long 0x4 "ACR0,EI2C Control Register 0"
bitfld.long 0x4 12.--14. "DNF,DNF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 11. "NFSEL,NFSEL" "0,1"
bitfld.long 0x4 9.--10. "TOPER,TOPER" "0,1,2,3"
bitfld.long 0x4 8. "TOE,TOE" "0,1"
bitfld.long 0x4 4. "ESPE,ESPE" "0,1"
bitfld.long 0x4 3. "ESTE,ESTE" "0,1"
bitfld.long 0x4 2. "NACKE,NACKE" "0,1"
bitfld.long 0x4 1. "GCE,GCE" "0,1"
bitfld.long 0x4 0. "ALE,ALE" "0,1"
line.long 0x8 "ACR1,EI2C Control Register 1"
bitfld.long 0x8 10. "OMC,OMC" "0,1"
bitfld.long 0x8 4. "ACKWAIT,ACKWAIT" "0,1"
bitfld.long 0x8 3. "ACKSEL,ACKSEL" "0,1"
bitfld.long 0x8 2. "SP,SP" "0,1"
bitfld.long 0x8 1. "RS,RS" "0,1"
bitfld.long 0x8 0. "ST,ST" "0,1"
line.long 0xC "ADBRT,EI2C Transmit Data Buffer Register"
hexmask.long.byte 0xC 0.--7. 1. "DBT,DBT"
rgroup.long 0x14++0x7
line.long 0x0 "ADBRR,EI2C Receive Data Buffer Register"
hexmask.long.byte 0x0 0.--7. 1. "DBR,DBR"
line.long 0x4 "ASR0,EI2C Status Register 0"
hexmask.long.byte 0x4 4.--7. 1. "BC,BC"
bitfld.long 0x4 3. "MST,MST" "0,1"
bitfld.long 0x4 2. "TRX,TRX" "0,1"
bitfld.long 0x4 1. "BB,BB" "0,1"
bitfld.long 0x4 0. "ACKF,ACKF" "0,1"
group.long 0x1C++0x17
line.long 0x0 "ASR1,EI2C Status Register 1"
bitfld.long 0x0 13. "TOERR,TOERR" "0,1"
bitfld.long 0x0 12. "ESP,ESP" "0,1"
bitfld.long 0x0 11. "EST,EST" "0,1"
bitfld.long 0x0 10. "AAS2,AAS2" "0,1"
bitfld.long 0x0 9. "AAS1,AAS1" "0,1"
bitfld.long 0x0 8. "GC,GC" "0,1"
bitfld.long 0x0 7. "AL,AL" "0,1"
bitfld.long 0x0 6. "NACK,NACK" "0,1"
bitfld.long 0x0 5. "RBF,RBF" "0,1"
bitfld.long 0x0 4. "TBE,TBE" "0,1"
bitfld.long 0x0 3. "TEND,TEND" "0,1"
newline
bitfld.long 0x0 2. "SPCF,SPCF" "0,1"
bitfld.long 0x0 1. "RSCF,RSCF" "0,1"
bitfld.long 0x0 0. "STCF,STCF" "0,1"
line.long 0x4 "APRS,EI2C Prescaler Clock Setting Register"
hexmask.long.byte 0x4 0.--5. 1. "PRS,PRS"
line.long 0x8 "ASCL,EI2C SCL Width Setting Register"
hexmask.long.byte 0x8 8.--15. 1. "SCLL,SCLL"
hexmask.long.byte 0x8 0.--7. 1. "SCLH,SCLH"
line.long 0xC "AAR1,EI2C First Slave Address Register"
bitfld.long 0xC 15. "SAFS1,SAFS1" "0,1"
hexmask.long.word 0xC 1.--10. 1. "SA1,SA1"
bitfld.long 0xC 0. "SA1E,SA1E" "0,1"
line.long 0x10 "AAR2,EI2C Second Slave Address Register"
bitfld.long 0x10 15. "SAFS2,SAFS2" "0,1"
hexmask.long.word 0x10 1.--10. 1. "SA2,SA2"
bitfld.long 0x10 0. "SA2E,SA2E" "0,1"
line.long 0x14 "AIE,EI2C Interrupt_DMA Setting Register"
bitfld.long 0x14 15. "DMARX,DMARX" "0,1"
bitfld.long 0x14 14. "DMATX,DMATX" "0,1"
bitfld.long 0x14 13. "INTTOE,INTTOE" "0,1"
bitfld.long 0x14 12. "INTESPE,INTESPE" "0,1"
bitfld.long 0x14 11. "INTESTE,INTESTE" "0,1"
bitfld.long 0x14 9. "INTASE,INTASE" "0,1"
bitfld.long 0x14 8. "INTGCE,INTGCE" "0,1"
bitfld.long 0x14 7. "INTALE,INTALE" "0,1"
bitfld.long 0x14 6. "INTNACKE,INTNACKE" "0,1"
bitfld.long 0x14 2. "INTSPE,INTSPE" "0,1"
bitfld.long 0x14 1. "INTRSE,INTRSE" "0,1"
newline
bitfld.long 0x14 0. "INTSTE,INTSTE" "0,1"
rgroup.long 0x34++0x3
line.long 0x0 "APM,EI2C Bus Terminal Monitor Register"
bitfld.long 0x0 3. "SDAOUT,SDAOUT" "0,1"
bitfld.long 0x0 2. "SCLOUT,SCLOUT" "0,1"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
tree.end
tree "EI2C2"
base ad:0x400A7000
wgroup.long 0x0++0x3
line.long 0x0 "ARST,EI2C Reset Register"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
group.long 0x4++0xF
line.long 0x0 "AEN,EI2C Enable Register"
bitfld.long 0x0 0. "I2CM,I2CM" "0,1"
line.long 0x4 "ACR0,EI2C Control Register 0"
bitfld.long 0x4 12.--14. "DNF,DNF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 11. "NFSEL,NFSEL" "0,1"
bitfld.long 0x4 9.--10. "TOPER,TOPER" "0,1,2,3"
bitfld.long 0x4 8. "TOE,TOE" "0,1"
bitfld.long 0x4 4. "ESPE,ESPE" "0,1"
bitfld.long 0x4 3. "ESTE,ESTE" "0,1"
bitfld.long 0x4 2. "NACKE,NACKE" "0,1"
bitfld.long 0x4 1. "GCE,GCE" "0,1"
bitfld.long 0x4 0. "ALE,ALE" "0,1"
line.long 0x8 "ACR1,EI2C Control Register 1"
bitfld.long 0x8 10. "OMC,OMC" "0,1"
bitfld.long 0x8 4. "ACKWAIT,ACKWAIT" "0,1"
bitfld.long 0x8 3. "ACKSEL,ACKSEL" "0,1"
bitfld.long 0x8 2. "SP,SP" "0,1"
bitfld.long 0x8 1. "RS,RS" "0,1"
bitfld.long 0x8 0. "ST,ST" "0,1"
line.long 0xC "ADBRT,EI2C Transmit Data Buffer Register"
hexmask.long.byte 0xC 0.--7. 1. "DBT,DBT"
rgroup.long 0x14++0x7
line.long 0x0 "ADBRR,EI2C Receive Data Buffer Register"
hexmask.long.byte 0x0 0.--7. 1. "DBR,DBR"
line.long 0x4 "ASR0,EI2C Status Register 0"
hexmask.long.byte 0x4 4.--7. 1. "BC,BC"
bitfld.long 0x4 3. "MST,MST" "0,1"
bitfld.long 0x4 2. "TRX,TRX" "0,1"
bitfld.long 0x4 1. "BB,BB" "0,1"
bitfld.long 0x4 0. "ACKF,ACKF" "0,1"
group.long 0x1C++0x17
line.long 0x0 "ASR1,EI2C Status Register 1"
bitfld.long 0x0 13. "TOERR,TOERR" "0,1"
bitfld.long 0x0 12. "ESP,ESP" "0,1"
bitfld.long 0x0 11. "EST,EST" "0,1"
bitfld.long 0x0 10. "AAS2,AAS2" "0,1"
bitfld.long 0x0 9. "AAS1,AAS1" "0,1"
bitfld.long 0x0 8. "GC,GC" "0,1"
bitfld.long 0x0 7. "AL,AL" "0,1"
bitfld.long 0x0 6. "NACK,NACK" "0,1"
bitfld.long 0x0 5. "RBF,RBF" "0,1"
bitfld.long 0x0 4. "TBE,TBE" "0,1"
bitfld.long 0x0 3. "TEND,TEND" "0,1"
newline
bitfld.long 0x0 2. "SPCF,SPCF" "0,1"
bitfld.long 0x0 1. "RSCF,RSCF" "0,1"
bitfld.long 0x0 0. "STCF,STCF" "0,1"
line.long 0x4 "APRS,EI2C Prescaler Clock Setting Register"
hexmask.long.byte 0x4 0.--5. 1. "PRS,PRS"
line.long 0x8 "ASCL,EI2C SCL Width Setting Register"
hexmask.long.byte 0x8 8.--15. 1. "SCLL,SCLL"
hexmask.long.byte 0x8 0.--7. 1. "SCLH,SCLH"
line.long 0xC "AAR1,EI2C First Slave Address Register"
bitfld.long 0xC 15. "SAFS1,SAFS1" "0,1"
hexmask.long.word 0xC 1.--10. 1. "SA1,SA1"
bitfld.long 0xC 0. "SA1E,SA1E" "0,1"
line.long 0x10 "AAR2,EI2C Second Slave Address Register"
bitfld.long 0x10 15. "SAFS2,SAFS2" "0,1"
hexmask.long.word 0x10 1.--10. 1. "SA2,SA2"
bitfld.long 0x10 0. "SA2E,SA2E" "0,1"
line.long 0x14 "AIE,EI2C Interrupt_DMA Setting Register"
bitfld.long 0x14 15. "DMARX,DMARX" "0,1"
bitfld.long 0x14 14. "DMATX,DMATX" "0,1"
bitfld.long 0x14 13. "INTTOE,INTTOE" "0,1"
bitfld.long 0x14 12. "INTESPE,INTESPE" "0,1"
bitfld.long 0x14 11. "INTESTE,INTESTE" "0,1"
bitfld.long 0x14 9. "INTASE,INTASE" "0,1"
bitfld.long 0x14 8. "INTGCE,INTGCE" "0,1"
bitfld.long 0x14 7. "INTALE,INTALE" "0,1"
bitfld.long 0x14 6. "INTNACKE,INTNACKE" "0,1"
bitfld.long 0x14 2. "INTSPE,INTSPE" "0,1"
bitfld.long 0x14 1. "INTRSE,INTRSE" "0,1"
newline
bitfld.long 0x14 0. "INTSTE,INTSTE" "0,1"
rgroup.long 0x34++0x3
line.long 0x0 "APM,EI2C Bus Terminal Monitor Register"
bitfld.long 0x0 3. "SDAOUT,SDAOUT" "0,1"
bitfld.long 0x0 2. "SCLOUT,SCLOUT" "0,1"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
tree.end
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "EI2C1"
base ad:0x400A6000
wgroup.long 0x0++0x3
line.long 0x0 "ARST,EI2C Reset Register"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
group.long 0x4++0xF
line.long 0x0 "AEN,EI2C Enable Register"
bitfld.long 0x0 0. "I2CM,I2CM" "0,1"
line.long 0x4 "ACR0,EI2C Control Register 0"
bitfld.long 0x4 12.--14. "DNF,DNF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 11. "NFSEL,NFSEL" "0,1"
bitfld.long 0x4 9.--10. "TOPER,TOPER" "0,1,2,3"
bitfld.long 0x4 8. "TOE,TOE" "0,1"
bitfld.long 0x4 4. "ESPE,ESPE" "0,1"
bitfld.long 0x4 3. "ESTE,ESTE" "0,1"
bitfld.long 0x4 2. "NACKE,NACKE" "0,1"
bitfld.long 0x4 1. "GCE,GCE" "0,1"
bitfld.long 0x4 0. "ALE,ALE" "0,1"
line.long 0x8 "ACR1,EI2C Control Register 1"
bitfld.long 0x8 10. "OMC,OMC" "0,1"
bitfld.long 0x8 4. "ACKWAIT,ACKWAIT" "0,1"
bitfld.long 0x8 3. "ACKSEL,ACKSEL" "0,1"
bitfld.long 0x8 2. "SP,SP" "0,1"
bitfld.long 0x8 1. "RS,RS" "0,1"
bitfld.long 0x8 0. "ST,ST" "0,1"
line.long 0xC "ADBRT,EI2C Transmit Data Buffer Register"
hexmask.long.byte 0xC 0.--7. 1. "DBT,DBT"
rgroup.long 0x14++0x7
line.long 0x0 "ADBRR,EI2C Receive Data Buffer Register"
hexmask.long.byte 0x0 0.--7. 1. "DBR,DBR"
line.long 0x4 "ASR0,EI2C Status Register 0"
hexmask.long.byte 0x4 4.--7. 1. "BC,BC"
bitfld.long 0x4 3. "MST,MST" "0,1"
bitfld.long 0x4 2. "TRX,TRX" "0,1"
bitfld.long 0x4 1. "BB,BB" "0,1"
bitfld.long 0x4 0. "ACKF,ACKF" "0,1"
group.long 0x1C++0x17
line.long 0x0 "ASR1,EI2C Status Register 1"
bitfld.long 0x0 13. "TOERR,TOERR" "0,1"
bitfld.long 0x0 12. "ESP,ESP" "0,1"
bitfld.long 0x0 11. "EST,EST" "0,1"
bitfld.long 0x0 10. "AAS2,AAS2" "0,1"
bitfld.long 0x0 9. "AAS1,AAS1" "0,1"
bitfld.long 0x0 8. "GC,GC" "0,1"
bitfld.long 0x0 7. "AL,AL" "0,1"
bitfld.long 0x0 6. "NACK,NACK" "0,1"
bitfld.long 0x0 5. "RBF,RBF" "0,1"
bitfld.long 0x0 4. "TBE,TBE" "0,1"
bitfld.long 0x0 3. "TEND,TEND" "0,1"
newline
bitfld.long 0x0 2. "SPCF,SPCF" "0,1"
bitfld.long 0x0 1. "RSCF,RSCF" "0,1"
bitfld.long 0x0 0. "STCF,STCF" "0,1"
line.long 0x4 "APRS,EI2C Prescaler Clock Setting Register"
hexmask.long.byte 0x4 0.--5. 1. "PRS,PRS"
line.long 0x8 "ASCL,EI2C SCL Width Setting Register"
hexmask.long.byte 0x8 8.--15. 1. "SCLL,SCLL"
hexmask.long.byte 0x8 0.--7. 1. "SCLH,SCLH"
line.long 0xC "AAR1,EI2C First Slave Address Register"
bitfld.long 0xC 15. "SAFS1,SAFS1" "0,1"
hexmask.long.word 0xC 1.--10. 1. "SA1,SA1"
bitfld.long 0xC 0. "SA1E,SA1E" "0,1"
line.long 0x10 "AAR2,EI2C Second Slave Address Register"
bitfld.long 0x10 15. "SAFS2,SAFS2" "0,1"
hexmask.long.word 0x10 1.--10. 1. "SA2,SA2"
bitfld.long 0x10 0. "SA2E,SA2E" "0,1"
line.long 0x14 "AIE,EI2C Interrupt_DMA Setting Register"
bitfld.long 0x14 15. "DMARX,DMARX" "0,1"
bitfld.long 0x14 14. "DMATX,DMATX" "0,1"
bitfld.long 0x14 13. "INTTOE,INTTOE" "0,1"
bitfld.long 0x14 12. "INTESPE,INTESPE" "0,1"
bitfld.long 0x14 11. "INTESTE,INTESTE" "0,1"
bitfld.long 0x14 9. "INTASE,INTASE" "0,1"
bitfld.long 0x14 8. "INTGCE,INTGCE" "0,1"
bitfld.long 0x14 7. "INTALE,INTALE" "0,1"
bitfld.long 0x14 6. "INTNACKE,INTNACKE" "0,1"
bitfld.long 0x14 2. "INTSPE,INTSPE" "0,1"
bitfld.long 0x14 1. "INTRSE,INTRSE" "0,1"
newline
bitfld.long 0x14 0. "INTSTE,INTSTE" "0,1"
rgroup.long 0x34++0x3
line.long 0x0 "APM,EI2C Bus Terminal Monitor Register"
bitfld.long 0x0 3. "SDAOUT,SDAOUT" "0,1"
bitfld.long 0x0 2. "SCLOUT,SCLOUT" "0,1"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "EI2C3"
base ad:0x400A8000
wgroup.long 0x0++0x3
line.long 0x0 "ARST,EI2C Reset Register"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
group.long 0x4++0xF
line.long 0x0 "AEN,EI2C Enable Register"
bitfld.long 0x0 0. "I2CM,I2CM" "0,1"
line.long 0x4 "ACR0,EI2C Control Register 0"
bitfld.long 0x4 12.--14. "DNF,DNF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 11. "NFSEL,NFSEL" "0,1"
bitfld.long 0x4 9.--10. "TOPER,TOPER" "0,1,2,3"
bitfld.long 0x4 8. "TOE,TOE" "0,1"
bitfld.long 0x4 4. "ESPE,ESPE" "0,1"
bitfld.long 0x4 3. "ESTE,ESTE" "0,1"
bitfld.long 0x4 2. "NACKE,NACKE" "0,1"
bitfld.long 0x4 1. "GCE,GCE" "0,1"
bitfld.long 0x4 0. "ALE,ALE" "0,1"
line.long 0x8 "ACR1,EI2C Control Register 1"
bitfld.long 0x8 10. "OMC,OMC" "0,1"
bitfld.long 0x8 4. "ACKWAIT,ACKWAIT" "0,1"
bitfld.long 0x8 3. "ACKSEL,ACKSEL" "0,1"
bitfld.long 0x8 2. "SP,SP" "0,1"
bitfld.long 0x8 1. "RS,RS" "0,1"
bitfld.long 0x8 0. "ST,ST" "0,1"
line.long 0xC "ADBRT,EI2C Transmit Data Buffer Register"
hexmask.long.byte 0xC 0.--7. 1. "DBT,DBT"
rgroup.long 0x14++0x7
line.long 0x0 "ADBRR,EI2C Receive Data Buffer Register"
hexmask.long.byte 0x0 0.--7. 1. "DBR,DBR"
line.long 0x4 "ASR0,EI2C Status Register 0"
hexmask.long.byte 0x4 4.--7. 1. "BC,BC"
bitfld.long 0x4 3. "MST,MST" "0,1"
bitfld.long 0x4 2. "TRX,TRX" "0,1"
bitfld.long 0x4 1. "BB,BB" "0,1"
bitfld.long 0x4 0. "ACKF,ACKF" "0,1"
group.long 0x1C++0x17
line.long 0x0 "ASR1,EI2C Status Register 1"
bitfld.long 0x0 13. "TOERR,TOERR" "0,1"
bitfld.long 0x0 12. "ESP,ESP" "0,1"
bitfld.long 0x0 11. "EST,EST" "0,1"
bitfld.long 0x0 10. "AAS2,AAS2" "0,1"
bitfld.long 0x0 9. "AAS1,AAS1" "0,1"
bitfld.long 0x0 8. "GC,GC" "0,1"
bitfld.long 0x0 7. "AL,AL" "0,1"
bitfld.long 0x0 6. "NACK,NACK" "0,1"
bitfld.long 0x0 5. "RBF,RBF" "0,1"
bitfld.long 0x0 4. "TBE,TBE" "0,1"
bitfld.long 0x0 3. "TEND,TEND" "0,1"
newline
bitfld.long 0x0 2. "SPCF,SPCF" "0,1"
bitfld.long 0x0 1. "RSCF,RSCF" "0,1"
bitfld.long 0x0 0. "STCF,STCF" "0,1"
line.long 0x4 "APRS,EI2C Prescaler Clock Setting Register"
hexmask.long.byte 0x4 0.--5. 1. "PRS,PRS"
line.long 0x8 "ASCL,EI2C SCL Width Setting Register"
hexmask.long.byte 0x8 8.--15. 1. "SCLL,SCLL"
hexmask.long.byte 0x8 0.--7. 1. "SCLH,SCLH"
line.long 0xC "AAR1,EI2C First Slave Address Register"
bitfld.long 0xC 15. "SAFS1,SAFS1" "0,1"
hexmask.long.word 0xC 1.--10. 1. "SA1,SA1"
bitfld.long 0xC 0. "SA1E,SA1E" "0,1"
line.long 0x10 "AAR2,EI2C Second Slave Address Register"
bitfld.long 0x10 15. "SAFS2,SAFS2" "0,1"
hexmask.long.word 0x10 1.--10. 1. "SA2,SA2"
bitfld.long 0x10 0. "SA2E,SA2E" "0,1"
line.long 0x14 "AIE,EI2C Interrupt_DMA Setting Register"
bitfld.long 0x14 15. "DMARX,DMARX" "0,1"
bitfld.long 0x14 14. "DMATX,DMATX" "0,1"
bitfld.long 0x14 13. "INTTOE,INTTOE" "0,1"
bitfld.long 0x14 12. "INTESPE,INTESPE" "0,1"
bitfld.long 0x14 11. "INTESTE,INTESTE" "0,1"
bitfld.long 0x14 9. "INTASE,INTASE" "0,1"
bitfld.long 0x14 8. "INTGCE,INTGCE" "0,1"
bitfld.long 0x14 7. "INTALE,INTALE" "0,1"
bitfld.long 0x14 6. "INTNACKE,INTNACKE" "0,1"
bitfld.long 0x14 2. "INTSPE,INTSPE" "0,1"
bitfld.long 0x14 1. "INTRSE,INTRSE" "0,1"
newline
bitfld.long 0x14 0. "INTSTE,INTSTE" "0,1"
rgroup.long 0x34++0x3
line.long 0x0 "APM,EI2C Bus Terminal Monitor Register"
bitfld.long 0x0 3. "SDAOUT,SDAOUT" "0,1"
bitfld.long 0x0 2. "SCLOUT,SCLOUT" "0,1"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
tree.end
endif
tree.end
tree "ENC (Encoder Input)"
base ad:0x400F7000
group.long 0x0++0x17
line.long 0x0 "TNCR,ENC Control Register"
bitfld.long 0x0 28. "CMPSEL,CMPSEL" "0,1"
bitfld.long 0x0 26.--27. "UDMD,UDMD" "0,1,2,3"
bitfld.long 0x0 25. "TOVMD,TOVMD" "0,1"
bitfld.long 0x0 24. "MCMPMD,MCMPMD" "0,1"
bitfld.long 0x0 22.--23. "DECMD,DECMD" "0,1,2,3"
newline
bitfld.long 0x0 21. "SDTEN,SDTEN" "0,1"
bitfld.long 0x0 17.--19. "MODE,MODE" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 16. "P3EN,P3EN" "0,1"
bitfld.long 0x0 12. "TRGCAPMD,TRGCAPMD" "0,1"
bitfld.long 0x0 11. "SFTCAP,SFTCAP" "0,1"
newline
bitfld.long 0x0 10. "ENCLR,ENCLR" "0,1"
bitfld.long 0x0 8.--9. "ZESEL,ZESEL" "0,1,2,3"
bitfld.long 0x0 7. "ZEN,ZEN" "0,1"
bitfld.long 0x0 6. "ENRUN,ENRUN" "0,1"
sif (cpuis("TMPM3HL*B*"))
bitfld.long 0x0 5. "ZEACT,ZEACT" "0,1"
newline
endif
sif (cpuis("TMPM3HM*B*"))
bitfld.long 0x0 5. "ZEACT,ZEACT" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x0 5. "ZEACT,ZEACT" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x0 5. "ZEACT,ZEACT" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x0 5. "ZEACT,ZEACT" "0,1"
endif
bitfld.long 0x0 0.--2. "ENDEV,ENDEV" "0,1,2,3,4,5,6,7"
line.long 0x4 "RELOAD,ENC Reload Compare Register"
sif (cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
hexmask.long.word 0x4 16.--31. 1. "RELOADH,RELOADH"
hexmask.long.word 0x4 0.--15. 1. "RELOADL,RELOADL"
endif
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
hexmask.long.word 0x4 16.--31. 1. "RELOADH,RELOADH"
hexmask.long.word 0x4 0.--15. 1. "RELOADL,RELOADL"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
hexmask.long.word 0x4 16.--31. 1. "RELOADH,RELOADH"
newline
hexmask.long.word 0x4 0.--15. 1. "RELOADL,RELOADL"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
hexmask.long.word 0x4 16.--31. 1. "RELOADH,RELOADH"
hexmask.long.word 0x4 0.--15. 1. "RELOADL,RELOADL"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
hexmask.long.word 0x4 16.--31. 1. "RELOADH,RELOADH"
hexmask.long.word 0x4 0.--15. 1. "RELOADL,RELOADL"
newline
endif
sif (cpuis("TMPM3HL*B*"))
hexmask.long 0x4 0.--31. 1. "RELOAD,RELOAD"
endif
sif (cpuis("TMPM3HM*B*"))
hexmask.long 0x4 0.--31. 1. "RELOAD,RELOAD"
endif
sif (cpuis("TMPM3HN*B*"))
hexmask.long 0x4 0.--31. 1. "RELOAD,RELOAD"
endif
sif (cpuis("TMPM3HP*B*"))
hexmask.long 0x4 0.--31. 1. "RELOAD,RELOAD"
endif
sif (cpuis("TMPM3HQ*B*"))
hexmask.long 0x4 0.--31. 1. "RELOAD,RELOAD"
endif
line.long 0x8 "INT,ENC INT Compare Register"
sif (cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
hexmask.long.word 0x8 16.--31. 1. "INTH,INTH"
hexmask.long.word 0x8 0.--15. 1. "INTL,INTL"
endif
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
hexmask.long.word 0x8 16.--31. 1. "INTH,INTH"
hexmask.long.word 0x8 0.--15. 1. "INTL,INTL"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
hexmask.long.word 0x8 16.--31. 1. "INTH,INTH"
newline
hexmask.long.word 0x8 0.--15. 1. "INTL,INTL"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
hexmask.long.word 0x8 16.--31. 1. "INTH,INTH"
hexmask.long.word 0x8 0.--15. 1. "INTL,INTL"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
hexmask.long.word 0x8 16.--31. 1. "INTH,INTH"
hexmask.long.word 0x8 0.--15. 1. "INTL,INTL"
newline
endif
sif (cpuis("TMPM3HL*B*"))
hexmask.long 0x8 0.--31. 1. "INT,INT"
endif
sif (cpuis("TMPM3HM*B*"))
hexmask.long 0x8 0.--31. 1. "INT,INT"
endif
sif (cpuis("TMPM3HN*B*"))
hexmask.long 0x8 0.--31. 1. "INT,INT"
endif
sif (cpuis("TMPM3HP*B*"))
hexmask.long 0x8 0.--31. 1. "INT,INT"
endif
sif (cpuis("TMPM3HQ*B*"))
hexmask.long 0x8 0.--31. 1. "INT,INT"
endif
line.long 0xC "CNT,ENC Counter_Capture Register"
sif (cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
hexmask.long.word 0xC 16.--31. 1. "CNTH,CNTH"
hexmask.long.word 0xC 0.--15. 1. "CNTL,CNTL"
endif
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
hexmask.long.word 0xC 16.--31. 1. "CNTH,CNTH"
hexmask.long.word 0xC 0.--15. 1. "CNTL,CNTL"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
hexmask.long.word 0xC 16.--31. 1. "CNTH,CNTH"
newline
hexmask.long.word 0xC 0.--15. 1. "CNTL,CNTL"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
hexmask.long.word 0xC 16.--31. 1. "CNTH,CNTH"
hexmask.long.word 0xC 0.--15. 1. "CNTL,CNTL"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
hexmask.long.word 0xC 16.--31. 1. "CNTH,CNTH"
hexmask.long.word 0xC 0.--15. 1. "CNTL,CNTL"
newline
endif
sif (cpuis("TMPM3HL*B*"))
hexmask.long 0xC 0.--31. 1. "CNT,CNT"
endif
sif (cpuis("TMPM3HM*B*"))
hexmask.long 0xC 0.--31. 1. "CNT,CNT"
endif
sif (cpuis("TMPM3HN*B*"))
hexmask.long 0xC 0.--31. 1. "CNT,CNT"
endif
sif (cpuis("TMPM3HP*B*"))
hexmask.long 0xC 0.--31. 1. "CNT,CNT"
endif
sif (cpuis("TMPM3HQ*B*"))
hexmask.long 0xC 0.--31. 1. "CNT,CNT"
endif
line.long 0x10 "MCMP,ENC MCMP Compare Register"
sif (cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
hexmask.long.word 0x10 16.--31. 1. "MCMPH,MCMPH"
hexmask.long.word 0x10 0.--15. 1. "MCMPL,MCMPL"
endif
sif (cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
hexmask.long.word 0x10 16.--31. 1. "MCMPH,MCMPH"
hexmask.long.word 0x10 0.--15. 1. "MCMPL,MCMPL"
endif
sif (cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
hexmask.long.word 0x10 16.--31. 1. "MCMPH,MCMPH"
newline
hexmask.long.word 0x10 0.--15. 1. "MCMPL,MCMPL"
endif
sif (cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
hexmask.long.word 0x10 16.--31. 1. "MCMPH,MCMPH"
hexmask.long.word 0x10 0.--15. 1. "MCMPL,MCMPL"
endif
sif (cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
hexmask.long.word 0x10 16.--31. 1. "MCMPH,MCMPH"
hexmask.long.word 0x10 0.--15. 1. "MCMPL,MCMPL"
newline
endif
sif (cpuis("TMPM3HL*B*"))
hexmask.long 0x10 0.--31. 1. "MCMP,MCMP"
endif
sif (cpuis("TMPM3HM*B*"))
hexmask.long 0x10 0.--31. 1. "MCMP,MCMP"
endif
sif (cpuis("TMPM3HN*B*"))
hexmask.long 0x10 0.--31. 1. "MCMP,MCMP"
endif
sif (cpuis("TMPM3HP*B*"))
hexmask.long 0x10 0.--31. 1. "MCMP,MCMP"
endif
sif (cpuis("TMPM3HQ*B*"))
hexmask.long 0x10 0.--31. 1. "MCMP,MCMP"
endif
line.long 0x14 "RATE,ENC Phase Count Rate Register"
hexmask.long.word 0x14 0.--15. 1. "RATE,RATE"
rgroup.long 0x18++0x3
line.long 0x0 "STS,ENC Status Register"
bitfld.long 0x0 14. "REVERR,REVERR" "0,1"
bitfld.long 0x0 13. "UD,UD" "0,1"
bitfld.long 0x0 12. "ZDET,ZDET" "0,1"
bitfld.long 0x0 2. "SKPDT,SKPDT" "0,1"
bitfld.long 0x0 1. "PDERR,PDERR" "0,1"
newline
bitfld.long 0x0 0. "INERR,INERR" "0,1"
group.long 0x1C++0x7
line.long 0x0 "INPCR,ENC Input Process Cntrol Register"
hexmask.long.byte 0x0 8.--14. 1. "NCT,NCT"
bitfld.long 0x0 7. "PDSTP,PDSTP" "0,1"
bitfld.long 0x0 6. "PDSTT,PDSTT" "0,1"
bitfld.long 0x0 2. "SYNCNCZEN,SYNCNCZEN" "0,1"
bitfld.long 0x0 1. "SYNCSPLMD,SYNCSPLMD" "0,1"
newline
bitfld.long 0x0 0. "SYNCSPLEN,SYNCSPLEN" "0,1"
line.long 0x4 "SMPDLY,ENC Sample Delay Register"
hexmask.long.byte 0x4 0.--7. 1. "SMPDLY,SMPDLY"
rgroup.long 0x24++0x3
line.long 0x0 "INPMON,ENC Input Moniter Register"
bitfld.long 0x0 6. "DETMONZ,DETMONZ" "0,1"
bitfld.long 0x0 5. "DETMONB,DETMONB" "0,1"
bitfld.long 0x0 4. "DETMONA,DETMONA" "0,1"
bitfld.long 0x0 2. "SPLMONZ,SPLMONZ" "0,1"
bitfld.long 0x0 1. "SPLMONB,SPLMONB" "0,1"
newline
bitfld.long 0x0 0. "SPLMONA,SPLMONA" "0,1"
group.long 0x28++0x7
line.long 0x0 "CLKCR,ENC Sample Clock Control Register"
bitfld.long 0x0 0.--1. "SPLCKS,SPLCKS" "0,1,2,3"
line.long 0x4 "INTCR,ENC Interrupt Reqyest Control Register"
bitfld.long 0x4 5. "MCMPIE,MCMPIE" "0,1"
bitfld.long 0x4 4. "RLDIE,RLDIE" "0,1"
bitfld.long 0x4 3. "CMPIE,CMPIE" "0,1"
bitfld.long 0x4 2. "ERRIE,ERRIE" "0,1"
bitfld.long 0x4 1. "CAPIE,CAPIE" "0,1"
newline
bitfld.long 0x4 0. "TPLSIE,TPLSIE" "0,1"
rgroup.long 0x30++0x3
line.long 0x0 "INTF,ENC Interrupt Event Flag Register"
bitfld.long 0x0 5. "MCMPF,MCMPF" "0,1"
bitfld.long 0x0 4. "RLDCPF,RLDCPF" "0,1"
bitfld.long 0x0 3. "INTCPF,INTCPF" "0,1"
bitfld.long 0x0 2. "ERRF,ERRF" "0,1"
bitfld.long 0x0 1. "CAPF,CAPF" "0,1"
newline
bitfld.long 0x0 0. "TPLSF,TPLSF" "0,1"
sif (cpuis("TMPM3HL*B*"))
rgroup.long 0xC++0x3
line.long 0x0 "CNT,ENC Counter_Capture Register"
endif
sif (cpuis("TMPM3HM*B*"))
rgroup.long 0xC++0x3
line.long 0x0 "CNT,ENC Counter_Capture Register"
endif
sif (cpuis("TMPM3HN*B*"))
rgroup.long 0xC++0x3
line.long 0x0 "CNT,ENC Counter_Capture Register"
endif
sif (cpuis("TMPM3HP*B*"))
rgroup.long 0xC++0x3
line.long 0x0 "CNT,ENC Counter_Capture Register"
endif
sif (cpuis("TMPM3HQ*B*"))
rgroup.long 0xC++0x3
line.long 0x0 "CNT,ENC Counter_Capture Register"
endif
tree.end
tree "FC (Flash Controller)"
base ad:0x5DFF0000
group.long 0x10++0x3
line.long 0x0 "SBMR,Flash Security Bit Mask Register"
bitfld.long 0x0 0. "SMB,SMB" "0,1"
rgroup.long 0x14++0x3
line.long 0x0 "SSR,Flash Security Status Register"
bitfld.long 0x0 0. "SEC,SEC" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "KCR,Flash Key Code Register"
hexmask.long 0x0 0.--31. 1. "KEYCODE,KEYCODE"
rgroup.long 0x20++0x3
line.long 0x0 "SR0,Flash Status Register 0"
bitfld.long 0x0 10. "RDYBSY2,RDYBSY2" "0,1"
bitfld.long 0x0 8. "RDYBSY0,RDYBSY0" "0,1"
bitfld.long 0x0 0. "RDYBSY,RDYBSY" "0,1"
rgroup.long 0x30++0x7
line.long 0x0 "PSR0,Flash Protect Status Register 0"
bitfld.long 0x0 7. "PG7,PG7" "0,1"
bitfld.long 0x0 6. "PG6,PG6" "0,1"
bitfld.long 0x0 5. "PG5,PG5" "0,1"
bitfld.long 0x0 4. "PG4,PG4" "0,1"
bitfld.long 0x0 3. "PG3,PG3" "0,1"
bitfld.long 0x0 2. "PG2,PG2" "0,1"
bitfld.long 0x0 1. "PG1,PG1" "0,1"
bitfld.long 0x0 0. "PG0,PG0" "0,1"
line.long 0x4 "PSR1,Flash Protect Status Register 1"
sif (cpuis("TMPM3HL*B*"))
rbitfld.long 0x4 31. "BLK31,BLK31" "0,1"
rbitfld.long 0x4 30. "BLK30,BLK30" "0,1"
rbitfld.long 0x4 29. "BLK29,BLK29" "0,1"
rbitfld.long 0x4 28. "BLK28,BLK28" "0,1"
rbitfld.long 0x4 27. "BLK27,BLK27" "0,1"
rbitfld.long 0x4 26. "BLK26,BLK26" "0,1"
rbitfld.long 0x4 25. "BLK25,BLK25" "0,1"
rbitfld.long 0x4 24. "BLK24,BLK24" "0,1"
rbitfld.long 0x4 23. "BLK23,BLK23" "0,1"
newline
rbitfld.long 0x4 22. "BLK22,BLK22" "0,1"
rbitfld.long 0x4 21. "BLK21,BLK21" "0,1"
rbitfld.long 0x4 20. "BLK20,BLK20" "0,1"
rbitfld.long 0x4 19. "BLK19,BLK19" "0,1"
rbitfld.long 0x4 18. "BLK18,BLK18" "0,1"
rbitfld.long 0x4 17. "BLK17,BLK17" "0,1"
rbitfld.long 0x4 16. "BLK16,BLK16" "0,1"
endif
sif (cpuis("TMPM3HM*B*"))
rbitfld.long 0x4 31. "BLK31,BLK31" "0,1"
rbitfld.long 0x4 30. "BLK30,BLK30" "0,1"
newline
rbitfld.long 0x4 29. "BLK29,BLK29" "0,1"
rbitfld.long 0x4 28. "BLK28,BLK28" "0,1"
rbitfld.long 0x4 27. "BLK27,BLK27" "0,1"
rbitfld.long 0x4 26. "BLK26,BLK26" "0,1"
rbitfld.long 0x4 25. "BLK25,BLK25" "0,1"
rbitfld.long 0x4 24. "BLK24,BLK24" "0,1"
rbitfld.long 0x4 23. "BLK23,BLK23" "0,1"
rbitfld.long 0x4 22. "BLK22,BLK22" "0,1"
rbitfld.long 0x4 21. "BLK21,BLK21" "0,1"
newline
rbitfld.long 0x4 20. "BLK20,BLK20" "0,1"
rbitfld.long 0x4 19. "BLK19,BLK19" "0,1"
rbitfld.long 0x4 18. "BLK18,BLK18" "0,1"
rbitfld.long 0x4 17. "BLK17,BLK17" "0,1"
rbitfld.long 0x4 16. "BLK16,BLK16" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
rbitfld.long 0x4 31. "BLK31,BLK31" "0,1"
rbitfld.long 0x4 30. "BLK30,BLK30" "0,1"
rbitfld.long 0x4 29. "BLK29,BLK29" "0,1"
rbitfld.long 0x4 28. "BLK28,BLK28" "0,1"
newline
rbitfld.long 0x4 27. "BLK27,BLK27" "0,1"
rbitfld.long 0x4 26. "BLK26,BLK26" "0,1"
rbitfld.long 0x4 25. "BLK25,BLK25" "0,1"
rbitfld.long 0x4 24. "BLK24,BLK24" "0,1"
rbitfld.long 0x4 23. "BLK23,BLK23" "0,1"
rbitfld.long 0x4 22. "BLK22,BLK22" "0,1"
rbitfld.long 0x4 21. "BLK21,BLK21" "0,1"
rbitfld.long 0x4 20. "BLK20,BLK20" "0,1"
rbitfld.long 0x4 19. "BLK19,BLK19" "0,1"
newline
rbitfld.long 0x4 18. "BLK18,BLK18" "0,1"
rbitfld.long 0x4 17. "BLK17,BLK17" "0,1"
rbitfld.long 0x4 16. "BLK16,BLK16" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
rbitfld.long 0x4 31. "BLK31,BLK31" "0,1"
rbitfld.long 0x4 30. "BLK30,BLK30" "0,1"
rbitfld.long 0x4 29. "BLK29,BLK29" "0,1"
rbitfld.long 0x4 28. "BLK28,BLK28" "0,1"
rbitfld.long 0x4 27. "BLK27,BLK27" "0,1"
rbitfld.long 0x4 26. "BLK26,BLK26" "0,1"
newline
rbitfld.long 0x4 25. "BLK25,BLK25" "0,1"
rbitfld.long 0x4 24. "BLK24,BLK24" "0,1"
rbitfld.long 0x4 23. "BLK23,BLK23" "0,1"
rbitfld.long 0x4 22. "BLK22,BLK22" "0,1"
rbitfld.long 0x4 21. "BLK21,BLK21" "0,1"
rbitfld.long 0x4 20. "BLK20,BLK20" "0,1"
rbitfld.long 0x4 19. "BLK19,BLK19" "0,1"
rbitfld.long 0x4 18. "BLK18,BLK18" "0,1"
rbitfld.long 0x4 17. "BLK17,BLK17" "0,1"
newline
rbitfld.long 0x4 16. "BLK16,BLK16" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
rbitfld.long 0x4 31. "BLK31,BLK31" "0,1"
rbitfld.long 0x4 30. "BLK30,BLK30" "0,1"
rbitfld.long 0x4 29. "BLK29,BLK29" "0,1"
rbitfld.long 0x4 28. "BLK28,BLK28" "0,1"
rbitfld.long 0x4 27. "BLK27,BLK27" "0,1"
rbitfld.long 0x4 26. "BLK26,BLK26" "0,1"
rbitfld.long 0x4 25. "BLK25,BLK25" "0,1"
rbitfld.long 0x4 24. "BLK24,BLK24" "0,1"
newline
rbitfld.long 0x4 23. "BLK23,BLK23" "0,1"
rbitfld.long 0x4 22. "BLK22,BLK22" "0,1"
rbitfld.long 0x4 21. "BLK21,BLK21" "0,1"
rbitfld.long 0x4 20. "BLK20,BLK20" "0,1"
rbitfld.long 0x4 19. "BLK19,BLK19" "0,1"
rbitfld.long 0x4 18. "BLK18,BLK18" "0,1"
rbitfld.long 0x4 17. "BLK17,BLK17" "0,1"
rbitfld.long 0x4 16. "BLK16,BLK16" "0,1"
endif
rbitfld.long 0x4 15. "BLK15,BLK15" "0,1"
newline
rbitfld.long 0x4 14. "BLK14,BLK14" "0,1"
rbitfld.long 0x4 13. "BLK13,BLK13" "0,1"
rbitfld.long 0x4 12. "BLK12,BLK12" "0,1"
rbitfld.long 0x4 11. "BLK11,BLK11" "0,1"
rbitfld.long 0x4 10. "BLK10,BLK10" "0,1"
rbitfld.long 0x4 9. "BLK9,BLK9" "0,1"
rbitfld.long 0x4 8. "BLK8,BLK8" "0,1"
rbitfld.long 0x4 7. "BLK7,BLK7" "0,1"
rbitfld.long 0x4 6. "BLK6,BLK6" "0,1"
newline
rbitfld.long 0x4 5. "BLK5,BLK5" "0,1"
rbitfld.long 0x4 4. "BLK4,BLK4" "0,1"
rbitfld.long 0x4 3. "BLK3,BLK3" "0,1"
rbitfld.long 0x4 2. "BLK2,BLK2" "0,1"
rbitfld.long 0x4 1. "BLK1,BLK1" "0,1"
rgroup.long 0x48++0x3
line.long 0x0 "PSR6,Flash Protect Status Register 6"
bitfld.long 0x0 7. "DBLK7,DBLK7" "0,1"
bitfld.long 0x0 6. "DBLK6,DBLK6" "0,1"
bitfld.long 0x0 5. "DBLK5,DBLK5" "0,1"
bitfld.long 0x0 4. "DBLK4,DBLK4" "0,1"
bitfld.long 0x0 3. "DBLK3,DBLK3" "0,1"
bitfld.long 0x0 2. "DBLK2,DBLK2" "0,1"
bitfld.long 0x0 1. "DBLK1,DBLK1" "0,1"
bitfld.long 0x0 0. "DBLK0,DBLK0" "0,1"
group.long 0x50++0x7
line.long 0x0 "PMR0,Flash Protect Mask Register 0"
bitfld.long 0x0 7. "PM7,PM7" "0,1"
bitfld.long 0x0 6. "PM6,PM6" "0,1"
bitfld.long 0x0 5. "PM5,PM5" "0,1"
bitfld.long 0x0 4. "PM4,PM4" "0,1"
bitfld.long 0x0 3. "PM3,PM3" "0,1"
bitfld.long 0x0 2. "PM2,PM2" "0,1"
bitfld.long 0x0 1. "PM1,PM1" "0,1"
bitfld.long 0x0 0. "PM0,PM0" "0,1"
line.long 0x4 "PMR1,Flash Protect Mask Register 1"
sif (cpuis("TMPM3HL*B*"))
bitfld.long 0x4 31. "MSK31,MSK31" "0,1"
bitfld.long 0x4 30. "MSK30,MSK30" "0,1"
bitfld.long 0x4 29. "MSK29,MSK29" "0,1"
bitfld.long 0x4 28. "MSK28,MSK28" "0,1"
bitfld.long 0x4 27. "MSK27,MSK27" "0,1"
bitfld.long 0x4 26. "MSK26,MSK26" "0,1"
bitfld.long 0x4 25. "MSK25,MSK25" "0,1"
bitfld.long 0x4 24. "MSK24,MSK24" "0,1"
bitfld.long 0x4 23. "MSK23,MSK23" "0,1"
newline
bitfld.long 0x4 22. "MSK22,MSK22" "0,1"
bitfld.long 0x4 21. "MSK21,MSK21" "0,1"
bitfld.long 0x4 20. "MSK20,MSK20" "0,1"
bitfld.long 0x4 19. "MSK19,MSK19" "0,1"
bitfld.long 0x4 18. "MSK18,MSK18" "0,1"
bitfld.long 0x4 17. "MSK17,MSK17" "0,1"
bitfld.long 0x4 16. "MSK16,MSK16" "0,1"
endif
sif (cpuis("TMPM3HM*B*"))
bitfld.long 0x4 31. "MSK31,MSK31" "0,1"
bitfld.long 0x4 30. "MSK30,MSK30" "0,1"
newline
bitfld.long 0x4 29. "MSK29,MSK29" "0,1"
bitfld.long 0x4 28. "MSK28,MSK28" "0,1"
bitfld.long 0x4 27. "MSK27,MSK27" "0,1"
bitfld.long 0x4 26. "MSK26,MSK26" "0,1"
bitfld.long 0x4 25. "MSK25,MSK25" "0,1"
bitfld.long 0x4 24. "MSK24,MSK24" "0,1"
bitfld.long 0x4 23. "MSK23,MSK23" "0,1"
bitfld.long 0x4 22. "MSK22,MSK22" "0,1"
bitfld.long 0x4 21. "MSK21,MSK21" "0,1"
newline
bitfld.long 0x4 20. "MSK20,MSK20" "0,1"
bitfld.long 0x4 19. "MSK19,MSK19" "0,1"
bitfld.long 0x4 18. "MSK18,MSK18" "0,1"
bitfld.long 0x4 17. "MSK17,MSK17" "0,1"
bitfld.long 0x4 16. "MSK16,MSK16" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x4 31. "MSK31,MSK31" "0,1"
bitfld.long 0x4 30. "MSK30,MSK30" "0,1"
bitfld.long 0x4 29. "MSK29,MSK29" "0,1"
bitfld.long 0x4 28. "MSK28,MSK28" "0,1"
newline
bitfld.long 0x4 27. "MSK27,MSK27" "0,1"
bitfld.long 0x4 26. "MSK26,MSK26" "0,1"
bitfld.long 0x4 25. "MSK25,MSK25" "0,1"
bitfld.long 0x4 24. "MSK24,MSK24" "0,1"
bitfld.long 0x4 23. "MSK23,MSK23" "0,1"
bitfld.long 0x4 22. "MSK22,MSK22" "0,1"
bitfld.long 0x4 21. "MSK21,MSK21" "0,1"
bitfld.long 0x4 20. "MSK20,MSK20" "0,1"
bitfld.long 0x4 19. "MSK19,MSK19" "0,1"
newline
bitfld.long 0x4 18. "MSK18,MSK18" "0,1"
bitfld.long 0x4 17. "MSK17,MSK17" "0,1"
bitfld.long 0x4 16. "MSK16,MSK16" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x4 31. "MSK31,MSK31" "0,1"
bitfld.long 0x4 30. "MSK30,MSK30" "0,1"
bitfld.long 0x4 29. "MSK29,MSK29" "0,1"
bitfld.long 0x4 28. "MSK28,MSK28" "0,1"
bitfld.long 0x4 27. "MSK27,MSK27" "0,1"
bitfld.long 0x4 26. "MSK26,MSK26" "0,1"
newline
bitfld.long 0x4 25. "MSK25,MSK25" "0,1"
bitfld.long 0x4 24. "MSK24,MSK24" "0,1"
bitfld.long 0x4 23. "MSK23,MSK23" "0,1"
bitfld.long 0x4 22. "MSK22,MSK22" "0,1"
bitfld.long 0x4 21. "MSK21,MSK21" "0,1"
bitfld.long 0x4 20. "MSK20,MSK20" "0,1"
bitfld.long 0x4 19. "MSK19,MSK19" "0,1"
bitfld.long 0x4 18. "MSK18,MSK18" "0,1"
bitfld.long 0x4 17. "MSK17,MSK17" "0,1"
newline
bitfld.long 0x4 16. "MSK16,MSK16" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x4 31. "MSK31,MSK31" "0,1"
bitfld.long 0x4 30. "MSK30,MSK30" "0,1"
bitfld.long 0x4 29. "MSK29,MSK29" "0,1"
bitfld.long 0x4 28. "MSK28,MSK28" "0,1"
bitfld.long 0x4 27. "MSK27,MSK27" "0,1"
bitfld.long 0x4 26. "MSK26,MSK26" "0,1"
bitfld.long 0x4 25. "MSK25,MSK25" "0,1"
bitfld.long 0x4 24. "MSK24,MSK24" "0,1"
newline
bitfld.long 0x4 23. "MSK23,MSK23" "0,1"
bitfld.long 0x4 22. "MSK22,MSK22" "0,1"
bitfld.long 0x4 21. "MSK21,MSK21" "0,1"
bitfld.long 0x4 20. "MSK20,MSK20" "0,1"
bitfld.long 0x4 19. "MSK19,MSK19" "0,1"
bitfld.long 0x4 18. "MSK18,MSK18" "0,1"
bitfld.long 0x4 17. "MSK17,MSK17" "0,1"
bitfld.long 0x4 16. "MSK16,MSK16" "0,1"
endif
bitfld.long 0x4 15. "MSK15,MSK15" "0,1"
newline
bitfld.long 0x4 14. "MSK14,MSK14" "0,1"
bitfld.long 0x4 13. "MSK13,MSK13" "0,1"
bitfld.long 0x4 12. "MSK12,MSK12" "0,1"
bitfld.long 0x4 11. "MSK11,MSK11" "0,1"
bitfld.long 0x4 10. "MSK10,MSK10" "0,1"
bitfld.long 0x4 9. "MSK9,MSK9" "0,1"
bitfld.long 0x4 8. "MSK8,MSK8" "0,1"
bitfld.long 0x4 7. "MSK7,MSK7" "0,1"
bitfld.long 0x4 6. "MSK6,MSK6" "0,1"
newline
bitfld.long 0x4 5. "MSK5,MSK5" "0,1"
bitfld.long 0x4 4. "MSK4,MSK4" "0,1"
bitfld.long 0x4 3. "MSK3,MSK3" "0,1"
bitfld.long 0x4 2. "MSK2,MSK2" "0,1"
bitfld.long 0x4 1. "MSK1,MSK1" "0,1"
group.long 0x68++0x3
line.long 0x0 "PMR6,Flash Protect Mask Register 6"
bitfld.long 0x0 7. "DMSK7,DMSK7" "0,1"
bitfld.long 0x0 6. "DMSK6,DMSK6" "0,1"
bitfld.long 0x0 5. "DMSK5,DMSK5" "0,1"
bitfld.long 0x0 4. "DMSK4,DMSK4" "0,1"
bitfld.long 0x0 3. "DMSK3,DMSK3" "0,1"
bitfld.long 0x0 2. "DMSK2,DMSK2" "0,1"
bitfld.long 0x0 1. "DMSK1,DMSK1" "0,1"
bitfld.long 0x0 0. "DMSK0,DMSK0" "0,1"
rgroup.long 0x100++0x7
line.long 0x0 "SR1,Flash Status Register 1"
bitfld.long 0x0 24. "WEABORT,WEABORT" "0,1"
line.long 0x4 "SWPSR,Flash Memory SWP Status Register"
hexmask.long.byte 0x4 8.--13. 1. "SIZE,SIZE"
bitfld.long 0x4 0.--1. "SWP,SWP" "0,1,2,3"
group.long 0x140++0x3
line.long 0x0 "AREASEL,Flash Area Selection Register"
rbitfld.long 0x0 30. "SSF4,SSF4" "0,1"
sif (cpuis("TMPM3HL*B*"))
rbitfld.long 0x0 27. "SSF1,SSF1" "0,1"
endif
sif (cpuis("TMPM3HM*B*"))
rbitfld.long 0x0 27. "SSF1,SSF1" "0,1"
endif
sif (cpuis("TMPM3HN*B*"))
rbitfld.long 0x0 27. "SSF1,SSF1" "0,1"
endif
sif (cpuis("TMPM3HP*B*"))
rbitfld.long 0x0 27. "SSF1,SSF1" "0,1"
endif
sif (cpuis("TMPM3HQ*B*"))
rbitfld.long 0x0 27. "SSF1,SSF1" "0,1"
endif
rbitfld.long 0x0 26. "SSF0,SSF0" "0,1"
bitfld.long 0x0 16.--18. "AREA4,AREA4" "0,1,2,3,4,5,6,7"
sif (cpuis("TMPM3HL*B*"))
bitfld.long 0x0 4.--6. "AREA1,AREA1" "0,1,2,3,4,5,6,7"
newline
endif
sif (cpuis("TMPM3HM*B*"))
bitfld.long 0x0 4.--6. "AREA1,AREA1" "0,1,2,3,4,5,6,7"
endif
sif (cpuis("TMPM3HN*B*"))
bitfld.long 0x0 4.--6. "AREA1,AREA1" "0,1,2,3,4,5,6,7"
endif
sif (cpuis("TMPM3HP*B*"))
bitfld.long 0x0 4.--6. "AREA1,AREA1" "0,1,2,3,4,5,6,7"
endif
sif (cpuis("TMPM3HQ*B*"))
bitfld.long 0x0 4.--6. "AREA1,AREA1" "0,1,2,3,4,5,6,7"
endif
bitfld.long 0x0 0.--2. "AREA0,AREA0" "0,1,2,3,4,5,6,7"
group.long 0x148++0x13
line.long 0x0 "CR,Flash Control Register"
bitfld.long 0x0 0.--2. "WEABORT,WEABORT" "0,1,2,3,4,5,6,7"
line.long 0x4 "STSCLR,Flash Status Clear Register"
bitfld.long 0x4 0.--2. "WEABORT,WEABORT" "0,1,2,3,4,5,6,7"
line.long 0x8 "BNKCR,Flash Bank Change Register"
bitfld.long 0x8 0.--2. "BANK0,BANK0" "0,1,2,3,4,5,6,7"
line.long 0xC "FCACCR,Flash Wait Control Register"
bitfld.long 0xC 8.--10. "FDLC,FDLC" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 0.--2. "FCLC,FCLC" "0,1,2,3,4,5,6,7"
line.long 0x10 "BUFDISCLR,Flash Buffer Disable and Clear Register"
bitfld.long 0x10 0.--2. "BUFDISCLR,BUFDISCLR" "0,1,2,3,4,5,6,7"
tree.end
tree "I2C (Inter-Integrated Circuit)"
base ad:0x0
tree "I2C0"
base ad:0x400A0000
group.long 0x0++0xB
line.long 0x0 "CR1,I2C Control Register 1"
bitfld.long 0x0 5.--7. "BC,BC" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ACK,ACK" "0,1"
bitfld.long 0x0 3. "NOACK,NOACK" "0,1"
bitfld.long 0x0 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
line.long 0x4 "DBR,I2C Data Buffer Register"
hexmask.long.byte 0x4 0.--7. 1. "DB,DB"
line.long 0x8 "AR,I2C Bus address Register"
hexmask.long.byte 0x8 1.--7. 1. "SA,SA"
bitfld.long 0x8 0. "ALS,ALS" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR2,I2C Control Register 2"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "I2CM,I2CM" "0,1"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
rgroup.long 0xC++0x3
line.long 0x0 "SR,I2C Status Register"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "AL,AL" "0,1"
bitfld.long 0x0 2. "AAS,AAS" "0,1"
bitfld.long 0x0 1. "AD0,AD0" "0,1"
bitfld.long 0x0 0. "LRB,LRB" "0,1"
group.long 0x10++0xF
line.long 0x0 "PRS,I2C Prescaler clcok setting Register"
hexmask.long.byte 0x0 0.--4. 1. "PRSCK,PRSCK"
line.long 0x4 "IE,I2C Interrupt Enable Register"
bitfld.long 0x4 6. "SELPINCD,SELPINCD" "0,1"
bitfld.long 0x4 5. "DMARI2CTX,DMARI2CTX" "0,1"
bitfld.long 0x4 4. "DMARI2CRX,DMARI2CRX" "0,1"
bitfld.long 0x4 3. "INTNACK,INTNACK" "0,1"
bitfld.long 0x4 2. "INTI2CBF,INTI2CBF" "0,1"
bitfld.long 0x4 1. "INTI2CAL,INTI2CAL" "0,1"
bitfld.long 0x4 0. "INTI2C,INTI2C" "0,1"
line.long 0x8 "ST,I2C Interrupt Register"
bitfld.long 0x8 3. "NACK,NACK" "0,1"
bitfld.long 0x8 2. "I2CBF,I2CBF" "0,1"
bitfld.long 0x8 1. "I2CAL,I2CAL" "0,1"
bitfld.long 0x8 0. "I2C,I2C" "0,1"
line.long 0xC "OP,I2C Optiononal Function register"
bitfld.long 0xC 7. "DISAL,DISAL" "0,1"
rbitfld.long 0xC 6. "SA2ST,SA2ST" "0,1"
rbitfld.long 0xC 5. "SAST,SAST" "0,1"
bitfld.long 0xC 4. "NFSEL,NFSEL" "0,1"
bitfld.long 0xC 3. "RSTA,RSTA" "0,1"
bitfld.long 0xC 2. "GCDI,GCDI" "0,1"
bitfld.long 0xC 1. "SREN,SREN" "0,1"
bitfld.long 0xC 0. "MFACK,MFACK" "0,1"
rgroup.long 0x20++0x3
line.long 0x0 "PM,I2C Bus Monitor register"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
group.long 0x24++0x3
line.long 0x0 "AR2,I2C Second Slave address register"
hexmask.long.byte 0x0 1.--7. 1. "SA2,SA2"
bitfld.long 0x0 0. "SA2EN,SA2EN" "0,1"
tree.end
tree "I2C2"
base ad:0x400A2000
group.long 0x0++0xB
line.long 0x0 "CR1,I2C Control Register 1"
bitfld.long 0x0 5.--7. "BC,BC" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ACK,ACK" "0,1"
bitfld.long 0x0 3. "NOACK,NOACK" "0,1"
bitfld.long 0x0 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
line.long 0x4 "DBR,I2C Data Buffer Register"
hexmask.long.byte 0x4 0.--7. 1. "DB,DB"
line.long 0x8 "AR,I2C Bus address Register"
hexmask.long.byte 0x8 1.--7. 1. "SA,SA"
bitfld.long 0x8 0. "ALS,ALS" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR2,I2C Control Register 2"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "I2CM,I2CM" "0,1"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
rgroup.long 0xC++0x3
line.long 0x0 "SR,I2C Status Register"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "AL,AL" "0,1"
bitfld.long 0x0 2. "AAS,AAS" "0,1"
bitfld.long 0x0 1. "AD0,AD0" "0,1"
bitfld.long 0x0 0. "LRB,LRB" "0,1"
group.long 0x10++0xF
line.long 0x0 "PRS,I2C Prescaler clcok setting Register"
hexmask.long.byte 0x0 0.--4. 1. "PRSCK,PRSCK"
line.long 0x4 "IE,I2C Interrupt Enable Register"
bitfld.long 0x4 6. "SELPINCD,SELPINCD" "0,1"
bitfld.long 0x4 5. "DMARI2CTX,DMARI2CTX" "0,1"
bitfld.long 0x4 4. "DMARI2CRX,DMARI2CRX" "0,1"
bitfld.long 0x4 3. "INTNACK,INTNACK" "0,1"
bitfld.long 0x4 2. "INTI2CBF,INTI2CBF" "0,1"
bitfld.long 0x4 1. "INTI2CAL,INTI2CAL" "0,1"
bitfld.long 0x4 0. "INTI2C,INTI2C" "0,1"
line.long 0x8 "ST,I2C Interrupt Register"
bitfld.long 0x8 3. "NACK,NACK" "0,1"
bitfld.long 0x8 2. "I2CBF,I2CBF" "0,1"
bitfld.long 0x8 1. "I2CAL,I2CAL" "0,1"
bitfld.long 0x8 0. "I2C,I2C" "0,1"
line.long 0xC "OP,I2C Optiononal Function register"
bitfld.long 0xC 7. "DISAL,DISAL" "0,1"
rbitfld.long 0xC 6. "SA2ST,SA2ST" "0,1"
rbitfld.long 0xC 5. "SAST,SAST" "0,1"
bitfld.long 0xC 4. "NFSEL,NFSEL" "0,1"
bitfld.long 0xC 3. "RSTA,RSTA" "0,1"
bitfld.long 0xC 2. "GCDI,GCDI" "0,1"
bitfld.long 0xC 1. "SREN,SREN" "0,1"
bitfld.long 0xC 0. "MFACK,MFACK" "0,1"
rgroup.long 0x20++0x3
line.long 0x0 "PM,I2C Bus Monitor register"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
group.long 0x24++0x3
line.long 0x0 "AR2,I2C Second Slave address register"
hexmask.long.byte 0x0 1.--7. 1. "SA2,SA2"
bitfld.long 0x0 0. "SA2EN,SA2EN" "0,1"
tree.end
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "I2C1"
base ad:0x400A1000
group.long 0x0++0xB
line.long 0x0 "CR1,I2C Control Register 1"
bitfld.long 0x0 5.--7. "BC,BC" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ACK,ACK" "0,1"
bitfld.long 0x0 3. "NOACK,NOACK" "0,1"
bitfld.long 0x0 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
line.long 0x4 "DBR,I2C Data Buffer Register"
hexmask.long.byte 0x4 0.--7. 1. "DB,DB"
line.long 0x8 "AR,I2C Bus address Register"
hexmask.long.byte 0x8 1.--7. 1. "SA,SA"
bitfld.long 0x8 0. "ALS,ALS" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR2,I2C Control Register 2"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "I2CM,I2CM" "0,1"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
rgroup.long 0xC++0x3
line.long 0x0 "SR,I2C Status Register"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "AL,AL" "0,1"
bitfld.long 0x0 2. "AAS,AAS" "0,1"
bitfld.long 0x0 1. "AD0,AD0" "0,1"
bitfld.long 0x0 0. "LRB,LRB" "0,1"
group.long 0x10++0xF
line.long 0x0 "PRS,I2C Prescaler clcok setting Register"
hexmask.long.byte 0x0 0.--4. 1. "PRSCK,PRSCK"
line.long 0x4 "IE,I2C Interrupt Enable Register"
bitfld.long 0x4 6. "SELPINCD,SELPINCD" "0,1"
bitfld.long 0x4 5. "DMARI2CTX,DMARI2CTX" "0,1"
bitfld.long 0x4 4. "DMARI2CRX,DMARI2CRX" "0,1"
bitfld.long 0x4 3. "INTNACK,INTNACK" "0,1"
bitfld.long 0x4 2. "INTI2CBF,INTI2CBF" "0,1"
bitfld.long 0x4 1. "INTI2CAL,INTI2CAL" "0,1"
bitfld.long 0x4 0. "INTI2C,INTI2C" "0,1"
line.long 0x8 "ST,I2C Interrupt Register"
bitfld.long 0x8 3. "NACK,NACK" "0,1"
bitfld.long 0x8 2. "I2CBF,I2CBF" "0,1"
bitfld.long 0x8 1. "I2CAL,I2CAL" "0,1"
bitfld.long 0x8 0. "I2C,I2C" "0,1"
line.long 0xC "OP,I2C Optiononal Function register"
bitfld.long 0xC 7. "DISAL,DISAL" "0,1"
rbitfld.long 0xC 6. "SA2ST,SA2ST" "0,1"
rbitfld.long 0xC 5. "SAST,SAST" "0,1"
bitfld.long 0xC 4. "NFSEL,NFSEL" "0,1"
bitfld.long 0xC 3. "RSTA,RSTA" "0,1"
bitfld.long 0xC 2. "GCDI,GCDI" "0,1"
bitfld.long 0xC 1. "SREN,SREN" "0,1"
bitfld.long 0xC 0. "MFACK,MFACK" "0,1"
rgroup.long 0x20++0x3
line.long 0x0 "PM,I2C Bus Monitor register"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
group.long 0x24++0x3
line.long 0x0 "AR2,I2C Second Slave address register"
hexmask.long.byte 0x0 1.--7. 1. "SA2,SA2"
bitfld.long 0x0 0. "SA2EN,SA2EN" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "I2C3"
base ad:0x400A3000
group.long 0x0++0xB
line.long 0x0 "CR1,I2C Control Register 1"
bitfld.long 0x0 5.--7. "BC,BC" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4. "ACK,ACK" "0,1"
bitfld.long 0x0 3. "NOACK,NOACK" "0,1"
bitfld.long 0x0 0.--2. "SCK,SCK" "0,1,2,3,4,5,6,7"
line.long 0x4 "DBR,I2C Data Buffer Register"
hexmask.long.byte 0x4 0.--7. 1. "DB,DB"
line.long 0x8 "AR,I2C Bus address Register"
hexmask.long.byte 0x8 1.--7. 1. "SA,SA"
bitfld.long 0x8 0. "ALS,ALS" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR2,I2C Control Register 2"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "I2CM,I2CM" "0,1"
bitfld.long 0x0 0.--1. "SWRES,SWRES" "0,1,2,3"
rgroup.long 0xC++0x3
line.long 0x0 "SR,I2C Status Register"
bitfld.long 0x0 7. "MST,MST" "0,1"
bitfld.long 0x0 6. "TRX,TRX" "0,1"
bitfld.long 0x0 5. "BB,BB" "0,1"
bitfld.long 0x0 4. "PIN,PIN" "0,1"
bitfld.long 0x0 3. "AL,AL" "0,1"
bitfld.long 0x0 2. "AAS,AAS" "0,1"
bitfld.long 0x0 1. "AD0,AD0" "0,1"
bitfld.long 0x0 0. "LRB,LRB" "0,1"
group.long 0x10++0xF
line.long 0x0 "PRS,I2C Prescaler clcok setting Register"
hexmask.long.byte 0x0 0.--4. 1. "PRSCK,PRSCK"
line.long 0x4 "IE,I2C Interrupt Enable Register"
bitfld.long 0x4 6. "SELPINCD,SELPINCD" "0,1"
bitfld.long 0x4 5. "DMARI2CTX,DMARI2CTX" "0,1"
bitfld.long 0x4 4. "DMARI2CRX,DMARI2CRX" "0,1"
bitfld.long 0x4 3. "INTNACK,INTNACK" "0,1"
bitfld.long 0x4 2. "INTI2CBF,INTI2CBF" "0,1"
bitfld.long 0x4 1. "INTI2CAL,INTI2CAL" "0,1"
bitfld.long 0x4 0. "INTI2C,INTI2C" "0,1"
line.long 0x8 "ST,I2C Interrupt Register"
bitfld.long 0x8 3. "NACK,NACK" "0,1"
bitfld.long 0x8 2. "I2CBF,I2CBF" "0,1"
bitfld.long 0x8 1. "I2CAL,I2CAL" "0,1"
bitfld.long 0x8 0. "I2C,I2C" "0,1"
line.long 0xC "OP,I2C Optiononal Function register"
bitfld.long 0xC 7. "DISAL,DISAL" "0,1"
rbitfld.long 0xC 6. "SA2ST,SA2ST" "0,1"
rbitfld.long 0xC 5. "SAST,SAST" "0,1"
bitfld.long 0xC 4. "NFSEL,NFSEL" "0,1"
bitfld.long 0xC 3. "RSTA,RSTA" "0,1"
bitfld.long 0xC 2. "GCDI,GCDI" "0,1"
bitfld.long 0xC 1. "SREN,SREN" "0,1"
bitfld.long 0xC 0. "MFACK,MFACK" "0,1"
rgroup.long 0x20++0x3
line.long 0x0 "PM,I2C Bus Monitor register"
bitfld.long 0x0 1. "SDA,SDA" "0,1"
bitfld.long 0x0 0. "SCL,SCL" "0,1"
group.long 0x24++0x3
line.long 0x0 "AR2,I2C Second Slave address register"
hexmask.long.byte 0x0 1.--7. 1. "SA2,SA2"
bitfld.long 0x0 0. "SA2EN,SA2EN" "0,1"
tree.end
endif
tree.end
tree "I2CS (I2C Wakeup Function)"
base ad:0x4003E800
group.byte 0x0++0x2
line.byte 0x0 "WUPCR1,I2C Wakeup control register1"
rbitfld.byte 0x0 7. "BUSY,BUSY" "0,1"
bitfld.byte 0x0 6. "SGCDI,SGCDI" "0,1"
bitfld.byte 0x0 5. "ACK,ACK" "0,1"
bitfld.byte 0x0 4. "I2RES,I2RES" "0,1"
rbitfld.byte 0x0 3. "RW,RW" "0,1"
rbitfld.byte 0x0 1. "GC,GC" "0,1"
bitfld.byte 0x0 0. "INTEND,INTEND" "0,1"
line.byte 0x1 "WUPCR2,I2C Wakeup control register2"
hexmask.byte 0x1 1.--7. 1. "WUPSA1,WUPSA1"
line.byte 0x2 "WUPCR3,I2C Wakeup control register3"
hexmask.byte 0x2 1.--7. 1. "WUPSA2,WUPSA2"
bitfld.byte 0x2 0. "WUPSA2EN,WUPSA2EN" "0,1"
rgroup.byte 0x3++0x0
line.byte 0x0 "WUPSL,I2C Wakeup Status register"
bitfld.byte 0x0 2. "WUPSA2,WUPSA2" "0,1"
bitfld.byte 0x0 1. "WUPSA,WUPSA" "0,1"
group.byte 0x4++0x1
line.byte 0x0 "WUPCR4,I2C Wakeup control register4"
bitfld.byte 0x0 7. "WUPSAFS1,WUPSAFS1" "0,1"
bitfld.byte 0x0 0.--2. "WUPSA1U,WUPSA1U" "0,1,2,3,4,5,6,7"
line.byte 0x1 "WUPCR5,I2C Wakeup control register5"
bitfld.byte 0x1 7. "WUPSAFS2,WUPSAFS2" "0,1"
bitfld.byte 0x1 0.--2. "WUPSA2U,WUPSA2U" "0,1,2,3,4,5,6,7"
tree.end
tree "INTC (Interrupt Control)"
base ad:0x0
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "IA (Group A)"
base ad:0x4003E000
group.byte 0x0++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(A) 00"
bitfld.byte 0x0 7. "INTNCLR,INTNCLR" "0,1"
rbitfld.byte 0x0 5. "INTNFLG,INTNFLG" "0,1"
group.byte 0x20++0x1
line.byte 0x0 "IMC00,Interrupu Mode Control Register(A) 00"
bitfld.byte 0x0 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC01,Interrupu Mode Control Register(A) 01"
bitfld.byte 0x1 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x1 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x1 0. "INTEN,INTEN" "0,1"
group.byte 0x30++0x1
line.byte 0x0 "IMC16,Interrupu Mode Control Register(A) 16"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC17,Interrupu Mode Control Register(A) 17"
bitfld.byte 0x1 7. "INTNCLR,INTNCLR" "0,1"
rbitfld.byte 0x1 5. "INTNFLG,INTNFLG" "0,1"
bitfld.byte 0x1 0. "INTEN,INTEN" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "IB (Group B)"
base ad:0x400F4E00
group.byte 0x10++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(B) 00"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
group.byte 0x60++0x47
line.byte 0x0 "IMC000,Interrupu Mode Control Register(B) 000"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1 "IMC001,Interrupu Mode Control Register(B) 001"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2 "IMC002,Interrupu Mode Control Register(B) 002"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3 "IMC003,Interrupu Mode Control Register(B) 003"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x4 "IMC004,Interrupu Mode Control Register(B) 004"
bitfld.byte 0x4 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x5 "IMC005,Interrupu Mode Control Register(B) 005"
bitfld.byte 0x5 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x6 "IMC006,Interrupu Mode Control Register(B) 006"
bitfld.byte 0x6 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x6 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x7 "IMC007,Interrupu Mode Control Register(B) 007"
bitfld.byte 0x7 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x7 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x8 "IMC008,Interrupu Mode Control Register(B) 008"
bitfld.byte 0x8 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x8 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x9 "IMC009,Interrupu Mode Control Register(B) 009"
bitfld.byte 0x9 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x9 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xA "IMC010,Interrupu Mode Control Register(B) 010"
bitfld.byte 0xA 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xA 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xB "IMC011,Interrupu Mode Control Register(B) 011"
bitfld.byte 0xB 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xB 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xC "IMC012,Interrupu Mode Control Register(B) 012"
bitfld.byte 0xC 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xC 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xD "IMC013,Interrupu Mode Control Register(B) 013"
bitfld.byte 0xD 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xD 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xE "IMC014,Interrupu Mode Control Register(B) 014"
bitfld.byte 0xE 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xE 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xF "IMC015,Interrupu Mode Control Register(B) 015"
bitfld.byte 0xF 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xF 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x10 "IMC016,Interrupu Mode Control Register(B) 016"
bitfld.byte 0x10 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x10 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x11 "IMC017,Interrupu Mode Control Register(B) 017"
bitfld.byte 0x11 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x11 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x12 "IMC018,Interrupu Mode Control Register(B) 018"
bitfld.byte 0x12 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x12 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x13 "IMC019,Interrupu Mode Control Register(B) 019"
bitfld.byte 0x13 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x13 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x14 "IMC020,Interrupu Mode Control Register(B) 020"
bitfld.byte 0x14 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x14 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x15 "IMC021,Interrupu Mode Control Register(B) 021"
bitfld.byte 0x15 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x15 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x16 "IMC022,Interrupu Mode Control Register(B) 022"
bitfld.byte 0x16 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x16 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x17 "IMC023,Interrupu Mode Control Register(B) 023"
bitfld.byte 0x17 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x17 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x18 "IMC024,Interrupu Mode Control Register(B) 024"
bitfld.byte 0x18 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x18 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x19 "IMC025,Interrupu Mode Control Register(B) 025"
bitfld.byte 0x19 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x19 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1A "IMC026,Interrupu Mode Control Register(B) 026"
bitfld.byte 0x1A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1B "IMC027,Interrupu Mode Control Register(B) 027"
bitfld.byte 0x1B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1C "IMC028,Interrupu Mode Control Register(B) 028"
bitfld.byte 0x1C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1D "IMC029,Interrupu Mode Control Register(B) 029"
bitfld.byte 0x1D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1E "IMC030,Interrupu Mode Control Register(B) 030"
bitfld.byte 0x1E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1F "IMC031,Interrupu Mode Control Register(B) 031"
bitfld.byte 0x1F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x20 "IMC032,Interrupu Mode Control Register(B) 032"
bitfld.byte 0x20 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x20 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x21 "IMC033,Interrupt Mode Control Register(B) 033"
bitfld.byte 0x21 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x21 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x22 "IMC034,Interrupt Mode Control Register(B) 034"
bitfld.byte 0x22 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x22 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x23 "IMC035,Interrupt Mode Control Register(B) 035"
bitfld.byte 0x23 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x23 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x24 "IMC036,Interrupt Mode Control Register(B) 036"
bitfld.byte 0x24 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x24 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x25 "IMC037,Interrupt Mode Control Register(B) 037"
bitfld.byte 0x25 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x25 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x26 "IMC038,Interrupt Mode Control Register(B) 038"
bitfld.byte 0x26 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x26 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x27 "IMC039,Interrupt Mode Control Register(B) 039"
bitfld.byte 0x27 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x27 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x28 "IMC040,Interrupt Mode Control Register(B) 040"
bitfld.byte 0x28 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x28 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x29 "IMC041,Interrupt Mode Control Register(B) 041"
bitfld.byte 0x29 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x29 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2A "IMC042,Interrupt Mode Control Register(B) 042"
bitfld.byte 0x2A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2B "IMC043,Interrupt Mode Control Register(B) 043"
bitfld.byte 0x2B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2C "IMC044,Interrupt Mode Control Register(B) 044"
bitfld.byte 0x2C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2D "IMC045,Interrupt Mode Control Register(B) 045"
bitfld.byte 0x2D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2E "IMC046,Interrupt Mode Control Register(B) 046"
bitfld.byte 0x2E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2F "IMC047,Interrupt Mode Control Register(B) 047"
bitfld.byte 0x2F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x30 "IMC048,Interrupt Mode Control Register(B) 048"
bitfld.byte 0x30 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x30 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x31 "IMC049,Interrupt Mode Control Register(B) 049"
bitfld.byte 0x31 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x31 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x32 "IMC050,Interrupt Mode Control Register(B) 050"
bitfld.byte 0x32 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x32 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x33 "IMC051,Interrupt Mode Control Register(B) 051"
bitfld.byte 0x33 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x33 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x34 "IMC052,Interrupt Mode Control Register(B) 052"
bitfld.byte 0x34 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x34 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x35 "IMC053,Interrupt Mode Control Register(B) 053"
bitfld.byte 0x35 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x35 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x36 "IMC054,Interrupt Mode Control Register(B) 054"
bitfld.byte 0x36 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x36 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x37 "IMC055,Interrupt Mode Control Register(B) 055"
bitfld.byte 0x37 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x37 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x38 "IMC056,Interrupt Mode Control Register(B) 056"
bitfld.byte 0x38 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x38 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x39 "IMC057,Interrupt Mode Control Register(B) 057"
bitfld.byte 0x39 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x39 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3A "IMC058,Interrupt Mode Control Register(B) 058"
bitfld.byte 0x3A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3B "IMC059,Interrupt Mode Control Register(B) 059"
bitfld.byte 0x3B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3C "IMC060,Interrupt Mode Control Register(B) 060"
bitfld.byte 0x3C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3D "IMC061,Interrupt Mode Control Register(B) 061"
bitfld.byte 0x3D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3E "IMC062,Interrupt Mode Control Register(B) 062"
bitfld.byte 0x3E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3F "IMC063,Interrupt Mode Control Register(B) 063"
bitfld.byte 0x3F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x40 "IMC064,Interrupt Mode Control Register(B) 064"
bitfld.byte 0x40 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x40 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x41 "IMC065,Interrupt Mode Control Register(B) 065"
bitfld.byte 0x41 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x41 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x42 "IMC066,Interrupu Mode Control Register(B) 066"
bitfld.byte 0x42 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x42 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x42 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x42 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x42 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x42 0. "INTEN,INTEN" "0,1"
line.byte 0x43 "IMC067,Interrupu Mode Control Register(B) 067"
bitfld.byte 0x43 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x43 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x43 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x43 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x43 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x43 0. "INTEN,INTEN" "0,1"
line.byte 0x44 "IMC068,Interrupu Mode Control Register(B) 068"
bitfld.byte 0x44 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x44 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x44 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x44 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x44 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x44 0. "INTEN,INTEN" "0,1"
line.byte 0x45 "IMC069,Interrupu Mode Control Register(B) 069"
bitfld.byte 0x45 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x45 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x45 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x45 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x45 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x45 0. "INTEN,INTEN" "0,1"
line.byte 0x46 "IMC070,Interrupu Mode Control Register(B) 070"
bitfld.byte 0x46 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x46 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x46 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x46 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x46 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x46 0. "INTEN,INTEN" "0,1"
line.byte 0x47 "IMC071,Interrupu Mode Control Register(B) 071"
bitfld.byte 0x47 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x47 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x47 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x47 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x47 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x47 0. "INTEN,INTEN" "0,1"
group.byte 0xA9++0x3
line.byte 0x0 "IMC073,Interrupu Mode Control Register(B) 073"
bitfld.byte 0x0 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC074,Interrupu Mode Control Register(B) 074"
bitfld.byte 0x1 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x1 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x1 0. "INTEN,INTEN" "0,1"
line.byte 0x2 "IMC075,Interrupu Mode Control Register(B) 075"
bitfld.byte 0x2 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x2 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x2 0. "INTEN,INTEN" "0,1"
line.byte 0x3 "IMC076,Interrupu Mode Control Register(B) 076"
bitfld.byte 0x3 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x3 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x3 0. "INTEN,INTEN" "0,1"
group.byte 0xBE++0x2
line.byte 0x0 "IMC094,Interrupu Mode Control Register(B) 094"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC095,Interrupu Mode Control Register(B) 095"
line.byte 0x2 "IMC096,Interrupu Mode Control Register(B) 096"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "IMN (Interrupt Monitor)"
base ad:0x400F4F00
rgroup.long 0x0++0x7
line.long 0x0 "FLGNMI,Interrupt Monitor Flag 0"
bitfld.long 0x0 16. "INT016FLG,INT016FLG" "0,1"
bitfld.long 0x0 0. "INT000FLG,INT000FLG" "0,1"
line.long 0x4 "FLG1,Interrupt Monitor Flag 1"
bitfld.long 0x4 17. "INT049FLG,INT049FLG" "0,1"
bitfld.long 0x4 16. "INT048FLG,INT048FLG" "0,1"
bitfld.long 0x4 1. "INT033FLG,INT033FLG" "0,1"
bitfld.long 0x4 0. "INT032FLG,INT032FLG" "0,1"
rgroup.long 0xC++0xF
line.long 0x0 "FLG3,Interrupt Monitor Flag 3"
bitfld.long 0x0 31. "INT127FLG,INT127FLG" "0,1"
bitfld.long 0x0 30. "INT126FLG,INT126FLG" "0,1"
bitfld.long 0x0 29. "INT125FLG,INT125FLG" "0,1"
bitfld.long 0x0 28. "INT124FLG,INT124FLG" "0,1"
bitfld.long 0x0 27. "INT123FLG,INT123FLG" "0,1"
bitfld.long 0x0 26. "INT122FLG,INT122FLG" "0,1"
bitfld.long 0x0 25. "INT121FLG,INT121FLG" "0,1"
bitfld.long 0x0 24. "INT120FLG,INT120FLG" "0,1"
bitfld.long 0x0 23. "INT119FLG,INT119FLG" "0,1"
bitfld.long 0x0 22. "INT118FLG,INT118FLG" "0,1"
newline
bitfld.long 0x0 21. "INT117FLG,INT117FLG" "0,1"
bitfld.long 0x0 20. "INT116FLG,INT116FLG" "0,1"
bitfld.long 0x0 19. "INT115FLG,INT115FLG" "0,1"
bitfld.long 0x0 18. "INT114FLG,INT114FLG" "0,1"
bitfld.long 0x0 17. "INT113FLG,INT113FLG" "0,1"
bitfld.long 0x0 16. "INT112FLG,INT112FLG" "0,1"
bitfld.long 0x0 15. "INT111FLG,INT111FLG" "0,1"
bitfld.long 0x0 14. "INT110FLG,INT110FLG" "0,1"
bitfld.long 0x0 13. "INT109FLG,INT109FLG" "0,1"
bitfld.long 0x0 12. "INT108FLG,INT108FLG" "0,1"
newline
bitfld.long 0x0 11. "INT107FLG,INT107FLG" "0,1"
bitfld.long 0x0 10. "INT106FLG,INT106FLG" "0,1"
bitfld.long 0x0 9. "INT105FLG,INT105FLG" "0,1"
bitfld.long 0x0 8. "INT104FLG,INT104FLG" "0,1"
bitfld.long 0x0 7. "INT103FLG,INT103FLG" "0,1"
bitfld.long 0x0 6. "INT102FLG,INT102FLG" "0,1"
bitfld.long 0x0 5. "INT101FLG,INT101FLG" "0,1"
bitfld.long 0x0 4. "INT100FLG,INT100FLG" "0,1"
bitfld.long 0x0 1. "INT097FLG,INT097FLG" "0,1"
bitfld.long 0x0 0. "INT096FLG,INT096FLG" "0,1"
line.long 0x4 "FLG4,NMI Interrupt Monitor Flag 4"
bitfld.long 0x4 31. "INT159FLG,INT159FLG" "0,1"
bitfld.long 0x4 30. "INT158FLG,INT158FLG" "0,1"
bitfld.long 0x4 29. "INT157FLG,INT157FLG" "0,1"
bitfld.long 0x4 28. "INT156FLG,INT156FLG" "0,1"
bitfld.long 0x4 27. "INT155FLG,INT155FLG" "0,1"
bitfld.long 0x4 26. "INT154FLG,INT154FLG" "0,1"
bitfld.long 0x4 25. "INT153FLG,INT153FLG" "0,1"
bitfld.long 0x4 24. "INT152FLG,INT152FLG" "0,1"
bitfld.long 0x4 23. "INT151FLG,INT151FLG" "0,1"
bitfld.long 0x4 22. "INT150FLG,INT150FLG" "0,1"
newline
bitfld.long 0x4 21. "INT149FLG,INT149FLG" "0,1"
bitfld.long 0x4 20. "INT148FLG,INT148FLG" "0,1"
bitfld.long 0x4 19. "INT147FLG,INT147FLG" "0,1"
bitfld.long 0x4 18. "INT146FLG,INT146FLG" "0,1"
bitfld.long 0x4 17. "INT145FLG,INT145FLG" "0,1"
bitfld.long 0x4 16. "INT144FLG,INT144FLG" "0,1"
bitfld.long 0x4 15. "INT143FLG,INT143FLG" "0,1"
bitfld.long 0x4 14. "INT142FLG,INT142FLG" "0,1"
bitfld.long 0x4 13. "INT141FLG,INT141FLG" "0,1"
bitfld.long 0x4 12. "INT140FLG,INT140FLG" "0,1"
newline
bitfld.long 0x4 11. "INT139FLG,INT139FLG" "0,1"
bitfld.long 0x4 10. "INT138FLG,INT138FLG" "0,1"
bitfld.long 0x4 9. "INT137FLG,INT137FLG" "0,1"
bitfld.long 0x4 8. "INT136FLG,INT136FLG" "0,1"
bitfld.long 0x4 7. "INT135FLG,INT135FLG" "0,1"
bitfld.long 0x4 6. "INT134FLG,INT134FLG" "0,1"
bitfld.long 0x4 5. "INT133FLG,INT133FLG" "0,1"
bitfld.long 0x4 4. "INT132FLG,INT132FLG" "0,1"
bitfld.long 0x4 3. "INT131FLG,INT131FLG" "0,1"
bitfld.long 0x4 2. "INT130FLG,INT130FLG" "0,1"
newline
bitfld.long 0x4 1. "INT129FLG,INT129FLG" "0,1"
bitfld.long 0x4 0. "INT128FLG,INT128FLG" "0,1"
line.long 0x8 "FLG5,NMI Interrupt Monitor Flag 5"
bitfld.long 0x8 30. "INT190FLG,INT190FLG" "0,1"
bitfld.long 0x8 12. "INT172FLG,INT172FLG" "0,1"
bitfld.long 0x8 11. "INT171FLG,INT171FLG" "0,1"
bitfld.long 0x8 10. "INT170FLG,INT170FLG" "0,1"
bitfld.long 0x8 9. "INT169FLG,INT169FLG" "0,1"
bitfld.long 0x8 7. "INT167FLG,INT167FLG" "0,1"
bitfld.long 0x8 6. "INT166FLG,INT166FLG" "0,1"
bitfld.long 0x8 5. "INT165FLG,INT165FLG" "0,1"
bitfld.long 0x8 4. "INT164FLG,INT164FLG" "0,1"
bitfld.long 0x8 3. "INT163FLG,INT163FLG" "0,1"
newline
bitfld.long 0x8 2. "INT162FLG,INT162FLG" "0,1"
bitfld.long 0x8 1. "INT161FLG,INT161FLG" "0,1"
bitfld.long 0x8 0. "INT160FLG,INT160FLG" "0,1"
line.long 0xC "FLG6,NMI Interrupt Monitor Flag 6"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "IA (Group A)"
base ad:0x4003E000
group.byte 0x0++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(A) 00"
bitfld.byte 0x0 7. "INTNCLR,INTNCLR" "0,1"
rbitfld.byte 0x0 5. "INTNFLG,INTNFLG" "0,1"
group.byte 0x20++0x3
line.byte 0x0 "IMC00,Interrupu Mode Control Register(A) 00"
bitfld.byte 0x0 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC01,Interrupu Mode Control Register(A) 01"
bitfld.byte 0x1 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x1 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x1 0. "INTEN,INTEN" "0,1"
line.byte 0x2 "IMC02,Interrupu Mode Control Register(A) 02"
bitfld.byte 0x2 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x2 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x2 0. "INTEN,INTEN" "0,1"
line.byte 0x3 "IMC03,Interrupu Mode Control Register(A) 03"
bitfld.byte 0x3 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x3 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x3 0. "INTEN,INTEN" "0,1"
group.byte 0x30++0x1
line.byte 0x0 "IMC16,Interrupu Mode Control Register(A) 16"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC17,Interrupu Mode Control Register(A) 17"
bitfld.byte 0x1 7. "INTNCLR,INTNCLR" "0,1"
rbitfld.byte 0x1 5. "INTNFLG,INTNFLG" "0,1"
bitfld.byte 0x1 0. "INTEN,INTEN" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "IB (Group B)"
base ad:0x400F4E00
group.byte 0x10++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(B) 00"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
group.byte 0x60++0x4C
line.byte 0x0 "IMC000,Interrupu Mode Control Register(B) 000"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1 "IMC001,Interrupu Mode Control Register(B) 001"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2 "IMC002,Interrupu Mode Control Register(B) 002"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3 "IMC003,Interrupu Mode Control Register(B) 003"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x4 "IMC004,Interrupu Mode Control Register(B) 004"
bitfld.byte 0x4 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x5 "IMC005,Interrupu Mode Control Register(B) 005"
bitfld.byte 0x5 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x6 "IMC006,Interrupu Mode Control Register(B) 006"
bitfld.byte 0x6 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x6 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x7 "IMC007,Interrupu Mode Control Register(B) 007"
bitfld.byte 0x7 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x7 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x8 "IMC008,Interrupu Mode Control Register(B) 008"
bitfld.byte 0x8 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x8 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x9 "IMC009,Interrupu Mode Control Register(B) 009"
bitfld.byte 0x9 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x9 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xA "IMC010,Interrupu Mode Control Register(B) 010"
bitfld.byte 0xA 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xA 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xB "IMC011,Interrupu Mode Control Register(B) 011"
bitfld.byte 0xB 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xB 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xC "IMC012,Interrupu Mode Control Register(B) 012"
bitfld.byte 0xC 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xC 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xD "IMC013,Interrupu Mode Control Register(B) 013"
bitfld.byte 0xD 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xD 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xE "IMC014,Interrupu Mode Control Register(B) 014"
bitfld.byte 0xE 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xE 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xF "IMC015,Interrupu Mode Control Register(B) 015"
bitfld.byte 0xF 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xF 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x10 "IMC016,Interrupu Mode Control Register(B) 016"
bitfld.byte 0x10 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x10 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x11 "IMC017,Interrupu Mode Control Register(B) 017"
bitfld.byte 0x11 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x11 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x12 "IMC018,Interrupu Mode Control Register(B) 018"
bitfld.byte 0x12 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x12 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x13 "IMC019,Interrupu Mode Control Register(B) 019"
bitfld.byte 0x13 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x13 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x14 "IMC020,Interrupu Mode Control Register(B) 020"
bitfld.byte 0x14 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x14 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x15 "IMC021,Interrupu Mode Control Register(B) 021"
bitfld.byte 0x15 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x15 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x16 "IMC022,Interrupu Mode Control Register(B) 022"
bitfld.byte 0x16 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x16 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x17 "IMC023,Interrupu Mode Control Register(B) 023"
bitfld.byte 0x17 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x17 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x18 "IMC024,Interrupu Mode Control Register(B) 024"
bitfld.byte 0x18 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x18 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x19 "IMC025,Interrupu Mode Control Register(B) 025"
bitfld.byte 0x19 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x19 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1A "IMC026,Interrupu Mode Control Register(B) 026"
bitfld.byte 0x1A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1B "IMC027,Interrupu Mode Control Register(B) 027"
bitfld.byte 0x1B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1C "IMC028,Interrupu Mode Control Register(B) 028"
bitfld.byte 0x1C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1D "IMC029,Interrupu Mode Control Register(B) 029"
bitfld.byte 0x1D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1E "IMC030,Interrupu Mode Control Register(B) 030"
bitfld.byte 0x1E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1F "IMC031,Interrupu Mode Control Register(B) 031"
bitfld.byte 0x1F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x20 "IMC032,Interrupu Mode Control Register(B) 032"
bitfld.byte 0x20 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x20 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x21 "IMC033,Interrupt Mode Control Register(B) 033"
bitfld.byte 0x21 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x21 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x22 "IMC034,Interrupt Mode Control Register(B) 034"
bitfld.byte 0x22 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x22 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x23 "IMC035,Interrupt Mode Control Register(B) 035"
bitfld.byte 0x23 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x23 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x24 "IMC036,Interrupt Mode Control Register(B) 036"
bitfld.byte 0x24 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x24 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x25 "IMC037,Interrupt Mode Control Register(B) 037"
bitfld.byte 0x25 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x25 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x26 "IMC038,Interrupt Mode Control Register(B) 038"
bitfld.byte 0x26 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x26 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x27 "IMC039,Interrupt Mode Control Register(B) 039"
bitfld.byte 0x27 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x27 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x28 "IMC040,Interrupt Mode Control Register(B) 040"
bitfld.byte 0x28 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x28 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x29 "IMC041,Interrupt Mode Control Register(B) 041"
bitfld.byte 0x29 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x29 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2A "IMC042,Interrupt Mode Control Register(B) 042"
bitfld.byte 0x2A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2B "IMC043,Interrupt Mode Control Register(B) 043"
bitfld.byte 0x2B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2C "IMC044,Interrupt Mode Control Register(B) 044"
bitfld.byte 0x2C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2D "IMC045,Interrupt Mode Control Register(B) 045"
bitfld.byte 0x2D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2E "IMC046,Interrupt Mode Control Register(B) 046"
bitfld.byte 0x2E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2F "IMC047,Interrupt Mode Control Register(B) 047"
bitfld.byte 0x2F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x30 "IMC048,Interrupt Mode Control Register(B) 048"
bitfld.byte 0x30 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x30 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x31 "IMC049,Interrupt Mode Control Register(B) 049"
bitfld.byte 0x31 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x31 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x32 "IMC050,Interrupt Mode Control Register(B) 050"
bitfld.byte 0x32 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x32 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x33 "IMC051,Interrupt Mode Control Register(B) 051"
bitfld.byte 0x33 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x33 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x34 "IMC052,Interrupt Mode Control Register(B) 052"
bitfld.byte 0x34 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x34 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x35 "IMC053,Interrupt Mode Control Register(B) 053"
bitfld.byte 0x35 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x35 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x36 "IMC054,Interrupt Mode Control Register(B) 054"
bitfld.byte 0x36 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x36 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x37 "IMC055,Interrupt Mode Control Register(B) 055"
bitfld.byte 0x37 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x37 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x38 "IMC056,Interrupt Mode Control Register(B) 056"
bitfld.byte 0x38 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x38 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x39 "IMC057,Interrupt Mode Control Register(B) 057"
bitfld.byte 0x39 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x39 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3A "IMC058,Interrupt Mode Control Register(B) 058"
bitfld.byte 0x3A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3B "IMC059,Interrupt Mode Control Register(B) 059"
bitfld.byte 0x3B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3C "IMC060,Interrupt Mode Control Register(B) 060"
bitfld.byte 0x3C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3D "IMC061,Interrupt Mode Control Register(B) 061"
bitfld.byte 0x3D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3E "IMC062,Interrupt Mode Control Register(B) 062"
bitfld.byte 0x3E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3F "IMC063,Interrupt Mode Control Register(B) 063"
bitfld.byte 0x3F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x40 "IMC064,Interrupt Mode Control Register(B) 064"
bitfld.byte 0x40 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x40 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x41 "IMC065,Interrupt Mode Control Register(B) 065"
bitfld.byte 0x41 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x41 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x42 "IMC066,Interrupu Mode Control Register(B) 066"
bitfld.byte 0x42 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x42 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x42 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x42 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x42 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x42 0. "INTEN,INTEN" "0,1"
line.byte 0x43 "IMC067,Interrupu Mode Control Register(B) 067"
bitfld.byte 0x43 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x43 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x43 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x43 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x43 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x43 0. "INTEN,INTEN" "0,1"
line.byte 0x44 "IMC068,Interrupu Mode Control Register(B) 068"
bitfld.byte 0x44 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x44 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x44 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x44 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x44 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x44 0. "INTEN,INTEN" "0,1"
line.byte 0x45 "IMC069,Interrupu Mode Control Register(B) 069"
bitfld.byte 0x45 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x45 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x45 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x45 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x45 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x45 0. "INTEN,INTEN" "0,1"
line.byte 0x46 "IMC070,Interrupu Mode Control Register(B) 070"
bitfld.byte 0x46 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x46 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x46 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x46 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x46 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x46 0. "INTEN,INTEN" "0,1"
line.byte 0x47 "IMC071,Interrupu Mode Control Register(B) 071"
bitfld.byte 0x47 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x47 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x47 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x47 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x47 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x47 0. "INTEN,INTEN" "0,1"
line.byte 0x48 "IMC072,Interrupu Mode Control Register(B) 072"
bitfld.byte 0x48 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x48 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x48 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x48 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x48 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x48 0. "INTEN,INTEN" "0,1"
line.byte 0x49 "IMC073,Interrupu Mode Control Register(B) 073"
bitfld.byte 0x49 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x49 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x49 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x49 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x49 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x49 0. "INTEN,INTEN" "0,1"
line.byte 0x4A "IMC074,Interrupu Mode Control Register(B) 074"
bitfld.byte 0x4A 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4A 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4A 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4A 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4A 0. "INTEN,INTEN" "0,1"
line.byte 0x4B "IMC075,Interrupu Mode Control Register(B) 075"
bitfld.byte 0x4B 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4B 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4B 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4B 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4B 0. "INTEN,INTEN" "0,1"
line.byte 0x4C "IMC076,Interrupu Mode Control Register(B) 076"
bitfld.byte 0x4C 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4C 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4C 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4C 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4C 0. "INTEN,INTEN" "0,1"
group.byte 0xBE++0x2
line.byte 0x0 "IMC094,Interrupu Mode Control Register(B) 094"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC095,Interrupu Mode Control Register(B) 095"
line.byte 0x2 "IMC096,Interrupu Mode Control Register(B) 096"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "IMN (Interrupt Monitor)"
base ad:0x400F4F00
rgroup.long 0x0++0x7
line.long 0x0 "FLGNMI,Interrupt Monitor Flag 0"
bitfld.long 0x0 16. "INT016FLG,INT016FLG" "0,1"
bitfld.long 0x0 0. "INT000FLG,INT000FLG" "0,1"
line.long 0x4 "FLG1,Interrupt Monitor Flag 1"
bitfld.long 0x4 17. "INT049FLG,INT049FLG" "0,1"
bitfld.long 0x4 16. "INT048FLG,INT048FLG" "0,1"
bitfld.long 0x4 3. "INT035FLG,INT035FLG" "0,1"
bitfld.long 0x4 2. "INT034FLG,INT034FLG" "0,1"
bitfld.long 0x4 1. "INT033FLG,INT033FLG" "0,1"
bitfld.long 0x4 0. "INT032FLG,INT032FLG" "0,1"
rgroup.long 0xC++0xF
line.long 0x0 "FLG3,Interrupt Monitor Flag 3"
bitfld.long 0x0 31. "INT127FLG,INT127FLG" "0,1"
bitfld.long 0x0 30. "INT126FLG,INT126FLG" "0,1"
bitfld.long 0x0 29. "INT125FLG,INT125FLG" "0,1"
bitfld.long 0x0 28. "INT124FLG,INT124FLG" "0,1"
bitfld.long 0x0 27. "INT123FLG,INT123FLG" "0,1"
bitfld.long 0x0 26. "INT122FLG,INT122FLG" "0,1"
bitfld.long 0x0 25. "INT121FLG,INT121FLG" "0,1"
bitfld.long 0x0 24. "INT120FLG,INT120FLG" "0,1"
bitfld.long 0x0 23. "INT119FLG,INT119FLG" "0,1"
bitfld.long 0x0 22. "INT118FLG,INT118FLG" "0,1"
newline
bitfld.long 0x0 21. "INT117FLG,INT117FLG" "0,1"
bitfld.long 0x0 20. "INT116FLG,INT116FLG" "0,1"
bitfld.long 0x0 19. "INT115FLG,INT115FLG" "0,1"
bitfld.long 0x0 18. "INT114FLG,INT114FLG" "0,1"
bitfld.long 0x0 17. "INT113FLG,INT113FLG" "0,1"
bitfld.long 0x0 16. "INT112FLG,INT112FLG" "0,1"
bitfld.long 0x0 15. "INT111FLG,INT111FLG" "0,1"
bitfld.long 0x0 14. "INT110FLG,INT110FLG" "0,1"
bitfld.long 0x0 13. "INT109FLG,INT109FLG" "0,1"
bitfld.long 0x0 12. "INT108FLG,INT108FLG" "0,1"
newline
bitfld.long 0x0 11. "INT107FLG,INT107FLG" "0,1"
bitfld.long 0x0 10. "INT106FLG,INT106FLG" "0,1"
bitfld.long 0x0 9. "INT105FLG,INT105FLG" "0,1"
bitfld.long 0x0 8. "INT104FLG,INT104FLG" "0,1"
bitfld.long 0x0 7. "INT103FLG,INT103FLG" "0,1"
bitfld.long 0x0 6. "INT102FLG,INT102FLG" "0,1"
bitfld.long 0x0 5. "INT101FLG,INT101FLG" "0,1"
bitfld.long 0x0 4. "INT100FLG,INT100FLG" "0,1"
bitfld.long 0x0 3. "INT099FLG,INT099FLG" "0,1"
bitfld.long 0x0 2. "INT098FLG,INT098FLG" "0,1"
newline
bitfld.long 0x0 1. "INT097FLG,INT097FLG" "0,1"
bitfld.long 0x0 0. "INT096FLG,INT096FLG" "0,1"
line.long 0x4 "FLG4,NMI Interrupt Monitor Flag 4"
bitfld.long 0x4 31. "INT159FLG,INT159FLG" "0,1"
bitfld.long 0x4 30. "INT158FLG,INT158FLG" "0,1"
bitfld.long 0x4 29. "INT157FLG,INT157FLG" "0,1"
bitfld.long 0x4 28. "INT156FLG,INT156FLG" "0,1"
bitfld.long 0x4 27. "INT155FLG,INT155FLG" "0,1"
bitfld.long 0x4 26. "INT154FLG,INT154FLG" "0,1"
bitfld.long 0x4 25. "INT153FLG,INT153FLG" "0,1"
bitfld.long 0x4 24. "INT152FLG,INT152FLG" "0,1"
bitfld.long 0x4 23. "INT151FLG,INT151FLG" "0,1"
bitfld.long 0x4 22. "INT150FLG,INT150FLG" "0,1"
newline
bitfld.long 0x4 21. "INT149FLG,INT149FLG" "0,1"
bitfld.long 0x4 20. "INT148FLG,INT148FLG" "0,1"
bitfld.long 0x4 19. "INT147FLG,INT147FLG" "0,1"
bitfld.long 0x4 18. "INT146FLG,INT146FLG" "0,1"
bitfld.long 0x4 17. "INT145FLG,INT145FLG" "0,1"
bitfld.long 0x4 16. "INT144FLG,INT144FLG" "0,1"
bitfld.long 0x4 15. "INT143FLG,INT143FLG" "0,1"
bitfld.long 0x4 14. "INT142FLG,INT142FLG" "0,1"
bitfld.long 0x4 13. "INT141FLG,INT141FLG" "0,1"
bitfld.long 0x4 12. "INT140FLG,INT140FLG" "0,1"
newline
bitfld.long 0x4 11. "INT139FLG,INT139FLG" "0,1"
bitfld.long 0x4 10. "INT138FLG,INT138FLG" "0,1"
bitfld.long 0x4 9. "INT137FLG,INT137FLG" "0,1"
bitfld.long 0x4 8. "INT136FLG,INT136FLG" "0,1"
bitfld.long 0x4 7. "INT135FLG,INT135FLG" "0,1"
bitfld.long 0x4 6. "INT134FLG,INT134FLG" "0,1"
bitfld.long 0x4 5. "INT133FLG,INT133FLG" "0,1"
bitfld.long 0x4 4. "INT132FLG,INT132FLG" "0,1"
bitfld.long 0x4 3. "INT131FLG,INT131FLG" "0,1"
bitfld.long 0x4 2. "INT130FLG,INT130FLG" "0,1"
newline
bitfld.long 0x4 1. "INT129FLG,INT129FLG" "0,1"
bitfld.long 0x4 0. "INT128FLG,INT128FLG" "0,1"
line.long 0x8 "FLG5,NMI Interrupt Monitor Flag 5"
bitfld.long 0x8 30. "INT190FLG,INT190FLG" "0,1"
bitfld.long 0x8 12. "INT172FLG,INT172FLG" "0,1"
bitfld.long 0x8 11. "INT171FLG,INT171FLG" "0,1"
bitfld.long 0x8 10. "INT170FLG,INT170FLG" "0,1"
bitfld.long 0x8 9. "INT169FLG,INT169FLG" "0,1"
bitfld.long 0x8 8. "INT168FLG,INT168FLG" "0,1"
bitfld.long 0x8 7. "INT167FLG,INT167FLG" "0,1"
bitfld.long 0x8 6. "INT166FLG,INT166FLG" "0,1"
bitfld.long 0x8 5. "INT165FLG,INT165FLG" "0,1"
bitfld.long 0x8 4. "INT164FLG,INT164FLG" "0,1"
newline
bitfld.long 0x8 3. "INT163FLG,INT163FLG" "0,1"
bitfld.long 0x8 2. "INT162FLG,INT162FLG" "0,1"
bitfld.long 0x8 1. "INT161FLG,INT161FLG" "0,1"
bitfld.long 0x8 0. "INT160FLG,INT160FLG" "0,1"
line.long 0xC "FLG6,NMI Interrupt Monitor Flag 6"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "IB (Group B)"
base ad:0x400F4E00
group.byte 0x10++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(B) 00"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
group.byte 0x60++0x50
line.byte 0x0 "IMC000,Interrupu Mode Control Register(B) 000"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1 "IMC001,Interrupu Mode Control Register(B) 001"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2 "IMC002,Interrupu Mode Control Register(B) 002"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3 "IMC003,Interrupu Mode Control Register(B) 003"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x4 "IMC004,Interrupu Mode Control Register(B) 004"
bitfld.byte 0x4 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x5 "IMC005,Interrupu Mode Control Register(B) 005"
bitfld.byte 0x5 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x6 "IMC006,Interrupu Mode Control Register(B) 006"
bitfld.byte 0x6 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x6 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x7 "IMC007,Interrupu Mode Control Register(B) 007"
bitfld.byte 0x7 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x7 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x8 "IMC008,Interrupu Mode Control Register(B) 008"
bitfld.byte 0x8 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x8 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x9 "IMC009,Interrupu Mode Control Register(B) 009"
bitfld.byte 0x9 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x9 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xA "IMC010,Interrupu Mode Control Register(B) 010"
bitfld.byte 0xA 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xA 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xB "IMC011,Interrupu Mode Control Register(B) 011"
bitfld.byte 0xB 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xB 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xC "IMC012,Interrupu Mode Control Register(B) 012"
bitfld.byte 0xC 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xC 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xD "IMC013,Interrupu Mode Control Register(B) 013"
bitfld.byte 0xD 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xD 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xE "IMC014,Interrupu Mode Control Register(B) 014"
bitfld.byte 0xE 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xE 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xF "IMC015,Interrupu Mode Control Register(B) 015"
bitfld.byte 0xF 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xF 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x10 "IMC016,Interrupu Mode Control Register(B) 016"
bitfld.byte 0x10 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x10 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x11 "IMC017,Interrupu Mode Control Register(B) 017"
bitfld.byte 0x11 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x11 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x12 "IMC018,Interrupu Mode Control Register(B) 018"
bitfld.byte 0x12 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x12 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x13 "IMC019,Interrupu Mode Control Register(B) 019"
bitfld.byte 0x13 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x13 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x14 "IMC020,Interrupu Mode Control Register(B) 020"
bitfld.byte 0x14 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x14 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x15 "IMC021,Interrupu Mode Control Register(B) 021"
bitfld.byte 0x15 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x15 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x16 "IMC022,Interrupu Mode Control Register(B) 022"
bitfld.byte 0x16 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x16 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x17 "IMC023,Interrupu Mode Control Register(B) 023"
bitfld.byte 0x17 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x17 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x18 "IMC024,Interrupu Mode Control Register(B) 024"
bitfld.byte 0x18 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x18 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x19 "IMC025,Interrupu Mode Control Register(B) 025"
bitfld.byte 0x19 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x19 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1A "IMC026,Interrupu Mode Control Register(B) 026"
bitfld.byte 0x1A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1B "IMC027,Interrupu Mode Control Register(B) 027"
bitfld.byte 0x1B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1C "IMC028,Interrupu Mode Control Register(B) 028"
bitfld.byte 0x1C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1D "IMC029,Interrupu Mode Control Register(B) 029"
bitfld.byte 0x1D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1E "IMC030,Interrupu Mode Control Register(B) 030"
bitfld.byte 0x1E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1F "IMC031,Interrupu Mode Control Register(B) 031"
bitfld.byte 0x1F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x20 "IMC032,Interrupu Mode Control Register(B) 032"
bitfld.byte 0x20 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x20 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x21 "IMC033,Interrupt Mode Control Register(B) 033"
bitfld.byte 0x21 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x21 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x22 "IMC034,Interrupt Mode Control Register(B) 034"
bitfld.byte 0x22 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x22 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x23 "IMC035,Interrupt Mode Control Register(B) 035"
bitfld.byte 0x23 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x23 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x24 "IMC036,Interrupt Mode Control Register(B) 036"
bitfld.byte 0x24 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x24 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x25 "IMC037,Interrupt Mode Control Register(B) 037"
bitfld.byte 0x25 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x25 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x26 "IMC038,Interrupt Mode Control Register(B) 038"
bitfld.byte 0x26 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x26 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x27 "IMC039,Interrupt Mode Control Register(B) 039"
bitfld.byte 0x27 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x27 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x28 "IMC040,Interrupt Mode Control Register(B) 040"
bitfld.byte 0x28 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x28 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x29 "IMC041,Interrupt Mode Control Register(B) 041"
bitfld.byte 0x29 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x29 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2A "IMC042,Interrupt Mode Control Register(B) 042"
bitfld.byte 0x2A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2B "IMC043,Interrupt Mode Control Register(B) 043"
bitfld.byte 0x2B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2C "IMC044,Interrupt Mode Control Register(B) 044"
bitfld.byte 0x2C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2D "IMC045,Interrupt Mode Control Register(B) 045"
bitfld.byte 0x2D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2E "IMC046,Interrupt Mode Control Register(B) 046"
bitfld.byte 0x2E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2F "IMC047,Interrupt Mode Control Register(B) 047"
bitfld.byte 0x2F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x30 "IMC048,Interrupt Mode Control Register(B) 048"
bitfld.byte 0x30 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x30 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x31 "IMC049,Interrupt Mode Control Register(B) 049"
bitfld.byte 0x31 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x31 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x32 "IMC050,Interrupt Mode Control Register(B) 050"
bitfld.byte 0x32 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x32 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x33 "IMC051,Interrupt Mode Control Register(B) 051"
bitfld.byte 0x33 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x33 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x34 "IMC052,Interrupt Mode Control Register(B) 052"
bitfld.byte 0x34 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x34 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x35 "IMC053,Interrupt Mode Control Register(B) 053"
bitfld.byte 0x35 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x35 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x36 "IMC054,Interrupt Mode Control Register(B) 054"
bitfld.byte 0x36 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x36 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x37 "IMC055,Interrupt Mode Control Register(B) 055"
bitfld.byte 0x37 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x37 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x38 "IMC056,Interrupt Mode Control Register(B) 056"
bitfld.byte 0x38 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x38 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x39 "IMC057,Interrupt Mode Control Register(B) 057"
bitfld.byte 0x39 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x39 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3A "IMC058,Interrupt Mode Control Register(B) 058"
bitfld.byte 0x3A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3B "IMC059,Interrupt Mode Control Register(B) 059"
bitfld.byte 0x3B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3C "IMC060,Interrupt Mode Control Register(B) 060"
bitfld.byte 0x3C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3D "IMC061,Interrupt Mode Control Register(B) 061"
bitfld.byte 0x3D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3E "IMC062,Interrupt Mode Control Register(B) 062"
bitfld.byte 0x3E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3F "IMC063,Interrupt Mode Control Register(B) 063"
bitfld.byte 0x3F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x40 "IMC064,Interrupt Mode Control Register(B) 064"
bitfld.byte 0x40 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x40 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x41 "IMC065,Interrupt Mode Control Register(B) 065"
bitfld.byte 0x41 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x41 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x42 "IMC066,Interrupu Mode Control Register(B) 066"
bitfld.byte 0x42 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x42 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x42 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x42 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x42 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x42 0. "INTEN,INTEN" "0,1"
line.byte 0x43 "IMC067,Interrupu Mode Control Register(B) 067"
bitfld.byte 0x43 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x43 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x43 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x43 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x43 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x43 0. "INTEN,INTEN" "0,1"
line.byte 0x44 "IMC068,Interrupu Mode Control Register(B) 068"
bitfld.byte 0x44 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x44 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x44 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x44 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x44 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x44 0. "INTEN,INTEN" "0,1"
line.byte 0x45 "IMC069,Interrupu Mode Control Register(B) 069"
bitfld.byte 0x45 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x45 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x45 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x45 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x45 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x45 0. "INTEN,INTEN" "0,1"
line.byte 0x46 "IMC070,Interrupu Mode Control Register(B) 070"
bitfld.byte 0x46 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x46 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x46 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x46 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x46 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x46 0. "INTEN,INTEN" "0,1"
line.byte 0x47 "IMC071,Interrupu Mode Control Register(B) 071"
bitfld.byte 0x47 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x47 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x47 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x47 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x47 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x47 0. "INTEN,INTEN" "0,1"
line.byte 0x48 "IMC072,Interrupu Mode Control Register(B) 072"
bitfld.byte 0x48 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x48 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x48 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x48 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x48 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x48 0. "INTEN,INTEN" "0,1"
line.byte 0x49 "IMC073,Interrupu Mode Control Register(B) 073"
bitfld.byte 0x49 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x49 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x49 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x49 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x49 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x49 0. "INTEN,INTEN" "0,1"
line.byte 0x4A "IMC074,Interrupu Mode Control Register(B) 074"
bitfld.byte 0x4A 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4A 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4A 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4A 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4A 0. "INTEN,INTEN" "0,1"
line.byte 0x4B "IMC075,Interrupu Mode Control Register(B) 075"
bitfld.byte 0x4B 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4B 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4B 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4B 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4B 0. "INTEN,INTEN" "0,1"
line.byte 0x4C "IMC076,Interrupu Mode Control Register(B) 076"
bitfld.byte 0x4C 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4C 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4C 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4C 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4C 0. "INTEN,INTEN" "0,1"
line.byte 0x4D "IMC077,Interrupu Mode Control Register(B) 077"
bitfld.byte 0x4D 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4D 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4D 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4D 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4D 0. "INTEN,INTEN" "0,1"
line.byte 0x4E "IMC078,Interrupu Mode Control Register(B) 078"
bitfld.byte 0x4E 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4E 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4E 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4E 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4E 0. "INTEN,INTEN" "0,1"
line.byte 0x4F "IMC079,Interrupu Mode Control Register(B) 079"
bitfld.byte 0x4F 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4F 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4F 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4F 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4F 0. "INTEN,INTEN" "0,1"
line.byte 0x50 "IMC080,Interrupu Mode Control Register(B) 080"
bitfld.byte 0x50 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x50 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x50 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x50 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x50 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x50 0. "INTEN,INTEN" "0,1"
group.byte 0xBE++0x2
line.byte 0x0 "IMC094,Interrupu Mode Control Register(B) 094"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC095,Interrupu Mode Control Register(B) 095"
line.byte 0x2 "IMC096,Interrupu Mode Control Register(B) 096"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "IMN (Interrupt Monitor)"
base ad:0x400F4F00
rgroup.long 0x0++0x7
line.long 0x0 "FLGNMI,Interrupt Monitor Flag 0"
bitfld.long 0x0 16. "INT016FLG,INT016FLG" "0,1"
bitfld.long 0x0 0. "INT000FLG,INT000FLG" "0,1"
line.long 0x4 "FLG1,Interrupt Monitor Flag 1"
bitfld.long 0x4 17. "INT049FLG,INT049FLG" "0,1"
bitfld.long 0x4 16. "INT048FLG,INT048FLG" "0,1"
bitfld.long 0x4 3. "INT035FLG,INT035FLG" "0,1"
bitfld.long 0x4 2. "INT034FLG,INT034FLG" "0,1"
bitfld.long 0x4 1. "INT033FLG,INT033FLG" "0,1"
bitfld.long 0x4 0. "INT032FLG,INT032FLG" "0,1"
rgroup.long 0xC++0xF
line.long 0x0 "FLG3,Interrupt Monitor Flag 3"
bitfld.long 0x0 31. "INT127FLG,INT127FLG" "0,1"
bitfld.long 0x0 30. "INT126FLG,INT126FLG" "0,1"
bitfld.long 0x0 29. "INT125FLG,INT125FLG" "0,1"
bitfld.long 0x0 28. "INT124FLG,INT124FLG" "0,1"
bitfld.long 0x0 27. "INT123FLG,INT123FLG" "0,1"
bitfld.long 0x0 26. "INT122FLG,INT122FLG" "0,1"
bitfld.long 0x0 25. "INT121FLG,INT121FLG" "0,1"
bitfld.long 0x0 24. "INT120FLG,INT120FLG" "0,1"
bitfld.long 0x0 23. "INT119FLG,INT119FLG" "0,1"
bitfld.long 0x0 22. "INT118FLG,INT118FLG" "0,1"
newline
bitfld.long 0x0 21. "INT117FLG,INT117FLG" "0,1"
bitfld.long 0x0 20. "INT116FLG,INT116FLG" "0,1"
bitfld.long 0x0 19. "INT115FLG,INT115FLG" "0,1"
bitfld.long 0x0 18. "INT114FLG,INT114FLG" "0,1"
bitfld.long 0x0 17. "INT113FLG,INT113FLG" "0,1"
bitfld.long 0x0 16. "INT112FLG,INT112FLG" "0,1"
bitfld.long 0x0 15. "INT111FLG,INT111FLG" "0,1"
bitfld.long 0x0 14. "INT110FLG,INT110FLG" "0,1"
bitfld.long 0x0 13. "INT109FLG,INT109FLG" "0,1"
bitfld.long 0x0 12. "INT108FLG,INT108FLG" "0,1"
newline
bitfld.long 0x0 11. "INT107FLG,INT107FLG" "0,1"
bitfld.long 0x0 10. "INT106FLG,INT106FLG" "0,1"
bitfld.long 0x0 9. "INT105FLG,INT105FLG" "0,1"
bitfld.long 0x0 8. "INT104FLG,INT104FLG" "0,1"
bitfld.long 0x0 7. "INT103FLG,INT103FLG" "0,1"
bitfld.long 0x0 6. "INT102FLG,INT102FLG" "0,1"
bitfld.long 0x0 5. "INT101FLG,INT101FLG" "0,1"
bitfld.long 0x0 4. "INT100FLG,INT100FLG" "0,1"
bitfld.long 0x0 3. "INT099FLG,INT099FLG" "0,1"
bitfld.long 0x0 2. "INT098FLG,INT098FLG" "0,1"
newline
bitfld.long 0x0 1. "INT097FLG,INT097FLG" "0,1"
bitfld.long 0x0 0. "INT096FLG,INT096FLG" "0,1"
line.long 0x4 "FLG4,NMI Interrupt Monitor Flag 4"
bitfld.long 0x4 31. "INT159FLG,INT159FLG" "0,1"
bitfld.long 0x4 30. "INT158FLG,INT158FLG" "0,1"
bitfld.long 0x4 29. "INT157FLG,INT157FLG" "0,1"
bitfld.long 0x4 28. "INT156FLG,INT156FLG" "0,1"
bitfld.long 0x4 27. "INT155FLG,INT155FLG" "0,1"
bitfld.long 0x4 26. "INT154FLG,INT154FLG" "0,1"
bitfld.long 0x4 25. "INT153FLG,INT153FLG" "0,1"
bitfld.long 0x4 24. "INT152FLG,INT152FLG" "0,1"
bitfld.long 0x4 23. "INT151FLG,INT151FLG" "0,1"
bitfld.long 0x4 22. "INT150FLG,INT150FLG" "0,1"
newline
bitfld.long 0x4 21. "INT149FLG,INT149FLG" "0,1"
bitfld.long 0x4 20. "INT148FLG,INT148FLG" "0,1"
bitfld.long 0x4 19. "INT147FLG,INT147FLG" "0,1"
bitfld.long 0x4 18. "INT146FLG,INT146FLG" "0,1"
bitfld.long 0x4 17. "INT145FLG,INT145FLG" "0,1"
bitfld.long 0x4 16. "INT144FLG,INT144FLG" "0,1"
bitfld.long 0x4 15. "INT143FLG,INT143FLG" "0,1"
bitfld.long 0x4 14. "INT142FLG,INT142FLG" "0,1"
bitfld.long 0x4 13. "INT141FLG,INT141FLG" "0,1"
bitfld.long 0x4 12. "INT140FLG,INT140FLG" "0,1"
newline
bitfld.long 0x4 11. "INT139FLG,INT139FLG" "0,1"
bitfld.long 0x4 10. "INT138FLG,INT138FLG" "0,1"
bitfld.long 0x4 9. "INT137FLG,INT137FLG" "0,1"
bitfld.long 0x4 8. "INT136FLG,INT136FLG" "0,1"
bitfld.long 0x4 7. "INT135FLG,INT135FLG" "0,1"
bitfld.long 0x4 6. "INT134FLG,INT134FLG" "0,1"
bitfld.long 0x4 5. "INT133FLG,INT133FLG" "0,1"
bitfld.long 0x4 4. "INT132FLG,INT132FLG" "0,1"
bitfld.long 0x4 3. "INT131FLG,INT131FLG" "0,1"
bitfld.long 0x4 2. "INT130FLG,INT130FLG" "0,1"
newline
bitfld.long 0x4 1. "INT129FLG,INT129FLG" "0,1"
bitfld.long 0x4 0. "INT128FLG,INT128FLG" "0,1"
line.long 0x8 "FLG5,NMI Interrupt Monitor Flag 5"
bitfld.long 0x8 30. "INT190FLG,INT190FLG" "0,1"
bitfld.long 0x8 16. "INT176FLG,INT176FLG" "0,1"
bitfld.long 0x8 15. "INT175FLG,INT175FLG" "0,1"
bitfld.long 0x8 14. "INT174FLG,INT174FLG" "0,1"
bitfld.long 0x8 13. "INT173FLG,INT173FLG" "0,1"
bitfld.long 0x8 12. "INT172FLG,INT172FLG" "0,1"
bitfld.long 0x8 11. "INT171FLG,INT171FLG" "0,1"
bitfld.long 0x8 10. "INT170FLG,INT170FLG" "0,1"
bitfld.long 0x8 9. "INT169FLG,INT169FLG" "0,1"
bitfld.long 0x8 8. "INT168FLG,INT168FLG" "0,1"
newline
bitfld.long 0x8 7. "INT167FLG,INT167FLG" "0,1"
bitfld.long 0x8 6. "INT166FLG,INT166FLG" "0,1"
bitfld.long 0x8 5. "INT165FLG,INT165FLG" "0,1"
bitfld.long 0x8 4. "INT164FLG,INT164FLG" "0,1"
bitfld.long 0x8 3. "INT163FLG,INT163FLG" "0,1"
bitfld.long 0x8 2. "INT162FLG,INT162FLG" "0,1"
bitfld.long 0x8 1. "INT161FLG,INT161FLG" "0,1"
bitfld.long 0x8 0. "INT160FLG,INT160FLG" "0,1"
line.long 0xC "FLG6,NMI Interrupt Monitor Flag 6"
bitfld.long 0xC 0. "INT192FLG,INT192FLG" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
tree "IB (Group B)"
base ad:0x400F4E00
group.byte 0x10++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(B) 00"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
group.byte 0x60++0x5A
line.byte 0x0 "IMC000,Interrupu Mode Control Register(B) 000"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1 "IMC001,Interrupu Mode Control Register(B) 001"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2 "IMC002,Interrupu Mode Control Register(B) 002"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3 "IMC003,Interrupu Mode Control Register(B) 003"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x4 "IMC004,Interrupu Mode Control Register(B) 004"
bitfld.byte 0x4 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x5 "IMC005,Interrupu Mode Control Register(B) 005"
bitfld.byte 0x5 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x6 "IMC006,Interrupu Mode Control Register(B) 006"
bitfld.byte 0x6 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x6 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x7 "IMC007,Interrupu Mode Control Register(B) 007"
bitfld.byte 0x7 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x7 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x8 "IMC008,Interrupu Mode Control Register(B) 008"
bitfld.byte 0x8 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x8 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x9 "IMC009,Interrupu Mode Control Register(B) 009"
bitfld.byte 0x9 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x9 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xA "IMC010,Interrupu Mode Control Register(B) 010"
bitfld.byte 0xA 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xA 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xB "IMC011,Interrupu Mode Control Register(B) 011"
bitfld.byte 0xB 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xB 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xC "IMC012,Interrupu Mode Control Register(B) 012"
bitfld.byte 0xC 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xC 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xD "IMC013,Interrupu Mode Control Register(B) 013"
bitfld.byte 0xD 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xD 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xE "IMC014,Interrupu Mode Control Register(B) 014"
bitfld.byte 0xE 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xE 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xF "IMC015,Interrupu Mode Control Register(B) 015"
bitfld.byte 0xF 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xF 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x10 "IMC016,Interrupu Mode Control Register(B) 016"
bitfld.byte 0x10 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x10 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x11 "IMC017,Interrupu Mode Control Register(B) 017"
bitfld.byte 0x11 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x11 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x12 "IMC018,Interrupu Mode Control Register(B) 018"
bitfld.byte 0x12 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x12 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x13 "IMC019,Interrupu Mode Control Register(B) 019"
bitfld.byte 0x13 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x13 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x14 "IMC020,Interrupu Mode Control Register(B) 020"
bitfld.byte 0x14 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x14 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x15 "IMC021,Interrupu Mode Control Register(B) 021"
bitfld.byte 0x15 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x15 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x16 "IMC022,Interrupu Mode Control Register(B) 022"
bitfld.byte 0x16 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x16 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x17 "IMC023,Interrupu Mode Control Register(B) 023"
bitfld.byte 0x17 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x17 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x18 "IMC024,Interrupu Mode Control Register(B) 024"
bitfld.byte 0x18 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x18 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x19 "IMC025,Interrupu Mode Control Register(B) 025"
bitfld.byte 0x19 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x19 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1A "IMC026,Interrupu Mode Control Register(B) 026"
bitfld.byte 0x1A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1B "IMC027,Interrupu Mode Control Register(B) 027"
bitfld.byte 0x1B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1C "IMC028,Interrupu Mode Control Register(B) 028"
bitfld.byte 0x1C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1D "IMC029,Interrupu Mode Control Register(B) 029"
bitfld.byte 0x1D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1E "IMC030,Interrupu Mode Control Register(B) 030"
bitfld.byte 0x1E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1F "IMC031,Interrupu Mode Control Register(B) 031"
bitfld.byte 0x1F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x20 "IMC032,Interrupu Mode Control Register(B) 032"
bitfld.byte 0x20 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x20 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x21 "IMC033,Interrupt Mode Control Register(B) 033"
bitfld.byte 0x21 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x21 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x22 "IMC034,Interrupt Mode Control Register(B) 034"
bitfld.byte 0x22 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x22 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x23 "IMC035,Interrupt Mode Control Register(B) 035"
bitfld.byte 0x23 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x23 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x24 "IMC036,Interrupt Mode Control Register(B) 036"
bitfld.byte 0x24 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x24 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x25 "IMC037,Interrupt Mode Control Register(B) 037"
bitfld.byte 0x25 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x25 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x26 "IMC038,Interrupt Mode Control Register(B) 038"
bitfld.byte 0x26 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x26 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x27 "IMC039,Interrupt Mode Control Register(B) 039"
bitfld.byte 0x27 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x27 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x28 "IMC040,Interrupt Mode Control Register(B) 040"
bitfld.byte 0x28 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x28 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x29 "IMC041,Interrupt Mode Control Register(B) 041"
bitfld.byte 0x29 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x29 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2A "IMC042,Interrupt Mode Control Register(B) 042"
bitfld.byte 0x2A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2B "IMC043,Interrupt Mode Control Register(B) 043"
bitfld.byte 0x2B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2C "IMC044,Interrupt Mode Control Register(B) 044"
bitfld.byte 0x2C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2D "IMC045,Interrupt Mode Control Register(B) 045"
bitfld.byte 0x2D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2E "IMC046,Interrupt Mode Control Register(B) 046"
bitfld.byte 0x2E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2F "IMC047,Interrupt Mode Control Register(B) 047"
bitfld.byte 0x2F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x30 "IMC048,Interrupt Mode Control Register(B) 048"
bitfld.byte 0x30 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x30 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x31 "IMC049,Interrupt Mode Control Register(B) 049"
bitfld.byte 0x31 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x31 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x32 "IMC050,Interrupt Mode Control Register(B) 050"
bitfld.byte 0x32 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x32 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x33 "IMC051,Interrupt Mode Control Register(B) 051"
bitfld.byte 0x33 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x33 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x34 "IMC052,Interrupt Mode Control Register(B) 052"
bitfld.byte 0x34 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x34 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x35 "IMC053,Interrupt Mode Control Register(B) 053"
bitfld.byte 0x35 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x35 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x36 "IMC054,Interrupt Mode Control Register(B) 054"
bitfld.byte 0x36 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x36 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x37 "IMC055,Interrupt Mode Control Register(B) 055"
bitfld.byte 0x37 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x37 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x38 "IMC056,Interrupt Mode Control Register(B) 056"
bitfld.byte 0x38 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x38 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x39 "IMC057,Interrupt Mode Control Register(B) 057"
bitfld.byte 0x39 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x39 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3A "IMC058,Interrupt Mode Control Register(B) 058"
bitfld.byte 0x3A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3B "IMC059,Interrupt Mode Control Register(B) 059"
bitfld.byte 0x3B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3C "IMC060,Interrupt Mode Control Register(B) 060"
bitfld.byte 0x3C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3D "IMC061,Interrupt Mode Control Register(B) 061"
bitfld.byte 0x3D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3E "IMC062,Interrupt Mode Control Register(B) 062"
bitfld.byte 0x3E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3F "IMC063,Interrupt Mode Control Register(B) 063"
bitfld.byte 0x3F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x40 "IMC064,Interrupt Mode Control Register(B) 064"
bitfld.byte 0x40 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x40 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x41 "IMC065,Interrupt Mode Control Register(B) 065"
bitfld.byte 0x41 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x41 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x42 "IMC066,Interrupu Mode Control Register(B) 066"
bitfld.byte 0x42 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x42 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x42 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x42 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x42 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x42 0. "INTEN,INTEN" "0,1"
line.byte 0x43 "IMC067,Interrupu Mode Control Register(B) 067"
bitfld.byte 0x43 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x43 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x43 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x43 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x43 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x43 0. "INTEN,INTEN" "0,1"
line.byte 0x44 "IMC068,Interrupu Mode Control Register(B) 068"
bitfld.byte 0x44 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x44 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x44 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x44 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x44 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x44 0. "INTEN,INTEN" "0,1"
line.byte 0x45 "IMC069,Interrupu Mode Control Register(B) 069"
bitfld.byte 0x45 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x45 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x45 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x45 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x45 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x45 0. "INTEN,INTEN" "0,1"
line.byte 0x46 "IMC070,Interrupu Mode Control Register(B) 070"
bitfld.byte 0x46 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x46 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x46 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x46 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x46 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x46 0. "INTEN,INTEN" "0,1"
line.byte 0x47 "IMC071,Interrupu Mode Control Register(B) 071"
bitfld.byte 0x47 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x47 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x47 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x47 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x47 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x47 0. "INTEN,INTEN" "0,1"
line.byte 0x48 "IMC072,Interrupu Mode Control Register(B) 072"
bitfld.byte 0x48 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x48 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x48 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x48 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x48 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x48 0. "INTEN,INTEN" "0,1"
line.byte 0x49 "IMC073,Interrupu Mode Control Register(B) 073"
bitfld.byte 0x49 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x49 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x49 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x49 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x49 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x49 0. "INTEN,INTEN" "0,1"
line.byte 0x4A "IMC074,Interrupu Mode Control Register(B) 074"
bitfld.byte 0x4A 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4A 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4A 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4A 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4A 0. "INTEN,INTEN" "0,1"
line.byte 0x4B "IMC075,Interrupu Mode Control Register(B) 075"
bitfld.byte 0x4B 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4B 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4B 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4B 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4B 0. "INTEN,INTEN" "0,1"
line.byte 0x4C "IMC076,Interrupu Mode Control Register(B) 076"
bitfld.byte 0x4C 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4C 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4C 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4C 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4C 0. "INTEN,INTEN" "0,1"
line.byte 0x4D "IMC077,Interrupu Mode Control Register(B) 077"
bitfld.byte 0x4D 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4D 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4D 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4D 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4D 0. "INTEN,INTEN" "0,1"
line.byte 0x4E "IMC078,Interrupu Mode Control Register(B) 078"
bitfld.byte 0x4E 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4E 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4E 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4E 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4E 0. "INTEN,INTEN" "0,1"
line.byte 0x4F "IMC079,Interrupu Mode Control Register(B) 079"
bitfld.byte 0x4F 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4F 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4F 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4F 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4F 0. "INTEN,INTEN" "0,1"
line.byte 0x50 "IMC080,Interrupu Mode Control Register(B) 080"
bitfld.byte 0x50 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x50 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x50 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x50 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x50 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x50 0. "INTEN,INTEN" "0,1"
line.byte 0x51 "IMC081,Interrupu Mode Control Register(B) 081"
bitfld.byte 0x51 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x51 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x51 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x51 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x51 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x51 0. "INTEN,INTEN" "0,1"
line.byte 0x52 "IMC082,Interrupu Mode Control Register(B) 082"
bitfld.byte 0x52 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x52 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x52 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x52 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x52 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x52 0. "INTEN,INTEN" "0,1"
line.byte 0x53 "IMC083,Interrupu Mode Control Register(B) 083"
bitfld.byte 0x53 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x53 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x53 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x53 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x53 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x53 0. "INTEN,INTEN" "0,1"
line.byte 0x54 "IMC084,Interrupu Mode Control Register(B) 084"
bitfld.byte 0x54 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x54 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x54 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x54 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x54 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x54 0. "INTEN,INTEN" "0,1"
line.byte 0x55 "IMC085,Interrupu Mode Control Register(B) 085"
bitfld.byte 0x55 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x55 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x55 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x55 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x55 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x55 0. "INTEN,INTEN" "0,1"
line.byte 0x56 "IMC086,Interrupu Mode Control Register(B) 086"
bitfld.byte 0x56 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x56 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x56 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x56 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x56 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x56 0. "INTEN,INTEN" "0,1"
line.byte 0x57 "IMC087,Interrupu Mode Control Register(B) 087"
bitfld.byte 0x57 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x57 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x57 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x57 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x57 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x57 0. "INTEN,INTEN" "0,1"
line.byte 0x58 "IMC088,Interrupu Mode Control Register(B) 088"
bitfld.byte 0x58 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x58 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x58 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x58 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x58 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x58 0. "INTEN,INTEN" "0,1"
line.byte 0x59 "IMC089,Interrupu Mode Control Register(B) 089"
bitfld.byte 0x59 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x59 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x59 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x59 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x59 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x59 0. "INTEN,INTEN" "0,1"
line.byte 0x5A "IMC090,Interrupu Mode Control Register(B) 090"
bitfld.byte 0x5A 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x5A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5A 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x5A 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5A 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x5A 0. "INTEN,INTEN" "0,1"
group.byte 0xBE++0x2
line.byte 0x0 "IMC094,Interrupu Mode Control Register(B) 094"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x0 0. "INTEN,INTEN" "0,1"
line.byte 0x1 "IMC095,Interrupu Mode Control Register(B) 095"
line.byte 0x2 "IMC096,Interrupu Mode Control Register(B) 096"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
tree "IMN (Interrupt Monitor)"
base ad:0x400F4F00
rgroup.long 0x0++0x7
line.long 0x0 "FLGNMI,Interrupt Monitor Flag 0"
bitfld.long 0x0 16. "INT016FLG,INT016FLG" "0,1"
bitfld.long 0x0 0. "INT000FLG,INT000FLG" "0,1"
line.long 0x4 "FLG1,Interrupt Monitor Flag 1"
bitfld.long 0x4 17. "INT049FLG,INT049FLG" "0,1"
bitfld.long 0x4 16. "INT048FLG,INT048FLG" "0,1"
bitfld.long 0x4 3. "INT035FLG,INT035FLG" "0,1"
bitfld.long 0x4 2. "INT034FLG,INT034FLG" "0,1"
bitfld.long 0x4 1. "INT033FLG,INT033FLG" "0,1"
bitfld.long 0x4 0. "INT032FLG,INT032FLG" "0,1"
rgroup.long 0xC++0xF
line.long 0x0 "FLG3,Interrupt Monitor Flag 3"
bitfld.long 0x0 31. "INT127FLG,INT127FLG" "0,1"
bitfld.long 0x0 30. "INT126FLG,INT126FLG" "0,1"
bitfld.long 0x0 29. "INT125FLG,INT125FLG" "0,1"
bitfld.long 0x0 28. "INT124FLG,INT124FLG" "0,1"
bitfld.long 0x0 27. "INT123FLG,INT123FLG" "0,1"
bitfld.long 0x0 26. "INT122FLG,INT122FLG" "0,1"
bitfld.long 0x0 25. "INT121FLG,INT121FLG" "0,1"
bitfld.long 0x0 24. "INT120FLG,INT120FLG" "0,1"
bitfld.long 0x0 23. "INT119FLG,INT119FLG" "0,1"
bitfld.long 0x0 22. "INT118FLG,INT118FLG" "0,1"
newline
bitfld.long 0x0 21. "INT117FLG,INT117FLG" "0,1"
bitfld.long 0x0 20. "INT116FLG,INT116FLG" "0,1"
bitfld.long 0x0 19. "INT115FLG,INT115FLG" "0,1"
bitfld.long 0x0 18. "INT114FLG,INT114FLG" "0,1"
bitfld.long 0x0 17. "INT113FLG,INT113FLG" "0,1"
bitfld.long 0x0 16. "INT112FLG,INT112FLG" "0,1"
bitfld.long 0x0 15. "INT111FLG,INT111FLG" "0,1"
bitfld.long 0x0 14. "INT110FLG,INT110FLG" "0,1"
bitfld.long 0x0 13. "INT109FLG,INT109FLG" "0,1"
bitfld.long 0x0 12. "INT108FLG,INT108FLG" "0,1"
newline
bitfld.long 0x0 11. "INT107FLG,INT107FLG" "0,1"
bitfld.long 0x0 10. "INT106FLG,INT106FLG" "0,1"
bitfld.long 0x0 9. "INT105FLG,INT105FLG" "0,1"
bitfld.long 0x0 8. "INT104FLG,INT104FLG" "0,1"
bitfld.long 0x0 7. "INT103FLG,INT103FLG" "0,1"
bitfld.long 0x0 6. "INT102FLG,INT102FLG" "0,1"
bitfld.long 0x0 5. "INT101FLG,INT101FLG" "0,1"
bitfld.long 0x0 4. "INT100FLG,INT100FLG" "0,1"
bitfld.long 0x0 3. "INT099FLG,INT099FLG" "0,1"
bitfld.long 0x0 2. "INT098FLG,INT098FLG" "0,1"
newline
bitfld.long 0x0 1. "INT097FLG,INT097FLG" "0,1"
bitfld.long 0x0 0. "INT096FLG,INT096FLG" "0,1"
line.long 0x4 "FLG4,NMI Interrupt Monitor Flag 4"
bitfld.long 0x4 31. "INT159FLG,INT159FLG" "0,1"
bitfld.long 0x4 30. "INT158FLG,INT158FLG" "0,1"
bitfld.long 0x4 29. "INT157FLG,INT157FLG" "0,1"
bitfld.long 0x4 28. "INT156FLG,INT156FLG" "0,1"
bitfld.long 0x4 27. "INT155FLG,INT155FLG" "0,1"
bitfld.long 0x4 26. "INT154FLG,INT154FLG" "0,1"
bitfld.long 0x4 25. "INT153FLG,INT153FLG" "0,1"
bitfld.long 0x4 24. "INT152FLG,INT152FLG" "0,1"
bitfld.long 0x4 23. "INT151FLG,INT151FLG" "0,1"
bitfld.long 0x4 22. "INT150FLG,INT150FLG" "0,1"
newline
bitfld.long 0x4 21. "INT149FLG,INT149FLG" "0,1"
bitfld.long 0x4 20. "INT148FLG,INT148FLG" "0,1"
bitfld.long 0x4 19. "INT147FLG,INT147FLG" "0,1"
bitfld.long 0x4 18. "INT146FLG,INT146FLG" "0,1"
bitfld.long 0x4 17. "INT145FLG,INT145FLG" "0,1"
bitfld.long 0x4 16. "INT144FLG,INT144FLG" "0,1"
bitfld.long 0x4 15. "INT143FLG,INT143FLG" "0,1"
bitfld.long 0x4 14. "INT142FLG,INT142FLG" "0,1"
bitfld.long 0x4 13. "INT141FLG,INT141FLG" "0,1"
bitfld.long 0x4 12. "INT140FLG,INT140FLG" "0,1"
newline
bitfld.long 0x4 11. "INT139FLG,INT139FLG" "0,1"
bitfld.long 0x4 10. "INT138FLG,INT138FLG" "0,1"
bitfld.long 0x4 9. "INT137FLG,INT137FLG" "0,1"
bitfld.long 0x4 8. "INT136FLG,INT136FLG" "0,1"
bitfld.long 0x4 7. "INT135FLG,INT135FLG" "0,1"
bitfld.long 0x4 6. "INT134FLG,INT134FLG" "0,1"
bitfld.long 0x4 5. "INT133FLG,INT133FLG" "0,1"
bitfld.long 0x4 4. "INT132FLG,INT132FLG" "0,1"
bitfld.long 0x4 3. "INT131FLG,INT131FLG" "0,1"
bitfld.long 0x4 2. "INT130FLG,INT130FLG" "0,1"
newline
bitfld.long 0x4 1. "INT129FLG,INT129FLG" "0,1"
bitfld.long 0x4 0. "INT128FLG,INT128FLG" "0,1"
line.long 0x8 "FLG5,NMI Interrupt Monitor Flag 5"
bitfld.long 0x8 30. "INT190FLG,INT190FLG" "0,1"
bitfld.long 0x8 26. "INT186FLG,INT186FLG" "0,1"
bitfld.long 0x8 25. "INT185FLG,INT185FLG" "0,1"
bitfld.long 0x8 24. "INT184FLG,INT184FLG" "0,1"
bitfld.long 0x8 23. "INT183FLG,INT183FLG" "0,1"
bitfld.long 0x8 22. "INT182FLG,INT182FLG" "0,1"
bitfld.long 0x8 21. "INT181FLG,INT181FLG" "0,1"
bitfld.long 0x8 20. "INT180FLG,INT180FLG" "0,1"
bitfld.long 0x8 19. "INT179FLG,INT179FLG" "0,1"
bitfld.long 0x8 18. "INT178FLG,INT178FLG" "0,1"
newline
bitfld.long 0x8 17. "INT177FLG,INT177FLG" "0,1"
bitfld.long 0x8 16. "INT176FLG,INT176FLG" "0,1"
bitfld.long 0x8 15. "INT175FLG,INT175FLG" "0,1"
bitfld.long 0x8 14. "INT174FLG,INT174FLG" "0,1"
bitfld.long 0x8 13. "INT173FLG,INT173FLG" "0,1"
bitfld.long 0x8 12. "INT172FLG,INT172FLG" "0,1"
bitfld.long 0x8 11. "INT171FLG,INT171FLG" "0,1"
bitfld.long 0x8 10. "INT170FLG,INT170FLG" "0,1"
bitfld.long 0x8 9. "INT169FLG,INT169FLG" "0,1"
bitfld.long 0x8 8. "INT168FLG,INT168FLG" "0,1"
newline
bitfld.long 0x8 7. "INT167FLG,INT167FLG" "0,1"
bitfld.long 0x8 6. "INT166FLG,INT166FLG" "0,1"
bitfld.long 0x8 5. "INT165FLG,INT165FLG" "0,1"
bitfld.long 0x8 4. "INT164FLG,INT164FLG" "0,1"
bitfld.long 0x8 3. "INT163FLG,INT163FLG" "0,1"
bitfld.long 0x8 2. "INT162FLG,INT162FLG" "0,1"
bitfld.long 0x8 1. "INT161FLG,INT161FLG" "0,1"
bitfld.long 0x8 0. "INT160FLG,INT160FLG" "0,1"
line.long 0xC "FLG6,NMI Interrupt Monitor Flag 6"
bitfld.long 0xC 0. "INT192FLG,INT192FLG" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "IB (Group B)"
base ad:0x400F4E00
group.byte 0x10++0x0
line.byte 0x0 "NIC00,Non makeable Interrupt Control(B) 00"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
group.byte 0x60++0x60
line.byte 0x0 "IMC000,Interrupu Mode Control Register(B) 000"
bitfld.byte 0x0 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x0 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1 "IMC001,Interrupu Mode Control Register(B) 001"
bitfld.byte 0x1 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2 "IMC002,Interrupu Mode Control Register(B) 002"
bitfld.byte 0x2 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3 "IMC003,Interrupu Mode Control Register(B) 003"
bitfld.byte 0x3 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x4 "IMC004,Interrupu Mode Control Register(B) 004"
bitfld.byte 0x4 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x5 "IMC005,Interrupu Mode Control Register(B) 005"
bitfld.byte 0x5 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x6 "IMC006,Interrupu Mode Control Register(B) 006"
bitfld.byte 0x6 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x6 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x7 "IMC007,Interrupu Mode Control Register(B) 007"
bitfld.byte 0x7 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x7 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x8 "IMC008,Interrupu Mode Control Register(B) 008"
bitfld.byte 0x8 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x8 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x9 "IMC009,Interrupu Mode Control Register(B) 009"
bitfld.byte 0x9 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x9 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xA "IMC010,Interrupu Mode Control Register(B) 010"
bitfld.byte 0xA 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xA 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xB "IMC011,Interrupu Mode Control Register(B) 011"
bitfld.byte 0xB 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xB 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xC "IMC012,Interrupu Mode Control Register(B) 012"
bitfld.byte 0xC 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xC 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xD "IMC013,Interrupu Mode Control Register(B) 013"
bitfld.byte 0xD 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xD 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xE "IMC014,Interrupu Mode Control Register(B) 014"
bitfld.byte 0xE 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xE 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0xF "IMC015,Interrupu Mode Control Register(B) 015"
bitfld.byte 0xF 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0xF 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x10 "IMC016,Interrupu Mode Control Register(B) 016"
bitfld.byte 0x10 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x10 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x11 "IMC017,Interrupu Mode Control Register(B) 017"
bitfld.byte 0x11 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x11 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x12 "IMC018,Interrupu Mode Control Register(B) 018"
bitfld.byte 0x12 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x12 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x13 "IMC019,Interrupu Mode Control Register(B) 019"
bitfld.byte 0x13 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x13 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x14 "IMC020,Interrupu Mode Control Register(B) 020"
bitfld.byte 0x14 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x14 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x15 "IMC021,Interrupu Mode Control Register(B) 021"
bitfld.byte 0x15 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x15 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x16 "IMC022,Interrupu Mode Control Register(B) 022"
bitfld.byte 0x16 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x16 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x17 "IMC023,Interrupu Mode Control Register(B) 023"
bitfld.byte 0x17 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x17 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x18 "IMC024,Interrupu Mode Control Register(B) 024"
bitfld.byte 0x18 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x18 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x19 "IMC025,Interrupu Mode Control Register(B) 025"
bitfld.byte 0x19 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x19 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1A "IMC026,Interrupu Mode Control Register(B) 026"
bitfld.byte 0x1A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1B "IMC027,Interrupu Mode Control Register(B) 027"
bitfld.byte 0x1B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1C "IMC028,Interrupu Mode Control Register(B) 028"
bitfld.byte 0x1C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1D "IMC029,Interrupu Mode Control Register(B) 029"
bitfld.byte 0x1D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1E "IMC030,Interrupu Mode Control Register(B) 030"
bitfld.byte 0x1E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x1F "IMC031,Interrupu Mode Control Register(B) 031"
bitfld.byte 0x1F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x1F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x20 "IMC032,Interrupu Mode Control Register(B) 032"
bitfld.byte 0x20 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x20 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x21 "IMC033,Interrupt Mode Control Register(B) 033"
bitfld.byte 0x21 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x21 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x22 "IMC034,Interrupt Mode Control Register(B) 034"
bitfld.byte 0x22 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x22 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x23 "IMC035,Interrupt Mode Control Register(B) 035"
bitfld.byte 0x23 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x23 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x24 "IMC036,Interrupt Mode Control Register(B) 036"
bitfld.byte 0x24 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x24 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x25 "IMC037,Interrupt Mode Control Register(B) 037"
bitfld.byte 0x25 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x25 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x26 "IMC038,Interrupt Mode Control Register(B) 038"
bitfld.byte 0x26 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x26 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x27 "IMC039,Interrupt Mode Control Register(B) 039"
bitfld.byte 0x27 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x27 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x28 "IMC040,Interrupt Mode Control Register(B) 040"
bitfld.byte 0x28 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x28 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x29 "IMC041,Interrupt Mode Control Register(B) 041"
bitfld.byte 0x29 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x29 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2A "IMC042,Interrupt Mode Control Register(B) 042"
bitfld.byte 0x2A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2B "IMC043,Interrupt Mode Control Register(B) 043"
bitfld.byte 0x2B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2C "IMC044,Interrupt Mode Control Register(B) 044"
bitfld.byte 0x2C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2D "IMC045,Interrupt Mode Control Register(B) 045"
bitfld.byte 0x2D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2E "IMC046,Interrupt Mode Control Register(B) 046"
bitfld.byte 0x2E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x2F "IMC047,Interrupt Mode Control Register(B) 047"
bitfld.byte 0x2F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x2F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x30 "IMC048,Interrupt Mode Control Register(B) 048"
bitfld.byte 0x30 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x30 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x31 "IMC049,Interrupt Mode Control Register(B) 049"
bitfld.byte 0x31 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x31 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x32 "IMC050,Interrupt Mode Control Register(B) 050"
bitfld.byte 0x32 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x32 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x33 "IMC051,Interrupt Mode Control Register(B) 051"
bitfld.byte 0x33 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x33 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x34 "IMC052,Interrupt Mode Control Register(B) 052"
bitfld.byte 0x34 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x34 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x35 "IMC053,Interrupt Mode Control Register(B) 053"
bitfld.byte 0x35 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x35 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x36 "IMC054,Interrupt Mode Control Register(B) 054"
bitfld.byte 0x36 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x36 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x37 "IMC055,Interrupt Mode Control Register(B) 055"
bitfld.byte 0x37 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x37 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x38 "IMC056,Interrupt Mode Control Register(B) 056"
bitfld.byte 0x38 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x38 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x39 "IMC057,Interrupt Mode Control Register(B) 057"
bitfld.byte 0x39 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x39 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3A "IMC058,Interrupt Mode Control Register(B) 058"
bitfld.byte 0x3A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3A 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3B "IMC059,Interrupt Mode Control Register(B) 059"
bitfld.byte 0x3B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3B 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3C "IMC060,Interrupt Mode Control Register(B) 060"
bitfld.byte 0x3C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3C 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3D "IMC061,Interrupt Mode Control Register(B) 061"
bitfld.byte 0x3D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3D 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3E "IMC062,Interrupt Mode Control Register(B) 062"
bitfld.byte 0x3E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3E 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x3F "IMC063,Interrupt Mode Control Register(B) 063"
bitfld.byte 0x3F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x3F 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x40 "IMC064,Interrupt Mode Control Register(B) 064"
bitfld.byte 0x40 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x40 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x41 "IMC065,Interrupt Mode Control Register(B) 065"
bitfld.byte 0x41 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x41 4. "INTPFLG,INTPFLG" "0,1"
line.byte 0x42 "IMC066,Interrupu Mode Control Register(B) 066"
bitfld.byte 0x42 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x42 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x42 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x42 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x42 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x42 0. "INTEN,INTEN" "0,1"
line.byte 0x43 "IMC067,Interrupu Mode Control Register(B) 067"
bitfld.byte 0x43 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x43 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x43 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x43 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x43 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x43 0. "INTEN,INTEN" "0,1"
line.byte 0x44 "IMC068,Interrupu Mode Control Register(B) 068"
bitfld.byte 0x44 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x44 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x44 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x44 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x44 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x44 0. "INTEN,INTEN" "0,1"
line.byte 0x45 "IMC069,Interrupu Mode Control Register(B) 069"
bitfld.byte 0x45 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x45 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x45 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x45 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x45 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x45 0. "INTEN,INTEN" "0,1"
line.byte 0x46 "IMC070,Interrupu Mode Control Register(B) 070"
bitfld.byte 0x46 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x46 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x46 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x46 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x46 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x46 0. "INTEN,INTEN" "0,1"
line.byte 0x47 "IMC071,Interrupu Mode Control Register(B) 071"
bitfld.byte 0x47 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x47 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x47 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x47 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x47 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x47 0. "INTEN,INTEN" "0,1"
line.byte 0x48 "IMC072,Interrupu Mode Control Register(B) 072"
bitfld.byte 0x48 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x48 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x48 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x48 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x48 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x48 0. "INTEN,INTEN" "0,1"
line.byte 0x49 "IMC073,Interrupu Mode Control Register(B) 073"
bitfld.byte 0x49 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x49 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x49 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x49 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x49 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x49 0. "INTEN,INTEN" "0,1"
line.byte 0x4A "IMC074,Interrupu Mode Control Register(B) 074"
bitfld.byte 0x4A 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4A 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4A 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4A 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4A 0. "INTEN,INTEN" "0,1"
line.byte 0x4B "IMC075,Interrupu Mode Control Register(B) 075"
bitfld.byte 0x4B 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4B 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4B 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4B 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4B 0. "INTEN,INTEN" "0,1"
line.byte 0x4C "IMC076,Interrupu Mode Control Register(B) 076"
bitfld.byte 0x4C 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4C 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4C 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4C 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4C 0. "INTEN,INTEN" "0,1"
line.byte 0x4D "IMC077,Interrupu Mode Control Register(B) 077"
bitfld.byte 0x4D 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4D 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4D 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4D 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4D 0. "INTEN,INTEN" "0,1"
line.byte 0x4E "IMC078,Interrupu Mode Control Register(B) 078"
bitfld.byte 0x4E 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4E 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4E 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4E 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4E 0. "INTEN,INTEN" "0,1"
line.byte 0x4F "IMC079,Interrupu Mode Control Register(B) 079"
bitfld.byte 0x4F 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x4F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x4F 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x4F 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x4F 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x4F 0. "INTEN,INTEN" "0,1"
line.byte 0x50 "IMC080,Interrupu Mode Control Register(B) 080"
bitfld.byte 0x50 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x50 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x50 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x50 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x50 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x50 0. "INTEN,INTEN" "0,1"
line.byte 0x51 "IMC081,Interrupu Mode Control Register(B) 081"
bitfld.byte 0x51 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x51 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x51 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x51 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x51 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x51 0. "INTEN,INTEN" "0,1"
line.byte 0x52 "IMC082,Interrupu Mode Control Register(B) 082"
bitfld.byte 0x52 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x52 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x52 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x52 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x52 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x52 0. "INTEN,INTEN" "0,1"
line.byte 0x53 "IMC083,Interrupu Mode Control Register(B) 083"
bitfld.byte 0x53 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x53 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x53 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x53 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x53 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x53 0. "INTEN,INTEN" "0,1"
line.byte 0x54 "IMC084,Interrupu Mode Control Register(B) 084"
bitfld.byte 0x54 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x54 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x54 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x54 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x54 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x54 0. "INTEN,INTEN" "0,1"
line.byte 0x55 "IMC085,Interrupu Mode Control Register(B) 085"
bitfld.byte 0x55 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x55 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x55 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x55 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x55 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x55 0. "INTEN,INTEN" "0,1"
line.byte 0x56 "IMC086,Interrupu Mode Control Register(B) 086"
bitfld.byte 0x56 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x56 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x56 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x56 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x56 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x56 0. "INTEN,INTEN" "0,1"
line.byte 0x57 "IMC087,Interrupu Mode Control Register(B) 087"
bitfld.byte 0x57 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x57 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x57 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x57 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x57 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x57 0. "INTEN,INTEN" "0,1"
line.byte 0x58 "IMC088,Interrupu Mode Control Register(B) 088"
bitfld.byte 0x58 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x58 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x58 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x58 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x58 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x58 0. "INTEN,INTEN" "0,1"
line.byte 0x59 "IMC089,Interrupu Mode Control Register(B) 089"
bitfld.byte 0x59 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x59 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x59 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x59 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x59 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x59 0. "INTEN,INTEN" "0,1"
line.byte 0x5A "IMC090,Interrupu Mode Control Register(B) 090"
bitfld.byte 0x5A 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x5A 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5A 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x5A 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5A 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x5A 0. "INTEN,INTEN" "0,1"
line.byte 0x5B "IMC091,Interrupu Mode Control Register(B) 091"
bitfld.byte 0x5B 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x5B 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5B 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x5B 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5B 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x5B 0. "INTEN,INTEN" "0,1"
line.byte 0x5C "IMC092,Interrupu Mode Control Register(B) 092"
bitfld.byte 0x5C 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x5C 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5C 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x5C 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5C 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x5C 0. "INTEN,INTEN" "0,1"
line.byte 0x5D "IMC093,Interrupu Mode Control Register(B) 093"
bitfld.byte 0x5D 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x5D 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5D 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x5D 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5D 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x5D 0. "INTEN,INTEN" "0,1"
line.byte 0x5E "IMC094,Interrupu Mode Control Register(B) 094"
bitfld.byte 0x5E 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5E 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5E 0. "INTEN,INTEN" "0,1"
line.byte 0x5F "IMC095,Interrupu Mode Control Register(B) 095"
bitfld.byte 0x5F 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x5F 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x5F 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x5F 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x5F 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x5F 0. "INTEN,INTEN" "0,1"
line.byte 0x60 "IMC096,Interrupu Mode Control Register(B) 096"
bitfld.byte 0x60 7. "INTNCLR,INTNCLR" "0,1"
bitfld.byte 0x60 6. "INTPCLR,INTPCLR" "0,1"
rbitfld.byte 0x60 5. "INTNFLG,INTNFLG" "0,1"
rbitfld.byte 0x60 4. "INTPFLG,INTPFLG" "0,1"
bitfld.byte 0x60 1.--3. "INTMODE,INTMODE" "0,1,2,3,4,5,6,7"
bitfld.byte 0x60 0. "INTEN,INTEN" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "IMN (Interrupt Monitor)"
base ad:0x400F4F00
rgroup.long 0x0++0x7
line.long 0x0 "FLGNMI,Interrupt Monitor Flag 0"
bitfld.long 0x0 16. "INT016FLG,INT016FLG" "0,1"
bitfld.long 0x0 0. "INT000FLG,INT000FLG" "0,1"
line.long 0x4 "FLG1,Interrupt Monitor Flag 1"
bitfld.long 0x4 17. "INT049FLG,INT049FLG" "0,1"
bitfld.long 0x4 16. "INT048FLG,INT048FLG" "0,1"
bitfld.long 0x4 3. "INT035FLG,INT035FLG" "0,1"
bitfld.long 0x4 2. "INT034FLG,INT034FLG" "0,1"
bitfld.long 0x4 1. "INT033FLG,INT033FLG" "0,1"
bitfld.long 0x4 0. "INT032FLG,INT032FLG" "0,1"
rgroup.long 0xC++0xF
line.long 0x0 "FLG3,Interrupt Monitor Flag 3"
bitfld.long 0x0 31. "INT127FLG,INT127FLG" "0,1"
bitfld.long 0x0 30. "INT126FLG,INT126FLG" "0,1"
bitfld.long 0x0 29. "INT125FLG,INT125FLG" "0,1"
bitfld.long 0x0 28. "INT124FLG,INT124FLG" "0,1"
bitfld.long 0x0 27. "INT123FLG,INT123FLG" "0,1"
bitfld.long 0x0 26. "INT122FLG,INT122FLG" "0,1"
bitfld.long 0x0 25. "INT121FLG,INT121FLG" "0,1"
bitfld.long 0x0 24. "INT120FLG,INT120FLG" "0,1"
bitfld.long 0x0 23. "INT119FLG,INT119FLG" "0,1"
bitfld.long 0x0 22. "INT118FLG,INT118FLG" "0,1"
newline
bitfld.long 0x0 21. "INT117FLG,INT117FLG" "0,1"
bitfld.long 0x0 20. "INT116FLG,INT116FLG" "0,1"
bitfld.long 0x0 19. "INT115FLG,INT115FLG" "0,1"
bitfld.long 0x0 18. "INT114FLG,INT114FLG" "0,1"
bitfld.long 0x0 17. "INT113FLG,INT113FLG" "0,1"
bitfld.long 0x0 16. "INT112FLG,INT112FLG" "0,1"
bitfld.long 0x0 15. "INT111FLG,INT111FLG" "0,1"
bitfld.long 0x0 14. "INT110FLG,INT110FLG" "0,1"
bitfld.long 0x0 13. "INT109FLG,INT109FLG" "0,1"
bitfld.long 0x0 12. "INT108FLG,INT108FLG" "0,1"
newline
bitfld.long 0x0 11. "INT107FLG,INT107FLG" "0,1"
bitfld.long 0x0 10. "INT106FLG,INT106FLG" "0,1"
bitfld.long 0x0 9. "INT105FLG,INT105FLG" "0,1"
bitfld.long 0x0 8. "INT104FLG,INT104FLG" "0,1"
bitfld.long 0x0 7. "INT103FLG,INT103FLG" "0,1"
bitfld.long 0x0 6. "INT102FLG,INT102FLG" "0,1"
bitfld.long 0x0 5. "INT101FLG,INT101FLG" "0,1"
bitfld.long 0x0 4. "INT100FLG,INT100FLG" "0,1"
bitfld.long 0x0 3. "INT099FLG,INT099FLG" "0,1"
bitfld.long 0x0 2. "INT098FLG,INT098FLG" "0,1"
newline
bitfld.long 0x0 1. "INT097FLG,INT097FLG" "0,1"
bitfld.long 0x0 0. "INT096FLG,INT096FLG" "0,1"
line.long 0x4 "FLG4,NMI Interrupt Monitor Flag 4"
bitfld.long 0x4 31. "INT159FLG,INT159FLG" "0,1"
bitfld.long 0x4 30. "INT158FLG,INT158FLG" "0,1"
bitfld.long 0x4 29. "INT157FLG,INT157FLG" "0,1"
bitfld.long 0x4 28. "INT156FLG,INT156FLG" "0,1"
bitfld.long 0x4 27. "INT155FLG,INT155FLG" "0,1"
bitfld.long 0x4 26. "INT154FLG,INT154FLG" "0,1"
bitfld.long 0x4 25. "INT153FLG,INT153FLG" "0,1"
bitfld.long 0x4 24. "INT152FLG,INT152FLG" "0,1"
bitfld.long 0x4 23. "INT151FLG,INT151FLG" "0,1"
bitfld.long 0x4 22. "INT150FLG,INT150FLG" "0,1"
newline
bitfld.long 0x4 21. "INT149FLG,INT149FLG" "0,1"
bitfld.long 0x4 20. "INT148FLG,INT148FLG" "0,1"
bitfld.long 0x4 19. "INT147FLG,INT147FLG" "0,1"
bitfld.long 0x4 18. "INT146FLG,INT146FLG" "0,1"
bitfld.long 0x4 17. "INT145FLG,INT145FLG" "0,1"
bitfld.long 0x4 16. "INT144FLG,INT144FLG" "0,1"
bitfld.long 0x4 15. "INT143FLG,INT143FLG" "0,1"
bitfld.long 0x4 14. "INT142FLG,INT142FLG" "0,1"
bitfld.long 0x4 13. "INT141FLG,INT141FLG" "0,1"
bitfld.long 0x4 12. "INT140FLG,INT140FLG" "0,1"
newline
bitfld.long 0x4 11. "INT139FLG,INT139FLG" "0,1"
bitfld.long 0x4 10. "INT138FLG,INT138FLG" "0,1"
bitfld.long 0x4 9. "INT137FLG,INT137FLG" "0,1"
bitfld.long 0x4 8. "INT136FLG,INT136FLG" "0,1"
bitfld.long 0x4 7. "INT135FLG,INT135FLG" "0,1"
bitfld.long 0x4 6. "INT134FLG,INT134FLG" "0,1"
bitfld.long 0x4 5. "INT133FLG,INT133FLG" "0,1"
bitfld.long 0x4 4. "INT132FLG,INT132FLG" "0,1"
bitfld.long 0x4 3. "INT131FLG,INT131FLG" "0,1"
bitfld.long 0x4 2. "INT130FLG,INT130FLG" "0,1"
newline
bitfld.long 0x4 1. "INT129FLG,INT129FLG" "0,1"
bitfld.long 0x4 0. "INT128FLG,INT128FLG" "0,1"
line.long 0x8 "FLG5,NMI Interrupt Monitor Flag 5"
bitfld.long 0x8 30. "INT190FLG,INT190FLG" "0,1"
bitfld.long 0x8 29. "INT189FLG,INT189FLG" "0,1"
bitfld.long 0x8 28. "INT188FLG,INT188FLG" "0,1"
bitfld.long 0x8 27. "INT187FLG,INT187FLG" "0,1"
bitfld.long 0x8 26. "INT186FLG,INT186FLG" "0,1"
bitfld.long 0x8 25. "INT185FLG,INT185FLG" "0,1"
bitfld.long 0x8 24. "INT184FLG,INT184FLG" "0,1"
bitfld.long 0x8 23. "INT183FLG,INT183FLG" "0,1"
bitfld.long 0x8 22. "INT182FLG,INT182FLG" "0,1"
bitfld.long 0x8 21. "INT181FLG,INT181FLG" "0,1"
newline
bitfld.long 0x8 20. "INT180FLG,INT180FLG" "0,1"
bitfld.long 0x8 19. "INT179FLG,INT179FLG" "0,1"
bitfld.long 0x8 18. "INT178FLG,INT178FLG" "0,1"
bitfld.long 0x8 17. "INT177FLG,INT177FLG" "0,1"
bitfld.long 0x8 16. "INT176FLG,INT176FLG" "0,1"
bitfld.long 0x8 15. "INT175FLG,INT175FLG" "0,1"
bitfld.long 0x8 14. "INT174FLG,INT174FLG" "0,1"
bitfld.long 0x8 13. "INT173FLG,INT173FLG" "0,1"
bitfld.long 0x8 12. "INT172FLG,INT172FLG" "0,1"
bitfld.long 0x8 11. "INT171FLG,INT171FLG" "0,1"
newline
bitfld.long 0x8 10. "INT170FLG,INT170FLG" "0,1"
bitfld.long 0x8 9. "INT169FLG,INT169FLG" "0,1"
bitfld.long 0x8 8. "INT168FLG,INT168FLG" "0,1"
bitfld.long 0x8 7. "INT167FLG,INT167FLG" "0,1"
bitfld.long 0x8 6. "INT166FLG,INT166FLG" "0,1"
bitfld.long 0x8 5. "INT165FLG,INT165FLG" "0,1"
bitfld.long 0x8 4. "INT164FLG,INT164FLG" "0,1"
bitfld.long 0x8 3. "INT163FLG,INT163FLG" "0,1"
bitfld.long 0x8 2. "INT162FLG,INT162FLG" "0,1"
bitfld.long 0x8 1. "INT161FLG,INT161FLG" "0,1"
newline
bitfld.long 0x8 0. "INT160FLG,INT160FLG" "0,1"
line.long 0xC "FLG6,NMI Interrupt Monitor Flag 6"
bitfld.long 0xC 0. "INT192FLG,INT192FLG" "0,1"
tree.end
endif
tree.end
tree "LVD (Voltage Detection)"
base ad:0x4003EC00
group.byte 0x0++0x0
line.byte 0x0 "CR,LVD Control register"
rbitfld.byte 0x0 7. "ST,ST" "0,1"
bitfld.byte 0x0 4.--6. "LVL,LVL" "0,1,2,3,4,5,6,7"
bitfld.byte 0x0 2. "SEL,SEL" "0,1"
bitfld.byte 0x0 1. "OUTEN,OUTEN" "0,1"
bitfld.byte 0x0 0. "EN,EN" "0,1"
tree.end
tree "OFD (Oscillation Frequency Detector)"
base ad:0x400F1000
group.long 0x0++0x1B
line.long 0x0 "CR1,OFD Control Register 1"
hexmask.long.byte 0x0 0.--7. 1. "OFDWEN,OFDWEN"
line.long 0x4 "CR2,OFD Control Register 2"
hexmask.long.byte 0x4 0.--7. 1. "OFDEN,OFDEN"
line.long 0x8 "MN0,OFD Lower Detection Frequency Setting Register0"
hexmask.long.word 0x8 0.--11. 1. "OFDMN0,OFDMN0"
line.long 0xC "MN1,OFD Lower Detection Frequency Setting Register1"
hexmask.long.word 0xC 0.--11. 1. "OFDMN1,OFDMN1"
line.long 0x10 "MX0,OFD Higher Detection Frequency Setting Register0"
hexmask.long.word 0x10 0.--11. 1. "OFDMX0,OFDMX0"
line.long 0x14 "MX1,OFD Higher Detection Frequency Setting Register1"
hexmask.long.word 0x14 0.--11. 1. "OFDMX1,OFDMX1"
line.long 0x18 "RST,OFD Reset Enable Control Register"
bitfld.long 0x18 0. "OFDRSTEN,OFDRSTEN" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "STAT,OFD Status Register"
bitfld.long 0x0 1. "OFDBUSY,OFDBUSY" "0,1"
bitfld.long 0x0 0. "FRQERR,FRQERR" "0,1"
group.long 0x20++0x3
line.long 0x0 "MON,OFD External high frequency oscillaion clock monitor register"
bitfld.long 0x0 0. "OFDMON,OFDMON" "0,1"
tree.end
tree "PMD (Programmable Motor Control)"
base ad:0x400F6000
group.long 0x0++0xB
line.long 0x0 "MDEN,PMD Enable Register"
bitfld.long 0x0 0. "PWMEN,PWMEN" "0,1"
line.long 0x4 "PORTMD,PMD Port Output Mode Register"
bitfld.long 0x4 0.--1. "PORTMD,PORTMD" "0,1,2,3"
line.long 0x8 "MDCR,PMD Control Register"
bitfld.long 0x8 14.--15. "WPWMMD,WPWMMD" "0,1,2,3"
bitfld.long 0x8 12.--13. "VPWMMD,VPWMMD" "0,1,2,3"
bitfld.long 0x8 10.--11. "UPWMMD,UPWMMD" "0,1,2,3"
bitfld.long 0x8 8.--9. "DSYNCS,DSYNCS" "0,1,2,3"
bitfld.long 0x8 7. "DTCREN,DTCREN" "0,1"
bitfld.long 0x8 6. "DCMEN,DCMEN" "0,1"
bitfld.long 0x8 5. "SYNTMD,SYNTMD" "0,1"
bitfld.long 0x8 4. "DTYMD,DTYMD" "0,1"
bitfld.long 0x8 3. "PINT,PINT" "0,1"
bitfld.long 0x8 1.--2. "INTPRD,INTPRD" "0,1,2,3"
rgroup.long 0xC++0x7
line.long 0x0 "CARSTA,PWM Carrier Status Register"
bitfld.long 0x0 2. "PWMWST,PWMWST" "0,1"
bitfld.long 0x0 1. "PWMVST,PWMVST" "0,1"
bitfld.long 0x0 0. "PWMUST,PWMUST" "0,1"
line.long 0x4 "BCARI,PWM Basic Carrier Register"
hexmask.long.word 0x4 0.--14. 1. "BCARI,BCARI"
group.long 0x14++0xF
line.long 0x0 "RATE,PWM Frequency Register"
hexmask.long.word 0x0 0.--14. 1. "RATE,RATE"
line.long 0x4 "CMPU,PMD PWM Compare U Register"
hexmask.long.word 0x4 0.--15. 1. "CMPU,CMPU"
line.long 0x8 "CMPV,PMD PWM Compare V Register"
hexmask.long.word 0x8 0.--15. 1. "CMPV,CMPV"
line.long 0xC "CMPW,PMD PWM Compare W Register"
hexmask.long.word 0xC 0.--15. 1. "CMPW,CMPW"
group.long 0x28++0x7
line.long 0x0 "MDOUT,PMD Conduction Control Register"
bitfld.long 0x0 10. "WPWM,WPWM" "0,1"
bitfld.long 0x0 9. "VPWM,VPWM" "0,1"
bitfld.long 0x0 8. "UPWM,UPWM" "0,1"
bitfld.long 0x0 4.--5. "WOC,WOC" "0,1,2,3"
bitfld.long 0x0 2.--3. "VOC,VOC" "0,1,2,3"
bitfld.long 0x0 0.--1. "UOC,UOC" "0,1,2,3"
line.long 0x4 "MDPOT,PMD Output Setting Register"
bitfld.long 0x4 8.--9. "SYNCS,SYNCS" "0,1,2,3"
bitfld.long 0x4 3. "POLH,POLH" "0,1"
bitfld.long 0x4 2. "POLL,POLL" "0,1"
bitfld.long 0x4 0.--1. "PSYNCS,PSYNCS" "0,1,2,3"
wgroup.long 0x30++0x3
line.long 0x0 "EMGREL,PMD EMG Release Register"
hexmask.long.byte 0x0 0.--7. 1. "EMGREL,EMGREL"
group.long 0x34++0x3
line.long 0x0 "EMGCR,PMD EMG Control Register"
bitfld.long 0x0 13. "CPAIEN,CPAIEN" "0,1"
hexmask.long.byte 0x0 8.--12. 1. "EMGCNT,EMGCNT"
bitfld.long 0x0 7. "EMGIPOL,EMGIPOL" "0,1"
bitfld.long 0x0 5. "INHEN,INHEN" "0,1"
bitfld.long 0x0 3.--4. "EMGMD,EMGMD" "0,1,2,3"
bitfld.long 0x0 2. "EMGISEL,EMGISEL" "0,1"
bitfld.long 0x0 1. "EMGRS,EMGRS" "0,1"
bitfld.long 0x0 0. "EMGEN,EMGEN" "0,1"
rgroup.long 0x38++0x3
line.long 0x0 "EMGSTA,PMD EMG Status Register"
bitfld.long 0x0 1. "EMGI,EMGI" "0,1"
bitfld.long 0x0 0. "EMGST,EMGST" "0,1"
group.long 0x3C++0x3
line.long 0x0 "OVVCR,PMD OVV Control Register"
bitfld.long 0x0 15. "OVVRSMD,OVVRSMD" "0,1"
hexmask.long.byte 0x0 8.--12. 1. "OVVCNT,OVVCNT"
bitfld.long 0x0 7. "OVVIPOL,OVVIPOL" "0,1"
bitfld.long 0x0 6. "ADIN1EN,ADIN1EN" "0,1"
bitfld.long 0x0 5. "ADIN0EN,ADIN0EN" "0,1"
bitfld.long 0x0 3.--4. "OVVMD,OVVMD" "0,1,2,3"
bitfld.long 0x0 2. "OVVISEL,OVVISEL" "0,1"
bitfld.long 0x0 1. "OVVRS,OVVRS" "0,1"
bitfld.long 0x0 0. "OVVEN,OVVEN" "0,1"
rgroup.long 0x40++0x3
line.long 0x0 "OVVSTA,PMD OVV Status Register"
bitfld.long 0x0 1. "OVVI,OVVI" "0,1"
bitfld.long 0x0 0. "OVVST,OVVST" "0,1"
group.long 0x44++0x2F
line.long 0x0 "DTR,PMD Dead Time Register"
hexmask.long.word 0x0 0.--9. 1. "DTR,DTR"
line.long 0x4 "TRGCMP0,PMD Trigger Compare Register 0"
hexmask.long.word 0x4 0.--14. 1. "TRGCMP0,TRGCMP0"
line.long 0x8 "TRGCMP1,PMD Trigger Compare Register 1"
hexmask.long.word 0x8 0.--14. 1. "TRGCMP1,TRGCMP1"
line.long 0xC "TRGCMP2,PMD Trigger Compare Register 2"
hexmask.long.word 0xC 0.--14. 1. "TRGCMP2,TRGCMP2"
line.long 0x10 "TRGCMP3,PMD Trigger Compare Register 3"
hexmask.long.word 0x10 0.--14. 1. "TRGCMP3,TRGCMP3"
line.long 0x14 "TRGCR,PMD Trigger Control Register"
bitfld.long 0x14 16. "CARSEL,CARSEL" "0,1"
bitfld.long 0x14 15. "TRG3BE,TRG3BE" "0,1"
bitfld.long 0x14 12.--14. "TRG3MD,TRG3MD" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 11. "TRG2BE,TRG2BE" "0,1"
bitfld.long 0x14 8.--10. "TRG2MD,TRG2MD" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 7. "TRG1BE,TRG1BE" "0,1"
bitfld.long 0x14 4.--6. "TRG1MD,TRG1MD" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 3. "TRG0BE,TRG0BE" "0,1"
bitfld.long 0x14 0.--2. "TRG0MD,TRG0MD" "0,1,2,3,4,5,6,7"
line.long 0x18 "TRGMD,PMD Trigger Output Mode Setting Register"
bitfld.long 0x18 1. "TRGOUT,TRGOUT" "0,1"
bitfld.long 0x18 0. "EMGTGE,EMGTGE" "0,1"
line.long 0x1C "TRGSEL,PMD Trigger Output Select Register"
bitfld.long 0x1C 0.--2. "TRGSEL,TRGSEL" "0,1,2,3,4,5,6,7"
line.long 0x20 "TRGSYNCR,PMD Trigger Update Timing Setting Register"
bitfld.long 0x20 0.--1. "TSYNCS,TSYNCS" "0,1,2,3"
line.long 0x24 "VPWMPH,Phase difference setting of the V-phase PWM"
hexmask.long.word 0x24 0.--14. 1. "VPWMPH,VPWMPH"
line.long 0x28 "WPWMPH,Phase difference setting of the W-phase PWM"
hexmask.long.word 0x28 0.--14. 1. "WPWMPH,WPWMPH"
line.long 0x2C "MBUFCR,Update timing of the triple buffer"
bitfld.long 0x2C 0.--2. "BUFCTR,BUFCTR" "0,1,2,3,4,5,6,7"
group.long 0x78++0x3
line.long 0x0 "DBGOUTCR,Debug output control"
bitfld.long 0x0 31. "INIFF,INIFF" "0,1"
bitfld.long 0x0 21. "TRG5EN,TRG5EN" "0,1"
bitfld.long 0x0 20. "TRG4EN,TRG4EN" "0,1"
bitfld.long 0x0 19. "TRG3EN,TRG3EN" "0,1"
bitfld.long 0x0 18. "TRG2EN,TRG2EN" "0,1"
bitfld.long 0x0 17. "TRG1EN,TRG1EN" "0,1"
bitfld.long 0x0 16. "TRG0EN,TRG0EN" "0,1"
bitfld.long 0x0 12. "IENCEN,IENCEN" "0,1"
bitfld.long 0x0 10. "IOVVEN,IOVVEN" "0,1"
bitfld.long 0x0 9. "IEMGEN,IEMGEN" "0,1"
bitfld.long 0x0 8. "IPMDEN,IPMDEN" "0,1"
newline
bitfld.long 0x0 4. "IADBEN,IADBEN" "0,1"
bitfld.long 0x0 3. "IADAEN,IADAEN" "0,1"
bitfld.long 0x0 1.--2. "DBGMD,DBGMD" "0,1,2,3"
bitfld.long 0x0 0. "DBGEN,DBGEN" "0,1"
tree.end
tree "PORT"
base ad:0x0
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PA (Port A)"
base ad:0x400C0000
group.long 0x0++0x1F
line.long 0x0 "DATA,PA Data Register"
bitfld.long 0x0 7. "PA7,PA7" "0,1"
bitfld.long 0x0 6. "PA6,PA6" "0,1"
bitfld.long 0x0 3. "PA3,PA3" "0,1"
bitfld.long 0x0 2. "PA2,PA2" "0,1"
bitfld.long 0x0 1. "PA1,PA1" "0,1"
bitfld.long 0x0 0. "PA0,PA0" "0,1"
line.long 0x4 "CR,PA Control Register"
bitfld.long 0x4 7. "PA7C,PA7C" "0,1"
bitfld.long 0x4 6. "PA6C,PA6C" "0,1"
bitfld.long 0x4 3. "PA3C,PA3C" "0,1"
bitfld.long 0x4 2. "PA2C,PA2C" "0,1"
bitfld.long 0x4 1. "PA1C,PA1C" "0,1"
bitfld.long 0x4 0. "PA0C,PA0C" "0,1"
line.long 0x8 "FR1,PA Function Register 1"
bitfld.long 0x8 7. "PA7F1,PA7F1" "0,1"
bitfld.long 0x8 6. "PA6F1,PA6F1" "0,1"
bitfld.long 0x8 2. "PA2F1,PA2F1" "0,1"
bitfld.long 0x8 1. "PA1F1,PA1F1" "0,1"
bitfld.long 0x8 0. "PA0F1,PA0F1" "0,1"
line.long 0xC "FR2,PA Function Register 2"
bitfld.long 0xC 7. "PA7F2,PA7F2" "0,1"
bitfld.long 0xC 6. "PA6F2,PA6F2" "0,1"
bitfld.long 0xC 3. "PA3F2,PA3F2" "0,1"
bitfld.long 0xC 2. "PA2F2,PA2F2" "0,1"
bitfld.long 0xC 1. "PA1F2,PA1F2" "0,1"
line.long 0x10 "FR3,PA Function Register 3"
bitfld.long 0x10 3. "PA3F3,PA3F3" "0,1"
bitfld.long 0x10 2. "PA2F3,PA2F3" "0,1"
bitfld.long 0x10 1. "PA1F3,PA1F3" "0,1"
bitfld.long 0x10 0. "PA0F3,PA0F3" "0,1"
line.long 0x14 "FR4,PA Function Register 4"
bitfld.long 0x14 3. "PA3F4,PA3F4" "0,1"
bitfld.long 0x14 2. "PA2F4,PA2F4" "0,1"
bitfld.long 0x14 1. "PA1F4,PA1F4" "0,1"
bitfld.long 0x14 0. "PA0F4,PA0F4" "0,1"
line.long 0x18 "FR5,PA Function Register 5"
bitfld.long 0x18 2. "PA2F5,PA2F5" "0,1"
bitfld.long 0x18 1. "PA1F5,PA1F5" "0,1"
bitfld.long 0x18 0. "PA0F5,PA0F5" "0,1"
line.long 0x1C "FR6,PA Function Register 6"
bitfld.long 0x1C 3. "PA3F6,PA3F6" "0,1"
bitfld.long 0x1C 2. "PA2F6,PA2F6" "0,1"
bitfld.long 0x1C 1. "PA1F6,PA1F6" "0,1"
bitfld.long 0x1C 0. "PA0F6,PA0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PA Open Drain Control Register"
bitfld.long 0x0 7. "PA7OD,PA7OD" "0,1"
bitfld.long 0x0 6. "PA6OD,PA6OD" "0,1"
bitfld.long 0x0 3. "PA3OD,PA3OD" "0,1"
bitfld.long 0x0 2. "PA2OD,PA2OD" "0,1"
bitfld.long 0x0 1. "PA1OD,PA1OD" "0,1"
bitfld.long 0x0 0. "PA0OD,PA0OD" "0,1"
line.long 0x4 "PUP,PA Pull-up Control Register"
bitfld.long 0x4 7. "PA7UP,PA7UP" "0,1"
bitfld.long 0x4 6. "PA6UP,PA6UP" "0,1"
bitfld.long 0x4 3. "PA3UP,PA3UP" "0,1"
bitfld.long 0x4 2. "PA2UP,PA2UP" "0,1"
bitfld.long 0x4 1. "PA1UP,PA1UP" "0,1"
bitfld.long 0x4 0. "PA0UP,PA0UP" "0,1"
line.long 0x8 "PDN,PB Pull-Down Control Register"
bitfld.long 0x8 7. "PA7DN,PA7DN" "0,1"
bitfld.long 0x8 6. "PA6DN,PA6DN" "0,1"
bitfld.long 0x8 3. "PA3DN,PA3DN" "0,1"
bitfld.long 0x8 2. "PA2DN,PA2DN" "0,1"
bitfld.long 0x8 1. "PA1DN,PA1DN" "0,1"
bitfld.long 0x8 0. "PA0DN,PA0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PA Input Enable Control Register"
bitfld.long 0x0 7. "PA7IE,PA7IE" "0,1"
bitfld.long 0x0 6. "PA6IE,PA6IE" "0,1"
bitfld.long 0x0 3. "PA3IE,PA3IE" "0,1"
bitfld.long 0x0 2. "PA2IE,PA2IE" "0,1"
bitfld.long 0x0 1. "PA1IE,PA1IE" "0,1"
bitfld.long 0x0 0. "PA0IE,PA0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PB (Port B)"
base ad:0x400C0100
group.long 0x0++0xF
line.long 0x0 "DATA,PB Data Register"
bitfld.long 0x0 3. "PB3,PB3" "0,1"
bitfld.long 0x0 2. "PB2,PB2" "0,1"
bitfld.long 0x0 1. "PB1,PB1" "0,1"
bitfld.long 0x0 0. "PB0,PB0" "0,1"
line.long 0x4 "CR,PB Control Register"
bitfld.long 0x4 3. "PB3C,PB3C" "0,1"
bitfld.long 0x4 2. "PB2C,PB2C" "0,1"
bitfld.long 0x4 1. "PB1C,PB1C" "0,1"
bitfld.long 0x4 0. "PB0C,PB0C" "0,1"
line.long 0x8 "FR1,PB Function Register 1"
bitfld.long 0x8 3. "PB3F1,PB3F1" "0,1"
bitfld.long 0x8 2. "PB2F1,PB2F1" "0,1"
bitfld.long 0x8 1. "PB1F1,PB1F1" "0,1"
line.long 0xC "FR2,PB Function Register 2"
bitfld.long 0xC 3. "PB3F2,PB3F2" "0,1"
bitfld.long 0xC 2. "PB2F2,PB2F2" "0,1"
group.long 0x14++0xB
line.long 0x0 "FR4,PB Function Register 4"
bitfld.long 0x0 3. "PB3F4,PB3F4" "0,1"
bitfld.long 0x0 2. "PB2F4,PB2F4" "0,1"
bitfld.long 0x0 1. "PB1F4,PB1F4" "0,1"
bitfld.long 0x0 0. "PB0F4,PB0F4" "0,1"
line.long 0x4 "FR5,PB Function Register 5"
bitfld.long 0x4 2. "PB2F5,PB2F5" "0,1"
bitfld.long 0x4 1. "PB1F5,PB1F5" "0,1"
bitfld.long 0x4 0. "PB0F5,PB0F5" "0,1"
line.long 0x8 "FR6,PB Function Register 6"
bitfld.long 0x8 1. "PB1F6,PB1F6" "0,1"
bitfld.long 0x8 0. "PB0F6,PB0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PB Open Drain Control Register"
bitfld.long 0x0 3. "PB3OD,PB3OD" "0,1"
bitfld.long 0x0 2. "PB2OD,PB2OD" "0,1"
bitfld.long 0x0 1. "PB1OD,PB1OD" "0,1"
bitfld.long 0x0 0. "PB0OD,PB0OD" "0,1"
line.long 0x4 "PUP,PB Pull-up Control Register"
bitfld.long 0x4 3. "PB3UP,PB3UP" "0,1"
bitfld.long 0x4 2. "PB2UP,PB2UP" "0,1"
bitfld.long 0x4 1. "PB1UP,PB1UP" "0,1"
bitfld.long 0x4 0. "PB0UP,PB0UP" "0,1"
line.long 0x8 "PDN,PB Pull-Down Control Register"
bitfld.long 0x8 3. "PB3DN,PB3DN" "0,1"
bitfld.long 0x8 2. "PB2DN,PB2DN" "0,1"
bitfld.long 0x8 1. "PB1DN,PB1DN" "0,1"
bitfld.long 0x8 0. "PB0DN,PB0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PB Input Enable Control Register"
bitfld.long 0x0 3. "PB3IE,PB3IE" "0,1"
bitfld.long 0x0 2. "PB2IE,PB2IE" "0,1"
bitfld.long 0x0 1. "PB1IE,PB1IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PC (Port C)"
base ad:0x400C0200
group.long 0x0++0x1B
line.long 0x0 "DATA,PC Data Register"
bitfld.long 0x0 4. "PC4,PC4" "0,1"
bitfld.long 0x0 3. "PC3,PC3" "0,1"
bitfld.long 0x0 1. "PC1,PC1" "0,1"
bitfld.long 0x0 0. "PC0,PC0" "0,1"
line.long 0x4 "CR,PC Control Register"
bitfld.long 0x4 4. "PC4C,PC4C" "0,1"
bitfld.long 0x4 3. "PC3C,PC3C" "0,1"
bitfld.long 0x4 1. "PC1C,PC1C" "0,1"
bitfld.long 0x4 0. "PC0C,PC0C" "0,1"
line.long 0x8 "FR1,PC Function Register 1"
bitfld.long 0x8 4. "PC4F1,PC4F1" "0,1"
bitfld.long 0x8 3. "PC3F1,PC3F1" "0,1"
bitfld.long 0x8 1. "PC1F1,PC1F1" "0,1"
bitfld.long 0x8 0. "PC0F1,PC0F1" "0,1"
line.long 0xC "FR2,PC Function Register 2"
bitfld.long 0xC 4. "PC4F2,PC4F2" "0,1"
bitfld.long 0xC 3. "PC3F2,PC3F2" "0,1"
bitfld.long 0xC 1. "PC1F2,PC1F2" "0,1"
bitfld.long 0xC 0. "PC0F2,PC0F2" "0,1"
line.long 0x10 "FR3,PC Function Register 3"
bitfld.long 0x10 4. "PC4F3,PC4F3" "0,1"
bitfld.long 0x10 3. "PC3F3,PC3F3" "0,1"
bitfld.long 0x10 1. "PC1F3,PC1F3" "0,1"
bitfld.long 0x10 0. "PC0F3,PC0F3" "0,1"
line.long 0x14 "FR4,PC Function Register 4"
bitfld.long 0x14 1. "PC1F4,PC1F4" "0,1"
bitfld.long 0x14 0. "PC0F4,PC0F4" "0,1"
line.long 0x18 "FR5,PC Function Register 5"
group.long 0x28++0xB
line.long 0x0 "OD,PC Open Drain Control Register"
bitfld.long 0x0 4. "PC4OD,PC4OD" "0,1"
bitfld.long 0x0 3. "PC3OD,PC3OD" "0,1"
bitfld.long 0x0 1. "PC1OD,PC1OD" "0,1"
bitfld.long 0x0 0. "PC0OD,PC0OD" "0,1"
line.long 0x4 "PUP,PC Pull-up Control Register"
bitfld.long 0x4 4. "PC4UP,PC4UP" "0,1"
bitfld.long 0x4 3. "PC3UP,PC3UP" "0,1"
bitfld.long 0x4 1. "PC1UP,PC1UP" "0,1"
bitfld.long 0x4 0. "PC0UP,PC0UP" "0,1"
line.long 0x8 "PDN,PC Pull-Down Control Register"
bitfld.long 0x8 4. "PC4DN,PC4DN" "0,1"
bitfld.long 0x8 3. "PC3DN,PC3DN" "0,1"
bitfld.long 0x8 1. "PC1DN,PC1DN" "0,1"
bitfld.long 0x8 0. "PC0DN,PC0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PC Input Enable Control Register"
bitfld.long 0x0 4. "PC4IE,PC4IE" "0,1"
bitfld.long 0x0 3. "PC3IE,PC3IE" "0,1"
bitfld.long 0x0 1. "PC1IE,PC1IE" "0,1"
bitfld.long 0x0 0. "PC0IE,PC0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*")||cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PD (Port D)"
base ad:0x400C0300
group.long 0x0++0x7
line.long 0x0 "DATA,PD Data Register"
bitfld.long 0x0 2. "PD2,PD2" "0,1"
bitfld.long 0x0 1. "PD1,PD1" "0,1"
bitfld.long 0x0 0. "PD0,PD0" "0,1"
line.long 0x4 "CR,PD Control Register"
bitfld.long 0x4 2. "PD2C,PD2C" "0,1"
bitfld.long 0x4 1. "PD1C,PD1C" "0,1"
bitfld.long 0x4 0. "PD0C,PD0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PD Open Drain Control Register"
bitfld.long 0x0 2. "PD2OD,PD2OD" "0,1"
bitfld.long 0x0 1. "PD1OD,PD1OD" "0,1"
bitfld.long 0x0 0. "PD0OD,PD0OD" "0,1"
line.long 0x4 "PUP,PD Pull-up Control Register"
bitfld.long 0x4 2. "PD2UP,PD2UP" "0,1"
bitfld.long 0x4 1. "PD1UP,PD1UP" "0,1"
bitfld.long 0x4 0. "PD0UP,PD0UP" "0,1"
line.long 0x8 "PDN,PD Pull-Down Control Register"
bitfld.long 0x8 2. "PD2DN,PD2DN" "0,1"
bitfld.long 0x8 1. "PD1DN,PD1DN" "0,1"
bitfld.long 0x8 0. "PD0DN,PD0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PD Input Enable Control Register"
bitfld.long 0x0 2. "PD2IE,PD2IE" "0,1"
bitfld.long 0x0 1. "PD1IE,PD1IE" "0,1"
bitfld.long 0x0 0. "PD0IE,PD0IE" "0,1"
tree.end
endif
tree "PE (Port E)"
base ad:0x400C0400
group.long 0x0++0x7
line.long 0x0 "DATA,PE Data Register"
bitfld.long 0x0 6. "PE6,PE6" "0,1"
bitfld.long 0x0 5. "PE5,PE5" "0,1"
bitfld.long 0x0 4. "PE4,PE4" "0,1"
bitfld.long 0x0 3. "PE3,PE3" "0,1"
bitfld.long 0x0 2. "PE2,PE2" "0,1"
bitfld.long 0x0 1. "PE1,PE1" "0,1"
bitfld.long 0x0 0. "PE0,PE0" "0,1"
line.long 0x4 "CR,PE Control Register"
bitfld.long 0x4 6. "PE6C,PE6C" "0,1"
bitfld.long 0x4 5. "PE5C,PE5C" "0,1"
bitfld.long 0x4 4. "PE4C,PE4C" "0,1"
bitfld.long 0x4 3. "PE3C,PE3C" "0,1"
bitfld.long 0x4 2. "PE2C,PE2C" "0,1"
bitfld.long 0x4 1. "PE1C,PE1C" "0,1"
bitfld.long 0x4 0. "PE0C,PE0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PE Open Drain Control Register"
bitfld.long 0x0 6. "PE6OD,PE6OD" "0,1"
bitfld.long 0x0 5. "PE5OD,PE5OD" "0,1"
bitfld.long 0x0 4. "PE4OD,PE4OD" "0,1"
bitfld.long 0x0 3. "PE3OD,PE3OD" "0,1"
bitfld.long 0x0 2. "PE2OD,PE2OD" "0,1"
bitfld.long 0x0 1. "PE1OD,PE1OD" "0,1"
bitfld.long 0x0 0. "PE0OD,PE0OD" "0,1"
line.long 0x4 "PUP,PE Pull-up Control Register"
bitfld.long 0x4 6. "PE6UP,PE6UP" "0,1"
bitfld.long 0x4 5. "PE5UP,PE5UP" "0,1"
bitfld.long 0x4 4. "PE4UP,PE4UP" "0,1"
bitfld.long 0x4 3. "PE3UP,PE3UP" "0,1"
bitfld.long 0x4 2. "PE2UP,PE2UP" "0,1"
bitfld.long 0x4 1. "PE1UP,PE1UP" "0,1"
bitfld.long 0x4 0. "PE0UP,PE0UP" "0,1"
line.long 0x8 "PDN,PE Pull-Down Control Register"
bitfld.long 0x8 6. "PE6DN,PE6DN" "0,1"
bitfld.long 0x8 5. "PE5DN,PE5DN" "0,1"
bitfld.long 0x8 4. "PE4DN,PE4DN" "0,1"
bitfld.long 0x8 3. "PE3DN,PE3DN" "0,1"
bitfld.long 0x8 2. "PE2DN,PE2DN" "0,1"
bitfld.long 0x8 1. "PE1DN,PE1DN" "0,1"
bitfld.long 0x8 0. "PE0DN,PE0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PE Input Enable Control Register"
bitfld.long 0x0 6. "PE6IE,PE6IE" "0,1"
bitfld.long 0x0 5. "PE5IE,PE5IE" "0,1"
bitfld.long 0x0 4. "PE4IE,PE4IE" "0,1"
bitfld.long 0x0 3. "PE3IE,PE3IE" "0,1"
bitfld.long 0x0 2. "PE2IE,PE2IE" "0,1"
bitfld.long 0x0 1. "PE1IE,PE1IE" "0,1"
bitfld.long 0x0 0. "PE0IE,PE0IE" "0,1"
tree.end
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*")||cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PF (Port F)"
base ad:0x400C0500
group.long 0x0++0x7
line.long 0x0 "DATA,PF Data Register"
bitfld.long 0x0 1. "PF1,PF1" "0,1"
bitfld.long 0x0 0. "PF0,PF0" "0,1"
line.long 0x4 "CR,PF Control Register"
bitfld.long 0x4 1. "PF1C,PF1C" "0,1"
bitfld.long 0x4 0. "PF0C,PF0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PF Open Drain Control Register"
bitfld.long 0x0 1. "PF1OD,PF1OD" "0,1"
bitfld.long 0x0 0. "PF0OD,PF0OD" "0,1"
line.long 0x4 "PUP,PF Pull-up Control Register"
bitfld.long 0x4 1. "PF1UP,PF1UP" "0,1"
bitfld.long 0x4 0. "PF0UP,PF0UP" "0,1"
line.long 0x8 "PDN,PF Pull-Down Control Register"
bitfld.long 0x8 1. "PF1DN,PF1DN" "0,1"
bitfld.long 0x8 0. "PF0DN,PF0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PF Input Enable Control Register"
bitfld.long 0x0 1. "PF1IE,PF1IE" "0,1"
bitfld.long 0x0 0. "PF0IE,PF0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*")||cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "PG (Port G)"
base ad:0x400C0600
group.long 0x0++0x7
line.long 0x0 "DATA,PG Data Register"
bitfld.long 0x0 1. "PG1,PG1" "0,1"
bitfld.long 0x0 0. "PG0,PG0" "0,1"
line.long 0x4 "CR,PG Control Register"
bitfld.long 0x4 1. "PG1C,PG1C" "0,1"
bitfld.long 0x4 0. "PG0C,PG0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PG Open Drain Control Register"
bitfld.long 0x0 1. "PG1OD,PG1OD" "0,1"
bitfld.long 0x0 0. "PG0OD,PG0OD" "0,1"
line.long 0x4 "PUP,PG Pull-up Control Register"
bitfld.long 0x4 1. "PG1UP,PG1UP" "0,1"
bitfld.long 0x4 0. "PG0UP,PG0UP" "0,1"
line.long 0x8 "PDN,PG Pull-Down Control Register"
bitfld.long 0x8 1. "PG1DN,PG1DN" "0,1"
bitfld.long 0x8 0. "PG0DN,PG0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PG Input Enable Control Register"
bitfld.long 0x0 1. "PG1IE,PG1IE" "0,1"
bitfld.long 0x0 0. "PG0IE,PG0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*")||cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "PH (Port H)"
base ad:0x400C0700
group.long 0x0++0x3
line.long 0x0 "DATA,PH Data Register"
bitfld.long 0x0 3. "PH3,PH3" "0,1"
bitfld.long 0x0 2. "PH2,PH2" "0,1"
bitfld.long 0x0 1. "PH1,PH1" "0,1"
bitfld.long 0x0 0. "PH0,PH0" "0,1"
group.long 0x30++0x3
line.long 0x0 "PDN,PH Pull-Down Control Register"
bitfld.long 0x0 3. "PH3DN,PH3DN" "0,1"
bitfld.long 0x0 2. "PH2DN,PH2DN" "0,1"
bitfld.long 0x0 1. "PH1DN,PH1DN" "0,1"
bitfld.long 0x0 0. "PH0DN,PH0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PH Input Enable Control Register"
bitfld.long 0x0 3. "PH3IE,PH3IE" "0,1"
bitfld.long 0x0 2. "PH2IE,PH2IE" "0,1"
bitfld.long 0x0 1. "PH1IE,PH1IE" "0,1"
bitfld.long 0x0 0. "PH0IE,PH0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PJ (Port J)"
base ad:0x400C0800
group.long 0x0++0x1B
line.long 0x0 "DATA,PJ Data Register"
bitfld.long 0x0 5. "PJ5,PJ5" "0,1"
bitfld.long 0x0 4. "PJ4,PJ4" "0,1"
bitfld.long 0x0 3. "PJ3,PJ3" "0,1"
bitfld.long 0x0 2. "PJ2,PJ2" "0,1"
bitfld.long 0x0 1. "PJ1,PJ1" "0,1"
bitfld.long 0x0 0. "PJ0,PJ0" "0,1"
line.long 0x4 "CR,PJ Control Register"
bitfld.long 0x4 5. "PJ5C,PJ5C" "0,1"
bitfld.long 0x4 4. "PJ4C,PJ4C" "0,1"
bitfld.long 0x4 3. "PJ3C,PJ3C" "0,1"
bitfld.long 0x4 2. "PJ2C,PJ2C" "0,1"
bitfld.long 0x4 1. "PJ1C,PJ1C" "0,1"
bitfld.long 0x4 0. "PJ0C,PJ0C" "0,1"
line.long 0x8 "FR1,PJ Function Register 1"
bitfld.long 0x8 4. "PJ4F1,PJ4F1" "0,1"
bitfld.long 0x8 3. "PJ3F1,PJ3F1" "0,1"
bitfld.long 0x8 2. "PJ2F1,PJ2F1" "0,1"
bitfld.long 0x8 1. "PJ1F1,PJ1F1" "0,1"
bitfld.long 0x8 0. "PJ0F1,PJ0F1" "0,1"
line.long 0xC "FR2,PJ Function Register 2"
bitfld.long 0xC 4. "PJ4F2,PJ4F2" "0,1"
bitfld.long 0xC 3. "PJ3F2,PJ3F2" "0,1"
bitfld.long 0xC 2. "PJ2F2,PJ2F2" "0,1"
bitfld.long 0xC 1. "PJ1F2,PJ1F2" "0,1"
line.long 0x10 "FR3,PJ Function Register 3"
bitfld.long 0x10 5. "PJ5F3,PJ5F3" "0,1"
bitfld.long 0x10 4. "PJ4F3,PJ4F3" "0,1"
bitfld.long 0x10 3. "PJ3F3,PJ3F3" "0,1"
bitfld.long 0x10 2. "PJ2F3,PJ2F3" "0,1"
bitfld.long 0x10 1. "PJ1F3,PJ1F3" "0,1"
bitfld.long 0x10 0. "PJ0F3,PJ0F3" "0,1"
line.long 0x14 "FR4,PJ Function Register 4"
bitfld.long 0x14 2. "PJ2F4,PJ2F4" "0,1"
bitfld.long 0x14 1. "PJ1F4,PJ1F4" "0,1"
bitfld.long 0x14 0. "PJ0F4,PJ0F4" "0,1"
line.long 0x18 "FR5,PJ Function Register 5"
bitfld.long 0x18 5. "PJ5F5,PJ5F5" "0,1"
bitfld.long 0x18 4. "PJ4F5,PJ4F5" "0,1"
bitfld.long 0x18 3. "PJ3F5,PJ3F5" "0,1"
bitfld.long 0x18 2. "PJ2F5,PJ2F5" "0,1"
bitfld.long 0x18 1. "PJ1F5,PJ1F5" "0,1"
bitfld.long 0x18 0. "PJ0F5,PJ0F5" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PJ Open Drain Control Register"
bitfld.long 0x0 5. "PJ5OD,PJ5OD" "0,1"
bitfld.long 0x0 4. "PJ4OD,PJ4OD" "0,1"
bitfld.long 0x0 3. "PJ3OD,PJ3OD" "0,1"
bitfld.long 0x0 2. "PJ2OD,PJ2OD" "0,1"
bitfld.long 0x0 1. "PJ1OD,PJ1OD" "0,1"
bitfld.long 0x0 0. "PJ0OD,PJ0OD" "0,1"
line.long 0x4 "PUP,PJ Pull-up Control Register"
bitfld.long 0x4 5. "PJ5UP,PJ5UP" "0,1"
bitfld.long 0x4 4. "PJ4UP,PJ4UP" "0,1"
bitfld.long 0x4 3. "PJ3UP,PJ3UP" "0,1"
bitfld.long 0x4 2. "PJ2UP,PJ2UP" "0,1"
bitfld.long 0x4 1. "PJ1UP,PJ1UP" "0,1"
bitfld.long 0x4 0. "PJ0UP,PJ0UP" "0,1"
line.long 0x8 "PDN,PJ Pull-Down Control Register"
bitfld.long 0x8 5. "PJ5DN,PJ5DN" "0,1"
bitfld.long 0x8 4. "PJ4DN,PJ4DN" "0,1"
bitfld.long 0x8 3. "PJ3DN,PJ3DN" "0,1"
bitfld.long 0x8 2. "PJ2DN,PJ2DN" "0,1"
bitfld.long 0x8 1. "PJ1DN,PJ1DN" "0,1"
bitfld.long 0x8 0. "PJ0DN,PJ0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PJ Input Enable Control Register"
bitfld.long 0x0 5. "PJ5IE,PJ5IE" "0,1"
bitfld.long 0x0 4. "PJ4IE,PJ4IE" "0,1"
bitfld.long 0x0 3. "PJ3IE,PJ3IE" "0,1"
bitfld.long 0x0 2. "PJ2IE,PJ2IE" "0,1"
bitfld.long 0x0 1. "PJ1IE,PJ1IE" "0,1"
bitfld.long 0x0 0. "PJ0IE,PJ0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PK (Port K)"
base ad:0x400C0900
group.long 0x0++0x1B
line.long 0x0 "DATA,PK Data Register"
bitfld.long 0x0 6. "PK6,PK6" "0,1"
bitfld.long 0x0 5. "PK5,PK5" "0,1"
bitfld.long 0x0 4. "PK4,PK4" "0,1"
bitfld.long 0x0 3. "PK3,PK3" "0,1"
bitfld.long 0x0 2. "PK2,PK2" "0,1"
bitfld.long 0x0 1. "PK1,PK1" "0,1"
bitfld.long 0x0 0. "PK0,PK0" "0,1"
line.long 0x4 "CR,PK Control Register"
bitfld.long 0x4 6. "PK6C,PK6C" "0,1"
bitfld.long 0x4 5. "PK5C,PK5C" "0,1"
bitfld.long 0x4 4. "PK4C,PK4C" "0,1"
bitfld.long 0x4 3. "PK3C,PK3C" "0,1"
bitfld.long 0x4 2. "PK2C,PK2C" "0,1"
bitfld.long 0x4 1. "PK1C,PK1C" "0,1"
bitfld.long 0x4 0. "PK0C,PK0C" "0,1"
line.long 0x8 "FR1,PK Function Register 1"
bitfld.long 0x8 6. "PK6F1,PK6F1" "0,1"
bitfld.long 0x8 5. "PK5F1,PK5F1" "0,1"
bitfld.long 0x8 4. "PK4F1,PK4F1" "0,1"
bitfld.long 0x8 3. "PK3F1,PK3F1" "0,1"
bitfld.long 0x8 2. "PK2F1,PK2F1" "0,1"
bitfld.long 0x8 1. "PK1F1,PK1F1" "0,1"
bitfld.long 0x8 0. "PK0F1,PK0F1" "0,1"
line.long 0xC "FR2,PK Function Register 2"
bitfld.long 0xC 6. "PK6F2,PK6F2" "0,1"
bitfld.long 0xC 5. "PK5F2,PK5F2" "0,1"
bitfld.long 0xC 4. "PK4F2,PK4F2" "0,1"
bitfld.long 0xC 3. "PK3F2,PK3F2" "0,1"
bitfld.long 0xC 2. "PK2F2,PK2F2" "0,1"
bitfld.long 0xC 1. "PK1F2,PK1F2" "0,1"
line.long 0x10 "FR3,PK Function Register 3"
bitfld.long 0x10 6. "PK6F3,PK6F3" "0,1"
bitfld.long 0x10 5. "PK5F3,PK5F3" "0,1"
bitfld.long 0x10 4. "PK4F3,PK4F3" "0,1"
bitfld.long 0x10 3. "PK3F3,PK3F3" "0,1"
bitfld.long 0x10 2. "PK2F3,PK2F3" "0,1"
line.long 0x14 "FR4,PK Function Register 4"
bitfld.long 0x14 4. "PK4F4,PK4F4" "0,1"
bitfld.long 0x14 3. "PK3F4,PK3F4" "0,1"
bitfld.long 0x14 2. "PK2F4,PK2F4" "0,1"
line.long 0x18 "FR5,PK Function Register 5"
bitfld.long 0x18 1. "PK1F5,PK1F5" "0,1"
bitfld.long 0x18 0. "PK0F5,PK0F5" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PK Open Drain Control Register"
bitfld.long 0x0 6. "PK6OD,PK6OD" "0,1"
bitfld.long 0x0 5. "PK5OD,PK5OD" "0,1"
bitfld.long 0x0 4. "PK4OD,PK4OD" "0,1"
bitfld.long 0x0 3. "PK3OD,PK3OD" "0,1"
bitfld.long 0x0 2. "PK2OD,PK2OD" "0,1"
bitfld.long 0x0 1. "PK1OD,PK1OD" "0,1"
bitfld.long 0x0 0. "PK0OD,PK0OD" "0,1"
line.long 0x4 "PUP,PK Pull-up Control Register"
bitfld.long 0x4 6. "PK6UP,PK6UP" "0,1"
bitfld.long 0x4 5. "PK5UP,PK5UP" "0,1"
bitfld.long 0x4 4. "PK4UP,PK4UP" "0,1"
bitfld.long 0x4 3. "PK3UP,PK3UP" "0,1"
bitfld.long 0x4 2. "PK2UP,PK2UP" "0,1"
bitfld.long 0x4 1. "PK1UP,PK1UP" "0,1"
bitfld.long 0x4 0. "PK0UP,PK0UP" "0,1"
line.long 0x8 "PDN,PK Pull-Down Control Register"
bitfld.long 0x8 6. "PK6DN,PK6DN" "0,1"
bitfld.long 0x8 5. "PK5DN,PK5DN" "0,1"
bitfld.long 0x8 4. "PK4DN,PK4DN" "0,1"
bitfld.long 0x8 3. "PK3DN,PK3DN" "0,1"
bitfld.long 0x8 2. "PK2DN,PK2DN" "0,1"
bitfld.long 0x8 1. "PK1DN,PK1DN" "0,1"
bitfld.long 0x8 0. "PK0DN,PK0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PK Input Enable Control Register"
bitfld.long 0x0 6. "PK6IE,PK6IE" "0,1"
bitfld.long 0x0 5. "PK5IE,PK5IE" "0,1"
bitfld.long 0x0 4. "PK4IE,PK4IE" "0,1"
bitfld.long 0x0 3. "PK3IE,PK3IE" "0,1"
bitfld.long 0x0 2. "PK2IE,PK2IE" "0,1"
bitfld.long 0x0 1. "PK1IE,PK1IE" "0,1"
bitfld.long 0x0 0. "PK0IE,PK0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*")||cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PL (Port L)"
base ad:0x400C0A00
group.long 0x0++0x1B
line.long 0x0 "DATA,PL Data Register"
bitfld.long 0x0 4. "PL4,PL4" "0,1"
bitfld.long 0x0 3. "PL3,PL3" "0,1"
bitfld.long 0x0 2. "PL2,PL2" "0,1"
bitfld.long 0x0 1. "PL1,PL1" "0,1"
bitfld.long 0x0 0. "PL0,PL0" "0,1"
line.long 0x4 "CR,PL Control Register"
bitfld.long 0x4 4. "PL4C,PL4C" "0,1"
bitfld.long 0x4 3. "PL3C,PL3C" "0,1"
bitfld.long 0x4 2. "PL2C,PL2C" "0,1"
bitfld.long 0x4 1. "PL1C,PL1C" "0,1"
bitfld.long 0x4 0. "PL0C,PL0C" "0,1"
line.long 0x8 "FR1,PL Function Register 1"
bitfld.long 0x8 3. "PL3F1,PL3F1" "0,1"
bitfld.long 0x8 2. "PL2F1,PL2F1" "0,1"
bitfld.long 0x8 1. "PL1F1,PL1F1" "0,1"
bitfld.long 0x8 0. "PL0F1,PL0F1" "0,1"
line.long 0xC "FR2,PL Function Register 2"
bitfld.long 0xC 3. "PL3F2,PL3F2" "0,1"
bitfld.long 0xC 2. "PL2F2,PL2F2" "0,1"
bitfld.long 0xC 1. "PL1F2,PL1F2" "0,1"
bitfld.long 0xC 0. "PL0F2,PL0F2" "0,1"
line.long 0x10 "FR3,PL Function Register 3"
bitfld.long 0x10 4. "PL4F3,PL4F3" "0,1"
bitfld.long 0x10 3. "PL3F3,PL3F3" "0,1"
bitfld.long 0x10 2. "PL2F3,PL2F3" "0,1"
bitfld.long 0x10 1. "PL1F3,PL1F3" "0,1"
bitfld.long 0x10 0. "PL0F3,PL0F3" "0,1"
line.long 0x14 "FR4,PL Function Register 4"
bitfld.long 0x14 1. "PL1F4,PL1F4" "0,1"
bitfld.long 0x14 0. "PL0F4,PL0F4" "0,1"
line.long 0x18 "FR5,PL Function Register 4"
bitfld.long 0x18 4. "PL4F5,PL4F5" "0,1"
bitfld.long 0x18 3. "PL3F5,PL3F5" "0,1"
bitfld.long 0x18 2. "PL2F5,PL2F5" "0,1"
bitfld.long 0x18 1. "PL1F5,PL1F5" "0,1"
bitfld.long 0x18 0. "PL0F5,PL0F5" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PL Open Drain Control Register"
bitfld.long 0x0 4. "PL4OD,PL4OD" "0,1"
bitfld.long 0x0 3. "PL3OD,PL3OD" "0,1"
bitfld.long 0x0 2. "PL2OD,PL2OD" "0,1"
bitfld.long 0x0 1. "PL1OD,PL1OD" "0,1"
bitfld.long 0x0 0. "PL0OD,PL0OD" "0,1"
line.long 0x4 "PUP,PL Pull-up Control Register"
bitfld.long 0x4 4. "PL4UP,PL4UP" "0,1"
bitfld.long 0x4 3. "PL3UP,PL3UP" "0,1"
bitfld.long 0x4 2. "PL2UP,PL2UP" "0,1"
bitfld.long 0x4 1. "PL1UP,PL1UP" "0,1"
bitfld.long 0x4 0. "PL0UP,PL0UP" "0,1"
line.long 0x8 "PDN,PL Pull-Down Control Register"
bitfld.long 0x8 4. "PL4DN,PL4DN" "0,1"
bitfld.long 0x8 3. "PL3DN,PL3DN" "0,1"
bitfld.long 0x8 2. "PL2DN,PL2DN" "0,1"
bitfld.long 0x8 1. "PL1DN,PL1DN" "0,1"
bitfld.long 0x8 0. "PL0DN,PL0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PL Input Enable Control Register"
bitfld.long 0x0 4. "PL4IE,PL4IE" "0,1"
bitfld.long 0x0 3. "PL3IE,PL3IE" "0,1"
bitfld.long 0x0 2. "PL2IE,PL2IE" "0,1"
bitfld.long 0x0 1. "PL1IE,PL1IE" "0,1"
bitfld.long 0x0 0. "PL0IE,PL0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PM (Port M)"
base ad:0x400C0B00
group.long 0x0++0x1F
line.long 0x0 "DATA,PM Data Register"
bitfld.long 0x0 0. "PM0,PM0" "0,1"
line.long 0x4 "CR,PM Control Register"
bitfld.long 0x4 0. "PM0C,PM0C" "0,1"
line.long 0x8 "FR1,PM Function Register 1"
bitfld.long 0x8 0. "PM0F1,PM0F1" "0,1"
line.long 0xC "FR2,PM Function Register 2"
line.long 0x10 "FR3,PM Function Register 3"
bitfld.long 0x10 0. "PM0F3,PM0F3" "0,1"
line.long 0x14 "FR4,PM Function Register 4"
bitfld.long 0x14 0. "PM0F4,PM0F4" "0,1"
line.long 0x18 "FR5,PM Function Register 5"
bitfld.long 0x18 0. "PM0F5,PM0F5" "0,1"
line.long 0x1C "FR6,PM Function Register 6"
bitfld.long 0x1C 0. "PM0F6,PM0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PM Open Drain Control Register"
bitfld.long 0x0 0. "PM0OD,PM0OD" "0,1"
line.long 0x4 "PUP,PM Pull-up Control Register"
bitfld.long 0x4 0. "PM0UP,PM0UP" "0,1"
line.long 0x8 "PDN,PM Pull-Down Control Register"
bitfld.long 0x8 0. "PM0DN,PM0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PM Input Enable Control Register"
bitfld.long 0x0 0. "PM0IE,PM0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PN (Port N)"
base ad:0x400C0C00
group.long 0x0++0x1B
line.long 0x0 "DATA,PN Data Register"
bitfld.long 0x0 4. "PN4,PN4" "0,1"
bitfld.long 0x0 3. "PN3,PN3" "0,1"
bitfld.long 0x0 2. "PN2,PN2" "0,1"
bitfld.long 0x0 1. "PN1,PN1" "0,1"
line.long 0x4 "CR,PN Control Register"
bitfld.long 0x4 4. "PN4C,PN4C" "0,1"
bitfld.long 0x4 3. "PN3C,PN3C" "0,1"
bitfld.long 0x4 2. "PN2C,PN2C" "0,1"
bitfld.long 0x4 1. "PN1C,PN1C" "0,1"
line.long 0x8 "FR1,PN Function Register 1"
bitfld.long 0x8 4. "PN4F1,PN4F1" "0,1"
bitfld.long 0x8 3. "PN3F1,PN3F1" "0,1"
bitfld.long 0x8 2. "PN2F1,PN2F1" "0,1"
bitfld.long 0x8 1. "PN1F1,PN1F1" "0,1"
line.long 0xC "FR2,PN Function Register 2"
bitfld.long 0xC 3. "PN3F2,PN3F2" "0,1"
bitfld.long 0xC 2. "PN2F2,PN2F2" "0,1"
bitfld.long 0xC 1. "PN1F2,PN1F2" "0,1"
line.long 0x10 "FR3,PN Function Register 3"
bitfld.long 0x10 4. "PN4F3,PN4F3" "0,1"
bitfld.long 0x10 3. "PN3F3,PN3F3" "0,1"
bitfld.long 0x10 2. "PN2F3,PN2F3" "0,1"
bitfld.long 0x10 1. "PN1F3,PN1F3" "0,1"
line.long 0x14 "FR4,PN Function Register 4"
bitfld.long 0x14 2. "PN2F4,PN2F4" "0,1"
bitfld.long 0x14 1. "PN1F4,PN1F4" "0,1"
line.long 0x18 "FR5,PN Function Register 5"
bitfld.long 0x18 3. "PN3F5,PN3F5" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PN Open Drain Control Register"
bitfld.long 0x0 4. "PN4OD,PN4OD" "0,1"
bitfld.long 0x0 3. "PN3OD,PN3OD" "0,1"
bitfld.long 0x0 2. "PN2OD,PN2OD" "0,1"
bitfld.long 0x0 1. "PN1OD,PN1OD" "0,1"
line.long 0x4 "PUP,PN Pull-up Control Register"
bitfld.long 0x4 4. "PN4UP,PN4UP" "0,1"
bitfld.long 0x4 3. "PN3UP,PN3UP" "0,1"
bitfld.long 0x4 2. "PN2UP,PN2UP" "0,1"
bitfld.long 0x4 1. "PN1UP,PN1UP" "0,1"
line.long 0x8 "PDN,PN Pull-Down Control Register"
bitfld.long 0x8 4. "PN4DN,PN4DN" "0,1"
bitfld.long 0x8 3. "PN3DN,PN3DN" "0,1"
bitfld.long 0x8 2. "PN2DN,PN2DN" "0,1"
bitfld.long 0x8 1. "PN1DN,PN1DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PN Input Enable Control Register"
bitfld.long 0x0 4. "PN4IE,PN4IE" "0,1"
bitfld.long 0x0 3. "PN3IE,PN3IE" "0,1"
bitfld.long 0x0 2. "PN2IE,PN2IE" "0,1"
bitfld.long 0x0 1. "PN1IE,PN1IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "PP (Port P)"
base ad:0x400C0D00
group.long 0x0++0xB
line.long 0x0 "DATA,PP Data Register"
bitfld.long 0x0 3. "PP3,PP3" "0,1"
line.long 0x4 "CR,PP Control Register"
bitfld.long 0x4 3. "PP3C,PP3C" "0,1"
line.long 0x8 "FR1,PP Function Register 1"
bitfld.long 0x8 3. "PP3F1,PP3F1" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PP Open Drain Control Register"
bitfld.long 0x0 3. "PP3OD,PP3OD" "0,1"
line.long 0x4 "PUP,PP Pull-up Control Register"
bitfld.long 0x4 3. "PP3UP,PP3UP" "0,1"
line.long 0x8 "PDN,PP Pull-Down Control Register"
bitfld.long 0x8 3. "PP3DN,PP3DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PP Input Enable Control Register"
bitfld.long 0x0 3. "PP3IE,PP3IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PW (Port W)"
base ad:0x400C1200
group.long 0x0++0x7
line.long 0x0 "DATA,PW Data Register"
bitfld.long 0x0 0. "PW0,PW0" "0,1"
line.long 0x4 "CR,PW Control Register"
bitfld.long 0x4 0. "PW0C,PW0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PW Open Drain Control Register"
bitfld.long 0x0 0. "PW0OD,PW0OD" "0,1"
line.long 0x4 "PUP,PW Pull-up Control Register"
bitfld.long 0x4 0. "PW0UP,PW0UP" "0,1"
line.long 0x8 "PDN,PW Pull-Down Control Register"
bitfld.long 0x8 0. "PW0DN,PW0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PV Input Enable Control Register"
bitfld.long 0x0 0. "PW0IE,PW0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PA (Port A)"
base ad:0x400C0000
group.long 0x0++0x1F
line.long 0x0 "DATA,PA Data Register"
bitfld.long 0x0 7. "PA7,PA7" "0,1"
bitfld.long 0x0 6. "PA6,PA6" "0,1"
bitfld.long 0x0 5. "PA5,PA5" "0,1"
bitfld.long 0x0 4. "PA4,PA4" "0,1"
bitfld.long 0x0 3. "PA3,PA3" "0,1"
bitfld.long 0x0 2. "PA2,PA2" "0,1"
bitfld.long 0x0 1. "PA1,PA1" "0,1"
bitfld.long 0x0 0. "PA0,PA0" "0,1"
line.long 0x4 "CR,PA Control Register"
bitfld.long 0x4 7. "PA7C,PA7C" "0,1"
bitfld.long 0x4 6. "PA6C,PA6C" "0,1"
bitfld.long 0x4 5. "PA5C,PA5C" "0,1"
bitfld.long 0x4 4. "PA4C,PA4C" "0,1"
bitfld.long 0x4 3. "PA3C,PA3C" "0,1"
bitfld.long 0x4 2. "PA2C,PA2C" "0,1"
bitfld.long 0x4 1. "PA1C,PA1C" "0,1"
bitfld.long 0x4 0. "PA0C,PA0C" "0,1"
line.long 0x8 "FR1,PA Function Register 1"
bitfld.long 0x8 7. "PA7F1,PA7F1" "0,1"
bitfld.long 0x8 6. "PA6F1,PA6F1" "0,1"
bitfld.long 0x8 5. "PA5F1,PA5F1" "0,1"
bitfld.long 0x8 4. "PA4F1,PA4F1" "0,1"
bitfld.long 0x8 2. "PA2F1,PA2F1" "0,1"
bitfld.long 0x8 1. "PA1F1,PA1F1" "0,1"
bitfld.long 0x8 0. "PA0F1,PA0F1" "0,1"
line.long 0xC "FR2,PA Function Register 2"
bitfld.long 0xC 7. "PA7F2,PA7F2" "0,1"
bitfld.long 0xC 6. "PA6F2,PA6F2" "0,1"
bitfld.long 0xC 5. "PA5F2,PA5F2" "0,1"
bitfld.long 0xC 4. "PA4F2,PA4F2" "0,1"
bitfld.long 0xC 3. "PA3F2,PA3F2" "0,1"
bitfld.long 0xC 2. "PA2F2,PA2F2" "0,1"
bitfld.long 0xC 1. "PA1F2,PA1F2" "0,1"
line.long 0x10 "FR3,PA Function Register 3"
bitfld.long 0x10 4. "PA4F3,PA4F3" "0,1"
bitfld.long 0x10 3. "PA3F3,PA3F3" "0,1"
bitfld.long 0x10 2. "PA2F3,PA2F3" "0,1"
bitfld.long 0x10 1. "PA1F3,PA1F3" "0,1"
bitfld.long 0x10 0. "PA0F3,PA0F3" "0,1"
line.long 0x14 "FR4,PA Function Register 4"
bitfld.long 0x14 5. "PA5F4,PA5F4" "0,1"
bitfld.long 0x14 4. "PA4F4,PA4F4" "0,1"
bitfld.long 0x14 3. "PA3F4,PA3F4" "0,1"
bitfld.long 0x14 2. "PA2F4,PA2F4" "0,1"
bitfld.long 0x14 1. "PA1F4,PA1F4" "0,1"
bitfld.long 0x14 0. "PA0F4,PA0F4" "0,1"
line.long 0x18 "FR5,PA Function Register 5"
bitfld.long 0x18 2. "PA2F5,PA2F5" "0,1"
bitfld.long 0x18 1. "PA1F5,PA1F5" "0,1"
bitfld.long 0x18 0. "PA0F5,PA0F5" "0,1"
line.long 0x1C "FR6,PA Function Register 6"
bitfld.long 0x1C 3. "PA3F6,PA3F6" "0,1"
bitfld.long 0x1C 2. "PA2F6,PA2F6" "0,1"
bitfld.long 0x1C 1. "PA1F6,PA1F6" "0,1"
bitfld.long 0x1C 0. "PA0F6,PA0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PA Open Drain Control Register"
bitfld.long 0x0 7. "PA7OD,PA7OD" "0,1"
bitfld.long 0x0 6. "PA6OD,PA6OD" "0,1"
bitfld.long 0x0 5. "PA5OD,PA5OD" "0,1"
bitfld.long 0x0 4. "PA4OD,PA4OD" "0,1"
bitfld.long 0x0 3. "PA3OD,PA3OD" "0,1"
bitfld.long 0x0 2. "PA2OD,PA2OD" "0,1"
bitfld.long 0x0 1. "PA1OD,PA1OD" "0,1"
bitfld.long 0x0 0. "PA0OD,PA0OD" "0,1"
line.long 0x4 "PUP,PA Pull-up Control Register"
bitfld.long 0x4 7. "PA7UP,PA7UP" "0,1"
bitfld.long 0x4 6. "PA6UP,PA6UP" "0,1"
bitfld.long 0x4 5. "PA5UP,PA5UP" "0,1"
bitfld.long 0x4 4. "PA4UP,PA4UP" "0,1"
bitfld.long 0x4 3. "PA3UP,PA3UP" "0,1"
bitfld.long 0x4 2. "PA2UP,PA2UP" "0,1"
bitfld.long 0x4 1. "PA1UP,PA1UP" "0,1"
bitfld.long 0x4 0. "PA0UP,PA0UP" "0,1"
line.long 0x8 "PDN,PB Pull-Down Control Register"
bitfld.long 0x8 7. "PA7DN,PA7DN" "0,1"
bitfld.long 0x8 6. "PA6DN,PA6DN" "0,1"
bitfld.long 0x8 5. "PA5DN,PA5DN" "0,1"
bitfld.long 0x8 4. "PA4DN,PA4DN" "0,1"
bitfld.long 0x8 3. "PA3DN,PA3DN" "0,1"
bitfld.long 0x8 2. "PA2DN,PA2DN" "0,1"
bitfld.long 0x8 1. "PA1DN,PA1DN" "0,1"
bitfld.long 0x8 0. "PA0DN,PA0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PA Input Enable Control Register"
bitfld.long 0x0 7. "PA7IE,PA7IE" "0,1"
bitfld.long 0x0 6. "PA6IE,PA6IE" "0,1"
bitfld.long 0x0 5. "PA5IE,PA5IE" "0,1"
bitfld.long 0x0 4. "PA4IE,PA4IE" "0,1"
bitfld.long 0x0 3. "PA3IE,PA3IE" "0,1"
bitfld.long 0x0 2. "PA2IE,PA2IE" "0,1"
bitfld.long 0x0 1. "PA1IE,PA1IE" "0,1"
bitfld.long 0x0 0. "PA0IE,PA0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PB (Port B)"
base ad:0x400C0100
group.long 0x0++0x1F
line.long 0x0 "DATA,PB Data Register"
bitfld.long 0x0 4. "PB4,PB4" "0,1"
bitfld.long 0x0 3. "PB3,PB3" "0,1"
bitfld.long 0x0 2. "PB2,PB2" "0,1"
bitfld.long 0x0 1. "PB1,PB1" "0,1"
bitfld.long 0x0 0. "PB0,PB0" "0,1"
line.long 0x4 "CR,PB Control Register"
bitfld.long 0x4 4. "PB4C,PB4C" "0,1"
bitfld.long 0x4 3. "PB3C,PB3C" "0,1"
bitfld.long 0x4 2. "PB2C,PB2C" "0,1"
bitfld.long 0x4 1. "PB1C,PB1C" "0,1"
bitfld.long 0x4 0. "PB0C,PB0C" "0,1"
line.long 0x8 "FR1,PB Function Register 1"
bitfld.long 0x8 4. "PB4F1,PB4F1" "0,1"
bitfld.long 0x8 3. "PB3F1,PB3F1" "0,1"
bitfld.long 0x8 2. "PB2F1,PB2F1" "0,1"
bitfld.long 0x8 1. "PB1F1,PB1F1" "0,1"
line.long 0xC "FR2,PB Function Register 2"
bitfld.long 0xC 4. "PB4F2,PB4F2" "0,1"
bitfld.long 0xC 3. "PB3F2,PB3F2" "0,1"
bitfld.long 0xC 2. "PB2F2,PB2F2" "0,1"
line.long 0x10 "FR3,PB Function Register 3"
bitfld.long 0x10 4. "PB4F3,PB4F3" "0,1"
bitfld.long 0x10 3. "PB3F3,PB3F3" "0,1"
bitfld.long 0x10 2. "PB2F3,PB2F3" "0,1"
line.long 0x14 "FR4,PB Function Register 4"
bitfld.long 0x14 4. "PB4F4,PB4F4" "0,1"
bitfld.long 0x14 3. "PB3F4,PB3F4" "0,1"
bitfld.long 0x14 2. "PB2F4,PB2F4" "0,1"
bitfld.long 0x14 1. "PB1F4,PB1F4" "0,1"
bitfld.long 0x14 0. "PB0F4,PB0F4" "0,1"
line.long 0x18 "FR5,PB Function Register 5"
bitfld.long 0x18 2. "PB2F5,PB2F5" "0,1"
bitfld.long 0x18 1. "PB1F5,PB1F5" "0,1"
bitfld.long 0x18 0. "PB0F5,PB0F5" "0,1"
line.long 0x1C "FR6,PB Function Register 6"
bitfld.long 0x1C 1. "PB1F6,PB1F6" "0,1"
bitfld.long 0x1C 0. "PB0F6,PB0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PB Open Drain Control Register"
bitfld.long 0x0 4. "PB4OD,PB4OD" "0,1"
bitfld.long 0x0 3. "PB3OD,PB3OD" "0,1"
bitfld.long 0x0 2. "PB2OD,PB2OD" "0,1"
bitfld.long 0x0 1. "PB1OD,PB1OD" "0,1"
bitfld.long 0x0 0. "PB0OD,PB0OD" "0,1"
line.long 0x4 "PUP,PB Pull-up Control Register"
bitfld.long 0x4 4. "PB4UP,PB4UP" "0,1"
bitfld.long 0x4 3. "PB3UP,PB3UP" "0,1"
bitfld.long 0x4 2. "PB2UP,PB2UP" "0,1"
bitfld.long 0x4 1. "PB1UP,PB1UP" "0,1"
bitfld.long 0x4 0. "PB0UP,PB0UP" "0,1"
line.long 0x8 "PDN,PB Pull-Down Control Register"
bitfld.long 0x8 4. "PB4DN,PB4DN" "0,1"
bitfld.long 0x8 3. "PB3DN,PB3DN" "0,1"
bitfld.long 0x8 2. "PB2DN,PB2DN" "0,1"
bitfld.long 0x8 1. "PB1DN,PB1DN" "0,1"
bitfld.long 0x8 0. "PB0DN,PB0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PB Input Enable Control Register"
bitfld.long 0x0 4. "PB4IE,PB4IE" "0,1"
bitfld.long 0x0 3. "PB3IE,PB3IE" "0,1"
bitfld.long 0x0 2. "PB2IE,PB2IE" "0,1"
bitfld.long 0x0 1. "PB1IE,PB1IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PC (Port C)"
base ad:0x400C0200
group.long 0x0++0x1F
line.long 0x0 "DATA,PC Data Register"
bitfld.long 0x0 6. "PC6,PC6" "0,1"
bitfld.long 0x0 5. "PC5,PC5" "0,1"
bitfld.long 0x0 4. "PC4,PC4" "0,1"
bitfld.long 0x0 3. "PC3,PC3" "0,1"
bitfld.long 0x0 2. "PC2,PC2" "0,1"
bitfld.long 0x0 1. "PC1,PC1" "0,1"
bitfld.long 0x0 0. "PC0,PC0" "0,1"
line.long 0x4 "CR,PC Control Register"
bitfld.long 0x4 6. "PC6C,PC6C" "0,1"
bitfld.long 0x4 5. "PC5C,PC5C" "0,1"
bitfld.long 0x4 4. "PC4C,PC4C" "0,1"
bitfld.long 0x4 3. "PC3C,PC3C" "0,1"
bitfld.long 0x4 2. "PC2C,PC2C" "0,1"
bitfld.long 0x4 1. "PC1C,PC1C" "0,1"
bitfld.long 0x4 0. "PC0C,PC0C" "0,1"
line.long 0x8 "FR1,PC Function Register 1"
bitfld.long 0x8 6. "PC6F1,PC6F1" "0,1"
bitfld.long 0x8 5. "PC5F1,PC5F1" "0,1"
bitfld.long 0x8 4. "PC4F1,PC4F1" "0,1"
bitfld.long 0x8 3. "PC3F1,PC3F1" "0,1"
bitfld.long 0x8 2. "PC2F1,PC2F1" "0,1"
bitfld.long 0x8 1. "PC1F1,PC1F1" "0,1"
bitfld.long 0x8 0. "PC0F1,PC0F1" "0,1"
line.long 0xC "FR2,PC Function Register 2"
bitfld.long 0xC 6. "PC6F2,PC6F2" "0,1"
bitfld.long 0xC 5. "PC5F2,PC5F2" "0,1"
bitfld.long 0xC 4. "PC4F2,PC4F2" "0,1"
bitfld.long 0xC 3. "PC3F2,PC3F2" "0,1"
bitfld.long 0xC 1. "PC1F2,PC1F2" "0,1"
bitfld.long 0xC 0. "PC0F2,PC0F2" "0,1"
line.long 0x10 "FR3,PC Function Register 3"
bitfld.long 0x10 5. "PC5F3,PC5F3" "0,1"
bitfld.long 0x10 4. "PC4F3,PC4F3" "0,1"
bitfld.long 0x10 3. "PC3F3,PC3F3" "0,1"
bitfld.long 0x10 2. "PC2F3,PC2F3" "0,1"
bitfld.long 0x10 1. "PC1F3,PC1F3" "0,1"
bitfld.long 0x10 0. "PC0F3,PC0F3" "0,1"
line.long 0x14 "FR4,PC Function Register 4"
bitfld.long 0x14 2. "PC2F4,PC2F4" "0,1"
bitfld.long 0x14 1. "PC1F4,PC1F4" "0,1"
bitfld.long 0x14 0. "PC0F4,PC0F4" "0,1"
line.long 0x18 "FR5,PC Function Register 5"
bitfld.long 0x18 2. "PC2F5,PC2F5" "0,1"
line.long 0x1C "FR6,PC Function Register 6"
bitfld.long 0x1C 6. "PC6F6,PC6F6" "0,1"
bitfld.long 0x1C 5. "PC5F6,PC5F6" "0,1"
bitfld.long 0x1C 4. "PC4F6,PC4F6" "0,1"
bitfld.long 0x1C 3. "PC3F6,PC3F6" "0,1"
bitfld.long 0x1C 2. "PC2F6,PC2F6" "0,1"
bitfld.long 0x1C 1. "PC1F6,PC1F6" "0,1"
bitfld.long 0x1C 0. "PC0F6,PC0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PC Open Drain Control Register"
bitfld.long 0x0 6. "PC6OD,PC6OD" "0,1"
bitfld.long 0x0 5. "PC5OD,PC5OD" "0,1"
bitfld.long 0x0 4. "PC4OD,PC4OD" "0,1"
bitfld.long 0x0 3. "PC3OD,PC3OD" "0,1"
bitfld.long 0x0 2. "PC2OD,PC2OD" "0,1"
bitfld.long 0x0 1. "PC1OD,PC1OD" "0,1"
bitfld.long 0x0 0. "PC0OD,PC0OD" "0,1"
line.long 0x4 "PUP,PC Pull-up Control Register"
bitfld.long 0x4 6. "PC6UP,PC6UP" "0,1"
bitfld.long 0x4 5. "PC5UP,PC5UP" "0,1"
bitfld.long 0x4 4. "PC4UP,PC4UP" "0,1"
bitfld.long 0x4 3. "PC3UP,PC3UP" "0,1"
bitfld.long 0x4 2. "PC2UP,PC2UP" "0,1"
bitfld.long 0x4 1. "PC1UP,PC1UP" "0,1"
bitfld.long 0x4 0. "PC0UP,PC0UP" "0,1"
line.long 0x8 "PDN,PC Pull-Down Control Register"
bitfld.long 0x8 6. "PC6DN,PC6DN" "0,1"
bitfld.long 0x8 5. "PC5DN,PC5DN" "0,1"
bitfld.long 0x8 4. "PC4DN,PC4DN" "0,1"
bitfld.long 0x8 3. "PC3DN,PC3DN" "0,1"
bitfld.long 0x8 2. "PC2DN,PC2DN" "0,1"
bitfld.long 0x8 1. "PC1DN,PC1DN" "0,1"
bitfld.long 0x8 0. "PC0DN,PC0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PC Input Enable Control Register"
bitfld.long 0x0 6. "PC6IE,PC6IE" "0,1"
bitfld.long 0x0 5. "PC5IE,PC5IE" "0,1"
bitfld.long 0x0 4. "PC4IE,PC4IE" "0,1"
bitfld.long 0x0 3. "PC3IE,PC3IE" "0,1"
bitfld.long 0x0 2. "PC2IE,PC2IE" "0,1"
bitfld.long 0x0 1. "PC1IE,PC1IE" "0,1"
bitfld.long 0x0 0. "PC0IE,PC0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PJ (Port J)"
base ad:0x400C0800
group.long 0x0++0x1F
line.long 0x0 "DATA,PJ Data Register"
bitfld.long 0x0 5. "PJ5,PJ5" "0,1"
bitfld.long 0x0 4. "PJ4,PJ4" "0,1"
bitfld.long 0x0 3. "PJ3,PJ3" "0,1"
bitfld.long 0x0 2. "PJ2,PJ2" "0,1"
bitfld.long 0x0 1. "PJ1,PJ1" "0,1"
bitfld.long 0x0 0. "PJ0,PJ0" "0,1"
line.long 0x4 "CR,PJ Control Register"
bitfld.long 0x4 5. "PJ5C,PJ5C" "0,1"
bitfld.long 0x4 4. "PJ4C,PJ4C" "0,1"
bitfld.long 0x4 3. "PJ3C,PJ3C" "0,1"
bitfld.long 0x4 2. "PJ2C,PJ2C" "0,1"
bitfld.long 0x4 1. "PJ1C,PJ1C" "0,1"
bitfld.long 0x4 0. "PJ0C,PJ0C" "0,1"
line.long 0x8 "FR1,PJ Function Register 1"
bitfld.long 0x8 4. "PJ4F1,PJ4F1" "0,1"
bitfld.long 0x8 3. "PJ3F1,PJ3F1" "0,1"
bitfld.long 0x8 2. "PJ2F1,PJ2F1" "0,1"
bitfld.long 0x8 1. "PJ1F1,PJ1F1" "0,1"
bitfld.long 0x8 0. "PJ0F1,PJ0F1" "0,1"
line.long 0xC "FR2,PJ Function Register 2"
bitfld.long 0xC 4. "PJ4F2,PJ4F2" "0,1"
bitfld.long 0xC 3. "PJ3F2,PJ3F2" "0,1"
bitfld.long 0xC 2. "PJ2F2,PJ2F2" "0,1"
bitfld.long 0xC 1. "PJ1F2,PJ1F2" "0,1"
line.long 0x10 "FR3,PJ Function Register 3"
bitfld.long 0x10 5. "PJ5F3,PJ5F3" "0,1"
bitfld.long 0x10 4. "PJ4F3,PJ4F3" "0,1"
bitfld.long 0x10 3. "PJ3F3,PJ3F3" "0,1"
bitfld.long 0x10 2. "PJ2F3,PJ2F3" "0,1"
bitfld.long 0x10 1. "PJ1F3,PJ1F3" "0,1"
bitfld.long 0x10 0. "PJ0F3,PJ0F3" "0,1"
line.long 0x14 "FR4,PJ Function Register 4"
bitfld.long 0x14 2. "PJ2F4,PJ2F4" "0,1"
bitfld.long 0x14 1. "PJ1F4,PJ1F4" "0,1"
bitfld.long 0x14 0. "PJ0F4,PJ0F4" "0,1"
line.long 0x18 "FR5,PJ Function Register 5"
bitfld.long 0x18 5. "PJ5F5,PJ5F5" "0,1"
bitfld.long 0x18 4. "PJ4F5,PJ4F5" "0,1"
bitfld.long 0x18 3. "PJ3F5,PJ3F5" "0,1"
bitfld.long 0x18 2. "PJ2F5,PJ2F5" "0,1"
bitfld.long 0x18 1. "PJ1F5,PJ1F5" "0,1"
bitfld.long 0x18 0. "PJ0F5,PJ0F5" "0,1"
line.long 0x1C "FR6,PJ Function Register 6"
bitfld.long 0x1C 5. "PJ5F6,PJ5F6" "0,1"
bitfld.long 0x1C 4. "PJ4F6,PJ4F6" "0,1"
bitfld.long 0x1C 3. "PJ3F6,PJ3F6" "0,1"
bitfld.long 0x1C 2. "PJ2F6,PJ2F6" "0,1"
bitfld.long 0x1C 1. "PJ1F6,PJ1F6" "0,1"
bitfld.long 0x1C 0. "PJ0F6,PJ0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PJ Open Drain Control Register"
bitfld.long 0x0 5. "PJ5OD,PJ5OD" "0,1"
bitfld.long 0x0 4. "PJ4OD,PJ4OD" "0,1"
bitfld.long 0x0 3. "PJ3OD,PJ3OD" "0,1"
bitfld.long 0x0 2. "PJ2OD,PJ2OD" "0,1"
bitfld.long 0x0 1. "PJ1OD,PJ1OD" "0,1"
bitfld.long 0x0 0. "PJ0OD,PJ0OD" "0,1"
line.long 0x4 "PUP,PJ Pull-up Control Register"
bitfld.long 0x4 5. "PJ5UP,PJ5UP" "0,1"
bitfld.long 0x4 4. "PJ4UP,PJ4UP" "0,1"
bitfld.long 0x4 3. "PJ3UP,PJ3UP" "0,1"
bitfld.long 0x4 2. "PJ2UP,PJ2UP" "0,1"
bitfld.long 0x4 1. "PJ1UP,PJ1UP" "0,1"
bitfld.long 0x4 0. "PJ0UP,PJ0UP" "0,1"
line.long 0x8 "PDN,PJ Pull-Down Control Register"
bitfld.long 0x8 5. "PJ5DN,PJ5DN" "0,1"
bitfld.long 0x8 4. "PJ4DN,PJ4DN" "0,1"
bitfld.long 0x8 3. "PJ3DN,PJ3DN" "0,1"
bitfld.long 0x8 2. "PJ2DN,PJ2DN" "0,1"
bitfld.long 0x8 1. "PJ1DN,PJ1DN" "0,1"
bitfld.long 0x8 0. "PJ0DN,PJ0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PJ Input Enable Control Register"
bitfld.long 0x0 5. "PJ5IE,PJ5IE" "0,1"
bitfld.long 0x0 4. "PJ4IE,PJ4IE" "0,1"
bitfld.long 0x0 3. "PJ3IE,PJ3IE" "0,1"
bitfld.long 0x0 2. "PJ2IE,PJ2IE" "0,1"
bitfld.long 0x0 1. "PJ1IE,PJ1IE" "0,1"
bitfld.long 0x0 0. "PJ0IE,PJ0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PK (Port K)"
base ad:0x400C0900
group.long 0x0++0x1F
line.long 0x0 "DATA,PK Data Register"
bitfld.long 0x0 7. "PK7,PK7" "0,1"
bitfld.long 0x0 6. "PK6,PK6" "0,1"
bitfld.long 0x0 5. "PK5,PK5" "0,1"
bitfld.long 0x0 4. "PK4,PK4" "0,1"
bitfld.long 0x0 3. "PK3,PK3" "0,1"
bitfld.long 0x0 2. "PK2,PK2" "0,1"
bitfld.long 0x0 1. "PK1,PK1" "0,1"
bitfld.long 0x0 0. "PK0,PK0" "0,1"
line.long 0x4 "CR,PK Control Register"
bitfld.long 0x4 7. "PK7C,PK7C" "0,1"
bitfld.long 0x4 6. "PK6C,PK6C" "0,1"
bitfld.long 0x4 5. "PK5C,PK5C" "0,1"
bitfld.long 0x4 4. "PK4C,PK4C" "0,1"
bitfld.long 0x4 3. "PK3C,PK3C" "0,1"
bitfld.long 0x4 2. "PK2C,PK2C" "0,1"
bitfld.long 0x4 1. "PK1C,PK1C" "0,1"
bitfld.long 0x4 0. "PK0C,PK0C" "0,1"
line.long 0x8 "FR1,PK Function Register 1"
bitfld.long 0x8 7. "PK7F1,PK7F1" "0,1"
bitfld.long 0x8 6. "PK6F1,PK6F1" "0,1"
bitfld.long 0x8 5. "PK5F1,PK5F1" "0,1"
bitfld.long 0x8 4. "PK4F1,PK4F1" "0,1"
bitfld.long 0x8 3. "PK3F1,PK3F1" "0,1"
bitfld.long 0x8 2. "PK2F1,PK2F1" "0,1"
bitfld.long 0x8 1. "PK1F1,PK1F1" "0,1"
bitfld.long 0x8 0. "PK0F1,PK0F1" "0,1"
line.long 0xC "FR2,PK Function Register 2"
bitfld.long 0xC 6. "PK6F2,PK6F2" "0,1"
bitfld.long 0xC 5. "PK5F2,PK5F2" "0,1"
bitfld.long 0xC 4. "PK4F2,PK4F2" "0,1"
bitfld.long 0xC 3. "PK3F2,PK3F2" "0,1"
bitfld.long 0xC 2. "PK2F2,PK2F2" "0,1"
bitfld.long 0xC 1. "PK1F2,PK1F2" "0,1"
line.long 0x10 "FR3,PK Function Register 3"
bitfld.long 0x10 7. "PK7F3,PK7F3" "0,1"
bitfld.long 0x10 6. "PK6F3,PK6F3" "0,1"
bitfld.long 0x10 5. "PK5F3,PK5F3" "0,1"
bitfld.long 0x10 4. "PK4F3,PK4F3" "0,1"
bitfld.long 0x10 3. "PK3F3,PK3F3" "0,1"
bitfld.long 0x10 2. "PK2F3,PK2F3" "0,1"
line.long 0x14 "FR4,PK Function Register 4"
bitfld.long 0x14 4. "PK4F4,PK4F4" "0,1"
bitfld.long 0x14 3. "PK3F4,PK3F4" "0,1"
bitfld.long 0x14 2. "PK2F4,PK2F4" "0,1"
line.long 0x18 "FR5,PK Function Register 5"
bitfld.long 0x18 1. "PK1F5,PK1F5" "0,1"
bitfld.long 0x18 0. "PK0F5,PK0F5" "0,1"
line.long 0x1C "FR6,PK Function Register 6"
bitfld.long 0x1C 7. "PK7F6,PK7F6" "0,1"
bitfld.long 0x1C 6. "PK6F6,PK6F6" "0,1"
bitfld.long 0x1C 5. "PK5F6,PK5F6" "0,1"
bitfld.long 0x1C 4. "PK4F6,PK4F6" "0,1"
bitfld.long 0x1C 3. "PK3F6,PK3F6" "0,1"
bitfld.long 0x1C 2. "PK2F6,PK2F6" "0,1"
bitfld.long 0x1C 1. "PK1F6,PK1F6" "0,1"
bitfld.long 0x1C 0. "PK0F6,PK0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PK Open Drain Control Register"
bitfld.long 0x0 7. "PK7OD,PK7OD" "0,1"
bitfld.long 0x0 6. "PK6OD,PK6OD" "0,1"
bitfld.long 0x0 5. "PK5OD,PK5OD" "0,1"
bitfld.long 0x0 4. "PK4OD,PK4OD" "0,1"
bitfld.long 0x0 3. "PK3OD,PK3OD" "0,1"
bitfld.long 0x0 2. "PK2OD,PK2OD" "0,1"
bitfld.long 0x0 1. "PK1OD,PK1OD" "0,1"
bitfld.long 0x0 0. "PK0OD,PK0OD" "0,1"
line.long 0x4 "PUP,PK Pull-up Control Register"
bitfld.long 0x4 7. "PK7UP,PK7UP" "0,1"
bitfld.long 0x4 6. "PK6UP,PK6UP" "0,1"
bitfld.long 0x4 5. "PK5UP,PK5UP" "0,1"
bitfld.long 0x4 4. "PK4UP,PK4UP" "0,1"
bitfld.long 0x4 3. "PK3UP,PK3UP" "0,1"
bitfld.long 0x4 2. "PK2UP,PK2UP" "0,1"
bitfld.long 0x4 1. "PK1UP,PK1UP" "0,1"
bitfld.long 0x4 0. "PK0UP,PK0UP" "0,1"
line.long 0x8 "PDN,PK Pull-Down Control Register"
bitfld.long 0x8 7. "PK7DN,PK7DN" "0,1"
bitfld.long 0x8 6. "PK6DN,PK6DN" "0,1"
bitfld.long 0x8 5. "PK5DN,PK5DN" "0,1"
bitfld.long 0x8 4. "PK4DN,PK4DN" "0,1"
bitfld.long 0x8 3. "PK3DN,PK3DN" "0,1"
bitfld.long 0x8 2. "PK2DN,PK2DN" "0,1"
bitfld.long 0x8 1. "PK1DN,PK1DN" "0,1"
bitfld.long 0x8 0. "PK0DN,PK0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PK Input Enable Control Register"
bitfld.long 0x0 7. "PK7IE,PK7IE" "0,1"
bitfld.long 0x0 6. "PK6IE,PK6IE" "0,1"
bitfld.long 0x0 5. "PK5IE,PK5IE" "0,1"
bitfld.long 0x0 4. "PK4IE,PK4IE" "0,1"
bitfld.long 0x0 3. "PK3IE,PK3IE" "0,1"
bitfld.long 0x0 2. "PK2IE,PK2IE" "0,1"
bitfld.long 0x0 1. "PK1IE,PK1IE" "0,1"
bitfld.long 0x0 0. "PK0IE,PK0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PM (Port M)"
base ad:0x400C0B00
group.long 0x0++0x1F
line.long 0x0 "DATA,PM Data Register"
bitfld.long 0x0 2. "PM2,PM2" "0,1"
bitfld.long 0x0 1. "PM1,PM1" "0,1"
bitfld.long 0x0 0. "PM0,PM0" "0,1"
line.long 0x4 "CR,PM Control Register"
bitfld.long 0x4 2. "PM2C,PM2C" "0,1"
bitfld.long 0x4 1. "PM1C,PM1C" "0,1"
bitfld.long 0x4 0. "PM0C,PM0C" "0,1"
line.long 0x8 "FR1,PM Function Register 1"
bitfld.long 0x8 2. "PM2F1,PM2F1" "0,1"
bitfld.long 0x8 1. "PM1F1,PM1F1" "0,1"
bitfld.long 0x8 0. "PM0F1,PM0F1" "0,1"
line.long 0xC "FR2,PM Function Register 2"
bitfld.long 0xC 2. "PM2F2,PM2F2" "0,1"
bitfld.long 0xC 1. "PM1F2,PM1F2" "0,1"
line.long 0x10 "FR3,PM Function Register 3"
bitfld.long 0x10 2. "PM2F3,PM2F3" "0,1"
bitfld.long 0x10 1. "PM1F3,PM1F3" "0,1"
bitfld.long 0x10 0. "PM0F3,PM0F3" "0,1"
line.long 0x14 "FR4,PM Function Register 4"
bitfld.long 0x14 2. "PM2F4,PM2F4" "0,1"
bitfld.long 0x14 1. "PM1F4,PM1F4" "0,1"
bitfld.long 0x14 0. "PM0F4,PM0F4" "0,1"
line.long 0x18 "FR5,PM Function Register 5"
bitfld.long 0x18 2. "PM2F5,PM2F5" "0,1"
bitfld.long 0x18 1. "PM1F5,PM1F5" "0,1"
bitfld.long 0x18 0. "PM0F5,PM0F5" "0,1"
line.long 0x1C "FR6,PM Function Register 6"
bitfld.long 0x1C 2. "PM2F6,PM2F6" "0,1"
bitfld.long 0x1C 1. "PM1F6,PM1F6" "0,1"
bitfld.long 0x1C 0. "PM0F6,PM0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PM Open Drain Control Register"
bitfld.long 0x0 2. "PM2OD,PM2OD" "0,1"
bitfld.long 0x0 1. "PM1OD,PM1OD" "0,1"
bitfld.long 0x0 0. "PM0OD,PM0OD" "0,1"
line.long 0x4 "PUP,PM Pull-up Control Register"
bitfld.long 0x4 2. "PM2UP,PM2UP" "0,1"
bitfld.long 0x4 1. "PM1UP,PM1UP" "0,1"
bitfld.long 0x4 0. "PM0UP,PM0UP" "0,1"
line.long 0x8 "PDN,PM Pull-Down Control Register"
bitfld.long 0x8 2. "PM2DN,PM2DN" "0,1"
bitfld.long 0x8 1. "PM1DN,PM1DN" "0,1"
bitfld.long 0x8 0. "PM0DN,PM0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PM Input Enable Control Register"
bitfld.long 0x0 2. "PM2IE,PM2IE" "0,1"
bitfld.long 0x0 1. "PM1IE,PM1IE" "0,1"
bitfld.long 0x0 0. "PM0IE,PM0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PN (Port N)"
base ad:0x400C0C00
group.long 0x0++0x1F
line.long 0x0 "DATA,PN Data Register"
bitfld.long 0x0 4. "PN4,PN4" "0,1"
bitfld.long 0x0 3. "PN3,PN3" "0,1"
bitfld.long 0x0 2. "PN2,PN2" "0,1"
bitfld.long 0x0 1. "PN1,PN1" "0,1"
bitfld.long 0x0 0. "PN0,PN0" "0,1"
line.long 0x4 "CR,PN Control Register"
bitfld.long 0x4 4. "PN4C,PN4C" "0,1"
bitfld.long 0x4 3. "PN3C,PN3C" "0,1"
bitfld.long 0x4 2. "PN2C,PN2C" "0,1"
bitfld.long 0x4 1. "PN1C,PN1C" "0,1"
bitfld.long 0x4 0. "PN0C,PN0C" "0,1"
line.long 0x8 "FR1,PN Function Register 1"
bitfld.long 0x8 4. "PN4F1,PN4F1" "0,1"
bitfld.long 0x8 3. "PN3F1,PN3F1" "0,1"
bitfld.long 0x8 2. "PN2F1,PN2F1" "0,1"
bitfld.long 0x8 1. "PN1F1,PN1F1" "0,1"
bitfld.long 0x8 0. "PN0F1,PN0F1" "0,1"
line.long 0xC "FR2,PN Function Register 2"
bitfld.long 0xC 3. "PN3F2,PN3F2" "0,1"
bitfld.long 0xC 2. "PN2F2,PN2F2" "0,1"
bitfld.long 0xC 1. "PN1F2,PN1F2" "0,1"
bitfld.long 0xC 0. "PN0F2,PN0F2" "0,1"
line.long 0x10 "FR3,PN Function Register 3"
bitfld.long 0x10 4. "PN4F3,PN4F3" "0,1"
bitfld.long 0x10 3. "PN3F3,PN3F3" "0,1"
bitfld.long 0x10 2. "PN2F3,PN2F3" "0,1"
bitfld.long 0x10 1. "PN1F3,PN1F3" "0,1"
bitfld.long 0x10 0. "PN0F3,PN0F3" "0,1"
line.long 0x14 "FR4,PN Function Register 4"
bitfld.long 0x14 2. "PN2F4,PN2F4" "0,1"
bitfld.long 0x14 1. "PN1F4,PN1F4" "0,1"
bitfld.long 0x14 0. "PN0F4,PN0F4" "0,1"
line.long 0x18 "FR5,PN Function Register 5"
bitfld.long 0x18 3. "PN3F5,PN3F5" "0,1"
line.long 0x1C "FR6,PN Function Register 6"
bitfld.long 0x1C 4. "PN4F6,PN4F6" "0,1"
bitfld.long 0x1C 3. "PN3F6,PN3F6" "0,1"
bitfld.long 0x1C 2. "PN2F6,PN2F6" "0,1"
bitfld.long 0x1C 1. "PN1F6,PN1F6" "0,1"
bitfld.long 0x1C 0. "PN0F6,PN0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PN Open Drain Control Register"
bitfld.long 0x0 4. "PN4OD,PN4OD" "0,1"
bitfld.long 0x0 3. "PN3OD,PN3OD" "0,1"
bitfld.long 0x0 2. "PN2OD,PN2OD" "0,1"
bitfld.long 0x0 1. "PN1OD,PN1OD" "0,1"
bitfld.long 0x0 0. "PN0OD,PN0OD" "0,1"
line.long 0x4 "PUP,PN Pull-up Control Register"
bitfld.long 0x4 4. "PN4UP,PN4UP" "0,1"
bitfld.long 0x4 3. "PN3UP,PN3UP" "0,1"
bitfld.long 0x4 2. "PN2UP,PN2UP" "0,1"
bitfld.long 0x4 1. "PN1UP,PN1UP" "0,1"
bitfld.long 0x4 0. "PN0UP,PN0UP" "0,1"
line.long 0x8 "PDN,PN Pull-Down Control Register"
bitfld.long 0x8 4. "PN4DN,PN4DN" "0,1"
bitfld.long 0x8 3. "PN3DN,PN3DN" "0,1"
bitfld.long 0x8 2. "PN2DN,PN2DN" "0,1"
bitfld.long 0x8 1. "PN1DN,PN1DN" "0,1"
bitfld.long 0x8 0. "PN0DN,PN0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PN Input Enable Control Register"
bitfld.long 0x0 4. "PN4IE,PN4IE" "0,1"
bitfld.long 0x0 3. "PN3IE,PN3IE" "0,1"
bitfld.long 0x0 2. "PN2IE,PN2IE" "0,1"
bitfld.long 0x0 1. "PN1IE,PN1IE" "0,1"
bitfld.long 0x0 0. "PN0IE,PN0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*"))
tree "PP (Port P)"
base ad:0x400C0D00
group.long 0x0++0x17
line.long 0x0 "DATA,PP Data Register"
bitfld.long 0x0 6. "PP6,PP6" "0,1"
bitfld.long 0x0 5. "PP5,PP5" "0,1"
bitfld.long 0x0 4. "PP4,PP4" "0,1"
bitfld.long 0x0 3. "PP3,PP3" "0,1"
bitfld.long 0x0 2. "PP2,PP2" "0,1"
bitfld.long 0x0 1. "PP1,PP1" "0,1"
bitfld.long 0x0 0. "PP0,PP0" "0,1"
line.long 0x4 "CR,PP Control Register"
bitfld.long 0x4 6. "PP6C,PP6C" "0,1"
bitfld.long 0x4 5. "PP5C,PP5C" "0,1"
bitfld.long 0x4 4. "PP4C,PP4C" "0,1"
bitfld.long 0x4 3. "PP3C,PP3C" "0,1"
bitfld.long 0x4 2. "PP2C,PP2C" "0,1"
bitfld.long 0x4 1. "PP1C,PP1C" "0,1"
bitfld.long 0x4 0. "PP0C,PP0C" "0,1"
line.long 0x8 "FR1,PP Function Register 1"
bitfld.long 0x8 6. "PP6F1,PP6F1" "0,1"
bitfld.long 0x8 5. "PP5F1,PP5F1" "0,1"
bitfld.long 0x8 4. "PP4F1,PP4F1" "0,1"
bitfld.long 0x8 3. "PP3F1,PP3F1" "0,1"
line.long 0xC "FR2,PP Function Register 2"
bitfld.long 0xC 6. "PP6F2,PP6F2" "0,1"
bitfld.long 0xC 2. "PP2F2,PP2F2" "0,1"
bitfld.long 0xC 1. "PP1F2,PP1F2" "0,1"
bitfld.long 0xC 0. "PP0F2,PP0F2" "0,1"
line.long 0x10 "FR3,PP Function Register 3"
bitfld.long 0x10 6. "PP6F3,PP6F3" "0,1"
bitfld.long 0x10 2. "PP2F3,PP2F3" "0,1"
bitfld.long 0x10 1. "PP1F3,PP1F3" "0,1"
bitfld.long 0x10 0. "PP0F3,PP0F3" "0,1"
line.long 0x14 "FR4,PP Function Register 4"
bitfld.long 0x14 2. "PP2F4,PP2F4" "0,1"
bitfld.long 0x14 1. "PP1F4,PP1F4" "0,1"
bitfld.long 0x14 0. "PP0F4,PP0F4" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PP Function Register 6"
bitfld.long 0x0 6. "PP6F6,PP6F6" "0,1"
bitfld.long 0x0 5. "PP5F6,PP5F6" "0,1"
bitfld.long 0x0 4. "PP4F6,PP4F6" "0,1"
bitfld.long 0x0 3. "PP3F6,PP3F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PP Open Drain Control Register"
bitfld.long 0x0 6. "PP6OD,PP6OD" "0,1"
bitfld.long 0x0 5. "PP5OD,PP5OD" "0,1"
bitfld.long 0x0 4. "PP4OD,PP4OD" "0,1"
bitfld.long 0x0 3. "PP3OD,PP3OD" "0,1"
bitfld.long 0x0 2. "PP2OD,PP2OD" "0,1"
bitfld.long 0x0 1. "PP1OD,PP1OD" "0,1"
bitfld.long 0x0 0. "PP0OD,PP0OD" "0,1"
line.long 0x4 "PUP,PP Pull-up Control Register"
bitfld.long 0x4 6. "PP6UP,PP6UP" "0,1"
bitfld.long 0x4 5. "PP5UP,PP5UP" "0,1"
bitfld.long 0x4 4. "PP4UP,PP4UP" "0,1"
bitfld.long 0x4 3. "PP3UP,PP3UP" "0,1"
bitfld.long 0x4 2. "PP2UP,PP2UP" "0,1"
bitfld.long 0x4 1. "PP1UP,PP1UP" "0,1"
bitfld.long 0x4 0. "PP0UP,PP0UP" "0,1"
line.long 0x8 "PDN,PP Pull-Down Control Register"
bitfld.long 0x8 6. "PP6DN,PP6DN" "0,1"
bitfld.long 0x8 5. "PP5DN,PP5DN" "0,1"
bitfld.long 0x8 4. "PP4DN,PP4DN" "0,1"
bitfld.long 0x8 3. "PP3DN,PP3DN" "0,1"
bitfld.long 0x8 2. "PP2DN,PP2DN" "0,1"
bitfld.long 0x8 1. "PP1DN,PP1DN" "0,1"
bitfld.long 0x8 0. "PP0DN,PP0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PP Input Enable Control Register"
bitfld.long 0x0 6. "PP6IE,PP6IE" "0,1"
bitfld.long 0x0 5. "PP5IE,PP5IE" "0,1"
bitfld.long 0x0 4. "PP4IE,PP4IE" "0,1"
bitfld.long 0x0 3. "PP3IE,PP3IE" "0,1"
bitfld.long 0x0 2. "PP2IE,PP2IE" "0,1"
bitfld.long 0x0 1. "PP1IE,PP1IE" "0,1"
bitfld.long 0x0 0. "PP0IE,PP0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PB (Port B)"
base ad:0x400C0100
group.long 0x0++0x1F
line.long 0x0 "DATA,PB Data Register"
bitfld.long 0x0 7. "PB7,PB7" "0,1"
bitfld.long 0x0 6. "PB6,PB6" "0,1"
bitfld.long 0x0 5. "PB5,PB5" "0,1"
bitfld.long 0x0 4. "PB4,PB4" "0,1"
bitfld.long 0x0 3. "PB3,PB3" "0,1"
bitfld.long 0x0 2. "PB2,PB2" "0,1"
bitfld.long 0x0 1. "PB1,PB1" "0,1"
bitfld.long 0x0 0. "PB0,PB0" "0,1"
line.long 0x4 "CR,PB Control Register"
bitfld.long 0x4 7. "PB7C,PB7C" "0,1"
bitfld.long 0x4 6. "PB6C,PB6C" "0,1"
bitfld.long 0x4 5. "PB5C,PB5C" "0,1"
bitfld.long 0x4 4. "PB4C,PB4C" "0,1"
bitfld.long 0x4 3. "PB3C,PB3C" "0,1"
bitfld.long 0x4 2. "PB2C,PB2C" "0,1"
bitfld.long 0x4 1. "PB1C,PB1C" "0,1"
bitfld.long 0x4 0. "PB0C,PB0C" "0,1"
line.long 0x8 "FR1,PB Function Register 1"
bitfld.long 0x8 5. "PB5F1,PB5F1" "0,1"
bitfld.long 0x8 4. "PB4F1,PB4F1" "0,1"
bitfld.long 0x8 3. "PB3F1,PB3F1" "0,1"
bitfld.long 0x8 2. "PB2F1,PB2F1" "0,1"
bitfld.long 0x8 1. "PB1F1,PB1F1" "0,1"
line.long 0xC "FR2,PB Function Register 2"
bitfld.long 0xC 5. "PB5F2,PB5F2" "0,1"
bitfld.long 0xC 4. "PB4F2,PB4F2" "0,1"
bitfld.long 0xC 3. "PB3F2,PB3F2" "0,1"
bitfld.long 0xC 2. "PB2F2,PB2F2" "0,1"
line.long 0x10 "FR3,PB Function Register 3"
bitfld.long 0x10 6. "PB6F3,PB6F3" "0,1"
bitfld.long 0x10 5. "PB5F3,PB5F3" "0,1"
bitfld.long 0x10 4. "PB4F3,PB4F3" "0,1"
bitfld.long 0x10 3. "PB3F3,PB3F3" "0,1"
bitfld.long 0x10 2. "PB2F3,PB2F3" "0,1"
line.long 0x14 "FR4,PB Function Register 4"
bitfld.long 0x14 5. "PB5F4,PB5F4" "0,1"
bitfld.long 0x14 4. "PB4F4,PB4F4" "0,1"
bitfld.long 0x14 3. "PB3F4,PB3F4" "0,1"
bitfld.long 0x14 2. "PB2F4,PB2F4" "0,1"
bitfld.long 0x14 1. "PB1F4,PB1F4" "0,1"
bitfld.long 0x14 0. "PB0F4,PB0F4" "0,1"
line.long 0x18 "FR5,PB Function Register 5"
bitfld.long 0x18 5. "PB5F5,PB5F5" "0,1"
bitfld.long 0x18 2. "PB2F5,PB2F5" "0,1"
bitfld.long 0x18 1. "PB1F5,PB1F5" "0,1"
bitfld.long 0x18 0. "PB0F5,PB0F5" "0,1"
line.long 0x1C "FR6,PB Function Register 6"
bitfld.long 0x1C 1. "PB1F6,PB1F6" "0,1"
bitfld.long 0x1C 0. "PB0F6,PB0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PB Open Drain Control Register"
bitfld.long 0x0 7. "PB7OD,PB7OD" "0,1"
bitfld.long 0x0 6. "PB6OD,PB6OD" "0,1"
bitfld.long 0x0 5. "PB5OD,PB5OD" "0,1"
bitfld.long 0x0 4. "PB4OD,PB4OD" "0,1"
bitfld.long 0x0 3. "PB3OD,PB3OD" "0,1"
bitfld.long 0x0 2. "PB2OD,PB2OD" "0,1"
bitfld.long 0x0 1. "PB1OD,PB1OD" "0,1"
bitfld.long 0x0 0. "PB0OD,PB0OD" "0,1"
line.long 0x4 "PUP,PB Pull-up Control Register"
bitfld.long 0x4 7. "PB7UP,PB7UP" "0,1"
bitfld.long 0x4 6. "PB6UP,PB6UP" "0,1"
bitfld.long 0x4 5. "PB5UP,PB5UP" "0,1"
bitfld.long 0x4 4. "PB4UP,PB4UP" "0,1"
bitfld.long 0x4 3. "PB3UP,PB3UP" "0,1"
bitfld.long 0x4 2. "PB2UP,PB2UP" "0,1"
bitfld.long 0x4 1. "PB1UP,PB1UP" "0,1"
bitfld.long 0x4 0. "PB0UP,PB0UP" "0,1"
line.long 0x8 "PDN,PB Pull-Down Control Register"
bitfld.long 0x8 7. "PB7DN,PB7DN" "0,1"
bitfld.long 0x8 6. "PB6DN,PB6DN" "0,1"
bitfld.long 0x8 5. "PB5DN,PB5DN" "0,1"
bitfld.long 0x8 4. "PB4DN,PB4DN" "0,1"
bitfld.long 0x8 3. "PB3DN,PB3DN" "0,1"
bitfld.long 0x8 2. "PB2DN,PB2DN" "0,1"
bitfld.long 0x8 1. "PB1DN,PB1DN" "0,1"
bitfld.long 0x8 0. "PB0DN,PB0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PB Input Enable Control Register"
bitfld.long 0x0 7. "PB7IE,PB7IE" "0,1"
bitfld.long 0x0 6. "PB6IE,PB6IE" "0,1"
bitfld.long 0x0 5. "PB5IE,PB5IE" "0,1"
bitfld.long 0x0 4. "PB4IE,PB4IE" "0,1"
bitfld.long 0x0 3. "PB3IE,PB3IE" "0,1"
bitfld.long 0x0 2. "PB2IE,PB2IE" "0,1"
bitfld.long 0x0 1. "PB1IE,PB1IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
tree "PD (Port D)"
base ad:0x400C0300
group.long 0x0++0x7
line.long 0x0 "DATA,PD Data Register"
bitfld.long 0x0 3. "PD3,PD3" "0,1"
bitfld.long 0x0 2. "PD2,PD2" "0,1"
bitfld.long 0x0 1. "PD1,PD1" "0,1"
bitfld.long 0x0 0. "PD0,PD0" "0,1"
line.long 0x4 "CR,PD Control Register"
bitfld.long 0x4 3. "PD3C,PD3C" "0,1"
bitfld.long 0x4 2. "PD2C,PD2C" "0,1"
bitfld.long 0x4 1. "PD1C,PD1C" "0,1"
bitfld.long 0x4 0. "PD0C,PD0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PD Open Drain Control Register"
bitfld.long 0x0 3. "PD3OD,PD3OD" "0,1"
bitfld.long 0x0 2. "PD2OD,PD2OD" "0,1"
bitfld.long 0x0 1. "PD1OD,PD1OD" "0,1"
bitfld.long 0x0 0. "PD0OD,PD0OD" "0,1"
line.long 0x4 "PUP,PD Pull-up Control Register"
bitfld.long 0x4 3. "PD3UP,PD3UP" "0,1"
bitfld.long 0x4 2. "PD2UP,PD2UP" "0,1"
bitfld.long 0x4 1. "PD1UP,PD1UP" "0,1"
bitfld.long 0x4 0. "PD0UP,PD0UP" "0,1"
line.long 0x8 "PDN,PD Pull-Down Control Register"
bitfld.long 0x8 3. "PD3DN,PD3DN" "0,1"
bitfld.long 0x8 2. "PD2DN,PD2DN" "0,1"
bitfld.long 0x8 1. "PD1DN,PD1DN" "0,1"
bitfld.long 0x8 0. "PD0DN,PD0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PD Input Enable Control Register"
bitfld.long 0x0 3. "PD3IE,PD3IE" "0,1"
bitfld.long 0x0 2. "PD2IE,PD2IE" "0,1"
bitfld.long 0x0 1. "PD1IE,PD1IE" "0,1"
bitfld.long 0x0 0. "PD0IE,PD0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "PF (Port F)"
base ad:0x400C0500
group.long 0x0++0x7
line.long 0x0 "DATA,PF Data Register"
bitfld.long 0x0 5. "PF5,PF5" "0,1"
bitfld.long 0x0 4. "PF4,PF4" "0,1"
bitfld.long 0x0 3. "PF3,PF3" "0,1"
bitfld.long 0x0 2. "PF2,PF2" "0,1"
bitfld.long 0x0 1. "PF1,PF1" "0,1"
bitfld.long 0x0 0. "PF0,PF0" "0,1"
line.long 0x4 "CR,PF Control Register"
bitfld.long 0x4 5. "PF5C,PF5C" "0,1"
bitfld.long 0x4 4. "PF4C,PF4C" "0,1"
bitfld.long 0x4 3. "PF3C,PF3C" "0,1"
bitfld.long 0x4 2. "PF2C,PF2C" "0,1"
bitfld.long 0x4 1. "PF1C,PF1C" "0,1"
bitfld.long 0x4 0. "PF0C,PF0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PF Open Drain Control Register"
bitfld.long 0x0 5. "PF5OD,PF5OD" "0,1"
bitfld.long 0x0 4. "PF4OD,PF4OD" "0,1"
bitfld.long 0x0 3. "PF3OD,PF3OD" "0,1"
bitfld.long 0x0 2. "PF2OD,PF2OD" "0,1"
bitfld.long 0x0 1. "PF1OD,PF1OD" "0,1"
bitfld.long 0x0 0. "PF0OD,PF0OD" "0,1"
line.long 0x4 "PUP,PF Pull-up Control Register"
bitfld.long 0x4 5. "PF5UP,PF5UP" "0,1"
bitfld.long 0x4 4. "PF4UP,PF4UP" "0,1"
bitfld.long 0x4 3. "PF3UP,PF3UP" "0,1"
bitfld.long 0x4 2. "PF2UP,PF2UP" "0,1"
bitfld.long 0x4 1. "PF1UP,PF1UP" "0,1"
bitfld.long 0x4 0. "PF0UP,PF0UP" "0,1"
line.long 0x8 "PDN,PF Pull-Down Control Register"
bitfld.long 0x8 5. "PF5DN,PF5DN" "0,1"
bitfld.long 0x8 4. "PF4DN,PF4DN" "0,1"
bitfld.long 0x8 3. "PF3DN,PF3DN" "0,1"
bitfld.long 0x8 2. "PF2DN,PF2DN" "0,1"
bitfld.long 0x8 1. "PF1DN,PF1DN" "0,1"
bitfld.long 0x8 0. "PF0DN,PF0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PF Input Enable Control Register"
bitfld.long 0x0 5. "PF5IE,PF5IE" "0,1"
bitfld.long 0x0 4. "PF4IE,PF4IE" "0,1"
bitfld.long 0x0 3. "PF3IE,PF3IE" "0,1"
bitfld.long 0x0 2. "PF2IE,PF2IE" "0,1"
bitfld.long 0x0 1. "PF1IE,PF1IE" "0,1"
bitfld.long 0x0 0. "PF0IE,PF0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "PL (Port L)"
base ad:0x400C0A00
group.long 0x0++0x1B
line.long 0x0 "DATA,PL Data Register"
bitfld.long 0x0 6. "PL6,PL6" "0,1"
bitfld.long 0x0 5. "PL5,PL5" "0,1"
bitfld.long 0x0 4. "PL4,PL4" "0,1"
bitfld.long 0x0 3. "PL3,PL3" "0,1"
bitfld.long 0x0 2. "PL2,PL2" "0,1"
bitfld.long 0x0 1. "PL1,PL1" "0,1"
bitfld.long 0x0 0. "PL0,PL0" "0,1"
line.long 0x4 "CR,PL Control Register"
bitfld.long 0x4 6. "PL6C,PL6C" "0,1"
bitfld.long 0x4 5. "PL5C,PL5C" "0,1"
bitfld.long 0x4 4. "PL4C,PL4C" "0,1"
bitfld.long 0x4 3. "PL3C,PL3C" "0,1"
bitfld.long 0x4 2. "PL2C,PL2C" "0,1"
bitfld.long 0x4 1. "PL1C,PL1C" "0,1"
bitfld.long 0x4 0. "PL0C,PL0C" "0,1"
line.long 0x8 "FR1,PL Function Register 1"
bitfld.long 0x8 3. "PL3F1,PL3F1" "0,1"
bitfld.long 0x8 2. "PL2F1,PL2F1" "0,1"
bitfld.long 0x8 1. "PL1F1,PL1F1" "0,1"
bitfld.long 0x8 0. "PL0F1,PL0F1" "0,1"
line.long 0xC "FR2,PL Function Register 2"
bitfld.long 0xC 3. "PL3F2,PL3F2" "0,1"
bitfld.long 0xC 2. "PL2F2,PL2F2" "0,1"
bitfld.long 0xC 1. "PL1F2,PL1F2" "0,1"
bitfld.long 0xC 0. "PL0F2,PL0F2" "0,1"
line.long 0x10 "FR3,PL Function Register 3"
bitfld.long 0x10 6. "PL6F3,PL6F3" "0,1"
bitfld.long 0x10 5. "PL5F3,PL5F3" "0,1"
bitfld.long 0x10 4. "PL4F3,PL4F3" "0,1"
bitfld.long 0x10 3. "PL3F3,PL3F3" "0,1"
bitfld.long 0x10 2. "PL2F3,PL2F3" "0,1"
bitfld.long 0x10 1. "PL1F3,PL1F3" "0,1"
bitfld.long 0x10 0. "PL0F3,PL0F3" "0,1"
line.long 0x14 "FR4,PL Function Register 4"
bitfld.long 0x14 6. "PL6F4,PL6F4" "0,1"
bitfld.long 0x14 5. "PL5F4,PL5F4" "0,1"
bitfld.long 0x14 1. "PL1F4,PL1F4" "0,1"
bitfld.long 0x14 0. "PL0F4,PL0F4" "0,1"
line.long 0x18 "FR5,PL Function Register 4"
bitfld.long 0x18 4. "PL4F5,PL4F5" "0,1"
bitfld.long 0x18 3. "PL3F5,PL3F5" "0,1"
bitfld.long 0x18 2. "PL2F5,PL2F5" "0,1"
bitfld.long 0x18 1. "PL1F5,PL1F5" "0,1"
bitfld.long 0x18 0. "PL0F5,PL0F5" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PL Open Drain Control Register"
bitfld.long 0x0 6. "PL6OD,PL6OD" "0,1"
bitfld.long 0x0 5. "PL5OD,PL5OD" "0,1"
bitfld.long 0x0 4. "PL4OD,PL4OD" "0,1"
bitfld.long 0x0 3. "PL3OD,PL3OD" "0,1"
bitfld.long 0x0 2. "PL2OD,PL2OD" "0,1"
bitfld.long 0x0 1. "PL1OD,PL1OD" "0,1"
bitfld.long 0x0 0. "PL0OD,PL0OD" "0,1"
line.long 0x4 "PUP,PL Pull-up Control Register"
bitfld.long 0x4 6. "PL6UP,PL6UP" "0,1"
bitfld.long 0x4 5. "PL5UP,PL5UP" "0,1"
bitfld.long 0x4 4. "PL4UP,PL4UP" "0,1"
bitfld.long 0x4 3. "PL3UP,PL3UP" "0,1"
bitfld.long 0x4 2. "PL2UP,PL2UP" "0,1"
bitfld.long 0x4 1. "PL1UP,PL1UP" "0,1"
bitfld.long 0x4 0. "PL0UP,PL0UP" "0,1"
line.long 0x8 "PDN,PL Pull-Down Control Register"
bitfld.long 0x8 6. "PL6DN,PL6DN" "0,1"
bitfld.long 0x8 5. "PL5DN,PL5DN" "0,1"
bitfld.long 0x8 4. "PL4DN,PL4DN" "0,1"
bitfld.long 0x8 3. "PL3DN,PL3DN" "0,1"
bitfld.long 0x8 2. "PL2DN,PL2DN" "0,1"
bitfld.long 0x8 1. "PL1DN,PL1DN" "0,1"
bitfld.long 0x8 0. "PL0DN,PL0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PL Input Enable Control Register"
bitfld.long 0x0 6. "PL6IE,PL6IE" "0,1"
bitfld.long 0x0 5. "PL5IE,PL5IE" "0,1"
bitfld.long 0x0 4. "PL4IE,PL4IE" "0,1"
bitfld.long 0x0 3. "PL3IE,PL3IE" "0,1"
bitfld.long 0x0 2. "PL2IE,PL2IE" "0,1"
bitfld.long 0x0 1. "PL1IE,PL1IE" "0,1"
bitfld.long 0x0 0. "PL0IE,PL0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "PM (Port M)"
base ad:0x400C0B00
group.long 0x0++0x1F
line.long 0x0 "DATA,PM Data Register"
bitfld.long 0x0 6. "PM6,PM6" "0,1"
bitfld.long 0x0 5. "PM5,PM5" "0,1"
bitfld.long 0x0 4. "PM4,PM4" "0,1"
bitfld.long 0x0 3. "PM3,PM3" "0,1"
bitfld.long 0x0 2. "PM2,PM2" "0,1"
bitfld.long 0x0 1. "PM1,PM1" "0,1"
bitfld.long 0x0 0. "PM0,PM0" "0,1"
line.long 0x4 "CR,PM Control Register"
bitfld.long 0x4 6. "PM6C,PM6C" "0,1"
bitfld.long 0x4 5. "PM5C,PM5C" "0,1"
bitfld.long 0x4 4. "PM4C,PM4C" "0,1"
bitfld.long 0x4 3. "PM3C,PM3C" "0,1"
bitfld.long 0x4 2. "PM2C,PM2C" "0,1"
bitfld.long 0x4 1. "PM1C,PM1C" "0,1"
bitfld.long 0x4 0. "PM0C,PM0C" "0,1"
line.long 0x8 "FR1,PM Function Register 1"
bitfld.long 0x8 4. "PM4F1,PM4F1" "0,1"
bitfld.long 0x8 3. "PM3F1,PM3F1" "0,1"
bitfld.long 0x8 2. "PM2F1,PM2F1" "0,1"
bitfld.long 0x8 1. "PM1F1,PM1F1" "0,1"
bitfld.long 0x8 0. "PM0F1,PM0F1" "0,1"
line.long 0xC "FR2,PM Function Register 2"
bitfld.long 0xC 4. "PM4F2,PM4F2" "0,1"
bitfld.long 0xC 3. "PM3F2,PM3F2" "0,1"
bitfld.long 0xC 2. "PM2F2,PM2F2" "0,1"
bitfld.long 0xC 1. "PM1F2,PM1F2" "0,1"
line.long 0x10 "FR3,PM Function Register 3"
bitfld.long 0x10 4. "PM4F3,PM4F3" "0,1"
bitfld.long 0x10 3. "PM3F3,PM3F3" "0,1"
bitfld.long 0x10 2. "PM2F3,PM2F3" "0,1"
bitfld.long 0x10 1. "PM1F3,PM1F3" "0,1"
bitfld.long 0x10 0. "PM0F3,PM0F3" "0,1"
line.long 0x14 "FR4,PM Function Register 4"
bitfld.long 0x14 5. "PM5F4,PM5F4" "0,1"
bitfld.long 0x14 4. "PM4F4,PM4F4" "0,1"
bitfld.long 0x14 3. "PM3F4,PM3F4" "0,1"
bitfld.long 0x14 2. "PM2F4,PM2F4" "0,1"
bitfld.long 0x14 1. "PM1F4,PM1F4" "0,1"
bitfld.long 0x14 0. "PM0F4,PM0F4" "0,1"
line.long 0x18 "FR5,PM Function Register 5"
bitfld.long 0x18 3. "PM3F5,PM3F5" "0,1"
bitfld.long 0x18 2. "PM2F5,PM2F5" "0,1"
bitfld.long 0x18 1. "PM1F5,PM1F5" "0,1"
bitfld.long 0x18 0. "PM0F5,PM0F5" "0,1"
line.long 0x1C "FR6,PM Function Register 6"
bitfld.long 0x1C 4. "PM4F6,PM4F6" "0,1"
bitfld.long 0x1C 3. "PM3F6,PM3F6" "0,1"
bitfld.long 0x1C 2. "PM2F6,PM2F6" "0,1"
bitfld.long 0x1C 1. "PM1F6,PM1F6" "0,1"
bitfld.long 0x1C 0. "PM0F6,PM0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PM Open Drain Control Register"
bitfld.long 0x0 6. "PM6OD,PM6OD" "0,1"
bitfld.long 0x0 5. "PM5OD,PM5OD" "0,1"
bitfld.long 0x0 4. "PM4OD,PM4OD" "0,1"
bitfld.long 0x0 3. "PM3OD,PM3OD" "0,1"
bitfld.long 0x0 2. "PM2OD,PM2OD" "0,1"
bitfld.long 0x0 1. "PM1OD,PM1OD" "0,1"
bitfld.long 0x0 0. "PM0OD,PM0OD" "0,1"
line.long 0x4 "PUP,PM Pull-up Control Register"
bitfld.long 0x4 6. "PM6UP,PM6UP" "0,1"
bitfld.long 0x4 5. "PM5UP,PM5UP" "0,1"
bitfld.long 0x4 4. "PM4UP,PM4UP" "0,1"
bitfld.long 0x4 3. "PM3UP,PM3UP" "0,1"
bitfld.long 0x4 2. "PM2UP,PM2UP" "0,1"
bitfld.long 0x4 1. "PM1UP,PM1UP" "0,1"
bitfld.long 0x4 0. "PM0UP,PM0UP" "0,1"
line.long 0x8 "PDN,PM Pull-Down Control Register"
bitfld.long 0x8 6. "PM6DN,PM6DN" "0,1"
bitfld.long 0x8 5. "PM5DN,PM5DN" "0,1"
bitfld.long 0x8 4. "PM4DN,PM4DN" "0,1"
bitfld.long 0x8 3. "PM3DN,PM3DN" "0,1"
bitfld.long 0x8 2. "PM2DN,PM2DN" "0,1"
bitfld.long 0x8 1. "PM1DN,PM1DN" "0,1"
bitfld.long 0x8 0. "PM0DN,PM0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PM Input Enable Control Register"
bitfld.long 0x0 6. "PM6IE,PM6IE" "0,1"
bitfld.long 0x0 5. "PM5IE,PM5IE" "0,1"
bitfld.long 0x0 4. "PM4IE,PM4IE" "0,1"
bitfld.long 0x0 3. "PM3IE,PM3IE" "0,1"
bitfld.long 0x0 2. "PM2IE,PM2IE" "0,1"
bitfld.long 0x0 1. "PM1IE,PM1IE" "0,1"
bitfld.long 0x0 0. "PM0IE,PM0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PN (Port N)"
base ad:0x400C0C00
group.long 0x0++0x1F
line.long 0x0 "DATA,PN Data Register"
bitfld.long 0x0 5. "PN5,PN5" "0,1"
bitfld.long 0x0 4. "PN4,PN4" "0,1"
bitfld.long 0x0 3. "PN3,PN3" "0,1"
bitfld.long 0x0 2. "PN2,PN2" "0,1"
bitfld.long 0x0 1. "PN1,PN1" "0,1"
bitfld.long 0x0 0. "PN0,PN0" "0,1"
line.long 0x4 "CR,PN Control Register"
bitfld.long 0x4 5. "PN5C,PN5C" "0,1"
bitfld.long 0x4 4. "PN4C,PN4C" "0,1"
bitfld.long 0x4 3. "PN3C,PN3C" "0,1"
bitfld.long 0x4 2. "PN2C,PN2C" "0,1"
bitfld.long 0x4 1. "PN1C,PN1C" "0,1"
bitfld.long 0x4 0. "PN0C,PN0C" "0,1"
line.long 0x8 "FR1,PN Function Register 1"
bitfld.long 0x8 4. "PN4F1,PN4F1" "0,1"
bitfld.long 0x8 3. "PN3F1,PN3F1" "0,1"
bitfld.long 0x8 2. "PN2F1,PN2F1" "0,1"
bitfld.long 0x8 1. "PN1F1,PN1F1" "0,1"
bitfld.long 0x8 0. "PN0F1,PN0F1" "0,1"
line.long 0xC "FR2,PN Function Register 2"
bitfld.long 0xC 3. "PN3F2,PN3F2" "0,1"
bitfld.long 0xC 2. "PN2F2,PN2F2" "0,1"
bitfld.long 0xC 1. "PN1F2,PN1F2" "0,1"
bitfld.long 0xC 0. "PN0F2,PN0F2" "0,1"
line.long 0x10 "FR3,PN Function Register 3"
bitfld.long 0x10 5. "PN5F3,PN5F3" "0,1"
bitfld.long 0x10 4. "PN4F3,PN4F3" "0,1"
bitfld.long 0x10 3. "PN3F3,PN3F3" "0,1"
bitfld.long 0x10 2. "PN2F3,PN2F3" "0,1"
bitfld.long 0x10 1. "PN1F3,PN1F3" "0,1"
bitfld.long 0x10 0. "PN0F3,PN0F3" "0,1"
line.long 0x14 "FR4,PN Function Register 4"
bitfld.long 0x14 2. "PN2F4,PN2F4" "0,1"
bitfld.long 0x14 1. "PN1F4,PN1F4" "0,1"
bitfld.long 0x14 0. "PN0F4,PN0F4" "0,1"
line.long 0x18 "FR5,PN Function Register 5"
bitfld.long 0x18 3. "PN3F5,PN3F5" "0,1"
line.long 0x1C "FR6,PN Function Register 6"
bitfld.long 0x1C 5. "PN5F6,PN5F6" "0,1"
bitfld.long 0x1C 4. "PN4F6,PN4F6" "0,1"
bitfld.long 0x1C 3. "PN3F6,PN3F6" "0,1"
bitfld.long 0x1C 2. "PN2F6,PN2F6" "0,1"
bitfld.long 0x1C 1. "PN1F6,PN1F6" "0,1"
bitfld.long 0x1C 0. "PN0F6,PN0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PN Open Drain Control Register"
bitfld.long 0x0 5. "PN5OD,PN5OD" "0,1"
bitfld.long 0x0 4. "PN4OD,PN4OD" "0,1"
bitfld.long 0x0 3. "PN3OD,PN3OD" "0,1"
bitfld.long 0x0 2. "PN2OD,PN2OD" "0,1"
bitfld.long 0x0 1. "PN1OD,PN1OD" "0,1"
bitfld.long 0x0 0. "PN0OD,PN0OD" "0,1"
line.long 0x4 "PUP,PN Pull-up Control Register"
bitfld.long 0x4 5. "PN5UP,PN5UP" "0,1"
bitfld.long 0x4 4. "PN4UP,PN4UP" "0,1"
bitfld.long 0x4 3. "PN3UP,PN3UP" "0,1"
bitfld.long 0x4 2. "PN2UP,PN2UP" "0,1"
bitfld.long 0x4 1. "PN1UP,PN1UP" "0,1"
bitfld.long 0x4 0. "PN0UP,PN0UP" "0,1"
line.long 0x8 "PDN,PN Pull-Down Control Register"
bitfld.long 0x8 5. "PN5DN,PN5DN" "0,1"
bitfld.long 0x8 4. "PN4DN,PN4DN" "0,1"
bitfld.long 0x8 3. "PN3DN,PN3DN" "0,1"
bitfld.long 0x8 2. "PN2DN,PN2DN" "0,1"
bitfld.long 0x8 1. "PN1DN,PN1DN" "0,1"
bitfld.long 0x8 0. "PN0DN,PN0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PN Input Enable Control Register"
bitfld.long 0x0 5. "PN5IE,PN5IE" "0,1"
bitfld.long 0x0 4. "PN4IE,PN4IE" "0,1"
bitfld.long 0x0 3. "PN3IE,PN3IE" "0,1"
bitfld.long 0x0 2. "PN2IE,PN2IE" "0,1"
bitfld.long 0x0 1. "PN1IE,PN1IE" "0,1"
bitfld.long 0x0 0. "PN0IE,PN0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PP (Port P)"
base ad:0x400C0D00
group.long 0x0++0x17
line.long 0x0 "DATA,PP Data Register"
bitfld.long 0x0 7. "PP7,PP7" "0,1"
bitfld.long 0x0 6. "PP6,PP6" "0,1"
bitfld.long 0x0 5. "PP5,PP5" "0,1"
bitfld.long 0x0 4. "PP4,PP4" "0,1"
bitfld.long 0x0 3. "PP3,PP3" "0,1"
bitfld.long 0x0 2. "PP2,PP2" "0,1"
bitfld.long 0x0 1. "PP1,PP1" "0,1"
bitfld.long 0x0 0. "PP0,PP0" "0,1"
line.long 0x4 "CR,PP Control Register"
bitfld.long 0x4 7. "PP7C,PP7C" "0,1"
bitfld.long 0x4 6. "PP6C,PP6C" "0,1"
bitfld.long 0x4 5. "PP5C,PP5C" "0,1"
bitfld.long 0x4 4. "PP4C,PP4C" "0,1"
bitfld.long 0x4 3. "PP3C,PP3C" "0,1"
bitfld.long 0x4 2. "PP2C,PP2C" "0,1"
bitfld.long 0x4 1. "PP1C,PP1C" "0,1"
bitfld.long 0x4 0. "PP0C,PP0C" "0,1"
line.long 0x8 "FR1,PP Function Register 1"
bitfld.long 0x8 7. "PP7F1,PP7F1" "0,1"
bitfld.long 0x8 6. "PP6F1,PP6F1" "0,1"
bitfld.long 0x8 5. "PP5F1,PP5F1" "0,1"
bitfld.long 0x8 4. "PP4F1,PP4F1" "0,1"
bitfld.long 0x8 3. "PP3F1,PP3F1" "0,1"
line.long 0xC "FR2,PP Function Register 2"
bitfld.long 0xC 6. "PP6F2,PP6F2" "0,1"
bitfld.long 0xC 2. "PP2F2,PP2F2" "0,1"
bitfld.long 0xC 1. "PP1F2,PP1F2" "0,1"
bitfld.long 0xC 0. "PP0F2,PP0F2" "0,1"
line.long 0x10 "FR3,PP Function Register 3"
bitfld.long 0x10 6. "PP6F3,PP6F3" "0,1"
bitfld.long 0x10 2. "PP2F3,PP2F3" "0,1"
bitfld.long 0x10 1. "PP1F3,PP1F3" "0,1"
bitfld.long 0x10 0. "PP0F3,PP0F3" "0,1"
line.long 0x14 "FR4,PP Function Register 4"
bitfld.long 0x14 2. "PP2F4,PP2F4" "0,1"
bitfld.long 0x14 1. "PP1F4,PP1F4" "0,1"
bitfld.long 0x14 0. "PP0F4,PP0F4" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PP Function Register 6"
bitfld.long 0x0 7. "PP7F6,PP7F6" "0,1"
bitfld.long 0x0 6. "PP6F6,PP6F6" "0,1"
bitfld.long 0x0 5. "PP5F6,PP5F6" "0,1"
bitfld.long 0x0 4. "PP4F6,PP4F6" "0,1"
bitfld.long 0x0 3. "PP3F6,PP3F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PP Open Drain Control Register"
bitfld.long 0x0 7. "PP7OD,PP7OD" "0,1"
bitfld.long 0x0 6. "PP6OD,PP6OD" "0,1"
bitfld.long 0x0 5. "PP5OD,PP5OD" "0,1"
bitfld.long 0x0 4. "PP4OD,PP4OD" "0,1"
bitfld.long 0x0 3. "PP3OD,PP3OD" "0,1"
bitfld.long 0x0 2. "PP2OD,PP2OD" "0,1"
bitfld.long 0x0 1. "PP1OD,PP1OD" "0,1"
bitfld.long 0x0 0. "PP0OD,PP0OD" "0,1"
line.long 0x4 "PUP,PP Pull-up Control Register"
bitfld.long 0x4 7. "PP7UP,PP7UP" "0,1"
bitfld.long 0x4 6. "PP6UP,PP6UP" "0,1"
bitfld.long 0x4 5. "PP5UP,PP5UP" "0,1"
bitfld.long 0x4 4. "PP4UP,PP4UP" "0,1"
bitfld.long 0x4 3. "PP3UP,PP3UP" "0,1"
bitfld.long 0x4 2. "PP2UP,PP2UP" "0,1"
bitfld.long 0x4 1. "PP1UP,PP1UP" "0,1"
bitfld.long 0x4 0. "PP0UP,PP0UP" "0,1"
line.long 0x8 "PDN,PP Pull-Down Control Register"
bitfld.long 0x8 7. "PP7DN,PP7DN" "0,1"
bitfld.long 0x8 6. "PP6DN,PP6DN" "0,1"
bitfld.long 0x8 5. "PP5DN,PP5DN" "0,1"
bitfld.long 0x8 4. "PP4DN,PP4DN" "0,1"
bitfld.long 0x8 3. "PP3DN,PP3DN" "0,1"
bitfld.long 0x8 2. "PP2DN,PP2DN" "0,1"
bitfld.long 0x8 1. "PP1DN,PP1DN" "0,1"
bitfld.long 0x8 0. "PP0DN,PP0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PP Input Enable Control Register"
bitfld.long 0x0 7. "PP7IE,PP7IE" "0,1"
bitfld.long 0x0 6. "PP6IE,PP6IE" "0,1"
bitfld.long 0x0 5. "PP5IE,PP5IE" "0,1"
bitfld.long 0x0 4. "PP4IE,PP4IE" "0,1"
bitfld.long 0x0 3. "PP3IE,PP3IE" "0,1"
bitfld.long 0x0 2. "PP2IE,PP2IE" "0,1"
bitfld.long 0x0 1. "PP1IE,PP1IE" "0,1"
bitfld.long 0x0 0. "PP0IE,PP0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*"))
tree "PR (Port R)"
base ad:0x400C0E00
group.long 0x0++0x17
line.long 0x0 "DATA,PR Data Register"
bitfld.long 0x0 3. "PR3,PR3" "0,1"
bitfld.long 0x0 2. "PR2,PR2" "0,1"
bitfld.long 0x0 1. "PR1,PR1" "0,1"
bitfld.long 0x0 0. "PR0,PR0" "0,1"
line.long 0x4 "CR,PR Control Register"
bitfld.long 0x4 3. "PR3C,PR3C" "0,1"
bitfld.long 0x4 2. "PR2C,PR2C" "0,1"
bitfld.long 0x4 1. "PR1C,PR1C" "0,1"
bitfld.long 0x4 0. "PR0C,PR0C" "0,1"
line.long 0x8 "FR1,PR Function Register 1"
bitfld.long 0x8 2. "PR2F1,PR2F1" "0,1"
bitfld.long 0x8 1. "PR1F1,PR1F1" "0,1"
bitfld.long 0x8 0. "PR0F1,PR0F1" "0,1"
line.long 0xC "FR2,PR Function Register 2"
bitfld.long 0xC 1. "PR1F2,PR1F2" "0,1"
bitfld.long 0xC 0. "PR0F2,PR0F2" "0,1"
line.long 0x10 "FR3,PR Function Register 3"
bitfld.long 0x10 2. "PR2F3,PR2F3" "0,1"
bitfld.long 0x10 1. "PR1F3,PR1F3" "0,1"
bitfld.long 0x10 0. "PR0F3,PR0F3" "0,1"
line.long 0x14 "FR4,PR Function Register 4"
bitfld.long 0x14 2. "PR2F4,PR2F4" "0,1"
bitfld.long 0x14 1. "PR1F4,PR1F4" "0,1"
bitfld.long 0x14 0. "PR0F4,PR0F4" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PR Function Register 6"
bitfld.long 0x0 3. "PR3F6,PR3F6" "0,1"
bitfld.long 0x0 2. "PR2F6,PR2F6" "0,1"
bitfld.long 0x0 1. "PR1F6,PR1F6" "0,1"
bitfld.long 0x0 0. "PR0F6,PR0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PR Open Drain Control Register"
bitfld.long 0x0 3. "PR3OD,PR3OD" "0,1"
bitfld.long 0x0 2. "PR2OD,PR2OD" "0,1"
bitfld.long 0x0 1. "PR1OD,PR1OD" "0,1"
bitfld.long 0x0 0. "PR0OD,PR0OD" "0,1"
line.long 0x4 "PUP,PR Pull-up Control Register"
bitfld.long 0x4 3. "PR3UP,PR3UP" "0,1"
bitfld.long 0x4 2. "PR2UP,PR2UP" "0,1"
bitfld.long 0x4 1. "PR1UP,PR1UP" "0,1"
bitfld.long 0x4 0. "PR0UP,PR0UP" "0,1"
line.long 0x8 "PDN,PR Pull-Down Control Register"
bitfld.long 0x8 3. "PR3DN,PR3DN" "0,1"
bitfld.long 0x8 2. "PR2DN,PR2DN" "0,1"
bitfld.long 0x8 1. "PR1DN,PR1DN" "0,1"
bitfld.long 0x8 0. "PR0DN,PR0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PR Input Enable Control Register"
bitfld.long 0x0 3. "PR3IE,PR3IE" "0,1"
bitfld.long 0x0 2. "PR2IE,PR2IE" "0,1"
bitfld.long 0x0 1. "PR1IE,PR1IE" "0,1"
bitfld.long 0x0 0. "PR0IE,PR0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PF (Port F)"
base ad:0x400C0500
group.long 0x0++0x7
line.long 0x0 "DATA,PF Data Register"
bitfld.long 0x0 7. "PF7,PF7" "0,1"
bitfld.long 0x0 6. "PF6,PF6" "0,1"
bitfld.long 0x0 5. "PF5,PF5" "0,1"
bitfld.long 0x0 4. "PF4,PF4" "0,1"
bitfld.long 0x0 3. "PF3,PF3" "0,1"
bitfld.long 0x0 2. "PF2,PF2" "0,1"
bitfld.long 0x0 1. "PF1,PF1" "0,1"
bitfld.long 0x0 0. "PF0,PF0" "0,1"
line.long 0x4 "CR,PF Control Register"
bitfld.long 0x4 7. "PF7C,PF7C" "0,1"
bitfld.long 0x4 6. "PF6C,PF6C" "0,1"
bitfld.long 0x4 5. "PF5C,PF5C" "0,1"
bitfld.long 0x4 4. "PF4C,PF4C" "0,1"
bitfld.long 0x4 3. "PF3C,PF3C" "0,1"
bitfld.long 0x4 2. "PF2C,PF2C" "0,1"
bitfld.long 0x4 1. "PF1C,PF1C" "0,1"
bitfld.long 0x4 0. "PF0C,PF0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PF Open Drain Control Register"
bitfld.long 0x0 7. "PF7OD,PF7OD" "0,1"
bitfld.long 0x0 6. "PF6OD,PF6OD" "0,1"
bitfld.long 0x0 5. "PF5OD,PF5OD" "0,1"
bitfld.long 0x0 4. "PF4OD,PF4OD" "0,1"
bitfld.long 0x0 3. "PF3OD,PF3OD" "0,1"
bitfld.long 0x0 2. "PF2OD,PF2OD" "0,1"
bitfld.long 0x0 1. "PF1OD,PF1OD" "0,1"
bitfld.long 0x0 0. "PF0OD,PF0OD" "0,1"
line.long 0x4 "PUP,PF Pull-up Control Register"
bitfld.long 0x4 7. "PF7UP,PF7UP" "0,1"
bitfld.long 0x4 6. "PF6UP,PF6UP" "0,1"
bitfld.long 0x4 5. "PF5UP,PF5UP" "0,1"
bitfld.long 0x4 4. "PF4UP,PF4UP" "0,1"
bitfld.long 0x4 3. "PF3UP,PF3UP" "0,1"
bitfld.long 0x4 2. "PF2UP,PF2UP" "0,1"
bitfld.long 0x4 1. "PF1UP,PF1UP" "0,1"
bitfld.long 0x4 0. "PF0UP,PF0UP" "0,1"
line.long 0x8 "PDN,PF Pull-Down Control Register"
bitfld.long 0x8 7. "PF7DN,PF7DN" "0,1"
bitfld.long 0x8 6. "PF6DN,PF6DN" "0,1"
bitfld.long 0x8 5. "PF5DN,PF5DN" "0,1"
bitfld.long 0x8 4. "PF4DN,PF4DN" "0,1"
bitfld.long 0x8 3. "PF3DN,PF3DN" "0,1"
bitfld.long 0x8 2. "PF2DN,PF2DN" "0,1"
bitfld.long 0x8 1. "PF1DN,PF1DN" "0,1"
bitfld.long 0x8 0. "PF0DN,PF0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PF Input Enable Control Register"
bitfld.long 0x0 7. "PF7IE,PF7IE" "0,1"
bitfld.long 0x0 6. "PF6IE,PF6IE" "0,1"
bitfld.long 0x0 5. "PF5IE,PF5IE" "0,1"
bitfld.long 0x0 4. "PF4IE,PF4IE" "0,1"
bitfld.long 0x0 3. "PF3IE,PF3IE" "0,1"
bitfld.long 0x0 2. "PF2IE,PF2IE" "0,1"
bitfld.long 0x0 1. "PF1IE,PF1IE" "0,1"
bitfld.long 0x0 0. "PF0IE,PF0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PG (Port G)"
base ad:0x400C0600
group.long 0x0++0x17
line.long 0x0 "DATA,PG Data Register"
bitfld.long 0x0 7. "PG7,PG7" "0,1"
bitfld.long 0x0 6. "PG6,PG6" "0,1"
bitfld.long 0x0 5. "PG5,PG5" "0,1"
bitfld.long 0x0 4. "PG4,PG4" "0,1"
bitfld.long 0x0 3. "PG3,PG3" "0,1"
bitfld.long 0x0 2. "PG2,PG2" "0,1"
bitfld.long 0x0 1. "PG1,PG1" "0,1"
bitfld.long 0x0 0. "PG0,PG0" "0,1"
line.long 0x4 "CR,PG Control Register"
bitfld.long 0x4 7. "PG7C,PG7C" "0,1"
bitfld.long 0x4 6. "PG6C,PG6C" "0,1"
bitfld.long 0x4 5. "PG5C,PG5C" "0,1"
bitfld.long 0x4 4. "PG4C,PG4C" "0,1"
bitfld.long 0x4 3. "PG3C,PG3C" "0,1"
bitfld.long 0x4 2. "PG2C,PG2C" "0,1"
bitfld.long 0x4 1. "PG1C,PG1C" "0,1"
bitfld.long 0x4 0. "PG0C,PG0C" "0,1"
line.long 0x8 "FR1,PG Function Register 1"
bitfld.long 0x8 4. "PG4F1,PG4F1" "0,1"
bitfld.long 0x8 3. "PG3F1,PG3F1" "0,1"
bitfld.long 0x8 2. "PG2F1,PG2F1" "0,1"
line.long 0xC "FR2,PG Function Register 2"
bitfld.long 0xC 3. "PG3F2,PG3F2" "0,1"
bitfld.long 0xC 2. "PG2F2,PG2F2" "0,1"
line.long 0x10 "FR3,PG Function Register 3"
bitfld.long 0x10 7. "PG7F3,PG7F3" "0,1"
bitfld.long 0x10 6. "PG6F3,PG6F3" "0,1"
bitfld.long 0x10 5. "PG5F3,PG5F3" "0,1"
bitfld.long 0x10 4. "PG4F3,PG4F3" "0,1"
bitfld.long 0x10 3. "PG3F3,PG3F3" "0,1"
bitfld.long 0x10 2. "PG2F3,PG2F3" "0,1"
line.long 0x14 "FR4,PG Function Register 4"
bitfld.long 0x14 4. "PG4F4,PG4F4" "0,1"
bitfld.long 0x14 3. "PG3F4,PG3F4" "0,1"
bitfld.long 0x14 2. "PG2F4,PG2F4" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PG Open Drain Control Register"
bitfld.long 0x0 7. "PG7OD,PG7OD" "0,1"
bitfld.long 0x0 6. "PG6OD,PG6OD" "0,1"
bitfld.long 0x0 5. "PG5OD,PG5OD" "0,1"
bitfld.long 0x0 4. "PG4OD,PG4OD" "0,1"
bitfld.long 0x0 3. "PG3OD,PG3OD" "0,1"
bitfld.long 0x0 2. "PG2OD,PG2OD" "0,1"
bitfld.long 0x0 1. "PG1OD,PG1OD" "0,1"
bitfld.long 0x0 0. "PG0OD,PG0OD" "0,1"
line.long 0x4 "PUP,PG Pull-up Control Register"
bitfld.long 0x4 7. "PG7UP,PG7UP" "0,1"
bitfld.long 0x4 6. "PG6UP,PG6UP" "0,1"
bitfld.long 0x4 5. "PG5UP,PG5UP" "0,1"
bitfld.long 0x4 4. "PG4UP,PG4UP" "0,1"
bitfld.long 0x4 3. "PG3UP,PG3UP" "0,1"
bitfld.long 0x4 2. "PG2UP,PG2UP" "0,1"
bitfld.long 0x4 1. "PG1UP,PG1UP" "0,1"
bitfld.long 0x4 0. "PG0UP,PG0UP" "0,1"
line.long 0x8 "PDN,PG Pull-Down Control Register"
bitfld.long 0x8 7. "PG7DN,PG7DN" "0,1"
bitfld.long 0x8 6. "PG6DN,PG6DN" "0,1"
bitfld.long 0x8 5. "PG5DN,PG5DN" "0,1"
bitfld.long 0x8 4. "PG4DN,PG4DN" "0,1"
bitfld.long 0x8 3. "PG3DN,PG3DN" "0,1"
bitfld.long 0x8 2. "PG2DN,PG2DN" "0,1"
bitfld.long 0x8 1. "PG1DN,PG1DN" "0,1"
bitfld.long 0x8 0. "PG0DN,PG0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PG Input Enable Control Register"
bitfld.long 0x0 7. "PG7IE,PG7IE" "0,1"
bitfld.long 0x0 6. "PG6IE,PG6IE" "0,1"
bitfld.long 0x0 5. "PG5IE,PG5IE" "0,1"
bitfld.long 0x0 4. "PG4IE,PG4IE" "0,1"
bitfld.long 0x0 3. "PG3IE,PG3IE" "0,1"
bitfld.long 0x0 2. "PG2IE,PG2IE" "0,1"
bitfld.long 0x0 1. "PG1IE,PG1IE" "0,1"
bitfld.long 0x0 0. "PG0IE,PG0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PH (Port H)"
base ad:0x400C0700
group.long 0x0++0xB
line.long 0x0 "DATA,PH Data Register"
bitfld.long 0x0 7. "PH7,PH7" "0,1"
bitfld.long 0x0 6. "PH6,PH6" "0,1"
bitfld.long 0x0 5. "PH5,PH5" "0,1"
bitfld.long 0x0 4. "PH4,PH4" "0,1"
bitfld.long 0x0 3. "PH3,PH3" "0,1"
bitfld.long 0x0 2. "PH2,PH2" "0,1"
bitfld.long 0x0 1. "PH1,PH1" "0,1"
bitfld.long 0x0 0. "PH0,PH0" "0,1"
line.long 0x4 "CR,PH Control Register"
bitfld.long 0x4 7. "PH7C,PH7C" "0,1"
bitfld.long 0x4 6. "PH6C,PH6C" "0,1"
bitfld.long 0x4 5. "PH5C,PH5C" "0,1"
bitfld.long 0x4 4. "PH4C,PH4C" "0,1"
line.long 0x8 "FR1,PH Function Register 1"
bitfld.long 0x8 6. "PH6F1,PH6F1" "0,1"
bitfld.long 0x8 5. "PH5F1,PH5F1" "0,1"
bitfld.long 0x8 4. "PH4F1,PH4F1" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PH Open Drain Control Register"
bitfld.long 0x0 7. "PH7OD,PH7OD" "0,1"
bitfld.long 0x0 6. "PH6OD,PH6OD" "0,1"
bitfld.long 0x0 5. "PH5OD,PH5OD" "0,1"
bitfld.long 0x0 4. "PH4OD,PH4OD" "0,1"
line.long 0x4 "PUP,PH Pull-up Control Register"
bitfld.long 0x4 7. "PG7UP,PG7UP" "0,1"
bitfld.long 0x4 6. "PG6UP,PG6UP" "0,1"
bitfld.long 0x4 5. "PG5UP,PG5UP" "0,1"
bitfld.long 0x4 4. "PG4UP,PG4UP" "0,1"
line.long 0x8 "PDN,PH Pull-Down Control Register"
bitfld.long 0x8 7. "PH7DN,PH7DN" "0,1"
bitfld.long 0x8 6. "PH6DN,PH6DN" "0,1"
bitfld.long 0x8 5. "PH5DN,PH5DN" "0,1"
bitfld.long 0x8 4. "PH4DN,PH4DN" "0,1"
bitfld.long 0x8 3. "PH3DN,PH3DN" "0,1"
bitfld.long 0x8 2. "PH2DN,PH2DN" "0,1"
bitfld.long 0x8 1. "PH1DN,PH1DN" "0,1"
bitfld.long 0x8 0. "PH0DN,PH0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PH Input Enable Control Register"
bitfld.long 0x0 7. "PH7IE,PH7IE" "0,1"
bitfld.long 0x0 6. "PH6IE,PH6IE" "0,1"
bitfld.long 0x0 5. "PH5IE,PH5IE" "0,1"
bitfld.long 0x0 4. "PH4IE,PH4IE" "0,1"
bitfld.long 0x0 3. "PH3IE,PH3IE" "0,1"
bitfld.long 0x0 2. "PH2IE,PH2IE" "0,1"
bitfld.long 0x0 1. "PH1IE,PH1IE" "0,1"
bitfld.long 0x0 0. "PH0IE,PH0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PL (Port L)"
base ad:0x400C0A00
group.long 0x0++0x1B
line.long 0x0 "DATA,PL Data Register"
bitfld.long 0x0 7. "PL7,PL7" "0,1"
bitfld.long 0x0 6. "PL6,PL6" "0,1"
bitfld.long 0x0 5. "PL5,PL5" "0,1"
bitfld.long 0x0 4. "PL4,PL4" "0,1"
bitfld.long 0x0 3. "PL3,PL3" "0,1"
bitfld.long 0x0 2. "PL2,PL2" "0,1"
bitfld.long 0x0 1. "PL1,PL1" "0,1"
bitfld.long 0x0 0. "PL0,PL0" "0,1"
line.long 0x4 "CR,PL Control Register"
bitfld.long 0x4 7. "PL7C,PL7C" "0,1"
bitfld.long 0x4 6. "PL6C,PL6C" "0,1"
bitfld.long 0x4 5. "PL5C,PL5C" "0,1"
bitfld.long 0x4 4. "PL4C,PL4C" "0,1"
bitfld.long 0x4 3. "PL3C,PL3C" "0,1"
bitfld.long 0x4 2. "PL2C,PL2C" "0,1"
bitfld.long 0x4 1. "PL1C,PL1C" "0,1"
bitfld.long 0x4 0. "PL0C,PL0C" "0,1"
line.long 0x8 "FR1,PL Function Register 1"
bitfld.long 0x8 3. "PL3F1,PL3F1" "0,1"
bitfld.long 0x8 2. "PL2F1,PL2F1" "0,1"
bitfld.long 0x8 1. "PL1F1,PL1F1" "0,1"
bitfld.long 0x8 0. "PL0F1,PL0F1" "0,1"
line.long 0xC "FR2,PL Function Register 2"
bitfld.long 0xC 3. "PL3F2,PL3F2" "0,1"
bitfld.long 0xC 2. "PL2F2,PL2F2" "0,1"
bitfld.long 0xC 1. "PL1F2,PL1F2" "0,1"
bitfld.long 0xC 0. "PL0F2,PL0F2" "0,1"
line.long 0x10 "FR3,PL Function Register 3"
bitfld.long 0x10 7. "PL7F3,PL7F3" "0,1"
bitfld.long 0x10 6. "PL6F3,PL6F3" "0,1"
bitfld.long 0x10 5. "PL5F3,PL5F3" "0,1"
bitfld.long 0x10 4. "PL4F3,PL4F3" "0,1"
bitfld.long 0x10 3. "PL3F3,PL3F3" "0,1"
bitfld.long 0x10 2. "PL2F3,PL2F3" "0,1"
bitfld.long 0x10 1. "PL1F3,PL1F3" "0,1"
bitfld.long 0x10 0. "PL0F3,PL0F3" "0,1"
line.long 0x14 "FR4,PL Function Register 4"
bitfld.long 0x14 7. "PL7F4,PL7F4" "0,1"
bitfld.long 0x14 6. "PL6F4,PL6F4" "0,1"
bitfld.long 0x14 5. "PL5F4,PL5F4" "0,1"
bitfld.long 0x14 1. "PL1F4,PL1F4" "0,1"
bitfld.long 0x14 0. "PL0F4,PL0F4" "0,1"
line.long 0x18 "FR5,PL Function Register 4"
bitfld.long 0x18 4. "PL4F5,PL4F5" "0,1"
bitfld.long 0x18 3. "PL3F5,PL3F5" "0,1"
bitfld.long 0x18 2. "PL2F5,PL2F5" "0,1"
bitfld.long 0x18 1. "PL1F5,PL1F5" "0,1"
bitfld.long 0x18 0. "PL0F5,PL0F5" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PL Open Drain Control Register"
bitfld.long 0x0 7. "PL7OD,PL7OD" "0,1"
bitfld.long 0x0 6. "PL6OD,PL6OD" "0,1"
bitfld.long 0x0 5. "PL5OD,PL5OD" "0,1"
bitfld.long 0x0 4. "PL4OD,PL4OD" "0,1"
bitfld.long 0x0 3. "PL3OD,PL3OD" "0,1"
bitfld.long 0x0 2. "PL2OD,PL2OD" "0,1"
bitfld.long 0x0 1. "PL1OD,PL1OD" "0,1"
bitfld.long 0x0 0. "PL0OD,PL0OD" "0,1"
line.long 0x4 "PUP,PL Pull-up Control Register"
bitfld.long 0x4 7. "PL7UP,PL7UP" "0,1"
bitfld.long 0x4 6. "PL6UP,PL6UP" "0,1"
bitfld.long 0x4 5. "PL5UP,PL5UP" "0,1"
bitfld.long 0x4 4. "PL4UP,PL4UP" "0,1"
bitfld.long 0x4 3. "PL3UP,PL3UP" "0,1"
bitfld.long 0x4 2. "PL2UP,PL2UP" "0,1"
bitfld.long 0x4 1. "PL1UP,PL1UP" "0,1"
bitfld.long 0x4 0. "PL0UP,PL0UP" "0,1"
line.long 0x8 "PDN,PL Pull-Down Control Register"
bitfld.long 0x8 7. "PL7DN,PL7DN" "0,1"
bitfld.long 0x8 6. "PL6DN,PL6DN" "0,1"
bitfld.long 0x8 5. "PL5DN,PL5DN" "0,1"
bitfld.long 0x8 4. "PL4DN,PL4DN" "0,1"
bitfld.long 0x8 3. "PL3DN,PL3DN" "0,1"
bitfld.long 0x8 2. "PL2DN,PL2DN" "0,1"
bitfld.long 0x8 1. "PL1DN,PL1DN" "0,1"
bitfld.long 0x8 0. "PL0DN,PL0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PL Input Enable Control Register"
bitfld.long 0x0 7. "PL7IE,PL7IE" "0,1"
bitfld.long 0x0 6. "PL6IE,PL6IE" "0,1"
bitfld.long 0x0 5. "PL5IE,PL5IE" "0,1"
bitfld.long 0x0 4. "PL4IE,PL4IE" "0,1"
bitfld.long 0x0 3. "PL3IE,PL3IE" "0,1"
bitfld.long 0x0 2. "PL2IE,PL2IE" "0,1"
bitfld.long 0x0 1. "PL1IE,PL1IE" "0,1"
bitfld.long 0x0 0. "PL0IE,PL0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PM (Port M)"
base ad:0x400C0B00
group.long 0x0++0x1F
line.long 0x0 "DATA,PM Data Register"
bitfld.long 0x0 7. "PM7,PM7" "0,1"
bitfld.long 0x0 6. "PM6,PM6" "0,1"
bitfld.long 0x0 5. "PM5,PM5" "0,1"
bitfld.long 0x0 4. "PM4,PM4" "0,1"
bitfld.long 0x0 3. "PM3,PM3" "0,1"
bitfld.long 0x0 2. "PM2,PM2" "0,1"
bitfld.long 0x0 1. "PM1,PM1" "0,1"
bitfld.long 0x0 0. "PM0,PM0" "0,1"
line.long 0x4 "CR,PM Control Register"
bitfld.long 0x4 7. "PM7C,PM7C" "0,1"
bitfld.long 0x4 6. "PM6C,PM6C" "0,1"
bitfld.long 0x4 5. "PM5C,PM5C" "0,1"
bitfld.long 0x4 4. "PM4C,PM4C" "0,1"
bitfld.long 0x4 3. "PM3C,PM3C" "0,1"
bitfld.long 0x4 2. "PM2C,PM2C" "0,1"
bitfld.long 0x4 1. "PM1C,PM1C" "0,1"
bitfld.long 0x4 0. "PM0C,PM0C" "0,1"
line.long 0x8 "FR1,PM Function Register 1"
bitfld.long 0x8 4. "PM4F1,PM4F1" "0,1"
bitfld.long 0x8 3. "PM3F1,PM3F1" "0,1"
bitfld.long 0x8 2. "PM2F1,PM2F1" "0,1"
bitfld.long 0x8 1. "PM1F1,PM1F1" "0,1"
bitfld.long 0x8 0. "PM0F1,PM0F1" "0,1"
line.long 0xC "FR2,PM Function Register 2"
bitfld.long 0xC 4. "PM4F2,PM4F2" "0,1"
bitfld.long 0xC 3. "PM3F2,PM3F2" "0,1"
bitfld.long 0xC 2. "PM2F2,PM2F2" "0,1"
bitfld.long 0xC 1. "PM1F2,PM1F2" "0,1"
line.long 0x10 "FR3,PM Function Register 3"
bitfld.long 0x10 4. "PM4F3,PM4F3" "0,1"
bitfld.long 0x10 3. "PM3F3,PM3F3" "0,1"
bitfld.long 0x10 2. "PM2F3,PM2F3" "0,1"
bitfld.long 0x10 1. "PM1F3,PM1F3" "0,1"
bitfld.long 0x10 0. "PM0F3,PM0F3" "0,1"
line.long 0x14 "FR4,PM Function Register 4"
bitfld.long 0x14 5. "PM5F4,PM5F4" "0,1"
bitfld.long 0x14 4. "PM4F4,PM4F4" "0,1"
bitfld.long 0x14 3. "PM3F4,PM3F4" "0,1"
bitfld.long 0x14 2. "PM2F4,PM2F4" "0,1"
bitfld.long 0x14 1. "PM1F4,PM1F4" "0,1"
bitfld.long 0x14 0. "PM0F4,PM0F4" "0,1"
line.long 0x18 "FR5,PM Function Register 5"
bitfld.long 0x18 3. "PM3F5,PM3F5" "0,1"
bitfld.long 0x18 2. "PM2F5,PM2F5" "0,1"
bitfld.long 0x18 1. "PM1F5,PM1F5" "0,1"
bitfld.long 0x18 0. "PM0F5,PM0F5" "0,1"
line.long 0x1C "FR6,PM Function Register 6"
bitfld.long 0x1C 4. "PM4F6,PM4F6" "0,1"
bitfld.long 0x1C 3. "PM3F6,PM3F6" "0,1"
bitfld.long 0x1C 2. "PM2F6,PM2F6" "0,1"
bitfld.long 0x1C 1. "PM1F6,PM1F6" "0,1"
bitfld.long 0x1C 0. "PM0F6,PM0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PM Open Drain Control Register"
bitfld.long 0x0 7. "PM7OD,PM7OD" "0,1"
bitfld.long 0x0 6. "PM6OD,PM6OD" "0,1"
bitfld.long 0x0 5. "PM5OD,PM5OD" "0,1"
bitfld.long 0x0 4. "PM4OD,PM4OD" "0,1"
bitfld.long 0x0 3. "PM3OD,PM3OD" "0,1"
bitfld.long 0x0 2. "PM2OD,PM2OD" "0,1"
bitfld.long 0x0 1. "PM1OD,PM1OD" "0,1"
bitfld.long 0x0 0. "PM0OD,PM0OD" "0,1"
line.long 0x4 "PUP,PM Pull-up Control Register"
bitfld.long 0x4 7. "PM7UP,PM7UP" "0,1"
bitfld.long 0x4 6. "PM6UP,PM6UP" "0,1"
bitfld.long 0x4 5. "PM5UP,PM5UP" "0,1"
bitfld.long 0x4 4. "PM4UP,PM4UP" "0,1"
bitfld.long 0x4 3. "PM3UP,PM3UP" "0,1"
bitfld.long 0x4 2. "PM2UP,PM2UP" "0,1"
bitfld.long 0x4 1. "PM1UP,PM1UP" "0,1"
bitfld.long 0x4 0. "PM0UP,PM0UP" "0,1"
line.long 0x8 "PDN,PM Pull-Down Control Register"
bitfld.long 0x8 7. "PM7DN,PM7DN" "0,1"
bitfld.long 0x8 6. "PM6DN,PM6DN" "0,1"
bitfld.long 0x8 5. "PM5DN,PM5DN" "0,1"
bitfld.long 0x8 4. "PM4DN,PM4DN" "0,1"
bitfld.long 0x8 3. "PM3DN,PM3DN" "0,1"
bitfld.long 0x8 2. "PM2DN,PM2DN" "0,1"
bitfld.long 0x8 1. "PM1DN,PM1DN" "0,1"
bitfld.long 0x8 0. "PM0DN,PM0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PM Input Enable Control Register"
bitfld.long 0x0 7. "PM7IE,PM7IE" "0,1"
bitfld.long 0x0 6. "PM6IE,PM6IE" "0,1"
bitfld.long 0x0 5. "PM5IE,PM5IE" "0,1"
bitfld.long 0x0 4. "PM4IE,PM4IE" "0,1"
bitfld.long 0x0 3. "PM3IE,PM3IE" "0,1"
bitfld.long 0x0 2. "PM2IE,PM2IE" "0,1"
bitfld.long 0x0 1. "PM1IE,PM1IE" "0,1"
bitfld.long 0x0 0. "PM0IE,PM0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
tree "PR (Port R)"
base ad:0x400C0E00
group.long 0x0++0x17
line.long 0x0 "DATA,PR Data Register"
bitfld.long 0x0 7. "PR7,PR7" "0,1"
bitfld.long 0x0 6. "PR6,PR6" "0,1"
bitfld.long 0x0 5. "PR5,PR5" "0,1"
bitfld.long 0x0 4. "PR4,PR4" "0,1"
bitfld.long 0x0 3. "PR3,PR3" "0,1"
bitfld.long 0x0 2. "PR2,PR2" "0,1"
bitfld.long 0x0 1. "PR1,PR1" "0,1"
bitfld.long 0x0 0. "PR0,PR0" "0,1"
line.long 0x4 "CR,PR Control Register"
bitfld.long 0x4 7. "PR7C,PR7C" "0,1"
bitfld.long 0x4 6. "PR6C,PR6C" "0,1"
bitfld.long 0x4 5. "PR5C,PR5C" "0,1"
bitfld.long 0x4 4. "PR4C,PR4C" "0,1"
bitfld.long 0x4 3. "PR3C,PR3C" "0,1"
bitfld.long 0x4 2. "PR2C,PR2C" "0,1"
bitfld.long 0x4 1. "PR1C,PR1C" "0,1"
bitfld.long 0x4 0. "PR0C,PR0C" "0,1"
line.long 0x8 "FR1,PR Function Register 1"
bitfld.long 0x8 2. "PR2F1,PR2F1" "0,1"
bitfld.long 0x8 1. "PR1F1,PR1F1" "0,1"
bitfld.long 0x8 0. "PR0F1,PR0F1" "0,1"
line.long 0xC "FR2,PR Function Register 2"
bitfld.long 0xC 1. "PR1F2,PR1F2" "0,1"
bitfld.long 0xC 0. "PR0F2,PR0F2" "0,1"
line.long 0x10 "FR3,PR Function Register 3"
bitfld.long 0x10 2. "PR2F3,PR2F3" "0,1"
bitfld.long 0x10 1. "PR1F3,PR1F3" "0,1"
bitfld.long 0x10 0. "PR0F3,PR0F3" "0,1"
line.long 0x14 "FR4,PR Function Register 4"
bitfld.long 0x14 2. "PR2F4,PR2F4" "0,1"
bitfld.long 0x14 1. "PR1F4,PR1F4" "0,1"
bitfld.long 0x14 0. "PR0F4,PR0F4" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PR Function Register 6"
bitfld.long 0x0 3. "PR3F6,PR3F6" "0,1"
bitfld.long 0x0 2. "PR2F6,PR2F6" "0,1"
bitfld.long 0x0 1. "PR1F6,PR1F6" "0,1"
bitfld.long 0x0 0. "PR0F6,PR0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PR Open Drain Control Register"
bitfld.long 0x0 7. "PR7OD,PR7OD" "0,1"
bitfld.long 0x0 6. "PR6OD,PR6OD" "0,1"
bitfld.long 0x0 5. "PR5OD,PR5OD" "0,1"
bitfld.long 0x0 4. "PR4OD,PR4OD" "0,1"
bitfld.long 0x0 3. "PR3OD,PR3OD" "0,1"
bitfld.long 0x0 2. "PR2OD,PR2OD" "0,1"
bitfld.long 0x0 1. "PR1OD,PR1OD" "0,1"
bitfld.long 0x0 0. "PR0OD,PR0OD" "0,1"
line.long 0x4 "PUP,PR Pull-up Control Register"
bitfld.long 0x4 7. "PR7UP,PR7UP" "0,1"
bitfld.long 0x4 6. "PR6UP,PR6UP" "0,1"
bitfld.long 0x4 5. "PR5UP,PR5UP" "0,1"
bitfld.long 0x4 4. "PR4UP,PR4UP" "0,1"
bitfld.long 0x4 3. "PR3UP,PR3UP" "0,1"
bitfld.long 0x4 2. "PR2UP,PR2UP" "0,1"
bitfld.long 0x4 1. "PR1UP,PR1UP" "0,1"
bitfld.long 0x4 0. "PR0UP,PR0UP" "0,1"
line.long 0x8 "PDN,PR Pull-Down Control Register"
bitfld.long 0x8 7. "PR7DN,PR7DN" "0,1"
bitfld.long 0x8 6. "PR6DN,PR6DN" "0,1"
bitfld.long 0x8 5. "PR5DN,PR5DN" "0,1"
bitfld.long 0x8 4. "PR4DN,PR4DN" "0,1"
bitfld.long 0x8 3. "PR3DN,PR3DN" "0,1"
bitfld.long 0x8 2. "PR2DN,PR2DN" "0,1"
bitfld.long 0x8 1. "PR1DN,PR1DN" "0,1"
bitfld.long 0x8 0. "PR0DN,PR0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PR Input Enable Control Register"
bitfld.long 0x0 7. "PR7IE,PR7IE" "0,1"
bitfld.long 0x0 6. "PR6IE,PR6IE" "0,1"
bitfld.long 0x0 5. "PR5IE,PR5IE" "0,1"
bitfld.long 0x0 4. "PR4IE,PR4IE" "0,1"
bitfld.long 0x0 3. "PR3IE,PR3IE" "0,1"
bitfld.long 0x0 2. "PR2IE,PR2IE" "0,1"
bitfld.long 0x0 1. "PR1IE,PR1IE" "0,1"
bitfld.long 0x0 0. "PR0IE,PR0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
tree "PT (Port T)"
base ad:0x400C0F00
group.long 0x0++0x17
line.long 0x0 "DATA,PT Data Register"
bitfld.long 0x0 3. "PT3,PT3" "0,1"
bitfld.long 0x0 2. "PT2,PT2" "0,1"
bitfld.long 0x0 1. "PT1,PT1" "0,1"
bitfld.long 0x0 0. "PT0,PT0" "0,1"
line.long 0x4 "CR,PT Control Register"
bitfld.long 0x4 3. "PT3C,PT3C" "0,1"
bitfld.long 0x4 2. "PT2C,PT2C" "0,1"
bitfld.long 0x4 1. "PT1C,PT1C" "0,1"
bitfld.long 0x4 0. "PT0C,PT0C" "0,1"
line.long 0x8 "FR1,PT Function Register 1"
bitfld.long 0x8 3. "PT3F1,PT3F1" "0,1"
bitfld.long 0x8 2. "PT2F1,PT2F1" "0,1"
bitfld.long 0x8 1. "PT1F1,PT1F1" "0,1"
bitfld.long 0x8 0. "PT0F1,PT0F1" "0,1"
line.long 0xC "FR2,PT Function Register 2"
bitfld.long 0xC 1. "PT1F2,PT1F2" "0,1"
bitfld.long 0xC 0. "PT0F2,PT0F2" "0,1"
line.long 0x10 "FR3,PT Function Register 3"
bitfld.long 0x10 3. "PT3F3,PT3F3" "0,1"
bitfld.long 0x10 2. "PT2F3,PT2F3" "0,1"
bitfld.long 0x10 1. "PT1F3,PT1F3" "0,1"
line.long 0x14 "FR4,PT Function Register 4"
bitfld.long 0x14 1. "PT1F4,PT1F4" "0,1"
bitfld.long 0x14 0. "PT0F4,PT0F4" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PT Open Drain Control Register"
bitfld.long 0x0 3. "PT3OD,PT3OD" "0,1"
bitfld.long 0x0 2. "PT2OD,PT2OD" "0,1"
bitfld.long 0x0 1. "PT1OD,PT1OD" "0,1"
bitfld.long 0x0 0. "PT0OD,PT0OD" "0,1"
line.long 0x4 "PUP,PT Pull-up Control Register"
bitfld.long 0x4 3. "PT3UP,PT3UP" "0,1"
bitfld.long 0x4 2. "PT2UP,PT2UP" "0,1"
bitfld.long 0x4 1. "PT1UP,PT1UP" "0,1"
bitfld.long 0x4 0. "PT0UP,PT0UP" "0,1"
line.long 0x8 "PDN,PT Pull-Down Control Register"
bitfld.long 0x8 3. "PT3DN,PT3DN" "0,1"
bitfld.long 0x8 2. "PT2DN,PT2DN" "0,1"
bitfld.long 0x8 1. "PT1DN,PT1DN" "0,1"
bitfld.long 0x8 0. "PT0DN,PT0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PT Input Enable Control Register"
bitfld.long 0x0 3. "PT3IE,PT3IE" "0,1"
bitfld.long 0x0 2. "PT2IE,PT2IE" "0,1"
bitfld.long 0x0 1. "PT1IE,PT1IE" "0,1"
bitfld.long 0x0 0. "PT0IE,PT0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*"))
tree "PV (Port V)"
base ad:0x400C1100
group.long 0x0++0x7
line.long 0x0 "DATA,PV Data Register"
bitfld.long 0x0 3. "PV3,PV3" "0,1"
bitfld.long 0x0 2. "PV2,PV2" "0,1"
bitfld.long 0x0 1. "PV1,PV1" "0,1"
bitfld.long 0x0 0. "PV0,PV0" "0,1"
line.long 0x4 "CR,PV Control Register"
bitfld.long 0x4 3. "PV3C,PV3C" "0,1"
bitfld.long 0x4 2. "PV2C,PV2C" "0,1"
bitfld.long 0x4 1. "PV1C,PV1C" "0,1"
bitfld.long 0x4 0. "PV0C,PV0C" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PV Function Register 6"
bitfld.long 0x0 3. "PV3F6,PV3F6" "0,1"
bitfld.long 0x0 2. "PV2F6,PV2F6" "0,1"
bitfld.long 0x0 1. "PV1F6,PV1F6" "0,1"
bitfld.long 0x0 0. "PV0F6,PV0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PV Open Drain Control Register"
bitfld.long 0x0 3. "PV3OD,PV3OD" "0,1"
bitfld.long 0x0 2. "PV2OD,PV2OD" "0,1"
bitfld.long 0x0 1. "PV1OD,PV1OD" "0,1"
bitfld.long 0x0 0. "PV0OD,PV0OD" "0,1"
line.long 0x4 "PUP,PV Pull-up Control Register"
bitfld.long 0x4 3. "PV3UP,PV3UP" "0,1"
bitfld.long 0x4 2. "PV2UP,PV2UP" "0,1"
bitfld.long 0x4 1. "PV1UP,PV1UP" "0,1"
bitfld.long 0x4 0. "PV0UP,PV0UP" "0,1"
line.long 0x8 "PDN,PV Pull-Down Control Register"
bitfld.long 0x8 3. "PV3DN,PV3DN" "0,1"
bitfld.long 0x8 2. "PV2DN,PV2DN" "0,1"
bitfld.long 0x8 1. "PV1DN,PV1DN" "0,1"
bitfld.long 0x8 0. "PV0DN,PV0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PV Input Enable Control Register"
bitfld.long 0x0 3. "PV3IE,PV3IE" "0,1"
bitfld.long 0x0 2. "PV2IE,PV2IE" "0,1"
bitfld.long 0x0 1. "PV1IE,PV1IE" "0,1"
bitfld.long 0x0 0. "PV0IE,PV0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PD (Port D)"
base ad:0x400C0300
group.long 0x0++0x7
line.long 0x0 "DATA,PD Data Register"
bitfld.long 0x0 5. "PD5,PD5" "0,1"
bitfld.long 0x0 4. "PD4,PD4" "0,1"
bitfld.long 0x0 3. "PD3,PD3" "0,1"
bitfld.long 0x0 2. "PD2,PD2" "0,1"
bitfld.long 0x0 1. "PD1,PD1" "0,1"
bitfld.long 0x0 0. "PD0,PD0" "0,1"
line.long 0x4 "CR,PD Control Register"
bitfld.long 0x4 5. "PD5C,PD5C" "0,1"
bitfld.long 0x4 4. "PD4C,PD4C" "0,1"
bitfld.long 0x4 3. "PD3C,PD3C" "0,1"
bitfld.long 0x4 2. "PD2C,PD2C" "0,1"
bitfld.long 0x4 1. "PD1C,PD1C" "0,1"
bitfld.long 0x4 0. "PD0C,PD0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PD Open Drain Control Register"
bitfld.long 0x0 5. "PD5OD,PD5OD" "0,1"
bitfld.long 0x0 4. "PD4OD,PD4OD" "0,1"
bitfld.long 0x0 3. "PD3OD,PD3OD" "0,1"
bitfld.long 0x0 2. "PD2OD,PD2OD" "0,1"
bitfld.long 0x0 1. "PD1OD,PD1OD" "0,1"
bitfld.long 0x0 0. "PD0OD,PD0OD" "0,1"
line.long 0x4 "PUP,PD Pull-up Control Register"
bitfld.long 0x4 5. "PD5UP,PD5UP" "0,1"
bitfld.long 0x4 4. "PD4UP,PD4UP" "0,1"
bitfld.long 0x4 3. "PD3UP,PD3UP" "0,1"
bitfld.long 0x4 2. "PD2UP,PD2UP" "0,1"
bitfld.long 0x4 1. "PD1UP,PD1UP" "0,1"
bitfld.long 0x4 0. "PD0UP,PD0UP" "0,1"
line.long 0x8 "PDN,PD Pull-Down Control Register"
bitfld.long 0x8 5. "PD5DN,PD5DN" "0,1"
bitfld.long 0x8 4. "PD4DN,PD4DN" "0,1"
bitfld.long 0x8 3. "PD3DN,PD3DN" "0,1"
bitfld.long 0x8 2. "PD2DN,PD2DN" "0,1"
bitfld.long 0x8 1. "PD1DN,PD1DN" "0,1"
bitfld.long 0x8 0. "PD0DN,PD0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PD Input Enable Control Register"
bitfld.long 0x0 5. "PD5IE,PD5IE" "0,1"
bitfld.long 0x0 4. "PD4IE,PD4IE" "0,1"
bitfld.long 0x0 3. "PD3IE,PD3IE" "0,1"
bitfld.long 0x0 2. "PD2IE,PD2IE" "0,1"
bitfld.long 0x0 1. "PD1IE,PD1IE" "0,1"
bitfld.long 0x0 0. "PD0IE,PD0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PR (Port R)"
base ad:0x400C0E00
group.long 0x0++0x17
line.long 0x0 "DATA,PR Data Register"
bitfld.long 0x0 7. "PR7,PR7" "0,1"
bitfld.long 0x0 6. "PR6,PR6" "0,1"
bitfld.long 0x0 5. "PR5,PR5" "0,1"
bitfld.long 0x0 4. "PR4,PR4" "0,1"
bitfld.long 0x0 3. "PR3,PR3" "0,1"
bitfld.long 0x0 2. "PR2,PR2" "0,1"
bitfld.long 0x0 1. "PR1,PR1" "0,1"
bitfld.long 0x0 0. "PR0,PR0" "0,1"
line.long 0x4 "CR,PR Control Register"
bitfld.long 0x4 7. "PR7C,PR7C" "0,1"
bitfld.long 0x4 6. "PR6C,PR6C" "0,1"
bitfld.long 0x4 5. "PR5C,PR5C" "0,1"
bitfld.long 0x4 4. "PR4C,PR4C" "0,1"
bitfld.long 0x4 3. "PR3C,PR3C" "0,1"
bitfld.long 0x4 2. "PR2C,PR2C" "0,1"
bitfld.long 0x4 1. "PR1C,PR1C" "0,1"
bitfld.long 0x4 0. "PR0C,PR0C" "0,1"
line.long 0x8 "FR1,PR Function Register 1"
bitfld.long 0x8 2. "PR2F1,PR2F1" "0,1"
bitfld.long 0x8 1. "PR1F1,PR1F1" "0,1"
bitfld.long 0x8 0. "PR0F1,PR0F1" "0,1"
line.long 0xC "FR2,PR Function Register 2"
bitfld.long 0xC 1. "PR1F2,PR1F2" "0,1"
bitfld.long 0xC 0. "PR0F2,PR0F2" "0,1"
line.long 0x10 "FR3,PR Function Register 3"
bitfld.long 0x10 2. "PR2F3,PR2F3" "0,1"
bitfld.long 0x10 1. "PR1F3,PR1F3" "0,1"
bitfld.long 0x10 0. "PR0F3,PR0F3" "0,1"
line.long 0x14 "FR4,PR Function Register 4"
bitfld.long 0x14 2. "PR2F4,PR2F4" "0,1"
bitfld.long 0x14 1. "PR1F4,PR1F4" "0,1"
bitfld.long 0x14 0. "PR0F4,PR0F4" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PR Function Register 6"
bitfld.long 0x0 7. "PR7F6,PR7F6" "0,1"
bitfld.long 0x0 6. "PR6F6,PR6F6" "0,1"
bitfld.long 0x0 5. "PR5F6,PR5F6" "0,1"
bitfld.long 0x0 4. "PR4F6,PR4F6" "0,1"
bitfld.long 0x0 3. "PR3F6,PR3F6" "0,1"
bitfld.long 0x0 2. "PR2F6,PR2F6" "0,1"
bitfld.long 0x0 1. "PR1F6,PR1F6" "0,1"
bitfld.long 0x0 0. "PR0F6,PR0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PR Open Drain Control Register"
bitfld.long 0x0 7. "PR7OD,PR7OD" "0,1"
bitfld.long 0x0 6. "PR6OD,PR6OD" "0,1"
bitfld.long 0x0 5. "PR5OD,PR5OD" "0,1"
bitfld.long 0x0 4. "PR4OD,PR4OD" "0,1"
bitfld.long 0x0 3. "PR3OD,PR3OD" "0,1"
bitfld.long 0x0 2. "PR2OD,PR2OD" "0,1"
bitfld.long 0x0 1. "PR1OD,PR1OD" "0,1"
bitfld.long 0x0 0. "PR0OD,PR0OD" "0,1"
line.long 0x4 "PUP,PR Pull-up Control Register"
bitfld.long 0x4 7. "PR7UP,PR7UP" "0,1"
bitfld.long 0x4 6. "PR6UP,PR6UP" "0,1"
bitfld.long 0x4 5. "PR5UP,PR5UP" "0,1"
bitfld.long 0x4 4. "PR4UP,PR4UP" "0,1"
bitfld.long 0x4 3. "PR3UP,PR3UP" "0,1"
bitfld.long 0x4 2. "PR2UP,PR2UP" "0,1"
bitfld.long 0x4 1. "PR1UP,PR1UP" "0,1"
bitfld.long 0x4 0. "PR0UP,PR0UP" "0,1"
line.long 0x8 "PDN,PR Pull-Down Control Register"
bitfld.long 0x8 7. "PR7DN,PR7DN" "0,1"
bitfld.long 0x8 6. "PR6DN,PR6DN" "0,1"
bitfld.long 0x8 5. "PR5DN,PR5DN" "0,1"
bitfld.long 0x8 4. "PR4DN,PR4DN" "0,1"
bitfld.long 0x8 3. "PR3DN,PR3DN" "0,1"
bitfld.long 0x8 2. "PR2DN,PR2DN" "0,1"
bitfld.long 0x8 1. "PR1DN,PR1DN" "0,1"
bitfld.long 0x8 0. "PR0DN,PR0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PR Input Enable Control Register"
bitfld.long 0x0 7. "PR7IE,PR7IE" "0,1"
bitfld.long 0x0 6. "PR6IE,PR6IE" "0,1"
bitfld.long 0x0 5. "PR5IE,PR5IE" "0,1"
bitfld.long 0x0 4. "PR4IE,PR4IE" "0,1"
bitfld.long 0x0 3. "PR3IE,PR3IE" "0,1"
bitfld.long 0x0 2. "PR2IE,PR2IE" "0,1"
bitfld.long 0x0 1. "PR1IE,PR1IE" "0,1"
bitfld.long 0x0 0. "PR0IE,PR0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PT (Port T)"
base ad:0x400C0F00
group.long 0x0++0x17
line.long 0x0 "DATA,PT Data Register"
bitfld.long 0x0 7. "PT7,PT7" "0,1"
bitfld.long 0x0 6. "PT6,PT6" "0,1"
bitfld.long 0x0 5. "PT5,PT5" "0,1"
bitfld.long 0x0 4. "PT4,PT4" "0,1"
bitfld.long 0x0 3. "PT3,PT3" "0,1"
bitfld.long 0x0 2. "PT2,PT2" "0,1"
bitfld.long 0x0 1. "PT1,PT1" "0,1"
bitfld.long 0x0 0. "PT0,PT0" "0,1"
line.long 0x4 "CR,PT Control Register"
bitfld.long 0x4 7. "PT7C,PT7C" "0,1"
bitfld.long 0x4 6. "PT6C,PT6C" "0,1"
bitfld.long 0x4 5. "PT5C,PT5C" "0,1"
bitfld.long 0x4 4. "PT4C,PT4C" "0,1"
bitfld.long 0x4 3. "PT3C,PT3C" "0,1"
bitfld.long 0x4 2. "PT2C,PT2C" "0,1"
bitfld.long 0x4 1. "PT1C,PT1C" "0,1"
bitfld.long 0x4 0. "PT0C,PT0C" "0,1"
line.long 0x8 "FR1,PT Function Register 1"
bitfld.long 0x8 4. "PT4F1,PT4F1" "0,1"
bitfld.long 0x8 3. "PT3F1,PT3F1" "0,1"
bitfld.long 0x8 2. "PT2F1,PT2F1" "0,1"
bitfld.long 0x8 1. "PT1F1,PT1F1" "0,1"
bitfld.long 0x8 0. "PT0F1,PT0F1" "0,1"
line.long 0xC "FR2,PT Function Register 2"
bitfld.long 0xC 1. "PT1F2,PT1F2" "0,1"
bitfld.long 0xC 0. "PT0F2,PT0F2" "0,1"
line.long 0x10 "FR3,PT Function Register 3"
bitfld.long 0x10 7. "PT7F3,PT7F3" "0,1"
bitfld.long 0x10 6. "PT6F3,PT6F3" "0,1"
bitfld.long 0x10 5. "PT5F3,PT5F3" "0,1"
bitfld.long 0x10 4. "PT4F3,PT4F3" "0,1"
bitfld.long 0x10 3. "PT3F3,PT3F3" "0,1"
bitfld.long 0x10 2. "PT2F3,PT2F3" "0,1"
bitfld.long 0x10 1. "PT1F3,PT1F3" "0,1"
line.long 0x14 "FR4,PT Function Register 4"
bitfld.long 0x14 7. "PT7F4,PT7F4" "0,1"
bitfld.long 0x14 6. "PT6F4,PT6F4" "0,1"
bitfld.long 0x14 5. "PT5F4,PT5F4" "0,1"
bitfld.long 0x14 1. "PT1F4,PT1F4" "0,1"
bitfld.long 0x14 0. "PT0F4,PT0F4" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PT Open Drain Control Register"
bitfld.long 0x0 7. "PT7OD,PT7OD" "0,1"
bitfld.long 0x0 6. "PT6OD,PT6OD" "0,1"
bitfld.long 0x0 5. "PT5OD,PT5OD" "0,1"
bitfld.long 0x0 4. "PT4OD,PT4OD" "0,1"
bitfld.long 0x0 3. "PT3OD,PT3OD" "0,1"
bitfld.long 0x0 2. "PT2OD,PT2OD" "0,1"
bitfld.long 0x0 1. "PT1OD,PT1OD" "0,1"
bitfld.long 0x0 0. "PT0OD,PT0OD" "0,1"
line.long 0x4 "PUP,PT Pull-up Control Register"
bitfld.long 0x4 7. "PT7UP,PT7UP" "0,1"
bitfld.long 0x4 6. "PT6UP,PT6UP" "0,1"
bitfld.long 0x4 5. "PT5UP,PT5UP" "0,1"
bitfld.long 0x4 4. "PT4UP,PT4UP" "0,1"
bitfld.long 0x4 3. "PT3UP,PT3UP" "0,1"
bitfld.long 0x4 2. "PT2UP,PT2UP" "0,1"
bitfld.long 0x4 1. "PT1UP,PT1UP" "0,1"
bitfld.long 0x4 0. "PT0UP,PT0UP" "0,1"
line.long 0x8 "PDN,PT Pull-Down Control Register"
bitfld.long 0x8 7. "PT7DN,PT7DN" "0,1"
bitfld.long 0x8 6. "PT6DN,PT6DN" "0,1"
bitfld.long 0x8 5. "PT5DN,PT5DN" "0,1"
bitfld.long 0x8 4. "PT4DN,PT4DN" "0,1"
bitfld.long 0x8 3. "PT3DN,PT3DN" "0,1"
bitfld.long 0x8 2. "PT2DN,PT2DN" "0,1"
bitfld.long 0x8 1. "PT1DN,PT1DN" "0,1"
bitfld.long 0x8 0. "PT0DN,PT0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PT Input Enable Control Register"
bitfld.long 0x0 7. "PT7IE,PT7IE" "0,1"
bitfld.long 0x0 6. "PT6IE,PT6IE" "0,1"
bitfld.long 0x0 5. "PT5IE,PT5IE" "0,1"
bitfld.long 0x0 4. "PT4IE,PT4IE" "0,1"
bitfld.long 0x0 3. "PT3IE,PT3IE" "0,1"
bitfld.long 0x0 2. "PT2IE,PT2IE" "0,1"
bitfld.long 0x0 1. "PT1IE,PT1IE" "0,1"
bitfld.long 0x0 0. "PT0IE,PT0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PU (Port U)"
base ad:0x400C1000
group.long 0x0++0x7
line.long 0x0 "DATA,PU Data Register"
bitfld.long 0x0 5. "PU5,PU5" "0,1"
bitfld.long 0x0 4. "PU4,PU4" "0,1"
bitfld.long 0x0 3. "PU3,PU3" "0,1"
bitfld.long 0x0 2. "PU2,PU2" "0,1"
bitfld.long 0x0 1. "PU1,PU1" "0,1"
bitfld.long 0x0 0. "PU0,PU0" "0,1"
line.long 0x4 "CR,PU Control Register"
bitfld.long 0x4 5. "PU5C,PU5C" "0,1"
bitfld.long 0x4 4. "PU4C,PU4C" "0,1"
bitfld.long 0x4 3. "PU3C,PU3C" "0,1"
bitfld.long 0x4 2. "PU2C,PU2C" "0,1"
bitfld.long 0x4 1. "PU1C,PU1C" "0,1"
bitfld.long 0x4 0. "PU0C,PU0C" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PU Open Drain Control Register"
bitfld.long 0x0 5. "PU5OD,PU5OD" "0,1"
bitfld.long 0x0 4. "PU4OD,PU4OD" "0,1"
bitfld.long 0x0 3. "PU3OD,PU3OD" "0,1"
bitfld.long 0x0 2. "PU2OD,PU2OD" "0,1"
bitfld.long 0x0 1. "PU1OD,PU1OD" "0,1"
bitfld.long 0x0 0. "PU0OD,PU0OD" "0,1"
line.long 0x4 "PUP,PU Pull-up Control Register"
bitfld.long 0x4 5. "PU5UP,PU5UP" "0,1"
bitfld.long 0x4 4. "PU4UP,PU4UP" "0,1"
bitfld.long 0x4 3. "PU3UP,PU3UP" "0,1"
bitfld.long 0x4 2. "PU2UP,PU2UP" "0,1"
bitfld.long 0x4 1. "PU1UP,PU1UP" "0,1"
bitfld.long 0x4 0. "PU0UP,PU0UP" "0,1"
line.long 0x8 "PDN,PU Pull-Down Control Register"
bitfld.long 0x8 5. "PU5DN,PU5DN" "0,1"
bitfld.long 0x8 4. "PU4DN,PU4DN" "0,1"
bitfld.long 0x8 3. "PU3DN,PU3DN" "0,1"
bitfld.long 0x8 2. "PU2DN,PU2DN" "0,1"
bitfld.long 0x8 1. "PU1DN,PU1DN" "0,1"
bitfld.long 0x8 0. "PU0DN,PU0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PU Input Enable Control Register"
bitfld.long 0x0 5. "PU5IE,PU5IE" "0,1"
bitfld.long 0x0 4. "PU4IE,PU4IE" "0,1"
bitfld.long 0x0 3. "PU3IE,PU3IE" "0,1"
bitfld.long 0x0 2. "PU2IE,PU2IE" "0,1"
bitfld.long 0x0 1. "PU1IE,PU1IE" "0,1"
bitfld.long 0x0 0. "PU0IE,PU0IE" "0,1"
tree.end
endif
sif (cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "PV (Port V)"
base ad:0x400C1100
group.long 0x0++0xF
line.long 0x0 "DATA,PV Data Register"
bitfld.long 0x0 7. "PV7,PV7" "0,1"
bitfld.long 0x0 6. "PV6,PV6" "0,1"
bitfld.long 0x0 5. "PV5,PV5" "0,1"
bitfld.long 0x0 4. "PV4,PV4" "0,1"
bitfld.long 0x0 3. "PV3,PV3" "0,1"
bitfld.long 0x0 2. "PV2,PV2" "0,1"
bitfld.long 0x0 1. "PV1,PV1" "0,1"
bitfld.long 0x0 0. "PV0,PV0" "0,1"
line.long 0x4 "CR,PV Control Register"
bitfld.long 0x4 7. "PV7C,PV7C" "0,1"
bitfld.long 0x4 6. "PV6C,PV6C" "0,1"
bitfld.long 0x4 5. "PV5C,PV5C" "0,1"
bitfld.long 0x4 4. "PV4C,PV4C" "0,1"
bitfld.long 0x4 3. "PV3C,PV3C" "0,1"
bitfld.long 0x4 2. "PV2C,PV2C" "0,1"
bitfld.long 0x4 1. "PV1C,PV1C" "0,1"
bitfld.long 0x4 0. "PV0C,PV0C" "0,1"
line.long 0x8 "FR1,PV Function Register 1"
bitfld.long 0x8 7. "PV7F1,PV7F1" "0,1"
bitfld.long 0x8 6. "PV6F1,PV6F1" "0,1"
bitfld.long 0x8 5. "PV5F1,PV5F1" "0,1"
line.long 0xC "FR2,PV Function Register 2"
bitfld.long 0xC 7. "PV7F2,PV7F2" "0,1"
bitfld.long 0xC 6. "PV6F2,PV6F2" "0,1"
group.long 0x1C++0x3
line.long 0x0 "FR6,PV Function Register 6"
bitfld.long 0x0 3. "PV3F6,PV3F6" "0,1"
bitfld.long 0x0 2. "PV2F6,PV2F6" "0,1"
bitfld.long 0x0 1. "PV1F6,PV1F6" "0,1"
bitfld.long 0x0 0. "PV0F6,PV0F6" "0,1"
group.long 0x28++0xB
line.long 0x0 "OD,PV Open Drain Control Register"
bitfld.long 0x0 7. "PV7OD,PV7OD" "0,1"
bitfld.long 0x0 6. "PV6OD,PV6OD" "0,1"
bitfld.long 0x0 5. "PV5OD,PV5OD" "0,1"
bitfld.long 0x0 4. "PV4OD,PV4OD" "0,1"
bitfld.long 0x0 3. "PV3OD,PV3OD" "0,1"
bitfld.long 0x0 2. "PV2OD,PV2OD" "0,1"
bitfld.long 0x0 1. "PV1OD,PV1OD" "0,1"
bitfld.long 0x0 0. "PV0OD,PV0OD" "0,1"
line.long 0x4 "PUP,PV Pull-up Control Register"
bitfld.long 0x4 7. "PV7UP,PV7UP" "0,1"
bitfld.long 0x4 6. "PV6UP,PV6UP" "0,1"
bitfld.long 0x4 5. "PV5UP,PV5UP" "0,1"
bitfld.long 0x4 4. "PV4UP,PV4UP" "0,1"
bitfld.long 0x4 3. "PV3UP,PV3UP" "0,1"
bitfld.long 0x4 2. "PV2UP,PV2UP" "0,1"
bitfld.long 0x4 1. "PV1UP,PV1UP" "0,1"
bitfld.long 0x4 0. "PV0UP,PV0UP" "0,1"
line.long 0x8 "PDN,PV Pull-Down Control Register"
bitfld.long 0x8 7. "PV7DN,PV7DN" "0,1"
bitfld.long 0x8 6. "PV6DN,PV6DN" "0,1"
bitfld.long 0x8 5. "PV5DN,PV5DN" "0,1"
bitfld.long 0x8 4. "PV4DN,PV4DN" "0,1"
bitfld.long 0x8 3. "PV3DN,PV3DN" "0,1"
bitfld.long 0x8 2. "PV2DN,PV2DN" "0,1"
bitfld.long 0x8 1. "PV1DN,PV1DN" "0,1"
bitfld.long 0x8 0. "PV0DN,PV0DN" "0,1"
group.long 0x38++0x3
line.long 0x0 "IE,PV Input Enable Control Register"
bitfld.long 0x0 7. "PV7IE,PV7IE" "0,1"
bitfld.long 0x0 6. "PV6IE,PV6IE" "0,1"
bitfld.long 0x0 5. "PV5IE,PV5IE" "0,1"
bitfld.long 0x0 4. "PV4IE,PV4IE" "0,1"
bitfld.long 0x0 3. "PV3IE,PV3IE" "0,1"
bitfld.long 0x0 2. "PV2IE,PV2IE" "0,1"
bitfld.long 0x0 1. "PV1IE,PV1IE" "0,1"
bitfld.long 0x0 0. "PV0IE,PV0IE" "0,1"
tree.end
endif
tree.end
tree "RLM (Low Speed Oscillation/Power Supply Control/Reset)"
base ad:0x4003E400
group.byte 0x0++0x3
line.byte 0x0 "LOSCCR,Low OSC Control Register"
bitfld.byte 0x0 0. "XTEN,XTEN" "0,1"
line.byte 0x1 "SHTDNOP,Power Shut Down Control Register"
bitfld.byte 0x1 0. "PTKEEP,PTKEEP" "0,1"
line.byte 0x2 "RSTFLG0,Reset flag register 0"
bitfld.byte 0x2 5. "LVDRSTF,LVDRSTF" "0,1"
bitfld.byte 0x2 4. "STOP2RSTF,STOP2RSTF" "0,1"
bitfld.byte 0x2 3. "PINRSTF,PINRSTF" "0,1"
bitfld.byte 0x2 0. "PORSTF,PORSTF" "0,1"
line.byte 0x3 "RSTFLG1,Reset flag register 1"
bitfld.byte 0x3 3. "OFDRSTF,OFDRSTF" "0,1"
bitfld.byte 0x3 2. "WDTRSTF,WDTRSTF" "0,1"
bitfld.byte 0x3 1. "LOCKRSTF,LOCKRSTF" "0,1"
bitfld.byte 0x3 0. "SYSRSTF,SYSRSTF" "0,1"
group.byte 0xF++0x0
line.byte 0x0 "PROTECT,Protect Register"
hexmask.byte 0x0 0.--7. 1. "PROTECT,PROTECT"
tree.end
tree "RMC (Remote Control Signal Preprocessor)"
base ad:0x400E7000
group.long 0x0++0x7
line.long 0x0 "EN,RMC Enable Register"
bitfld.long 0x0 0. "RMCEN,RMCEN" "0,1"
line.long 0x4 "REN,RMC Receive Enable Register"
bitfld.long 0x4 0. "RMCREN,RMCREN" "0,1"
rgroup.long 0x8++0xB
line.long 0x0 "RBUF1,RMC Receive Data Buffer Register 1"
hexmask.long 0x0 0.--31. 1. "RMCRBUF,RMCRBUF"
line.long 0x4 "RBUF2,RMC Receive Data Buffer Register 2"
hexmask.long 0x4 0.--31. 1. "RMCRBUF,RMCRBUF"
line.long 0x8 "RBUF3,RMC Receive Data Buffer Register 3"
hexmask.long.byte 0x8 0.--7. 1. "RMCRBUF,RMCRBUF"
group.long 0x14++0xF
line.long 0x0 "RCR1,RMC Receive Control Register 1"
hexmask.long.byte 0x0 24.--31. 1. "RMCLCMAX,RMCLCMAX"
hexmask.long.byte 0x0 16.--23. 1. "RMCLCMIN,RMCLCMIN"
hexmask.long.byte 0x0 8.--15. 1. "RMCLLMAX,RMCLLMAX"
hexmask.long.byte 0x0 0.--7. 1. "RMCLLMIN,RMCLLMIN"
line.long 0x4 "RCR2,RMC Receive Control Register 2"
bitfld.long 0x4 31. "RMCLIEN,RMCLIEN" "0,1"
bitfld.long 0x4 30. "RMCEDIEN,RMCEDIEN" "0,1"
bitfld.long 0x4 25. "RMCLD,RMCLD" "0,1"
bitfld.long 0x4 24. "RMCPHM,RMCPHM" "0,1"
hexmask.long.byte 0x4 8.--15. 1. "RMCLL,RMCLL"
hexmask.long.byte 0x4 0.--7. 1. "RMCDMAX,RMCDMAX"
line.long 0x8 "RCR3,RMC Receive Control Register 3"
hexmask.long.byte 0x8 8.--14. 1. "RMCDATH,RMCDATH"
hexmask.long.byte 0x8 0.--6. 1. "RMCDATL,RMCDATL"
line.long 0xC "RCR4,RMC Receive Control Register 4"
bitfld.long 0xC 7. "RMCPO,RMCPO" "0,1"
hexmask.long.byte 0xC 0.--3. 1. "RMCNC,RMCNC"
rgroup.long 0x24++0x3
line.long 0x0 "RSTAT,RMC Receive Status Register"
bitfld.long 0x0 15. "RMCRLIF,RMCRLIF" "0,1"
bitfld.long 0x0 14. "RMCLOIF,RMCLOIF" "0,1"
bitfld.long 0x0 13. "RMCDMAXIF,RMCDMAXIF" "0,1"
bitfld.long 0x0 12. "RMCEDIF,RMCEDIF" "0,1"
bitfld.long 0x0 7. "RMCRLDR,RMCRLDR" "0,1"
hexmask.long.byte 0x0 0.--6. 1. "RMCRNUM,RMCRNUM"
group.long 0x28++0xF
line.long 0x0 "END1,RMC Receive End Bit Number Register 1"
hexmask.long.byte 0x0 0.--6. 1. "RMCEND1,RMCEND1"
line.long 0x4 "END2,RMC Receive End Bit Number Register 2"
hexmask.long.byte 0x4 0.--6. 1. "RMCEND2,RMCEND2"
line.long 0x8 "END3,RMC Receive End Bit Number Register 3"
hexmask.long.byte 0x8 0.--6. 1. "RMCEND3,RMCEND3"
line.long 0xC "FSSEL,RMC Frequency Selection Register"
bitfld.long 0xC 0. "RMCCLK,RMCCLK" "0,1"
tree.end
tree "RPAR (RAM Parity)"
base ad:0x400BBB00
group.long 0x0++0x3
line.long 0x0 "CTL,RAMM Parity control register"
bitfld.long 0x0 1. "RPARF,RPARF" "0,1"
bitfld.long 0x0 0. "RPAREN,RPAREN" "0,1"
rgroup.long 0x4++0x3
line.long 0x0 "ST,RAMM Parity status register"
bitfld.long 0x0 3. "RPARFG3,RPARFG3" "0,1"
bitfld.long 0x0 2. "RPARFG2,RPARFG2" "0,1"
bitfld.long 0x0 1. "RPARFG1,RPARFG1" "0,1"
bitfld.long 0x0 0. "RPARFG0,RPARFG0" "0,1"
wgroup.long 0x8++0x3
line.long 0x0 "CLR,RAMM Parity status clear register"
bitfld.long 0x0 3. "RPARCLR3,RPARCLR3" "0,1"
bitfld.long 0x0 2. "RPARCLR2,RPARCLR2" "0,1"
bitfld.long 0x0 1. "RPARCLR1,RPARCLR1" "0,1"
bitfld.long 0x0 0. "RPARCLR0,RPARCLR0" "0,1"
rgroup.long 0xC++0xF
line.long 0x0 "EAD0,RAMM Parity Error address register 0"
hexmask.long 0x0 0.--31. 1. "RPAREADD0,RPAREADD0"
line.long 0x4 "EAD1,RAMM Parity Error address register 1"
hexmask.long 0x4 0.--31. 1. "RPAREADD1,RPAREADD1"
line.long 0x8 "EAD2,RAMM Parity Error address register 2"
hexmask.long 0x8 0.--31. 1. "RPAREADD2,RPAREADD2"
line.long 0xC "EAD3,RAMM Parity Error address register 3"
hexmask.long 0xC 0.--31. 1. "RPAREADD3,RPAREADD3"
tree.end
tree "RTC (Real Time Clock)"
base ad:0x400CC000
group.byte 0x0++0x2
line.byte 0x0 "SECR,RTC Sec setting register"
hexmask.byte 0x0 0.--6. 1. "SE,SE"
line.byte 0x1 "MINR,RTC Min settging register"
hexmask.byte 0x1 0.--6. 1. "MI,MI"
line.byte 0x2 "HOURR,RTC Hour setting register"
hexmask.byte 0x2 0.--5. 1. "HO,HO"
group.byte 0x4++0x2
line.byte 0x0 "DAYR,RTC Day setting register"
bitfld.byte 0x0 0.--2. "WE,WE" "0,1,2,3,4,5,6,7"
line.byte 0x1 "DATER,RTC Date setting register"
hexmask.byte 0x1 0.--5. 1. "DA,DA"
line.byte 0x2 "MONTHR_A,RTC Month settging register PAGE0"
hexmask.byte 0x2 0.--4. 1. "MO,MO"
group.byte 0x6++0x1
line.byte 0x0 "MONTHR_B,RTC 24 hours _ 12 hours clock select register PAGE1"
bitfld.byte 0x0 0. "MO0,MO0" "0,1"
line.byte 0x1 "YEARR_A,RTC Year setting register PAGE0"
hexmask.byte 0x1 0.--7. 1. "YE,YE"
group.byte 0x7++0x1
line.byte 0x0 "YEARR_B,RTC Leap year register PAGE1"
bitfld.byte 0x0 0.--1. "LEAP,LEAP" "0,1,2,3"
line.byte 0x1 "PAGER,RTC Page register"
bitfld.byte 0x1 7. "INTENA,INTENA" "0,1"
bitfld.byte 0x1 4. "ADJUST,ADJUST" "0,1"
bitfld.byte 0x1 3. "ENATMR,ENATMR" "0,1"
bitfld.byte 0x1 2. "ENAALM,ENAALM" "0,1"
bitfld.byte 0x1 0. "PAGE,PAGE" "0,1"
group.byte 0xC++0x0
line.byte 0x0 "RESTR,RTC Reset register"
bitfld.byte 0x0 7. "DIS1HZ,DIS1HZ" "0,1"
bitfld.byte 0x0 6. "DIS16HZ,DIS16HZ" "0,1"
bitfld.byte 0x0 5. "RSTTMR,RSTTMR" "0,1"
bitfld.byte 0x0 4. "RSTALM,RSTALM" "0,1"
bitfld.byte 0x0 2. "DIS2HZ,DIS2HZ" "0,1"
bitfld.byte 0x0 1. "DIS4HZ,DIS4HZ" "0,1"
bitfld.byte 0x0 0. "DIS8HZ,DIS8HZ" "0,1"
group.byte 0xE++0x3
line.byte 0x0 "PROTECT,RTC protect register"
hexmask.byte 0x0 0.--7. 1. "PROTECT,PROTECT"
line.byte 0x1 "ADJCTL,RTC clock adjust control register"
bitfld.byte 0x1 1.--3. "AJSEL,AJSEL" "0,1,2,3,4,5,6,7"
bitfld.byte 0x1 0. "AJEN,AJEN" "0,1"
line.byte 0x2 "ADJDAT,RTC clock adjust data register"
hexmask.byte 0x2 0.--7. 1. "ADJDAT,ADJDAT"
line.byte 0x3 "ADJSIGN,RTC clock adjust sign register"
bitfld.byte 0x3 0. "ADJSIGN,ADJSIGN" "0,1"
tree.end
tree "SIWDT (Clock Selective Watchdog Timer)"
base ad:0x400BB400
group.long 0x0++0x7
line.long 0x0 "PRO,SIWD Protect register"
hexmask.long.byte 0x0 0.--7. 1. "PROTECT,PROTECT"
line.long 0x4 "EN,SIWD Enable register"
rbitfld.long 0x4 1. "WDTF,WDTF" "0,1"
bitfld.long 0x4 0. "WDTE,WDTE" "0,1"
wgroup.long 0x8++0x3
line.long 0x0 "CR,SIWD Control register"
hexmask.long.byte 0x0 0.--7. 1. "WDCR,WDCR"
group.long 0xC++0x3
line.long 0x0 "MOD,SIWD Mode register"
bitfld.long 0x0 12.--13. "WDCLS,WDCLS" "0,1,2,3"
bitfld.long 0x0 8.--10. "WDTP,WDTP" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 4.--5. "WDCWD,WDCWD" "0,1,2,3"
bitfld.long 0x0 1. "INTF,INTF" "0,1"
bitfld.long 0x0 0. "RESCR,RESCR" "0,1"
rgroup.long 0x10++0x3
line.long 0x0 "MONI,SIWD Monitor register"
hexmask.long 0x0 0.--29. 1. "MONI,MONI"
group.long 0x14++0x3
line.long 0x0 "OSCCR,SIWD Oscillation control register"
bitfld.long 0x0 0. "OSCPRO,OSCPRO" "0,1"
tree.end
tree "T32A (32-bit Timer Event Counter)"
base ad:0x0
tree "T32A0"
base ad:0x400BA000
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A1"
base ad:0x400BA100
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A2"
base ad:0x400BA200
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A3"
base ad:0x400BA300
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A4"
base ad:0x400BA400
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A5"
base ad:0x400BA500
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A6"
base ad:0x400BA600
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree "T32A7"
base ad:0x400BA700
group.long 0x0++0x3
line.long 0x0 "MOD,T32A Mode Register"
bitfld.long 0x0 1. "HALT,HALT" "0,1"
bitfld.long 0x0 0. "MODE32,MODE32" "0,1"
group.long 0x40++0xB
line.long 0x0 "RUNA,T32A Run Register A"
rbitfld.long 0x0 4. "RUNFLGA,RUNFLGA" "0,1"
bitfld.long 0x0 2. "SFTSTPA,SFTSTPA" "0,1"
bitfld.long 0x0 1. "SFTSTAA,SFTSTAA" "0,1"
bitfld.long 0x0 0. "RUNA,RUNA" "0,1"
line.long 0x4 "CRA,T32A Counter control Register A"
bitfld.long 0x4 28.--30. "PRSCLA,PRSCLA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKA,CLKA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFA,WBFA" "0,1"
bitfld.long 0x4 16.--17. "UPDNA,UPDNA" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDA,RELDA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPA,STOPA" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTA,STARTA" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRA,T32A Capture control Register A"
bitfld.long 0x8 4.--6. "CAPMA1,CAPMA1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMA0,CAPMA0" "0,1,2,3,4,5,6,7"
wgroup.long 0x4C++0x3
line.long 0x0 "OUTCRA0,T32A Output control Register A0"
bitfld.long 0x0 0.--1. "OCRA,OCRA" "0,1,2,3"
group.long 0x50++0xB
line.long 0x0 "OUTCRA1,T32A Output control Register A1"
bitfld.long 0x0 6.--7. "OCRCAPA1,OCRCAPA1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPA0,OCRCAPA0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPA1,OCRCMPA1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPA0,OCRCMPA0" "0,1,2,3"
line.long 0x4 "STA,T32A Status Register A"
bitfld.long 0x4 3. "INTUFA,INTUFA" "0,1"
bitfld.long 0x4 2. "INTOFA,INTOFA" "0,1"
bitfld.long 0x4 1. "INTA1,INTA1" "0,1"
bitfld.long 0x4 0. "INTA0,INTA0" "0,1"
line.long 0x8 "IMA,T32A Interrupt mask Register A"
bitfld.long 0x8 3. "IMUFA,IMUFA" "0,1"
bitfld.long 0x8 2. "IMOFA,IMOFA" "0,1"
bitfld.long 0x8 1. "IMA1,IMA1" "0,1"
bitfld.long 0x8 0. "IMA0,IMA0" "0,1"
rgroup.long 0x5C++0x3
line.long 0x0 "TMRA,T32A Counter capture Register A"
hexmask.long.word 0x0 0.--15. 1. "TMRA,TMRA"
group.long 0x60++0xB
line.long 0x0 "RELDA,T32A Counter Reload Register A"
hexmask.long.word 0x0 0.--15. 1. "RELDA,RELDA"
line.long 0x4 "RGA0,T32A Timer Register A0"
hexmask.long.word 0x4 0.--15. 1. "RGA0,RGA0"
line.long 0x8 "RGA1,T32A Timer Register A1"
hexmask.long.word 0x8 0.--15. 1. "RGA1,RGA1"
rgroup.long 0x6C++0x7
line.long 0x0 "CAPA0,T32A Timer capturer A0"
hexmask.long.word 0x0 0.--15. 1. "CAPA0,CAPA0"
line.long 0x4 "CAPA1,T32A Timer capturer A1"
hexmask.long.word 0x4 0.--15. 1. "CAPA1,CAPA1"
group.long 0x74++0x3
line.long 0x0 "DMAA,T32A DMA Request Enabl eRegister A"
bitfld.long 0x0 2. "DMAENA2,DMAENA2" "0,1"
bitfld.long 0x0 1. "DMAENA1,DMAENA1" "0,1"
bitfld.long 0x0 0. "DMAENA0,DMAENA0" "0,1"
group.long 0x80++0xB
line.long 0x0 "RUNB,T32A Run Register B"
rbitfld.long 0x0 4. "RUNFLGB,RUNFLGB" "0,1"
bitfld.long 0x0 2. "SFTSTPB,SFTSTPB" "0,1"
bitfld.long 0x0 1. "SFTSTAB,SFTSTAB" "0,1"
bitfld.long 0x0 0. "RUNB,RUNB" "0,1"
line.long 0x4 "CRB,T32A Counter control Register B"
bitfld.long 0x4 28.--30. "PRSCLB,PRSCLB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKB,CLKB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFB,WBFB" "0,1"
bitfld.long 0x4 16.--17. "UPDNB,UPDNB" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDB,RELDB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPB,STOPB" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTB,STARTB" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRB,T32A Capture control Register B"
bitfld.long 0x8 4.--6. "CAPMB1,CAPMB1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMB0,CAPMB0" "0,1,2,3,4,5,6,7"
wgroup.long 0x8C++0x3
line.long 0x0 "OUTCRB0,T32A Output control Register B0"
bitfld.long 0x0 0.--1. "OCRB,OCRB" "0,1,2,3"
group.long 0x90++0xB
line.long 0x0 "OUTCRB1,T32A Output control Register B1"
bitfld.long 0x0 6.--7. "OCRCAPB1,OCRCAPB1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPB0,OCRCAPB0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPB1,OCRCMPB1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPB0,OCRCMPB0" "0,1,2,3"
line.long 0x4 "STB,T32A Status Register B"
bitfld.long 0x4 3. "INTUFB,INTUFB" "0,1"
bitfld.long 0x4 2. "INTOFB,INTOFB" "0,1"
bitfld.long 0x4 1. "INTB1,INTB1" "0,1"
bitfld.long 0x4 0. "INTB0,INTB0" "0,1"
line.long 0x8 "IMB,T32A Interrupt mask Register B"
bitfld.long 0x8 3. "IMUFB,IMUFB" "0,1"
bitfld.long 0x8 2. "IMOFB,IMOFB" "0,1"
bitfld.long 0x8 1. "IMB1,IMB1" "0,1"
bitfld.long 0x8 0. "IMB0,IMB0" "0,1"
rgroup.long 0x9C++0x3
line.long 0x0 "TMRB,T32A Counter capture Register B"
hexmask.long.word 0x0 0.--15. 1. "TMRB,TMRB"
group.long 0xA0++0xB
line.long 0x0 "RELDB,T32A Counter Reload Register B"
hexmask.long.word 0x0 0.--15. 1. "RELDB,RELDB"
line.long 0x4 "RGB0,T32A Timer Register B0"
hexmask.long.word 0x4 0.--15. 1. "RGB0,RGB0"
line.long 0x8 "RGB1,T32A Timer Register B1"
hexmask.long.word 0x8 0.--15. 1. "RGB1,RGB1"
rgroup.long 0xAC++0x7
line.long 0x0 "CAPB0,T32A Timer capturer B0"
hexmask.long.word 0x0 0.--15. 1. "CAPB0,CAPB0"
line.long 0x4 "CAPB1,T32A Timer capturer B1"
hexmask.long.word 0x4 0.--15. 1. "CAPB1,CAPB1"
group.long 0xB4++0x3
line.long 0x0 "DMAB,T32A DMA Request Enable Register B"
bitfld.long 0x0 2. "DMAENB2,DMAENB2" "0,1"
bitfld.long 0x0 1. "DMAENB1,DMAENB1" "0,1"
bitfld.long 0x0 0. "DMAENB0,DMAENB0" "0,1"
group.long 0xC0++0xB
line.long 0x0 "RUNC,T32A Run Register C"
rbitfld.long 0x0 4. "RUNFLGC,RUNFLGC" "0,1"
bitfld.long 0x0 2. "SFTSTPC,SFTSTPC" "0,1"
bitfld.long 0x0 1. "SFTSTAC,SFTSTAC" "0,1"
bitfld.long 0x0 0. "RUNC,RUNC" "0,1"
line.long 0x4 "CRC,T32A Counter control Register C"
bitfld.long 0x4 28.--30. "PRSCLC,PRSCLC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 24.--26. "CLKC,CLKC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 20. "WBFC,WBFC" "0,1"
bitfld.long 0x4 16.--17. "UPDNC,UPDNC" "0,1,2,3"
bitfld.long 0x4 8.--10. "RELDC,RELDC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--6. "STOPC,STOPC" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 0.--2. "STARTC,STARTC" "0,1,2,3,4,5,6,7"
line.long 0x8 "CAPCRC,T32A Capture control Register C"
bitfld.long 0x8 4.--6. "CAPMC1,CAPMC1" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 0.--2. "CAPMC0,CAPMC0" "0,1,2,3,4,5,6,7"
wgroup.long 0xCC++0x3
line.long 0x0 "OUTCRC0,T32A Output control Register C0"
bitfld.long 0x0 0.--1. "OCRC,OCRC" "0,1,2,3"
group.long 0xD0++0xB
line.long 0x0 "OUTCRC1,T32A Output control Register C1"
bitfld.long 0x0 6.--7. "OCRCAPC1,OCRCAPC1" "0,1,2,3"
bitfld.long 0x0 4.--5. "OCRCAPC0,OCRCAPC0" "0,1,2,3"
bitfld.long 0x0 2.--3. "OCRCMPC1,OCRCMPC1" "0,1,2,3"
bitfld.long 0x0 0.--1. "OCRCMPC0,OCRCMPC0" "0,1,2,3"
line.long 0x4 "STC,T32A Status Register C"
bitfld.long 0x4 4. "INTSTERR,INTSTERR" "0,1"
bitfld.long 0x4 3. "INTUFC,INTUFC" "0,1"
bitfld.long 0x4 2. "INTOFC,INTOFC" "0,1"
bitfld.long 0x4 1. "INTC1,INTC1" "0,1"
bitfld.long 0x4 0. "INTC0,INTC0" "0,1"
line.long 0x8 "IMC,T32A Interrupt mask Register C"
bitfld.long 0x8 4. "IMSTERR,IMSTERR" "0,1"
bitfld.long 0x8 3. "IMUFC,IMUFC" "0,1"
bitfld.long 0x8 2. "IMOFC,IMOFC" "0,1"
bitfld.long 0x8 1. "IMC1,IMC1" "0,1"
bitfld.long 0x8 0. "IMC0,IMC0" "0,1"
rgroup.long 0xDC++0x3
line.long 0x0 "TMRC,T32A Counter capture Register C"
hexmask.long 0x0 0.--31. 1. "TMRC,TMRC"
group.long 0xE0++0xB
line.long 0x0 "RELDC,T32A Counter Reload Register C"
hexmask.long 0x0 0.--31. 1. "RELDC,RELDC"
line.long 0x4 "RGC0,T32A Timer Register C0"
hexmask.long 0x4 0.--31. 1. "RGC0,RGC0"
line.long 0x8 "RGC1,T32A Timer Register C1"
hexmask.long 0x8 0.--31. 1. "RGC1,RGC1"
rgroup.long 0xEC++0x7
line.long 0x0 "CAPC0,T32A Timer capturer C0"
hexmask.long 0x0 0.--31. 1. "CAPC0,CAPC0"
line.long 0x4 "CAPC1,T32A Timer capturer C1"
hexmask.long 0x4 0.--31. 1. "CAPC1,CAPC1"
group.long 0xF4++0x7
line.long 0x0 "DMAC,T32A DMA Request Enabl eRegister C"
bitfld.long 0x0 2. "DMAENC2,DMAENC2" "0,1"
bitfld.long 0x0 1. "DMAENC1,DMAENC1" "0,1"
bitfld.long 0x0 0. "DMAENC0,DMAENC0" "0,1"
line.long 0x4 "PLSCR,T32A Pulse count control register"
bitfld.long 0x4 12.--14. "PDN,PDN" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 8.--10. "PUP,PUP" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 4.--5. "NF,NF" "0,1,2,3"
bitfld.long 0x4 1. "PDIR,PDIR" "0,1"
bitfld.long 0x4 0. "PMODE,PMODE" "0,1"
tree.end
tree.end
tree "TRM (Trimming Circuit)"
base ad:0x400F3200
group.long 0x0++0x7
line.long 0x0 "OSCPRO,TRM Protect register"
hexmask.long.byte 0x0 0.--7. 1. "PROTECT,PROTECT"
line.long 0x4 "OSCEN,TRM Enable register"
bitfld.long 0x4 0. "TRIMEN,TRIMEN" "0,1"
rgroup.long 0x10++0xB
line.long 0x0 "OSCINIT0,TRM Initial trimming level monitor register0"
hexmask.long.byte 0x0 1.--8. 1. "TRIMINIT0,TRIMINIT0"
line.long 0x4 "OSCINIT1,TRM Initial trimming level monitor register1"
hexmask.long 0x4 0.--31. 1. "TRIMINIT1,TRIMINIT1"
line.long 0x8 "OSCINIT2,TRM Initial trimming level monitor register2"
hexmask.long 0x8 0.--31. 1. "TRIMINIT2,TRIMINIT2"
group.long 0x20++0xB
line.long 0x0 "OSCSET0,TRM Trimming level setting register0 for User"
hexmask.long.byte 0x0 1.--8. 1. "TRIMSET0,TRIMSET0"
line.long 0x4 "OSCSET1,TRM Trimming level setting register1 for User"
hexmask.long 0x4 0.--31. 1. "TRIMSET1,TRIMSET1"
line.long 0x8 "OSCSET2,TRM Trimming level setting register2 for User"
hexmask.long 0x8 0.--31. 1. "TRIMSET2,TRIMSET2"
tree.end
tree "TSEL (Trigger Selector)"
base ad:0x0
tree "TSEL0"
base ad:0x400BB800
group.long 0x0++0x3F
line.long 0x0 "CR0,TRGSEL Control register 0"
bitfld.long 0x0 28.--30. "INSEL3,INSEL3" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 26. "UPDN3,UPDN3" "0,1"
bitfld.long 0x0 25. "OUTSEL3,OUTSEL3" "0,1"
bitfld.long 0x0 24. "EN3,EN3" "0,1"
bitfld.long 0x0 20.--22. "INSEL2,INSEL2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 18. "UPDN2,UPDN2" "0,1"
bitfld.long 0x0 17. "OUTSEL2,OUTSEL2" "0,1"
bitfld.long 0x0 16. "EN2,EN2" "0,1"
bitfld.long 0x0 12.--14. "INSEL1,INSEL1" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 10. "UPDN1,UPDN1" "0,1"
bitfld.long 0x0 9. "OUTSEL1,OUTSEL1" "0,1"
newline
bitfld.long 0x0 8. "EN1,EN1" "0,1"
bitfld.long 0x0 4.--6. "INSEL0,INSEL0" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "UPDN0,UPDN0" "0,1"
bitfld.long 0x0 1. "OUTSEL0,OUTSEL0" "0,1"
bitfld.long 0x0 0. "EN0,EN0" "0,1"
line.long 0x4 "CR1,TRGSEL Control register 1"
bitfld.long 0x4 28.--30. "INSEL7,INSEL7" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 26. "UPDN7,UPDN7" "0,1"
bitfld.long 0x4 25. "OUTSEL7,OUTSEL7" "0,1"
bitfld.long 0x4 24. "EN7,EN7" "0,1"
bitfld.long 0x4 20.--22. "INSEL6,INSEL6" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 18. "UPDN6,UPDN6" "0,1"
bitfld.long 0x4 17. "OUTSEL6,OUTSEL6" "0,1"
bitfld.long 0x4 16. "EN6,EN6" "0,1"
bitfld.long 0x4 12.--14. "INSEL5,INSEL5" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "UPDN5,UPDN5" "0,1"
bitfld.long 0x4 9. "OUTSEL5,OUTSEL5" "0,1"
newline
bitfld.long 0x4 8. "EN5,EN5" "0,1"
bitfld.long 0x4 4.--6. "INSEL4,INSEL4" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 2. "UPDN4,UPDN4" "0,1"
bitfld.long 0x4 1. "OUTSEL4,OUTSEL4" "0,1"
bitfld.long 0x4 0. "EN4,EN4" "0,1"
line.long 0x8 "CR2,TSEL Control register 2"
bitfld.long 0x8 28.--30. "INSEL11,INSEL11" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 26. "UPDN11,UPDN11" "0,1"
bitfld.long 0x8 25. "OUTSEL11,OUTSEL11" "0,1"
bitfld.long 0x8 24. "EN11,EN11" "0,1"
bitfld.long 0x8 20.--22. "INSEL10,INSEL10" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 18. "UPDN10,UPDN10" "0,1"
bitfld.long 0x8 17. "OUTSEL10,OUTSEL10" "0,1"
bitfld.long 0x8 16. "EN10,EN10" "0,1"
bitfld.long 0x8 12.--14. "INSEL9,INSEL9" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 10. "UPDN9,UPDN9" "0,1"
bitfld.long 0x8 9. "OUTSEL9,OUTSEL9" "0,1"
newline
bitfld.long 0x8 8. "EN9,EN9" "0,1"
bitfld.long 0x8 4.--6. "INSEL8,INSEL8" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 2. "UPDN8,UPDN8" "0,1"
bitfld.long 0x8 1. "OUTSEL8,OUTSEL8" "0,1"
bitfld.long 0x8 0. "EN8,EN8" "0,1"
line.long 0xC "CR3,TRGSEL Control register 3"
bitfld.long 0xC 28.--30. "INSEL15,INSEL15" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 26. "UPDN15,UPDN15" "0,1"
bitfld.long 0xC 25. "OUTSEL15,OUTSEL15" "0,1"
bitfld.long 0xC 24. "EN15,EN15" "0,1"
bitfld.long 0xC 20.--22. "INSEL14,INSEL14" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 18. "UPDN14,UPDN14" "0,1"
bitfld.long 0xC 17. "OUTSEL14,OUTSEL14" "0,1"
bitfld.long 0xC 16. "EN14,EN14" "0,1"
bitfld.long 0xC 12.--14. "INSEL13,INSEL13" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 10. "UPDN13,UPDN13" "0,1"
bitfld.long 0xC 9. "OUTSEL13,OUTSEL13" "0,1"
newline
bitfld.long 0xC 8. "EN13,EN13" "0,1"
bitfld.long 0xC 4.--6. "INSEL12,INSEL12" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 2. "UPDN12,UPDN12" "0,1"
bitfld.long 0xC 1. "OUTSEL12,OUTSEL12" "0,1"
bitfld.long 0xC 0. "EN12,EN12" "0,1"
line.long 0x10 "CR4,TRGSEL Control register 4"
bitfld.long 0x10 28.--30. "INSEL19,INSEL19" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 26. "UPDN19,UPDN19" "0,1"
bitfld.long 0x10 25. "OUTSEL19,OUTSEL19" "0,1"
bitfld.long 0x10 24. "EN19,EN19" "0,1"
bitfld.long 0x10 20.--22. "INSEL18,INSEL18" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18. "UPDN18,UPDN18" "0,1"
bitfld.long 0x10 17. "OUTSEL18,OUTSEL18" "0,1"
bitfld.long 0x10 16. "EN18,EN18" "0,1"
bitfld.long 0x10 12.--14. "INSEL17,INSEL17" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 10. "UPDN17,UPDN17" "0,1"
bitfld.long 0x10 9. "OUTSEL17,OUTSEL17" "0,1"
newline
bitfld.long 0x10 8. "EN17,EN17" "0,1"
bitfld.long 0x10 4.--6. "INSEL16,INSEL16" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 2. "UPDN16,UPDN16" "0,1"
bitfld.long 0x10 1. "OUTSEL16,OUTSEL16" "0,1"
bitfld.long 0x10 0. "EN16,EN16" "0,1"
line.long 0x14 "CR5,TRGSEL Control register 5"
bitfld.long 0x14 28.--30. "INSEL23,INSEL23" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 26. "UPDN23,UPDN23" "0,1"
bitfld.long 0x14 25. "OUTSEL23,OUTSEL23" "0,1"
bitfld.long 0x14 24. "EN23,EN23" "0,1"
bitfld.long 0x14 20.--22. "INSEL22,INSEL22" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 18. "UPDN22,UPDN22" "0,1"
bitfld.long 0x14 17. "OUTSEL22,OUTSEL22" "0,1"
bitfld.long 0x14 16. "EN22,EN22" "0,1"
bitfld.long 0x14 12.--14. "INSEL21,INSEL21" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 10. "UPDN21,UPDN21" "0,1"
bitfld.long 0x14 9. "OUTSEL21,OUTSEL21" "0,1"
newline
bitfld.long 0x14 8. "EN21,EN21" "0,1"
bitfld.long 0x14 4.--6. "INSEL20,INSEL20" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 2. "UPDN20,UPDN20" "0,1"
bitfld.long 0x14 1. "OUTSEL20,OUTSEL20" "0,1"
bitfld.long 0x14 0. "EN20,EN20" "0,1"
line.long 0x18 "CR6,TRGSEL Control register 6"
bitfld.long 0x18 28.--30. "INSEL27,INSEL27" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 26. "UPDN27,UPDN27" "0,1"
bitfld.long 0x18 25. "OUTSEL27,OUTSEL27" "0,1"
bitfld.long 0x18 24. "EN27,EN27" "0,1"
bitfld.long 0x18 20.--22. "INSEL26,INSEL26" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 18. "UPDN26,UPDN26" "0,1"
bitfld.long 0x18 17. "OUTSEL26,OUTSEL26" "0,1"
bitfld.long 0x18 16. "EN26,EN26" "0,1"
bitfld.long 0x18 12.--14. "INSEL25,INSEL25" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 10. "UPDN25,UPDN25" "0,1"
bitfld.long 0x18 9. "OUTSEL25,OUTSEL25" "0,1"
newline
bitfld.long 0x18 8. "EN25,EN25" "0,1"
bitfld.long 0x18 4.--6. "INSEL24,INSEL24" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 2. "UPDN24,UPDN24" "0,1"
bitfld.long 0x18 1. "OUTSEL24,OUTSEL24" "0,1"
bitfld.long 0x18 0. "EN24,EN24" "0,1"
line.long 0x1C "CR7,TRGSEL Control register 7"
bitfld.long 0x1C 28.--30. "INSEL31,INSEL31" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 26. "UPDN31,UPDN31" "0,1"
bitfld.long 0x1C 25. "OUTSEL31,OUTSEL31" "0,1"
bitfld.long 0x1C 24. "EN31,EN31" "0,1"
bitfld.long 0x1C 20.--22. "INSEL30,INSEL30" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 18. "UPDN30,UPDN30" "0,1"
bitfld.long 0x1C 17. "OUTSEL30,OUTSEL30" "0,1"
bitfld.long 0x1C 16. "EN30,EN30" "0,1"
bitfld.long 0x1C 12.--14. "INSEL29,INSEL29" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "UPDN29,UPDN29" "0,1"
bitfld.long 0x1C 9. "OUTSEL29,OUTSEL29" "0,1"
newline
bitfld.long 0x1C 8. "EN29,EN29" "0,1"
bitfld.long 0x1C 4.--6. "INSEL28,INSEL28" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 2. "UPDN28,UPDN28" "0,1"
bitfld.long 0x1C 1. "OUTSEL28,OUTSEL28" "0,1"
bitfld.long 0x1C 0. "EN28,EN28" "0,1"
line.long 0x20 "CR8,TRGSEL Control register 8"
bitfld.long 0x20 28.--30. "INSEL35,INSEL35" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 26. "UPDN35,UPDN35" "0,1"
bitfld.long 0x20 25. "OUTSEL35,OUTSEL35" "0,1"
bitfld.long 0x20 24. "EN35,EN35" "0,1"
bitfld.long 0x20 20.--22. "INSEL34,INSEL34" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 18. "UPDN34,UPDN34" "0,1"
bitfld.long 0x20 17. "OUTSEL34,OUTSEL34" "0,1"
bitfld.long 0x20 16. "EN34,EN34" "0,1"
bitfld.long 0x20 12.--14. "INSEL33,INSEL33" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 10. "UPDN33,UPDN33" "0,1"
bitfld.long 0x20 9. "OUTSEL33,OUTSEL33" "0,1"
newline
bitfld.long 0x20 8. "EN33,EN33" "0,1"
bitfld.long 0x20 4.--6. "INSEL32,INSEL32" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 2. "UPDN32,UPDN32" "0,1"
bitfld.long 0x20 1. "OUTSEL32,OUTSEL32" "0,1"
bitfld.long 0x20 0. "EN32,EN32" "0,1"
line.long 0x24 "CR9,TRGSEL Control register 9"
bitfld.long 0x24 28.--30. "INSEL39,INSEL39" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 26. "UPDN39,UPDN39" "0,1"
bitfld.long 0x24 25. "OUTSEL39,OUTSEL39" "0,1"
bitfld.long 0x24 24. "EN39,EN39" "0,1"
bitfld.long 0x24 20.--22. "INSEL38,INSEL38" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 18. "UPDN38,UPDN38" "0,1"
bitfld.long 0x24 17. "OUTSEL38,OUTSEL38" "0,1"
bitfld.long 0x24 16. "EN38,EN38" "0,1"
bitfld.long 0x24 12.--14. "INSEL37,INSEL37" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 10. "UPDN37,UPDN37" "0,1"
bitfld.long 0x24 9. "OUTSEL37,OUTSEL37" "0,1"
newline
bitfld.long 0x24 8. "EN37,EN37" "0,1"
bitfld.long 0x24 4.--6. "INSEL36,INSEL36" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 2. "UPDN36,UPDN36" "0,1"
bitfld.long 0x24 1. "OUTSEL36,OUTSEL36" "0,1"
bitfld.long 0x24 0. "EN36,EN36" "0,1"
line.long 0x28 "CR10,TRGSEL Control register 10"
bitfld.long 0x28 28.--30. "INSEL43,INSEL43" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 26. "UPDN43,UPDN43" "0,1"
bitfld.long 0x28 25. "OUTSEL43,OUTSEL43" "0,1"
bitfld.long 0x28 24. "EN43,EN43" "0,1"
bitfld.long 0x28 20.--22. "INSEL42,INSEL42" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 18. "UPDN42,UPDN42" "0,1"
bitfld.long 0x28 17. "OUTSEL42,OUTSEL42" "0,1"
bitfld.long 0x28 16. "EN42,EN42" "0,1"
bitfld.long 0x28 12.--14. "INSEL41,INSEL41" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 10. "UPDN41,UPDN41" "0,1"
bitfld.long 0x28 9. "OUTSEL41,OUTSEL41" "0,1"
newline
bitfld.long 0x28 8. "EN41,EN41" "0,1"
bitfld.long 0x28 4.--6. "INSEL40,INSEL40" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 2. "UPDN40,UPDN40" "0,1"
bitfld.long 0x28 1. "OUTSEL40,OUTSEL40" "0,1"
bitfld.long 0x28 0. "EN40,EN40" "0,1"
line.long 0x2C "CR11,TRGSEL Control register 11"
bitfld.long 0x2C 28.--30. "INSEL47,INSEL47" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 26. "UPDN47,UPDN47" "0,1"
bitfld.long 0x2C 25. "OUTSEL47,OUTSEL47" "0,1"
bitfld.long 0x2C 24. "EN47,EN47" "0,1"
bitfld.long 0x2C 20.--22. "INSEL46,INSEL46" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 18. "UPDN46,UPDN46" "0,1"
bitfld.long 0x2C 17. "OUTSEL46,OUTSEL46" "0,1"
bitfld.long 0x2C 16. "EN46,EN46" "0,1"
bitfld.long 0x2C 12.--14. "INSEL45,INSEL45" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 10. "UPDN45,UPDN45" "0,1"
bitfld.long 0x2C 9. "OUTSEL45,OUTSEL45" "0,1"
newline
bitfld.long 0x2C 8. "EN45,EN45" "0,1"
bitfld.long 0x2C 4.--6. "INSEL44,INSEL44" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 2. "UPDN44,UPDN44" "0,1"
bitfld.long 0x2C 1. "OUTSEL44,OUTSEL44" "0,1"
bitfld.long 0x2C 0. "EN44,EN44" "0,1"
line.long 0x30 "CR12,TRGSEL Control register 12"
bitfld.long 0x30 28.--30. "INSEL51,INSEL51" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 26. "UPDN51,UPDN51" "0,1"
bitfld.long 0x30 25. "OUTSEL51,OUTSEL51" "0,1"
bitfld.long 0x30 24. "EN51,EN51" "0,1"
bitfld.long 0x30 20.--22. "INSEL50,INSEL50" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 18. "UPDN50,UPDN50" "0,1"
bitfld.long 0x30 17. "OUTSEL50,OUTSEL50" "0,1"
bitfld.long 0x30 16. "EN50,EN50" "0,1"
bitfld.long 0x30 12.--14. "INSEL49,INSEL49" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 10. "UPDN49,UPDN49" "0,1"
bitfld.long 0x30 9. "OUTSEL49,OUTSEL49" "0,1"
newline
bitfld.long 0x30 8. "EN49,EN49" "0,1"
bitfld.long 0x30 4.--6. "INSEL48,INSEL48" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 2. "UPDN48,UPDN48" "0,1"
bitfld.long 0x30 1. "OUTSEL48,OUTSEL48" "0,1"
bitfld.long 0x30 0. "EN48,EN48" "0,1"
line.long 0x34 "CR13,TRGSEL Control register 13"
bitfld.long 0x34 28.--30. "INSEL55,INSEL55" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 26. "UPDN55,UPDN55" "0,1"
bitfld.long 0x34 25. "OUTSEL55,OUTSEL55" "0,1"
bitfld.long 0x34 24. "EN55,EN55" "0,1"
bitfld.long 0x34 20.--22. "INSEL54,INSEL54" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 18. "UPDN54,UPDN54" "0,1"
bitfld.long 0x34 17. "OUTSEL54,OUTSEL54" "0,1"
bitfld.long 0x34 16. "EN54,EN54" "0,1"
bitfld.long 0x34 12.--14. "INSEL53,INSEL53" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 10. "UPDN53,UPDN53" "0,1"
bitfld.long 0x34 9. "OUTSEL53,OUTSEL53" "0,1"
newline
bitfld.long 0x34 8. "EN53,EN53" "0,1"
bitfld.long 0x34 4.--6. "INSEL52,INSEL52" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 2. "UPDN52,UPDN52" "0,1"
bitfld.long 0x34 1. "OUTSEL52,OUTSEL52" "0,1"
bitfld.long 0x34 0. "EN52,EN52" "0,1"
line.long 0x38 "CR14,TRGSEL Control register 14"
bitfld.long 0x38 28.--30. "INSEL59,INSEL59" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 26. "UPDN59,UPDN59" "0,1"
bitfld.long 0x38 25. "OUTSEL59,OUTSEL59" "0,1"
bitfld.long 0x38 24. "EN59,EN59" "0,1"
bitfld.long 0x38 20.--22. "INSEL58,INSEL58" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 18. "UPDN58,UPDN58" "0,1"
bitfld.long 0x38 17. "OUTSEL58,OUTSEL58" "0,1"
bitfld.long 0x38 16. "EN58,EN58" "0,1"
bitfld.long 0x38 12.--14. "INSEL57,INSEL57" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 10. "UPDN57,UPDN57" "0,1"
bitfld.long 0x38 9. "OUTSEL57,OUTSEL57" "0,1"
newline
bitfld.long 0x38 8. "EN57,EN57" "0,1"
bitfld.long 0x38 4.--6. "INSEL56,INSEL56" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 2. "UPDN56,UPDN56" "0,1"
bitfld.long 0x38 1. "OUTSEL56,OUTSEL56" "0,1"
bitfld.long 0x38 0. "EN56,EN56" "0,1"
line.long 0x3C "CR15,TRGSEL Control register 15"
bitfld.long 0x3C 28.--30. "INSEL63,INSEL63" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 26. "UPDN63,UPDN63" "0,1"
bitfld.long 0x3C 25. "OUTSEL63,OUTSEL63" "0,1"
bitfld.long 0x3C 24. "EN63,EN63" "0,1"
bitfld.long 0x3C 20.--22. "INSEL62,INSEL62" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 18. "UPDN62,UPDN62" "0,1"
bitfld.long 0x3C 17. "OUTSEL62,OUTSEL62" "0,1"
bitfld.long 0x3C 16. "EN62,EN62" "0,1"
bitfld.long 0x3C 12.--14. "INSEL61,INSEL61" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 10. "UPDN61,UPDN61" "0,1"
bitfld.long 0x3C 9. "OUTSEL61,OUTSEL61" "0,1"
newline
bitfld.long 0x3C 8. "EN61,EN61" "0,1"
bitfld.long 0x3C 4.--6. "INSEL60,INSEL60" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 2. "UPDN60,UPDN60" "0,1"
bitfld.long 0x3C 1. "OUTSEL60,OUTSEL60" "0,1"
bitfld.long 0x3C 0. "EN60,EN60" "0,1"
tree.end
tree "TSEL1"
base ad:0x400BB900
group.long 0x0++0x3F
line.long 0x0 "CR0,TRGSEL Control register 0"
bitfld.long 0x0 28.--30. "INSEL3,INSEL3" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 26. "UPDN3,UPDN3" "0,1"
bitfld.long 0x0 25. "OUTSEL3,OUTSEL3" "0,1"
bitfld.long 0x0 24. "EN3,EN3" "0,1"
bitfld.long 0x0 20.--22. "INSEL2,INSEL2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 18. "UPDN2,UPDN2" "0,1"
bitfld.long 0x0 17. "OUTSEL2,OUTSEL2" "0,1"
bitfld.long 0x0 16. "EN2,EN2" "0,1"
bitfld.long 0x0 12.--14. "INSEL1,INSEL1" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 10. "UPDN1,UPDN1" "0,1"
bitfld.long 0x0 9. "OUTSEL1,OUTSEL1" "0,1"
newline
bitfld.long 0x0 8. "EN1,EN1" "0,1"
bitfld.long 0x0 4.--6. "INSEL0,INSEL0" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 2. "UPDN0,UPDN0" "0,1"
bitfld.long 0x0 1. "OUTSEL0,OUTSEL0" "0,1"
bitfld.long 0x0 0. "EN0,EN0" "0,1"
line.long 0x4 "CR1,TRGSEL Control register 1"
bitfld.long 0x4 28.--30. "INSEL7,INSEL7" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 26. "UPDN7,UPDN7" "0,1"
bitfld.long 0x4 25. "OUTSEL7,OUTSEL7" "0,1"
bitfld.long 0x4 24. "EN7,EN7" "0,1"
bitfld.long 0x4 20.--22. "INSEL6,INSEL6" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 18. "UPDN6,UPDN6" "0,1"
bitfld.long 0x4 17. "OUTSEL6,OUTSEL6" "0,1"
bitfld.long 0x4 16. "EN6,EN6" "0,1"
bitfld.long 0x4 12.--14. "INSEL5,INSEL5" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "UPDN5,UPDN5" "0,1"
bitfld.long 0x4 9. "OUTSEL5,OUTSEL5" "0,1"
newline
bitfld.long 0x4 8. "EN5,EN5" "0,1"
bitfld.long 0x4 4.--6. "INSEL4,INSEL4" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 2. "UPDN4,UPDN4" "0,1"
bitfld.long 0x4 1. "OUTSEL4,OUTSEL4" "0,1"
bitfld.long 0x4 0. "EN4,EN4" "0,1"
line.long 0x8 "CR2,TSEL Control register 2"
bitfld.long 0x8 28.--30. "INSEL11,INSEL11" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 26. "UPDN11,UPDN11" "0,1"
bitfld.long 0x8 25. "OUTSEL11,OUTSEL11" "0,1"
bitfld.long 0x8 24. "EN11,EN11" "0,1"
bitfld.long 0x8 20.--22. "INSEL10,INSEL10" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 18. "UPDN10,UPDN10" "0,1"
bitfld.long 0x8 17. "OUTSEL10,OUTSEL10" "0,1"
bitfld.long 0x8 16. "EN10,EN10" "0,1"
bitfld.long 0x8 12.--14. "INSEL9,INSEL9" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 10. "UPDN9,UPDN9" "0,1"
bitfld.long 0x8 9. "OUTSEL9,OUTSEL9" "0,1"
newline
bitfld.long 0x8 8. "EN9,EN9" "0,1"
bitfld.long 0x8 4.--6. "INSEL8,INSEL8" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 2. "UPDN8,UPDN8" "0,1"
bitfld.long 0x8 1. "OUTSEL8,OUTSEL8" "0,1"
bitfld.long 0x8 0. "EN8,EN8" "0,1"
line.long 0xC "CR3,TRGSEL Control register 3"
bitfld.long 0xC 28.--30. "INSEL15,INSEL15" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 26. "UPDN15,UPDN15" "0,1"
bitfld.long 0xC 25. "OUTSEL15,OUTSEL15" "0,1"
bitfld.long 0xC 24. "EN15,EN15" "0,1"
bitfld.long 0xC 20.--22. "INSEL14,INSEL14" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 18. "UPDN14,UPDN14" "0,1"
bitfld.long 0xC 17. "OUTSEL14,OUTSEL14" "0,1"
bitfld.long 0xC 16. "EN14,EN14" "0,1"
bitfld.long 0xC 12.--14. "INSEL13,INSEL13" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 10. "UPDN13,UPDN13" "0,1"
bitfld.long 0xC 9. "OUTSEL13,OUTSEL13" "0,1"
newline
bitfld.long 0xC 8. "EN13,EN13" "0,1"
bitfld.long 0xC 4.--6. "INSEL12,INSEL12" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 2. "UPDN12,UPDN12" "0,1"
bitfld.long 0xC 1. "OUTSEL12,OUTSEL12" "0,1"
bitfld.long 0xC 0. "EN12,EN12" "0,1"
line.long 0x10 "CR4,TRGSEL Control register 4"
bitfld.long 0x10 28.--30. "INSEL19,INSEL19" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 26. "UPDN19,UPDN19" "0,1"
bitfld.long 0x10 25. "OUTSEL19,OUTSEL19" "0,1"
bitfld.long 0x10 24. "EN19,EN19" "0,1"
bitfld.long 0x10 20.--22. "INSEL18,INSEL18" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18. "UPDN18,UPDN18" "0,1"
bitfld.long 0x10 17. "OUTSEL18,OUTSEL18" "0,1"
bitfld.long 0x10 16. "EN18,EN18" "0,1"
bitfld.long 0x10 12.--14. "INSEL17,INSEL17" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 10. "UPDN17,UPDN17" "0,1"
bitfld.long 0x10 9. "OUTSEL17,OUTSEL17" "0,1"
newline
bitfld.long 0x10 8. "EN17,EN17" "0,1"
bitfld.long 0x10 4.--6. "INSEL16,INSEL16" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 2. "UPDN16,UPDN16" "0,1"
bitfld.long 0x10 1. "OUTSEL16,OUTSEL16" "0,1"
bitfld.long 0x10 0. "EN16,EN16" "0,1"
line.long 0x14 "CR5,TRGSEL Control register 5"
bitfld.long 0x14 28.--30. "INSEL23,INSEL23" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 26. "UPDN23,UPDN23" "0,1"
bitfld.long 0x14 25. "OUTSEL23,OUTSEL23" "0,1"
bitfld.long 0x14 24. "EN23,EN23" "0,1"
bitfld.long 0x14 20.--22. "INSEL22,INSEL22" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 18. "UPDN22,UPDN22" "0,1"
bitfld.long 0x14 17. "OUTSEL22,OUTSEL22" "0,1"
bitfld.long 0x14 16. "EN22,EN22" "0,1"
bitfld.long 0x14 12.--14. "INSEL21,INSEL21" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 10. "UPDN21,UPDN21" "0,1"
bitfld.long 0x14 9. "OUTSEL21,OUTSEL21" "0,1"
newline
bitfld.long 0x14 8. "EN21,EN21" "0,1"
bitfld.long 0x14 4.--6. "INSEL20,INSEL20" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 2. "UPDN20,UPDN20" "0,1"
bitfld.long 0x14 1. "OUTSEL20,OUTSEL20" "0,1"
bitfld.long 0x14 0. "EN20,EN20" "0,1"
line.long 0x18 "CR6,TRGSEL Control register 6"
bitfld.long 0x18 28.--30. "INSEL27,INSEL27" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 26. "UPDN27,UPDN27" "0,1"
bitfld.long 0x18 25. "OUTSEL27,OUTSEL27" "0,1"
bitfld.long 0x18 24. "EN27,EN27" "0,1"
bitfld.long 0x18 20.--22. "INSEL26,INSEL26" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 18. "UPDN26,UPDN26" "0,1"
bitfld.long 0x18 17. "OUTSEL26,OUTSEL26" "0,1"
bitfld.long 0x18 16. "EN26,EN26" "0,1"
bitfld.long 0x18 12.--14. "INSEL25,INSEL25" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 10. "UPDN25,UPDN25" "0,1"
bitfld.long 0x18 9. "OUTSEL25,OUTSEL25" "0,1"
newline
bitfld.long 0x18 8. "EN25,EN25" "0,1"
bitfld.long 0x18 4.--6. "INSEL24,INSEL24" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 2. "UPDN24,UPDN24" "0,1"
bitfld.long 0x18 1. "OUTSEL24,OUTSEL24" "0,1"
bitfld.long 0x18 0. "EN24,EN24" "0,1"
line.long 0x1C "CR7,TRGSEL Control register 7"
bitfld.long 0x1C 28.--30. "INSEL31,INSEL31" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 26. "UPDN31,UPDN31" "0,1"
bitfld.long 0x1C 25. "OUTSEL31,OUTSEL31" "0,1"
bitfld.long 0x1C 24. "EN31,EN31" "0,1"
bitfld.long 0x1C 20.--22. "INSEL30,INSEL30" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 18. "UPDN30,UPDN30" "0,1"
bitfld.long 0x1C 17. "OUTSEL30,OUTSEL30" "0,1"
bitfld.long 0x1C 16. "EN30,EN30" "0,1"
bitfld.long 0x1C 12.--14. "INSEL29,INSEL29" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 10. "UPDN29,UPDN29" "0,1"
bitfld.long 0x1C 9. "OUTSEL29,OUTSEL29" "0,1"
newline
bitfld.long 0x1C 8. "EN29,EN29" "0,1"
bitfld.long 0x1C 4.--6. "INSEL28,INSEL28" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 2. "UPDN28,UPDN28" "0,1"
bitfld.long 0x1C 1. "OUTSEL28,OUTSEL28" "0,1"
bitfld.long 0x1C 0. "EN28,EN28" "0,1"
line.long 0x20 "CR8,TRGSEL Control register 8"
bitfld.long 0x20 28.--30. "INSEL35,INSEL35" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 26. "UPDN35,UPDN35" "0,1"
bitfld.long 0x20 25. "OUTSEL35,OUTSEL35" "0,1"
bitfld.long 0x20 24. "EN35,EN35" "0,1"
bitfld.long 0x20 20.--22. "INSEL34,INSEL34" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 18. "UPDN34,UPDN34" "0,1"
bitfld.long 0x20 17. "OUTSEL34,OUTSEL34" "0,1"
bitfld.long 0x20 16. "EN34,EN34" "0,1"
bitfld.long 0x20 12.--14. "INSEL33,INSEL33" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 10. "UPDN33,UPDN33" "0,1"
bitfld.long 0x20 9. "OUTSEL33,OUTSEL33" "0,1"
newline
bitfld.long 0x20 8. "EN33,EN33" "0,1"
bitfld.long 0x20 4.--6. "INSEL32,INSEL32" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 2. "UPDN32,UPDN32" "0,1"
bitfld.long 0x20 1. "OUTSEL32,OUTSEL32" "0,1"
bitfld.long 0x20 0. "EN32,EN32" "0,1"
line.long 0x24 "CR9,TRGSEL Control register 9"
bitfld.long 0x24 28.--30. "INSEL39,INSEL39" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 26. "UPDN39,UPDN39" "0,1"
bitfld.long 0x24 25. "OUTSEL39,OUTSEL39" "0,1"
bitfld.long 0x24 24. "EN39,EN39" "0,1"
bitfld.long 0x24 20.--22. "INSEL38,INSEL38" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 18. "UPDN38,UPDN38" "0,1"
bitfld.long 0x24 17. "OUTSEL38,OUTSEL38" "0,1"
bitfld.long 0x24 16. "EN38,EN38" "0,1"
bitfld.long 0x24 12.--14. "INSEL37,INSEL37" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 10. "UPDN37,UPDN37" "0,1"
bitfld.long 0x24 9. "OUTSEL37,OUTSEL37" "0,1"
newline
bitfld.long 0x24 8. "EN37,EN37" "0,1"
bitfld.long 0x24 4.--6. "INSEL36,INSEL36" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 2. "UPDN36,UPDN36" "0,1"
bitfld.long 0x24 1. "OUTSEL36,OUTSEL36" "0,1"
bitfld.long 0x24 0. "EN36,EN36" "0,1"
line.long 0x28 "CR10,TRGSEL Control register 10"
bitfld.long 0x28 28.--30. "INSEL43,INSEL43" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 26. "UPDN43,UPDN43" "0,1"
bitfld.long 0x28 25. "OUTSEL43,OUTSEL43" "0,1"
bitfld.long 0x28 24. "EN43,EN43" "0,1"
bitfld.long 0x28 20.--22. "INSEL42,INSEL42" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 18. "UPDN42,UPDN42" "0,1"
bitfld.long 0x28 17. "OUTSEL42,OUTSEL42" "0,1"
bitfld.long 0x28 16. "EN42,EN42" "0,1"
bitfld.long 0x28 12.--14. "INSEL41,INSEL41" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 10. "UPDN41,UPDN41" "0,1"
bitfld.long 0x28 9. "OUTSEL41,OUTSEL41" "0,1"
newline
bitfld.long 0x28 8. "EN41,EN41" "0,1"
bitfld.long 0x28 4.--6. "INSEL40,INSEL40" "0,1,2,3,4,5,6,7"
bitfld.long 0x28 2. "UPDN40,UPDN40" "0,1"
bitfld.long 0x28 1. "OUTSEL40,OUTSEL40" "0,1"
bitfld.long 0x28 0. "EN40,EN40" "0,1"
line.long 0x2C "CR11,TRGSEL Control register 11"
bitfld.long 0x2C 28.--30. "INSEL47,INSEL47" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 26. "UPDN47,UPDN47" "0,1"
bitfld.long 0x2C 25. "OUTSEL47,OUTSEL47" "0,1"
bitfld.long 0x2C 24. "EN47,EN47" "0,1"
bitfld.long 0x2C 20.--22. "INSEL46,INSEL46" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 18. "UPDN46,UPDN46" "0,1"
bitfld.long 0x2C 17. "OUTSEL46,OUTSEL46" "0,1"
bitfld.long 0x2C 16. "EN46,EN46" "0,1"
bitfld.long 0x2C 12.--14. "INSEL45,INSEL45" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 10. "UPDN45,UPDN45" "0,1"
bitfld.long 0x2C 9. "OUTSEL45,OUTSEL45" "0,1"
newline
bitfld.long 0x2C 8. "EN45,EN45" "0,1"
bitfld.long 0x2C 4.--6. "INSEL44,INSEL44" "0,1,2,3,4,5,6,7"
bitfld.long 0x2C 2. "UPDN44,UPDN44" "0,1"
bitfld.long 0x2C 1. "OUTSEL44,OUTSEL44" "0,1"
bitfld.long 0x2C 0. "EN44,EN44" "0,1"
line.long 0x30 "CR12,TRGSEL Control register 12"
bitfld.long 0x30 28.--30. "INSEL51,INSEL51" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 26. "UPDN51,UPDN51" "0,1"
bitfld.long 0x30 25. "OUTSEL51,OUTSEL51" "0,1"
bitfld.long 0x30 24. "EN51,EN51" "0,1"
bitfld.long 0x30 20.--22. "INSEL50,INSEL50" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 18. "UPDN50,UPDN50" "0,1"
bitfld.long 0x30 17. "OUTSEL50,OUTSEL50" "0,1"
bitfld.long 0x30 16. "EN50,EN50" "0,1"
bitfld.long 0x30 12.--14. "INSEL49,INSEL49" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 10. "UPDN49,UPDN49" "0,1"
bitfld.long 0x30 9. "OUTSEL49,OUTSEL49" "0,1"
newline
bitfld.long 0x30 8. "EN49,EN49" "0,1"
bitfld.long 0x30 4.--6. "INSEL48,INSEL48" "0,1,2,3,4,5,6,7"
bitfld.long 0x30 2. "UPDN48,UPDN48" "0,1"
bitfld.long 0x30 1. "OUTSEL48,OUTSEL48" "0,1"
bitfld.long 0x30 0. "EN48,EN48" "0,1"
line.long 0x34 "CR13,TRGSEL Control register 13"
bitfld.long 0x34 28.--30. "INSEL55,INSEL55" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 26. "UPDN55,UPDN55" "0,1"
bitfld.long 0x34 25. "OUTSEL55,OUTSEL55" "0,1"
bitfld.long 0x34 24. "EN55,EN55" "0,1"
bitfld.long 0x34 20.--22. "INSEL54,INSEL54" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 18. "UPDN54,UPDN54" "0,1"
bitfld.long 0x34 17. "OUTSEL54,OUTSEL54" "0,1"
bitfld.long 0x34 16. "EN54,EN54" "0,1"
bitfld.long 0x34 12.--14. "INSEL53,INSEL53" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 10. "UPDN53,UPDN53" "0,1"
bitfld.long 0x34 9. "OUTSEL53,OUTSEL53" "0,1"
newline
bitfld.long 0x34 8. "EN53,EN53" "0,1"
bitfld.long 0x34 4.--6. "INSEL52,INSEL52" "0,1,2,3,4,5,6,7"
bitfld.long 0x34 2. "UPDN52,UPDN52" "0,1"
bitfld.long 0x34 1. "OUTSEL52,OUTSEL52" "0,1"
bitfld.long 0x34 0. "EN52,EN52" "0,1"
line.long 0x38 "CR14,TRGSEL Control register 14"
bitfld.long 0x38 28.--30. "INSEL59,INSEL59" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 26. "UPDN59,UPDN59" "0,1"
bitfld.long 0x38 25. "OUTSEL59,OUTSEL59" "0,1"
bitfld.long 0x38 24. "EN59,EN59" "0,1"
bitfld.long 0x38 20.--22. "INSEL58,INSEL58" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 18. "UPDN58,UPDN58" "0,1"
bitfld.long 0x38 17. "OUTSEL58,OUTSEL58" "0,1"
bitfld.long 0x38 16. "EN58,EN58" "0,1"
bitfld.long 0x38 12.--14. "INSEL57,INSEL57" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 10. "UPDN57,UPDN57" "0,1"
bitfld.long 0x38 9. "OUTSEL57,OUTSEL57" "0,1"
newline
bitfld.long 0x38 8. "EN57,EN57" "0,1"
bitfld.long 0x38 4.--6. "INSEL56,INSEL56" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 2. "UPDN56,UPDN56" "0,1"
bitfld.long 0x38 1. "OUTSEL56,OUTSEL56" "0,1"
bitfld.long 0x38 0. "EN56,EN56" "0,1"
line.long 0x3C "CR15,TRGSEL Control register 15"
bitfld.long 0x3C 28.--30. "INSEL63,INSEL63" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 26. "UPDN63,UPDN63" "0,1"
bitfld.long 0x3C 25. "OUTSEL63,OUTSEL63" "0,1"
bitfld.long 0x3C 24. "EN63,EN63" "0,1"
bitfld.long 0x3C 20.--22. "INSEL62,INSEL62" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 18. "UPDN62,UPDN62" "0,1"
bitfld.long 0x3C 17. "OUTSEL62,OUTSEL62" "0,1"
bitfld.long 0x3C 16. "EN62,EN62" "0,1"
bitfld.long 0x3C 12.--14. "INSEL61,INSEL61" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 10. "UPDN61,UPDN61" "0,1"
bitfld.long 0x3C 9. "OUTSEL61,OUTSEL61" "0,1"
newline
bitfld.long 0x3C 8. "EN61,EN61" "0,1"
bitfld.long 0x3C 4.--6. "INSEL60,INSEL60" "0,1,2,3,4,5,6,7"
bitfld.long 0x3C 2. "UPDN60,UPDN60" "0,1"
bitfld.long 0x3C 1. "OUTSEL60,OUTSEL60" "0,1"
bitfld.long 0x3C 0. "EN60,EN60" "0,1"
tree.end
tree.end
tree "TSPI (Serial Peripheral Interface)"
base ad:0x0
sif (cpuis("TMPM3HL*B*")||cpuis("TMPM3HLFD*")||cpuis("TMPM3HLFY*")||cpuis("TMPM3HLFZ*"))
tree "TSPI"
base ad:0x40098000
group.long 0x0++0xB
line.long 0x0 "CR0,TSPI Control Register 0"
bitfld.long 0x0 6.--7. "SWRST,SWRST" "0,1,2,3"
bitfld.long 0x0 0. "TSPIE,TSPIE" "0,1"
line.long 0x4 "CR1,TSPI Control Register 1"
bitfld.long 0x4 16. "INF,INF" "0,1"
bitfld.long 0x4 15. "TRGEN,TRGEN" "0,1"
bitfld.long 0x4 14. "TRXE,TRXE" "0,1"
bitfld.long 0x4 13. "TSPIMS,TSPIMS" "0,1"
bitfld.long 0x4 12. "MSTR,MSTR" "0,1"
bitfld.long 0x4 10.--11. "TMMD,TMMD" "0,1,2,3"
bitfld.long 0x4 8.--9. "CSSEL,CSSEL" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "FC,FC"
line.long 0x8 "CR2,TSPI Control Register 2"
bitfld.long 0x8 22.--23. "TIDLE,TIDLE" "0,1,2,3"
bitfld.long 0x8 21. "TXDEMP,TXDEMP" "0,1"
bitfld.long 0x8 16.--18. "RXDLY,RXDLY" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 12.--15. 1. "TIL,TIL"
hexmask.long.byte 0x8 8.--11. 1. "RIL,RIL"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
newline
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR3,TSPI Control Register 3"
bitfld.long 0x0 1. "TFEMPCLR,TFEMPCLR" "0,1"
bitfld.long 0x0 0. "RFFLLCLR,RFFLLCLR" "0,1"
group.long 0x10++0x13
line.long 0x0 "BR,TSPI Baud Rate Generator Control Register"
hexmask.long.byte 0x0 4.--7. 1. "BRCK,BRCK"
hexmask.long.byte 0x0 0.--3. 1. "BRS,BRS"
line.long 0x4 "FMTR0,TSPI Format Control Register 0"
bitfld.long 0x4 31. "DIR,DIR" "0,1"
hexmask.long.byte 0x4 24.--29. 1. "FL,FL"
hexmask.long.byte 0x4 20.--23. 1. "FINT,FINT"
bitfld.long 0x4 19. "CS3POL,CS3POL" "0,1"
bitfld.long 0x4 18. "CS2POL,CS2POL" "0,1"
bitfld.long 0x4 17. "CS1POL,CS1POL" "0,1"
bitfld.long 0x4 16. "CS0POL,CS0POL" "0,1"
bitfld.long 0x4 15. "CKPHA,CKPHA" "0,1"
bitfld.long 0x4 14. "CKPOL,CKPOL" "0,1"
newline
hexmask.long.byte 0x4 10.--13. 1. "CSINT,CSINT"
hexmask.long.byte 0x4 4.--7. 1. "CSSCKDL,CSSCKDL"
hexmask.long.byte 0x4 0.--3. 1. "SCKCSDL,SCKCSDL"
line.long 0x8 "FMTR1,TSPI Format Control Register 1"
bitfld.long 0x8 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 1. "VPE,VPE" "0,1"
bitfld.long 0x8 0. "VPM,VPM" "0,1"
line.long 0xC "SECTCR0,TSPI Sector Mode Control Register 0"
bitfld.long 0xC 0. "SECT,SECT" "0,1"
line.long 0x10 "SECTCR1,TSPI Sector Mode Control Register 1"
hexmask.long.byte 0x10 24.--29. 1. "SECTL3,SECTL3"
hexmask.long.byte 0x10 16.--21. 1. "SECTL2,SECTL2"
hexmask.long.byte 0x10 8.--13. 1. "SECTL1,SECTL1"
hexmask.long.byte 0x10 0.--5. 1. "SECTL0,SECTL0"
group.long 0x100++0x3
line.long 0x0 "DR,TSPI Data Register"
hexmask.long 0x0 0.--31. 1. "TSPIDR,TSPIDR"
group.long 0x200++0x7
line.long 0x0 "SR,TSPI Status Register"
rbitfld.long 0x0 31. "TSPISUE,TSPISUE" "0,1"
rbitfld.long 0x0 23. "TXRUN,TXRUN" "0,1"
bitfld.long 0x0 22. "TXEND,TXEND" "0,1"
bitfld.long 0x0 21. "INTTXWF,INTTXWF" "0,1"
rbitfld.long 0x0 20. "TFEMP,TFEMP" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "TLVL,TLVL"
rbitfld.long 0x0 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x0 6. "RXEND,RXEND" "0,1"
bitfld.long 0x0 5. "INTRXFF,INTRXFF" "0,1"
newline
rbitfld.long 0x0 4. "RFFLL,RFFLL" "0,1"
hexmask.long.byte 0x0 0.--3. 1. "RLVL,RLVL"
line.long 0x4 "ERR,TSPI Parity Error Flag Register"
bitfld.long 0x4 3. "TRGERR,TRGERR" "0,1"
bitfld.long 0x4 2. "UDRERR,UDRERR" "0,1"
bitfld.long 0x4 1. "OVRERR,OVRERR" "0,1"
bitfld.long 0x4 0. "PERR,PERR" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "TSPI0"
base ad:0x40098000
group.long 0x0++0xB
line.long 0x0 "CR0,TSPI Control Register 0"
bitfld.long 0x0 6.--7. "SWRST,SWRST" "0,1,2,3"
bitfld.long 0x0 0. "TSPIE,TSPIE" "0,1"
line.long 0x4 "CR1,TSPI Control Register 1"
bitfld.long 0x4 16. "INF,INF" "0,1"
bitfld.long 0x4 15. "TRGEN,TRGEN" "0,1"
bitfld.long 0x4 14. "TRXE,TRXE" "0,1"
bitfld.long 0x4 13. "TSPIMS,TSPIMS" "0,1"
bitfld.long 0x4 12. "MSTR,MSTR" "0,1"
bitfld.long 0x4 10.--11. "TMMD,TMMD" "0,1,2,3"
bitfld.long 0x4 8.--9. "CSSEL,CSSEL" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "FC,FC"
line.long 0x8 "CR2,TSPI Control Register 2"
bitfld.long 0x8 22.--23. "TIDLE,TIDLE" "0,1,2,3"
bitfld.long 0x8 21. "TXDEMP,TXDEMP" "0,1"
bitfld.long 0x8 16.--18. "RXDLY,RXDLY" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 12.--15. 1. "TIL,TIL"
hexmask.long.byte 0x8 8.--11. 1. "RIL,RIL"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
newline
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR3,TSPI Control Register 3"
bitfld.long 0x0 1. "TFEMPCLR,TFEMPCLR" "0,1"
bitfld.long 0x0 0. "RFFLLCLR,RFFLLCLR" "0,1"
group.long 0x10++0x13
line.long 0x0 "BR,TSPI Baud Rate Generator Control Register"
hexmask.long.byte 0x0 4.--7. 1. "BRCK,BRCK"
hexmask.long.byte 0x0 0.--3. 1. "BRS,BRS"
line.long 0x4 "FMTR0,TSPI Format Control Register 0"
bitfld.long 0x4 31. "DIR,DIR" "0,1"
hexmask.long.byte 0x4 24.--29. 1. "FL,FL"
hexmask.long.byte 0x4 20.--23. 1. "FINT,FINT"
bitfld.long 0x4 19. "CS3POL,CS3POL" "0,1"
bitfld.long 0x4 18. "CS2POL,CS2POL" "0,1"
bitfld.long 0x4 17. "CS1POL,CS1POL" "0,1"
bitfld.long 0x4 16. "CS0POL,CS0POL" "0,1"
bitfld.long 0x4 15. "CKPHA,CKPHA" "0,1"
bitfld.long 0x4 14. "CKPOL,CKPOL" "0,1"
newline
hexmask.long.byte 0x4 10.--13. 1. "CSINT,CSINT"
hexmask.long.byte 0x4 4.--7. 1. "CSSCKDL,CSSCKDL"
hexmask.long.byte 0x4 0.--3. 1. "SCKCSDL,SCKCSDL"
line.long 0x8 "FMTR1,TSPI Format Control Register 1"
bitfld.long 0x8 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 1. "VPE,VPE" "0,1"
bitfld.long 0x8 0. "VPM,VPM" "0,1"
line.long 0xC "SECTCR0,TSPI Sector Mode Control Register 0"
bitfld.long 0xC 0. "SECT,SECT" "0,1"
line.long 0x10 "SECTCR1,TSPI Sector Mode Control Register 1"
hexmask.long.byte 0x10 24.--29. 1. "SECTL3,SECTL3"
hexmask.long.byte 0x10 16.--21. 1. "SECTL2,SECTL2"
hexmask.long.byte 0x10 8.--13. 1. "SECTL1,SECTL1"
hexmask.long.byte 0x10 0.--5. 1. "SECTL0,SECTL0"
group.long 0x100++0x3
line.long 0x0 "DR,TSPI Data Register"
hexmask.long 0x0 0.--31. 1. "TSPIDR,TSPIDR"
group.long 0x200++0x7
line.long 0x0 "SR,TSPI Status Register"
rbitfld.long 0x0 31. "TSPISUE,TSPISUE" "0,1"
rbitfld.long 0x0 23. "TXRUN,TXRUN" "0,1"
bitfld.long 0x0 22. "TXEND,TXEND" "0,1"
bitfld.long 0x0 21. "INTTXWF,INTTXWF" "0,1"
rbitfld.long 0x0 20. "TFEMP,TFEMP" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "TLVL,TLVL"
rbitfld.long 0x0 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x0 6. "RXEND,RXEND" "0,1"
bitfld.long 0x0 5. "INTRXFF,INTRXFF" "0,1"
newline
rbitfld.long 0x0 4. "RFFLL,RFFLL" "0,1"
hexmask.long.byte 0x0 0.--3. 1. "RLVL,RLVL"
line.long 0x4 "ERR,TSPI Parity Error Flag Register"
bitfld.long 0x4 3. "TRGERR,TRGERR" "0,1"
bitfld.long 0x4 2. "UDRERR,UDRERR" "0,1"
bitfld.long 0x4 1. "OVRERR,OVRERR" "0,1"
bitfld.long 0x4 0. "PERR,PERR" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "TSPI1"
base ad:0x40099000
group.long 0x0++0xB
line.long 0x0 "CR0,TSPI Control Register 0"
bitfld.long 0x0 6.--7. "SWRST,SWRST" "0,1,2,3"
bitfld.long 0x0 0. "TSPIE,TSPIE" "0,1"
line.long 0x4 "CR1,TSPI Control Register 1"
bitfld.long 0x4 16. "INF,INF" "0,1"
bitfld.long 0x4 15. "TRGEN,TRGEN" "0,1"
bitfld.long 0x4 14. "TRXE,TRXE" "0,1"
bitfld.long 0x4 13. "TSPIMS,TSPIMS" "0,1"
bitfld.long 0x4 12. "MSTR,MSTR" "0,1"
bitfld.long 0x4 10.--11. "TMMD,TMMD" "0,1,2,3"
bitfld.long 0x4 8.--9. "CSSEL,CSSEL" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "FC,FC"
line.long 0x8 "CR2,TSPI Control Register 2"
bitfld.long 0x8 22.--23. "TIDLE,TIDLE" "0,1,2,3"
bitfld.long 0x8 21. "TXDEMP,TXDEMP" "0,1"
bitfld.long 0x8 16.--18. "RXDLY,RXDLY" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 12.--15. 1. "TIL,TIL"
hexmask.long.byte 0x8 8.--11. 1. "RIL,RIL"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
newline
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR3,TSPI Control Register 3"
bitfld.long 0x0 1. "TFEMPCLR,TFEMPCLR" "0,1"
bitfld.long 0x0 0. "RFFLLCLR,RFFLLCLR" "0,1"
group.long 0x10++0x13
line.long 0x0 "BR,TSPI Baud Rate Generator Control Register"
hexmask.long.byte 0x0 4.--7. 1. "BRCK,BRCK"
hexmask.long.byte 0x0 0.--3. 1. "BRS,BRS"
line.long 0x4 "FMTR0,TSPI Format Control Register 0"
bitfld.long 0x4 31. "DIR,DIR" "0,1"
hexmask.long.byte 0x4 24.--29. 1. "FL,FL"
hexmask.long.byte 0x4 20.--23. 1. "FINT,FINT"
bitfld.long 0x4 19. "CS3POL,CS3POL" "0,1"
bitfld.long 0x4 18. "CS2POL,CS2POL" "0,1"
bitfld.long 0x4 17. "CS1POL,CS1POL" "0,1"
bitfld.long 0x4 16. "CS0POL,CS0POL" "0,1"
bitfld.long 0x4 15. "CKPHA,CKPHA" "0,1"
bitfld.long 0x4 14. "CKPOL,CKPOL" "0,1"
newline
hexmask.long.byte 0x4 10.--13. 1. "CSINT,CSINT"
hexmask.long.byte 0x4 4.--7. 1. "CSSCKDL,CSSCKDL"
hexmask.long.byte 0x4 0.--3. 1. "SCKCSDL,SCKCSDL"
line.long 0x8 "FMTR1,TSPI Format Control Register 1"
bitfld.long 0x8 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 1. "VPE,VPE" "0,1"
bitfld.long 0x8 0. "VPM,VPM" "0,1"
line.long 0xC "SECTCR0,TSPI Sector Mode Control Register 0"
bitfld.long 0xC 0. "SECT,SECT" "0,1"
line.long 0x10 "SECTCR1,TSPI Sector Mode Control Register 1"
hexmask.long.byte 0x10 24.--29. 1. "SECTL3,SECTL3"
hexmask.long.byte 0x10 16.--21. 1. "SECTL2,SECTL2"
hexmask.long.byte 0x10 8.--13. 1. "SECTL1,SECTL1"
hexmask.long.byte 0x10 0.--5. 1. "SECTL0,SECTL0"
group.long 0x100++0x3
line.long 0x0 "DR,TSPI Data Register"
hexmask.long 0x0 0.--31. 1. "TSPIDR,TSPIDR"
group.long 0x200++0x7
line.long 0x0 "SR,TSPI Status Register"
rbitfld.long 0x0 31. "TSPISUE,TSPISUE" "0,1"
rbitfld.long 0x0 23. "TXRUN,TXRUN" "0,1"
bitfld.long 0x0 22. "TXEND,TXEND" "0,1"
bitfld.long 0x0 21. "INTTXWF,INTTXWF" "0,1"
rbitfld.long 0x0 20. "TFEMP,TFEMP" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "TLVL,TLVL"
rbitfld.long 0x0 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x0 6. "RXEND,RXEND" "0,1"
bitfld.long 0x0 5. "INTRXFF,INTRXFF" "0,1"
newline
rbitfld.long 0x0 4. "RFFLL,RFFLL" "0,1"
hexmask.long.byte 0x0 0.--3. 1. "RLVL,RLVL"
line.long 0x4 "ERR,TSPI Parity Error Flag Register"
bitfld.long 0x4 3. "TRGERR,TRGERR" "0,1"
bitfld.long 0x4 2. "UDRERR,UDRERR" "0,1"
bitfld.long 0x4 1. "OVRERR,OVRERR" "0,1"
bitfld.long 0x4 0. "PERR,PERR" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "TSPI2"
base ad:0x4009A000
group.long 0x0++0xB
line.long 0x0 "CR0,TSPI Control Register 0"
bitfld.long 0x0 6.--7. "SWRST,SWRST" "0,1,2,3"
bitfld.long 0x0 0. "TSPIE,TSPIE" "0,1"
line.long 0x4 "CR1,TSPI Control Register 1"
bitfld.long 0x4 16. "INF,INF" "0,1"
bitfld.long 0x4 15. "TRGEN,TRGEN" "0,1"
bitfld.long 0x4 14. "TRXE,TRXE" "0,1"
bitfld.long 0x4 13. "TSPIMS,TSPIMS" "0,1"
bitfld.long 0x4 12. "MSTR,MSTR" "0,1"
bitfld.long 0x4 10.--11. "TMMD,TMMD" "0,1,2,3"
bitfld.long 0x4 8.--9. "CSSEL,CSSEL" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "FC,FC"
line.long 0x8 "CR2,TSPI Control Register 2"
bitfld.long 0x8 22.--23. "TIDLE,TIDLE" "0,1,2,3"
bitfld.long 0x8 21. "TXDEMP,TXDEMP" "0,1"
bitfld.long 0x8 16.--18. "RXDLY,RXDLY" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 12.--15. 1. "TIL,TIL"
hexmask.long.byte 0x8 8.--11. 1. "RIL,RIL"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
newline
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR3,TSPI Control Register 3"
bitfld.long 0x0 1. "TFEMPCLR,TFEMPCLR" "0,1"
bitfld.long 0x0 0. "RFFLLCLR,RFFLLCLR" "0,1"
group.long 0x10++0x13
line.long 0x0 "BR,TSPI Baud Rate Generator Control Register"
hexmask.long.byte 0x0 4.--7. 1. "BRCK,BRCK"
hexmask.long.byte 0x0 0.--3. 1. "BRS,BRS"
line.long 0x4 "FMTR0,TSPI Format Control Register 0"
bitfld.long 0x4 31. "DIR,DIR" "0,1"
hexmask.long.byte 0x4 24.--29. 1. "FL,FL"
hexmask.long.byte 0x4 20.--23. 1. "FINT,FINT"
bitfld.long 0x4 19. "CS3POL,CS3POL" "0,1"
bitfld.long 0x4 18. "CS2POL,CS2POL" "0,1"
bitfld.long 0x4 17. "CS1POL,CS1POL" "0,1"
bitfld.long 0x4 16. "CS0POL,CS0POL" "0,1"
bitfld.long 0x4 15. "CKPHA,CKPHA" "0,1"
bitfld.long 0x4 14. "CKPOL,CKPOL" "0,1"
newline
hexmask.long.byte 0x4 10.--13. 1. "CSINT,CSINT"
hexmask.long.byte 0x4 4.--7. 1. "CSSCKDL,CSSCKDL"
hexmask.long.byte 0x4 0.--3. 1. "SCKCSDL,SCKCSDL"
line.long 0x8 "FMTR1,TSPI Format Control Register 1"
bitfld.long 0x8 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 1. "VPE,VPE" "0,1"
bitfld.long 0x8 0. "VPM,VPM" "0,1"
line.long 0xC "SECTCR0,TSPI Sector Mode Control Register 0"
bitfld.long 0xC 0. "SECT,SECT" "0,1"
line.long 0x10 "SECTCR1,TSPI Sector Mode Control Register 1"
hexmask.long.byte 0x10 24.--29. 1. "SECTL3,SECTL3"
hexmask.long.byte 0x10 16.--21. 1. "SECTL2,SECTL2"
hexmask.long.byte 0x10 8.--13. 1. "SECTL1,SECTL1"
hexmask.long.byte 0x10 0.--5. 1. "SECTL0,SECTL0"
group.long 0x100++0x3
line.long 0x0 "DR,TSPI Data Register"
hexmask.long 0x0 0.--31. 1. "TSPIDR,TSPIDR"
group.long 0x200++0x7
line.long 0x0 "SR,TSPI Status Register"
rbitfld.long 0x0 31. "TSPISUE,TSPISUE" "0,1"
rbitfld.long 0x0 23. "TXRUN,TXRUN" "0,1"
bitfld.long 0x0 22. "TXEND,TXEND" "0,1"
bitfld.long 0x0 21. "INTTXWF,INTTXWF" "0,1"
rbitfld.long 0x0 20. "TFEMP,TFEMP" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "TLVL,TLVL"
rbitfld.long 0x0 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x0 6. "RXEND,RXEND" "0,1"
bitfld.long 0x0 5. "INTRXFF,INTRXFF" "0,1"
newline
rbitfld.long 0x0 4. "RFFLL,RFFLL" "0,1"
hexmask.long.byte 0x0 0.--3. 1. "RLVL,RLVL"
line.long 0x4 "ERR,TSPI Parity Error Flag Register"
bitfld.long 0x4 3. "TRGERR,TRGERR" "0,1"
bitfld.long 0x4 2. "UDRERR,UDRERR" "0,1"
bitfld.long 0x4 1. "OVRERR,OVRERR" "0,1"
bitfld.long 0x4 0. "PERR,PERR" "0,1"
tree.end
endif
sif (cpuis("TMPM3HM*B*")||cpuis("TMPM3HMFD*")||cpuis("TMPM3HMFY*")||cpuis("TMPM3HMFZ*")||cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "TSPI3"
base ad:0x4009B000
group.long 0x0++0xB
line.long 0x0 "CR0,TSPI Control Register 0"
bitfld.long 0x0 6.--7. "SWRST,SWRST" "0,1,2,3"
bitfld.long 0x0 0. "TSPIE,TSPIE" "0,1"
line.long 0x4 "CR1,TSPI Control Register 1"
bitfld.long 0x4 16. "INF,INF" "0,1"
bitfld.long 0x4 15. "TRGEN,TRGEN" "0,1"
bitfld.long 0x4 14. "TRXE,TRXE" "0,1"
bitfld.long 0x4 13. "TSPIMS,TSPIMS" "0,1"
bitfld.long 0x4 12. "MSTR,MSTR" "0,1"
bitfld.long 0x4 10.--11. "TMMD,TMMD" "0,1,2,3"
bitfld.long 0x4 8.--9. "CSSEL,CSSEL" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "FC,FC"
line.long 0x8 "CR2,TSPI Control Register 2"
bitfld.long 0x8 22.--23. "TIDLE,TIDLE" "0,1,2,3"
bitfld.long 0x8 21. "TXDEMP,TXDEMP" "0,1"
bitfld.long 0x8 16.--18. "RXDLY,RXDLY" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 12.--15. 1. "TIL,TIL"
hexmask.long.byte 0x8 8.--11. 1. "RIL,RIL"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
newline
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR3,TSPI Control Register 3"
bitfld.long 0x0 1. "TFEMPCLR,TFEMPCLR" "0,1"
bitfld.long 0x0 0. "RFFLLCLR,RFFLLCLR" "0,1"
group.long 0x10++0x13
line.long 0x0 "BR,TSPI Baud Rate Generator Control Register"
hexmask.long.byte 0x0 4.--7. 1. "BRCK,BRCK"
hexmask.long.byte 0x0 0.--3. 1. "BRS,BRS"
line.long 0x4 "FMTR0,TSPI Format Control Register 0"
bitfld.long 0x4 31. "DIR,DIR" "0,1"
hexmask.long.byte 0x4 24.--29. 1. "FL,FL"
hexmask.long.byte 0x4 20.--23. 1. "FINT,FINT"
bitfld.long 0x4 19. "CS3POL,CS3POL" "0,1"
bitfld.long 0x4 18. "CS2POL,CS2POL" "0,1"
bitfld.long 0x4 17. "CS1POL,CS1POL" "0,1"
bitfld.long 0x4 16. "CS0POL,CS0POL" "0,1"
bitfld.long 0x4 15. "CKPHA,CKPHA" "0,1"
bitfld.long 0x4 14. "CKPOL,CKPOL" "0,1"
newline
hexmask.long.byte 0x4 10.--13. 1. "CSINT,CSINT"
hexmask.long.byte 0x4 4.--7. 1. "CSSCKDL,CSSCKDL"
hexmask.long.byte 0x4 0.--3. 1. "SCKCSDL,SCKCSDL"
line.long 0x8 "FMTR1,TSPI Format Control Register 1"
bitfld.long 0x8 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 1. "VPE,VPE" "0,1"
bitfld.long 0x8 0. "VPM,VPM" "0,1"
line.long 0xC "SECTCR0,TSPI Sector Mode Control Register 0"
bitfld.long 0xC 0. "SECT,SECT" "0,1"
line.long 0x10 "SECTCR1,TSPI Sector Mode Control Register 1"
hexmask.long.byte 0x10 24.--29. 1. "SECTL3,SECTL3"
hexmask.long.byte 0x10 16.--21. 1. "SECTL2,SECTL2"
hexmask.long.byte 0x10 8.--13. 1. "SECTL1,SECTL1"
hexmask.long.byte 0x10 0.--5. 1. "SECTL0,SECTL0"
group.long 0x100++0x3
line.long 0x0 "DR,TSPI Data Register"
hexmask.long 0x0 0.--31. 1. "TSPIDR,TSPIDR"
group.long 0x200++0x7
line.long 0x0 "SR,TSPI Status Register"
rbitfld.long 0x0 31. "TSPISUE,TSPISUE" "0,1"
rbitfld.long 0x0 23. "TXRUN,TXRUN" "0,1"
bitfld.long 0x0 22. "TXEND,TXEND" "0,1"
bitfld.long 0x0 21. "INTTXWF,INTTXWF" "0,1"
rbitfld.long 0x0 20. "TFEMP,TFEMP" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "TLVL,TLVL"
rbitfld.long 0x0 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x0 6. "RXEND,RXEND" "0,1"
bitfld.long 0x0 5. "INTRXFF,INTRXFF" "0,1"
newline
rbitfld.long 0x0 4. "RFFLL,RFFLL" "0,1"
hexmask.long.byte 0x0 0.--3. 1. "RLVL,RLVL"
line.long 0x4 "ERR,TSPI Parity Error Flag Register"
bitfld.long 0x4 3. "TRGERR,TRGERR" "0,1"
bitfld.long 0x4 2. "UDRERR,UDRERR" "0,1"
bitfld.long 0x4 1. "OVRERR,OVRERR" "0,1"
bitfld.long 0x4 0. "PERR,PERR" "0,1"
tree.end
endif
sif (cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "TSPI4"
base ad:0x4009C000
group.long 0x0++0xB
line.long 0x0 "CR0,TSPI Control Register 0"
bitfld.long 0x0 6.--7. "SWRST,SWRST" "0,1,2,3"
bitfld.long 0x0 0. "TSPIE,TSPIE" "0,1"
line.long 0x4 "CR1,TSPI Control Register 1"
bitfld.long 0x4 16. "INF,INF" "0,1"
bitfld.long 0x4 15. "TRGEN,TRGEN" "0,1"
bitfld.long 0x4 14. "TRXE,TRXE" "0,1"
bitfld.long 0x4 13. "TSPIMS,TSPIMS" "0,1"
bitfld.long 0x4 12. "MSTR,MSTR" "0,1"
bitfld.long 0x4 10.--11. "TMMD,TMMD" "0,1,2,3"
bitfld.long 0x4 8.--9. "CSSEL,CSSEL" "0,1,2,3"
hexmask.long.byte 0x4 0.--7. 1. "FC,FC"
line.long 0x8 "CR2,TSPI Control Register 2"
bitfld.long 0x8 22.--23. "TIDLE,TIDLE" "0,1,2,3"
bitfld.long 0x8 21. "TXDEMP,TXDEMP" "0,1"
bitfld.long 0x8 16.--18. "RXDLY,RXDLY" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 12.--15. 1. "TIL,TIL"
hexmask.long.byte 0x8 8.--11. 1. "RIL,RIL"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
newline
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
wgroup.long 0xC++0x3
line.long 0x0 "CR3,TSPI Control Register 3"
bitfld.long 0x0 1. "TFEMPCLR,TFEMPCLR" "0,1"
bitfld.long 0x0 0. "RFFLLCLR,RFFLLCLR" "0,1"
group.long 0x10++0x13
line.long 0x0 "BR,TSPI Baud Rate Generator Control Register"
hexmask.long.byte 0x0 4.--7. 1. "BRCK,BRCK"
hexmask.long.byte 0x0 0.--3. 1. "BRS,BRS"
line.long 0x4 "FMTR0,TSPI Format Control Register 0"
bitfld.long 0x4 31. "DIR,DIR" "0,1"
hexmask.long.byte 0x4 24.--29. 1. "FL,FL"
hexmask.long.byte 0x4 20.--23. 1. "FINT,FINT"
bitfld.long 0x4 19. "CS3POL,CS3POL" "0,1"
bitfld.long 0x4 18. "CS2POL,CS2POL" "0,1"
bitfld.long 0x4 17. "CS1POL,CS1POL" "0,1"
bitfld.long 0x4 16. "CS0POL,CS0POL" "0,1"
bitfld.long 0x4 15. "CKPHA,CKPHA" "0,1"
bitfld.long 0x4 14. "CKPOL,CKPOL" "0,1"
newline
hexmask.long.byte 0x4 10.--13. 1. "CSINT,CSINT"
hexmask.long.byte 0x4 4.--7. 1. "CSSCKDL,CSSCKDL"
hexmask.long.byte 0x4 0.--3. 1. "SCKCSDL,SCKCSDL"
line.long 0x8 "FMTR1,TSPI Format Control Register 1"
bitfld.long 0x8 4.--6. "EHOLD,EHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 1. "VPE,VPE" "0,1"
bitfld.long 0x8 0. "VPM,VPM" "0,1"
line.long 0xC "SECTCR0,TSPI Sector Mode Control Register 0"
bitfld.long 0xC 0. "SECT,SECT" "0,1"
line.long 0x10 "SECTCR1,TSPI Sector Mode Control Register 1"
hexmask.long.byte 0x10 24.--29. 1. "SECTL3,SECTL3"
hexmask.long.byte 0x10 16.--21. 1. "SECTL2,SECTL2"
hexmask.long.byte 0x10 8.--13. 1. "SECTL1,SECTL1"
hexmask.long.byte 0x10 0.--5. 1. "SECTL0,SECTL0"
group.long 0x100++0x3
line.long 0x0 "DR,TSPI Data Register"
hexmask.long 0x0 0.--31. 1. "TSPIDR,TSPIDR"
group.long 0x200++0x7
line.long 0x0 "SR,TSPI Status Register"
rbitfld.long 0x0 31. "TSPISUE,TSPISUE" "0,1"
rbitfld.long 0x0 23. "TXRUN,TXRUN" "0,1"
bitfld.long 0x0 22. "TXEND,TXEND" "0,1"
bitfld.long 0x0 21. "INTTXWF,INTTXWF" "0,1"
rbitfld.long 0x0 20. "TFEMP,TFEMP" "0,1"
hexmask.long.byte 0x0 16.--19. 1. "TLVL,TLVL"
rbitfld.long 0x0 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x0 6. "RXEND,RXEND" "0,1"
bitfld.long 0x0 5. "INTRXFF,INTRXFF" "0,1"
newline
rbitfld.long 0x0 4. "RFFLL,RFFLL" "0,1"
hexmask.long.byte 0x0 0.--3. 1. "RLVL,RLVL"
line.long 0x4 "ERR,TSPI Parity Error Flag Register"
bitfld.long 0x4 3. "TRGERR,TRGERR" "0,1"
bitfld.long 0x4 2. "UDRERR,UDRERR" "0,1"
bitfld.long 0x4 1. "OVRERR,OVRERR" "0,1"
bitfld.long 0x4 0. "PERR,PERR" "0,1"
tree.end
endif
tree.end
tree "UART (Asynchronous Serial Communication)"
base ad:0x0
tree "UART0"
base ad:0x400BB000
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
tree "UART1"
base ad:0x400BB100
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
tree "UART2"
base ad:0x400BB200
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
tree "UART3"
base ad:0x400BB300
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
tree "UART4"
base ad:0x400BBD00
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
tree "UART5"
base ad:0x400BBE00
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
tree "UART6"
base ad:0x400BC400
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
sif (cpuis("TMPM3HN*B*")||cpuis("TMPM3HNFDA*")||cpuis("TMPM3HNFDD*")||cpuis("TMPM3HNFDF*")||cpuis("TMPM3HNFY*")||cpuis("TMPM3HNFZ*")||cpuis("TMPM3HP*B*")||cpuis("TMPM3HPFD*")||cpuis("TMPM3HPFY*")||cpuis("TMPM3HPFZ*")||cpuis("TMPM3HQ*B*")||cpuis("TMPM3HQFD*")||cpuis("TMPM3HQFY*")||cpuis("TMPM3HQFZ*"))
tree "UART7"
base ad:0x400BC500
group.long 0x0++0x1F
line.long 0x0 "SWRST,UART Software reset register"
rbitfld.long 0x0 7. "SWRSTF,SWRSTF" "0,1"
bitfld.long 0x0 0.--1. "SWRST,SWRST" "0,1,2,3"
line.long 0x4 "CR0,UART Control register 0"
bitfld.long 0x4 18. "HBSST,HBSST" "0,1"
bitfld.long 0x4 17. "HBSMD,HBSMD" "0,1"
bitfld.long 0x4 16. "HBSEN,HBSEN" "0,1"
bitfld.long 0x4 15. "LPB,LPB" "0,1"
bitfld.long 0x4 12.--14. "NF,NF" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 10. "CTSE,CTSE" "0,1"
bitfld.long 0x4 9. "RTSE,RTSE" "0,1"
bitfld.long 0x4 8. "WU,WU" "0,1"
bitfld.long 0x4 6. "IV,IV" "0,1"
bitfld.long 0x4 5. "DIR,DIR" "0,1"
bitfld.long 0x4 4. "SBLEN,SBLEN" "0,1"
newline
bitfld.long 0x4 3. "EVEN,EVEN" "0,1"
bitfld.long 0x4 2. "PE,PE" "0,1"
bitfld.long 0x4 0.--1. "SM,SM" "0,1,2,3"
line.long 0x8 "CR1,UART Control register 1"
bitfld.long 0x8 12.--14. "TIL,TIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 8.--10. "RIL,RIL" "0,1,2,3,4,5,6,7"
bitfld.long 0x8 7. "INTTXFE,INTTXFE" "0,1"
bitfld.long 0x8 6. "INTTXWE,INTTXWE" "0,1"
bitfld.long 0x8 5. "INTRXFE,INTRXFE" "0,1"
bitfld.long 0x8 4. "INTRXWE,INTRXWE" "0,1"
bitfld.long 0x8 2. "INTERR,INTERR" "0,1"
bitfld.long 0x8 1. "DMATE,DMATE" "0,1"
bitfld.long 0x8 0. "DMARE,DMARE" "0,1"
line.long 0xC "CLK,UART Clock Control register"
hexmask.long.byte 0xC 4.--7. 1. "PRSEL,PRSEL"
line.long 0x10 "BRD,UART Baud rate register"
bitfld.long 0x10 23. "KEN,KEN" "0,1"
hexmask.long.byte 0x10 16.--21. 1. "BRK,BRK"
hexmask.long.word 0x10 0.--15. 1. "BRN,BRN"
line.long 0x14 "TRANS,UART Transfer enable register"
bitfld.long 0x14 3. "BK,BK" "0,1"
bitfld.long 0x14 2. "TXTRG,TXTRG" "0,1"
bitfld.long 0x14 1. "TXE,TXE" "0,1"
bitfld.long 0x14 0. "RXE,RXE" "0,1"
line.long 0x18 "DR,UART Data register"
rbitfld.long 0x18 18. "PERR,PERR" "0,1"
rbitfld.long 0x18 17. "FERR,FERR" "0,1"
rbitfld.long 0x18 16. "BERR,BERR" "0,1"
hexmask.long.word 0x18 0.--8. 1. "DR,DR"
line.long 0x1C "SR,UART Status register"
rbitfld.long 0x1C 31. "SUE,SUE" "0,1"
rbitfld.long 0x1C 15. "TXRUN,TXRUN" "0,1"
bitfld.long 0x1C 14. "TXEND,TXEND" "0,1"
bitfld.long 0x1C 13. "TXFF,TXFF" "0,1"
hexmask.long.byte 0x1C 8.--11. 1. "TLVL,TLVL"
rbitfld.long 0x1C 7. "RXRUN,RXRUN" "0,1"
bitfld.long 0x1C 6. "RXEND,RXEND" "0,1"
bitfld.long 0x1C 5. "RXFF,RXFF" "0,1"
hexmask.long.byte 0x1C 0.--3. 1. "RLVL,RLVL"
wgroup.long 0x20++0x3
line.long 0x0 "FIFOCLR,UART FIFO Clear register"
bitfld.long 0x0 1. "TFCLR,TFCLR" "0,1"
bitfld.long 0x0 0. "RFCLR,RFCLR" "0,1"
group.long 0x24++0x3
line.long 0x0 "ERR,UART Error register"
bitfld.long 0x0 4. "TRGERR,TRGERR" "0,1"
bitfld.long 0x0 3. "OVRERR,OVRERR" "0,1"
bitfld.long 0x0 2. "PERR,PERR" "0,1"
bitfld.long 0x0 1. "FERR,FERR" "0,1"
bitfld.long 0x0 0. "BERR,BERR" "0,1"
tree.end
endif
tree.end
AUTOINDENT.OFF