; -------------------------------------------------------------------------------- ; @Title: TMS320DM365 On-Chip Peripherals ; @Props: Released ; @Author: ADI, FIL ; @Changelog: 2009-09-16 ; @Manufacturer: TI - Texas Instruments ; @Doc: tms320dm365.pdf; sprufg5a.pdf; sprufg8a.pdf; sprufg9a.pdf; sprufh0.pdf ; sprufh1a.pdf; sprufh2.pdf; sprufh3a.pdf; sprufh5a.pdf; sprufh6.pdf ; sprufh7.pdf; sprufh8b.pdf; sprufh9a.pdf; sprufi0.pdf; sprufi1a.pdf ; sprufi2.pdf; sprufi3a.pdf; sprufi4a.pdf; sprufi5a.pdf; sprufi7.pdf ; sprufi8.pdf; sprufi9.pdf; sprufj0.pdf; sprugg8.pdf(2009.03) ; @Core: ARM926EJ-S ; @Chip: TMS320DM365 ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pertms320dm365.per 7592 2017-02-18 13:54:14Z askoncej $ config 16. 8. width 0xb AUTOINDENT.PUSH AUTOINDENT.OFF width 8. tree "ID Registers" group c15:0x0000--0x0000 line.long 0x0 "MIDR,Identity Code" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer" hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision" hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision" group c15:0x0100--0x0100 line.long 0x0 "CTR,Cache Type" bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes" textline " " bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16" textline " " bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16" group c15:0x0200--0x0200 line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register" bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes" bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes" tree.end tree "MMU Control and Configuration" width 8. group c15:0x0001--0x0001 line.long 0x0 "CR,Control Register" bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable" bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin" bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable" bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable" bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable" bitfld.long 0x0 7. " B ,Endianism" "Little,Big" textline " " bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable" bitfld.long 0x0 0. " M ,MMU" "Disable,Enable" textline " " group c15:0x0002--0x0002 line.long 0x0 "TTBR,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address" textline " " group c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group c15:0x0005--0x0005 line.long 0x0 "DFSR,Data Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x0105--0x0105 line.long 0x0 "IFSR,Instruction Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x0006--0x0006 line.long 0x0 "DFAR,Data Fault Address Register" textline " " group c15:0x000a--0x000a line.long 0x0 "TLBR,TLB Lockdown Register" bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. " P ,P bit" "0,1" textline " " group c15:0x000d--0x000d line.long 0x0 "FCSEPID,FCSE Process ID" group c15:0x010d--0x010d line.long 0x0 "CONTEXT,Context ID" tree.end tree "Cache Control and Configuration" group c15:0x0009--0x0009 line.long 0x0 "DCACHE,Data Cache Lockdown" bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1" bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1" bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1" bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1" group c15:0x0109--0x0109 line.long 0x0 "ICACHE,Instruction Cache Lockdown" bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1" bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1" bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1" bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1" tree.end tree "TCM Control and Configuration" group c15:0x0019--0x0019 line.long 0x0 "DTCM,Data TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address" bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res" bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable" group c15:0x0119--0x0119 line.long 0x0 "ITCM,Instruction TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address" bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res" bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable" tree.end tree "Test and Debug" group c15:0x000f--0x000f line.long 0x0 "DOVRR,Debug Override Register" bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable" bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort" bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort" textline " " bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable" bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable" bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable" bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT" group c15:0x001f--0x001f line.long 0x0 "ADDRESS,Debug/Test Address" ;wgroup c15:0x402f--0x402f ; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry" ;wgroup c15:0x403f--0x403f ; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry" ;wgroup c15:0x404f--0x404f ; line.long 0x0 "RMTLBPA,Read PA in main TLB entry" ;wgroup c15:0x405f--0x405f ; line.long 0x0 "WMTLBPA,Write PA in main TLB entry" ;wgroup c15:0x407f--0x407f ; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM" ;wgroup c15:0x412f--0x412f ; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry" ;wgroup c15:0x413f--0x413f ; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry" ;wgroup c15:0x414f--0x414f ; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry" ;wgroup c15:0x415f--0x415f ; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry" ;wgroup c15:0x417f--0x417f ; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM" group c15:0x101f--0x101f line.long 0x0 "TRACE,Trace Control" bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall" bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall" group c15:0x700f--0x700f line.long 0x0 "CACHE,Cache Debug Control" bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through" bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable" bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable" group c15:0x701f--0x701f line.long 0x0 "MMU,MMU Debug Control" bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable" bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable" bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable" bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable" textline " " bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable" bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable" bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable" bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable" group c15:0x002f--0x002f line.long 0x0 "REMAP,Memory Region Remap" bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB" bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB" textline " " bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB" bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB" tree.end tree "ICEbreaker" width 8. group ice:0x0--0x5 "Debug Control" line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled" bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled" textline " " bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled" bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled" bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x4 "DBGSTAT,Debug Status Register" bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res" bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java" bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb" bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1" bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled" bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x8 "VECTOR,Vector Catch Register" bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena" bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena" bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena" bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena" bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena" bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena" bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena" line.long 0x10 "COMCTRL,Debug Communication Control Register" bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend" bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend" line.long 0x14 "COMDATA,Debug Communication Data Register" group ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" tree.end AUTOINDENT.POP tree "EMIF (Asynchronous External Memory Interface)" base asd:0x01d10000 width 17. group.long 0x04++0x3 line.long 0x00 "AWCCR,Asynchronous Wait Cycle Configuration Register" bitfld.long 0x00 28. " WP0 ,WAIT polarity" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " MEWC ,Maximum extended wait cycles" sif (cpu()=="DM357") group.long 0x10++0xf line.long 0x0 "A1CR,Asynchronous 1 Configuration Register" bitfld.long 0x0 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x0 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x0 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x0 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x0 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x0 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x0 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x0 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0x4 "A2CR,Asynchronous 2 Configuration Register" bitfld.long 0x4 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x4 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x4 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x4 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x4 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x4 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x4 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x4 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0x8 "A3CR,Asynchronous 3 Configuration Register" bitfld.long 0x8 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x8 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x8 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x8 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x8 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x8 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x8 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x8 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x8 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x8 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0xC "A4CR,Asynchronous 4 Configuration Register" bitfld.long 0xC 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0xC 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0xC 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0xC 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0xC 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0xC 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0xC 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0xC 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0xC 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0xC 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." else group.long 0x10++0x7 line.long 0x0 "A1CR,Asynchronous 1 Configuration Register" bitfld.long 0x0 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x0 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x0 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x0 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x0 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x0 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x0 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x0 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0x4 "A2CR,Asynchronous 2 Configuration Register" bitfld.long 0x4 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x4 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x4 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x4 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x4 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x4 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x4 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x4 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." endif group.long 0x40++0x7 line.long 0x00 "EIRR,EMIF Interrupt Raw Register" eventfld.long 0x00 2. " WR ,Wait Rise" "Not occurred,Occurred" eventfld.long 0x00 0. " AT ,Asynchronous Timeout" "Not occurred,Occurred" line.long 0x04 "EIMR,EMIF Interrupt Mask Register" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " WRM_set/clr ,Wait Rise Masked" "No interrupt,Interrupt" textline " " setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " ATM_set/clr ,Asynchronous Timeout Masked" "No interrupt,Interrupt" sif (cpu()=="DM357") group.long 0x60++0x03 line.long 0x00 "NANDFCR,NAND Flash Control Register" bitfld.long 0x00 11. " CS5ECC ,NAND Flash ECC start for chip select 5" "Not started,Started" bitfld.long 0x00 10. " CS4ECC ,NAND Flash ECC start for chip select 4" "Not started,Started" textline " " bitfld.long 0x00 9. " CS3ECC ,NAND Flash ECC start for chip select 3" "Not started,Started" bitfld.long 0x00 8. " CS2ECC ,NAND Flash ECC start for chip select 2" "Not started,Started" textline " " bitfld.long 0x00 3. " CS5NAND ,NAND Flash mode for chip select 5" "Disabled,Enabled" bitfld.long 0x00 2. " CS4NAND ,NAND Flash mode for chip select 4" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CS3NAND ,NAND Flash mode for chip select 3" "Disabled,Enabled" bitfld.long 0x00 0. " CS2NAND ,NAND Flash mode for chip select 2" "Disabled,Enabled" else group.long 0x5c++0x7 line.long 0x00 "ONENANDCTL,OneNAND Flash Control Register" bitfld.long 0x00 8.--10. " RD_LATENCY ,Synchronous Mode Read Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " CS3ONENANDRDMOD ,CS3 One NAND Read Mode" "Async,Sync" textline " " bitfld.long 0x00 4. " CS2ONENANDRDMOD ,CS2 One NAND Read Mode" "Async,Sync" bitfld.long 0x00 1. " CS3ONENANDSEL ,CS3 used for ONENAND mode operation" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CS2ONENANDSEL ,CS2 used for ONENAND mode operation" "Disabled,Enabled" line.long 0x04 "NANDFCR,NAND Flash Control Register" bitfld.long 0x04 13. " 4BITECC_ADD_CALC_START ,NAND Flash 4-bit ECC address and error value calculation Start" "Not started,Started" bitfld.long 0x04 12. " 4BITECC_START ,Nand Flash 4-bit ECC start for the selected chip select" "Not started,Started" textline " " bitfld.long 0x04 9. " CS3ECC ,NAND Flash ECC start for chip select 3" "Not started,Started" bitfld.long 0x04 8. " CS2ECC ,NAND Flash ECC start for chip select 2" "Not started,Started" textline " " bitfld.long 0x04 4.--5. " 4BITECCSEL ,4Bit ECC CS selection" "CS2,CS3,?..." bitfld.long 0x04 1. " CS3NAND ,NAND Flash mode for chip select 3" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CS2NAND ,NAND Flash mode for chip select 2" "Disabled,Enabled" endif rgroup.long 0x64++0x3 line.long 0x00 "NANDFSR,NAND Flash Status Register" sif (cpu()!="DM357") bitfld.long 0x00 16.--17. " ECC_ERRNUM ,Number of Errors found after the 4-Bit ECC Error Address and Error Value Calculation is done" "1 error,2 errors,3 errors,4 errors" bitfld.long 0x00 8.--11. " ECC_STATE ,ECC correction state while performing 4-bit ECC Address and Error Value Calculation" "No errors,Not corrected(>=5),Completed,Completed,Reserved,Calculating number of errors,Preparing for error search,Preparing for error search,Searching for errors,Reserved,Reserved,Reserved,Calculating error value,Calculating error value,Calculating error value,Calculating error value" textline " " endif bitfld.long 0x00 0.--3. " WAITST ,Raw status of EM_WAIT input pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()=="DM357") rgroup.long 0x70++0x13 line.long 0x0 "NANDF1ECC,NAND Flash 1 ECC Register" bitfld.long 0x0 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" line.long 0x4 "NANDF2ECC,NAND Flash 2 ECC Register" bitfld.long 0x4 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" line.long 0x8 "NANDF3ECC,NAND Flash 3 ECC Register" bitfld.long 0x8 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" line.long 0xC "NANDF4ECC,NAND Flash 4 ECC Register" bitfld.long 0xC 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" else hgroup.long 0x70++0x3 hide.long 0x00 "NANDF1ECC,NAND Flash 1 ECC Register" in hgroup.long 0x74++0x3 hide.long 0x00 "NANDF2ECC,NAND Flash 2 ECC Register" in endif sif (cpu()!="DM357") group.long 0xbc++0x03 line.long 0x00 "NAND4BITECCLOAD,NAND Flash 4-bit ECC LOAD Register" hexmask.long.word 0x00 0.--9. 1. " 4BITECCLOAD ,4-bit ECC load" hgroup.long 0xC0++0x03 hide.long 0x00 "NAND4BITECC1,NAND Flash 4-bit ECC Register 1" in hgroup.long 0xC4++0x03 hide.long 0x00 "NAND4BITECC2,NAND Flash 4-bit ECC Register 2" in hgroup.long 0xC8++0x03 hide.long 0x00 "NAND4BITECC3,NAND Flash 4-bit ECC Register 3" in hgroup.long 0xCC++0x03 hide.long 0x00 "NAND4BITECC4,NAND Flash 4-bit ECC Register 4" in hgroup.long 0xd0++0x3 hide.long 0x00 "NANDERRADD1,NAND Flash 4-bit ECC Error Address Register 1" in hgroup.long 0xd4++0x3 hide.long 0x00 "NANDERRADD2,NAND Flash 4-bit ECC Error Address Register 2" in hgroup.long 0xd8++0x3 hide.long 0x00 "NANDERRVAL1,NAND Flash 4-bit ECC Error Value Register 1" in hgroup.long 0xdc++0x3 hide.long 0x00 "NANDERRVAL2,NAND Flash 4-bit ECC Error Value Register 2" in endif width 0xb tree.end tree "DDR2/mDDR Memory Controller Registers" base asd:0x20000000 width 10. rgroup.long 0x04++0x3 line.long 0x00 "SDRSTAT,SDRAM Status Register" bitfld.long 0x00 2. " PHYRDY ,DDR2 memory controller DLL ready" "Not ready,Ready" if (((data.long(asd:0x20000000+0x08))&0x2130000)==0x0130000) sif (cpu()=="DM365"||cpu()=="DM368") group.long 0x08++0x3 line.long 0x00 "SDCR,SDRAM Configuration Register" bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special" bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 22. " DDR_DDQS ,DDR2 SDRAM differential DQS enable" "Single-ended,Differential" bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled" bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,SDRAM drive strength" "Normal,Weak,?..." textline " " bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled" bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 14. " NM ,SDRAM data bus width" "Reserved,16-bit" bitfld.long 0x00 9.--11. " CL ,SDRAM CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal SDRAM bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." else group.long 0x08++0x3 line.long 0x00 "SDCR,SDRAM Configuration Register" bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special" bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled" bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,DDR2 SDRAM drive strength" "Normal,Weak,?..." textline " " bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled" bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit" bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." endif elif (((data.long(asd:0x20000000+0x08))&0x2130000)==0x2030000) sif (cpu()=="DM365"||cpu()=="DM368") group.long 0x08++0x3 line.long 0x00 "SDCR,SDRAM Configuration Register" bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special" bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 22. " DDR_DDQS ,DDR2 SDRAM differential DQS enable" "Single-ended,Differential" bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled" bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,SDRAM drive strength" "Full,1/2,1/4,1/8" textline " " bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled" bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 14. " NM ,SDRAM data bus width" "Reserved,16-bit" bitfld.long 0x00 9.--11. " CL ,SDRAM CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal SDRAM bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." else group.long 0x08++0x3 line.long 0x00 "SDCR,SDRAM Configuration Register" bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special" bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled" bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,Mobile DDR drive strength" "Full,1/2,1/4,1/8" textline " " bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled" bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit" bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." endif else sif (cpu()=="DM365"||cpu()=="DM368") group.long 0x08++0x3 line.long 0x00 "SDCR,SDRAM Configuration Register" bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special" bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 22. " DDR_DDQS ,DDR2 SDRAM differential DQS enable" "Single-ended,Differential" bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled" bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 14. " NM ,SDRAM data bus width" "Reserved,16-bit" bitfld.long 0x00 9.--11. " CL ,SDRAM CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal SDRAM bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." else group.long 0x08++0x3 line.long 0x00 "SDCR,SDRAM Configuration Register" bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special" bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled" bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled" bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" textline " " bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit" bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." endif endif group.long 0x0c++0x3 line.long 0x00 "SDRCR,SDRAM Refresh Control Register" bitfld.long 0x00 31. " LPMODEN ,Low-power mode enable" "Disabled,Enabled" bitfld.long 0x00 30. " MCLKSTOPEN ,MCLK stop enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " SR_PD ,Self-refresh/power-down mode" "Self-refresh,Power-down" hexmask.long.word 0x00 0.--15. 1. " RR ,Refresh rate" width 10. group.long 0x10++0x7 line.long 0x00 "SDTIMR,SDRAM Timing Register" hexmask.long.byte 0x00 25.--31. 1. " T_RFC ,Minimum number of DDR_CLK cycles from a refresh or load mode command" bitfld.long 0x00 22.--24. " T_RP ,Minimum number of DDR_CLK cycles from a precharge command to refresh command" "0,1,2,3,4,5,6,7" bitfld.long 0x00 19.--21. " T_RCD ,Minimum number of DDR_CLK cycles from an activate command to read or write command" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " T_WR ,Minimum number of DDR_CLK cycles from the last write transfer to precharge command" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 11.--15. 1. " T_RAS ,Minimum number of DDR_CLK cycles from activate command to precharge command" hexmask.long.byte 0x00 6.--10. 1. " T_RC ,Minimum number of DDR_CLK cycles from an activate command to activate command" textline " " bitfld.long 0x00 3.--5. " T_RRD ,Minimum number of DDR_CLK cycles from an activate command to activate in different bank" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--1. " T_WTR ,Minimum number of DDR_CLK cycles from the last write to a read commande" "0,1,2,3" line.long 0x04 "SDTIMR2,SDRAM Timing 2 Register" hexmask.long.byte 0x04 27.--30. 1. " T_RASMAX ,Maximum number of refresh rate intervals from Activate to Precharge command" bitfld.long 0x04 25.--26. " T_XP ,Minimum number of DDR_CLK cycles from Power Down exit to any other command except a read command" "0,1,2,3" hexmask.long.byte 0x04 16.--22. 1. " T_XSNR ,Minimum number of DDR_CLK cycles from a self_refresh exit to any other command except a read command" textline " " hexmask.long.byte 0x04 8.--15. 1. " T_XSRD ,Minimum number of DDR_CLK cycles from a self_refresh exit to read command" bitfld.long 0x04 5.--7. " T_RTP ,Minimum number of DDR_CLK cycles from a last read command to precharge command" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--4. 1. " T_CKE ,Minimum number of DDR_CLK cycles between transitions on the DDR_CKE pin" group.long 0x1c++0x7 line.long 0x00 "SDCR2,SDRAM Configuration Register 2" bitfld.long 0x00 16.--18. " PASR ,Partial array self refresh" "4 banks,2 banks,1 bank,Reserved,Reserved,0.5 bank,0.25 bank,?..." bitfld.long 0x00 0.--2. " ROWSIZE ,Row size" "9,10,11,12,13,14,15,16" line.long 0x04 "PBBPR,Peripheral Bus Burst Priority Register" hexmask.long.byte 0x04 0.--7. 1. " PR_OLD_COUNT ,Priority raise old counter" width 10. group.long 0xc0++0xf line.long 0x00 "IRR,Interrupt Raw Register" eventfld.long 0x00 2. " LT ,Line trap" "Not occurred,Occurred" line.long 0x04 "IMR,Interrupt Masked Register" eventfld.long 0x04 2. " LTM ,Line trap masked" "Not occurred,Occurred" line.long 0x08 "IMSR,Interrupt Mask Set Register" bitfld.long 0x08 2. " LTMSET ,Line trap interrupt set" "Disabled,Enabled" line.long 0x0c "IMCR,Interrupt Mask Clear Register" eventfld.long 0x0c 2. " LTMCLR ,Line trap interrupt clear" "Disabled,Enabled" group.long 0xe4++0x3 line.long 0x00 "DDRPHYCR1,DDR PHY Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 7. " CONFIG_EXT_STRBEN ,Internal/External strobe gating select" "Internal,External" bitfld.long 0x00 6. " CONFIG_PWRDNEN ,Power down receivers" "Power up,Power down" textline " " bitfld.long 0x00 0.--3. " READ_LATENCY ,Read latency" "Reserved,Reserved,Reserved,3,4,5,6,7,?..." base asd:0x01c40000 group.long 0x00++0x03 line.long 0x00 "VTPIOCR,VTP IO Control Register" bitfld.long 0x00 20. " DLLRSTZ ,Active low reset DLL" "Reset,No reset" bitfld.long 0x00 19. " CLKRSTZ ,Active low reset clock divider of DDR address/data macro" "Reset,No reset" bitfld.long 0x00 18. " VREFEN ,Internal DDR IO Vref enable" "Pad/external,Internal" textline " " bitfld.long 0x00 16.--17. " VREFTAP ,Selection for internal reference voltage level" "50.0%,47.5%,52.5%,50.0%" bitfld.long 0x00 15. " READY ,VTP Ready status" "Not ready,Ready" bitfld.long 0x00 14. " IOPWRDN ,Power down enable for DDR input buffer" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " CLRZ ,VTP clear" "Cleared,Not cleared" bitfld.long 0x00 12. " FORCEDNP ,Force decrease PFET drive" "Not forced,Forced" bitfld.long 0x00 11. " FORCEDNN ,Force decrease NFET drive" "Not forced,Forced" textline " " bitfld.long 0x00 10. " FORCEUPP ,Force increase PFET drive" "Not forced,Forced" bitfld.long 0x00 9. " FORCEUPN ,Force increase PFET drive" "Not forced,Forced" bitfld.long 0x00 8. " PWRSAVE ,VTP power save mode" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LOCK ,VTP impedance lock" "Not locked,Locked" bitfld.long 0x00 6. " PWRDN ,VTP power down" "Disabled,Enabled" bitfld.long 0x00 5. " D0 ,Drive strength control" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " D1 ,Drive strength control" "Disabled,Enabled" bitfld.long 0x00 3. " D2 ,Drive strength control" "Disabled,Enabled" bitfld.long 0x00 2. " F0 ,Digital filter control" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " F1 ,Digital filter control" "Disabled,Enabled" bitfld.long 0x00 0. " F2 ,Digital filter control" "Disabled,Enabled" else hexmask.long.word 0x00 17.--31. 1. " DLLPWRUPCNT ,DLL power up count" hexmask.long.word 0x00 8.--16. 1. " DLLRESETCNT ,DLL reset count" textline " " bitfld.long 0x00 7. " STROBEGATING ,Internal/External strobe gating select" "Internal,External" bitfld.long 0x00 6. " RECPWRDN ,Power down receivers" "Powered up,Powered down" textline " " bitfld.long 0x00 5. " DLLRESET ,Reset DLL" "No reset,Reset" bitfld.long 0x00 4. " DLLRWEDN ,Power down DLL" "Powered up,Powered down" textline " " bitfld.long 0x00 0.--3. " READLAT ,Read latency" "Reserved,Reserved,Reserved,3,4,5,6,7,8,?..." endif width 0xb tree.end tree.open "EDMA3 (Enhanced Direct Memory Access Controller)" tree "Parameter RAM" base asd:0x01c04000 width 14. tree "Parameter set 0" group.long 0x0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 1" group.long 0x20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 2" group.long 0x40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 3" group.long 0x60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 4" group.long 0x80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 5" group.long 0xA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 6" group.long 0xC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 7" group.long 0xE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 8" group.long 0x100++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 9" group.long 0x120++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 10" group.long 0x140++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 11" group.long 0x160++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 12" group.long 0x180++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 13" group.long 0x1A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 14" group.long 0x1C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 15" group.long 0x1E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 16" group.long 0x200++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 17" group.long 0x220++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 18" group.long 0x240++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 19" group.long 0x260++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 20" group.long 0x280++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 21" group.long 0x2A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 22" group.long 0x2C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 23" group.long 0x2E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 24" group.long 0x300++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 25" group.long 0x320++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 26" group.long 0x340++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 27" group.long 0x360++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 28" group.long 0x380++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 29" group.long 0x3A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 30" group.long 0x3C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 31" group.long 0x3E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 32" group.long 0x400++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 33" group.long 0x420++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 34" group.long 0x440++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 35" group.long 0x460++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 36" group.long 0x480++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 37" group.long 0x4A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 38" group.long 0x4C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 39" group.long 0x4E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 40" group.long 0x500++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 41" group.long 0x520++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 42" group.long 0x540++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 43" group.long 0x560++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 44" group.long 0x580++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 45" group.long 0x5A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 46" group.long 0x5C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 47" group.long 0x5E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 48" group.long 0x600++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 49" group.long 0x620++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 50" group.long 0x640++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 51" group.long 0x660++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 52" group.long 0x680++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 53" group.long 0x6A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 54" group.long 0x6C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 55" group.long 0x6E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 56" group.long 0x700++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 57" group.long 0x720++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 58" group.long 0x740++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 59" group.long 0x760++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 60" group.long 0x780++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 61" group.long 0x7A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 62" group.long 0x7C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 63" group.long 0x7E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 64" group.long 0x800++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 65" group.long 0x820++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 66" group.long 0x840++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 67" group.long 0x860++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 68" group.long 0x880++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 69" group.long 0x8A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 70" group.long 0x8C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 71" group.long 0x8E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 72" group.long 0x900++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 73" group.long 0x920++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 74" group.long 0x940++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 75" group.long 0x960++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 76" group.long 0x980++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 77" group.long 0x9A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 78" group.long 0x9C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 79" group.long 0x9E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 80" group.long 0xA00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 81" group.long 0xA20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 82" group.long 0xA40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 83" group.long 0xA60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 84" group.long 0xA80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 85" group.long 0xAA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 86" group.long 0xAC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 87" group.long 0xAE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 88" group.long 0xB00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 89" group.long 0xB20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 90" group.long 0xB40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 91" group.long 0xB60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 92" group.long 0xB80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 93" group.long 0xBA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 94" group.long 0xBC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 95" group.long 0xBE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 96" group.long 0xC00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 97" group.long 0xC20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 98" group.long 0xC40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 99" group.long 0xC60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 100" group.long 0xC80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 101" group.long 0xCA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 102" group.long 0xCC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 103" group.long 0xCE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 104" group.long 0xD00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 105" group.long 0xD20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 106" group.long 0xD40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 107" group.long 0xD60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 108" group.long 0xD80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 109" group.long 0xDA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 110" group.long 0xDC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 111" group.long 0xDE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 112" group.long 0xE00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 113" group.long 0xE20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 114" group.long 0xE40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 115" group.long 0xE60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 116" group.long 0xE80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 117" group.long 0xEA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 118" group.long 0xEC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 119" group.long 0xEE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 120" group.long 0xF00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 121" group.long 0xF20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 122" group.long 0xF40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 123" group.long 0xF60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 124" group.long 0xF80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 125" group.long 0xFA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 126" group.long 0xFC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 127" group.long 0xFE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 128" group.long 0x1000++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 129" group.long 0x1020++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 130" group.long 0x1040++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 131" group.long 0x1060++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 132" group.long 0x1080++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 133" group.long 0x10A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 134" group.long 0x10C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 135" group.long 0x10E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 136" group.long 0x1100++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 137" group.long 0x1120++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 138" group.long 0x1140++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 139" group.long 0x1160++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 140" group.long 0x1180++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 141" group.long 0x11A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 142" group.long 0x11C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 143" group.long 0x11E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 144" group.long 0x1200++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 145" group.long 0x1220++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 146" group.long 0x1240++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 147" group.long 0x1260++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 148" group.long 0x1280++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 149" group.long 0x12A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 150" group.long 0x12C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 151" group.long 0x12E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 152" group.long 0x1300++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 153" group.long 0x1320++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 154" group.long 0x1340++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 155" group.long 0x1360++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 156" group.long 0x1380++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 157" group.long 0x13A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 158" group.long 0x13C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 159" group.long 0x13E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 160" group.long 0x1400++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 161" group.long 0x1420++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 162" group.long 0x1440++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 163" group.long 0x1460++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 164" group.long 0x1480++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 165" group.long 0x14A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 166" group.long 0x14C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 167" group.long 0x14E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 168" group.long 0x1500++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 169" group.long 0x1520++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 170" group.long 0x1540++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 171" group.long 0x1560++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 172" group.long 0x1580++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 173" group.long 0x15A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 174" group.long 0x15C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 175" group.long 0x15E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 176" group.long 0x1600++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 177" group.long 0x1620++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 178" group.long 0x1640++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 179" group.long 0x1660++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 180" group.long 0x1680++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 181" group.long 0x16A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 182" group.long 0x16C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 183" group.long 0x16E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 184" group.long 0x1700++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 185" group.long 0x1720++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 186" group.long 0x1740++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 187" group.long 0x1760++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 188" group.long 0x1780++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 189" group.long 0x17A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 190" group.long 0x17C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 191" group.long 0x17E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 192" group.long 0x1800++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 193" group.long 0x1820++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 194" group.long 0x1840++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 195" group.long 0x1860++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 196" group.long 0x1880++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 197" group.long 0x18A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 198" group.long 0x18C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 199" group.long 0x18E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 200" group.long 0x1900++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 201" group.long 0x1920++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 202" group.long 0x1940++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 203" group.long 0x1960++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 204" group.long 0x1980++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 205" group.long 0x19A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 206" group.long 0x19C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 207" group.long 0x19E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 208" group.long 0x1A00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 209" group.long 0x1A20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 210" group.long 0x1A40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 211" group.long 0x1A60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 212" group.long 0x1A80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 213" group.long 0x1AA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 214" group.long 0x1AC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 215" group.long 0x1AE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 216" group.long 0x1B00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 217" group.long 0x1B20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 218" group.long 0x1B40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 219" group.long 0x1B60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 220" group.long 0x1B80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 221" group.long 0x1BA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 222" group.long 0x1BC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 223" group.long 0x1BE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 224" group.long 0x1C00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 225" group.long 0x1C20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 226" group.long 0x1C40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 227" group.long 0x1C60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 228" group.long 0x1C80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 229" group.long 0x1CA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 230" group.long 0x1CC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 231" group.long 0x1CE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 232" group.long 0x1D00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 233" group.long 0x1D20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 234" group.long 0x1D40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 235" group.long 0x1D60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 236" group.long 0x1D80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 237" group.long 0x1DA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 238" group.long 0x1DC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 239" group.long 0x1DE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 240" group.long 0x1E00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 241" group.long 0x1E20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 242" group.long 0x1E40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 243" group.long 0x1E60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 244" group.long 0x1E80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 245" group.long 0x1EA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 246" group.long 0x1EC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 247" group.long 0x1EE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 248" group.long 0x1F00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 249" group.long 0x1F20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 250" group.long 0x1F40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 251" group.long 0x1F60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 252" group.long 0x1F80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 253" group.long 0x1FA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 254" group.long 0x1FC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 255" group.long 0x1FE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end width 0xb tree.end tree.open "EDMA3 Channel Controller Registers" base asd:0x01c00000 tree "Global Registers" width 10. rgroup.long 0x00++0x7 line.long 0x00 "PID,Peripheral Identification Register" line.long 0x04 "CCCFG,EDMA3CC Configuration Register" bitfld.long 0x04 25. " MP_EXIST ,Memory protection existence" "Not supported,?..." bitfld.long 0x04 24. " CHMAP_EXIST ,Channel mapping existence" "Not supported,?..." textline " " bitfld.long 0x04 20.--21. " NUM_REGN ,Number of shadow regions" "Reserved,Reserved,Reserved,8" bitfld.long 0x04 16.--18. " NUM_EVQUE ,Number of queues / number of TCs" "Reserved,Reserved,Reserved,4,?..." textline " " bitfld.long 0x04 12.--14. " NUM_PAENTRY ,Number of PaRAM sets" "Reserved,Reserved,Reserved,256,?..." bitfld.long 0x04 8.--10. " NUM_INTCH ,Number of interrupt channels" "Reserved,Reserved,Reserved,Reserved,64,?..." textline " " bitfld.long 0x04 4.--6. " NUM_QDMACH ,Number of QDMA channels" "Reserved,Reserved,Reserved,Reserved,8,?..." bitfld.long 0x04 0.--2. " NUM_DMACH ,Number of DMA channels" "Reserved,Reserved,Reserved,Reserved,Reserved,64 channels,?..." tree "QDMA Channels Map Registers" group.long 0x200++0x1f line.long 0x0 "QCHMAP0,QDMA Channel 0 Map Register" hexmask.long.word 0x0 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 0" hexmask.long.byte 0x0 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0x4 "QCHMAP1,QDMA Channel 1 Map Register" hexmask.long.word 0x4 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 1" hexmask.long.byte 0x4 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0x8 "QCHMAP2,QDMA Channel 2 Map Register" hexmask.long.word 0x8 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 2" hexmask.long.byte 0x8 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0xC "QCHMAP3,QDMA Channel 3 Map Register" hexmask.long.word 0xC 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 3" hexmask.long.byte 0xC 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0x10 "QCHMAP4,QDMA Channel 4 Map Register" hexmask.long.word 0x10 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 4" hexmask.long.byte 0x10 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0x14 "QCHMAP5,QDMA Channel 5 Map Register" hexmask.long.word 0x14 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 5" hexmask.long.byte 0x14 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0x18 "QCHMAP6,QDMA Channel 6 Map Register" hexmask.long.word 0x18 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 6" hexmask.long.byte 0x18 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" line.long 0x1C "QCHMAP7,QDMA Channel 7 Map Register" hexmask.long.word 0x1C 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 7" hexmask.long.byte 0x1C 2.--4. 1. " TRWORD ,Specific PaRAM entry or the trigger word in the PaRAM set pointed to by PAENTRY" tree.end tree "DMA Channels Queue Number Registers" group.long 0x240++0x1f line.long 0x00 "DMAQNUM0,DMA Channel 0 Queue Number Registers" bitfld.long 0x00 28.--30. " E7 ,DMA queue number (VPSS: EVT4)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 24.--26. " E6 ,DMA queue number (VPSS: EVT3)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 20.--22. " E5 ,DMA queue number (VPSS: EVT2)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 16.--18. " E4 ,DMA queue number (VPSS: EVT1)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x00 12.--14. " E3 ,DMA queue number (McBSP: REVT/VoiceCodec: VCREVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 8.--10. " E2 ,DMA queue number (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 4.--6. " E1 ,DMA queue number (TIMER3 TEVT7)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 0.--2. " E0 ,DMA queue number (TIMER3: TEVT6)" "Q0,Q1,Q2,Q3,?..." line.long 0x04 "DMAQNUM1,DMA Channel 1 Queue Number Registers" bitfld.long 0x04 28.--30. " E15 ,DMA queue number (SPI1: SPI1REVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x04 24.--26. " E14 ,DMA queue number (SPI1: SPI1XEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x04 20.--22. " E13 ,DMA queue number (MJCP: SEQINT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x04 16.--18. " E12 ,DMA queue number (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x04 12.--14. " E11 ,DMA queue number (SPI2: SPI2REVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x04 8.--10. " E10 ,DMA queue number (SPI2: SPI2XEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x04 4.--6. " E9 ,DMA queue number (TIMER2: TEVT5)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x04 0.--2. " E8 ,DMA queue number (TIMER2: TEVT4)" "Q0,Q1,Q2,Q3,?..." line.long 0x08 "DMAQNUM2,DMA Channel 2 Queue Number Registers" bitfld.long 0x08 28.--30. " E23 ,DMA queue number (TIMER4: TEVT9)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x08 24.--26. " E22 ,DMA queue number (TIMER4: TEVT8)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x08 20.--22. " E21 ,DMA queue number (UART1: UTXEVT1)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x08 16.--18. " E20 ,DMA queue number (UART1: URXEVT1)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x08 12.--14. " E19 ,DMA queue number (UART0: UTXEVT0/SPI3: SPI3REVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x08 8.--10. " E18 ,DMA queue number (UART0: URXEVT0/SPI3: SPI3XEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x08 4.--6. " E17 ,DMA queue number (SPI0: SPI0REVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x08 0.--2. " E16 ,DMA queue number (SPI0: SPI0XEVT)" "Q0,Q1,Q2,Q3,?..." line.long 0x0c "DMAQNUM3,DMA Channel 3 Queue Number Registers" bitfld.long 0x0c 28.--30. " E31 ,DMA queue number (MMC1TXEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x0c 24.--26. " E30 ,DMA queue number (MMC1RXEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x0c 20.--22. " E29 ,DMA queue number (I2C: ICXEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x0c 16.--18. " E28 ,DMA queue number (I2C: ICREVT)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x0c 12.--14. " E27 ,DMA queue number (MMC0TXEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x0c 8.--10. " E26 ,DMA queue number (MMC0RXEVT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x0c 4.--6. " E25 ,DMA queue number (GPIO: GPINT9)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x0c 0.--2. " E24 ,DMA queue number (RTOEVT)" "Q0,Q1,Q2,Q3,?..." line.long 0x10 "DMAQNUM4,DMA Channel 4 Queue Number Registers" bitfld.long 0x10 28.--30. " E39 ,DMA queue number (GPIO:GPINT7)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x10 24.--26. " E38 ,DMA queue number (GPIO:GPINT6)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x10 20.--22. " E37 ,DMA queue number (GPIO:GPINT5)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x10 16.--18. " E36 ,DMA queue number (GPIO:GPINT4)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x10 12.--14. " E35 ,DMA queue number (GPIO:GPINT3)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x10 8.--10. " E34 ,DMA queue number (GPIO:GPINT2)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x10 4.--6. " E33 ,DMA queue number (GPIO: GPINT1)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x10 0.--2. " E32 ,DMA queue number (GPIO:GPINT0)" "Q0,Q1,Q2,Q3,?..." line.long 0x14 "DMAQNUM5,DMA Channel 5 Queue Number Registers" bitfld.long 0x14 28.--30. " E47 ,DMA queue number (GPIO: GPINT8)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x14 24.--26. " E46 ,DMA queue number (ADC: ADINT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x14 20.--22. " E45 ,DMA queue number (GPIO: GPINT15)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x14 16.--18. " E44 ,DMA queue number (GPIO: GPINT14)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x14 12.--14. " E43 ,DMA queue number (GPIO: GPINT13/EMACMISCPULSE)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x14 8.--10. " E42 ,DMA queue number (GPIO: GPINT12/EMACTXPULSE)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x14 4.--6. " E41 ,DMA queue number (GPIO: GPINT11/EMACRXPULSE)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x14 0.--2. " E40 ,DMA queue number (GPIO: GPINT10/EMACRXTHREESH)" "Q0,Q1,Q2,Q3,?..." line.long 0x18 "DMAQNUM6,DMA Channel 6 Queue Number Registers" bitfld.long 0x18 28.--30. " E55 ,DMA queue number (PWM3/HDVICP(6): CP_UNDEF)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x18 24.--26. " E54 ,DMA queue number (PWM2/MJCP: NSFINT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x18 20.--22. " E53 ,DMA queue number (PWM1/MJCP: IMX1INT)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x18 16.--18. " E52 ,DMA queue number (PWM0)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x18 12.--14. " E51 ,DMA queue number (TIMER1: TEVT3)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x18 8.--10. " E50 ,DMA queue number (TIMER1: TEVT2)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x18 4.--6. " E49 ,DMA queue number (TIMER0: TEVT1)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x18 0.--2. " E48 ,DMA queue number (TIMER0: TEVT0)" "Q0,Q1,Q2,Q3,?..." line.long 0x1c "DMAQNUM7,DMA Channel 7 Queue Number Registers" bitfld.long 0x1c 28.--30. " E63 ,DMA queue number (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x1c 24.--26. " E62 ,DMA queue number (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x1c 20.--22. " E61 ,DMA queue number (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x1c 16.--18. " E60 ,DMA queue number (MJCP: BPSINT/HDVICP(2): CP_BS)" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x1c 12.--14. " E59 ,DMA queue number (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x1c 8.--10. " E58 ,DMA queue number (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x1c 4.--6. " E57 ,DMA queue number (MJCP: BIMINT/HDVICP(8): CP_ME)" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x1c 0.--2. " E56 ,DMA queue number (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Q0,Q1,Q2,Q3,?..." tree.end group.long 0x260++0x3 line.long 0x00 "QDMAQNUM,QDMA Channel Queue Number Register" bitfld.long 0x00 28.--30. " E7 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 24.--26. " E6 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 20.--22. " E5 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 16.--18. " E4 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." textline " " bitfld.long 0x00 12.--14. " E3 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 8.--10. " E2 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 4.--6. " E1 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." bitfld.long 0x00 0.--2. " E0 ,QDMA queue number" "Q0,Q1,Q2,Q3,?..." group.long 0x284++0x3 line.long 0x00 "QUEPRI,Queue Priority Register" bitfld.long 0x00 12.--14. " PRIQ3 ,Priority level for queue 3" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 8.--10. " PRIQ2 ,Priority level for queue 2" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 4.--6. " PRIQ1 ,Priority level for queue 1" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 0.--2. " PRIQ0 ,Priority level for queue 0" "0(highest),1,2,3,4,5,6,7(lowest)" width 0xb tree.end tree "Error Registers" width 10. rgroup.long 0x300++0x7 line.long 0x00 "EMR,Event Missed Register" bitfld.long 0x00 31. " E31 ,Channel 31 event missed (MMC1TXEVT)" "Not missed,Missed" bitfld.long 0x00 30. " E30 ,Channel 30 event missed (MMC1RXEVT)" "Not missed,Missed" bitfld.long 0x00 29. " E29 ,Channel 29 event missed (I2C: ICXEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 28. " E28 ,Channel 28 event missed (I2C: ICREVT)" "Not missed,Missed" bitfld.long 0x00 27. " E27 ,Channel 27 event missed (MMC0TXEVT)" "Not missed,Missed" bitfld.long 0x00 26. " E26 ,Channel 26 event missed (MMC0RXEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 25. " E25 ,Channel 25 event missed (GPIO: GPINT9)" "Not missed,Missed" bitfld.long 0x00 23. " E24 ,Channel 24 event missed (RTOEVT)" "Not missed,Missed" bitfld.long 0x00 23. " E23 ,Channel 23 event missed (TIMER4: TEVT9)" "Not missed,Missed" textline " " bitfld.long 0x00 22. " E22 ,Channel 22 event missed (TIMER4: TEVT8)" "Not missed,Missed" bitfld.long 0x00 21. " E21 ,Channel 21 event missed (UART1: UTXEVT1)" "Not missed,Missed" bitfld.long 0x00 20. " E20 ,Channel 20 event missed (UART1: URXEVT1)" "Not missed,Missed" textline " " bitfld.long 0x00 19. " E19 ,Channel 19 event missed (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not missed,Missed" bitfld.long 0x00 18. " E18 ,Channel 18 event missed (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not missed,Missed" bitfld.long 0x00 17. " E17 ,Channel 17 event missed (SPI0: SPI0REVT)" "Not missed,Missed" textline " " bitfld.long 0x00 16. " E16 ,Channel 16 event missed (SPI0: SPI0XEVT)" "Not missed,Missed" bitfld.long 0x00 15. " E15 ,Channel 15 event missed (SPI1: SPI1REVT)" "Not missed,Missed" bitfld.long 0x00 14. " E14 ,Channel 14 event missed (SPI1: SPI1XEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 13. " E13 ,Channel 13 event missed (MJCP: SEQINT)" "Not missed,Missed" bitfld.long 0x00 12. " E12 ,Channel 12 event missed (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not missed,Missed" bitfld.long 0x00 11. " E11 ,Channel 11 event missed (SPI2: SPI2REVT)" "Not missed,Missed" textline " " bitfld.long 0x00 10. " E10 ,Channel 10 event missed (SPI2: SPI2XEVT)" "Not missed,Missed" bitfld.long 0x00 9. " E9 ,Channel 9 event missed (TIMER2: TEVT5)" "Not missed,Missed" bitfld.long 0x00 8. " E8 ,Channel 8 event missed (TIMER2: TEVT4)" "Not missed,Missed" textline " " bitfld.long 0x00 7. " E7 ,Channel 7 event missed (VPSS: EVT4)" "Not missed,Missed" bitfld.long 0x00 6. " E6 ,Channel 6 event missed (VPSS: EVT3)" "Not missed,Missed" bitfld.long 0x00 5. " E5 ,Channel 5 event missed (VPSS: EVT2)" "Not missed,Missed" textline " " bitfld.long 0x00 4. " E4 ,Channel 4 event missed (VPSS: EVT1)" "Not missed,Missed" bitfld.long 0x00 3. " E3 ,Channel 3 event missed (MCBSP: REVT/VoiceCodec: VCREVT)" "Not missed,Missed" bitfld.long 0x00 2. " E2 ,Channel 2 event missed (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 1. " E1 ,Channel 1 event missed (TIMER3 TEVT7)" "Not missed,Missed" bitfld.long 0x00 0. " E0 ,Channel 0 event missed (TIMER3: TEVT6)" "Not missed,Missed" line.long 0x04 "EMRH,Event Missed Register High" bitfld.long 0x04 31. " E63 ,Channel 63 event missed (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not missed,Missed" bitfld.long 0x04 30. " E62 ,Channel 62 event missed (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not missed,Missed" bitfld.long 0x04 29. " E61 ,Channel 61 event missed (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not missed,Missed" textline " " bitfld.long 0x04 28. " E60 ,Channel 60 event missed (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not missed,Missed" bitfld.long 0x04 27. " E59 ,Channel 59 event missed (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not missed,Missed" bitfld.long 0x04 26. " E58 ,Channel 58 event missed (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not missed,Missed" textline " " bitfld.long 0x04 25. " E57 ,Channel 57 event missed (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not missed,Missed" bitfld.long 0x04 23. " E56 ,Channel 56 event missed (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not missed,Missed" bitfld.long 0x04 23. " E55 ,Channel 55 event missed (PWM3/HDVICP(6): CP_UNDEF)" "Not missed,Missed" textline " " bitfld.long 0x04 22. " E54 ,Channel 54 event missed (PWM2/MJCP: NSFINT)" "Not missed,Missed" bitfld.long 0x04 21. " E53 ,Channel 53 event missed (PWM1/MJCP: IMX1INT)" "Not missed,Missed" bitfld.long 0x04 20. " E52 ,Channel 52 event missed (PWM0)" "Not missed,Missed" textline " " bitfld.long 0x04 19. " E51 ,Channel 51 event missed (TIMER1: TEVT3)" "Not missed,Missed" bitfld.long 0x04 18. " E50 ,Channel 50 event missed (TIMER1: TEVT2)" "Not missed,Missed" bitfld.long 0x04 17. " E49 ,Channel 49 event missed (TIMER0: TEVT1)" "Not missed,Missed" textline " " bitfld.long 0x04 16. " E48 ,Channel 48 event missed (TIMER0: TEVT0)" "Not missed,Missed" bitfld.long 0x04 15. " E47 ,Channel 47 event missed (GPIO: GPINT8)" "Not missed,Missed" bitfld.long 0x04 14. " E46 ,Channel 46 event missed (ADC: ADINT)" "Not missed,Missed" textline " " bitfld.long 0x04 13. " E45 ,Channel 45 event missed (GPIO: GPINT15)" "Not missed,Missed" bitfld.long 0x04 12. " E44 ,Channel 44 event missed (GPIO: GPINT14)" "Not missed,Missed" bitfld.long 0x04 11. " E43 ,Channel 43 event missed (GPIO: GPINT13/EMACMISCPULSE)" "Not missed,Missed" textline " " bitfld.long 0x04 10. " E42 ,Channel 42 event missed (GPIO: GPINT12/EMACTXPULSE)" "Not missed,Missed" bitfld.long 0x04 9. " E41 ,Channel 41 event missed (GPIO: GPINT11/EMACRXPULSE)" "Not missed,Missed" bitfld.long 0x04 8. " E40 ,Channel 40 event missed (GPIO: GPINT10/EMACRXTHREESH)" "Not missed,Missed" textline " " bitfld.long 0x04 7. " E39 ,Channel 39 event missed (GPIO:GPINT7)" "Not missed,Missed" bitfld.long 0x04 6. " E38 ,Channel 38 event missed (GPIO:GPINT6)" "Not missed,Missed" bitfld.long 0x04 5. " E37 ,Channel 37 event missed (GPIO:GPINT5)" "Not missed,Missed" textline " " bitfld.long 0x04 4. " E36 ,Channel 36 event missed (GPIO:GPINT4)" "Not missed,Missed" bitfld.long 0x04 3. " E35 ,Channel 35 event missed (GPIO:GPINT3)" "Not missed,Missed" bitfld.long 0x04 2. " E34 ,Channel 34 event missed (GPIO:GPINT2)" "Not missed,Missed" textline " " bitfld.long 0x04 1. " E33 ,Channel 33 event missed (GPIO: GPINT1)" "Not missed,Missed" bitfld.long 0x04 0. " E32 ,Channel 32 event missed (GPIO:GPINT0)" "Not missed,Missed" wgroup.long 0x308++0x7 line.long 0x00 "EMCR,Event Missed Clear Register" bitfld.long 0x00 31. " E31 ,Event missed 31 clear (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Event missed 30 clear (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Event missed 29 clear (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Event missed 28 clear (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Event missed 27 clear (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Event missed 26 clear (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Event missed 25 clear (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Event missed 24 clear (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Event missed 23 clear (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Event missed 22 clear (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Event missed 21 clear (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Event missed 20 clear (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Event missed 19 clear (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Event missed 18 clear (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Event missed 17 clear (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Event missed 16 clear (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Event missed 15 clear (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Event missed 14 clear (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Event missed 13 clear (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Event missed 12 clear (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Event missed 11 clear (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Event missed 10 clear (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Event missed 9 clear (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Event missed 8 clear (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Event missed 7 clear (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Event missed 6 clear (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Event missed 5 clear (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Event missed 4 clear (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Event missed 3 clear (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Event missed 2 clear (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Event missed 1 clear (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Event missed 0 clear (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "EMCRH,Event Missed Clear Register High" bitfld.long 0x04 31. " E63 ,Event missed 63 clear (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Event missed 62 clear (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Event missed 61 clear (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Event missed 60 clear (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Event missed 59 clear (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Event missed 58 clear (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Event missed 57 clear (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Event missed 56 clear (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Event missed 55 clear (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Event missed 54 clear (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Event missed 53 clear (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Event missed 52 clear (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Event missed 51 clear (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Event missed 50 clear (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Event missed 49 clear (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Event missed 48 clear (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Event missed 47 clear (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Event missed 46 clear (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Event missed 45 clear (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Event missed 44 clear (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Event missed 43 clear (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Event missed 42 clear (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Event missed 41 clear (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Event missed 40 clear (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Event missed 39 clear (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Event missed 38 clear (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Event missed 37 clear (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Event missed 36 clear (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Event missed 35 clear (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Event missed 34 clear (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Event missed 33 clear (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Event missed 32 clear (GPIO:GPINT0)" "No effect,Clear" rgroup.long 0x310++0x3 line.long 0x00 "QEMR,QDMA Event Missed Register" bitfld.long 0x00 7. " E7 ,Channel 7 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 6. " E6 ,Channel 6 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 5. " E5 ,Channel 5 QDMA event missed" "Not missed,Missed" textline " " bitfld.long 0x00 4. " E4 ,Channel 4 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 3. " E3 ,Channel 3 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 2. " E2 ,Channel 2 QDMA event missed" "Not missed,Missed" textline " " bitfld.long 0x00 1. " E1 ,Channel 1 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 0. " E0 ,Channel 0 QDMA event missed" "Not missed,Missed" wgroup.long 0x314++0x3 line.long 0x00 "QEMCR,QDMA Event Missed Clear Register" bitfld.long 0x00 7. " E7 ,QDMA event 7 missed clear" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA event 6 missed clear" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA event 5 missed clear" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,QDMA event 4 missed clear" "No effect,Clear" bitfld.long 0x00 3. " E3 ,QDMA event 3 missed clear" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA event 2 missed clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,QDMA event 1 missed clear" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA event 0 missed clear" "No effect,Clear" rgroup.long 0x318++0x3 line.long 0x00 "CCERR,EDMA3CC Error Register" bitfld.long 0x00 16. " TCCERR ,Transfer completion code error" "Not reached,Reached" textline " " bitfld.long 0x00 3. " QTHRXCD3 ,Queue threshold error for queue 3" "Not exceeded,Exceeded" bitfld.long 0x00 2. " QTHRXCD2 ,Queue threshold error for queue 2" "Not exceeded,Exceeded" textline " " bitfld.long 0x00 1. " QTHRXCD1 ,Queue threshold error for queue 1" "Not exceeded,Exceeded" bitfld.long 0x00 0. " QTHRXCD0 ,Queue threshold error for queue 0" "Not exceeded,Exceeded" wgroup.long 0x31c++0x3 line.long 0x00 "CCERRCLR,EDMA3CC Error Clear Register" bitfld.long 0x00 16. " TCCERR ,Transfer completion code error clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " QTHRXCD3 ,Queue threshold error clear for queue 3" "No effect,Clear" bitfld.long 0x00 0. " QTHRXCD2 ,Queue threshold error clear for queue 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " QTHRXCD1 ,Queue threshold error clear for queue 1" "No effect,Clear" bitfld.long 0x00 0. " QTHRXCD0 ,Queue threshold error clear for queue 0" "No effect,Clear" wgroup.long 0x320++0x3 line.long 0x00 "EEVAL,Error Evaluation Register" bitfld.long 0x00 0. " EVAL ,Error interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "Region Access Enable Registers" width 8. group.long 0x340++0x7 "Region 0" line.long 0x00 "DRAE0,DMA Region Access Enable Register for Region 0" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 0" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 0" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 0" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 0" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 0" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 0" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 0" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 0" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 0" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 0" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 0" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 0" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 0" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 0" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 0" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 0" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 0" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 0" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 0" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 0" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 0" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 0" "Not allowed,Allowed" line.long 0x04 "DRAEH0,DMA Region Access Enabled Register High for Region 0" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 0" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 0" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 0" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 0" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 0" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 0" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 0" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 0" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 0" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 0" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 0" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 0" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 0" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 0" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 0" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 0" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 0" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 0" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 0" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 0" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 0" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 0" "Not allowed,Allowed" group.long (0x380)++0x3 line.long 0x00 "QRAE0,QDMA Region Access Enable Register for Region 0" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 0" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 0" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 0" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 0" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 0" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 0" "Not allowed,Allowed" group.long 0x348++0x7 "Region 1" line.long 0x00 "DRAE1,DMA Region Access Enable Register for Region 1" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 1" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 1" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 1" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 1" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 1" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 1" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 1" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 1" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 1" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 1" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 1" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 1" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 1" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 1" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 1" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 1" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 1" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 1" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 1" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 1" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 1" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 1" "Not allowed,Allowed" line.long 0x04 "DRAEH1,DMA Region Access Enabled Register High for Region 1" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 1" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 1" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 1" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 1" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 1" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 1" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 1" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 1" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 1" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 1" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 1" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 1" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 1" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 1" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 1" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 1" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 1" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 1" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 1" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 1" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 1" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 1" "Not allowed,Allowed" group.long (0x384)++0x3 line.long 0x00 "QRAE1,QDMA Region Access Enable Register for Region 1" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 1" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 1" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 1" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 1" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 1" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 1" "Not allowed,Allowed" group.long 0x350++0x7 "Region 2" line.long 0x00 "DRAE2,DMA Region Access Enable Register for Region 2" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 2" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 2" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 2" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 2" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 2" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 2" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 2" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 2" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 2" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 2" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 2" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 2" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 2" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 2" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 2" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 2" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 2" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 2" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 2" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 2" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 2" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 2" "Not allowed,Allowed" line.long 0x04 "DRAEH2,DMA Region Access Enabled Register High for Region 2" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 2" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 2" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 2" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 2" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 2" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 2" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 2" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 2" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 2" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 2" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 2" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 2" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 2" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 2" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 2" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 2" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 2" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 2" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 2" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 2" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 2" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 2" "Not allowed,Allowed" group.long (0x388)++0x3 line.long 0x00 "QRAE2,QDMA Region Access Enable Register for Region 2" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 2" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 2" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 2" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 2" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 2" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 2" "Not allowed,Allowed" group.long 0x358++0x7 "Region 3" line.long 0x00 "DRAE3,DMA Region Access Enable Register for Region 3" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 3" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 3" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 3" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 3" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 3" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 3" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 3" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 3" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 3" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 3" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 3" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 3" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 3" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 3" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 3" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 3" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 3" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 3" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 3" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 3" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 3" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 3" "Not allowed,Allowed" line.long 0x04 "DRAEH3,DMA Region Access Enabled Register High for Region 3" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 3" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 3" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 3" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 3" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 3" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 3" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 3" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 3" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 3" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 3" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 3" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 3" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 3" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 3" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 3" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 3" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 3" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 3" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 3" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 3" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 3" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 3" "Not allowed,Allowed" group.long (0x38C)++0x3 line.long 0x00 "QRAE3,QDMA Region Access Enable Register for Region 3" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 3" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 3" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 3" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 3" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 3" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 3" "Not allowed,Allowed" group.long 0x360++0x7 "Region 4" line.long 0x00 "DRAE4,DMA Region Access Enable Register for Region 4" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 4" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 4" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 4" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 4" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 4" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 4" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 4" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 4" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 4" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 4" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 4" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 4" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 4" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 4" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 4" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 4" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 4" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 4" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 4" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 4" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 4" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 4" "Not allowed,Allowed" line.long 0x04 "DRAEH4,DMA Region Access Enabled Register High for Region 4" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 4" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 4" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 4" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 4" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 4" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 4" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 4" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 4" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 4" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 4" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 4" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 4" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 4" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 4" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 4" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 4" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 4" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 4" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 4" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 4" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 4" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 4" "Not allowed,Allowed" group.long (0x390)++0x3 line.long 0x00 "QRAE4,QDMA Region Access Enable Register for Region 4" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 4" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 4" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 4" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 4" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 4" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 4" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 4" "Not allowed,Allowed" group.long 0x368++0x7 "Region 5" line.long 0x00 "DRAE5,DMA Region Access Enable Register for Region 5" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 5" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 5" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 5" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 5" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 5" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 5" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 5" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 5" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 5" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 5" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 5" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 5" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 5" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 5" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 5" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 5" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 5" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 5" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 5" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 5" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 5" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 5" "Not allowed,Allowed" line.long 0x04 "DRAEH5,DMA Region Access Enabled Register High for Region 5" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 5" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 5" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 5" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 5" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 5" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 5" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 5" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 5" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 5" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 5" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 5" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 5" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 5" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 5" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 5" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 5" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 5" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 5" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 5" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 5" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 5" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 5" "Not allowed,Allowed" group.long (0x394)++0x3 line.long 0x00 "QRAE5,QDMA Region Access Enable Register for Region 5" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 5" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 5" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 5" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 5" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 5" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 5" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 5" "Not allowed,Allowed" group.long 0x370++0x7 "Region 6" line.long 0x00 "DRAE6,DMA Region Access Enable Register for Region 6" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 6" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 6" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 6" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 6" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 6" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 6" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 6" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 6" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 6" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 6" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 6" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 6" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 6" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 6" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 6" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 6" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 6" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 6" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 6" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 6" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 6" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 6" "Not allowed,Allowed" line.long 0x04 "DRAEH6,DMA Region Access Enabled Register High for Region 6" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 6" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 6" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 6" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 6" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 6" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 6" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 6" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 6" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 6" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 6" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 6" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 6" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 6" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 6" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 6" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 6" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 6" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 6" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 6" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 6" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 6" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 6" "Not allowed,Allowed" group.long (0x398)++0x3 line.long 0x00 "QRAE6,QDMA Region Access Enable Register for Region 6" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 6" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 6" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 6" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 6" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 6" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 6" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 6" "Not allowed,Allowed" group.long 0x378++0x7 "Region 7" line.long 0x00 "DRAE7,DMA Region Access Enable Register for Region 7" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 7" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 7" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 7" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 7" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 7" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 7" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 7" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 7" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 7" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 7" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 7" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 7" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 7" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 7" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 7" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 7" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 7" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 7" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 7" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 7" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 7" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 7" "Not allowed,Allowed" line.long 0x04 "DRAEH7,DMA Region Access Enabled Register High for Region 7" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 7" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 7" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 7" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 7" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 7" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 7" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 7" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 7" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 7" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 7" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 7" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 7" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 7" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 7" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 7" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 7" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 7" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 7" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 7" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 7" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 7" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 7" "Not allowed,Allowed" group.long (0x39C)++0x3 line.long 0x00 "QRAE7,QDMA Region Access Enable Register for Region 7" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 7" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 7" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 7" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 7" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 7" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 7" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 7" "Not allowed,Allowed" width 0xb tree.end tree "Status/Debug Visibility Registers" width 9. rgroup.long 0x400++0x3f "Event Queue 0 Registers" line.long 0x0 "Q0E0 ,Event Queue Entry 0 Register" bitfld.long 0x0 6.--7. " ETYPE ,Event trigger type for entry 0 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x0 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x4 "Q0E1 ,Event Queue Entry 1 Register" bitfld.long 0x4 6.--7. " ETYPE ,Event trigger type for entry 1 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x4 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x8 "Q0E2 ,Event Queue Entry 2 Register" bitfld.long 0x8 6.--7. " ETYPE ,Event trigger type for entry 2 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x8 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0xC "Q0E3 ,Event Queue Entry 3 Register" bitfld.long 0xC 6.--7. " ETYPE ,Event trigger type for entry 3 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0xC 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x10 "Q0E4 ,Event Queue Entry 4 Register" bitfld.long 0x10 6.--7. " ETYPE ,Event trigger type for entry 4 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x10 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x14 "Q0E5 ,Event Queue Entry 5 Register" bitfld.long 0x14 6.--7. " ETYPE ,Event trigger type for entry 5 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x14 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x18 "Q0E6 ,Event Queue Entry 6 Register" bitfld.long 0x18 6.--7. " ETYPE ,Event trigger type for entry 6 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x18 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x1C "Q0E7 ,Event Queue Entry 7 Register" bitfld.long 0x1C 6.--7. " ETYPE ,Event trigger type for entry 7 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x20 "Q0E8 ,Event Queue Entry 8 Register" bitfld.long 0x20 6.--7. " ETYPE ,Event trigger type for entry 8 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x20 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x24 "Q0E9 ,Event Queue Entry 9 Register" bitfld.long 0x24 6.--7. " ETYPE ,Event trigger type for entry 9 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x24 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x28 "Q0E10,Event Queue Entry 10 Register" bitfld.long 0x28 6.--7. " ETYPE ,Event trigger type for entry 10 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x28 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x2C "Q0E11,Event Queue Entry 11 Register" bitfld.long 0x2C 6.--7. " ETYPE ,Event trigger type for entry 11 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x30 "Q0E12,Event Queue Entry 12 Register" bitfld.long 0x30 6.--7. " ETYPE ,Event trigger type for entry 12 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x30 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x34 "Q0E13,Event Queue Entry 13 Register" bitfld.long 0x34 6.--7. " ETYPE ,Event trigger type for entry 13 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x34 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x38 "Q0E14,Event Queue Entry 14 Register" bitfld.long 0x38 6.--7. " ETYPE ,Event trigger type for entry 14 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x38 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x3C "Q0E15,Event Queue Entry 15 Register" bitfld.long 0x3C 6.--7. " ETYPE ,Event trigger type for entry 15 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif rgroup.long 0x440++0x3f "Event Queue 1 Registers" line.long 0x0 "Q1E0 ,Event Queue Entry 0 Register" bitfld.long 0x0 6.--7. " ETYPE ,Event trigger type for entry 0 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x0 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x4 "Q1E1 ,Event Queue Entry 1 Register" bitfld.long 0x4 6.--7. " ETYPE ,Event trigger type for entry 1 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x4 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x8 "Q1E2 ,Event Queue Entry 2 Register" bitfld.long 0x8 6.--7. " ETYPE ,Event trigger type for entry 2 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x8 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0xC "Q1E3 ,Event Queue Entry 3 Register" bitfld.long 0xC 6.--7. " ETYPE ,Event trigger type for entry 3 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0xC 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x10 "Q1E4 ,Event Queue Entry 4 Register" bitfld.long 0x10 6.--7. " ETYPE ,Event trigger type for entry 4 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x10 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x14 "Q1E5 ,Event Queue Entry 5 Register" bitfld.long 0x14 6.--7. " ETYPE ,Event trigger type for entry 5 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x14 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x18 "Q1E6 ,Event Queue Entry 6 Register" bitfld.long 0x18 6.--7. " ETYPE ,Event trigger type for entry 6 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x18 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x1C "Q1E7 ,Event Queue Entry 7 Register" bitfld.long 0x1C 6.--7. " ETYPE ,Event trigger type for entry 7 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x20 "Q1E8 ,Event Queue Entry 8 Register" bitfld.long 0x20 6.--7. " ETYPE ,Event trigger type for entry 8 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x20 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x24 "Q1E9 ,Event Queue Entry 9 Register" bitfld.long 0x24 6.--7. " ETYPE ,Event trigger type for entry 9 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x24 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x28 "Q1E10,Event Queue Entry 10 Register" bitfld.long 0x28 6.--7. " ETYPE ,Event trigger type for entry 10 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x28 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x2C "Q1E11,Event Queue Entry 11 Register" bitfld.long 0x2C 6.--7. " ETYPE ,Event trigger type for entry 11 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x30 "Q1E12,Event Queue Entry 12 Register" bitfld.long 0x30 6.--7. " ETYPE ,Event trigger type for entry 12 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x30 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x34 "Q1E13,Event Queue Entry 13 Register" bitfld.long 0x34 6.--7. " ETYPE ,Event trigger type for entry 13 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x34 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x38 "Q1E14,Event Queue Entry 14 Register" bitfld.long 0x38 6.--7. " ETYPE ,Event trigger type for entry 14 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x38 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x3C "Q1E15,Event Queue Entry 15 Register" bitfld.long 0x3C 6.--7. " ETYPE ,Event trigger type for entry 15 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif sif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x600++0xf "Queue Status Registers" line.long 0x0 "QSTAT0,Queue 0 Status Register" bitfld.long 0x0 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x0 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "QSTAT1,Queue 1 Status Register" bitfld.long 0x4 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x4 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "QSTAT2,Queue 2 Status Register" bitfld.long 0x8 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x8 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x8 8.--12. " NUMVAL ,Number of valid entrier in queue 2" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x8 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "QSTAT3,Queue 3 Status Register" bitfld.long 0xC 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0xC 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0xC 8.--12. " NUMVAL ,Number of valid entrier in queue 3" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0xC 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0x600++0x7 "Queue Status Registers" line.long 0x0 "QSTAT0,Queue 0 Status Register" bitfld.long 0x0 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x0 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "QSTAT1,Queue 1 Status Register" bitfld.long 0x4 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x4 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x620++0x3 line.long 0x00 "QWMTHRA,Queue Watermark Threshold A Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 24.--28. " Q3 ,Queue threshold for queue 3 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." bitfld.long 0x00 16.--20. " Q2 ,Queue threshold for queue 2 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." textline " " endif bitfld.long 0x00 8.--12. " Q1 ,Queue threshold for queue 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." bitfld.long 0x00 0.--4. " Q0 ,Queue threshold for queue 0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." rgroup.long 0x640++0x3 line.long 0x00 "CCSTAT,EDMA3CC Status Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 19. " QUEACTV3 ,Queue 3 active" "Not active,Active" bitfld.long 0x00 18. " QUEACTV2 ,Queue 2 active" "Not active,Active" textline " " endif bitfld.long 0x00 17. " QUEACTV1 ,Queue 1 active" "Not active,Active" bitfld.long 0x00 16. " QUEACTV0 ,Queue 0 active" "Not active,Active" textline " " bitfld.long 0x00 8.--13. " COMPACTV ,Completion request active" "No requests,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4. " ACTV ,Channel controller active" "Idle,Busy" textline " " bitfld.long 0x00 3. " WSTATACTV ,Write status interface active" "Not active,Active" bitfld.long 0x00 2. " TRACTV ,Transfer request active" "Not active,Active" textline " " bitfld.long 0x00 1. " QEVTACTV ,QDMA event active" "Not active,Active" bitfld.long 0x00 0. " EVTACTV ,DMA event active" "Not active,Active" width 0xb tree.end tree "Global Channel Registers" base asd:0x01c01000 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 0 Channel Registers" base asd:0x1C02000 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 1 Channel Registers" base asd:0x1C02200 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 2 Channel Registers" base asd:0x1C02400 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 3 Channel Registers" base asd:0x1C02600 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 4 Channel Registers" base asd:0x1C02800 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 5 Channel Registers" base asd:0x1C02A00 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 6 Channel Registers" base asd:0x1C02C00 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 7 Channel Registers" base asd:0x1C02E00 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31 (MMC1TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30 (MMC1RXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2C: ICXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2C: ICREVT)" "Not asserted,Asserted" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMC0TXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMC0RXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25 (GPIO: GPINT9)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event 24 (RTOEVT)" "Not asserted,Asserted" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (TIMER4: TEVT9)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (TIMER4: TEVT8)" "Not asserted,Asserted" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UART1: UTXEVT1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (UART1: URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPI0: SPI0REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPI0: SPI0XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15 (SPI1: SPI1REVT)" "Not asserted,Asserted" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14 (SPI1: SPI1XEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13 (MJCP: SEQINT)" "Not asserted,Asserted" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not asserted,Asserted" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11 (SPI2: SPI2REVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10 (SPI2: SPI2XEVT)" "Not asserted,Asserted" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event 9 (TIMER2: TEVT5)" "Not asserted,Asserted" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event 8 (TIMER2: TEVT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event 7 (VPSS: EVT4)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event 6 (VPSS: EVT3)" "Not asserted,Asserted" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event 5 (VPSS: EVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event 4 (VPSS: EVT1)" "Not asserted,Asserted" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event 1 (TIMER3 TEVT7)" "Not asserted,Asserted" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event 0 (TIMER3: TEVT6)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not asserted,Asserted" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not asserted,Asserted" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not asserted,Asserted" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not asserted,Asserted" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not asserted,Asserted" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2/MJCP: NSFINT)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1/MJCP: IMX1INT)" "Not asserted,Asserted" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TIMER1: TEVT3)" "Not asserted,Asserted" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TIMER1: TEVT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TIMER0: TEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TIMER0: TEVT0)" "Not asserted,Asserted" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47 (GPIO: GPINT8)" "Not asserted,Asserted" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46 (ADC: ADINT)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45 (GPIO: GPINT15)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPIO: GPINT14)" "Not asserted,Asserted" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPIO:GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPIO:GPINT6)" "Not asserted,Asserted" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPIO:GPINT5)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPIO:GPINT4)" "Not asserted,Asserted" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPIO:GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPIO:GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPIO: GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPIO:GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 31. " E31 ,Chained event for event 31 (MMC1TXEVT)" "No effect,Prioritized" bitfld.long 0x00 30. " E30 ,Chained event for event 30 (MMC1RXEVT)" "No effect,Prioritized" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2C: ICXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2C: ICREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMC0TXEVT)" "No effect,Prioritized" bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMC0RXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 25. " E25 ,Chained event for event 25 (GPIO: GPINT9)" "No effect,Prioritized" bitfld.long 0x00 23. " E24 ,Chained event for event 24 (RTOEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (TIMER4: TEVT9)" "No effect,Prioritized" textline " " bitfld.long 0x00 22. " E22 ,Chained event for event 22 (TIMER4: TEVT8)" "No effect,Prioritized" bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UART1: UTXEVT1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (UART1: URXEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Prioritized" bitfld.long 0x00 18. " E18 ,Chained event for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPI0: SPI0REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPI0: SPI0XEVT)" "No effect,Prioritized" bitfld.long 0x00 15. " E15 ,Chained event for event 15 (SPI1: SPI1REVT)" "No effect,Prioritized" bitfld.long 0x00 14. " E14 ,Chained event for event 14 (SPI1: SPI1XEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 13. " E13 ,Chained event for event 13 (MJCP: SEQINT)" "No effect,Prioritized" bitfld.long 0x00 12. " E12 ,Chained event for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Prioritized" bitfld.long 0x00 11. " E11 ,Chained event for event 11 (SPI2: SPI2REVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 10. " E10 ,Chained event for event 10 (SPI2: SPI2XEVT)" "No effect,Prioritized" bitfld.long 0x00 9. " E9 ,Chained event for event 9 (TIMER2: TEVT5)" "No effect,Prioritized" bitfld.long 0x00 8. " E8 ,Chained event for event 8 (TIMER2: TEVT4)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (VPSS: EVT4)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (VPSS: EVT3)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (VPSS: EVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (VPSS: EVT1)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 1. " E1 ,Chained event for event 1 (TIMER3 TEVT7)" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,Chained event for event 0 (TIMER3: TEVT6)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 31. " E63 ,Chained event for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Prioritized" bitfld.long 0x04 30. " E62 ,Chained event for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Prioritized" bitfld.long 0x04 29. " E61 ,Chained event for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Prioritized" textline " " bitfld.long 0x04 28. " E60 ,Chained event for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Prioritized" bitfld.long 0x04 27. " E59 ,Chained event for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Prioritized" bitfld.long 0x04 26. " E58 ,Chained event for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Prioritized" textline " " bitfld.long 0x04 25. " E57 ,Chained event for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Prioritized" bitfld.long 0x04 23. " E56 ,Chained event for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Prioritized" bitfld.long 0x04 23. " E55 ,Chained event for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Prioritized" textline " " bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2/MJCP: NSFINT)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1/MJCP: IMX1INT)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TIMER1: TEVT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TIMER1: TEVT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TIMER0: TEVT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TIMER0: TEVT0)" "No effect,Prioritized" bitfld.long 0x04 15. " E47 ,Chained event for event 47 (GPIO: GPINT8)" "No effect,Prioritized" bitfld.long 0x04 14. " E46 ,Chained event for event 46 (ADC: ADINT)" "No effect,Prioritized" textline " " bitfld.long 0x04 13. " E45 ,Chained event for event 45 (GPIO: GPINT15)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPIO: GPINT14)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPIO:GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPIO:GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPIO:GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPIO:GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPIO:GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPIO:GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPIO: GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPIO:GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable for event 31 (MMC1TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable for event 30 (MMC1RXEVT)" "Disabled,Enabled" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2C: ICXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2C: ICREVT)" "Disabled,Enabled" setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMC0TXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMC0RXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable for event 25 (GPIO: GPINT9)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E24_set/clr ,Event enable for event 24 (RTOEVT)" "Disabled,Enabled" setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (TIMER4: TEVT9)" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (TIMER4: TEVT8)" "Disabled,Enabled" setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UART1: UTXEVT1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (UART1: URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Disabled,Enabled" setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPI0: SPI0REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPI0: SPI0XEVT)" "Disabled,Enabled" setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable for event 15 (SPI1: SPI1REVT)" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable for event 14 (SPI1: SPI1XEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable for event 13 (MJCP: SEQINT)" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable for event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Disabled,Enabled" setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable for event 11 (SPI2: SPI2REVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable for event 10 (SPI2: SPI2XEVT)" "Disabled,Enabled" setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9 _set/clr ,Event enable for event 9 (TIMER2: TEVT5)" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8 _set/clr ,Event enable for event 8 (TIMER2: TEVT4)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7 _set/clr ,Event enable for event 7 (VPSS: EVT4)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6 _set/clr ,Event enable for event 6 (VPSS: EVT3)" "Disabled,Enabled" setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5 _set/clr ,Event enable for event 5 (VPSS: EVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4 _set/clr ,Event enable for event 4 (VPSS: EVT1)" "Disabled,Enabled" setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3 _set/clr ,Event enable for event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2 _set/clr ,Event enable for event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1 _set/clr ,Event enable for event 1 (TIMER3 TEVT7)" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0 _set/clr ,Event enable for event 0 (TIMER3: TEVT6)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable for event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable for event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Disabled,Enabled" setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable for event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable for event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Disabled,Enabled" setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable for event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable for event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable for event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E56_set/clr ,Event enable for event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Disabled,Enabled" setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable for event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Disabled,Enabled" textline " " setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2/MJCP: NSFINT)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1/MJCP: IMX1INT)" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TIMER1: TEVT3)" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TIMER1: TEVT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TIMER0: TEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TIMER0: TEVT0)" "Disabled,Enabled" setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable for event 47 (GPIO: GPINT8)" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable for event 46 (ADC: ADINT)" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable for event 45 (GPIO: GPINT15)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPIO: GPINT14)" "Disabled,Enabled" setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Disabled,Enabled" textline " " setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPIO: GPINT12/EMACTXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPIO: GPINT11/EMACRXPULSE)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPIO:GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPIO:GPINT6)" "Disabled,Enabled" setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPIO:GPINT5)" "Disabled,Enabled" textline " " setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPIO:GPINT4)" "Disabled,Enabled" setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPIO:GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPIO:GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPIO: GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPIO:GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 31. " E31 ,Secondary event 31 (MMC1TXEVT)" "Not stored,Stored" bitfld.long 0x00 30. " E30 ,Secondary event 30 (MMC1RXEVT)" "Not stored,Stored" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2C: ICXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2C: ICREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMC0TXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMC0RXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 25. " E25 ,Secondary event 25 (GPIO: GPINT9)" "Not stored,Stored" bitfld.long 0x00 23. " E24 ,Secondary event 24 (RTOEVT)" "Not stored,Stored" bitfld.long 0x00 23. " E23 ,Secondary event 23 (TIMER4: TEVT9)" "Not stored,Stored" textline " " bitfld.long 0x00 22. " E22 ,Secondary event 22 (TIMER4: TEVT8)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UART1: UTXEVT1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (UART1: URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPI0: SPI0REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPI0: SPI0XEVT)" "Not stored,Stored" bitfld.long 0x00 15. " E15 ,Secondary event 15 (SPI1: SPI1REVT)" "Not stored,Stored" bitfld.long 0x00 14. " E14 ,Secondary event 14 (SPI1: SPI1XEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 13. " E13 ,Secondary event 13 (MJCP: SEQINT)" "Not stored,Stored" bitfld.long 0x00 12. " E12 ,Secondary event 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "Not stored,Stored" bitfld.long 0x00 11. " E11 ,Secondary event 11 (SPI2: SPI2REVT)" "Not stored,Stored" textline " " bitfld.long 0x00 10. " E10 ,Secondary event 10 (SPI2: SPI2XEVT)" "Not stored,Stored" bitfld.long 0x00 9. " E9 ,Secondary event 9 (TIMER2: TEVT5)" "Not stored,Stored" bitfld.long 0x00 8. " E8 ,Secondary event 8 (TIMER2: TEVT4)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (VPSS: EVT4)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (VPSS: EVT3)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (VPSS: EVT2)" "Not stored,Stored" textline " " bitfld.long 0x00 4. " E4 ,Secondary event 4 (VPSS: EVT1)" "Not stored,Stored" bitfld.long 0x00 3. " E3 ,Secondary event 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 1. " E1 ,Secondary event 1 (TIMER3 TEVT7)" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,Secondary event 0 (TIMER3: TEVT6)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 31. " E63 ,Secondary event 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "Not stored,Stored" bitfld.long 0x04 30. " E62 ,Secondary event 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "Not stored,Stored" bitfld.long 0x04 29. " E61 ,Secondary event 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "Not stored,Stored" textline " " bitfld.long 0x04 28. " E60 ,Secondary event 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "Not stored,Stored" bitfld.long 0x04 27. " E59 ,Secondary event 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "Not stored,Stored" bitfld.long 0x04 26. " E58 ,Secondary event 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "Not stored,Stored" textline " " bitfld.long 0x04 25. " E57 ,Secondary event 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "Not stored,Stored" bitfld.long 0x04 23. " E56 ,Secondary event 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "Not stored,Stored" bitfld.long 0x04 23. " E55 ,Secondary event 55 (PWM3/HDVICP(6): CP_UNDEF)" "Not stored,Stored" textline " " bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2/MJCP: NSFINT)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1/MJCP: IMX1INT)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" textline " " bitfld.long 0x04 19. " E51 ,Secondary event 51 (TIMER1: TEVT3)" "Not stored,Stored" bitfld.long 0x04 18. " E50 ,Secondary event 50 (TIMER1: TEVT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TIMER0: TEVT1)" "Not stored,Stored" textline " " bitfld.long 0x04 16. " E48 ,Secondary event 48 (TIMER0: TEVT0)" "Not stored,Stored" bitfld.long 0x04 15. " E47 ,Secondary event 47 (GPIO: GPINT8)" "Not stored,Stored" bitfld.long 0x04 14. " E46 ,Secondary event 46 (ADC: ADINT)" "Not stored,Stored" textline " " bitfld.long 0x04 13. " E45 ,Secondary event 45 (GPIO: GPINT15)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPIO: GPINT14)" "Not stored,Stored" bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPIO: GPINT13/EMACMISCPULSE)" "Not stored,Stored" textline " " bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPIO: GPINT12/EMACTXPULSE)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPIO: GPINT11/EMACRXPULSE)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPIO: GPINT10/EMACRXTHREESH)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPIO:GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPIO:GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPIO:GPINT5)" "Not stored,Stored" textline " " bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPIO:GPINT4)" "Not stored,Stored" bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPIO:GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPIO:GPINT2)" "Not stored,Stored" textline " " bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPIO: GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPIO:GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 31. " E31 ,Secondary event clear 31 (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Secondary event clear 30 (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Secondary event clear 29 (I2C: ICXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Secondary event clear 28 (I2C: ICREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event clear 27 (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event clear 26 (MMC0RXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Secondary event clear 25 (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E24 ,Secondary event clear 24 (RTOEVT)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Secondary event clear 23 (TIMER4: TEVT9)" "No effect,Clear" textline " " bitfld.long 0x00 22. " E22 ,Secondary event clear 22 (TIMER4: TEVT8)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event clear 21 (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event clear 20 (UART1: URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event clear 19 (UART0: UTXEVT0/SPI3: SPI3REVT)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event clear 18 (UART0: URXEVT0/SPI3: SPI3XEVT)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event clear 17 (SPI0: SPI0REVT)" "No effect,Clear" textline " " bitfld.long 0x00 16. " E16 ,Secondary event clear 16 (SPI0: SPI0XEVT)" "No effect,Clear" bitfld.long 0x00 15. " E15 ,Secondary event clear 15 (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Secondary event clear 14 (SPI1: SPI1XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 13. " E13 ,Secondary event clear 13 (MJCP: SEQINT)" "No effect,Clear" bitfld.long 0x00 12. " E12 ,Secondary event clear 12 (MJCP: IMX0INT/HDVICP: HDVICP_ARMINT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Secondary event clear 11 (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Secondary event clear 10 (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Secondary event clear 9 (TIMER2: TEVT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Secondary event clear 8 (TIMER2: TEVT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event clear 7 (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event clear 6 (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event clear 5 (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Secondary event clear 4 (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Secondary event clear 3 (MCBSP: REVT/VoiceCodec: VCREVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event clear 2 (MCBSP: XEVT/VoiceCodec: VCXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Secondary event clear 1 (TIMER3 TEVT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Secondary event clear 0 (TIMER3: TEVT6)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 31. " E63 ,Secondary event clear 63 (MJCP: COPCINT/HDVICP(4): CP_ECDEND)" "No effect,Clear" bitfld.long 0x04 30. " E62 ,Secondary event clear 62 (MJCP: RCNTINT/HDVICP(3): CP_MC)" "No effect,Clear" bitfld.long 0x04 29. " E61 ,Secondary event clear 61 (MJCP: VLCDERRINT/HDVICP(0): CP_LPF)" "No effect,Clear" textline " " bitfld.long 0x04 28. " E60 ,Secondary event clear 60 (MJCP: BPSINT/HDVICP(2): CP_BS)" "No effect,Clear" bitfld.long 0x04 27. " E59 ,Secondary event clear 59 (MJCP: QIQINT/HDVICP(7): CP_IPE)" "No effect,Clear" bitfld.long 0x04 26. " E58 ,Secondary event clear 58 (MJCP: DCTINT/HDVICP(1): CP_CALC)" "No effect,Clear" textline " " bitfld.long 0x04 25. " E57 ,Secondary event clear 57 (MJCP: BIMINT/HDVICP(8): CP_ME)" "No effect,Clear" bitfld.long 0x04 23. " E56 ,Secondary event clear 56 (MJCP: VLCDINT/HDVICP(5): CP_ECDCMP)" "No effect,Clear" bitfld.long 0x04 23. " E55 ,Secondary event clear 55 (PWM3/HDVICP(6): CP_UNDEF)" "No effect,Clear" textline " " bitfld.long 0x04 22. " E54 ,Secondary event clear 54 (PWM2/MJCP: NSFINT)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event clear 53 (PWM1/MJCP: IMX1INT)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event clear 52 (PWM0)" "No effect,Clear" textline " " bitfld.long 0x04 19. " E51 ,Secondary event clear 51 (TIMER1: TEVT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Secondary event clear 50 (TIMER1: TEVT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event clear 49 (TIMER0: TEVT1)" "No effect,Clear" textline " " bitfld.long 0x04 16. " E48 ,Secondary event clear 48 (TIMER0: TEVT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Secondary event clear 47 (GPIO: GPINT8)" "No effect,Clear" bitfld.long 0x04 14. " E46 ,Secondary event clear 46 (ADC: ADINT)" "No effect,Clear" textline " " bitfld.long 0x04 13. " E45 ,Secondary event clear 45 (GPIO: GPINT15)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event clear 44 (GPIO: GPINT14)" "No effect,Clear" bitfld.long 0x04 11. " E43 ,Secondary event clear 43 (GPIO: GPINT13/EMACMISCPULSE)" "No effect,Clear" textline " " bitfld.long 0x04 10. " E42 ,Secondary event clear 42 (GPIO: GPINT12/EMACTXPULSE)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event clear 41 (GPIO: GPINT11/EMACRXPULSE)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event clear 40 (GPIO: GPINT10/EMACRXTHREESH)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event clear 39 (GPIO:GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event clear 38 (GPIO:GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event clear 37 (GPIO:GPINT5)" "No effect,Clear" textline " " bitfld.long 0x04 4. " E36 ,Secondary event clear 36 (GPIO:GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Secondary event clear 35 (GPIO:GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event clear 34 (GPIO:GPINT2)" "No effect,Clear" textline " " bitfld.long 0x04 1. " E33 ,Secondary event clear 33 (GPIO: GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event clear 32 (GPIO:GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree.end tree "EDMA3 Transfer Controller Registers" tree "TC 0" base asd:0x1C10000 width 7. sif (cpu()!="DM357") rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" endif rgroup.long 0x04++0x03 line.long 0x00 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..." bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..." sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." else bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,128 byte,?..." endif rgroup.long 0x100++0x3 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy" bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy" group.long 0x140++0x3 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..." tree "Error Registers" width 9. rgroup.long 0x120++0x7 line.long 0x00 "ERRSTAT,Error Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected" bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected" bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected" group.long 0x124++0x03 line.long 0x00 "ERREN,Error Enable Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled" wgroup.long 0x128++0x3 line.long 0x00 "ERRCLR,Error Clear Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear" rgroup.long 0x12c++0x3 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x3 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse" width 0xb tree.end tree "EDMA3TC Channel Registers" width 11. group.long 0x240++0x3 "Source Active Registers" line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long 0x244++0x1f line.long 0x00 "SASRC,Source Active Source Address Register" line.long 0x04 "SACNT,Source Active Count Register" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "SADST,Source Active Destination Address Register" line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" line.long 0x14 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register" line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0xb line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register" hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register" line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register" group.long 0x300++0x3 "Destination FIFO Registers" line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x300+0x4)++0x13 line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0" line.long 0x04 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x340++0x3 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x340+0x4)++0x13 line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1" line.long 0x04 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x380++0x3 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x380+0x4)++0x13 line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2" line.long 0x04 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x3C0++0x3 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x3C0+0x4)++0x13 line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3" line.long 0x04 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " width 0xb tree.end width 0xb tree.end tree "TC 1" base asd:0x1C10400 width 7. sif (cpu()!="DM357") rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" endif rgroup.long 0x04++0x03 line.long 0x00 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..." bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..." sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." else bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." endif rgroup.long 0x100++0x3 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy" bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy" group.long 0x140++0x3 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..." tree "Error Registers" width 9. rgroup.long 0x120++0x7 line.long 0x00 "ERRSTAT,Error Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected" bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected" bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected" group.long 0x124++0x03 line.long 0x00 "ERREN,Error Enable Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled" wgroup.long 0x128++0x3 line.long 0x00 "ERRCLR,Error Clear Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear" rgroup.long 0x12c++0x3 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x3 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse" width 0xb tree.end tree "EDMA3TC Channel Registers" width 11. group.long 0x240++0x3 "Source Active Registers" line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long 0x244++0x1f line.long 0x00 "SASRC,Source Active Source Address Register" line.long 0x04 "SACNT,Source Active Count Register" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "SADST,Source Active Destination Address Register" line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" line.long 0x14 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register" line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0xb line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register" hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register" line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register" group.long 0x300++0x3 "Destination FIFO Registers" line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x300+0x4)++0x13 line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0" line.long 0x04 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x340++0x3 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x340+0x4)++0x13 line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1" line.long 0x04 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x380++0x3 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x380+0x4)++0x13 line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2" line.long 0x04 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x3C0++0x3 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x3C0+0x4)++0x13 line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3" line.long 0x04 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " width 0xb tree.end width 0xb tree.end tree "TC 2" base asd:0x1C10800 width 7. sif (cpu()!="DM357") rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" endif rgroup.long 0x04++0x03 line.long 0x00 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..." bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..." sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,128 byte,?..." else bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." endif rgroup.long 0x100++0x3 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy" bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy" group.long 0x140++0x3 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..." tree "Error Registers" width 9. rgroup.long 0x120++0x7 line.long 0x00 "ERRSTAT,Error Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected" bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected" bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected" group.long 0x124++0x03 line.long 0x00 "ERREN,Error Enable Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled" wgroup.long 0x128++0x3 line.long 0x00 "ERRCLR,Error Clear Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear" rgroup.long 0x12c++0x3 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x3 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse" width 0xb tree.end tree "EDMA3TC Channel Registers" width 11. group.long 0x240++0x3 "Source Active Registers" line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long 0x244++0x1f line.long 0x00 "SASRC,Source Active Source Address Register" line.long 0x04 "SACNT,Source Active Count Register" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "SADST,Source Active Destination Address Register" line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" line.long 0x14 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register" line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0xb line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register" hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register" line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register" group.long 0x300++0x3 "Destination FIFO Registers" line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x300+0x4)++0x13 line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0" line.long 0x04 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x340++0x3 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x340+0x4)++0x13 line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1" line.long 0x04 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x380++0x3 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x380+0x4)++0x13 line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2" line.long 0x04 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x3C0++0x3 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x3C0+0x4)++0x13 line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3" line.long 0x04 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " width 0xb tree.end width 0xb tree.end tree "TC 3" base asd:0x1C10C00 width 7. sif (cpu()!="DM357") rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" endif rgroup.long 0x04++0x03 line.long 0x00 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..." bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..." sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,128 byte,?..." else bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." endif rgroup.long 0x100++0x3 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy" bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy" group.long 0x140++0x3 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..." tree "Error Registers" width 9. rgroup.long 0x120++0x7 line.long 0x00 "ERRSTAT,Error Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected" bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected" bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected" group.long 0x124++0x03 line.long 0x00 "ERREN,Error Enable Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled" wgroup.long 0x128++0x3 line.long 0x00 "ERRCLR,Error Clear Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear" rgroup.long 0x12c++0x3 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x3 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse" width 0xb tree.end tree "EDMA3TC Channel Registers" width 11. group.long 0x240++0x3 "Source Active Registers" line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long 0x244++0x1f line.long 0x00 "SASRC,Source Active Source Address Register" line.long 0x04 "SACNT,Source Active Count Register" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "SADST,Source Active Destination Address Register" line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" line.long 0x14 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register" line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0xb line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register" hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register" line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register" group.long 0x300++0x3 "Destination FIFO Registers" line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x300+0x4)++0x13 line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0" line.long 0x04 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x340++0x3 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x340+0x4)++0x13 line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1" line.long 0x04 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x380++0x3 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x380+0x4)++0x13 line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2" line.long 0x04 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x3C0++0x3 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x3C0+0x4)++0x13 line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3" line.long 0x04 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " width 0xb tree.end width 0xb tree.end tree.end tree.end tree "GPIO (General-Purpose Input/Output)" base asd:0x01c67000 width 8. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.byte 0x00 16.--23. 1. " TID ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" group.long 0x08++0x3 line.long 0x00 "BINTEN,GPIO Interrupt Per-Bank Enable Register" bitfld.long 0x00 0. " EN0 ,Bank 0 interrupt enable" "Disabled,Enabled" width 14. group.long 0x10++0x7 "GPIO Banks 0 and 1" line.long 0x00 "DIR01,GPIO Banks 0 and 1 Direction Register" bitfld.long 0x00 31. " DIR31 ,Pin 31 direction" "Output,Input" bitfld.long 0x00 30. " DIR30 ,Pin 30 direction" "Output,Input" bitfld.long 0x00 29. " DIR29 ,Pin 29 direction" "Output,Input" bitfld.long 0x00 28. " DIR28 ,Pin 28 direction" "Output,Input" textline " " bitfld.long 0x00 27. " DIR27 ,Pin 27 direction" "Output,Input" bitfld.long 0x00 26. " DIR26 ,Pin 26 direction" "Output,Input" bitfld.long 0x00 25. " DIR25 ,Pin 25 direction" "Output,Input" bitfld.long 0x00 24. " DIR24 ,Pin 24 direction" "Output,Input" textline " " bitfld.long 0x00 23. " DIR23 ,Pin 23 direction" "Output,Input" bitfld.long 0x00 22. " DIR22 ,Pin 22 direction" "Output,Input" bitfld.long 0x00 21. " DIR21 ,Pin 21 direction" "Output,Input" bitfld.long 0x00 20. " DIR20 ,Pin 20 direction" "Output,Input" textline " " bitfld.long 0x00 19. " DIR19 ,Pin 19 direction" "Output,Input" bitfld.long 0x00 18. " DIR18 ,Pin 18 direction" "Output,Input" bitfld.long 0x00 17. " DIR17 ,Pin 17 direction" "Output,Input" bitfld.long 0x00 16. " DIR16 ,Pin 16 direction" "Output,Input" textline " " bitfld.long 0x00 15. " DIR15 ,Pin 15 direction" "Output,Input" bitfld.long 0x00 14. " DIR14 ,Pin 14 direction" "Output,Input" bitfld.long 0x00 13. " DIR13 ,Pin 13 direction" "Output,Input" bitfld.long 0x00 12. " DIR12 ,Pin 12 direction" "Output,Input" textline " " bitfld.long 0x00 11. " DIR11 ,Pin 11 direction" "Output,Input" bitfld.long 0x00 10. " DIR10 ,Pin 10 direction" "Output,Input" bitfld.long 0x00 9. " DIR9 ,Pin 9 direction" "Output,Input" bitfld.long 0x00 8. " DIR8 ,Pin 8 direction" "Output,Input" textline " " bitfld.long 0x00 7. " DIR7 ,Pin 7 direction" "Output,Input" bitfld.long 0x00 6. " DIR6 ,Pin 6 direction" "Output,Input" bitfld.long 0x00 5. " DIR5 ,Pin 5 direction" "Output,Input" bitfld.long 0x00 4. " DIR4 ,Pin 4 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR3 ,Pin 3 direction" "Output,Input" bitfld.long 0x00 2. " DIR2 ,Pin 2 direction" "Output,Input" bitfld.long 0x00 1. " DIR1 ,Pin 1 direction" "Output,Input" bitfld.long 0x00 0. " DIR0 ,Pin 0 direction" "Output,Input" line.long 0x04 "OUT_DATA01,GPIO Banks 0 and 1 Output Data Register" setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT31_set/clr ,Output drive state of GPIO pin 31" "Low,High" setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT30_set/clr ,Output drive state of GPIO pin 30" "Low,High" setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT29_set/clr ,Output drive state of GPIO pin 29" "Low,High" textline " " setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT28_set/clr ,Output drive state of GPIO pin 28" "Low,High" setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT27_set/clr ,Output drive state of GPIO pin 27" "Low,High" setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT26_set/clr ,Output drive state of GPIO pin 26" "Low,High" textline " " setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT25_set/clr ,Output drive state of GPIO pin 25" "Low,High" setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT24_set/clr ,Output drive state of GPIO pin 24" "Low,High" setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT23_set/clr ,Output drive state of GPIO pin 23" "Low,High" textline " " setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT22_set/clr ,Output drive state of GPIO pin 22" "Low,High" setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT21_set/clr ,Output drive state of GPIO pin 21" "Low,High" setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT20_set/clr ,Output drive state of GPIO pin 20" "Low,High" textline " " setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT19_set/clr ,Output drive state of GPIO pin 19" "Low,High" setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT18_set/clr ,Output drive state of GPIO pin 18" "Low,High" setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT17_set/clr ,Output drive state of GPIO pin 17" "Low,High" textline " " setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT16_set/clr ,Output drive state of GPIO pin 16" "Low,High" setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT15_set/clr ,Output drive state of GPIO pin 15" "Low,High" setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT14_set/clr ,Output drive state of GPIO pin 14" "Low,High" textline " " setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT13_set/clr ,Output drive state of GPIO pin 13" "Low,High" setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT12_set/clr ,Output drive state of GPIO pin 12" "Low,High" setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT11_set/clr ,Output drive state of GPIO pin 11" "Low,High" textline " " setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT10_set/clr ,Output drive state of GPIO pin 10" "Low,High" setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT9_set/clr ,Output drive state of GPIO pin 9" "Low,High" setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT8_set/clr ,Output drive state of GPIO pin 8" "Low,High" textline " " setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT7_set/clr ,Output drive state of GPIO pin 7" "Low,High" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT6_set/clr ,Output drive state of GPIO pin 6" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT5_set/clr ,Output drive state of GPIO pin 5" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT4_set/clr ,Output drive state of GPIO pin 4" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT3_set/clr ,Output drive state of GPIO pin 3" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT2_set/clr ,Output drive state of GPIO pin 2" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT1_set/clr ,Output drive state of GPIO pin 1" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT0_set/clr ,Output drive state of GPIO pin 0" "Low,High" group.long 0x20++0x17 line.long 0x00 "IN_DATA01,GPIO Banks 0 and 1 Input Data Register" bitfld.long 0x00 31. " IN31 ,Status of GPIO pin 31" "Low,High" bitfld.long 0x00 30. " IN30 ,Status of GPIO pin 30" "Low,High" bitfld.long 0x00 29. " IN29 ,Status of GPIO pin 29" "Low,High" bitfld.long 0x00 28. " IN28 ,Status of GPIO pin 28" "Low,High" bitfld.long 0x00 27. " IN27 ,Status of GPIO pin 27" "Low,High" bitfld.long 0x00 26. " IN26 ,Status of GPIO pin 26" "Low,High" textline " " bitfld.long 0x00 25. " IN25 ,Status of GPIO pin 25" "Low,High" bitfld.long 0x00 24. " IN24 ,Status of GPIO pin 24" "Low,High" bitfld.long 0x00 23. " IN23 ,Status of GPIO pin 23" "Low,High" bitfld.long 0x00 22. " IN22 ,Status of GPIO pin 22" "Low,High" bitfld.long 0x00 21. " IN21 ,Status of GPIO pin 21" "Low,High" bitfld.long 0x00 20. " IN20 ,Status of GPIO pin 20" "Low,High" textline " " bitfld.long 0x00 19. " IN19 ,Status of GPIO pin 19" "Low,High" bitfld.long 0x00 18. " IN18 ,Status of GPIO pin 18" "Low,High" bitfld.long 0x00 17. " IN17 ,Status of GPIO pin 17" "Low,High" bitfld.long 0x00 16. " IN16 ,Status of GPIO pin 16" "Low,High" bitfld.long 0x00 15. " IN15 ,Status of GPIO pin 15" "Low,High" bitfld.long 0x00 14. " IN14 ,Status of GPIO pin 14" "Low,High" textline " " bitfld.long 0x00 13. " IN13 ,Status of GPIO pin 13" "Low,High" bitfld.long 0x00 12. " IN12 ,Status of GPIO pin 12" "Low,High" bitfld.long 0x00 11. " IN11 ,Status of GPIO pin 11" "Low,High" bitfld.long 0x00 10. " IN10 ,Status of GPIO pin 10" "Low,High" bitfld.long 0x00 9. " IN9 ,Status of GPIO pin 9" "Low,High" bitfld.long 0x00 8. " IN8 ,Status of GPIO pin 8" "Low,High" textline " " bitfld.long 0x00 7. " IN7 ,Status of GPIO pin 7" "Low,High" bitfld.long 0x00 6. " IN6 ,Status of GPIO pin 6" "Low,High" bitfld.long 0x00 5. " IN5 ,Status of GPIO pin 5" "Low,High" bitfld.long 0x00 4. " IN4 ,Status of GPIO pin 4" "Low,High" bitfld.long 0x00 3. " IN3 ,Status of GPIO pin 3" "Low,High" bitfld.long 0x00 2. " IN2 ,Status of GPIO pin 2" "Low,High" textline " " bitfld.long 0x00 1. " IN1 ,Status of GPIO pin 1" "Low,High" bitfld.long 0x00 0. " IN0 ,Status of GPIO pin 0" "Low,High" line.long 0x04 "SET_RIS_TRIG,GPIO Set Rising Edge Interrupt Register" bitfld.long 0x04 16. " SETRIS16 ,Enable rising edge interrupt detection on GPIO pin 16" "No effect,Enabled" bitfld.long 0x04 15. " SETRIS15 ,Enable rising edge interrupt detection on GPIO pin 15" "No effect,Enabled" bitfld.long 0x04 14. " SETRIS14 ,Enable rising edge interrupt detection on GPIO pin 14" "No effect,Enabled" textline " " bitfld.long 0x04 13. " SETRIS13 ,Enable rising edge interrupt detection on GPIO pin 13" "No effect,Enabled" bitfld.long 0x04 12. " SETRIS12 ,Enable rising edge interrupt detection on GPIO pin 12" "No effect,Enabled" bitfld.long 0x04 11. " SETRIS11 ,Enable rising edge interrupt detection on GPIO pin 11" "No effect,Enabled" textline " " bitfld.long 0x04 10. " SETRIS10 ,Enable rising edge interrupt detection on GPIO pin 10" "No effect,Enabled" bitfld.long 0x04 9. " SETRIS9 ,Enable rising edge interrupt detection on GPIO pin 9" "No effect,Enabled" bitfld.long 0x04 8. " SETRIS8 ,Enable rising edge interrupt detection on GPIO pin 8" "No effect,Enabled" textline " " bitfld.long 0x04 7. " SETRIS7 ,Enable rising edge interrupt detection on GPIO pin 7" "No effect,Enabled" bitfld.long 0x04 6. " SETRIS6 ,Enable rising edge interrupt detection on GPIO pin 6" "No effect,Enabled" bitfld.long 0x04 5. " SETRIS5 ,Enable rising edge interrupt detection on GPIO pin 5" "No effect,Enabled" textline " " bitfld.long 0x04 4. " SETRIS4 ,Enable rising edge interrupt detection on GPIO pin 4" "No effect,Enabled" bitfld.long 0x04 3. " SETRIS3 ,Enable rising edge interrupt detection on GPIO pin 3" "No effect,Enabled" bitfld.long 0x04 2. " SETRIS2 ,Enable rising edge interrupt detection on GPIO pin 2" "No effect,Enabled" textline " " bitfld.long 0x04 1. " SETRIS1 ,Enable rising edge interrupt detection on GPIO pin 1" "No effect,Enabled" bitfld.long 0x04 0. " SETRIS0 ,Enable rising edge interrupt detection on GPIO pin 0" "No effect,Enabled" line.long 0x08 "CLR_RIS_TRIG,GPIO Clear Rising Edge Interrupt Register" bitfld.long 0x08 16. " CLRRIS16 ,Disable rising edge interrupt detection on GPIO pin 16" "No effect,Disabled" bitfld.long 0x08 15. " CLRRIS15 ,Disable rising edge interrupt detection on GPIO pin 15" "No effect,Disabled" bitfld.long 0x08 14. " CLRRIS14 ,Disable rising edge interrupt detection on GPIO pin 14" "No effect,Disabled" textline " " bitfld.long 0x08 13. " CLRRIS13 ,Disable rising edge interrupt detection on GPIO pin 13" "No effect,Disabled" bitfld.long 0x08 12. " CLRRIS12 ,Disable rising edge interrupt detection on GPIO pin 12" "No effect,Disabled" bitfld.long 0x08 11. " CLRRIS11 ,Disable rising edge interrupt detection on GPIO pin 11" "No effect,Disabled" textline " " bitfld.long 0x08 10. " CLRRIS10 ,Disable rising edge interrupt detection on GPIO pin 10" "No effect,Disabled" bitfld.long 0x08 9. " CLRRIS9 ,Disable rising edge interrupt detection on GPIO pin 9" "No effect,Disabled" bitfld.long 0x08 8. " CLRRIS8 ,Disable rising edge interrupt detection on GPIO pin 8" "No effect,Disabled" textline " " bitfld.long 0x08 7. " CLRRIS7 ,Disable rising edge interrupt detection on GPIO pin 7" "No effect,Disabled" bitfld.long 0x08 6. " CLRRIS6 ,Disable rising edge interrupt detection on GPIO pin 6" "No effect,Disabled" bitfld.long 0x08 5. " CLRRIS5 ,Disable rising edge interrupt detection on GPIO pin 5" "No effect,Disabled" textline " " bitfld.long 0x08 4. " CLRRIS4 ,Disable rising edge interrupt detection on GPIO pin 4" "No effect,Disabled" bitfld.long 0x08 3. " CLRRIS3 ,Disable rising edge interrupt detection on GPIO pin 3" "No effect,Disabled" bitfld.long 0x08 2. " CLRRIS2 ,Disable rising edge interrupt detection on GPIO pin 2" "No effect,Disabled" textline " " bitfld.long 0x08 1. " CLRRIS1 ,Disable rising edge interrupt detection on GPIO pin 1" "No effect,Disabled" bitfld.long 0x08 0. " CLRRIS0 ,Disable rising edge interrupt detection on GPIO pin 0" "No effect,Disabled" line.long 0x0c "SET_FAL_TRIG,GPIO Set Falling Edge Interrupt Register" bitfld.long 0x0c 16. " SETFAL16 ,Enable falling edge interrupt detection on GPIO pin 16" "No effect,Enabled" bitfld.long 0x0c 15. " SETFAL15 ,Enable falling edge interrupt detection on GPIO pin 15" "No effect,Enabled" bitfld.long 0x0c 14. " SETFAL14 ,Enable falling edge interrupt detection on GPIO pin 14" "No effect,Enabled" textline " " bitfld.long 0x0c 13. " SETFAL13 ,Enable falling edge interrupt detection on GPIO pin 13" "No effect,Enabled" bitfld.long 0x0c 12. " SETFAL12 ,Enable falling edge interrupt detection on GPIO pin 12" "No effect,Enabled" bitfld.long 0x0c 11. " SETFAL11 ,Enable falling edge interrupt detection on GPIO pin 11" "No effect,Enabled" textline " " bitfld.long 0x0c 10. " SETFAL10 ,Enable falling edge interrupt detection on GPIO pin 10" "No effect,Enabled" bitfld.long 0x0c 9. " SETFAL9 ,Enable falling edge interrupt detection on GPIO pin 9" "No effect,Enabled" bitfld.long 0x0c 8. " SETFAL8 ,Enable falling edge interrupt detection on GPIO pin 8" "No effect,Enabled" textline " " bitfld.long 0x0c 7. " SETFAL7 ,Enable falling edge interrupt detection on GPIO pin 7" "No effect,Enabled" bitfld.long 0x0c 6. " SETFAL6 ,Enable falling edge interrupt detection on GPIO pin 6" "No effect,Enabled" bitfld.long 0x0c 5. " SETFAL5 ,Enable falling edge interrupt detection on GPIO pin 5" "No effect,Enabled" textline " " bitfld.long 0x0c 4. " SETFAL4 ,Enable falling edge interrupt detection on GPIO pin 4" "No effect,Enabled" bitfld.long 0x0c 3. " SETFAL3 ,Enable falling edge interrupt detection on GPIO pin 3" "No effect,Enabled" bitfld.long 0x0c 2. " SETFAL2 ,Enable falling edge interrupt detection on GPIO pin 2" "No effect,Enabled" textline " " bitfld.long 0x0c 1. " SETFAL1 ,Enable falling edge interrupt detection on GPIO pin 1" "No effect,Enabled" bitfld.long 0x0c 0. " SETFAL0 ,Enable falling edge interrupt detection on GPIO pin 0" "No effect,Enabled" line.long 0x10 "CLR_FAL_TRIG,GPIO Clear Falling Edge Interrupt Register" bitfld.long 0x10 16. " CLRFAL16 ,Disable falling edge interrupt detection on GPIO pin 16" "No effect,Disabled" bitfld.long 0x10 15. " CLRFAL15 ,Disable falling edge interrupt detection on GPIO pin 15" "No effect,Disabled" bitfld.long 0x10 14. " CLRFAL14 ,Disable falling edge interrupt detection on GPIO pin 14" "No effect,Disabled" textline " " bitfld.long 0x10 13. " CLRFAL13 ,Disable falling edge interrupt detection on GPIO pin 13" "No effect,Disabled" bitfld.long 0x10 12. " CLRFAL12 ,Disable falling edge interrupt detection on GPIO pin 12" "No effect,Disabled" bitfld.long 0x10 11. " CLRFAL11 ,Disable falling edge interrupt detection on GPIO pin 11" "No effect,Disabled" textline " " bitfld.long 0x10 10. " CLRFAL10 ,Disable falling edge interrupt detection on GPIO pin 10" "No effect,Disabled" bitfld.long 0x10 9. " CLRFAL9 ,Disable falling edge interrupt detection on GPIO pin 9" "No effect,Disabled" bitfld.long 0x10 8. " CLRFAL8 ,Disable falling edge interrupt detection on GPIO pin 8" "No effect,Disabled" textline " " bitfld.long 0x10 7. " CLRFAL7 ,Disable falling edge interrupt detection on GPIO pin 7" "No effect,Disabled" bitfld.long 0x10 6. " CLRFAL6 ,Disable falling edge interrupt detection on GPIO pin 6" "No effect,Disabled" bitfld.long 0x10 5. " CLRFAL5 ,Disable falling edge interrupt detection on GPIO pin 5" "No effect,Disabled" textline " " bitfld.long 0x10 4. " CLRFAL4 ,Disable falling edge interrupt detection on GPIO pin 4" "No effect,Disabled" bitfld.long 0x10 3. " CLRFAL3 ,Disable falling edge interrupt detection on GPIO pin 3" "No effect,Disabled" bitfld.long 0x10 2. " CLRFAL2 ,Disable falling edge interrupt detection on GPIO pin 2" "No effect,Disabled" textline " " bitfld.long 0x10 1. " CLRFAL1 ,Disable falling edge interrupt detection on GPIO pin 1" "No effect,Disabled" bitfld.long 0x10 0. " CLRFAL0 ,Disable falling edge interrupt detection on GPIO pin 0" "No effect,Disabled" line.long 0x14 "INTSTAT,GPIO Interrupt Status Register" eventfld.long 0x14 16. " STAT16 ,Interrupt status of GPIO pin 16" "Not pending,Pending" eventfld.long 0x14 15. " STAT15 ,Interrupt status of GPIO pin 15" "Not pending,Pending" eventfld.long 0x14 14. " STAT14 ,Interrupt status of GPIO pin 14" "Not pending,Pending" textline " " eventfld.long 0x14 13. " STAT13 ,Interrupt status of GPIO pin 13" "Not pending,Pending" eventfld.long 0x14 12. " STAT12 ,Interrupt status of GPIO pin 12" "Not pending,Pending" eventfld.long 0x14 11. " STAT11 ,Interrupt status of GPIO pin 11" "Not pending,Pending" textline " " eventfld.long 0x14 10. " STAT10 ,Interrupt status of GPIO pin 10" "Not pending,Pending" eventfld.long 0x14 9. " STAT9 ,Interrupt status of GPIO pin 9" "Not pending,Pending" eventfld.long 0x14 8. " STAT8 ,Interrupt status of GPIO pin 8" "Not pending,Pending" textline " " eventfld.long 0x14 7. " STAT7 ,Interrupt status of GPIO pin 7" "Not pending,Pending" eventfld.long 0x14 6. " STAT6 ,Interrupt status of GPIO pin 6" "Not pending,Pending" eventfld.long 0x14 5. " STAT5 ,Interrupt status of GPIO pin 5" "Not pending,Pending" textline " " eventfld.long 0x14 4. " STAT4 ,Interrupt status of GPIO pin 4" "Not pending,Pending" eventfld.long 0x14 3. " STAT3 ,Interrupt status of GPIO pin 3" "Not pending,Pending" eventfld.long 0x14 2. " STAT2 ,Interrupt status of GPIO pin 2" "Not pending,Pending" textline " " eventfld.long 0x14 1. " STAT1 ,Interrupt status of GPIO pin 1" "Not pending,Pending" eventfld.long 0x14 0. " STAT0 ,Interrupt status of GPIO pin 0" "Not pending,Pending" group.long 0x38++0x7 "GPIO Banks 2 and 3" line.long 0x00 "DIR23,GPIO Banks 2 and 3 Direction Register" bitfld.long 0x00 31. " DIR63 ,Pin 63 direction" "Output,Input" bitfld.long 0x00 30. " DIR62 ,Pin 62 direction" "Output,Input" bitfld.long 0x00 29. " DIR61 ,Pin 61 direction" "Output,Input" bitfld.long 0x00 28. " DIR60 ,Pin 60 direction" "Output,Input" textline " " bitfld.long 0x00 27. " DIR59 ,Pin 59 direction" "Output,Input" bitfld.long 0x00 26. " DIR58 ,Pin 58 direction" "Output,Input" bitfld.long 0x00 25. " DIR57 ,Pin 57 direction" "Output,Input" bitfld.long 0x00 24. " DIR56 ,Pin 56 direction" "Output,Input" textline " " bitfld.long 0x00 23. " DIR55 ,Pin 55 direction" "Output,Input" bitfld.long 0x00 22. " DIR54 ,Pin 54 direction" "Output,Input" bitfld.long 0x00 21. " DIR53 ,Pin 53 direction" "Output,Input" bitfld.long 0x00 20. " DIR52 ,Pin 52 direction" "Output,Input" textline " " bitfld.long 0x00 19. " DIR51 ,Pin 51 direction" "Output,Input" bitfld.long 0x00 18. " DIR50 ,Pin 50 direction" "Output,Input" bitfld.long 0x00 17. " DIR49 ,Pin 49 direction" "Output,Input" bitfld.long 0x00 16. " DIR48 ,Pin 48 direction" "Output,Input" textline " " bitfld.long 0x00 15. " DIR47 ,Pin 47 direction" "Output,Input" bitfld.long 0x00 14. " DIR46 ,Pin 46 direction" "Output,Input" bitfld.long 0x00 13. " DIR45 ,Pin 45 direction" "Output,Input" bitfld.long 0x00 12. " DIR44 ,Pin 44 direction" "Output,Input" textline " " bitfld.long 0x00 11. " DIR43 ,Pin 43 direction" "Output,Input" bitfld.long 0x00 10. " DIR42 ,Pin 42 direction" "Output,Input" bitfld.long 0x00 9. " DIR41 ,Pin 41 direction" "Output,Input" bitfld.long 0x00 8. " DIR40 ,Pin 40 direction" "Output,Input" textline " " bitfld.long 0x00 7. " DIR39 ,Pin 39 direction" "Output,Input" bitfld.long 0x00 6. " DIR38 ,Pin 38 direction" "Output,Input" bitfld.long 0x00 5. " DIR37 ,Pin 37 direction" "Output,Input" bitfld.long 0x00 4. " DIR36 ,Pin 36 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR35 ,Pin 35 direction" "Output,Input" bitfld.long 0x00 2. " DIR34 ,Pin 34 direction" "Output,Input" bitfld.long 0x00 1. " DIR33 ,Pin 33 direction" "Output,Input" bitfld.long 0x00 0. " DIR32 ,Pin 32 direction" "Output,Input" line.long 0x04 "OUT_DATA23,GPIO Banks 2 and 3 Output Data Register" setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT63_set/clr ,Output drive state of GPIO pin 63" "Low,High" setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT62_set/clr ,Output drive state of GPIO pin 62" "Low,High" setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT61_set/clr ,Output drive state of GPIO pin 61" "Low,High" textline " " setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT60_set/clr ,Output drive state of GPIO pin 60" "Low,High" setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT59_set/clr ,Output drive state of GPIO pin 59" "Low,High" setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT58_set/clr ,Output drive state of GPIO pin 58" "Low,High" textline " " setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT57_set/clr ,Output drive state of GPIO pin 57" "Low,High" setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT56_set/clr ,Output drive state of GPIO pin 56" "Low,High" setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT55_set/clr ,Output drive state of GPIO pin 55" "Low,High" textline " " setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT54_set/clr ,Output drive state of GPIO pin 54" "Low,High" setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT53_set/clr ,Output drive state of GPIO pin 53" "Low,High" setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT52_set/clr ,Output drive state of GPIO pin 52" "Low,High" textline " " setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT51_set/clr ,Output drive state of GPIO pin 51" "Low,High" setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT50_set/clr ,Output drive state of GPIO pin 50" "Low,High" setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT49_set/clr ,Output drive state of GPIO pin 49" "Low,High" textline " " setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT48_set/clr ,Output drive state of GPIO pin 48" "Low,High" setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT47_set/clr ,Output drive state of GPIO pin 47" "Low,High" setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT46_set/clr ,Output drive state of GPIO pin 46" "Low,High" textline " " setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT45_set/clr ,Output drive state of GPIO pin 45" "Low,High" setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT44_set/clr ,Output drive state of GPIO pin 44" "Low,High" setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT43_set/clr ,Output drive state of GPIO pin 43" "Low,High" textline " " setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT42_set/clr ,Output drive state of GPIO pin 42" "Low,High" setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT41_set/clr ,Output drive state of GPIO pin 41" "Low,High" setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT40_set/clr ,Output drive state of GPIO pin 40" "Low,High" textline " " setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT39_set/clr ,Output drive state of GPIO pin 39" "Low,High" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT38_set/clr ,Output drive state of GPIO pin 38" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT37_set/clr ,Output drive state of GPIO pin 37" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT36_set/clr ,Output drive state of GPIO pin 36" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT35_set/clr ,Output drive state of GPIO pin 35" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT34_set/clr ,Output drive state of GPIO pin 34" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT33_set/clr ,Output drive state of GPIO pin 33" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT32_set/clr ,Output drive state of GPIO pin 32" "Low,High" group.long 0x48++0x3 line.long 0x00 "IN_DATA23,GPIO Banks 2 and 3 Input Data Register" bitfld.long 0x00 31. " IN63 ,Status of GPIO pin 63" "Low,High" bitfld.long 0x00 30. " IN62 ,Status of GPIO pin 62" "Low,High" bitfld.long 0x00 29. " IN61 ,Status of GPIO pin 61" "Low,High" bitfld.long 0x00 28. " IN60 ,Status of GPIO pin 60" "Low,High" bitfld.long 0x00 27. " IN59 ,Status of GPIO pin 59" "Low,High" bitfld.long 0x00 26. " IN58 ,Status of GPIO pin 58" "Low,High" textline " " bitfld.long 0x00 25. " IN57 ,Status of GPIO pin 57" "Low,High" bitfld.long 0x00 24. " IN56 ,Status of GPIO pin 56" "Low,High" bitfld.long 0x00 23. " IN55 ,Status of GPIO pin 55" "Low,High" bitfld.long 0x00 22. " IN54 ,Status of GPIO pin 54" "Low,High" bitfld.long 0x00 21. " IN53 ,Status of GPIO pin 53" "Low,High" bitfld.long 0x00 20. " IN52 ,Status of GPIO pin 52" "Low,High" textline " " bitfld.long 0x00 19. " IN51 ,Status of GPIO pin 51" "Low,High" bitfld.long 0x00 18. " IN50 ,Status of GPIO pin 50" "Low,High" bitfld.long 0x00 17. " IN49 ,Status of GPIO pin 49" "Low,High" bitfld.long 0x00 16. " IN48 ,Status of GPIO pin 48" "Low,High" bitfld.long 0x00 15. " IN47 ,Status of GPIO pin 47" "Low,High" bitfld.long 0x00 14. " IN46 ,Status of GPIO pin 46" "Low,High" textline " " bitfld.long 0x00 13. " IN45 ,Status of GPIO pin 45" "Low,High" bitfld.long 0x00 12. " IN44 ,Status of GPIO pin 44" "Low,High" bitfld.long 0x00 11. " IN43 ,Status of GPIO pin 43" "Low,High" bitfld.long 0x00 10. " IN42 ,Status of GPIO pin 42" "Low,High" bitfld.long 0x00 9. " IN41 ,Status of GPIO pin 41" "Low,High" bitfld.long 0x00 8. " IN40 ,Status of GPIO pin 40" "Low,High" textline " " bitfld.long 0x00 7. " IN39 ,Status of GPIO pin 39" "Low,High" bitfld.long 0x00 6. " IN38 ,Status of GPIO pin 38" "Low,High" bitfld.long 0x00 5. " IN37 ,Status of GPIO pin 37" "Low,High" bitfld.long 0x00 4. " IN36 ,Status of GPIO pin 36" "Low,High" bitfld.long 0x00 3. " IN35 ,Status of GPIO pin 35" "Low,High" bitfld.long 0x00 2. " IN34 ,Status of GPIO pin 34" "Low,High" textline " " bitfld.long 0x00 1. " IN33 ,Status of GPIO pin 33" "Low,High" bitfld.long 0x00 0. " IN32 ,Status of GPIO pin 32" "Low,High" group.long 0x60++0x7 "GPIO Banks 4 and 5" line.long 0x00 "DIR45,GPIO Banks 4 and 5 Direction Register" bitfld.long 0x00 31. " DIR95 ,Pin 95 direction" "Output,Input" bitfld.long 0x00 30. " DIR94 ,Pin 94 direction" "Output,Input" bitfld.long 0x00 29. " DIR93 ,Pin 93 direction" "Output,Input" bitfld.long 0x00 28. " DIR92 ,Pin 92 direction" "Output,Input" textline " " bitfld.long 0x00 27. " DIR91 ,Pin 91 direction" "Output,Input" bitfld.long 0x00 26. " DIR90 ,Pin 90 direction" "Output,Input" bitfld.long 0x00 25. " DIR89 ,Pin 89 direction" "Output,Input" bitfld.long 0x00 24. " DIR88 ,Pin 88 direction" "Output,Input" textline " " bitfld.long 0x00 23. " DIR87 ,Pin 87 direction" "Output,Input" bitfld.long 0x00 22. " DIR86 ,Pin 86 direction" "Output,Input" bitfld.long 0x00 21. " DIR85 ,Pin 85 direction" "Output,Input" bitfld.long 0x00 20. " DIR84 ,Pin 84 direction" "Output,Input" textline " " bitfld.long 0x00 19. " DIR83 ,Pin 83 direction" "Output,Input" bitfld.long 0x00 18. " DIR82 ,Pin 82 direction" "Output,Input" bitfld.long 0x00 17. " DIR81 ,Pin 81 direction" "Output,Input" bitfld.long 0x00 16. " DIR80 ,Pin 80 direction" "Output,Input" textline " " bitfld.long 0x00 15. " DIR79 ,Pin 79 direction" "Output,Input" bitfld.long 0x00 14. " DIR78 ,Pin 78 direction" "Output,Input" bitfld.long 0x00 13. " DIR77 ,Pin 77 direction" "Output,Input" bitfld.long 0x00 12. " DIR76 ,Pin 76 direction" "Output,Input" textline " " bitfld.long 0x00 11. " DIR75 ,Pin 75 direction" "Output,Input" bitfld.long 0x00 10. " DIR74 ,Pin 74 direction" "Output,Input" bitfld.long 0x00 9. " DIR73 ,Pin 73 direction" "Output,Input" bitfld.long 0x00 8. " DIR72 ,Pin 72 direction" "Output,Input" textline " " bitfld.long 0x00 7. " DIR71 ,Pin 71 direction" "Output,Input" bitfld.long 0x00 6. " DIR70 ,Pin 70 direction" "Output,Input" bitfld.long 0x00 5. " DIR69 ,Pin 69 direction" "Output,Input" bitfld.long 0x00 4. " DIR68 ,Pin 68 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR67 ,Pin 67 direction" "Output,Input" bitfld.long 0x00 2. " DIR66 ,Pin 66 direction" "Output,Input" bitfld.long 0x00 1. " DIR65 ,Pin 65 direction" "Output,Input" bitfld.long 0x00 0. " DIR64 ,Pin 64 direction" "Output,Input" line.long 0x04 "OUT_DATA45,GPIO Banks 4 and 5 Output Data Register" setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT95_set/clr ,Output drive state of GPIO pin 95" "Low,High" setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT94_set/clr ,Output drive state of GPIO pin 94" "Low,High" setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT93_set/clr ,Output drive state of GPIO pin 93" "Low,High" textline " " setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT92_set/clr ,Output drive state of GPIO pin 92" "Low,High" setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT91_set/clr ,Output drive state of GPIO pin 91" "Low,High" setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT90_set/clr ,Output drive state of GPIO pin 90" "Low,High" textline " " setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT89_set/clr ,Output drive state of GPIO pin 89" "Low,High" setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT88_set/clr ,Output drive state of GPIO pin 88" "Low,High" setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT87_set/clr ,Output drive state of GPIO pin 87" "Low,High" textline " " setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT86_set/clr ,Output drive state of GPIO pin 86" "Low,High" setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT85_set/clr ,Output drive state of GPIO pin 85" "Low,High" setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT84_set/clr ,Output drive state of GPIO pin 84" "Low,High" textline " " setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT83_set/clr ,Output drive state of GPIO pin 83" "Low,High" setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT82_set/clr ,Output drive state of GPIO pin 82" "Low,High" setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT81_set/clr ,Output drive state of GPIO pin 81" "Low,High" textline " " setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT80_set/clr ,Output drive state of GPIO pin 80" "Low,High" setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT79_set/clr ,Output drive state of GPIO pin 79" "Low,High" setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT78_set/clr ,Output drive state of GPIO pin 78" "Low,High" textline " " setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT77_set/clr ,Output drive state of GPIO pin 77" "Low,High" setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT76_set/clr ,Output drive state of GPIO pin 76" "Low,High" setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT75_set/clr ,Output drive state of GPIO pin 75" "Low,High" textline " " setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT74_set/clr ,Output drive state of GPIO pin 74" "Low,High" setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT73_set/clr ,Output drive state of GPIO pin 73" "Low,High" setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT72_set/clr ,Output drive state of GPIO pin 72" "Low,High" textline " " setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT71_set/clr ,Output drive state of GPIO pin 71" "Low,High" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT70_set/clr ,Output drive state of GPIO pin 70" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT69_set/clr ,Output drive state of GPIO pin 69" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT68_set/clr ,Output drive state of GPIO pin 68" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT67_set/clr ,Output drive state of GPIO pin 67" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT66_set/clr ,Output drive state of GPIO pin 66" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT65_set/clr ,Output drive state of GPIO pin 65" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT64_set/clr ,Output drive state of GPIO pin 64" "Low,High" group.long 0x70++0x3 line.long 0x00 "IN_DATA45,GPIO Banks 4 and 5 Input Data Register" bitfld.long 0x00 31. " IN95 ,Status of GPIO pin 95" "Low,High" bitfld.long 0x00 30. " IN94 ,Status of GPIO pin 94" "Low,High" bitfld.long 0x00 29. " IN93 ,Status of GPIO pin 93" "Low,High" bitfld.long 0x00 28. " IN92 ,Status of GPIO pin 92" "Low,High" bitfld.long 0x00 27. " IN91 ,Status of GPIO pin 91" "Low,High" bitfld.long 0x00 26. " IN90 ,Status of GPIO pin 90" "Low,High" textline " " bitfld.long 0x00 25. " IN89 ,Status of GPIO pin 89" "Low,High" bitfld.long 0x00 24. " IN88 ,Status of GPIO pin 88" "Low,High" bitfld.long 0x00 23. " IN87 ,Status of GPIO pin 87" "Low,High" bitfld.long 0x00 22. " IN86 ,Status of GPIO pin 86" "Low,High" bitfld.long 0x00 21. " IN85 ,Status of GPIO pin 85" "Low,High" bitfld.long 0x00 20. " IN84 ,Status of GPIO pin 84" "Low,High" textline " " bitfld.long 0x00 19. " IN83 ,Status of GPIO pin 83" "Low,High" bitfld.long 0x00 18. " IN82 ,Status of GPIO pin 82" "Low,High" bitfld.long 0x00 17. " IN81 ,Status of GPIO pin 81" "Low,High" bitfld.long 0x00 16. " IN80 ,Status of GPIO pin 80" "Low,High" bitfld.long 0x00 15. " IN79 ,Status of GPIO pin 79" "Low,High" bitfld.long 0x00 14. " IN78 ,Status of GPIO pin 78" "Low,High" textline " " bitfld.long 0x00 13. " IN77 ,Status of GPIO pin 77" "Low,High" bitfld.long 0x00 12. " IN76 ,Status of GPIO pin 76" "Low,High" bitfld.long 0x00 11. " IN75 ,Status of GPIO pin 75" "Low,High" bitfld.long 0x00 10. " IN74 ,Status of GPIO pin 74" "Low,High" bitfld.long 0x00 9. " IN73 ,Status of GPIO pin 73" "Low,High" bitfld.long 0x00 8. " IN72 ,Status of GPIO pin 72" "Low,High" textline " " bitfld.long 0x00 7. " IN71 ,Status of GPIO pin 71" "Low,High" bitfld.long 0x00 6. " IN70 ,Status of GPIO pin 70" "Low,High" bitfld.long 0x00 5. " IN69 ,Status of GPIO pin 69" "Low,High" bitfld.long 0x00 4. " IN68 ,Status of GPIO pin 68" "Low,High" bitfld.long 0x00 3. " IN67 ,Status of GPIO pin 67" "Low,High" bitfld.long 0x00 2. " IN66 ,Status of GPIO pin 66" "Low,High" textline " " bitfld.long 0x00 1. " IN65 ,Status of GPIO pin 65" "Low,High" bitfld.long 0x00 0. " IN64 ,Status of GPIO pin 64" "Low,High" group.long 0x88++0x7 "GPIO Bank 6" line.long 0x00 "DIR6,GPIO Bank 6 Direction Register" bitfld.long 0x00 7. " DIR103 ,Pin 103 direction" "Output,Input" bitfld.long 0x00 6. " DIR102 ,Pin 102 direction" "Output,Input" bitfld.long 0x00 5. " DIR101 ,Pin 101 direction" "Output,Input" bitfld.long 0x00 4. " DIR100 ,Pin 100 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR99 ,Pin 99 direction" "Output,Input" bitfld.long 0x00 2. " DIR98 ,Pin 98 direction" "Output,Input" bitfld.long 0x00 1. " DIR97 ,Pin 97 direction" "Output,Input" bitfld.long 0x00 0. " DIR96 ,Pin 96 direction" "Output,Input" line.long 0x04 "OUT_DATA6,GPIO Bank 6 Output Data Register" setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT103_set/clr ,Output drive state of GPIO pin 103" "Low,High" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT102_set/clr ,Output drive state of GPIO pin 102" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT101_set/clr ,Output drive state of GPIO pin 101" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT100_set/clr ,Output drive state of GPIO pin 100" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT99_set/clr ,Output drive state of GPIO pin 99" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT98_set/clr ,Output drive state of GPIO pin 98" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT97_set/clr ,Output drive state of GPIO pin 97" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT96_set/clr ,Output drive state of GPIO pin 96" "Low,High" group.long 0x98++0x3 line.long 0x00 "IN_DATA6,GPIO Bank 6 Input Data Register" bitfld.long 0x00 7. " IN103 ,Status of GPIO pin 103" "Low,High" bitfld.long 0x00 6. " IN102 ,Status of GPIO pin 102" "Low,High" bitfld.long 0x00 5. " IN101 ,Status of GPIO pin 101" "Low,High" bitfld.long 0x00 4. " IN100 ,Status of GPIO pin 100" "Low,High" bitfld.long 0x00 3. " IN99 ,Status of GPIO pin 99" "Low,High" textline " " bitfld.long 0x00 2. " IN98 ,Status of GPIO pin 98" "Low,High" bitfld.long 0x00 1. " IN97 ,Status of GPIO pin 97" "Low,High" bitfld.long 0x00 0. " IN96 ,Status of GPIO pin 96" "Low,High" width 0xb tree.end tree "I2C (Inter-Integrated Circuit)" base asd:0x01C21000 width 8. if (((data.long(asd:0x01C21000+0x24))&0x100)==(0x000)) group.long 0x00++0x3 line.long 0x00 "ICOAR,I2C Own Address Register" hexmask.long.byte 0x00 0.--6. 1. " OADDR ,Slave address of the I2C module" else group.long 0x00++0x3 line.long 0x00 "ICOAR,I2C Own Address Register" hexmask.long.word 0x00 0.--9. 1. " OADDR ,Slave address of the I2C module" endif group.long 0x04++0x13 line.long 0x00 "ICIMR,I2C Interrupt Mask Register" bitfld.long 0x00 6. " AAS ,Address-as-slave interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " SCD ,Stop condition detected interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " ICXRDY ,Transmit-data-ready interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ICRRDY ,Receive-data-ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ARDY ,Register-access-ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,No-acknowledgment interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AL ,Arbitration-lost interrupt enable" "Disabled,Enabled" line.long 0x04 "ICSTR,I2C Status Register" eventfld.long 0x04 14. " SDIR ,Slave direction" "Receiver,Transmitter" eventfld.long 0x04 13. " NACKSNT ,NACK sent" "Not sent,Sent" eventfld.long 0x04 12. " BB ,Bus busy" "Free,Busy" textline " " bitfld.long 0x04 11. " RSFULL ,Receive shift register full" "No overrun,Overrun" bitfld.long 0x04 10. " XSMT ,Transmit shift register empty" "Underflow,No underflow" bitfld.long 0x04 9. " AAS ,Addressed-as-slave" "Cleared,Recognized" textline " " bitfld.long 0x04 8. " AD0 ,Address 0 bit" "Cleared,Detected" eventfld.long 0x04 5. " SCD ,Stop condition detected" "Not detected,Detected" eventfld.long 0x04 4. " ICXRDY ,Transmit-data-ready interrupt flag" "Not ready,Ready" textline " " eventfld.long 0x04 3. " ICRRDY ,Receive-data-ready interrupt flag" "Not ready,Ready" eventfld.long 0x04 2. " ARDY ,Register-access-ready interrupt flag" "Not ready,Ready" eventfld.long 0x04 1. " NACK ,No-acknowledgement interrupt flag" "Not received,Received" textline " " eventfld.long 0x04 0. " AL ,Arbitration-lost interrupt flag" "Not lost,Lost" line.long 0x08 "ICCLKL,I2C Clock Divider Register Low" hexmask.long.word 0x08 0.--15. 1. " ICCL ,Clock low-time divide-down value" line.long 0x0c "ICCLKH,I2C Clock Divider Register High" hexmask.long.word 0x0c 0.--15. 1. " ICCH ,Clock high-time divide-down value" line.long 0x10 "ICCNT,I2C Data Count Register" hexmask.long.word 0x10 0.--15. 1. " ICDC ,Data count value" rgroup.long 0x18++0x3 line.long 0x00 "ICDRR,I2C Data Receive Register" hexmask.long.byte 0x00 0.--7. 1. " D ,Receive data" if (((data.long(asd:0x01C21000+0x24))&0x100)==(0x000)) group.long 0x1c++0x3 line.long 0x00 "ICSAR,I2C Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADDR ,Slave address transmitted in master-transmitter mode" else group.long 0x1c++0x3 line.long 0x00 "ICSAR,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 1. " SADDR ,Slave address transmitted in master-transmitter mode" endif group.long 0x20++0x7 line.long 0x00 "ICDXR,I2C Data Transmit Register" hexmask.long.byte 0x00 0.--7. 1. " D ,Transmit data" line.long 0x04 "ICMDR,I2C Mode Register" bitfld.long 0x04 15. " NACKMOD ,NACK mode" "ACK,NACK" bitfld.long 0x04 14. " FREE ,Emulation mode" "Stopped,Run free" bitfld.long 0x04 13. " STT ,START condition" "Not generated,Generated" textline " " bitfld.long 0x04 11. " STP ,STOP condition" "Not generated,Generated" bitfld.long 0x04 10. " MST ,Master mode" "Slave,Master" bitfld.long 0x04 09. " TRX ,Transmitter mode" "Receiver,Transmitter" textline " " bitfld.long 0x04 08. " XA ,Expanded address mode" "7-bit,10-bit" bitfld.long 0x04 07. " RM ,Repeat mode" "Non-repeat,Repeat" bitfld.long 0x04 06. " DLB ,Digital loopback mode" "Disabled,Enabled" textline " " bitfld.long 0x04 05. " IRS ,I2C module reset" "Reset,No reset" bitfld.long 0x04 04. " STB ,START byte mode" "Disabled,Enabled" bitfld.long 0x04 03. " FDF ,Free data format mode" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--2. " BC ,Bit count" "8-bits/word,1-bit/word,2-bits/word,3-bits/word,4-bits/word,5-bits/word,6-bits/word,7-bits/word" rgroup.long 0x28++0x3 line.long 0x00 "ICIVR,I2C Interrupt Vector Register" bitfld.long 0x00 0.--2. " INTCODE ,Interrupt code" "None,AL,NACK,ARDY,ICRRDY,ICXRDY,SCD,AAS" group.long 0x2c++0x3 line.long 0x00 "ICEMDR,I2C Extended Mode Register" bitfld.long 0x00 1. " IGNACK ,Ignore NACK mode" "Not ignored,Ignored" bitfld.long 0x00 0. " BCM ,Backward compatibility mode" "More data,Data copied" group.long 0x30++0x3 line.long 0x00 "ICPSC,I2C Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. " IPSC ,I2C prescaler divide-down value" sif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x34++0x7 line.long 0x00 "REVID1,I2C Revision Identification Register" hexmask.long.word 0x00 0.--15. 1. " REVID1 ,Identifies revision of peripheral" line.long 0x04 "REVID2,I2C Revision Identification Register" hexmask.long.byte 0x04 0.--7. 1. " REVID2 ,Peripheral Identification Number" group.long 0x48++0x17 line.long 0x00 "ICPFUNC,I2C Pin Function Register" bitfld.long 0x00 0. " PFUNC0 ,Controls the function of the I2C_SCL and I2C_SDA pins" "I2C_SCL & I2C_SDA,GPIO" line.long 0x04 "ICPDIR,I2C Pin Direction Register" bitfld.long 0x04 1. " PDIR1 ,Controls the direction of the I2C_SDA pin when configured as GPIO" "Input,Output" bitfld.long 0x04 0. " PDIR0 ,Controls the direction of the I2C_SCL pin when configured as GPIO" "Input,Output" line.long 0x08 "ICPDIN,I2C Pin Data In Register" bitfld.long 0x08 1. " PDIN1 ,Indicates the logic level present on the I2C_SDA pin" "Low,High" bitfld.long 0x08 0. " PDIN0 ,Indicates the logic level present on the I2C_SCL pin" "Low,High" line.long 0x0c "ICPDOUT,I2C Pin Data Out Register" bitfld.long 0x0c 1. " PDOUT1 ,Controls the level driven on the I2C_SDA pin when GPIO" "Low,High" bitfld.long 0x0c 0. " PDOUT0 ,Controls the level driven on the I2C_SCL pin when GPIO" "Low,High" line.long 0x10 "ICPDSET,I2C Pin Data Set Register" bitfld.long 0x10 1. " PDSET1 ,Set the PDOUT1 bit in the I2C pin data out register" "Low,High" bitfld.long 0x10 0. " PDSET0 ,Set the PDOUT0 bit in the I2C pin data out register" "Low,High" line.long 0x14 "ICPDCLR,I2C Pin Data Clear Register" bitfld.long 0x14 1. " PDCLR1 ,Clear the PDOUT1 bit in the I2C pin data out register" "Not cleared,Cleared" bitfld.long 0x14 0. " PDCLR0 ,Clear the PDOUT0 bit in the I2C pin data out register" "Not cleared,Cleared" else rgroup.long 0x34++0x7 line.long 0x00 "ICPID1,I2C Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" line.long 0x04 "ICPID2,I2C Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYPE ,Peripheral type" endif width 0xb tree.end tree.open "MMC/SD (Multimedia Card/Secure Digital Card Controller)" tree "MMC/SD 0" base asd:0x01d11000 width 12. group.long 0x00++0x07 line.long 0x00 "MMCTL,MMC Control Register" bitfld.long 0x00 6.--7. " DATEG ,DAT3 edge detection select" "Disabled,Rising edge,Falling edge,Both" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x00 2. " WIDTH0 ,Data bus width bit 0" "1 bit,4 bits" else bitfld.long 0x00 2. " WIDTH ,Data bus width" "1 bit,4 bits" endif bitfld.long 0x00 1. " CMDRST ,CMD logic reset" "No reset,Reset" bitfld.long 0x00 0. " DATRST ,DAT logic reset" "No reset,Reset" line.long 0x04 "MMCCLK,MMC Memory Clock Control Register" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x04 9. " DIV4 ,DIV4 option" "/(2*(CLKRT+1)),/(4*(CLKRT+1))" endif newline bitfld.long 0x04 8. " CLKEN ,CLK pin enable" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CLKRT ,Clock rate. Use this field to set the divide-down value for the memory clock" newline hgroup.long 0x08++0x3 hide.long 0x00 "MMCST0,MMC Status Register 0" in newline rgroup.long 0x0C++0x3 line.long 0x00 "MMCST1,MMC Status Register 1" bitfld.long 0x00 6. " FIFOFUL ,FIFO is full" "Not full,Full" bitfld.long 0x00 5. " FIFOEMP ,FIFO is empty" "Not empty,Empty" bitfld.long 0x00 4. " DAT3ST ,DAT3 status" "Low,High" bitfld.long 0x00 3. " DRFUL ,Data receive register (MMCDRR) is full" "Not detected,Detected" newline bitfld.long 0x00 2. " DXEMP ,Data transmit register (MMCDXR) is empty" "Not detected,Detected" bitfld.long 0x00 1. " CLKSTP ,Clock stop status" "Active,Stopped" bitfld.long 0x00 0. " BUSY ,Busy signal" "Not detected,Detected" group.long 0x10++0x3 line.long 0x00 "MMCIM,MMC Interrupt Mask Register" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x00 13. " ECCS ,Command Completion Signal permission" "Prohibited,Permitted" endif newline bitfld.long 0x00 12. " ETRNDNE ,Transfer done (TRNDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " EDATED ,DAT3 edge detect (DATED) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " EDRRDY ,Data receive register ready (DRRDY) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " EDXRDY ,Data transmit register (MMCDXR) ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " ECRCRS ,Response CRC error (CRCRS) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " ECRCRD ,Read-data CRC error (CRCRD) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " ECRCWR ,Write-data CRC error (CRCWR) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " ETOUTRS ,Response time-out event (TOUTRS) interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " ETOUTRD ,Read-data time-out event (TOUTRD) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ERSPDNE ,Command/response done (RSPDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " EBSYDNE ,Busy done (BSYDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " EDATDNE ,Data done (DATDNE) interrupt enable" "Disabled,Enabled" group.long 0x14++0x0F line.long 0x00 "MMCTOR,MMC Response Time-Out Register" sif cpuis("DM357") hexmask.long.byte 0x00 8.--12. 1. " TOD_20_16 ,Data read time-out count upper 5 bits" elif (cpuis("DM365")||cpuis("DM368")) hexmask.long.word 0x00 8.--17. 1. " TOD_25_16 ,Data read time-out count upper 10 bits" else hexmask.long.byte 0x00 8.--15. 1. " TOD_23_16 ,Data read time-out count upper 8 bits" endif newline hexmask.long.byte 0x00 0.--7. 1. " TOR ,Time-out count for response" line.long 0x04 "MMCTOD,MMC Data Read Time-Out Register" hexmask.long.word 0x04 0.--15. 1. " TOD_15_0 ,Data read time-out count" line.long 0x08 "MMCBLEN,MMC Block Length Register" hexmask.long.word 0x08 0.--11. 1. " BLEN ,Block length" line.long 0x0C "MMCNBLK,MMC Number of Blocks Register" hexmask.long.word 0x0C 0.--15. 1. " NBLK ,Number of blocks" rgroup.long 0x24++0x3 line.long 0x00 "MMCNBLC,MMC Number of Blocks Counter Register" hexmask.long.word 0x00 0.--15. 1. " NBLC ,Number of blocks remaining to be transferred" group.long 0x28++0x7 line.long 0x00 "MMCDRR,MMC Data Receive Register" line.long 0x04 "MMCDXR,MMC Data Transmit Register" if (((d.l(asd:0x01d11000+0x30))&0x2000)==0x2000) group.long 0x30++0x3 line.long 0x00 "MMCCMD,MMC Command Register" bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled" bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared" bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted" bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer" newline bitfld.long 0x00 12. " STRMTP ,Stream enable" "Block,Stream" bitfld.long 0x00 11. " DTRW ,Write enable" "Read,Write" bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3" bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled" newline bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index" else group.long 0x30++0x3 line.long 0x00 "MMCCMD,MMC Command Register" bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled" bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared" bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted" bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer" newline bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3" bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled" bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index" endif group.long 0x34++0x3 line.long 0x00 "MMCARGHL,MMC Argument Register" hexmask.long.word 0x00 16.--31. 1. " ARGH ,Argument - high part" hexmask.long.word 0x00 0.--15. 1. " ARGL ,Argument - low part" if ((((d.l(asd:0x01d11000+0x30))&0x600)==0x200)||(((d.l(asd:0x01d11000+0x30))&0x600)==0x600)) hgroup.long 0x38++0x3 hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hgroup.long 0x3C++0x3 hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3" sif cpuis("DM357") group.long 0x40++0x7 else rgroup.long 0x40++0x7 endif line.long 0x00 "MMCRSP45,MMC Response Register 4 and 5" hexmask.long.byte 0x00 16.--23. 1. " MMCRSP5 ,MMC Response Register 5" line.long 0x04 "MMCRSP67,MMC Response Register 6 and 7" hexmask.long.word 0x04 16.--31. 1. " MMCRSP7 ,MMC Response Register 7" hexmask.long.word 0x04 0.--15. 1. " MMCRSP6 ,MMC Response Register 6" elif (((d.l(asd:0x01d11000+0x30))&0x600)==0x400) sif cpuis("DM357") group.long 0x38++0xF else rgroup.long 0x38++0xF endif line.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hexmask.long.word 0x00 16.--31. 1. " MMCRSP1 ,MMC Response Register 1" hexmask.long.word 0x00 0.--15. 1. " MMCRSP0 ,MMC Response Register 0" line.long 0x04 "MMCRSP23,MMC Response Register 2 and 3" hexmask.long.word 0x04 16.--31. 1. " MMCRSP3 ,MMC Response Register 3" hexmask.long.word 0x04 0.--15. 1. " MMCRSP2 ,MMC Response Register 2" line.long 0x08 "MMCRSP45,MMC Response Register 4 and 5" hexmask.long.word 0x08 16.--31. 1. " MMCRSP5 ,MMC Response Register 5" hexmask.long.word 0x08 0.--15. 1. " MMCRSP4 ,MMC Response Register 4" line.long 0x0C "MMCRSP67,MMC Response Register 6 and 7" hexmask.long.word 0x0C 16.--31. 1. " MMCRSP7 ,MMC Response Register 7" hexmask.long.word 0x0C 0.--15. 1. " MMCRSP6 ,MMC Response Register 6" else hgroup.long 0x38++0x3 hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hgroup.long 0x3C++0x3 hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3" hgroup.long 0x40++0x3 hide.long 0x00 "MMCRSP45,MMC Response Register 4 and 5" hgroup.long 0x44++0x3 hide.long 0x00 "MMCRSP67,MMC Response Register 6 and 7" endif group.long 0x48++0x3 line.long 0x00 "MMCDRSP,MMC Data Response Register" hexmask.long.byte 0x00 0.--7. 1. " DRSP ,CRC status token" group.long 0x50++0x3 line.long 0x00 "MMCCIDX,MMC Command Index Register" bitfld.long 0x00 7. " STRT ,Start bit" "0,1" bitfld.long 0x00 6. " XMIT ,Transmission bit" "0,1" hexmask.long.byte 0x00 0.--5. 1. " CIDX ,Command index" group.long 0x64++0x3 line.long 0x00 "SDIOCTL,SDIO Control Register" bitfld.long 0x00 1. " RDWTCR ,Read wait enable for CRC error" "Disabled,Enabled" bitfld.long 0x00 0. " RDWTRQ ,Read wait request" "Ended,Set" rgroup.long 0x68++0x3 line.long 0x00 "SDIOST0,SDIO Status Register 0" bitfld.long 0x00 2. " RDWTST ,Read wait status" "Not in progress,In progress" bitfld.long 0x00 1. " INTPRD ,Interrupt period" "Not in progress,In progress" bitfld.long 0x00 0. " DAT1 ,External state of the SD_DATA1 pin" "Low,High" group.long 0x6C++0xB line.long 0x00 "SDIOIEN,SDIO Interrupt Enable Register" bitfld.long 0x00 1. " RWSEN ,Read wait interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOINTEN ,SDIO card interrupt enable" "Disabled,Enabled" line.long 0x04 "SDIOIST,SDIO Interrupt Status Register" eventfld.long 0x04 1. " RWS ,Read wait interrupt status" "Not occurred,Occurred" eventfld.long 0x04 0. " IOINT ,SDIO card interrupt status" "Not occurred,Occurred" line.long 0x08 "MMCFIFOCTL,MMC FIFO Control Register" bitfld.long 0x08 3.--4. " ACCWD ,Access width" "4 bytes,3 bytes,2 bytes,1 byte" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "256 bits,512 bits" else bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "128 bits,256 bits" endif bitfld.long 0x08 1. " FIFODIR ,FIFO direction" "Read,Write" bitfld.long 0x08 0. " FIFORST ,FIFO reset" "No reset,Reset" width 0x0B tree.end tree "MMC/SD 1" base asd:0x01d00000 width 12. group.long 0x00++0x07 line.long 0x00 "MMCTL,MMC Control Register" bitfld.long 0x00 6.--7. " DATEG ,DAT3 edge detection select" "Disabled,Rising edge,Falling edge,Both" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x00 2. " WIDTH0 ,Data bus width bit 0" "1 bit,4 bits" else bitfld.long 0x00 2. " WIDTH ,Data bus width" "1 bit,4 bits" endif bitfld.long 0x00 1. " CMDRST ,CMD logic reset" "No reset,Reset" bitfld.long 0x00 0. " DATRST ,DAT logic reset" "No reset,Reset" line.long 0x04 "MMCCLK,MMC Memory Clock Control Register" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x04 9. " DIV4 ,DIV4 option" "/(2*(CLKRT+1)),/(4*(CLKRT+1))" endif newline bitfld.long 0x04 8. " CLKEN ,CLK pin enable" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CLKRT ,Clock rate. Use this field to set the divide-down value for the memory clock" newline hgroup.long 0x08++0x3 hide.long 0x00 "MMCST0,MMC Status Register 0" in newline rgroup.long 0x0C++0x3 line.long 0x00 "MMCST1,MMC Status Register 1" bitfld.long 0x00 6. " FIFOFUL ,FIFO is full" "Not full,Full" bitfld.long 0x00 5. " FIFOEMP ,FIFO is empty" "Not empty,Empty" bitfld.long 0x00 4. " DAT3ST ,DAT3 status" "Low,High" bitfld.long 0x00 3. " DRFUL ,Data receive register (MMCDRR) is full" "Not detected,Detected" newline bitfld.long 0x00 2. " DXEMP ,Data transmit register (MMCDXR) is empty" "Not detected,Detected" bitfld.long 0x00 1. " CLKSTP ,Clock stop status" "Active,Stopped" bitfld.long 0x00 0. " BUSY ,Busy signal" "Not detected,Detected" group.long 0x10++0x3 line.long 0x00 "MMCIM,MMC Interrupt Mask Register" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x00 13. " ECCS ,Command Completion Signal permission" "Prohibited,Permitted" endif newline bitfld.long 0x00 12. " ETRNDNE ,Transfer done (TRNDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " EDATED ,DAT3 edge detect (DATED) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " EDRRDY ,Data receive register ready (DRRDY) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " EDXRDY ,Data transmit register (MMCDXR) ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " ECRCRS ,Response CRC error (CRCRS) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " ECRCRD ,Read-data CRC error (CRCRD) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " ECRCWR ,Write-data CRC error (CRCWR) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " ETOUTRS ,Response time-out event (TOUTRS) interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " ETOUTRD ,Read-data time-out event (TOUTRD) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ERSPDNE ,Command/response done (RSPDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " EBSYDNE ,Busy done (BSYDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " EDATDNE ,Data done (DATDNE) interrupt enable" "Disabled,Enabled" group.long 0x14++0x0F line.long 0x00 "MMCTOR,MMC Response Time-Out Register" sif cpuis("DM357") hexmask.long.byte 0x00 8.--12. 1. " TOD_20_16 ,Data read time-out count upper 5 bits" elif (cpuis("DM365")||cpuis("DM368")) hexmask.long.word 0x00 8.--17. 1. " TOD_25_16 ,Data read time-out count upper 10 bits" else hexmask.long.byte 0x00 8.--15. 1. " TOD_23_16 ,Data read time-out count upper 8 bits" endif newline hexmask.long.byte 0x00 0.--7. 1. " TOR ,Time-out count for response" line.long 0x04 "MMCTOD,MMC Data Read Time-Out Register" hexmask.long.word 0x04 0.--15. 1. " TOD_15_0 ,Data read time-out count" line.long 0x08 "MMCBLEN,MMC Block Length Register" hexmask.long.word 0x08 0.--11. 1. " BLEN ,Block length" line.long 0x0C "MMCNBLK,MMC Number of Blocks Register" hexmask.long.word 0x0C 0.--15. 1. " NBLK ,Number of blocks" rgroup.long 0x24++0x3 line.long 0x00 "MMCNBLC,MMC Number of Blocks Counter Register" hexmask.long.word 0x00 0.--15. 1. " NBLC ,Number of blocks remaining to be transferred" group.long 0x28++0x7 line.long 0x00 "MMCDRR,MMC Data Receive Register" line.long 0x04 "MMCDXR,MMC Data Transmit Register" if (((d.l(asd:0x01d00000+0x30))&0x2000)==0x2000) group.long 0x30++0x3 line.long 0x00 "MMCCMD,MMC Command Register" bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled" bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared" bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted" bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer" newline bitfld.long 0x00 12. " STRMTP ,Stream enable" "Block,Stream" bitfld.long 0x00 11. " DTRW ,Write enable" "Read,Write" bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3" bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled" newline bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index" else group.long 0x30++0x3 line.long 0x00 "MMCCMD,MMC Command Register" bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled" bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared" bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted" bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer" newline bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3" bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled" bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index" endif group.long 0x34++0x3 line.long 0x00 "MMCARGHL,MMC Argument Register" hexmask.long.word 0x00 16.--31. 1. " ARGH ,Argument - high part" hexmask.long.word 0x00 0.--15. 1. " ARGL ,Argument - low part" if ((((d.l(asd:0x01d00000+0x30))&0x600)==0x200)||(((d.l(asd:0x01d00000+0x30))&0x600)==0x600)) hgroup.long 0x38++0x3 hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hgroup.long 0x3C++0x3 hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3" sif cpuis("DM357") group.long 0x40++0x7 else rgroup.long 0x40++0x7 endif line.long 0x00 "MMCRSP45,MMC Response Register 4 and 5" hexmask.long.byte 0x00 16.--23. 1. " MMCRSP5 ,MMC Response Register 5" line.long 0x04 "MMCRSP67,MMC Response Register 6 and 7" hexmask.long.word 0x04 16.--31. 1. " MMCRSP7 ,MMC Response Register 7" hexmask.long.word 0x04 0.--15. 1. " MMCRSP6 ,MMC Response Register 6" elif (((d.l(asd:0x01d00000+0x30))&0x600)==0x400) sif cpuis("DM357") group.long 0x38++0xF else rgroup.long 0x38++0xF endif line.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hexmask.long.word 0x00 16.--31. 1. " MMCRSP1 ,MMC Response Register 1" hexmask.long.word 0x00 0.--15. 1. " MMCRSP0 ,MMC Response Register 0" line.long 0x04 "MMCRSP23,MMC Response Register 2 and 3" hexmask.long.word 0x04 16.--31. 1. " MMCRSP3 ,MMC Response Register 3" hexmask.long.word 0x04 0.--15. 1. " MMCRSP2 ,MMC Response Register 2" line.long 0x08 "MMCRSP45,MMC Response Register 4 and 5" hexmask.long.word 0x08 16.--31. 1. " MMCRSP5 ,MMC Response Register 5" hexmask.long.word 0x08 0.--15. 1. " MMCRSP4 ,MMC Response Register 4" line.long 0x0C "MMCRSP67,MMC Response Register 6 and 7" hexmask.long.word 0x0C 16.--31. 1. " MMCRSP7 ,MMC Response Register 7" hexmask.long.word 0x0C 0.--15. 1. " MMCRSP6 ,MMC Response Register 6" else hgroup.long 0x38++0x3 hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hgroup.long 0x3C++0x3 hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3" hgroup.long 0x40++0x3 hide.long 0x00 "MMCRSP45,MMC Response Register 4 and 5" hgroup.long 0x44++0x3 hide.long 0x00 "MMCRSP67,MMC Response Register 6 and 7" endif group.long 0x48++0x3 line.long 0x00 "MMCDRSP,MMC Data Response Register" hexmask.long.byte 0x00 0.--7. 1. " DRSP ,CRC status token" group.long 0x50++0x3 line.long 0x00 "MMCCIDX,MMC Command Index Register" bitfld.long 0x00 7. " STRT ,Start bit" "0,1" bitfld.long 0x00 6. " XMIT ,Transmission bit" "0,1" hexmask.long.byte 0x00 0.--5. 1. " CIDX ,Command index" group.long 0x64++0x3 line.long 0x00 "SDIOCTL,SDIO Control Register" bitfld.long 0x00 1. " RDWTCR ,Read wait enable for CRC error" "Disabled,Enabled" bitfld.long 0x00 0. " RDWTRQ ,Read wait request" "Ended,Set" rgroup.long 0x68++0x3 line.long 0x00 "SDIOST0,SDIO Status Register 0" bitfld.long 0x00 2. " RDWTST ,Read wait status" "Not in progress,In progress" bitfld.long 0x00 1. " INTPRD ,Interrupt period" "Not in progress,In progress" bitfld.long 0x00 0. " DAT1 ,External state of the SD_DATA1 pin" "Low,High" group.long 0x6C++0xB line.long 0x00 "SDIOIEN,SDIO Interrupt Enable Register" bitfld.long 0x00 1. " RWSEN ,Read wait interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOINTEN ,SDIO card interrupt enable" "Disabled,Enabled" line.long 0x04 "SDIOIST,SDIO Interrupt Status Register" eventfld.long 0x04 1. " RWS ,Read wait interrupt status" "Not occurred,Occurred" eventfld.long 0x04 0. " IOINT ,SDIO card interrupt status" "Not occurred,Occurred" line.long 0x08 "MMCFIFOCTL,MMC FIFO Control Register" bitfld.long 0x08 3.--4. " ACCWD ,Access width" "4 bytes,3 bytes,2 bytes,1 byte" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "256 bits,512 bits" else bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "128 bits,256 bits" endif bitfld.long 0x08 1. " FIFODIR ,FIFO direction" "Read,Write" bitfld.long 0x08 0. " FIFORST ,FIFO reset" "No reset,Reset" width 0x0B tree.end tree.end tree.open "PWM (Pulse-Width Modulator)" tree "PWM 0" width 7. base asd:0x01c22000 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM0 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM0 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM0 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM0 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM0 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM0 Period Register" line.long 0x08 "PH1D,PWM0 First-Phase Duration Register" width 0xb tree.end tree "PWM 1" width 7. base asd:0x01c22400 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM1 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM1 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM1 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM1 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM1 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM1 Period Register" line.long 0x08 "PH1D,PWM1 First-Phase Duration Register" width 0xb tree.end tree "PWM 2" width 7. base asd:0x01c22800 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM2 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM2 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM2 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM2 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM2 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM2 Period Register" line.long 0x08 "PH1D,PWM2 First-Phase Duration Register" width 0xb tree.end tree "PWM 3" width 7. base asd:0x01c22c00 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM3 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM3 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM3 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM3 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM3 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM3 Period Register" line.long 0x08 "PH1D,PWM3 First-Phase Duration Register" width 0xb tree.end tree.end tree.open "SPI (Serial Peripheral Interface)" tree "SPI 0" base asd:0x01c66000 width 10. group.long 0x00++0xf line.long 0x00 "SPIGCR0,SPI Global Control Register 0" bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset" line.long 0x04 "SPIGCR1,SPI Global Control Register 1" bitfld.long 0x04 24. " SPIEN ,SPI enable" "Disabled,Enabled" bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled" bitfld.long 0x04 8. " POWERDOWN ,SPI state machines enter a power-down state" "Active,Power-down" textline " " bitfld.long 0x04 1. " CLKMOD ,Clock mode" "External,Internal" bitfld.long 0x04 0. " MASTER ,SPIx_SIMO pin direction" "SPIx_SIMO,SPIx_SOMI" line.long 0x08 "SPIINT,SPI Interrupt Register" bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled" bitfld.long 0x08 9. " TXINTENA ,Transmit interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 8. " RXINTENA ,Receive interrupt enable" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " OVRNINTENA ,Overrun interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt" bitfld.long 0x08 2. " PARERRENA ,Enables interrupt on parity error" "No interrupt,Interrupt" line.long 0x0c "SPILVL,SPI Interrupt Level Register" bitfld.long 0x0c 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1" bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1" bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1" textline " " bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1" bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "SPINT0,SPINT1" hgroup.long 0x10++0x3 hide.long 0x00 "SPIFLG,SPI Flag Register" in group.long 0x14++0x3 line.long 0x00 "SPIPC0,SPI Pin Control Register 0" bitfld.long 0x00 11. " SOMIFUN ,SPI data input (SPIx_SOMI) functional pin" "Reserved,Functional" bitfld.long 0x00 10. " SIMOFUN ,SPI data output (SPIx_SIMO) functional pin" "Reserved,Functional" bitfld.long 0x00 9. " SCLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional" textline " " bitfld.long 0x00 1. " SCS1FUN ,SPI slave 1 (/SPIx_SCS[1]) functional pin" "Reserved,Functional" bitfld.long 0x00 0. " SCSFUN ,SPI slave 0 (/SPIx_SCS[0]) functional pin" "Reserved,Functional" rgroup.long 0x1c++0x3 line.long 0x00 "SPIPC2,SPI Pin Control Register 2" bitfld.long 0x00 11. " SOMIDIN ,SSPI data input ( SPIx_SOMI) pin value" "0,1" bitfld.long 0x00 10. " SIMODIN ,SPI data output (SPIx_SIMO) pin value" "0,1" bitfld.long 0x00 9. " SCLKDIN ,SPI clock (SPIx_SCLK) pin value" "0,1" textline " " bitfld.long 0x00 1. " SCS1DIN ,SPI slave 1 (/PIx_SCS[1]) pin value" "0,1" bitfld.long 0x00 0. " SCS0DIN ,SPI slave 0 (/SPIx_SCS[0]) pin value" "0,1" group.long 0x3c++0x3 line.long 0x00 "SPIDAT1,SPI Shift Register" bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active" bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled" bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3" textline " " bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPIx_SCS[1],/SPIx_SCS[0],None" hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,Transfer data" hgroup.long 0x40++0x3 hide.long 0x00 "SPIBUF,SPI Buffer Register" in rgroup.long 0x44++0x3 line.long 0x00 "SPIEMU,SPI Emulation Register" hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation" group.long 0x48++0x7 line.long 0x00 "SPIDELAY,SPI Delay Register" hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay" hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay" line.long 0x04 "SPIDEF,SPI Default Chip Select Register" bitfld.long 0x04 1. " SCS1DEF ,Chip select default pattern" "0,1" bitfld.long 0x04 0. " SCS0DEF ,Chip select default pattern" "0,1" width 10. group.long 0x50++0xf line.long 0x0 "SPIFMT0,SPI Data Format Register 0" bitfld.long 0x0 24.--29. " WDELAY0 ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 23. " PARPOL0 ,Parity polarity for data format 0" "Even,Odd" textline " " bitfld.long 0x0 22. " PARITYENA0 ,Parity enable for data format 0" "Disabled,Enabled" bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first" textline " " bitfld.long 0x0 18. " DISCSTIMERS0 ,Disable chip select timers for this format register 0" "No,Yes" bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive" textline " " bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle" hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0" textline " " bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x4 "SPIFMT1,SPI Data Format Register 1" bitfld.long 0x4 24.--29. " WDELAY1 ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x4 23. " PARPOL1 ,Parity polarity for data format 1" "Even,Odd" textline " " bitfld.long 0x4 22. " PARITYENA1 ,Parity enable for data format 1" "Disabled,Enabled" bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first" textline " " bitfld.long 0x4 18. " DISCSTIMERS1 ,Disable chip select timers for this format register 1" "No,Yes" bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive" textline " " bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle" hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1" textline " " bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x8 "SPIFMT2,SPI Data Format Register 2" bitfld.long 0x8 24.--29. " WDELAY2 ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 23. " PARPOL2 ,Parity polarity for data format 2" "Even,Odd" textline " " bitfld.long 0x8 22. " PARITYENA2 ,Parity enable for data format 2" "Disabled,Enabled" bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first" textline " " bitfld.long 0x8 18. " DISCSTIMERS2 ,Disable chip select timers for this format register 2" "No,Yes" bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive" textline " " bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle" hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2" textline " " bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0xC "SPIFMT3,SPI Data Format Register 3" bitfld.long 0xC 24.--29. " WDELAY3 ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0xC 23. " PARPOL3 ,Parity polarity for data format 3" "Even,Odd" textline " " bitfld.long 0xC 22. " PARITYENA3 ,Parity enable for data format 3" "Disabled,Enabled" bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first" textline " " bitfld.long 0xC 18. " DISCSTIMERS3 ,Disable chip select timers for this format register 3" "No,Yes" bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive" textline " " bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle" hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3" textline " " bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" hgroup.long 0x60++0x3 hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0" in hgroup.long 0x64++0x03 hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1" in width 0xb tree.end tree "SPI 1" base asd:0x01c66800 width 10. group.long 0x00++0xf line.long 0x00 "SPIGCR0,SPI Global Control Register 0" bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset" line.long 0x04 "SPIGCR1,SPI Global Control Register 1" bitfld.long 0x04 24. " SPIEN ,SPI enable" "Disabled,Enabled" bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled" bitfld.long 0x04 8. " POWERDOWN ,SPI state machines enter a power-down state" "Active,Power-down" textline " " bitfld.long 0x04 1. " CLKMOD ,Clock mode" "External,Internal" bitfld.long 0x04 0. " MASTER ,SPIx_SIMO pin direction" "SPIx_SIMO,SPIx_SOMI" line.long 0x08 "SPIINT,SPI Interrupt Register" bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled" bitfld.long 0x08 9. " TXINTENA ,Transmit interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 8. " RXINTENA ,Receive interrupt enable" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " OVRNINTENA ,Overrun interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt" bitfld.long 0x08 2. " PARERRENA ,Enables interrupt on parity error" "No interrupt,Interrupt" line.long 0x0c "SPILVL,SPI Interrupt Level Register" bitfld.long 0x0c 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1" bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1" bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1" textline " " bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1" bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "SPINT0,SPINT1" hgroup.long 0x10++0x3 hide.long 0x00 "SPIFLG,SPI Flag Register" in group.long 0x14++0x3 line.long 0x00 "SPIPC0,SPI Pin Control Register 0" bitfld.long 0x00 11. " SOMIFUN ,SPI data input (SPIx_SOMI) functional pin" "Reserved,Functional" bitfld.long 0x00 10. " SIMOFUN ,SPI data output (SPIx_SIMO) functional pin" "Reserved,Functional" bitfld.long 0x00 9. " SCLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional" textline " " bitfld.long 0x00 1. " SCS1FUN ,SPI slave 1 (/SPIx_SCS[1]) functional pin" "Reserved,Functional" bitfld.long 0x00 0. " SCSFUN ,SPI slave 0 (/SPIx_SCS[0]) functional pin" "Reserved,Functional" rgroup.long 0x1c++0x3 line.long 0x00 "SPIPC2,SPI Pin Control Register 2" bitfld.long 0x00 11. " SOMIDIN ,SSPI data input ( SPIx_SOMI) pin value" "0,1" bitfld.long 0x00 10. " SIMODIN ,SPI data output (SPIx_SIMO) pin value" "0,1" bitfld.long 0x00 9. " SCLKDIN ,SPI clock (SPIx_SCLK) pin value" "0,1" textline " " bitfld.long 0x00 1. " SCS1DIN ,SPI slave 1 (/PIx_SCS[1]) pin value" "0,1" bitfld.long 0x00 0. " SCS0DIN ,SPI slave 0 (/SPIx_SCS[0]) pin value" "0,1" group.long 0x3c++0x3 line.long 0x00 "SPIDAT1,SPI Shift Register" bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active" bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled" bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3" textline " " bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPIx_SCS[1],/SPIx_SCS[0],None" hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,Transfer data" hgroup.long 0x40++0x3 hide.long 0x00 "SPIBUF,SPI Buffer Register" in rgroup.long 0x44++0x3 line.long 0x00 "SPIEMU,SPI Emulation Register" hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation" group.long 0x48++0x7 line.long 0x00 "SPIDELAY,SPI Delay Register" hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay" hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay" line.long 0x04 "SPIDEF,SPI Default Chip Select Register" bitfld.long 0x04 1. " SCS1DEF ,Chip select default pattern" "0,1" bitfld.long 0x04 0. " SCS0DEF ,Chip select default pattern" "0,1" width 10. group.long 0x50++0xf line.long 0x0 "SPIFMT0,SPI Data Format Register 0" bitfld.long 0x0 24.--29. " WDELAY0 ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 23. " PARPOL0 ,Parity polarity for data format 0" "Even,Odd" textline " " bitfld.long 0x0 22. " PARITYENA0 ,Parity enable for data format 0" "Disabled,Enabled" bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first" textline " " bitfld.long 0x0 18. " DISCSTIMERS0 ,Disable chip select timers for this format register 0" "No,Yes" bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive" textline " " bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle" hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0" textline " " bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x4 "SPIFMT1,SPI Data Format Register 1" bitfld.long 0x4 24.--29. " WDELAY1 ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x4 23. " PARPOL1 ,Parity polarity for data format 1" "Even,Odd" textline " " bitfld.long 0x4 22. " PARITYENA1 ,Parity enable for data format 1" "Disabled,Enabled" bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first" textline " " bitfld.long 0x4 18. " DISCSTIMERS1 ,Disable chip select timers for this format register 1" "No,Yes" bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive" textline " " bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle" hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1" textline " " bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x8 "SPIFMT2,SPI Data Format Register 2" bitfld.long 0x8 24.--29. " WDELAY2 ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 23. " PARPOL2 ,Parity polarity for data format 2" "Even,Odd" textline " " bitfld.long 0x8 22. " PARITYENA2 ,Parity enable for data format 2" "Disabled,Enabled" bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first" textline " " bitfld.long 0x8 18. " DISCSTIMERS2 ,Disable chip select timers for this format register 2" "No,Yes" bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive" textline " " bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle" hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2" textline " " bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0xC "SPIFMT3,SPI Data Format Register 3" bitfld.long 0xC 24.--29. " WDELAY3 ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0xC 23. " PARPOL3 ,Parity polarity for data format 3" "Even,Odd" textline " " bitfld.long 0xC 22. " PARITYENA3 ,Parity enable for data format 3" "Disabled,Enabled" bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first" textline " " bitfld.long 0xC 18. " DISCSTIMERS3 ,Disable chip select timers for this format register 3" "No,Yes" bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive" textline " " bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle" hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3" textline " " bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" hgroup.long 0x60++0x3 hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0" in hgroup.long 0x64++0x03 hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1" in width 0xb tree.end tree "SPI 2" base asd:0x01c67800 width 10. group.long 0x00++0xf line.long 0x00 "SPIGCR0,SPI Global Control Register 0" bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset" line.long 0x04 "SPIGCR1,SPI Global Control Register 1" bitfld.long 0x04 24. " SPIEN ,SPI enable" "Disabled,Enabled" bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled" bitfld.long 0x04 8. " POWERDOWN ,SPI state machines enter a power-down state" "Active,Power-down" textline " " bitfld.long 0x04 1. " CLKMOD ,Clock mode" "External,Internal" bitfld.long 0x04 0. " MASTER ,SPIx_SIMO pin direction" "SPIx_SIMO,SPIx_SOMI" line.long 0x08 "SPIINT,SPI Interrupt Register" bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled" bitfld.long 0x08 9. " TXINTENA ,Transmit interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 8. " RXINTENA ,Receive interrupt enable" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " OVRNINTENA ,Overrun interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt" bitfld.long 0x08 2. " PARERRENA ,Enables interrupt on parity error" "No interrupt,Interrupt" line.long 0x0c "SPILVL,SPI Interrupt Level Register" bitfld.long 0x0c 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1" bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1" bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1" textline " " bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1" bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "SPINT0,SPINT1" hgroup.long 0x10++0x3 hide.long 0x00 "SPIFLG,SPI Flag Register" in group.long 0x14++0x3 line.long 0x00 "SPIPC0,SPI Pin Control Register 0" bitfld.long 0x00 11. " SOMIFUN ,SPI data input (SPIx_SOMI) functional pin" "Reserved,Functional" bitfld.long 0x00 10. " SIMOFUN ,SPI data output (SPIx_SIMO) functional pin" "Reserved,Functional" bitfld.long 0x00 9. " SCLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional" textline " " bitfld.long 0x00 1. " SCS1FUN ,SPI slave 1 (/SPIx_SCS[1]) functional pin" "Reserved,Functional" bitfld.long 0x00 0. " SCSFUN ,SPI slave 0 (/SPIx_SCS[0]) functional pin" "Reserved,Functional" rgroup.long 0x1c++0x3 line.long 0x00 "SPIPC2,SPI Pin Control Register 2" bitfld.long 0x00 11. " SOMIDIN ,SSPI data input ( SPIx_SOMI) pin value" "0,1" bitfld.long 0x00 10. " SIMODIN ,SPI data output (SPIx_SIMO) pin value" "0,1" bitfld.long 0x00 9. " SCLKDIN ,SPI clock (SPIx_SCLK) pin value" "0,1" textline " " bitfld.long 0x00 1. " SCS1DIN ,SPI slave 1 (/PIx_SCS[1]) pin value" "0,1" bitfld.long 0x00 0. " SCS0DIN ,SPI slave 0 (/SPIx_SCS[0]) pin value" "0,1" group.long 0x3c++0x3 line.long 0x00 "SPIDAT1,SPI Shift Register" bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active" bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled" bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3" textline " " bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPIx_SCS[1],/SPIx_SCS[0],None" hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,Transfer data" hgroup.long 0x40++0x3 hide.long 0x00 "SPIBUF,SPI Buffer Register" in rgroup.long 0x44++0x3 line.long 0x00 "SPIEMU,SPI Emulation Register" hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation" group.long 0x48++0x7 line.long 0x00 "SPIDELAY,SPI Delay Register" hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay" hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay" line.long 0x04 "SPIDEF,SPI Default Chip Select Register" bitfld.long 0x04 1. " SCS1DEF ,Chip select default pattern" "0,1" bitfld.long 0x04 0. " SCS0DEF ,Chip select default pattern" "0,1" width 10. group.long 0x50++0xf line.long 0x0 "SPIFMT0,SPI Data Format Register 0" bitfld.long 0x0 24.--29. " WDELAY0 ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 23. " PARPOL0 ,Parity polarity for data format 0" "Even,Odd" textline " " bitfld.long 0x0 22. " PARITYENA0 ,Parity enable for data format 0" "Disabled,Enabled" bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first" textline " " bitfld.long 0x0 18. " DISCSTIMERS0 ,Disable chip select timers for this format register 0" "No,Yes" bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive" textline " " bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle" hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0" textline " " bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x4 "SPIFMT1,SPI Data Format Register 1" bitfld.long 0x4 24.--29. " WDELAY1 ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x4 23. " PARPOL1 ,Parity polarity for data format 1" "Even,Odd" textline " " bitfld.long 0x4 22. " PARITYENA1 ,Parity enable for data format 1" "Disabled,Enabled" bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first" textline " " bitfld.long 0x4 18. " DISCSTIMERS1 ,Disable chip select timers for this format register 1" "No,Yes" bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive" textline " " bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle" hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1" textline " " bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x8 "SPIFMT2,SPI Data Format Register 2" bitfld.long 0x8 24.--29. " WDELAY2 ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 23. " PARPOL2 ,Parity polarity for data format 2" "Even,Odd" textline " " bitfld.long 0x8 22. " PARITYENA2 ,Parity enable for data format 2" "Disabled,Enabled" bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first" textline " " bitfld.long 0x8 18. " DISCSTIMERS2 ,Disable chip select timers for this format register 2" "No,Yes" bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive" textline " " bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle" hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2" textline " " bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0xC "SPIFMT3,SPI Data Format Register 3" bitfld.long 0xC 24.--29. " WDELAY3 ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0xC 23. " PARPOL3 ,Parity polarity for data format 3" "Even,Odd" textline " " bitfld.long 0xC 22. " PARITYENA3 ,Parity enable for data format 3" "Disabled,Enabled" bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first" textline " " bitfld.long 0xC 18. " DISCSTIMERS3 ,Disable chip select timers for this format register 3" "No,Yes" bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive" textline " " bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle" hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3" textline " " bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" hgroup.long 0x60++0x3 hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0" in hgroup.long 0x64++0x03 hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1" in width 0xb tree.end tree "SPI 3" base asd:0x01c68000 width 10. group.long 0x00++0xf line.long 0x00 "SPIGCR0,SPI Global Control Register 0" bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset" line.long 0x04 "SPIGCR1,SPI Global Control Register 1" bitfld.long 0x04 24. " SPIEN ,SPI enable" "Disabled,Enabled" bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled" bitfld.long 0x04 8. " POWERDOWN ,SPI state machines enter a power-down state" "Active,Power-down" textline " " bitfld.long 0x04 1. " CLKMOD ,Clock mode" "External,Internal" bitfld.long 0x04 0. " MASTER ,SPIx_SIMO pin direction" "SPIx_SIMO,SPIx_SOMI" line.long 0x08 "SPIINT,SPI Interrupt Register" bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled" bitfld.long 0x08 9. " TXINTENA ,Transmit interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 8. " RXINTENA ,Receive interrupt enable" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " OVRNINTENA ,Overrun interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt" bitfld.long 0x08 2. " PARERRENA ,Enables interrupt on parity error" "No interrupt,Interrupt" line.long 0x0c "SPILVL,SPI Interrupt Level Register" bitfld.long 0x0c 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1" bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1" bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1" textline " " bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1" bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "SPINT0,SPINT1" hgroup.long 0x10++0x3 hide.long 0x00 "SPIFLG,SPI Flag Register" in group.long 0x14++0x3 line.long 0x00 "SPIPC0,SPI Pin Control Register 0" bitfld.long 0x00 11. " SOMIFUN ,SPI data input (SPIx_SOMI) functional pin" "Reserved,Functional" bitfld.long 0x00 10. " SIMOFUN ,SPI data output (SPIx_SIMO) functional pin" "Reserved,Functional" bitfld.long 0x00 9. " SCLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional" textline " " bitfld.long 0x00 1. " SCS1FUN ,SPI slave 1 (/SPIx_SCS[1]) functional pin" "Reserved,Functional" bitfld.long 0x00 0. " SCSFUN ,SPI slave 0 (/SPIx_SCS[0]) functional pin" "Reserved,Functional" rgroup.long 0x1c++0x3 line.long 0x00 "SPIPC2,SPI Pin Control Register 2" bitfld.long 0x00 11. " SOMIDIN ,SSPI data input ( SPIx_SOMI) pin value" "0,1" bitfld.long 0x00 10. " SIMODIN ,SPI data output (SPIx_SIMO) pin value" "0,1" bitfld.long 0x00 9. " SCLKDIN ,SPI clock (SPIx_SCLK) pin value" "0,1" textline " " bitfld.long 0x00 1. " SCS1DIN ,SPI slave 1 (/PIx_SCS[1]) pin value" "0,1" bitfld.long 0x00 0. " SCS0DIN ,SPI slave 0 (/SPIx_SCS[0]) pin value" "0,1" group.long 0x3c++0x3 line.long 0x00 "SPIDAT1,SPI Shift Register" bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active" bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled" bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3" textline " " bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPIx_SCS[1],/SPIx_SCS[0],None" hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,Transfer data" hgroup.long 0x40++0x3 hide.long 0x00 "SPIBUF,SPI Buffer Register" in rgroup.long 0x44++0x3 line.long 0x00 "SPIEMU,SPI Emulation Register" hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation" group.long 0x48++0x7 line.long 0x00 "SPIDELAY,SPI Delay Register" hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay" hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay" line.long 0x04 "SPIDEF,SPI Default Chip Select Register" bitfld.long 0x04 1. " SCS1DEF ,Chip select default pattern" "0,1" bitfld.long 0x04 0. " SCS0DEF ,Chip select default pattern" "0,1" width 10. group.long 0x50++0xf line.long 0x0 "SPIFMT0,SPI Data Format Register 0" bitfld.long 0x0 24.--29. " WDELAY0 ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 23. " PARPOL0 ,Parity polarity for data format 0" "Even,Odd" textline " " bitfld.long 0x0 22. " PARITYENA0 ,Parity enable for data format 0" "Disabled,Enabled" bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first" textline " " bitfld.long 0x0 18. " DISCSTIMERS0 ,Disable chip select timers for this format register 0" "No,Yes" bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive" textline " " bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle" hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0" textline " " bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x4 "SPIFMT1,SPI Data Format Register 1" bitfld.long 0x4 24.--29. " WDELAY1 ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x4 23. " PARPOL1 ,Parity polarity for data format 1" "Even,Odd" textline " " bitfld.long 0x4 22. " PARITYENA1 ,Parity enable for data format 1" "Disabled,Enabled" bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first" textline " " bitfld.long 0x4 18. " DISCSTIMERS1 ,Disable chip select timers for this format register 1" "No,Yes" bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive" textline " " bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle" hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1" textline " " bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x8 "SPIFMT2,SPI Data Format Register 2" bitfld.long 0x8 24.--29. " WDELAY2 ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 23. " PARPOL2 ,Parity polarity for data format 2" "Even,Odd" textline " " bitfld.long 0x8 22. " PARITYENA2 ,Parity enable for data format 2" "Disabled,Enabled" bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first" textline " " bitfld.long 0x8 18. " DISCSTIMERS2 ,Disable chip select timers for this format register 2" "No,Yes" bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive" textline " " bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle" hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2" textline " " bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0xC "SPIFMT3,SPI Data Format Register 3" bitfld.long 0xC 24.--29. " WDELAY3 ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0xC 23. " PARPOL3 ,Parity polarity for data format 3" "Even,Odd" textline " " bitfld.long 0xC 22. " PARITYENA3 ,Parity enable for data format 3" "Disabled,Enabled" bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first" textline " " bitfld.long 0xC 18. " DISCSTIMERS3 ,Disable chip select timers for this format register 3" "No,Yes" bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive" textline " " bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle" hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3" textline " " bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" hgroup.long 0x60++0x3 hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0" in hgroup.long 0x64++0x03 hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1" in width 0xb tree.end tree "SPI 4" base asd:0x01c23000 width 10. group.long 0x00++0xf line.long 0x00 "SPIGCR0,SPI Global Control Register 0" bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset" line.long 0x04 "SPIGCR1,SPI Global Control Register 1" bitfld.long 0x04 24. " SPIEN ,SPI enable" "Disabled,Enabled" bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled" bitfld.long 0x04 8. " POWERDOWN ,SPI state machines enter a power-down state" "Active,Power-down" textline " " bitfld.long 0x04 1. " CLKMOD ,Clock mode" "External,Internal" bitfld.long 0x04 0. " MASTER ,SPIx_SIMO pin direction" "SPIx_SIMO,SPIx_SOMI" line.long 0x08 "SPIINT,SPI Interrupt Register" bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled" bitfld.long 0x08 9. " TXINTENA ,Transmit interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 8. " RXINTENA ,Receive interrupt enable" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " OVRNINTENA ,Overrun interrupt enable" "No interrupt,Interrupt" bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt" bitfld.long 0x08 2. " PARERRENA ,Enables interrupt on parity error" "No interrupt,Interrupt" line.long 0x0c "SPILVL,SPI Interrupt Level Register" bitfld.long 0x0c 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1" bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1" bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1" textline " " bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1" bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "SPINT0,SPINT1" hgroup.long 0x10++0x3 hide.long 0x00 "SPIFLG,SPI Flag Register" in group.long 0x14++0x3 line.long 0x00 "SPIPC0,SPI Pin Control Register 0" bitfld.long 0x00 11. " SOMIFUN ,SPI data input (SPIx_SOMI) functional pin" "Reserved,Functional" bitfld.long 0x00 10. " SIMOFUN ,SPI data output (SPIx_SIMO) functional pin" "Reserved,Functional" bitfld.long 0x00 9. " SCLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional" textline " " bitfld.long 0x00 1. " SCS1FUN ,SPI slave 1 (/SPIx_SCS[1]) functional pin" "Reserved,Functional" bitfld.long 0x00 0. " SCSFUN ,SPI slave 0 (/SPIx_SCS[0]) functional pin" "Reserved,Functional" rgroup.long 0x1c++0x3 line.long 0x00 "SPIPC2,SPI Pin Control Register 2" bitfld.long 0x00 11. " SOMIDIN ,SSPI data input ( SPIx_SOMI) pin value" "0,1" bitfld.long 0x00 10. " SIMODIN ,SPI data output (SPIx_SIMO) pin value" "0,1" bitfld.long 0x00 9. " SCLKDIN ,SPI clock (SPIx_SCLK) pin value" "0,1" textline " " bitfld.long 0x00 1. " SCS1DIN ,SPI slave 1 (/PIx_SCS[1]) pin value" "0,1" bitfld.long 0x00 0. " SCS0DIN ,SPI slave 0 (/SPIx_SCS[0]) pin value" "0,1" group.long 0x3c++0x3 line.long 0x00 "SPIDAT1,SPI Shift Register" bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active" bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled" bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3" textline " " bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPIx_SCS[1],/SPIx_SCS[0],None" hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,Transfer data" hgroup.long 0x40++0x3 hide.long 0x00 "SPIBUF,SPI Buffer Register" in rgroup.long 0x44++0x3 line.long 0x00 "SPIEMU,SPI Emulation Register" hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation" group.long 0x48++0x7 line.long 0x00 "SPIDELAY,SPI Delay Register" hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay" hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay" line.long 0x04 "SPIDEF,SPI Default Chip Select Register" bitfld.long 0x04 1. " SCS1DEF ,Chip select default pattern" "0,1" bitfld.long 0x04 0. " SCS0DEF ,Chip select default pattern" "0,1" width 10. group.long 0x50++0xf line.long 0x0 "SPIFMT0,SPI Data Format Register 0" bitfld.long 0x0 24.--29. " WDELAY0 ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 23. " PARPOL0 ,Parity polarity for data format 0" "Even,Odd" textline " " bitfld.long 0x0 22. " PARITYENA0 ,Parity enable for data format 0" "Disabled,Enabled" bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first" textline " " bitfld.long 0x0 18. " DISCSTIMERS0 ,Disable chip select timers for this format register 0" "No,Yes" bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive" textline " " bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle" hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0" textline " " bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x4 "SPIFMT1,SPI Data Format Register 1" bitfld.long 0x4 24.--29. " WDELAY1 ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x4 23. " PARPOL1 ,Parity polarity for data format 1" "Even,Odd" textline " " bitfld.long 0x4 22. " PARITYENA1 ,Parity enable for data format 1" "Disabled,Enabled" bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first" textline " " bitfld.long 0x4 18. " DISCSTIMERS1 ,Disable chip select timers for this format register 1" "No,Yes" bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive" textline " " bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle" hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1" textline " " bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x8 "SPIFMT2,SPI Data Format Register 2" bitfld.long 0x8 24.--29. " WDELAY2 ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x8 23. " PARPOL2 ,Parity polarity for data format 2" "Even,Odd" textline " " bitfld.long 0x8 22. " PARITYENA2 ,Parity enable for data format 2" "Disabled,Enabled" bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first" textline " " bitfld.long 0x8 18. " DISCSTIMERS2 ,Disable chip select timers for this format register 2" "No,Yes" bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive" textline " " bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle" hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2" textline " " bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0xC "SPIFMT3,SPI Data Format Register 3" bitfld.long 0xC 24.--29. " WDELAY3 ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0xC 23. " PARPOL3 ,Parity polarity for data format 3" "Even,Odd" textline " " bitfld.long 0xC 22. " PARITYENA3 ,Parity enable for data format 3" "Disabled,Enabled" bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first" textline " " bitfld.long 0xC 18. " DISCSTIMERS3 ,Disable chip select timers for this format register 3" "No,Yes" bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive" textline " " bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle" hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3" textline " " bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" hgroup.long 0x60++0x3 hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0" in hgroup.long 0x64++0x03 hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1" in width 0xb tree.end tree.end tree.open "TMR (Timer/Watchdog Timer)" tree "TIMER 0" base asd:0x01c21400 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree "TIMER 1" base asd:0x01c21800 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree "TIMER 2 (Watchdog)" base asd:0x01c21c00 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree "TIMER 3" base asd:0x01c20800 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree "TIMER 4" base asd:0x01c23800 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree.end tree.open "UART (Universal Asynchronous Receiver/Transmitter)" tree "UART 0" base asd:0x01c20000 width 13. if (((d.l(asd:0x01c20000+0xc))&0x80)==0x00) group.long 0x00++0x7 line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data" line.long 0x04 "IER,Interrupt Enable Register" bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled" bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled" else group.long 0x00++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" endif rgroup.long 0x08++0x3 line.long 0x00 "IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled" bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..." textline " " bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending" wgroup.long 0x08++0x3 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes" bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable" textline " " bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear" bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable" if ((((d.l(asd:0x01c20000+0xc))&0xb)==0x9)||(((d.l(asd:0x01c20000+0xc))&0xb)==0xa)||(((d.l(asd:0x01c20000+0xc))&0xb)==0xb)) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20000+0xc))&0xb)==0x8) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20000+0xc))&0xb)==0x0) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" else group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" endif group.long 0x10++0x3 line.long 0x00 "MCR,Modem Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" else bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" endif rgroup.long 0x14++0x3 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty" textline " " bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty" bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected" textline " " bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error" bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error" textline " " bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun" bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready" group.long 0x20++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" sif (cpu()=="DM335") rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x28++0x3 line.long 0x00 "PID,Peripheral Identification Register" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" else rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" endif group.long 0x30++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled" bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled" textline " " bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") group.long 0x34++0x03 line.long 0x00 "MDR,Mode Definition Register" bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling" endif width 0xb tree.end tree "UART 1" base asd:0x01d06000 width 13. if (((d.l(asd:0x01d06000+0xc))&0x80)==0x00) group.long 0x00++0x7 line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data" line.long 0x04 "IER,Interrupt Enable Register" bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled" bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled" else group.long 0x00++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" endif rgroup.long 0x08++0x3 line.long 0x00 "IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled" bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..." textline " " bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending" wgroup.long 0x08++0x3 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes" bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable" textline " " bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear" bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable" if ((((d.l(asd:0x01d06000+0xc))&0xb)==0x9)||(((d.l(asd:0x01d06000+0xc))&0xb)==0xa)||(((d.l(asd:0x01d06000+0xc))&0xb)==0xb)) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01d06000+0xc))&0xb)==0x8) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01d06000+0xc))&0xb)==0x0) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" else group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" endif group.long 0x10++0x3 line.long 0x00 "MCR,Modem Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" else bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" endif rgroup.long 0x14++0x3 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty" textline " " bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty" bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected" textline " " bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error" bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error" textline " " bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun" bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready" group.long 0x20++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" sif (cpu()=="DM335") rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x28++0x3 line.long 0x00 "PID,Peripheral Identification Register" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" else rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" endif group.long 0x30++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled" bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled" textline " " bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") group.long 0x34++0x03 line.long 0x00 "MDR,Mode Definition Register" bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling" endif width 0xb tree.end tree.end tree "USB (Universal Serial Bus)" base asd:0x01c64000 width 13. sif (cpu()=="DM357") group.long 0x00++0x03 line.long 0x00 "REVR,Revision Register" endif group.long 0x4++0x3 line.long 0x0 "CTRLR,Control Register" bitfld.long 0x00 4. " RNDIS ,RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x00 3. " UINT ,USB non-PDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CLKFACK ,Clock stop fast ACK enable" "Disabled,Enabled" bitfld.long 0x00 0. " RESET ,Soft reset" "No effect,Reset" rgroup.long 0x8++0x3 line.long 0x0 "STATR,Status Register" bitfld.long 0x0 0. " DRVVBUS ,Current DRVVBUS value" "Low,High" group.long 0x10++0x7 line.long 0x0 "RNDISR,RNDIS Register" bitfld.long 0x0 19. " RX4EN ,Receive Endpoint 4 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 18. " RX3EN ,Receive Endpoint 3 RNDIS mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " RX2EN ,Receive Endpoint 2 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 16. " RX1EN ,Receive Endpoint 1 RNDIS mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " TX4EN ,Transmit Endpoint 4 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 2. " TX3EN ,Transmit Endpoint 3 RNDIS mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " TX2EN ,Transmit Endpoint 2 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 0. " TX1EN ,Transmit Endpoint 1 RNDIS mode enable" "Disabled,Enabled" line.long 0x4 "AUTOREQ,Auto Request Register" bitfld.long 0x4 6.--7. " RX4 ,RX endpoint 4 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" bitfld.long 0x4 4.--5. " RX3 ,RX endpoint 3 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" textline " " bitfld.long 0x4 2.--3. " RX2 ,RX endpoint 2 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" bitfld.long 0x4 0.--1. " RX1 ,RX endpoint 1 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.long 0x20++0x3 line.long 0x0 "INTSRCR,USB Interrupt Source Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 21. 0x4 21. 0x8 21. " USB[5]_set/clr ,Device disconnection interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 20. 0x4 20. 0x8 20. " USB[4]_set/clr ,Device connection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF start interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Babble detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detection interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt" "No interrupt,Interrupt" group.long 0x2c++0x3 line.long 0x0 "INTMSKR,USB Interrupt Mask Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 21. 0x4 21. 0x8 21. " USB[5]_set/clr ,Device Disconnected interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 20. 0x4 20. 0x8 20. " USB[4]_set/clr ,Device Connected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF started interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Babble detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detected interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt source mask" "Not masked,Masked" rgroup.long 0x38++0x3 line.long 0x0 "INTMASKEDR,USB Interrupt Source Masked Register" bitfld.long 0x0 24. " USB[8] ,DRVVBUS level change interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 23. " USB[7] ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " USB[6] ,SRP detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 21. " USB[5] ,Device Disconnected interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 20. " USB[4] ,Device Connected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 19. " USB[3] ,SOF started interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 18. " USB[2] ,Babble detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 17. " USB[1] ,Resume signaling detected interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " USB[0] ,Suspend Signaling detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 12. " RX[4] ,Receive endpoint 4 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " RX[3] ,Receive endpoint 3 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 10. " RX[2] ,Receive endpoint 2 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " RX[1] ,Receive endpoint 1 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 8. " RX[0] ,Receive endpoint 0 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " TX[4] ,Transmit endpoint 4 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 3. " TX[3] ,Transmit endpoint 3 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " TX[2] ,Transmit endpoint 2 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 1. " TX[1] ,Transmit endpoint 1 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " TX[0] ,Transmit endpoint 0 interrupt source masked" "No interrupt,Interrupt" else group.long 0x20++0x3 line.long 0x0 "INTSRCR,USB Interrupt Source Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF start interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Reset Signaling detection" "No interrupt,Interrupt" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detection interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt" "No interrupt,Interrupt" group.long 0x2c++0x3 line.long 0x0 "INTMSKR,USB Interrupt Mask Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF started interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Reset Signaling detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detected interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt source mask" "Not masked,Masked" rgroup.long 0x38++0x3 line.long 0x0 "INTMASKEDR,USB Interrupt Source Masked Register" bitfld.long 0x0 24. " USB[8] ,DRVVBUS level change interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 23. " USB[7] ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " USB[6] ,SRP detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 19. " USB[3] ,SOF started interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 18. " USB[2] ,Reset Signaling detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 17. " USB[1] ,Resume signaling detected interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " USB[0] ,Suspend Signaling detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 12. " RX[4] ,Receive endpoint 4 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " RX[3] ,Receive endpoint 3 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 10. " RX[2] ,Receive endpoint 2 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " RX[1] ,Receive endpoint 1 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 8. " RX[0] ,Receive endpoint 0 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " TX[4] ,Transmit endpoint 4 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 3. " TX[3] ,Transmit endpoint 3 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " TX[2] ,Transmit endpoint 2 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 1. " TX[1] ,Transmit endpoint 1 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " TX[0] ,Transmit endpoint 0 interrupt source masked" "No interrupt,Interrupt" endif group.long 0x3c++0x3 line.long 0x0 "EOIR,USB End of Interrupt Register" hexmask.long.byte 0x0 0.--7. 1. " VECTOR ,End of Interrupt Vector" rgroup.long 0x40++0x3 line.long 0x0 "INTVECTR,USB Interrupt Vector Register" group.long 0x80++0xb line.long 0x0 "TCPPICR,Transmit CPPI Control Register" bitfld.long 0x0 0. " TCPPI_ENABLE ,Transmit CPPI Enable" "Disabled,Enabled" line.long 0x4 "TCPPITDR,Transmit CPPI Teardown Register" bitfld.long 0x4 31. " READY ,Teardown register writable" "Disabled,Enabled" bitfld.long 0x4 0.--1. " CHANNEL ,Teardown Channel" "0,1,2,3" sif (cpu()=="DM357") line.long 0x8 "CPPIEOIR,CPPI DMA End of Interrupt Register" else line.long 0x8 "TCPPIEOIR,Transmit CPPI DMA Controller End of Interrupt Register" endif hexmask.long.byte 0x8 0.--7. 1. " VECTOR ,End of Interrupt Vector" rgroup.long 0x8c++0x7 line.long 0x0 "TCPPIIVECTR,Transmit CPPI DMA Controller Interrupt Vector Register" line.long 0x4 "TCPPIMSKSR,Transmit CPPI Masked Status Register" bitfld.long 0x4 3. " MASKEDCOMP_PENDING3 ,Channel 3 Masked High Priority Transmit Completion Pending" "Not pending,Pending" bitfld.long 0x4 2. " MASKEDCOMP_PENDING2 ,Channel 2 Masked High Priority Transmit Completion Pending" "Not pending,Pending" textline " " bitfld.long 0x4 1. " MASKEDCOMP_PENDING1 ,Channel 1 Masked High Priority Transmit Completion Pending" "Not pending,Pending" bitfld.long 0x4 0. " MASKEDCOMP_PENDING0 ,Channel 0 Masked High Priority Transmit Completion Pending" "Not pending,Pending" group.long 0x94++0x3 line.long 0x0 "TCPPIRAWSR,Transmit CPPI Raw Status Register" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " COMP_PENDING[3]_set/clr ,Channel 3 High Priority Transmit Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " COMP_PENDING[2]_set/clr ,Channel 2 High Priority Transmit Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x0 1. 0x4 1. 0x8 1. " COMP_PENDING[1]_set/clr ,Channel 1 High Priority Transmit Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " COMP_PENDING[0]_set/clr ,Channel 0 High Priority Transmit Completion Pending" "Not pending,Pending" group.long 0xc0++0x3 line.long 0x0 "RCPPICR,Receive CPPI Control Register" bitfld.long 0x0 0. " RCPPI_ENABLE ,Receive CPPI Enable" "Disabled,Enabled" rgroup.long 0xd0++0x7 line.long 0x0 "RCPPIMSKSR,Receive CPPI Masked Status Register" bitfld.long 0x0 3. " MASKED_COMP_PENDING3 ,Channel 3 Masked Receive Completion Pending" "Not pending,Pending" bitfld.long 0x0 2. " MASKED_COMP_PENDING2 ,Channel 2 Masked Receive Completion Pending" "Not pending,Pending" textline " " bitfld.long 0x0 1. " MASKED_COMP_PENDING1 ,Channel 1 Masked Receive Completion Pending" "Not pending,Pending" bitfld.long 0x0 0. " MASKED_COMP_PENDING0 ,Channel 0 Masked Receive Completion Pending" "Not pending,Pending" group.long 0xd4++0x03 line.long 0x00 "RCPPIRAWSR,Receive CPPI Raw Status Register" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " COMP_PENDING[3]_set/clr ,Channel 3 Raw Receive Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " COMP_PENDING[2]_set/clr ,Channel 2 Raw Receive Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " COMP_PENDING[1]_set/clr ,Channel 1 Raw Receive Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " COMP_PENDING[0]_set/clr ,Channel 0 Raw Receive Completion Pending" "Not pending,Pending" group.long 0xe0++0xf line.long 0x0 "RBUFCNT0,Receive Buffer Count 0 Register" hexmask.long.word 0x0 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 0" line.long 0x4 "RBUFCNT1,Receive Buffer Count 1 Register" hexmask.long.word 0x4 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 1" line.long 0x8 "RBUFCNT2,Receive Buffer Count 2 Register" hexmask.long.word 0x8 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 2" line.long 0xC "RBUFCNT3,Receive Buffer Count 3 Register" hexmask.long.word 0xC 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 3" width 17. tree "Transmit/Receive CPPI Channel 0 State Block" group.long 0x100++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x100+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x100+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end tree "Transmit/Receive CPPI Channel 1 State Block" group.long 0x140++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x140+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x140+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end tree "Transmit/Receive CPPI Channel 2 State Block" group.long 0x180++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x180+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x180+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end tree "Transmit/Receive CPPI Channel 3 State Block" group.long 0x1C0++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x1C0+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x1C0+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end width 10. tree "Common USB Registers" group.byte 0x400++0x0 line.byte 0x0 "FADDR,Function Address Register" hexmask.byte 0x0 0.--6. 1. " FUNCADDR ,7_bit address of the peripheral part of the transaction" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte 0x401++0x0 line.byte 0x0 "POWER,Power Management Register" textline " " bitfld.byte 0x0 5. " HSEN ,High-speed mode negotiation enable" "Disabled,Enabled" bitfld.byte 0x0 4. " HSMODE ,High-speed mode" "Full speed,High speed" textline " " bitfld.byte 0x0 3. " RESET ,Reset" "No reset,Reset" bitfld.byte 0x0 2. " RESUME ,Resume in suspend mode" "No resume,Resume" textline " " bitfld.byte 0x0 1. " SUSPENDM ,Suspend mode" "Disabled,Enabled" bitfld.byte 0x0 0. " ENSUSPM ,SUSPENDM output enable" "Disabled,Enabled" else group.byte 0x401++0x0 line.byte 0x0 "POWER,Power Management Register" bitfld.byte 0x0 7. " ISOUPDATE ,Waiting for SOF token" "Not wait,Wait" bitfld.byte 0x0 6. " SOFTCONN ,Soft Connect/Disconnect feature enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 5. " HSEN ,High-speed mode negotiation enable" "Disabled,Enabled" bitfld.byte 0x0 4. " HSMODE ,High-speed mode" "Full speed,High speed" textline " " bitfld.byte 0x0 3. " RESET ,Reset" "No reset,Reset" bitfld.byte 0x0 2. " RESUME ,Resume in suspend mode" "No resume,Resume" textline " " bitfld.byte 0x0 1. " SUSPENDM ,Suspend mode" "Disabled,Enabled" bitfld.byte 0x0 0. " ENSUSPM ,SUSPENDM output enable" "Disabled,Enabled" endif rgroup.word 0x402++0x3 line.word 0x0 "INTRTX,Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 4" bitfld.word 0x0 4. " EP4TX ,Tx Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x0 3. " EP3TX ,Tx Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 2. " EP2TX ,Tx Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x0 1. " EP1TX ,Tx Endpoint 1 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 0. " EP0 ,Endpoint 0 interrupt active" "Not active,Active" line.word 0x2 "INTRRX,Interrupt Register for Receive Endpoints 1 to 4" bitfld.word 0x02 4. " EP4RX ,Receive Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x02 3. " EP3RX ,Receive Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x02 2. " EP2RX ,Receive Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x02 1. " EP1RX ,Receive Endpoint 1 interrupt active" "Not active,Active" group.word 0x406++0x3 line.word 0x0 "INTRTXE,Interrupt Enable Register for INTRTX" bitfld.word 0x0 4. " EP4TX ,Tx Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x0 3. " EP3TX ,Tx Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 2. " EP2TX ,Tx Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x0 1. " EP1TX ,Tx Endpoint 1 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 0. " EP0 ,Endpoint 0 interrupt active" "Not active,Active" line.word 0x2 "INTRRXE,Interrupt Enable Register for INTRRX" bitfld.word 0x02 4. " EP4RX ,Receive Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x02 3. " EP3RX ,Receive Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x02 2. " EP2RX ,Receive Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x02 1. " EP1RX ,Receive Endpoint 1 interrupt active" "Not active,Active" hgroup.byte 0x40a++0x0 hide.byte 0x0 "INTRUSB,Interrupt Register for Common USB Interrupts" in group.byte 0x40b++0x0 line.byte 0x0 "INTRUSBE,Interrupt Enable Register for INTRUSB" bitfld.byte 0x0 7. " VBUSERR ,Vbus error interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 6. " SESSREQ ,Session request interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 5. " DISCON ,Disconnect interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 4. " CONN ,Connect interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 3. " SOF ,Start of frame interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 2. " RESET_BABBLE ,Reset interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 1. " RESUME ,Resume interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 0. " SUSPEND ,Suspend interrupt enable" "Disabled,Enabled" rgroup.word 0x40c++0x1 line.word 0x0 "FRAME,Frame Number Register" hexmask.word 0x0 0.--10. 1. " FRAMENUMBER ,Last received frame number" group.byte 0x40e++0x1 line.byte 0x0 "INDEX,Index Register for Selecting the Endpoint Status and Control Registers" bitfld.byte 0x0 0.--3. " EPSEL ,Endpoint control/status register select" "EP 0,EP 1,EP 2,EP 3,EP 4,?..." line.byte 0x1 "TESTMODE,Register to Enable the USB 2.0 Test Modes" bitfld.byte 0x1 7. " FORCE_HOST ,Force Host mode" "Normal,Host" bitfld.byte 0x1 6. " FIFO_ACCESS ,Transfer packet EP0 Tx FIFO to EP0 Receive FIFO" "Not transferred,Transferred" textline " " bitfld.byte 0x1 5. " FORCE_FS ,Force full-speed mode" "Normal,Full speed" bitfld.byte 0x1 4. " FORCE_HS ,Force high-speed mode" "Normal,High speed" textline " " bitfld.byte 0x1 3. " TEST_PACKET ,Test_Packet test mode" "Normal,Test_Packet" bitfld.byte 0x1 2. " TEST_K ,Test_K test mode" "Normal,Test_K" textline " " bitfld.byte 0x1 1. " TEST_J ,Test_J test mode" "Normal,Test_J" bitfld.byte 0x1 0. " TEST_SE0_NAK ,Test_SE0_NAK test mode" "Normal,Test_SE0_NAK" tree.end width 17. tree "Indexed Registers" if ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0)) group.word 0x412++0x1 line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode" bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High" textline " " bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "Not flushed,Flushed" bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continued,Halted" textline " " bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "Not performed,Performed" bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested" textline " " bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error" bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "OUT,SETUP" textline " " bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received" bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word 0x418++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" group.byte 0x41a++0x0 line.byte 0x00 "HOST_TYPE0,Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" group.byte 0x41b++0x0 line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register" bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." rgroup.byte 0x41f++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0)) group.word 0x412++0x1 line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode" bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared" textline " " bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared" bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated" textline " " bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended" bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended" textline " " bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received" rgroup.word 0x418++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" rgroup.byte 0x41f++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4))))) group.word 0x410++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word 0x412++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word 0x414++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word 0x416++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word 0x418++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte 0x41a++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte 0x41b++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte 0x41c++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte 0x41d++0x0 line.byte 0x00 "HOST_RXINTERVAL,Recieve Interval Register" elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4))))) group.word 0x410++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word 0x412++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word 0x414++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word 0x416++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" else group 0x00++0x0 textline " " textline " " textline " " textline " " textline " " textline " " textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register" endif tree.end width 12. tree "FIFOx" hgroup.long 0x420++0x3 hide.long 0x00 "FIFO0,Transmit and Receive FIFO Register for Endpoint 0" in hgroup.long 0x424++0x3 hide.long 0x0 "FIFO1,Transmit and Receive FIFO Register for Endpoint 1" in hgroup.long 0x428++0x3 hide.long 0x0 "FIFO2,Transmit and Receive FIFO Register for Endpoint 2" in hgroup.long 0x42c++0x3 hide.long 0x0 "FIFO3,Transmit and Receive FIFO Register for Endpoint 3" in hgroup.long 0x430++0x3 hide.long 0x0 "FIFO4,Transmit and Receive FIFO Register for Endpoint 4" in tree.end width 12. if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte 0x460++0x0 "OTG Device Control" line.byte 0x00 "DEVCTL,OTG Device Control Register" bitfld.byte 0x00 7. " BDEVICE ,USB controller is operating as the 'A' device or the 'B'" "A device,B device" bitfld.byte 0x00 6. " FSDEV ,Full speed or high speed detected" "Not detected,Detected" textline " " bitfld.byte 0x00 5. " LSDEV ,Low speed detected" "Not detected,Detected" bitfld.byte 0x00 3.--4. " VBUS ,Current VBus level" "Below Session End,Above Session End,Above AValid,Above VBusValid" textline " " bitfld.byte 0x00 2. " HOSTMODE ,USB controller is acting as a Host" "Peripheral,Host" bitfld.byte 0x00 1. " HOSTREQ ,Host Negotiation initiated" "Not initiated,Initiated" textline " " bitfld.byte 0x00 0. " SESSION ,Session start" "Ended,Started" else group.byte 0x460++0x0 "OTG Device Control" line.byte 0x00 "DEVCTL,OTG Device Control Register" bitfld.byte 0x00 7. " BDEVICE ,USB controller is operating as the 'A' device or the 'B'" "A device,B device" textline " " bitfld.byte 0x00 3.--4. " VBUS ,Current VBus level" "Below Session End,Above Session End,Above AValid,Above VBusValid" textline " " bitfld.byte 0x00 2. " HOSTMODE ,USB controller is acting as a Host" "Peripheral,Host" bitfld.byte 0x00 1. " HOSTREQ ,Host Negotiation initiated" "Not initiated,Initiated" textline " " bitfld.byte 0x00 0. " SESSION ,Session start" "Ended,Started" endif if (((data.byte(asd:0x01c64000+0x462))&(0x10))==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x462++0x0 "Dynamic FIFO Control" line.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144" elif (((data.byte(asd:0x01c64000+0x462))&(0x10))==0x10)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x462++0x0 "Dynamic FIFO Control" line.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288" else hgroup.byte 0x462++0x0 "Dynamic FIFO Control" hide.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size" endif if (((data.byte(asd:0x01c64000+0x463))&0x10)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x463++0x0 line.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144" elif (((data.byte(asd:0x01c64000+0x463))&0x10)==0x10)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x463++0x0 line.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288" else hgroup.byte 0x463++0x0 hide.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size" endif if ((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.word 0x464++0x3 line.word 0x00 "TXFIFOADDR,Transmit Endpoint FIFO Address" hexmask.word 0x00 0.--12. 1. " ADDR ,Start address of endpoint FIFO" line.word 0x02 "RXFIFOADDR,Receive Endpoint FIFO Address" hexmask.word 0x02 0.--12. 1. " ADDR ,Start address of endpoint FIFO" else hgroup.word 0x464++0x3 hide.word 0x00 "TXFIFOADDR,Transmit Endpoint FIFO Address" hide.word 0x02 "RXFIFOADDR,Receive Endpoint FIFO Address" endif width 12. tree "Target Endpoint 0 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x480)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x480+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x480+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x480)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x480+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x480+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 1 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x488)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x488+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x488+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x488)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x488+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x488+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 2 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x490)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x490+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x490+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x490)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x490+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x490+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 3 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x498)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x498+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x498+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x498)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x498+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x498+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 4 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x4A0)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x4A0+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x4A0+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x4A0)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x4A0+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x4A0+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end width 17. tree "Control and Status Registers for Endpoint 0" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x500+0x2)++0x1 line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode" bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High" textline " " bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "Not flushed,Flushed" bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continued,Halted" textline " " bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "Not performed,Performed" bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested" textline " " bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error" bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "OUT,SETUP" textline " " bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received" bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x500+0x8)++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" group.byte (0x500+0xa)++0x0 line.byte 0x00 "HOST_TYPE0,Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" group.byte (0x500+0xb)++0x0 line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register" bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." rgroup.byte (0x500+0xf)++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" else group.word (0x500+0x2)++0x1 line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode" bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared" textline " " bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared" bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated" textline " " bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended" bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended" textline " " bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received" rgroup.word (0x500+0x8)++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" rgroup.byte (0x500+0xf)++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" endif tree.end tree "Control and Status Registers for Endpoint 1" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x510)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x510+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x510+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x510+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x510+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x510+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x510+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x510+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x510+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x510)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x510+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x510+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x510+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end tree "Control and Status Registers for Endpoint 2" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x520)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x520+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x520+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x520+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x520+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x520+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x520+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x520+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x520+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x520)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x520+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x520+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x520+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end tree "Control and Status Registers for Endpoint 3" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x530)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x530+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x530+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x530+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x530+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x530+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x530+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x530+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x530+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x530)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x530+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x530+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x530+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end tree "Control and Status Registers for Endpoint 4" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x540)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x540+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x540+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x540+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x540+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x540+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x540+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x540+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x540+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x540)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x540+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x540+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x540+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end width 0xb tree.end tree.open "VPSS (Video Processing Subsystem)" tree.open "VPFE (Video Processing Front End)" tree "ISIF (Image Sensor Interface)" base asd:0x01C71000 width 10. group.long 0x00++0x43 line.long 0x00 "SYNCEN,Synchronization Enable Register" bitfld.long 0x00 1. " DWEN ,Data Write Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SYEN ,VD/HD Enable" "Disabled,Enabled" line.long 0x04 "MODESET,Mode Setup Register" bitfld.long 0x04 15. " MDFS ,Field Status" "Odd,Even" bitfld.long 0x04 14. " HLPF ,3_tap Low_Pass" "Off,On" textline " " bitfld.long 0x04 12.--13. " INPMOD ,Data input mode" "CCD RAW data,YCbCr 16-bit,YCbCr 8-bit,?..." bitfld.long 0x04 8.--10. " CCDW ,CCD RAW Data Right Shift for Data Written to SDRAM (bit)" "No shift,1,2,3,4,?..." textline " " bitfld.long 0x04 7. " CCDMD ,Sensor Field Mode" "Not interlaced,Interlaced" bitfld.long 0x04 6. " DPOL ,CCD input Data Polarity" "Normal,1's complement" textline " " bitfld.long 0x04 5. " SWEN ,External WEN Selection" "Disabled,Enabled" bitfld.long 0x04 4. " FIPOL ,Field Indicator Polarity" "Positive,Negative" textline " " bitfld.long 0x04 3. " HDPOL ,HD Sync Polarity" "Positive,Negative" bitfld.long 0x04 2. " VDPOL ,VD Sync Polarity" "Positive,Negative" textline " " bitfld.long 0x04 1. " FIDD ,Field ID Signal Direction" "Input,Output" bitfld.long 0x04 0. " HDVDD ,VD/HD Sync Direction" "Input,Output" line.long 0x08 "HDW,HD Pulse Width Register" hexmask.long.word 0x08 0.--11. 1. " HDW ,Width of HD sync pulse" line.long 0x0c "VDW,VD Pulse Width Register" hexmask.long.word 0x0c 0.--11. 1. " VDW ,Width of VD sync pulse" line.long 0x10 "PPLN,Pixels Per Line Register" hexmask.long.word 0x10 0.--15. 1. " PPLN ,Pixels per line" line.long 0x14 "LPFR,Lines Per Frame Register" hexmask.long.word 0x14 0.--15. 1. " LPFR ,Half lines per filed or frame" line.long 0x18 "SPH,Start Pixel Horizontal" hexmask.long.word 0x18 0.--14. 1. " SPH ,Start pixel; horizontal" line.long 0x1c "LNH,Number of Pixels in Line" hexmask.long.word 0x1c 0.--14. 1. " LNH ,Number of pixels in line" line.long 0x20 "SLV0,Start Line Vertical - Field 0" hexmask.long.word 0x20 0.--14. 1. " SLV0 ,Start Line; Vertical" line.long 0x24 "SLV1,Start Line Vertical - Field 1" hexmask.long.word 0x24 0.--14. 1. " SLV1 ,Start Line; Vertical" line.long 0x28 "LNV,Number of Lines Vertical Register" hexmask.long.word 0x28 0.--14. 1. " LNV ,Number of lines; vertical" line.long 0x2c "CULH,Culling Horizontal" hexmask.long.byte 0x2c 8.--15. 1. " CLHE ,Horizontal Culling Pattern for Even Line" hexmask.long.byte 0x2c 0.--7. 1. " CLHO ,Horizontal Culling Pattern for Odd Line" line.long 0x30 "CULV,Culling Vertical Register" hexmask.long.byte 0x30 0.--7. 1. " CULV ,Vertical Culling Pattern" line.long 0x34 "HSIZE,Horizontal Size Register" bitfld.long 0x34 12. " ADCR ,SDRAM address update" "Increment,Decrement" hexmask.long.word 0x34 0.--11. 1. " HSIZE ,Address offset for each line" line.long 0x38 "SDOFST,SDRAM Line Offset Register" bitfld.long 0x38 14. " FIINV ,Field identification signal inverse" "Non inverse,Inverse" bitfld.long 0x38 12.--13. " FOFST ,Field line offset value of odd field (line)" "+1,+2,+3,+4" textline " " bitfld.long 0x38 9.--11. " LOFTS0 ,Line offset values of even line and even field (line)" "+1,+2,+3,+4,-1,-2,-3,-4" bitfld.long 0x38 6.--8. " LOFTS1 ,Line offset values of odd line and even field (line)" "+1,+2,+3,+4,-1,-2,-3,-4" textline " " bitfld.long 0x38 3.--5. " LOFTS2 ,Line offset values of even line and odd field (line)" "+1,+2,+3,+4,-1,-2,-3,-4" bitfld.long 0x38 0.--2. " LOFTS3 ,Line offset values of odd line and odd field (line)" "+1,+2,+3,+4,-1,-2,-3,-4" line.long 0x3c "CADU,SDRAM Address - High Register" hexmask.long.word 0x3c 0.--10. 1. " CADU ,Upper 11 bits of the SDRAM starting address for ISIF output" line.long 0x40 "CADL,SDRAM Address - Low Register" hexmask.long.word 0x40 0.--15. 1. " CADL ,Lower 16 bits of the SDRAM starting address for ISIF output" group.long 0x4c++0x2f line.long 0x00 "CCOLP,CCD Color Pattern Register" bitfld.long 0x00 14.--15. " CP17_6 ,Color pattern for pixel position 0 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg" bitfld.long 0x00 12.--13. " CP15_4 ,Color pattern for pixel position 1 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg" textline " " bitfld.long 0x00 10.--11. " CP13_2 ,Color pattern for pixel position 2 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg" bitfld.long 0x00 8.--9. " CP11_0 ,Color pattern for pixel position 3 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg" textline " " bitfld.long 0x00 6.--7. " CP07_6 ,Color pattern for pixel position 0 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg" bitfld.long 0x00 4.--5. " CP05_4 ,Color pattern for pixel position 1 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg" textline " " bitfld.long 0x00 2.--3. " CP03_2 ,Color pattern for pixel position 2 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg" bitfld.long 0x00 0.--1. " CP01_0 ,Color pattern for pixel position 3 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg" line.long 0x04 "CRGAIN,CCD Gain Adjustment - R/Ye Register" hexmask.long.word 0x04 0.--11. 1. " CGR ,R/Ye gain" line.long 0x08 "CGRGAIN,CCD Gain Adjustment - Gr/Cy Register" hexmask.long.word 0x08 0.--11. 1. " CGGR ,Gr/Cy gain" line.long 0x0c "CGBGAIN,CCD Gain Adjustment - Gb/GRegister" hexmask.long.word 0x0c 0.--11. 1. " CGGB ,Gb/G gain" line.long 0x10 "CBGAIN,CCD Gain Adjustment - B/Mg Register" hexmask.long.word 0x10 0.--11. 1. " CGB ,B/Mg gain" line.long 0x14 "COFSTA,CCD Offset Adjustment Register" hexmask.long.word 0x14 0.--11. 1. " COFT ,Offset adjustment after gain adjustment" line.long 0x18 "FLSHCFG0,FlashCFG0 Register" bitfld.long 0x18 0. " FLSHEN ,Flash timing signal enable" "Disabled,Enabled" line.long 0x1c "FLSHCFG1,FlashCFG1 Register" hexmask.long.word 0x1C 0.--14. 1. " SFLSH ,Start line to set the FLASH timing signal" line.long 0x20 "FLSHCFG2,FlashCFG2 Register" hexmask.long.word 0x20 0.--15. 1. " VFLSH ,Valid width of the FLASH timing signal" line.long 0x24 "VDINT0,VD Interrupt #0 Register" hexmask.long.word 0x24 0.--14. 1. " CVD0 ,VD0 Interrupt Timing in a field" line.long 0x28 "VDINT1,VD Interrupt #1 Register" hexmask.long.word 0x28 0.--14. 1. " CVD1 ,VD1 Interrupt Timing in a field" line.long 0x2c "VDINT2,VD Interrupt #2 Register" hexmask.long.word 0x2C 0.--14. 1. " CVD2 ,VD2 Interrupt Timing in a field" group.long 0x80++0x57 line.long 0x00 "CGAMMAWD,Gamma Correction Settings Register" bitfld.long 0x00 14. " WBEN2 ,White Balance Enable for H3A Input" "Disabled,Enabled" bitfld.long 0x00 13. " WBEN1 ,White Balance Enable for IPIPE Input" "Disabled,Enabled" bitfld.long 0x00 12. " WBEN0 ,White Balance Enable for SDRAM Capture" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OFSTEN2 ,Offset control Enable for H3A" "Disabled,Enabled" bitfld.long 0x00 9. " OFSTEN1 ,Offset control Enable for IPIPE" "Disabled,Enabled" bitfld.long 0x00 8. " OFSTEN0 ,Offset control Enable for SDRAM capture" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " CFAP ,CFA Pattern" "Mosaic,Stripe" bitfld.long 0x00 1.--4. " GWDI ,Select MSB of RAW input data" "15,14,13,12,11,10,9,8,7,?..." bitfld.long 0x00 0. " CCDTBL ,On/Off control of Gamma (A-LAW) table to ISIF data saved to SDRAM" "Off,On" line.long 0x04 "REC656IF,CCIR 656 Control Register" bitfld.long 0x04 1. " ECCFVH ,FVH Error Correction Enable" "Disabled,Enabled" bitfld.long 0x04 0. " R656ON ,REC656 Interface Enable" "Disabled,Enabled" line.long 0x08 "CCDCFG,CCD Configuration Register" bitfld.long 0x08 15. " VDLC ,Enable synchronizing function registers on VSYNC" "Latched,Not latched" bitfld.long 0x08 13. " MSBINVI ,MSB of Chroma input signal stored to SDRAM inverted" "Normal,Inverted" bitfld.long 0x08 12. " BSWD ,Byte Swap Data stored to SDRAM" "Normal,Swap Bytes" textline " " bitfld.long 0x08 11. " Y8POS ,Location of Y signal when YCbCr 8bit data is input" "Even,Odd" bitfld.long 0x08 10. " EXTRG ,External Trigger" "Disabled,Enabled" bitfld.long 0x08 9. " TRGSEL ,Signal that initializes SDRAM address" "WEN bit,FID input port" textline " " bitfld.long 0x08 8. " WENLOG ,Specifies CCD valid area" "ANDed,ORed" bitfld.long 0x08 6.--7. " FIDMD ,Setting of FID detection function" "Latched,Not latched,?..." bitfld.long 0x08 5. " BW656 ,The data width in CCIR656 input mode (bit)" "8,10" textline " " bitfld.long 0x08 4. " YCINSWP ,Y input (YIN[7:0]) and C input (CIN[7:0]) are swapped" "C signal,Y signal" bitfld.long 0x08 0.--1. " SDRPACK ,SDRAM pack (bit/pixel)" "16,12,8,?..." line.long 0x0c "DFCCTL,Defect Correction Control Register" bitfld.long 0x0C 8.--10. " VDFLSFT ,Vertical line Defect level shift value" "0,1,2,3,4,?..." bitfld.long 0x0C 7. " VDFCUDA ,Vertical line Defect Correction upper pixels disable" "No,Yes" textline " " bitfld.long 0x0C 5.--6. " VDFCSL ,Vertical line Defect Correction mode select" "Defect level subtract./Fed through if data satur.,Defect level subtract./Horizontal interpol. if data satur.,Horizontal interpol.,?..." textline " " bitfld.long 0x0C 4. " VDFCEN ,Vertical line Defect Correction enable" "Disabled,Enabled" line.long 0x10 "VDFSATLV,Defect Correction Vertical Saturation Level Register" hexmask.long.word 0x10 0.--11. 1. " VDFSLV ,Vertical line Defect Correction saturation level" line.long 0x14 "DFCMEMCTL,Defect Correction Memory Control Register" bitfld.long 0x14 4. " DFCMCLR ,Memory clear" "Completed,Not completed" bitfld.long 0x14 2. " DFCMARST ,Memory Address Reset" "Incremented,Cleared" textline " " bitfld.long 0x14 1. " DFCMRD ,Memory Read" "Completed,Not completed" bitfld.long 0x14 0. " DFCMWR ,Memory write" "Completed,Not completed" line.long 0x18 "DFCMEM0,Defect Correction Set V Position Register" hexmask.long.word 0x18 0.--12. 1. " DFCMEM0 ,Memory 0 Set V position of the defects" line.long 0x1c "DFCMEM1,Defect Correction Set H Position 1 Register" hexmask.long.word 0x1C 0.--12. 1. " DFCMEM1 ,Memory 1 Set H position of the defects" line.long 0x20 "DFCMEM2,Defect Correction Set SUB1 Register" hexmask.long.byte 0x20 0.--7. 1. " DFCMEM2 ,Memory 2 Set SUB1" line.long 0x24 "DFCMEM3,Defect Correction Set SUB2 Register" hexmask.long.byte 0x24 0.--7. 1. " DFCMEM3 ,Memory 3 Set SUB2" line.long 0x28 "DFCMEM4,Defect Correction Set SUB3 Register" hexmask.long.byte 0x28 0.--7. 1. " DFCMEM4 ,Memory 4 Set SUB3" line.long 0x2c "CLAMPCFG,Black Clamp Configuration Register" bitfld.long 0x2c 4. " CLMD ,Black Clamp Mode" "Regardless,Separately" bitfld.long 0x2c 1.--2. " CLHMD ,Horizontal Clamp Mode" "0,1,2,3" textline " " bitfld.long 0x2c 0. " CLEN ,Black Clamp Enable" "Disabled,Enabled" line.long 0x30 "CLDCOFST,DC Offset for Black Clamp Register" hexmask.long.word 0x30 0.--12. 1. " CLDC ,DC offset for Black Clamp (S13)" line.long 0x34 "CLSV,Black Clamp Start Position Register" hexmask.long.word 0x34 0.--12. 1. " CLSV ,Black Clamp Start position (V)" line.long 0x38 "CLHWIN0,Horizontal Black Clamp Configuration Register" bitfld.long 0x38 12.--13. " CLHWN ,Vertical dimension of a window" "0,1,2,3" bitfld.long 0x38 8.--9. " CLHWM ,Vertical dimension of a window" "0,1,2,3" textline " " bitfld.long 0x38 6. " CLHLMT ,Horizontal Black clamp" "Low,High" bitfld.long 0x38 5. " CLHWBS ,Base Window select" "Low,High" textline " " bitfld.long 0x38 0.--4. " CLHWC ,Window count per color" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3c "CLHWIN1,Horizontal Black Clamp Configuration 1 Register" hexmask.long.word 0x3C 0.--12. 1. " CLHSH ,Window Start position (H)" line.long 0x40 "CLHWIN2,Horizontal Black Clamp Configuration 2" hexmask.long.word 0x40 0.--12. 1. " CLHSV ,Window Start position (V)" line.long 0x44 "CLVRV,Vertical Black Clamp Configuration Register" hexmask.long.word 0x44 0.--11. 1. " CLVRV ,Reset value (U12) for the Clamp Value register" line.long 0x48 "CLVWIN0,Vertical Black Clamp Configuration 0 Register" hexmask.long.byte 0x48 8.--15. 1. " CLVCOEF ,Line average coefficient (k)" textline " " bitfld.long 0x48 4.--5. " CLVRVSL ,Reset value for the Clamp value of previous line" "Base value calc. for Horizontal direct.,Value set via conf. reg.,No update,?..." textline " " bitfld.long 0x48 0.--2. " CLVOBH ,Optical Black H valid (2L)" "0,1,2,3,4,5,6,7" line.long 0x4c "CLVWIN1,Vertical Black Clamp Configuration 1 Register" hexmask.long.word 0x4c 0.--12. 1. " CLVSH ,Optical Black Start position (H)" line.long 0x50 "CLVWIN2,Vertical Black Clamp configuration 2 Register" hexmask.long.word 0x50 0.--12. 1. " CLVSV ,Optical Black Start position (V)" line.long 0x54 "CLVWIN3,Vertical Black Clamp Configuration 3 Register" hexmask.long.word 0x54 0.--12. 1. " CLVOBV ,Optical Black V valid" group.long 0x1a4++0x23 line.long 0x00 "CSCCTL,Color Space Converter Enable Register" bitfld.long 0x00 0. " CSCEN ,Controls ON/OFF of Color Space Converter" "Disabled,Enabled" line.long 0x4 "CSCM0,Color Space Converter Coefficients #0 Register" hexmask.long.byte 0x4 8.--15. 1. " CSCM01 ,Color space conversion coefficient value 01" hexmask.long.byte 0x4 0.--7. 1. " CSCM00 ,Color space conversion coefficient value M00" line.long 0x8 "CSCM1,Color Space Converter Coefficients #1 Register" hexmask.long.byte 0x8 8.--15. 1. " CSCM03 ,Color space conversion coefficient value 03" hexmask.long.byte 0x8 0.--7. 1. " CSCM02 ,Color space conversion coefficient value M02" line.long 0xC "CSCM2,Color Space Converter Coefficients #2 Register" hexmask.long.byte 0xC 8.--15. 1. " CSCM11 ,Color space conversion coefficient value 11" hexmask.long.byte 0xC 0.--7. 1. " CSCM10 ,Color space conversion coefficient value M10" line.long 0x10 "CSCM3,Color Space Converter Coefficients #3 Register" hexmask.long.byte 0x10 8.--15. 1. " CSCM13 ,Color space conversion coefficient value 13" hexmask.long.byte 0x10 0.--7. 1. " CSCM12 ,Color space conversion coefficient value M12" line.long 0x14 "CSCM4,Color Space Converter Coefficients #4 Register" hexmask.long.byte 0x14 8.--15. 1. " CSCM21 ,Color space conversion coefficient value 21" hexmask.long.byte 0x14 0.--7. 1. " CSCM20 ,Color space conversion coefficient value M20" line.long 0x18 "CSCM5,Color Space Converter Coefficients #5 Register" hexmask.long.byte 0x18 8.--15. 1. " CSCM23 ,Color space conversion coefficient value 23" hexmask.long.byte 0x18 0.--7. 1. " CSCM22 ,Color space conversion coefficient value M22" line.long 0x1C "CSCM6,Color Space Converter Coefficients #6 Register" hexmask.long.byte 0x1C 8.--15. 1. " CSCM31 ,Color space conversion coefficient value 31" hexmask.long.byte 0x1C 0.--7. 1. " CSCM30 ,Color space conversion coefficient value M30" line.long 0x20 "CSCM7,Color Space Converter Coefficients #7 Register" hexmask.long.byte 0x20 8.--15. 1. " CSCM33 ,Color space conversion coefficient value 33" hexmask.long.byte 0x20 0.--7. 1. " CSCM32 ,Color space conversion coefficient value M32" width 0xb tree.end tree "IPIPEIF (Image Pipe Input Interface)" base asd:0x01c71200 width 0xb group.long 0x00++0x3 line.long 0x00 "ENABLE,IPIPE I/F Enable Register" bitfld.long 0x00 1. " SYNCOFF ,SYNC out mask" "Enabled,Disabled" bitfld.long 0x00 0. " ENABLE ,IPIPE I/F Enable" "Disabled,Enabled" if (((data.long(asd:0x01c71200+0x04))&0x0c)==0x04) group.long 0x04++0x03 line.long 0x00 "CFG1,IPIPE I/F Configuration 1 Register" bitfld.long 0x00 14.--15. " INPSRC1 ,Parallel Port/YCbCr Data Port Selection" "Parallel Port,SDRAM (raw),Parallel Port & SDRAM (Darkframe),SDRAM (YUV)" textline " " bitfld.long 0x00 11.--13. " DATASFT ,SDRAM Read Data Shift Shift (0-7)" "Read(13:0),Read(12:0)&'0',Read(11:0)&'00',Read(10:0)&'000',Read(9:0)&'0000',Read(8:0)&'00000',Read(7:0)&'000000',Read(15:2)" textline " " bitfld.long 0x00 10. " CLKSEL ,IPIPEIF & IPIPE Clock Select" "PCLK,CLKDIV" textline " " bitfld.long 0x00 8.--9. " UNPACK ,8/12-Bit Packed Mode (bits / pixel)" "16,8,8+inverse Alaw(8-10),12" textline " " bitfld.long 0x00 7. " AVGFILT ,Averaging Filter" "Off,On" textline " " bitfld.long 0x00 2.--3. " INPSRC2 ,ISIF/YCbCr Data Port Selection" "ISIF,SDRAM (raw),ISIF & SDRAM (Darkframe),SDRAM (YUV)" textline " " bitfld.long 0x00 1. " DECIM ,Pixel Decimation" "No decimation,Decimate" textline " " bitfld.long 0x00 0. " ONESHOT ,One Shot Mode" "Continuous,One shot" elif (((data.long(asd:0x01c71200+0x04))&0x0c)==0x08) group.long 0x04++0x03 line.long 0x00 "CFG1,IPIPE I/F Configuration 1 Register" bitfld.long 0x00 14.--15. " INPSRC1 ,Parallel Port/YCbCr Data Port Selection" "Parallel Port,SDRAM (raw),Parallel Port & SDRAM (Darkframe),SDRAM (YUV)" textline " " bitfld.long 0x00 11.--13. " DATASFT ,SDRAM Read Data Shift Shift (0-7)" "Read(13:0),Read(12:0)&'0',Read(11:0)&'00',Read(10:0)&'000',Read(9:0)&'0000',Read(8:0)&'00000',Read(7:0)&'000000',Read(15:2)" textline " " textline " " bitfld.long 0x00 8.--9. " UNPACK ,8/12-Bit Packed Mode (bits / pixel)" "16,8,8+inverse Alaw(8-10),12" textline " " bitfld.long 0x00 7. " AVGFILT ,Averaging Filter" "Off,On" textline " " bitfld.long 0x00 2.--3. " INPSRC2 ,ISIF/YCbCr Data Port Selection" "ISIF,SDRAM (raw),ISIF & SDRAM (Darkframe),SDRAM (YUV)" textline " " bitfld.long 0x00 1. " DECIM ,Pixel Decimation" "No decimation,Decimate" textline " " elif (((data.long(asd:0x01c71200+0x04))&0x0c)==0x0c) group.long 0x04++0x03 line.long 0x00 "CFG1,IPIPE I/F Configuration 1 Register" bitfld.long 0x00 14.--15. " INPSRC1 ,Parallel Port/YCbCr Data Port Selection" "Parallel Port,SDRAM (raw),Parallel Port & SDRAM (Darkframe),SDRAM (YUV)" textline " " textline " " bitfld.long 0x00 10. " CLKSEL ,IPIPEIF & IPIPE Clock Select" "PCLK,CLKDIV" textline " " textline " " bitfld.long 0x00 7. " AVGFILT ,Averaging Filter" "Off,On" textline " " bitfld.long 0x00 2.--3. " INPSRC2 ,ISIF/YCbCr Data Port Selection" "ISIF,SDRAM (raw),ISIF & SDRAM (Darkframe),SDRAM (YUV)" textline " " bitfld.long 0x00 1. " DECIM ,Pixel Decimation" "No decimation,Decimate" textline " " bitfld.long 0x00 0. " ONESHOT ,One Shot Mode" "Continuous,One shot" else group.long 0x04++0x03 line.long 0x00 "CFG1,IPIPE I/F Configuration 1 Register" bitfld.long 0x00 14.--15. " INPSRC1 ,Parallel Port/YCbCr Data Port Selection" "Parallel Port,SDRAM (raw),Parallel Port & SDRAM (Darkframe),SDRAM (YUV)" textline " " textline " " textline " " textline " " bitfld.long 0x00 7. " AVGFILT ,Averaging Filter" "Off,On" textline " " bitfld.long 0x00 2.--3. " INPSRC2 ,ISIF/YCbCr Data Port Selection" "ISIF,SDRAM (raw),ISIF & SDRAM (Darkframe),SDRAM (YUV)" textline " " bitfld.long 0x00 1. " DECIM ,Pixel Decimation" "No decimation,Decimated" textline " " endif if (((data.long(asd:0x01c71200+0x04))&0x0c)==(0x08)) group.long 0x08++0x07 line.long 0x00 "PPLN,IPIPE I/F Start pixel in HD Register" hexmask.long.word 0x00 0.--12. 1. " PPLN ,Start Pixel in Horizontal Sync (HD)" line.long 0x04 "LPFR,IPIPE I/F Start line in VD Register" hexmask.long.word 0x04 0.--12. 1. " LPFR ,Start Pixel in Vertical Sync (VD)" elif (((data.long(asd:0x01c71200+0x04))&0x0c)==(0x04||0x0c)) group.long 0x08++0x7 line.long 0x00 "PPLN,IPIPE I/F Interval of HD Register" hexmask.long.word 0x00 0.--12. 1. " PPLN ,Interval of Horizontal Sync (HD)" line.long 0x04 "LPFR,IPIPE I/F Start line in VD Register" hexmask.long.word 0x04 0.--12. 1. " LPFR ,Interval of Vertical Sync (VD)" else hgroup.long 0x08++0x7 hide.long 0x00 "PPLN,IPIPE I/F Interval of HD Register" hide.long 0x04 "LPFR,IPIPE I/F Start line in VD Register" endif if (((data.long(asd:0x01c71200+0x04))&0x0c)==0x00) hgroup.long 0x10++0x13 hide.long 0x00 "HNUM,IPIPE I/F Number of valid pixels per line Register" hide.long 0x04 "VNUM,IPIPE I/F Number of Valid Lines per Frame Register" hide.long 0x08 "ADDRU,IPIPE I/F Memory Address (Upper) Register" hide.long 0x0c "ADDRL,IPIPE I/F Memory Address (Lower) Register" hide.long 0x10 "ADOFS,IPIPE I/F Address Offset of Each Line Register" else group.long 0x10++0x13 line.long 0x00 "HNUM,IPIPE I/F Number of valid pixels per line Register" hexmask.long.word 0x00 0.--12. 1. " HNUM ,The Number of Valid Pixel in a Line" line.long 0x04 "VNUM,IPIPE I/F Number of Valid Lines per Frame Register" hexmask.long.word 0x04 0.--12. 1. " VNUM ,The Number of Valid Lines in a Vertical" line.long 0x08 "ADDRU,IPIPE I/F Memory Address (Upper) Register" bitfld.long 0x08 10. " ADDRMSB ,Memory Address - MSB" "0,1" bitfld.long 0x08 9. " ADOFS9 ,The Address Offset of each line - MSB" "0,1" hexmask.long.word 0x08 0.--8. 1. " ADDRMSB ,Memory Address - Upper" line.long 0x0c "ADDRL,IPIPE I/F Memory Address (Lower) Register" hexmask.long.word 0x0c 0.--15. 1. " ADDRL ,Memory Address - Lower" line.long 0x10 "ADOFS,IPIPE I/F Address Offset of Each Line Register" hexmask.long.word 0x10 0.--8. 1. " ADOFS ,The Address Offset of Each Line" endif group.long 0x24++0x27 line.long 0x00 "RSZ,IPIPE I/F Horizontal Resizing Parameter Register" hexmask.long.byte 0x00 0.--6. 1. " RSZ ,The Horizontal Resizing Parameter" line.long 0x04 "GAIN,IPIPE I/F Gain Parameter Register" hexmask.long.word 0x04 0.--9. 1. " GAIN ,Gain Parameter" line.long 0x08 "DPCM,IPIPE I/F DPCM Configuration" bitfld.long 0x08 2. " BITS ,DPCM Decompression Mode" "8 bit to 10 bit,8 bit to 12 bit" bitfld.long 0x08 1. " PRED ,DPCM Prediction Mode" "Simple,Advanced" bitfld.long 0x08 0. " ENA ,DPCM Decompression enable" "Disabled,Enabled" line.long 0x0c "CFG2,IPIPE I/F Configuration 2 Register" bitfld.long 0x0C 7. " YUV8P ,Y/C phase" "Low,High" bitfld.long 0x0C 6. " YUV8 ,YUV 8bit mode" "16 bit,8 bit" bitfld.long 0x0C 5. " DFSDIR ,DFS direction ofsubtruction" "Low,High" textline " " bitfld.long 0x0C 4. " WENE ,External WEN Selection" "Not used,Used" bitfld.long 0x0C 3. " YUV16 ,Input Type" "RAW sensor,YUV 16-bit" bitfld.long 0x0C 2. " VDPOL ,VD Sync Polarity" "Positive,Negative" textline " " bitfld.long 0x0C 1. " HDPOL ,HD Sync Polarity" "Positive,Negative" bitfld.long 0x0C 0. " INTSRC ,IPIPE I/F Interrupt Source Select" "Parallel port,ISIF" line.long 0x10 "INIRSZ,IPIPE I/F Initial Position of Resize Register" bitfld.long 0x10 13. " ALNSYNC ,Force the HD and VD align with start position" "Not forced,Forced" hexmask.long.word 0x10 0.--12. 1. " INIRSZ ,Initial Position of Resizer" line.long 0x14 "OCLIP,IPIPE I/F Output Clipping Value Register" hexmask.long.word 0x14 0.--11. 1. " OCLIP ,Output Clipping Value after gain Control" line.long 0x18 "DTUDF,IPIPE I/F Data Underflow Error Status Register" bitfld.long 0x18 0. " DTUDF ,Data Underflow Error Status" "No error,Error" line.long 0x1c "CLKDIV,IPIPE I/F Clock Rate Configuration Register" hexmask.long.word 0x1C 0.--15. 1. " CLKDIV ,Clock rate configuration" line.long 0x20 "DPC1,IPIPE I/F Defect Pixel Correction Register" bitfld.long 0x20 12. " ENA ,DPC enable applies DPC for VPIF,ISIF input path" "Disabled,Enabled" hexmask.long.word 0x20 0.--11. 1. " TH ,DPC threshold value" line.long 0x24 "DPC2,PIPE I/F Defect Pixel Correction Register" bitfld.long 0x24 12. " ENA ,DPC enable applies DPC for SDRAM input path" "Disabled,Enabled" hexmask.long.word 0x24 0.--11. 1. " TH ,DPC threshold value" group.long 0x54++0x07 line.long 0x00 "RSZ3A,IPIPE I/F Horizontal Resizing Parameter for H3A" bitfld.long 0x00 9. " DECIM ,Pixel Decimation Decimation rate defined by RSZ register" "No decimation,Decimated" bitfld.long 0x00 8. " AVGFILT ,Averaging Filter It applies (1,2,1) filter for the RGB/YCbCr data" "Off,On" hexmask.long.byte 0x00 0.--6. 1. " RSZ ,The Horizontal Resizing Parameter" line.long 0x04 "INIRSZ3A" bitfld.long 0x04 13. " ALSYNC ,Force the HD and VD align with start position" "Not forced,Forced" hexmask.long.word 0x04 0.--12. 1. " INIRSZ ,Initial Position of Resizer" width 0xb tree.end tree "IPIPE (Image Pipe)" base asd:0x01c70800 width 15. group.long 0x00++0x0b line.long 0x00 "SRC_EN,IPIPE Enable Register" bitfld.long 0x00 0. " EN ,IPIPE Enable" "Disabled,Enabled" line.long 0x04 "SRC_MODE,One Shot Mode Register" bitfld.long 0x04 1. " WRT ,CAM_WEN mode selection" "Disabled,Enabled" bitfld.long 0x04 0. " OST ,One shot mode" "Disabled,Enabled" line.long 0x08 "SRC_FMT,Input/Output Data Paths Register" bitfld.long 0x08 0.--1. " FMT ,Data path selection (input/output)" "Bayer/YCbCr (or RGB),Bayer/Bayer,Bayer/Disabled,YCbCr (16bit)/YCbCr (or RGB)" if (((data.long(asd:0x01c70800+0x08))&0x03)==0x03) hgroup.long 0x0c++0x03 hide.long 0x00 "SRC_COL,Color Pattern Register" else group.long 0x0c++0x03 line.long 0x00 "SRC_COL,Color Pattern Register" bitfld.long 0x00 6.--7. " OO ,Color of the odd line and odd pixel" "Red,Green (red line),Green (blue line),Blue" bitfld.long 0x00 4.--5. " OE ,Color of the odd line and even pixel" "Red,Green (red line),Green (blue line),Blue" textline " " bitfld.long 0x00 2.--3. " EO ,Color of the even line and odd pixel" "Red,Green (red line),Green (blue line),Blue" bitfld.long 0x00 0.--1. " EE ,Color of the even line and even pixel" "Red,Green (red line),Green (blue line),Blue" endif group.long 0x10++0x0f line.long 0x00 "SRC_VPS,Vertical Start Position Register" hexmask.long.word 0x00 0.--15. 1. " VAL ,Vertical Start Position" line.long 0x04 "SRC_VSZ,Vertical Processing Size Register" hexmask.long.word 0x04 0.--12. 1. " VAL ,Vertical Processing Size" line.long 0x08 "SRC_HPS,Horizontal Start Position Register" hexmask.long.word 0x08 0.--15. 1. " VAL ,Horizontal Start Position" line.long 0x0c "SRC_HSZ,Horizontal Processing Size Register" hexmask.long.word 0x0C 0.--12. 1. " VAL ,Horizontal Processing Size" rgroup.long 0x24++0x03 line.long 0x00 "DMA_STA,Status Flags (Reserved) Register" bitfld.long 0x00 4. " HP_STATUS ,Histogram Process Status" "Not busy,Busy" bitfld.long 0x00 3. " HB_STATUS ,Histogram Bank Status" "Not busy,Busy" textline " " bitfld.long 0x00 2. " BSC_STATUS ,Boundary Signal Calculator Process Status" "Not busy,Busy" bitfld.long 0x00 1. " BP_STATUS ,Boxcar Process Status" "Not busy,Busy" textline " " bitfld.long 0x00 0. " BE_STATUS ,Boxcar Error Status" "No error,Error" group.long 0x28++0x07 line.long 0x00 "GCK_MMR,MMR Gated Clock Control Register" bitfld.long 0x00 0. " REG ,IPIPE MMR Clock Enable" "Disabled,Enabled" line.long 0x04 "GCK_PIX,PCLK Gated Clock Control Register" bitfld.long 0x04 3. " G3 ,IPIPE G3 Clock Enable" "Disabled,Enabled" bitfld.long 0x04 2. " G2 ,IPIPE G2 Clock Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " G1 ,IPIPE G1 Clock Enable" "Disabled,Enabled" bitfld.long 0x04 0. " G0 ,IPIPE G0 Clock Enable" "Disabled,Enabled" group.long 0x34++0x0f line.long 0x00 "DPC_LUT_EN,LUTDPC (=LUT Defect Pixel Correction): Enable Register" bitfld.long 0x00 0. " EN ,LUT Defect Pixel Correction Enable" "Disabled,Enabled" line.long 0x04 "DPC_LUT_SEL,LUTDPC: Processing Mode Selection Register" bitfld.long 0x04 1. " TBL ,LUT type selection" "Up to 1024,Infinite num." bitfld.long 0x04 0. " SEL ,Correction method for option #0 in LUT entries" "Black,White" line.long 0x08 "DPC_LUT_ADR,LUTDPC: Start Address in LUT Register" hexmask.long.word 0x08 0.--9. 1. " ADR ,Start Address in LUT" line.long 0x0c "DPC_LUT_SIZ,LUTDPC: Number of available entries in LUT Register" hexmask.long.word 0x0c 0.--9. 1. " SIZ ,Number of valid data in LUT" group.long 0x1d0++0x1f line.long 0x0 "WB2_OFT_R,WB2: Offset R Register" hexmask.long.word 0x0 0.--11. 1. " VAL ,White balance Offset for R (S12)" line.long 0x4 "WB2_OFT_GR,WB2: Offset GR Register" hexmask.long.word 0x4 0.--11. 1. " VAL ,White balance Offset for GR (S12)" line.long 0x8 "WB2_OFT_GB,WB2: Offset GB Register" hexmask.long.word 0x8 0.--11. 1. " VAL ,White balance Offset for GB (S12)" line.long 0xC "WB2_OFT_B,WB2: Offset B Register" hexmask.long.word 0xC 0.--11. 1. " VAL ,White balance Offset for B (S12)" line.long 0x10 "WB2_WGN_R,WB2: Gain R Register" hexmask.long.word 0x10 0.--12. 1. " VAL ,White balance Gain for R (U4.9 = 0 - 15.998)" line.long 0x14 "WB2_WGN_GR,WB2: Gain GR Register" hexmask.long.word 0x14 0.--12. 1. " VAL ,White balance Gain for GR (U4.9 = 0 - 15.998)" line.long 0x18 "WB2_WGN_GB,WB2: Gain GB Register" hexmask.long.word 0x18 0.--12. 1. " VAL ,White balance Gain for GB (U4.9 = 0 - 15.998)" line.long 0x1C "WB2_WGN_B,WB2: Gain B Register" hexmask.long.word 0x1C 0.--12. 1. " VAL ,White balance Gain for B (U4.9 = 0 - 15.998)" group.long 0x22c++0x33 line.long 0x0 "RGB1_MUL_RR,RGB1: Matrix Coefficient RR Register" hexmask.long.word 0x0 0.--11. 1. " VAL ,Matrix Coefficient for RR (S4.8 = -8 - +7.996)" line.long 0x4 "RGB1_MUL_GR,RGB1: Matrix Coefficient GR Register" hexmask.long.word 0x4 0.--11. 1. " VAL ,Matrix Coefficient for GR (S4.8 = -8 - +7.996)" line.long 0x8 "RGB1_MUL_BR,RGB1: Matrix Coefficient BR Register" hexmask.long.word 0x8 0.--11. 1. " VAL ,Matrix Coefficient for BR (S4.8 = -8 - +7.996)" line.long 0xC "RGB1_MUL_RG,RGB1: Matrix Coefficient RG Register" hexmask.long.word 0xC 0.--11. 1. " VAL ,Matrix Coefficient for RG (S4.8 = -8 - +7.996)" line.long 0x10 "RGB1_MUL_GG,RGB1: Matrix Coefficient GG Register" hexmask.long.word 0x10 0.--11. 1. " VAL ,Matrix Coefficient for GG (S4.8 = -8 - +7.996)" line.long 0x14 "RGB1_MUL_BG,RGB1: Matrix Coefficient BG Register" hexmask.long.word 0x14 0.--11. 1. " VAL ,Matrix Coefficient for BG (S4.8 = -8 - +7.996)" line.long 0x18 "RGB1_MUL_RB,RGB1: Matrix Coefficient RB Register" hexmask.long.word 0x18 0.--11. 1. " VAL ,Matrix Coefficient for RB (S4.8 = -8 - +7.996)" line.long 0x1C "RGB1_MUL_GB,RGB1: Matrix Coefficient GB Register" hexmask.long.word 0x1C 0.--11. 1. " VAL ,Matrix Coefficient for GB (S4.8 = -8 - +7.996)" line.long 0x20 "RGB1_MUL_BB,RGB1: Matrix Coefficient BB Register" hexmask.long.word 0x20 0.--11. 1. " VAL ,Matrix Coefficient for BB (S4.8 = -8 - +7.996)" line.long 0x24 "RGB1_OFT_OR,RGB1: Offset R Register" hexmask.long.word 0x24 0.--12. 1. " VAL ,Offset for R (S13)" line.long 0x28 "RGB1_OFT_OG,RGB1: Offset G Register" hexmask.long.word 0x28 0.--12. 1. " VAL ,Offset for G (S13)" line.long 0x2c "RGB1_OFT_OB,RGB1: Offset B Register" hexmask.long.word 0x2c 0.--12. 1. " VAL ,Offset for B (S13)" line.long 0x30 "GMM_CFG,Gamma Correction Configuration Register" bitfld.long 0x30 5.--6. " SIZ ,Size of Gamma Table (word)" "64,128,256,512" bitfld.long 0x30 4. " TBL ,Selection of Gamma Table" "RAM,ROM" textline " " bitfld.long 0x30 2. " BYPB ,Gamma Correction Mode for B" "Not bypassed,Bypassed" bitfld.long 0x30 1. " BYPG ,Gamma Correction Mode for G" "Not bypassed,Bypassed" textline " " bitfld.long 0x30 0. " BYPR ,Gamma Correction Mode for R" "Not bypassed,Bypassed" group.long 0x294++0x37 line.long 0x00 "YUV_ADJ,Luminance Adjustment Register" hexmask.long.byte 0x00 8.--15. 1. " BRT ,Brightness Offset value for brightness control" hexmask.long.byte 0x00 0.--7. 1. " CTR ,Contrast Multiplier coefficient for contrast control (U4.4 = 0 - +15.94)" line.long 0x4 "YUV_MUL_RY,YUV: Matrix Coefficient RY Register" hexmask.long.word 0x4 0.--11. 1. " VAL ,Matrix Coefficient for RY (S4.8 = -8 - +7.996)" line.long 0x8 "YUV_MUL_GY,YUV: Matrix Coefficient GY Register" hexmask.long.word 0x8 0.--11. 1. " VAL ,Matrix Coefficient for GY (S4.8 = -8 - +7.996)" line.long 0xC "YUV_MUL_BY,YUV: Matrix Coefficient BY Register" hexmask.long.word 0xC 0.--11. 1. " VAL ,Matrix Coefficient for BY (S4.8 = -8 - +7.996)" line.long 0x10 "YUV_MUL_RCB,YUV: Matrix Coefficient RCB Register" hexmask.long.word 0x10 0.--11. 1. " VAL ,Matrix Coefficient for RCB (S4.8 = -8 - +7.996)" line.long 0x14 "YUV_MUL_GCB,YUV: Matrix Coefficient GCB Register" hexmask.long.word 0x14 0.--11. 1. " VAL ,Matrix Coefficient for GCB (S4.8 = -8 - +7.996)" line.long 0x18 "YUV_MUL_BCB,YUV: Matrix Coefficient BCB Register" hexmask.long.word 0x18 0.--11. 1. " VAL ,Matrix Coefficient for BCB (S4.8 = -8 - +7.996)" line.long 0x1C "YUV_MUL_RCR,YUV: Matrix Coefficient RCR Register" hexmask.long.word 0x1C 0.--11. 1. " VAL ,Matrix Coefficient for RCR (S4.8 = -8 - +7.996)" line.long 0x20 "YUV_MUL_GCR,YUV: Matrix Coefficient GCR Register" hexmask.long.word 0x20 0.--11. 1. " VAL ,Matrix Coefficient for GCR (S4.8 = -8 - +7.996)" line.long 0x24 "YUV_MUL_BCR,YUV: Matrix Coefficient BCR Register" hexmask.long.word 0x24 0.--11. 1. " VAL ,Matrix Coefficient for BCR (S4.8 = -8 - +7.996)" line.long 0x28 "YUV_OFT_Y,YUV: Offset Y Register" hexmask.long.word 0x28 0.--10. 1. " VAL ,Y Output Offset (S11)" line.long 0x2c "YUV_OFT_CB,YUV: Offset CB Register" hexmask.long.word 0x2c 0.--10. 1. " VAL ,Cb Output Offset (S11)" line.long 0x30 "YUV_OFT_CR,YUV: Offset CR Register" hexmask.long.word 0x30 0.--10. 1. " VAL ,Cr Output Offset (S11)" line.long 0x34 "YUV_PHS,Chrominance Position Register" bitfld.long 0x34 1. " LPF ,121-LPF Enable for Chrominance" "Off,On" bitfld.long 0x34 0. " POS ,Phase position of the output of the Chrominance" "Same position,Middle" group.long 0x2d4++0x47 line.long 0x00 "YEE_EN,Edge Enhancer Enable Register" bitfld.long 0x00 0. " EN ,Edge Enhancer Enable" "Disabled,Enabled" line.long 0x04 "YEE_TYP,YEE: Method Selection Register" bitfld.long 0x04 1. " HAL ,Halo Reduction Enable" "Disabled,Enabled" bitfld.long 0x04 0. " SEL ,Merging Method between Edge Enhancer and Edge Sharpener" "absmax(EE;ES),EE + ES" line.long 0x08 "YEE_SHF,YEE: HPF Shift Length" bitfld.long 0x08 0.--3. " SHF ,YEE_SHF Down shift length of high pass filter (HPF) in edge enhancer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "YEE_MUL_00,YEE: HPF Coefficient 00 Register" hexmask.long.word 0xC 0.--9. 1. " VAL ,YEE_HPF Coefficient 00 (S10)" line.long 0x10 "YEE_MUL_01,YEE: HPF Coefficient 01 Register" hexmask.long.word 0x10 0.--9. 1. " VAL ,YEE_HPF Coefficient 01 (S10)" line.long 0x14 "YEE_MUL_02,YEE: HPF Coefficient 02 Register" hexmask.long.word 0x14 0.--9. 1. " VAL ,YEE_HPF Coefficient 02 (S10)" line.long 0x18 "YEE_MUL_10,YEE: HPF Coefficient 10 Register" hexmask.long.word 0x18 0.--9. 1. " VAL ,YEE_HPF Coefficient 10 (S10)" line.long 0x1C "YEE_MUL_11,YEE: HPF Coefficient 11 Register" hexmask.long.word 0x1C 0.--9. 1. " VAL ,YEE_HPF Coefficient 11 (S10)" line.long 0x20 "YEE_MUL_12,YEE: HPF Coefficient 12 Register" hexmask.long.word 0x20 0.--9. 1. " VAL ,YEE_HPF Coefficient 12 (S10)" line.long 0x24 "YEE_MUL_20,YEE: HPF Coefficient 20 Register" hexmask.long.word 0x24 0.--9. 1. " VAL ,YEE_HPF Coefficient 20 (S10)" line.long 0x28 "YEE_MUL_21,YEE: HPF Coefficient 21 Register" hexmask.long.word 0x28 0.--9. 1. " VAL ,YEE_HPF Coefficient 21 (S10)" line.long 0x2C "YEE_MUL_22,YEE: HPF Coefficient 22 Register" hexmask.long.word 0x2C 0.--9. 1. " VAL ,YEE_HPF Coefficient 22 (S10)" line.long 0x30 "YEE_THR,YEE: Lower Threshold before referring to LUT Register" bitfld.long 0x30 0.--5. " VAL ,YEE_THR Lower Threshold before referring to LUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x34 "YEE_E_GAN,YEE: Edge Sharpener Gain Register" hexmask.long.word 0x34 0.--11. 1. " VAL ,YEE_E_GAN Edge Sharpener Gain" line.long 0x38 "YEE_E_THR_1,YEE: Edge Sharpener HP Value Lower Threshold Register" hexmask.long.word 0x38 0.--11. 1. " VAL ,YEE_E_THR_1 Edge Sharpener Lower Threshold" line.long 0x3c "YEE_E_THR_2,YEE: Edge Sharpener HP Value Upper Limit Register" bitfld.long 0x3C 0.--5. " VAL ,YEE_E_THR_2 Edge Sharpener HP Value Upper Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x40 "YEE_G_GAN,YEE: Edge Sharpener Gain on Gradient Register" hexmask.long.byte 0x40 0.--7. 1. " VAL ,YEE_E_G_GAN Edge Sharpener Gain on Gradient" line.long 0x44 "YEE_G_OFT,YEE: Edge Sharpener Offset on Gradient Register" bitfld.long 0x44 0.--5. " VAL ,YEE_G_OFT Edge Sharpener Offset on Gradient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x380++0x17 line.long 0x00 "BOX_EN,Boxcar Enable Register" bitfld.long 0x00 0. " EN ,Boxcar Enable" "Disabled,Enabled" line.long 0x04 "BOX_MODE,BOX One Shot Mode Register" bitfld.long 0x04 0. " OST ,Boxcar One Shot Mode Enable" "Continuous,One shot" line.long 0x08 "BOX_TYP,Box Size Register" bitfld.long 0x08 0. " SEL ,Block Size in Boxcar Sampling" "8x8,16x16" line.long 0x0c "BOX_SHF,Box Down Shift Value Register" bitfld.long 0x0C 0.--2. " VAL ,Down shift value of output data of Boxcar" "0,1,2,3,4,?..." line.long 0x10 "BOX_SDR_SAD_H,BOX: SDRAM Address MSB Register" hexmask.long.word 0x10 0.--15. 1. " VAL ,Boxcar SDRAM Address (H)" line.long 0x14 "BOX_SDR_SAD_L,BOX: SDRAM Address LSB Register" hexmask.long.word 0x14 5.--15. 0x20 " VAL ,Boxcar SDRAM Address (L)" group.long 0x39c++0x63 line.long 0x00 "HST_EN,Histogram Enable Register" bitfld.long 0x00 0. " EN ,Histogram Enable" "Disabled,Enabled" line.long 0x04 "HST_MODE,HST: One Shot Mode Register" bitfld.long 0x04 0. " OST ,Histogram One Shot Mode Enable" "Continuous,One shot" line.long 0x08 "HST_SEL,HST: Source Select Register" bitfld.long 0x08 2. " SEL ,Histogram Input Selection" "1st Noise Filter,RGB2YUV" bitfld.long 0x08 0.--1. " TYP ,Histogram Green Sampling method Selection" "Gr,Gb,Gavg,?..." line.long 0x0c "HST_PARA,HST: Parameters Select Register" bitfld.long 0x0C 12.--13. " BIN ,Number of bins" "32,64,128,256" bitfld.long 0x0C 8.--11. " SHF ,Shift Length of input data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 7. " COL3 ,Color 3 Enable Y : HST_SEL[SEL]=0 Y2: HST_SEL[SEL]=1" "Disabled,Enabled" bitfld.long 0x0C 6. " COL2 ,Color 2 Enable B : HST_SEL[SEL]=0 Cb: HST_SEL[SEL]=1" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " COL1 ,Color 1 Enable G : HST_SEL[SEL]=0 Y1: HST_SEL[SEL]=1" "Disabled,Enabled" bitfld.long 0x0C 4. " COL0 ,Color 0 Enable R : HST_SEL[SEL]=0 Cr: HST_SEL[SEL]=1" "Disabled,Enabled" bitfld.long 0x0C 3. " RGN3 ,Region 3 Enable" "Disabled,Enabled" bitfld.long 0x0C 2. " RGN2 ,Region 2 Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " RGN1 ,Region 1 Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " RGN0 ,Region 0 Enable" "Disabled,Enabled" line.long 0x10 "HST_0_VPS,HST: Vertical Start Position Register Region 0" hexmask.long.word 0x10 0.--12. 1. " VAL ,Vertical start position of the region 0 from the SRC_VPS" line.long (0x10+0x04) "HST_0_VSZ,HST: Vertical Size Register Region 0" hexmask.long.word (0x10+0x04) 0.--12. 1. " VAL ,Vertical size of the region 0" line.long (0x10+0x08) "HST_0_HPS,HST: Horizontal Start Position Register Region 0" hexmask.long.word (0x10+0x08) 0.--12. 1. " VAL ,Horizontal start position of the region 0 from the SRC_VPS" line.long (0x10+0x0c) "HST_0_HSZ,HST: Horizontal Size Register Region 0" hexmask.long.word (0x10+0x0c) 0.--12. 1. " VAL ,Horizontal size of the region 0" line.long 0x20 "HST_1_VPS,HST: Vertical Start Position Register Region 1" hexmask.long.word 0x20 0.--12. 1. " VAL ,Vertical start position of the region 1 from the SRC_VPS" line.long (0x20+0x04) "HST_1_VSZ,HST: Vertical Size Register Region 1" hexmask.long.word (0x20+0x04) 0.--12. 1. " VAL ,Vertical size of the region 1" line.long (0x20+0x08) "HST_1_HPS,HST: Horizontal Start Position Register Region 1" hexmask.long.word (0x20+0x08) 0.--12. 1. " VAL ,Horizontal start position of the region 1 from the SRC_VPS" line.long (0x20+0x0c) "HST_1_HSZ,HST: Horizontal Size Register Region 1" hexmask.long.word (0x20+0x0c) 0.--12. 1. " VAL ,Horizontal size of the region 1" line.long 0x30 "HST_2_VPS,HST: Vertical Start Position Register Region 2" hexmask.long.word 0x30 0.--12. 1. " VAL ,Vertical start position of the region 2 from the SRC_VPS" line.long (0x30+0x04) "HST_2_VSZ,HST: Vertical Size Register Region 2" hexmask.long.word (0x30+0x04) 0.--12. 1. " VAL ,Vertical size of the region 2" line.long (0x30+0x08) "HST_2_HPS,HST: Horizontal Start Position Register Region 2" hexmask.long.word (0x30+0x08) 0.--12. 1. " VAL ,Horizontal start position of the region 2 from the SRC_VPS" line.long (0x30+0x0c) "HST_2_HSZ,HST: Horizontal Size Register Region 2" hexmask.long.word (0x30+0x0c) 0.--12. 1. " VAL ,Horizontal size of the region 2" line.long 0x40 "HST_3_VPS,HST: Vertical Start Position Register Region 3" hexmask.long.word 0x40 0.--12. 1. " VAL ,Vertical start position of the region 3 from the SRC_VPS" line.long (0x40+0x04) "HST_3_VSZ,HST: Vertical Size Register Region 3" hexmask.long.word (0x40+0x04) 0.--12. 1. " VAL ,Vertical size of the region 3" line.long (0x40+0x08) "HST_3_HPS,HST: Horizontal Start Position Register Region 3" hexmask.long.word (0x40+0x08) 0.--12. 1. " VAL ,Horizontal start position of the region 3 from the SRC_VPS" line.long (0x40+0x0c) "HST_3_HSZ,HST: Horizontal Size Register Region 3" hexmask.long.word (0x40+0x0c) 0.--12. 1. " VAL ,Horizontal size of the region 3" line.long 0x50 "HST_TBL,HST: Table Select Register" bitfld.long 0x50 1. " CLR ,Table Initialization" "Disabled,Enabled" bitfld.long 0x50 0. " SEL ,Output Table Select" "0 & 1,2 & 3" line.long 0x54 "HST_MUL_R,HST: Matrix Coefficient R Register" hexmask.long.byte 0x54 0.--7. 1. " VAL ,Matrix Coefficient for R used for the calculation of Y sampling value (S4.4)" line.long 0x58 "HST_MUL_GR,HST: Matrix Coefficient GR Register" hexmask.long.byte 0x58 0.--7. 1. " VAL ,Matrix Coefficient for GR used for the calculation of Y sampling value (S4.4)" line.long 0x5C "HST_MUL_GB,HST: Matrix Coefficient GB Register" hexmask.long.byte 0x5C 0.--7. 1. " VAL ,Matrix Coefficient for GB used for the calculation of Y sampling value (S4.4)" line.long 0x60 "HST_MUL_B,HST: Matrix Coefficient B Register" hexmask.long.byte 0x60 0.--7. 1. " VAL ,Matrix Coefficient for B used for the calculation of Y sampling value (S4.4)" width 0xb tree.end tree "RSZ (Resizer)" base asd:0x01c70400 width 16. group.long 0x00++0x27 line.long 0x00 "SRC_EN,RSZ Enable Register" bitfld.long 0x00 0. " EN ,RSZ Enable" "Disabled,Enabled" line.long 0x04 "SRC_MODE,One Shot Mode Register" bitfld.long 0x04 1. " WRT ,C_WE Mode Selection" "Disabled,Enabled" bitfld.long 0x04 0. " OST ,One Shot Mode" "Disabled,Enabled" line.long 0x08 "SRC_FMT0,Input Data Paths Register" bitfld.long 0x08 1. " BYPASS ,Enable Pass-through mode" "Disabled,Enabled" bitfld.long 0x08 0. " SRC ,Data Path through RSZ" "IPIPE,IPIPEIF" line.long 0x0c "SRC_FMT1,Source Image Format1 Register" bitfld.long 0x0C 2. " COL ,Y/C Selection" "Y,C" bitfld.long 0x0C 1. " 420 ,Chroma Format Selection" "422,420" bitfld.long 0x0C 0. " RAW ,Pass-through mode input data format selection" "YcbCr,Raw" line.long 0x10 "SRC_VPS,Vertical Start Position Register" hexmask.long.word 0x10 0.--15. 1. " VAL ,Vertical Start Position" line.long 0x14 "SRC_VSZ,Vertical Processing Size Register" hexmask.long.word 0x14 0.--12. 1. " VAL ,Vertical Processing Size" line.long 0x18 "SRC_HPS,Horizontal Start Position Register" hexmask.long.word 0x18 0.--15. 1. " VAL ,Horizontal Start Position" line.long 0x1c "SRC_HSZ,Horizontal Processing Size Register" hexmask.long.word 0x1c 0.--12. 1. " VAL ,Horizontal Processing Size" line.long 0x20 "DMA_RZA,SDRAM Request Minimum Interval for RZA Register" hexmask.long.byte 0x20 0.--7. 1. " VAL ,Minimum interval between two consecutive SDRAM requests for resize-A" line.long 0x24 "DMA_RZB,SDRAM Request Minimum Interval for RZB Register" hexmask.long.byte 0x24 0.--7. 1. " VAL ,Minimum interval between two consecutive SDRAM requests for resize-B" rgroup.long 0x28++0x03 line.long 0x00 "DMA_STA,Status of Resizer (Reserved) Register" bitfld.long 0x00 0. " STATUS ,Resize Process Status" "Low,High" group.long 0x2c++0x03 line.long 0x00 "GCK_MMR,MMR Gated Clock Control Register" bitfld.long 0x00 0. " REG ,RSZ MMR Clock Enable" "Disabled,Enabled" group.long 0x34++0x2b line.long 0x00 "GCK_SDR,SDR Gated Clock Control Register" bitfld.long 0x00 0. " CORE ,RSZ Core Clock Enable" "Disabled,Enabled" line.long 0x04 "IRQ_RZA,Interval of RZA circular IRQ Register" hexmask.long.word 0x04 0.--12. 1. " VAL ,Interval of RZA circular IRQ Interrupt signal at every lines of Resize & RGB output" line.long 0x08 "IRQ_RZB,Interval of RZB circular IRQ Register" hexmask.long.word 0x08 0.--12. 1. " VAL ,Interval of RZB circular IRQ Interrupt signal at every lines of Resize & RGB output" line.long 0x0c "YUV_Y_MIN,Saturation (Luminance Minimum) Register" hexmask.long.byte 0x0C 0.--7. 1. " VAL ,Minimum Luminance Value In RAW data processing" line.long 0x10 "YUV_Y_MAX,Saturation (Luminance Maximum) Register" hexmask.long.byte 0x10 0.--7. 1. " VAL ,Maximum Luminance Value In RAW data processing" line.long 0x14 "YUV_C_MIN,Saturation (Chrominance Minimum) Register" hexmask.long.byte 0x14 0.--7. 1. " VAL ,Minimum Chrominance Value In RAW data processing" line.long 0x18 "YUV_C_MAX,Saturation (Chrominance Maximum) Register" hexmask.long.byte 0x18 0.--7. 1. " VAL ,Maximum Chrominance Value In RAW data processing" line.long 0x1c "YUV_PHS,Chrominance Position Register" bitfld.long 0x1C 0. " POS ,Phase position of the output of the Chrominance" "Same position,Middle" line.long 0x20 "SEQ,Processing Mode Register" bitfld.long 0x20 4. " CRV ,Chroma sampling point change" "Disabled,Enabled" bitfld.long 0x20 3. " VRVB ,VRVB" "Disabled,Enabled" bitfld.long 0x20 2. " HRVB ,Horizontal reversal of output image for RZB" "Disabled,Enabled" bitfld.long 0x20 1. " VRVA ,Vertical reversal of output image for RZA" "Disabled,Enabled" textline " " bitfld.long 0x20 0. " HRVA ,Horizontal reversal of output image for RZA" "Disabled,Enabled" tree "Channel A" group.long 0x58++0x07 line.long 0x00 "RZA_EN,Resizer Channel A Enable" bitfld.long 0x00 0. " EN ,Resizer Enable" "Disabled,Enabled" line.long 0x04 "RZA_MODE,RZA: One Shot Mode Register" bitfld.long 0x04 0. " OST ,One Shot Mode Enable" "Continuous,One shot" if (((data.long(asd:0x01c70400+0x0c))&0x02)==0x00) group.long (0x58+0x08)++0x03 line.long 0x00 "RZA_420,RZA: Output Format Register" bitfld.long 0x00 1. " CEN ,Output Enable for Chrominance" "Disabled,Enabled" bitfld.long 0x00 0. " YEN ,Output Enable for Luminance" "Disabled,Enabled" else hgroup.long (0x58+0x08)++0x03 hide.long 0x00 "RZA_420,RZA: Output Format Register" endif group.long (0x58+0x0c)++0x83 line.long 0x00 "RZA_I_VPS,RZA: Vertical Start Position of the Input Register" hexmask.long.word 0x00 0.--12. 1. " VAL ,Vertical start position of image processing" line.long 0x04 "RZA_I_HPS,RZA: Horizontal Start Postion of the Input Register" hexmask.long.word 0x04 0.--12. 1. " VAL ,Horizontal start position of image processing" line.long 0x08 "RZA_O_VSZ,RZA: Vertical Size of the Output Register" hexmask.long.word 0x08 0.--12. 1. " VAL ,Vertical size of the output image" line.long 0x0c "RZA_O_HSZ,RZA: Horizontal Size of the Output Register" hexmask.long.word 0x0c 0.--12. 1. " VAL ,Horizontal size of output image" line.long 0x10 "RZA_V_PHS_Y,RZA: Vertical Resizing Process for Luminance Register" hexmask.long.word 0x10 0.--13. 1. " VAL ,Initial value for the phase value in vertical resizing process for Luminance" line.long 0x14 "RZA_V_PHS_C,RZA: Initial Phase of Vertical Resizing Process for Chrominance Register" hexmask.long.word 0x14 0.--13. 1. " VAL ,Initial value for the phase value in vertical resizing process for Chrominance" line.long 0x18 "RZA_V_DIF,RZA: Vertical Resize Parameter Register" hexmask.long.word 0x18 0.--13. 1. " VAL ,Vertical Resize Parameter" line.long 0x1c "RZA_V_TYP,RZA: Interpolation method for Vertical Rescaling Register" bitfld.long 0x1C 1. " C ,Selection of resizing method for Chrominance in vertical direction" "4-tap cubic convolution,2-tap linear interpolation" bitfld.long 0x1C 0. " Y ,Selection of resizing method for Luminance in vertical direction" "4-tap cubic convolution,2-tap linear interpolation" line.long 0x20 "RZA_V_LPF,RZA: Vertical LPF Intensity Register" bitfld.long 0x20 6.--11. " C ,Vertical LPF Intensity for Chrominance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x20 0.--5. " Y ,Vertical LPF Intensity for Luminance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x24 "RZA_H_PHS,RZA: Initial Phase of Horizontal Resizing Process Register" hexmask.long.word 0x24 0.--13. 1. " VAL ,Initial value for the phase value in horizontal resizing process" line.long 0x28 "RZA_H_PHS_ADJ,RZA: Additional Initial Phase of Vertical Resizing Process for Luminance Register" hexmask.long.word 0x28 0.--8. 1. " VAL ,Additional Initial Phase of Horizontal Resizing Process for Luminances" line.long 0x2c "RZA_H_DIF,RZA: Horizontal Resize Parameter Register" hexmask.long.word 0x2c 0.--13. 1. " VAL ,Horizontal Resize Parameter" line.long 0x30 "RZA_H_TYP,RZA: Interpolation method for horizontal rescaling Register" bitfld.long 0x30 1. " C ,Selection of resizing method for Chrominance in horizontal direction" "4-tap cubic convolution,2-tap linear interpolation" bitfld.long 0x30 0. " Y ,Selection of resizing method for Luminance in horizontal direction" "4-tap cubic convolution,2-tap linear interpolation" line.long 0x34 "RZA_H_LPF,RZA: Horizontal LPF Intensity Register" bitfld.long 0x34 6.--11. " C ,Horizontal LPF Intensity for Chrominance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x34 0.--5. " Y ,Horizontal LPF Intensity for Luminance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x38 "RZA_DWN_EN,RZA: Down Scale Mode Enable Register" bitfld.long 0x38 0. " EN ,Down Scale Mode Enable" "Disabled,Enabled" line.long 0x3c "RZA_DWN_AV,RZA: Down Scale Mode Averaging Size Register" bitfld.long 0x3C 3.--5. " V ,Down Scale Mode Averaging Size in vertical direction" "1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256" bitfld.long 0x3C 0.--2. " H ,Down Scale Mode Averaging Size in horizontal direction" "1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256" line.long 0x40 "RZA_RGB_EN,RZA: RGB Output Enable Register" bitfld.long 0x40 0. " EN ,RGB Output Enable" "YCbCr,RGB" line.long 0x44 "RZA_RGB_TYP,RZA: RGB Output Bit Mode Register" bitfld.long 0x44 2. " MSK1 ,Enable masking of the last 2 pixels" "Output,Masked" bitfld.long 0x44 1. " MSK0 ,Enable masking of the first 2 pixels" "Output,Masked" bitfld.long 0x44 0. " TYP ,16bit/32bit output selection" "32,16" line.long 0x48 "RZA_RGB_BLD,RZA: YC422 to YC444 conversion method Register" hexmask.long.byte 0x48 0.--7. 1. " VAL ,Alpha value used in 32-bit output mode" line.long 0x4c "RZA_SDR_Y_BAD_H,RZA: SDRAM Base Address MSB Register" hexmask.long.word 0x4c 0.--15. 1. " VAL ,SDRAM Base Address (Upper)" line.long 0x50 "RZA_SDR_Y_BAD_L,RZA: SDRAM Base Address LSB Register" hexmask.long.word 0x50 0.--15. 1. " VAL ,SDRAM Base Address (Lower)" line.long 0x54 "RZA_SDR_Y_SAD_H,RZA: SDRAM Start Address MSB Register" hexmask.long.word 0x54 0.--15. 1. " VAL ,SDRAM Start Address (Upper)" line.long 0x58 "RZA_SDR_Y_SAD_L,RZA: SDRAM Start Address LSB Register" hexmask.long.word 0x58 0.--15. 1. " VAL ,SSDRAM Start Address (Lower)" line.long 0x5c "RZA_SDR_Y_OFT,RZA: SDRAM Line Offset Register" hexmask.long.word 0x5c 0.--15. 1. " OFT ,Size of the memory space for each line (in bytes)" line.long 0x60 "RZA_SDR_Y_PTR_S,RZA: Start Line of SDRAM Pointer Register" hexmask.long.word 0x60 0.--12. 1. " VAL ,Vertical position of the first output line in the output memory space" line.long 0x64 "RZA_SDR_Y_PTR_E,RZA: End line of SDRAM Pointer Register" hexmask.long.word 0x64 0.--12. 1. " VAL ,Maximum number of lines to be stored in the memory space in Buffer Memory or DRAM" line.long 0x68 "RZA_SDR_C_BAD_H,RZA: SDRAM Base Address MSB (for 420 Chroma) Register" hexmask.long.word 0x68 0.--15. 1. " VAL ,SDRAM Base Address (Upper)" line.long 0x6c "RZA_SDR_C_BAD_L,RZA: SDRAM Base Address LSB (for 420 Chroma) Register" hexmask.long.word 0x6c 0.--15. 1. " VAL ,SDRAM Base Address (Lower)" line.long 0x70 "RZA_SDR_C_SAD_H,RZA: SDRAM Start Address MSB (for 420 Chroma) Register" hexmask.long.word 0x70 0.--15. 1. " VAL ,SDRAM Base Address (Upper)" line.long 0x74 "RZA_SDR_C_SAD_L,RZA: SDRAM Start Address LSB (for 420 Chroma) Register" hexmask.long.word 0x74 0.--15. 1. " VAL ,SDRAM Start Address (Lower)" line.long 0x78 "RZA_SDR_C_OFT,RZA: SDRAM Line Offset (for 420 Chroma) Register" hexmask.long.word 0x78 0.--15. 1. " OFT ,Size of the memory space for each line (in bytes)" line.long 0x7c "RZA_SDR_C_PTR_S,RZA: Start Line of SDRAM Pointer (for 420 Chroma) Register" hexmask.long.word 0x7c 0.--12. 1. " VAL ,Vertical position of the first output line in the output memory space" line.long 0x80 "RZA_SDR_C_PTR_E,RZA: End line of SDRAM Pointer (for 420 Chroma) Register" hexmask.long.word 0x80 0.--12. 1. " VAL ,Maximum number of lines to be stored in the memory space in Buffer Memory or DRAM" tree.end tree "Channel B" group.long 0xE8++0x07 line.long 0x00 "RZB_EN,Resizer Channel B Enable" bitfld.long 0x00 0. " EN ,Resizer Enable" "Disabled,Enabled" line.long 0x04 "RZB_MODE,RZB: One Shot Mode Register" bitfld.long 0x04 0. " OST ,One Shot Mode Enable" "Continuous,One shot" if (((data.long(asd:0x01c70400+0x0c))&0x02)==0x00) group.long (0xE8+0x08)++0x03 line.long 0x00 "RZB_420,RZB: Output Format Register" bitfld.long 0x00 1. " CEN ,Output Enable for Chrominance" "Disabled,Enabled" bitfld.long 0x00 0. " YEN ,Output Enable for Luminance" "Disabled,Enabled" else hgroup.long (0xE8+0x08)++0x03 hide.long 0x00 "RZB_420,RZB: Output Format Register" endif group.long (0xE8+0x0c)++0x83 line.long 0x00 "RZB_I_VPS,RZB: Vertical Start Position of the Input Register" hexmask.long.word 0x00 0.--12. 1. " VAL ,Vertical start position of image processing" line.long 0x04 "RZB_I_HPS,RZB: Horizontal Start Postion of the Input Register" hexmask.long.word 0x04 0.--12. 1. " VAL ,Horizontal start position of image processing" line.long 0x08 "RZB_O_VSZ,RZB: Vertical Size of the Output Register" hexmask.long.word 0x08 0.--12. 1. " VAL ,Vertical size of the output image" line.long 0x0c "RZB_O_HSZ,RZB: Horizontal Size of the Output Register" hexmask.long.word 0x0c 0.--12. 1. " VAL ,Horizontal size of output image" line.long 0x10 "RZB_V_PHS_Y,RZB: Vertical Resizing Process for Luminance Register" hexmask.long.word 0x10 0.--13. 1. " VAL ,Initial value for the phase value in vertical resizing process for Luminance" line.long 0x14 "RZB_V_PHS_C,RZB: Initial Phase of Vertical Resizing Process for Chrominance Register" hexmask.long.word 0x14 0.--13. 1. " VAL ,Initial value for the phase value in vertical resizing process for Chrominance" line.long 0x18 "RZB_V_DIF,RZB: Vertical Resize Parameter Register" hexmask.long.word 0x18 0.--13. 1. " VAL ,Vertical Resize Parameter" line.long 0x1c "RZB_V_TYP,RZB: Interpolation method for Vertical Rescaling Register" bitfld.long 0x1C 1. " C ,Selection of resizing method for Chrominance in vertical direction" "4-tap cubic convolution,2-tap linear interpolation" bitfld.long 0x1C 0. " Y ,Selection of resizing method for Luminance in vertical direction" "4-tap cubic convolution,2-tap linear interpolation" line.long 0x20 "RZB_V_LPF,RZB: Vertical LPF Intensity Register" bitfld.long 0x20 6.--11. " C ,Vertical LPF Intensity for Chrominance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x20 0.--5. " Y ,Vertical LPF Intensity for Luminance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x24 "RZB_H_PHS,RZB: Initial Phase of Horizontal Resizing Process Register" hexmask.long.word 0x24 0.--13. 1. " VAL ,Initial value for the phase value in horizontal resizing process" line.long 0x28 "RZB_H_PHS_ADJ,RZB: Additional Initial Phase of Vertical Resizing Process for Luminance Register" hexmask.long.word 0x28 0.--8. 1. " VAL ,Additional Initial Phase of Horizontal Resizing Process for Luminances" line.long 0x2c "RZB_H_DIF,RZB: Horizontal Resize Parameter Register" hexmask.long.word 0x2c 0.--13. 1. " VAL ,Horizontal Resize Parameter" line.long 0x30 "RZB_H_TYP,RZB: Interpolation method for horizontal rescaling Register" bitfld.long 0x30 1. " C ,Selection of resizing method for Chrominance in horizontal direction" "4-tap cubic convolution,2-tap linear interpolation" bitfld.long 0x30 0. " Y ,Selection of resizing method for Luminance in horizontal direction" "4-tap cubic convolution,2-tap linear interpolation" line.long 0x34 "RZB_H_LPF,RZB: Horizontal LPF Intensity Register" bitfld.long 0x34 6.--11. " C ,Horizontal LPF Intensity for Chrominance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.long 0x34 0.--5. " Y ,Horizontal LPF Intensity for Luminance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." line.long 0x38 "RZB_DWN_EN,RZB: Down Scale Mode Enable Register" bitfld.long 0x38 0. " EN ,Down Scale Mode Enable" "Disabled,Enabled" line.long 0x3c "RZB_DWN_AV,RZB: Down Scale Mode Averaging Size Register" bitfld.long 0x3C 3.--5. " V ,Down Scale Mode Averaging Size in vertical direction" "1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256" bitfld.long 0x3C 0.--2. " H ,Down Scale Mode Averaging Size in horizontal direction" "1/2,1/4,1/8,1/16,1/32,1/64,1/128,1/256" line.long 0x40 "RZB_RGB_EN,RZB: RGB Output Enable Register" bitfld.long 0x40 0. " EN ,RGB Output Enable" "YCbCr,RGB" line.long 0x44 "RZB_RGB_TYP,RZB: RGB Output Bit Mode Register" bitfld.long 0x44 2. " MSK1 ,Enable masking of the last 2 pixels" "Output,Masked" bitfld.long 0x44 1. " MSK0 ,Enable masking of the first 2 pixels" "Output,Masked" bitfld.long 0x44 0. " TYP ,16bit/32bit output selection" "32,16" line.long 0x48 "RZB_RGB_BLD,RZB: YC422 to YC444 conversion method Register" hexmask.long.byte 0x48 0.--7. 1. " VAL ,Alpha value used in 32-bit output mode" line.long 0x4c "RZB_SDR_Y_BAD_H,RZB: SDRAM Base Address MSB Register" hexmask.long.word 0x4c 0.--15. 1. " VAL ,SDRAM Base Address (Upper)" line.long 0x50 "RZB_SDR_Y_BAD_L,RZB: SDRAM Base Address LSB Register" hexmask.long.word 0x50 0.--15. 1. " VAL ,SDRAM Base Address (Lower)" line.long 0x54 "RZB_SDR_Y_SAD_H,RZB: SDRAM Start Address MSB Register" hexmask.long.word 0x54 0.--15. 1. " VAL ,SDRAM Start Address (Upper)" line.long 0x58 "RZB_SDR_Y_SAD_L,RZB: SDRAM Start Address LSB Register" hexmask.long.word 0x58 0.--15. 1. " VAL ,SSDRAM Start Address (Lower)" line.long 0x5c "RZB_SDR_Y_OFT,RZB: SDRAM Line Offset Register" hexmask.long.word 0x5c 0.--15. 1. " OFT ,Size of the memory space for each line (in bytes)" line.long 0x60 "RZB_SDR_Y_PTR_S,RZB: Start Line of SDRAM Pointer Register" hexmask.long.word 0x60 0.--12. 1. " VAL ,Vertical position of the first output line in the output memory space" line.long 0x64 "RZB_SDR_Y_PTR_E,RZB: End line of SDRAM Pointer Register" hexmask.long.word 0x64 0.--12. 1. " VAL ,Maximum number of lines to be stored in the memory space in Buffer Memory or DRAM" line.long 0x68 "RZB_SDR_C_BAD_H,RZB: SDRAM Base Address MSB (for 420 Chroma) Register" hexmask.long.word 0x68 0.--15. 1. " VAL ,SDRAM Base Address (Upper)" line.long 0x6c "RZB_SDR_C_BAD_L,RZB: SDRAM Base Address LSB (for 420 Chroma) Register" hexmask.long.word 0x6c 0.--15. 1. " VAL ,SDRAM Base Address (Lower)" line.long 0x70 "RZB_SDR_C_SAD_H,RZB: SDRAM Start Address MSB (for 420 Chroma) Register" hexmask.long.word 0x70 0.--15. 1. " VAL ,SDRAM Base Address (Upper)" line.long 0x74 "RZB_SDR_C_SAD_L,RZB: SDRAM Start Address LSB (for 420 Chroma) Register" hexmask.long.word 0x74 0.--15. 1. " VAL ,SDRAM Start Address (Lower)" line.long 0x78 "RZB_SDR_C_OFT,RZB: SDRAM Line Offset (for 420 Chroma) Register" hexmask.long.word 0x78 0.--15. 1. " OFT ,Size of the memory space for each line (in bytes)" line.long 0x7c "RZB_SDR_C_PTR_S,RZB: Start Line of SDRAM Pointer (for 420 Chroma) Register" hexmask.long.word 0x7c 0.--12. 1. " VAL ,Vertical position of the first output line in the output memory space" line.long 0x80 "RZB_SDR_C_PTR_E,RZB: End line of SDRAM Pointer (for 420 Chroma) Register" hexmask.long.word 0x80 0.--12. 1. " VAL ,Maximum number of lines to be stored in the memory space in Buffer Memory or DRAM" tree.end width 0xb tree.end tree "H3A (Hardware 3A)" base asd:0x01C71400 width 12. rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Revision and Class Information Register" bitfld.long 0x00 30.--31. " SCHEME ,Scheme used is PDR3.5" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function h3A" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL Revision" hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major Version" textline " " hexmask.long.byte 0x00 0.--7. 1. " MINOR ,Peripheral Revision Number Initial Revision" group.long 0x04++0x0f line.long 0x00 "PCR,Peripheral Control Register" hexmask.long.word 0x00 22.--31. 1. " AVE2LMT ,AE/AWB Saturation Limit" bitfld.long 0x00 20. " AF_VF_EN ,AF Vertical Focus Enable" "4 Color Horizontal,1 Color Horizontal & Vertical" textline " " bitfld.long 0x00 19. " AEW_MED_EN ,AE/AWB Median filter Enable" "Disabled,Enabled" bitfld.long 0x00 18. " BUSYAEAWB ,Busy bit for AE/AWB" "Not busy,Busy" textline " " bitfld.long 0x00 17. " AEW_ALAW_EN ,AE/AWB A-law Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AEW_EN ,AE/AWB Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " BUSYAF ,Busy bit for AF" "Not busy,Busy" bitfld.long 0x00 14. " FVMODE ,Focus Value Accumulation Mode" "Sum,Peak" textline " " bitfld.long 0x00 11.--13. " RGBPOS ,Red, Green, and blue pixel location in the AF windows" "GR/GB - Bayer,RG/GB - Bayer,GR/BG - Bayer,RG/BG - Bayer,GG/RB - custom,RB/GG - custom,?..." hexmask.long.byte 0x00 3.--10. 1. " MED_TH ,Median filter threshold" textline " " bitfld.long 0x00 2. " AF_MED_EN ,Auto Focus Median filter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " AF_ALAW_EN ,Auto Focus A-law table Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AF_EN ,Auto Focus Enable" "Disabled,Enabled" line.long 0x04 "AFPAX1,Setup for the AF Engine Paxel Configuration Register" hexmask.long.byte 0x04 16.--23. 1. " PAXW ,AF Engine Paxel Width" hexmask.long.byte 0x04 0.--7. 1. " PAXH ,AF Engine Paxel Height" line.long 0x08 "AFPAX2,Setup for the AF Engine Paxel Configuration Register" bitfld.long 0x08 17.--20. " AFINCH ,AF Engine Column Increments" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 13.--16. " AFINCV ,AF Engine Line Increments" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" textline " " hexmask.long.byte 0x08 6.--12. 1. " PAXVC ,AF Engine Vertical Paxel Count" bitfld.long 0x08 0.--5. " PAXHC ,AF Engine Horizontal Paxel Count" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,?..." line.long 0x0c "AFPAXSTART,Start Position for AF Engine Paxels Register" hexmask.long.word 0x0c 16.--27. 1. " PAXSH ,AF Engine Paxel Horizontal start position" hexmask.long.word 0x0c 0.--11. 1. " PAXSV ,AF Engine Paxel Vertical start position" group.long 0x18++0x03 line.long 0x00 "AFBUFST,SDRAM/DDRAM Start address for AF Engine Register" group.long 0x4c++0x2f line.long 0x00 "AEWWIN1,Configuration for AE/AWB Windows Register" hexmask.long.byte 0x00 24.--31. 1. " WINH ,AE/AWB Engine Window Height" hexmask.long.byte 0x00 13.--20. 1. " WINW ,AE/AWB Engine Window Width" hexmask.long.byte 0x00 6.--12. 1. " WINVC ,AE/AWB Engine Vertical Window Count" bitfld.long 0x00 0.--5. " WINHC ,AE/AWB Engine Horizontal Window Count" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,?..." line.long 0x04 "AEWINSTART,Start Position for AE/AWB Windows Register" hexmask.long.word 0x04 16.--27. 1. " WINSV ,AE/AWB Engine Vertical Window Start Position" hexmask.long.word 0x04 0.--11. 1. " WINSH ,AE/AWB Engine Horizontal Window Start Position" line.long 0x08 "AEWINBLK,Black Line of AE/AWB Windows Register" hexmask.long.word 0x08 16.--27. 1. " WINSV ,AE/AWB Engine Vertical Window Start Position for single black line of windows" hexmask.long.byte 0x08 0.--6. 1. " WINH ,AE/AWB Engine Window Height for the single black line of windows" line.long 0x0c "AEWSUBWIN,Configuration for Subsample Data in AE/AWB Window Register" bitfld.long 0x0c 8.--11. " AEWINCV ,AE/AWB Engine Vertical Sampling Point Increment" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" bitfld.long 0x0c 0.--3. " AEWINCH ,AE/AWB Engine Horizontal Sampling Point Increment" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" line.long 0x10 "AEWBUFST,SDRAM/DDRAM Start address for AE/AWB Engine Output Data Register" line.long 0x14 "RSDR_ADDR,AEW_CFG - AE/AWB Engine Configuration Register" bitfld.long 0x14 8.--9. " AEFMT ,AE/AWB OUTPUT Format" "Sum of squares data along with accumulated data,Min/max values of each color of each window,Accumulator values,?..." textline " " bitfld.long 0x14 0.--3. " SUMSFT ,AE/AWB Engine Shift Value for the sum of pixel values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "LINE_START,Line Start Position Register" hexmask.long.word 0x18 16.--31. 1. " SLV ,Start Line Vertical" hexmask.long.word 0x18 0.--15. 1. " LINE_START ,Line Start" line.long 0x1c "VFV_CFG1,Vertical Focus Configuration 1 Register" hexmask.long.byte 0x1C 24.--31. 1. " VCOEF1_3 ,Vertical FV FIR 1 coefficient 3" hexmask.long.byte 0x1C 16.--23. 1. " VCOEF1_2 ,Vertical FV FIR 1 coefficient 2" hexmask.long.byte 0x1C 8.--15. 1. " VCOEF1_1 ,Vertical FV FIR 1 coefficient 1" hexmask.long.byte 0x1C 0.--7. 1. " VCOEF1_0 ,Vertical FV FIR 1 coefficient 0" line.long 0x20 "VFV_CFG2,Vertical Focus Configuration 2 Register" hexmask.long.word 0x20 16.--31. 1. " VTHR1 ,Threshold for Vertical FV FIR 1" hexmask.long.byte 0x20 0.--7. 1. " VCOEF1_4 ,Vertical FV FIR 1 coefficient 4" line.long 0x24 "VFV_CFG3,Vertical Focus Configuration 3 Register" hexmask.long.byte 0x24 24.--31. 1. " VCOEF2_3 ,Vertical FV FIR 2 coefficient 3" hexmask.long.byte 0x24 16.--23. 1. " VCOEF2_2 ,Vertical FV FIR 2 coefficient 2" hexmask.long.byte 0x24 8.--15. 1. " VCOEF2_1 ,Vertical FV FIR 2 coefficient 1" hexmask.long.byte 0x24 0.--7. 1. " VCOEF2_0 ,Vertical FV FIR 2 coefficient 0" line.long 0x28 "VFV_CFG4,Vertical Focus Configuration 4 Register" hexmask.long.word 0x28 16.--31. 1. " VTHR2 ,Threshold for Vertical FV FIR 2" hexmask.long.byte 0x28 0.--7. 1. " VCOEF2_4 ,Vertical FV FIR 2 coefficient 4" line.long 0x2c "HFV_THR,Horizontal Threshold Register" hexmask.long.word 0x2C 16.--31. 1. " HTHR2 ,Threshold for Horizontal FV IIR 2" hexmask.long.word 0x2C 0.--15. 1. " HTHR1 ,Threshold for Horizontal FV IIR 1" width 0xb tree.end tree "ISP (ISP System Configuration)" base asd:0x01c70000 width 9. rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Revision and Class Information Register" group.long 0x04++0x1b line.long 0x00 "PCCR,Peripheral Clock Control Register" bitfld.long 0x00 5. " IPIPEIF_CLK_ENABLE ,IPIPEIF clock enable 0" "Disabled,Enabled" bitfld.long 0x00 4. " IPIPE_CLK_ENABLE ,IPIPE clock enable 0" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RSZ_CLK_ENABLE ,RSZ clock enable 0" "Disabled,Enabled" bitfld.long 0x00 2. " H3A_CLK_ENABLE ,H3A clock enable 0" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ISIF_CLK_ENABLE ,ISIF clock enable 0" "Disabled,Enabled" bitfld.long 0x00 0. " BL_CLK_ENABLE ,BL clock enable 0" "Disabled,Enabled" line.long 0x04 "BCR,Buffer logic Control Register" bitfld.long 0x04 5.--7. " CPRIORITY_W ,Priority of VPSS" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x04 2.--4. " CPRIORITY_R ,Priority of VPSS" "0(highest),1,2,3,4,5,6,7(lowest)" textline " " bitfld.long 0x04 1. " SRC_SEL_ISIF_IPIPE ,BL_WBL select" "IPIPE BOXCAR OUT,ISIPF OUT" bitfld.long 0x04 0. " SRC_SEL_IPIPE_LDC ,BL_WBL select" "LDC OUT,IPIPE BOXCAR OUT" line.long 0x08 "INTSTAT,Interrupt Status Register" eventfld.long 0x08 29. " IPIPE_INT_DPC_RNEW1 ,IPIPE_INT_DPC_RNEW1 triggered" "Not triggered,Triggered" eventfld.long 0x08 28. " IPIPE_INT_DPC_RNEW0 ,IPIPE_INT_DPC_RNEW0 triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 27. " IPIPE_INT_DPC_INI ,IPIPE_INT_DPC_INI triggered" "Not triggered,Triggered" eventfld.long 0x08 26. " LDC_INT_EOF ,LDC_INT_EOF triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 25. " IPIPE_INT_EOF ,IPIPE_INT_EOF triggered" "Not triggered,Triggered" eventfld.long 0x08 24. " H3A_INT_EOF ,H3A_INT_EOF triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 23. " RSZ_INT_EOF1 ,RSZ_INT_EOF1 triggered," "Not triggered,Triggered" eventfld.long 0x08 22. " RSZ_INT_EOF0 ,RSZ_INT_EOF0 triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 21. " VENC_INT ,VENC_INT triggered" "Not triggered,Triggered" eventfld.long 0x08 20. " OSD_INT ,OSD_INT triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 17. " RSZ_INT_CYC_RZB ,RSZ_INT_CYC_RZB triggered" "Not triggered,Triggered" eventfld.long 0x08 16. " RSZ_INT_CYC_RZA ,RSZ_INT_CYC_RZA triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 14. " RSZ_INT_LAST_PIX ,RSZ_INT_LAST_PIX triggered" "Not triggered,Triggered" eventfld.long 0x08 13. " RSZ_INT_REG ,RSZ_INT_REG triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 11. " AF_INT ,AF_INT triggered" "Not triggered,Triggered" eventfld.long 0x08 10. " AEW_INT ,AEW_INT triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 9. " IPIPEIF_INT ,IPIPEIF_INT triggered" "Not triggered,Triggered" eventfld.long 0x08 8. " IPIPE_INT_HST ,IPIPE_INT_HST triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 7. " IPIPE_INT_BSC ,IPIPE_INT_BSC triggered" "Not triggered,Triggered" eventfld.long 0x08 5. " IPIPE_INT_LAST_PIX ,IPIPE_INT_LAST_PIX triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 4. " IPIPE_INT_REG ,IPIPE_INT_REG triggered" "Not triggered,Triggered" eventfld.long 0x08 3. " ISIF_INT3 ,ISIF_INT3 triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 2. " ISIF_INT2 ,ISIF_INT2 triggered" "Not triggered,Triggered" eventfld.long 0x08 1. " ISIF_INT1 ,ISIF_INT1 triggered" "Not triggered,Triggered" textline " " eventfld.long 0x08 0. " ISIF_INT0 ,ISIF_INT0 triggered" "Not triggered,Triggered" line.long 0x0c "INTSEL1,Interrupt Selection Register" bitfld.long 0x0C 24.--28. " INTSEL3 ,Selects the interrupt for vpss_int[3]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." bitfld.long 0x0C 16.--20. " INTSEL2 ,Selects the interrupt for vpss_int[2]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." textline " " bitfld.long 0x0C 8.--12. " INTSEL1 ,Selects the interrupt for vpss_int[1]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." bitfld.long 0x0C 0.--4. " INTSEL0 ,Selects the interrupt for vpss_int[0]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." line.long 0x10 "INTSEL2,Interrupt Selection Register" bitfld.long 0x10 24.--28. " INTSEL7 ,Selects the interrupt for vpss_int[7]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." bitfld.long 0x10 16.--20. " INTSEL6 ,Selects the interrupt for vpss_int[6]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." textline " " bitfld.long 0x10 8.--12. " INTSEL5 ,Selects the interrupt for vpss_int[5]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." bitfld.long 0x10 0.--4. " INTSEL4 ,Selects the interrupt for vpss_int[4]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." line.long 0x14 "INTSEL3,Interrupt Selection Register" bitfld.long 0x14 0.--4. " INTSEL8 ,Selects the interrupt for vpss_int[8]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." line.long 0x18 "EVTSEL,Event Selection Register" bitfld.long 0x18 24.--28. " EVTSEL3 ,Selects the event for vpss_evt[3]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." bitfld.long 0x18 16.--20. " EVTSEL2 ,Selects the event for vpss_evt[2]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." textline " " bitfld.long 0x18 8.--12. " EVTSEL1 ,Selects the event for vpss_evt[1]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." bitfld.long 0x18 0.--4. " EVTSEL0 ,Selects the event for vpss_evt[0]" "ISIF_INT0,ISIF_INT1,ISIF_INT2,ISIF_INT3,IPIPE_INT_REG,IPIPE_INT_LAST_PIX,Reserved,IPIPE_INT_BSC,IPIPE_INT_HST,IPIPEIF_INT,AEW_INT,AF_INT,Reserved,RSZ_INT_REG,RSZ_INT_LAST_PIX,Reserved,RSZ_INT_CYC_RZA,RSZ_INT_CYC_RZB,Reserved,Reserved,OSD_INT,VENC_INT,RSZ_INT_EOF0,RSZ_INT_EOF1,H3A_INT_EOF,IPIPE_INT_EOF,LDC_INT_EOF,IPIPE_INT_DPC_INI,IPIPE_INT_DPC_RNEW0,IPIPE_INT_DPC_RNEW1,?..." group.long 0x2c++0x03 line.long 0x00 "MPSR,Memory Priority Select Register" bitfld.long 0x00 24. " RGBCOPY ,RGB memory table copy enable" "Disabled,Enabled" bitfld.long 0x00 20. " BSC_TB1 ,BSC_TB1 memory access priority" "Low,High" bitfld.long 0x00 19. " BSC_TB0 ,BSC_TB0 memory access priority" "Low,High" bitfld.long 0x00 18. " HST_TB3 ,HST_TB3 memory access priority" "Low,High" textline " " bitfld.long 0x00 17. " HST_TB2 ,HST_TB2 memory access priority" "Low,High" bitfld.long 0x00 16. " HST_TB1 ,HST_TB1 memory access priority" "Low,High" bitfld.long 0x00 15. " HST_TB0 ,HST_TB0 memory access priority" "Low,High" bitfld.long 0x00 14. " D3L_TB3 ,D3L_TB3 memory access priority" "Low,High" textline " " bitfld.long 0x00 13. " D3L_TB2 ,D3L_TB2 memory access priority" "Low,High" bitfld.long 0x00 12. " D3L_TB1 ,D3L_TB1 memory access priority" "Low,High" bitfld.long 0x00 11. " D3L_TB0 ,D3L_TB0 memory access priority" "Low,High" bitfld.long 0x00 10. " GBC_TB ,GBC_TB memory access priority" "Low,High" textline " " bitfld.long 0x00 9. " YEE_TB ,YEE_TB memory access priority" "Low,High" bitfld.long 0x00 8. " GMM_TBR ,GMM_TBR memory access priority" "Low,High" bitfld.long 0x00 7. " GMM_TBG ,GMM_TBG memory access priority" "Low,High" bitfld.long 0x00 6. " GMM_TBB ,GMM_TBB memory access priority" "Low,High" textline " " bitfld.long 0x00 5. " DPC_TB ,DPC_TB memory access priority" "Low,High" bitfld.long 0x00 4. " DCLAMP ,DCLAMP memory access priority" "Low,High" bitfld.long 0x00 3. " LS_TB1 ,LS_TB1 memory access select" "Low,High" bitfld.long 0x00 2. " LS_TB0 ,LS_TB0 memory access select" "Low,High" textline " " bitfld.long 0x00 1. " LIN_TB ,LIN_TB memory access priority" "Low,High" width 0xb tree.end tree.end tree.open "VPBE (Video Processing Back End)" tree "OSD (VPBE On-Screen Display)" base asd:0x01c71c00 width 14. group.long 0x00++0xb line.long 0x00 "MODE,OSD Mode Register" bitfld.long 0x00 15. " CS ,Cb/Cr or Cr/Cb format" "Cb/Cr,Cr/Cb" bitfld.long 0x00 14. " OVRSZ ,OSD Window Vertical Expansion Enable" "x 1,x 6/5" bitfld.long 0x00 13. " OHRSZ ,OSD Window Horizontal Expansion Enable" "x 1,x 9/8" textline " " bitfld.long 0x00 12. " EF ,Expansion Filter Enable" "Off,On" bitfld.long 0x00 11. " VVRSZ ,Video Window Vertical Expansion Enable" "x 1,x 6/5" bitfld.long 0x00 10. " VHRSZ ,Video Window Horizontal Expansion Enable" "x 1,x 9/8" textline " " bitfld.long 0x00 9. " FSINV ,Field signal inversion" "Uninverted,Inverted" bitfld.long 0x00 8. " BCLUT ,Background CLUT selection" "ROM,RAM" hexmask.long.byte 0x00 0.--7. 1. " CABG ,Background Color CLUT" line.long 0x04 "VIDWINMD,Video Window Mode Setup Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x04 15. " VFINV ,Video Window 0/1 Expansion Filter Coefficient Inverse" "Normal,Inversed" else bitfld.long 0x04 15. " VFINV ,Video Window 0/1 Expansion Filter Coefficient Inverse" "Inversed,Normal" endif bitfld.long 0x04 14. " V1EFC ,Video Window 1 Expansion Filter Coefficient" "Same,Different" bitfld.long 0x04 12.--13. " VHZ1 ,Video Window 1 horizontal direction zoom" "x1,x2,x4,?..." textline " " sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x04 10.--11. " VVZ1 ,Video Window 1 vertical direction zoom" "x1,x2,x4,?..." bitfld.long 0x04 9. " VFF1 ,Video Window 1 display mode" "Field,Frame" bitfld.long 0x04 8. " ACT1 ,Sets image display on/off Video Window 1" "Off,On" else bitfld.long 0x04 10.--11. " VVZ1 ,Video Window 1 vertical direction zoom" "x1,x2,x4,?..." bitfld.long 0x04 9. " VFF1 ,Video Window 1 display mode" "Off,On" bitfld.long 0x04 8. " ACT1 ,Sets image display on/off Video Window 1" "Off,On" endif textline " " bitfld.long 0x04 6. " V0EFC ,Video Window 0 Expansion Filter Coefficient" "Same,Different" bitfld.long 0x04 4.--5. " VHZ0 ,Video Window 0 horizontal direction zoom" "x1,x2,x4,?..." bitfld.long 0x04 2.--3. " VVZ0 ,Video Window 0 vertical direction zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x04 1. " VFF0 ,Video Window 0 display mode" "Field,Frame" bitfld.long 0x04 0. " ACT0 ,Sets image display on/off Video Window 0" "Off,On" line.long 0x08 "OSDWIN0MD,OSD Window 0 Mode Setup Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x08 15. " BMPMDE ,Bitmap window mode enable" "Window 0 & 1,Window 0" textline " " endif bitfld.long 0x08 13.--14. " BMP0MD ,Bitmap input mode" "BITMAP,RGB16,RGB24,YC" bitfld.long 0x08 12. " CLUTS0 ,CLUT select for OSD Window 0" "ROM-look-up,RAM-look-up" bitfld.long 0x08 10.--11. " OHZ0 ,OSD Window0 Horizontal Zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x08 8.--9. " OVZ0 ,OSD Window0 Vertical Zoom" "x1,x2,x4,?..." bitfld.long 0x08 6.--7. " BMW0 ,Bitmap bit width for OSD window 0" "1-bit,2-bits,4-bits,8-bits" bitfld.long 0x08 3.--5. " BLND0 ,Blending ratio between OSD window 0 and Video Window 0" "W0-0 V0-1,W0-1/8 V0-7/8,W0-2/8 V0-6/8,W0-3/8 V0-5/8,W0-4/8 V0-4/8,W0-5/8 V0-3/8,W0-6/8 V0-2/8,W0-1 V0-0" textline " " bitfld.long 0x08 2. " TE0 ,Transparency Enable for OSD Window 0" "Disabled,Enabled" bitfld.long 0x08 1. " OFF0 ,OSD Window 0 Display Mode" "Field,Frame" bitfld.long 0x08 0. " OACT0 ,OSD Window 0 Active (displayed)" "Off,On" if (((d.l(asd:0x01c71c00+0xc))&0x8000)==0x0) group.long 0x0c++0x3 line.long 0x00 "OSDWIN1MD,OSD Window 1 Mode Setup Register" bitfld.long 0x00 15. " OASW ,OSD Window 1 Attribute Mode Enable" "OSD Window1,Attribute" bitfld.long 0x00 13.--14. " BMP1MD ,Bitmap input mode" "BITMAP,RGB16,RGB24,YC" bitfld.long 0x00 12. " CLUTS1 ,CLUT select for OSD Window 1" "ROM-look-up,RAM-look-up" textline " " bitfld.long 0x00 10.--11. " OHZ1 ,OSD Window1 Horizontal Zoom" "x1,x2,x4,?..." bitfld.long 0x00 8.--9. " OVZ1 ,OSD Window 1 Vertical Zoom" "x1,x2,x4,?..." bitfld.long 0x00 6.--7. " BMW1 ,Bitmap bit width for OSD window 1" "1-bit,2-bits,4-bits,8-bits" textline " " bitfld.long 0x00 3.--5. " BLND1 ,Blending Ratio for OSD Window 1" "W0-0 V0-1,W0-1/8 V0-7/8,W0-2/8 V0-6/8,W0-3/8 V0-5/8,W0-4/8 V0-4/8,W0-5/8 V0-3/8,W0-6/8 V0-2/8,W0-1 V0-0" bitfld.long 0x00 2. " TE1 ,Transparency Enable for OSD Window 1" "Disabled,Enabled" bitfld.long 0x00 1. " OFF1 ,OSD Window 1 Display Mode" "Field,Frame" textline " " bitfld.long 0x00 0. " OACT1 ,OSD Window 1 Active (displayed)" "Off,On" else group.long 0x0c++0x3 line.long 0x00 "OSDATRMD,OSD Attribute Window Mode Setup Register" bitfld.long 0x00 15. " OASW ,OSD Window 1 Attribute Mode Enable" "OSD Window0,Attribute" bitfld.long 0x00 10.--11. " OHZA ,OSD Attribute Window Horizontal Zoom" "x1,x2,x4,?..." bitfld.long 0x00 8.--9. " OVZA ,OSD attribute window vertical zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x00 6.--7. " BLNKINT ,Blinking Interval" "1-unit,2-units,3-units,4-units" bitfld.long 0x00 1. " OFFA ,OSD Attribute Window Display Mode" "Field,Frame" bitfld.long 0x00 0. " BLNK ,OSD Attribute Window Blink Enable" "Disabled,Enabled" textline " " textline " " endif group.long 0x10++0x3 line.long 0x00 "RECTCUR,Rectangular Cursor Setup Register" hexmask.long.byte 0x00 8.--15. 1. " RCAD ,Rectangular cursor color palette address" bitfld.long 0x00 7. " CLUTSR ,CLUT Select" "ROM-look-up,RAM-look-up" bitfld.long 0x00 4.--6. " RCHW ,Rectangular Cursor Horizontal Line Width" "1 pixel,4 pixels,8 pixels,12 pixels,16 pixels,20 pixels,24 pixels,28 pixels" textline " " bitfld.long 0x00 1.--3. " RCVW ,Rectangular Cursor Vertical Line Width" "1 line,2 lines,4 lines,6 lines,8 lines,10 lines,12 lines,14 lines" bitfld.long 0x00 0. " RCACT ,Rectangular Cursor Active (displayed)" "Off,On" width 14. group.long 0x18++0x7f line.long 0x00 "VIDWIN0OFST,Video Window 0 Offset Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.byte 0x00 9.--12. 0x20 " V0AH ,Video window 0 SDRAM source address" endif hexmask.long.word 0x00 0.--8. 1. " V0LO ,Video Window 0 Line Offset" line.long 0x04 "VIDWIN1OFST,Video Window 1 Offset Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.byte 0x04 9.--12. 0x20 " V1AH ,Video window 1 SDRAM source address" endif hexmask.long.word 0x04 0.--8. 1. " V1LO ,Video Window 1 Line Offset" line.long 0x08 "OSDWIN0OFST,OSD Window 0 Offset Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.byte 0x08 9.--12. 0x20 " B0AH ,Bitmap window 0 SDRAM source address" endif hexmask.long.word 0x08 0.--8. 1. " O0LO ,OSD Window 0 Line Offset" sif (cpu()=="DM365"||cpu()=="DM368") line.long 0x0c "OSDWIN1OFST,Bitmap Window 1/Attribute Window Offset Register" hexmask.long.byte 0x0c 9.--12. 0x20 " B1AH ,Bitmap window 1 SDRAM source address" else line.long 0x0c "OSDWIN1OFST,OSD Window 1 Offset Register" endif hexmask.long.word 0x0c 0.--8. 1. " O1LO ,OSD Window 1 Line Offset" line.long 0x10 "VIDWINADH,Video Window 0/1 Address Register-High" hexmask.long.byte 0x10 8.--14. 1. " V1AH ,Video Window 1 SDRAM Source Address-High" hexmask.long.byte 0x10 0.--6. 1. " V0AH ,Video Window 0 SDRAM Source Address-High" line.long 0x14 "VIDWIN0ADL,Video Window 0 Address Register-Low" hexmask.long.word 0x14 0.--15. 1. " VIDWIN0ADL ,Video Window 0 SDRAM Source Address-Low" line.long 0x18 "VIDWIN1ADL,Video Window1 Address Register-Low" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x18 0.--15. 1. " VIDWIN1ADL ,Video window 1 SDRAM source address-Low" else hexmask.long.byte 0x18 8.--14. 1. " V1AH ,Video Window 1 SDRAM Source Address-High" hexmask.long.byte 0x18 0.--6. 1. " V0AH ,Video Window 0 SDRAM Source Address-High" endif line.long 0x1c "OSDWINADH,Bitmap Window 0/1 Address Register-High" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.byte 0x1c 8.--14. 1. " V1AH ,BMP window 1/attribute window SDRAM source address-High" hexmask.long.byte 0x1c 0.--6. 1. " V0AH ,BMP window 0 SDRAM source address-High" else hexmask.long.byte 0x1c 8.--14. 1. " V1AH ,Video Window 1 SDRAM Source Address-High" hexmask.long.byte 0x1c 0.--6. 1. " V0AH ,Video Window 0 SDRAM Source Address-High" endif line.long 0x20 "OSDWIN0ADL,Bitmap Window 0 Address Register-Low" hexmask.long.word 0x20 0.--15. 1. " BMPWIN0ADL ,Bitmap Window 0 SDRAM Source Address-Low" line.long 0x24 "OSDWIN1ADL,Bitmap Window 1 / Attribute Window 1 Address Register-Low" hexmask.long.word 0x24 0.--15. 1. " BMPWIN1ADL ,Bitmap Window 1 / Attribute SDRAM Source Address-Low" line.long 0x28 "BASEPX,Base Pixel X Register" hexmask.long.word 0x28 0.--9. 1. " BPX ,Base Pixel in X horizontal base display reference position for all windows" line.long 0x2c "BASEPY,Base Pixel Y Register" hexmask.long.word 0x2c 0.--8. 1. " BPY ,Base Pixel in Y vertical base display reference position for all windows" line.long 0x30 "VIDWIN0XP,Video Window 0 X-Position Register" hexmask.long.word 0x30 0.--10. 1. " V0X ,Video Window 0 X-Position Horizontal display start position" line.long 0x34 "VIDWIN0YP,Video Window 0 Y-Position Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x34 0.--9. 1. " V0Y ,Video Window 0 Y-Position Vertical display start position" else hexmask.long.word 0x34 0.--8. 1. " V0Y ,Video Window 0 Y-Position Vertical display start position" endif line.long 0x38 "VIDWIN0XL,Video Window 0 X-Size Register" hexmask.long.word 0x38 0.--10. 1. " V0W ,Video Window 0 X-Width Horizontal display width in pixels" line.long 0x3c "VIDWIN0YL,Video Window 0 Y-Size Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x3c 0.--10. 1. " V0H ,Video Window 0 Y-Height Vertical display height in lines" else hexmask.long.word 0x3c 0.--9. 1. " V0H ,Video Window 0 Y-Height Vertical display height in pixels" endif line.long 0x40 "VIDWIN1XP,Video Window 1 X-Position Register" hexmask.long.word 0x40 0.--10. 1. " V1X ,Video Window 1 X-Position Horizontal display start position" line.long 0x44 "VIDWIN1YP,Video Window 1 Y-Position Register" hexmask.long.word 0x44 0.--9. 1. " V1Y ,Video Window 1 Y-Position Vertical display start position" line.long 0x48 "VIDWIN1XL,Video Window 1 X-Size Register" hexmask.long.word 0x48 0.--10. 1. " V1W ,Video Window 1 X-Width Horizontal display width in pixels" line.long 0x4c "VIDWIN1YL,Video Window 1 Y-Size Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x4c 0.--10. 1. " V1H ,Video Window 1 Y-Height Vertical display height in lines" else hexmask.long.word 0x4c 0.--9. 1. " V1H ,Video Window 1 Y-Height Vertical display height in pixels" endif line.long 0x50 "OSDWIN0XP,OSD Window 0 X-Position Register" hexmask.long.word 0x50 0.--10. 1. " W0X ,OSD Window 0 X-Position Horizontal display start position" line.long 0x54 "OSDWIN0YP,OSD Window 0 Y-Position Register" hexmask.long.word 0x54 0.--9. 1. " W0Y ,OSD Window 0 Y-Position Vertical display start position" line.long 0x58 "OSDWIN0XL,OSD Window 0 X-Size Register" hexmask.long.word 0x58 0.--10. 1. " W0W ,OSD Window 0 X-Width Horizontal display width in pixels" line.long 0x5c "OSDWIN0YL,OSD Window 0 Y-Size Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x5c 0.--10. 1. " W0H ,OSD Window 0 Y-Height Vertical display height in lines" else hexmask.long.word 0x5c 0.--9. 1. " W0H ,OSD Window 0 Y-Height Vertical display height in pixels" endif line.long 0x60 "OSDWIN1XP,OSD Window 1 X-Position Register" hexmask.long.word 0x60 0.--10. 1. " W1X ,OSD Window 1 X-Position Horizontal display start position" line.long 0x64 "OSDWIN1YP,OSD Window 1 Y-Position Register" hexmask.long.word 0x64 0.--9. 1. " W1Y ,OSD Window 1 Y-Position Vertical display start position" line.long 0x68 "OSDWIN1XL,OSD Window 1 X-Size Register" hexmask.long.word 0x68 0.--10. 1. " W1W ,OSD Window 1 X-Width Horizontal display width in pixels" line.long 0x6c "OSDWIN1YL,OSD Window 1 Y-Size Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x6c 0.--10. 1. " W1H ,OSD Window 1 Y-Height Vertical display height in lines" else hexmask.long.word 0x6c 0.--9. 1. " W1H ,OSD Window 1 Y-Height Vertical display height in pixels" endif line.long 0x70 "CURXP,Rectangular Cursor Window X-Position Register" hexmask.long.word 0x70 0.--10. 1. " RCSX ,Rectangular Cursor Window X-Position Horizontal display start position" line.long 0x74 "CURYP,Rectangular Cursor Window Y-Position Register" hexmask.long.word 0x74 0.--9. 1. " RCSY ,Rectangular Cursor Window Y-Position Vertical display start position" line.long 0x78 "CURXL,Rectangular Cursor Window X-Size Register" hexmask.long.word 0x78 0.--10. 1. " RCSW ,Rectangular Cursor Window X-Width Horizontal display width in pixels" line.long 0x7c "CURYL,Rectangular Cursor Window Y-Size Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x7c 0.--10. 1. " RCSH ,Rectangular Cursor Window Y-Height Vertical display height in lines" else hexmask.long.word 0x7c 0.--9. 1. " RCSH ,Rectangular Cursor Window Y-Height Vertical display height in pixels" endif group.long 0xa0++0x1f line.long 0x0 "W0BMP01,Window 0 Bitmap Value to Palette Map 0/1 Register" hexmask.long.byte 0x0 8.--15. 1. " PAL01 ,Palette Address for Bitmap Value [1] - OSD Window 0" hexmask.long.byte 0x0 0.--7. 1. " PAL00 ,Palette Address for Bitmap Value [0] - OSD Window 0" line.long 0x4 "W0BMP23,Window 0 Bitmap Value to Palette Map 2/3 Register" hexmask.long.byte 0x4 8.--15. 1. " PAL03 ,Palette Address for Bitmap Value [3] - OSD Window 0" hexmask.long.byte 0x4 0.--7. 1. " PAL02 ,Palette Address for Bitmap Value [2] - OSD Window 0" line.long 0x8 "W0BMP45,Window 0 Bitmap Value to Palette Map 4/5 Register" hexmask.long.byte 0x8 8.--15. 1. " PAL05 ,Palette Address for Bitmap Value [5] - OSD Window 0" hexmask.long.byte 0x8 0.--7. 1. " PAL04 ,Palette Address for Bitmap Value [4] - OSD Window 0" line.long 0xC "W0BMP67,Window 0 Bitmap Value to Palette Map 6/7 Register" hexmask.long.byte 0xC 8.--15. 1. " PAL07 ,Palette Address for Bitmap Value [7] - OSD Window 0" hexmask.long.byte 0xC 0.--7. 1. " PAL06 ,Palette Address for Bitmap Value [6] - OSD Window 0" line.long 0x10 "W0BMP89,Window 0 Bitmap Value to Palette Map 8/9 Register" hexmask.long.byte 0x10 8.--15. 1. " PAL09 ,Palette Address for Bitmap Value [9] - OSD Window 0" hexmask.long.byte 0x10 0.--7. 1. " PAL08 ,Palette Address for Bitmap Value [8] - OSD Window 0" line.long 0x14 "W0BMPAB,Window 0 Bitmap Value to Palette Map A/B Register" hexmask.long.byte 0x14 8.--15. 1. " PAL11 ,Palette Address for Bitmap Value [B] - OSD Window 0" hexmask.long.byte 0x14 0.--7. 1. " PAL10 ,Palette Address for Bitmap Value [A] - OSD Window 0" line.long 0x18 "W0BMPCD,Window 0 Bitmap Value to Palette Map C/D Register" hexmask.long.byte 0x18 8.--15. 1. " PAL13 ,Palette Address for Bitmap Value [D] - OSD Window 0" hexmask.long.byte 0x18 0.--7. 1. " PAL12 ,Palette Address for Bitmap Value [C] - OSD Window 0" line.long 0x1C "W0BMPEF,Window 0 Bitmap Value to Palette Map E/F Register" hexmask.long.byte 0x1C 8.--15. 1. " PAL15 ,Palette Address for Bitmap Value [F] - OSD Window 0" hexmask.long.byte 0x1C 0.--7. 1. " PAL14 ,Palette Address for Bitmap Value [E] - OSD Window 0" group.long 0xc0++0x1f line.long 0x0 "W1BMP01,Window 1 Bitmap Value to Palette Map 0/1 Register" hexmask.long.byte 0x0 8.--15. 1. " PAL01 ,Palette Address for Bitmap Value [1] - OSD Window 1" hexmask.long.byte 0x0 0.--7. 1. " PAL00 ,Palette Address for Bitmap Value [0] - OSD Window 1" line.long 0x4 "W1BMP23,Window 1 Bitmap Value to Palette Map 2/3 Register" hexmask.long.byte 0x4 8.--15. 1. " PAL03 ,Palette Address for Bitmap Value [3] - OSD Window 1" hexmask.long.byte 0x4 0.--7. 1. " PAL02 ,Palette Address for Bitmap Value [2] - OSD Window 1" line.long 0x8 "W1BMP45,Window 1 Bitmap Value to Palette Map 4/5 Register" hexmask.long.byte 0x8 8.--15. 1. " PAL05 ,Palette Address for Bitmap Value [5] - OSD Window 1" hexmask.long.byte 0x8 0.--7. 1. " PAL04 ,Palette Address for Bitmap Value [4] - OSD Window 1" line.long 0xC "W1BMP67,Window 1 Bitmap Value to Palette Map 6/7 Register" hexmask.long.byte 0xC 8.--15. 1. " PAL07 ,Palette Address for Bitmap Value [7] - OSD Window 1" hexmask.long.byte 0xC 0.--7. 1. " PAL06 ,Palette Address for Bitmap Value [6] - OSD Window 1" line.long 0x10 "W1BMP89,Window 1 Bitmap Value to Palette Map 8/9 Register" hexmask.long.byte 0x10 8.--15. 1. " PAL09 ,Palette Address for Bitmap Value [9] - OSD Window 1" hexmask.long.byte 0x10 0.--7. 1. " PAL08 ,Palette Address for Bitmap Value [8] - OSD Window 1" line.long 0x14 "W1BMPAB,Window 1 Bitmap Value to Palette Map A/B Register" hexmask.long.byte 0x14 8.--15. 1. " PAL11 ,Palette Address for Bitmap Value [B] - OSD Window 1" hexmask.long.byte 0x14 0.--7. 1. " PAL10 ,Palette Address for Bitmap Value [A] - OSD Window 1" line.long 0x18 "W1BMPCD,Window 1 Bitmap Value to Palette Map C/D Register" hexmask.long.byte 0x18 8.--15. 1. " PAL13 ,Palette Address for Bitmap Value [D] - OSD Window 1" hexmask.long.byte 0x18 0.--7. 1. " PAL12 ,Palette Address for Bitmap Value [C] - OSD Window 1" line.long 0x1C "W1BMPEF,Window 1 Bitmap Value to Palette Map E/F Register" hexmask.long.byte 0x1C 8.--15. 1. " PAL15 ,Palette Address for Bitmap Value [F] - OSD Window 1" hexmask.long.byte 0x1C 0.--7. 1. " PAL14 ,Palette Address for Bitmap Value [E] - OSD Window 1" width 14. group.long 0xe0++0x1f line.long 0x00 "VBNDRY,Test Mode Register" hexmask.long.byte 0x00 8.--15. 1. " TSTPATNCHROMA ,Chrominance data input register for test mode" bitfld.long 0x00 3. " VFILINCMD ,Vertical Filter Increment Mode" "Off,On" textline " " bitfld.long 0x00 2. " VBNDRYPRCSEN ,Video boundary processing active" "Off,On" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 1. " TEST1 ,TI Test #1" "Normal,RESET_ALL_REGS" bitfld.long 0x00 0. " TEST0 ,TI Test #0" "Normal,TEST_MODE" endif width 14. line.long 0x04 "EXTMODE,Extended Mode Register" bitfld.long 0x04 15. " EXPMDSEL ,Expansion Filtering Mode Select" "Before,After" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x04 13.--14. " SCRNHEXP ,Horizontal Expansion Mode" "x 1,NTSC x9/8 horizontal,Horizontal,?..." else bitfld.long 0x04 13.--14. " SCRNHEXP ,Horizontal Expansion Mode" "x 1,x 9/8,x 3/2,?..." endif textline " " bitfld.long 0x04 12. " SCRNVEXP ,Vertical Expansion Mode" "x 1,x 6/5" bitfld.long 0x04 11. " OSD1BLDCHR ,OSD Bitmap1 Blend Characteristics" "Global,Pixel level" textline " " bitfld.long 0x04 10. " OSD0BLDCHR ,OSD Bitmap0 Blend Characteristics" "Global,Pixel level" bitfld.long 0x04 9. " ATNOSD1EN ,Attenuation Enable for REC601 for OSD Bitmap 1" "Normal,Attenuated" textline " " bitfld.long 0x04 8. " ATNOSD0EN ,Attenuation Enable for REC601 for OSD Bitmap 0" "Normal,Attenuated" bitfld.long 0x04 7. " OSDHRSZ15 ,OSD Bitmap Window Horizontal 1.5x Expansion" "Normal,x 1.5" textline " " bitfld.long 0x04 6. " VIDHRSZ15 ,OSD Video Window Horizontal 1.5x Expansion" "Normal,x 1.5" bitfld.long 0x04 5. " ZMFILV1HEN ,Video Window 1 Horizontal Zoom Filter" "Off,On" textline " " bitfld.long 0x04 4. " ZMFILV1VEN ,Video Window 1 Vertical Zoom Filter" "Off,On" bitfld.long 0x04 3. " ZMFILV0HEN ,Video Window 0 Horizontal Zoom Filter" "Off,On" textline " " bitfld.long 0x04 2. " ZMFILV0VEN ,Video Window 0 Vertical Zoom Filter" "Off,On" bitfld.long 0x04 1. " EXPFILHEN ,Horizontal Expansion Filter Enable" "Off,On" textline " " bitfld.long 0x04 0. " EXPFILVEN ,Vertical Expansion Filter Enable" "Off,On" line.long 0x08 "MISCCTL,Miscellaneous Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x08 15. " BLDSEL ,Blend factor select bit for RGB888 mode" "Compatible,New" bitfld.long 0x08 14. " YC420 ,Read data format select bit" "422,420" bitfld.long 0x08 13. " BBF_TH ,Bitmap blend factor through mode select bit" "Blend factor,Blend factor through mode" textline " " bitfld.long 0x08 12. " CRM_CALC ,Blend calculation for Croma" "Signed,Unsigned" textline " " bitfld.long 0x08 7. " FIELD_ID ,Field ID" "Top,Bottom" eventfld.long 0x08 6. " DMANG ,OSD DMA Status" "No error,Error" bitfld.long 0x08 4. " RSEL ,CLUT ROM selection" "DM320,DM270" else bitfld.long 0x08 7. " FIELD_ID ,Video window RGB mode enable" "Top,Bottom" bitfld.long 0x08 6. " DMANG ,OSD DMA Status" "No error,Error" bitfld.long 0x08 4. " RSEL ,CLUT ROM selection" "CLUT0,CLUT1" endif textline " " bitfld.long 0x08 3. " CPBSY ,CLUT Write Busy" "Not busy,Busy" width 14. line.long 0x0c "CLUTRAMYCB,CLUT RAM Y/Cb Setup Register" hexmask.long.byte 0x0c 8.--15. 1. " Y ,Write data (Y) into built-in CLUT RAM" hexmask.long.byte 0x0c 0.--7. 1. " CB ,Write data (Cb) into built-in CLUT RAM" sif (cpu()=="DM365"||cpu()=="DM368") line.long 0x10 "CLUTRAMCR,CLUT RAM Cr/Mapping Setup Register" else line.long 0x10 "CLUTRAMCR,CLUT RAMCR Setup Register" endif hexmask.long.byte 0x10 8.--15. 1. " CR ,Write data (Cr) into built-in CLUT-RAM" hexmask.long.byte 0x10 0.--7. 1. " CADDR ,CLUT Write Pallette Address" line.long 0x14 "TRANSPVALL,Transparency Color Code - Lower Register" hexmask.long.word 0x14 0.--15. 1. " RGBL ,RGB Transparency Value" line.long 0x18 "TRANSPVALU,Transparency Color Code - Upper Register" hexmask.long.byte 0x18 8.--15. 1. " Y ,Luma Transparency Value" hexmask.long.byte 0x18 0.--7. 1. " RGBU ,RGB Transparency Value" line.long 0x1c "TRANSPBMPIDX,Transparent Index Code for Bitmaps Register" hexmask.long.byte 0x1c 8.--15. 1. " BMP1 ,OSD Bitmap 1 transparent value" hexmask.long.byte 0x1c 0.--7. 1. " BMP0 ,OSD Bitmap 0 transparent value" width 0xb tree.end tree "VENC (VPBE Video Encoder)" base asd:0x01c71e00 width 11. if (((data.long(asd:0x01c71e00))&0x100)==0x00) group.long 0x00++0x3 line.long 0x00 "VMOD,Video Mode Register" bitfld.long 0x00 12.--13. " VDMD ,Digital video output mode" "YCC16,YCC8,Parallel RGB,Serial RGB" bitfld.long 0x00 11. " ITLCL ,Non-interlace line number select (NTSC/PAL)" "262/312,263/313" bitfld.long 0x00 10. " ITLC ,Scan Mode" "Interlace,Non-interlace" textline " " bitfld.long 0x00 9. " NSIT ,Nonstandard interlace mode" "Progressive,Interlaced" bitfld.long 0x00 8. " HDMD ,HDTV mode" "SDTV,HDTV" bitfld.long 0x00 6.--7. " TVTYP ,TV Format Type Select" "NTSC,PAL,?..." textline " " bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave" bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL/HDTV,Not NTSC/PAL/HDTV" bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking" textline " " bitfld.long 0x00 1. " VIE ,Composite output enable" "Fixed low-level,Normal" bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled" else group.long 0x00++0x3 line.long 0x00 "VMOD,Video Mode Register" bitfld.long 0x00 12.--13. " VDMD ,Digital video output mode" "YCC16,YCC8,Parallel RGB,Serial RGB" bitfld.long 0x00 11. " ITLCL ,Non-interlace line number select (NTSC/PAL)" "262/312,263/313" bitfld.long 0x00 10. " ITLC ,Scan Mode" "Interlace,Non-interlace" textline " " bitfld.long 0x00 9. " NSIT ,Nonstandard interlace mode" "Progressive,Interlaced" bitfld.long 0x00 8. " HDMD ,HDTV mode" "SDTV,HDTV" bitfld.long 0x00 6.--7. " TVTYP ,TV Format Type Select" "525P,625P,1080I,720P" textline " " bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave" bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL/HDTV,Not NTSC/PAL/HDTV" bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking" textline " " bitfld.long 0x00 1. " VIE ,Composite output enable" "Fixed low-level,Normal" bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled" endif group.long 0x04++0x7 line.long 0x00 "VIOCTL,Video Interface I/O Control Register" bitfld.long 0x00 14. " VCLKP ,VCLK output polarity" "Non-inverse,Inverse" bitfld.long 0x00 13. " VCLKE ,VCLK output enable" "Disabled,Enabled" bitfld.long 0x00 12. " VCLKZ ,VCLK pin output enable" "Output,Tri-state" textline " " bitfld.long 0x00 8. " SYDIR ,Horizontal/Vertical Sync pin I/O control" "Output,Input" bitfld.long 0x00 4.--5. " DOMD ,Digital data output mode" "Normal,Inversed,L level,H level" bitfld.long 0x00 3. " YCSWAP ,Swaps YOUT/COUT pins" "Normal,Interchanged" textline " " bitfld.long 0x00 2. " YCDC ,YOUT/COUT pin output level" "Normal,DC level" bitfld.long 0x00 0. " YCDIR ,YOUT/COUT pin Direction" "Output,Input" line.long 0x04 "VDPRO,Video Data Processing Register" bitfld.long 0x04 14.--15. " PFLTC ,C Prefilter select" "No filter,1+1,1+2+1,?..." bitfld.long 0x04 12.--13. " PFLTY ,Y Prefilter select" "No filter,1+1,1+2+1,?..." bitfld.long 0x04 11. " PFLTR ,Prefilter sampling frequency" "ENC/2,ENC" textline " " bitfld.long 0x04 9. " CBTYP ,Color Bar Type" "75%,100%" bitfld.long 0x04 8. " CBMD ,Color bar mode" "Normal,Color bar" bitfld.long 0x04 7. " DAFUL ,DAC full-swing output" "Normal,Full-swing" textline " " bitfld.long 0x04 6. " ATRGB ,Input video (Attenuation control for RGB)" "No attenuation,REC601" bitfld.long 0x04 5. " ATYCC ,Input video (Attenuation control for YCbCr)" "No attenuation,REC601" bitfld.long 0x04 4. " ATCOM ,Input video (Attention control for composite)" "No attenuation,REC601" textline " " bitfld.long 0x04 1. " CUPS ,Chroma signal up-sampling enable" "Disabled,Enabled" bitfld.long 0x04 0. " YUPS ,Y signal up-sampling enable" "Disabled,Enabled" if (((d.l(asd:0x01c71e00))&0x20)==0x20) group.long 0x0c++0x3 line.long 0x00 "SYNCCTL,Sync Control Register" bitfld.long 0x00 14. " OVD ,OSD vsync delay" "No delay,0.5H" bitfld.long 0x00 12.--13. " EXFMD ,External field detection mode" "Rising edge,Raw field,Vsync as ID,Vsync phase" bitfld.long 0x00 11. " EXFIV ,External field input inversion" "Non-inverse,Inverse" textline " " bitfld.long 0x00 10. " EXSYNC ,External sync select" "HSYNC/VSYNC,CCD sync" bitfld.long 0x00 9. " EXVIV ,External vertical sync input polarity" "Active high,Active low" bitfld.long 0x00 8. " EXHIV ,External horizontal sync input polarity" "Active high,Active low" textline " " bitfld.long 0x00 7. " CSP ,Composite sync output polarity" "Active high,Active low" bitfld.long 0x00 6. " CSE ,Composite signal output enable" "Disabled,Enabled" bitfld.long 0x00 5. " SYSW ,Output sync select" "Normal,Pulse width" textline " " bitfld.long 0x00 4. " VSYNCS ,Vertical sync output signal" "Vertical,Composite" bitfld.long 0x00 3. " VPL ,Vertical sync output polarity" "Active high,Active low" bitfld.long 0x00 2. " HPL ,Horizontal sync output polarity" "Active high,Active low" textline " " bitfld.long 0x00 1. " SYEV ,Vertical sync output enable" "Disabled,Enabled" bitfld.long 0x00 0. " SYEH ,Horizontal sync output enable" "Disabled,Enabled" else group.long 0x0c++0x3 line.long 0x00 "SYNCCTL,Sync Control Register" bitfld.long 0x00 14. " OVD ,OSD vsync delay" "No delay,0.5H" bitfld.long 0x00 9. " EXVIV ,External vertical sync input polarity" "Active high,Active low" bitfld.long 0x00 8. " EXHIV ,External horizontal sync input polarity" "Active high,Active low" textline " " bitfld.long 0x00 7. " CSP ,Composite sync signal output polarity" "Active high,Active low" bitfld.long 0x00 6. " CSE ,Composite signal output enable" "Disabled,Enabled" bitfld.long 0x00 5. " SYSW ,Output sync select" "Normal,Pulse width" textline " " bitfld.long 0x00 4. " VSYNCS ,Vertical sync output signal" "Vertical,Composite" bitfld.long 0x00 3. " VPL ,Vertical sync output polarity" "Active high,Active low" bitfld.long 0x00 2. " HPL ,Horizontal sync output polarity" "Active high,Active low" textline " " bitfld.long 0x00 1. " SYEV ,Vertical sync output enable" "Disabled,Enabled" bitfld.long 0x00 0. " SYEH ,Horizontal sync output enable" "Disabled,Enabled" endif if (((d.l(asd:0x01c71e00+0xc))&0x20)==0x20) group.long 0x10++0x7 line.long 0x00 "HSPLS,Horizontal Sync Pulse Width Register" hexmask.long.word 0x00 0.--12. 1. " HSPLS ,Horizontal sync pulse width" line.long 0x04 "VSPLS,Vertical Sync Pulse Width Register" hexmask.long.word 0x04 0.--12. 1. " VSPLS ,Vertical sync pulse width" else hgroup.long 0x10++0x7 hide.long 0x00 "HSPLS,Horizontal Sync Pulse Width Register" hide.long 0x04 "VSPLS,Vertical Sync Pulse Width Register" endif group.long 0x18++0x1f line.long 0x00 "HINT,Horizontal Interval Register" hexmask.long.word 0x00 0.--12. 1. " HINT ,Horizontal interval" line.long 0x04 "HSTART,Horizontal Valid Data Start Position Register" hexmask.long.word 0x04 0.--12. 1. " HSTART ,Horizontal valid data start position" line.long 0x08 "HVALID,Horizontal Data Valid Range Register" hexmask.long.word 0x08 0.--12. 1. " HVALID ,Horizontal data valid range" line.long 0x0c "VINTVL,Vertical Interval Register" hexmask.long.word 0x0c 0.--12. 1. " VINT ,Vertical interval" line.long 0x10 "VSTART,Vertical Valid Data Start Position Register" hexmask.long.word 0x10 0.--12. 1. " VSTART ,Vertical valid data start position" line.long 0x14 "VVALID,Vertical Data Valid Range Register" hexmask.long.word 0x14 0.--12. 1. " VVALID ,Vertical data valid range" line.long 0x18 "HSDLY,Horizontal Sync Delay Register" hexmask.long.word 0x18 0.--12. 1. " HSDLY ,Output delay of horizontal sync signal" line.long 0x1c "VSDLY,Vertical Sync Delay Register" hexmask.long.word 0x1c 0.--12. 1. " VSDLY ,Output delay of vertical sync signal" if (((d.l(asd:0x01c71e00))&0x3000)==0x0) group.long 0x38++0x3 line.long 0x00 "YCCCTL,YCbCr Control Register" bitfld.long 0x00 4. " CHM ,Chroma Output Mode" "Not latched,Latched" bitfld.long 0x00 2.--3. " YCP ,YC output order" "CbCr,CrCb,?..." bitfld.long 0x00 1. " FID656 ,Field toggle position" "Not switched,Switched" textline " " bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656" elif (((d.l(asd:0x01c71e00))&0x3000)==0x1000) group.long 0x38++0x3 line.long 0x00 "YCCCTL,YCbCr Control Register" bitfld.long 0x00 4. " CHM ,Chroma Output Mode" "Not latched,Latched" bitfld.long 0x00 2.--3. " YCP ,YC output order based on YCC mode" "Cb-Y-Cr-Y,Y-Cr-Y-Cb,Cr-Y-Cb-Y,Y-Cb-Y-Cr" bitfld.long 0x00 1. " FID656 ,Field toggle position" "Not switched,Switched" textline " " bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656" else group.long 0x38++0x3 line.long 0x00 "YCCCTL,YCbCr Control Register" bitfld.long 0x00 1. " FID656 ,Field toggle position" "Not switched,Switched" bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656" endif group.long 0x3c++0x6b line.long 0x00 "RGBCTL,RGB Control Register" bitfld.long 0x00 15. " RGBLAT ,RGB latch setting" "Normal,Latch" bitfld.long 0x00 13. " IRSWP ,Swap order of data output in IronMan mode" "Normal,Data swap" bitfld.long 0x00 12. " IR9 ,IronMan 9-bit mode" "8-bit,9-bit" textline " " bitfld.long 0x00 11. " IRONM ,Iron_man type RGB output" "Normal,Iron-man" bitfld.long 0x00 10. " DFLTR ,RGB LPF sampling frequency" "ENC/2,ENC" bitfld.long 0x00 8.--9. " DFLTS ,RGB LPF select" "No filter,1+2+1,1+2+3+4+3+2+1,?..." textline " " bitfld.long 0x00 4.--6. " RGBEF ,RGB output order for even fields" "R0-G1-B2,R0-B1-G2,G0-R1-B2,G0-B1-R2,B0-R1-G2,B0-G1-R2,?..." bitfld.long 0x00 0.--2. " RGBOF ,RGB output order for odd fields" "R0-G1-B2,R0-B1-G2,G0-R1-B2,G0-B1-R2,B0-R1-G2,B0-G1-R2,?..." line.long 0x04 "RGBCLP,RGB Level Clipping Register" hexmask.long.byte 0x04 8.--15. 1. " UCLIP ,Upper clip level for RGB output" hexmask.long.byte 0x04 0.--7. 1. " ROFST ,Offset level for RGB output" line.long 0x08 "LINECTL,Line Identification Control Register" bitfld.long 0x08 15. " EXIDP ,External line ID signal input polarity" "Non-inverse,Inverse" bitfld.long 0x08 14. " EXIDE ,External line ID signal input mode" "Internal,External" bitfld.long 0x08 12. " VVLDF ,Vertical data valid range field mode" "Normal,Field" textline " " bitfld.long 0x08 11. " VSTF ,Vertical data valid start position field mode" "Normal,Field" bitfld.long 0x08 8.--10. " VCLID ,Vertical culling line position" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. " VCLRD ,Vertical culling counter reset mode" "Zero,Random" textline " " bitfld.long 0x08 6. " VCL56 ,Digital output vertical culling" "None,5/6" bitfld.long 0x08 5. " HLDF ,Digital output field hold" "Normal,Output" bitfld.long 0x08 4. " HLDL ,Digital output line hold" "Normal,Output" textline " " bitfld.long 0x08 3. " LINID ,Start line ID control in even field" "0,1" bitfld.long 0x08 2. " DCKCLP ,DCLK pattern switching by culling line ID" "Off,On" bitfld.long 0x08 1. " DCKCLI ,DCLK polarity inversion by culling line ID" "Off,On" textline " " bitfld.long 0x08 0. " RGBCL ,RGB output order switching by culling line ID" "Off,On" line.long 0x0c "CULLLINE,Culling Line Control Register" hexmask.long.byte 0x0c 12.--15. 1. " CLOF ,Culling line ID toggle position (Odd field)" hexmask.long.byte 0x0c 8.--11. 1. " CLEF ,Culling line ID toggle position (Even field)" hexmask.long.byte 0x0c 0.--3. 1. " CULI ,Culling line ID inversion interval" line.long 0x10 "LCDOUT,LCD Output Signal Control Register" bitfld.long 0x10 8. " OES ,Output enable signal selection" "LCD_OE,BRIGHT" bitfld.long 0x10 7. " FIDP ,Field Id output polarity" "Non-inverse,Inverse" bitfld.long 0x10 6. " PWMP ,PWM output pulse polarity" "Active high,Active low" textline " " bitfld.long 0x10 5. " PWME ,PWM output control enabled" "Disabled,Enabled" bitfld.long 0x10 4. " ACE ,LCD_AC output control enable" "Disabled,Enabled" bitfld.long 0x10 3. " BRP ,Bright output polarity" "Active high,Active low" textline " " bitfld.long 0x10 2. " BRE ,Bright output control enable" "Disabled,Enabled" bitfld.long 0x10 1. " OEP ,LCD_OE output polarity" "Active high,Active low" bitfld.long 0x10 0. " OEE ,LCD_OE output control enable" "Disabled,Enabled" line.long 0x14 "BRT0,Brightness Start Position Signal Control Register 0" hexmask.long.word 0x14 0.--12. 1. " BRTS ,Bright pulse start position" line.long 0x18 "BRT1,Brightness Width Signal Control Register 1" hexmask.long.word 0x18 0.--12. 1. " BRTW ,Bright pulse width" line.long 0x1c "ACCTL,LCD_AC Signal Control Register" bitfld.long 0x1c 13.--15. " ACTF ,LCD_AC toggle interval" "0,1,2,3,4,5,6,7" hexmask.long.word 0x1c 0.--12. 1. " ACTH ,LCD_AC toggle horizontal position" line.long 0x20 "PWM0,PWM Output Period Register" hexmask.long.word 0x20 0.--12. 1. " PMP ,PWM output period" line.long 0x24 "PWM1,PWM Output Pulse Width Register" hexmask.long.word 0x24 0.--12. 1. " PWM ,PWM output pulse width" line.long 0x28 "DCLKCTL,DCLK Control Register" bitfld.long 0x28 15. " DCKIM ,DCLK internal mode" "Disabled,Enabled" bitfld.long 0x28 12.--13. " DOFST ,DCLK output offset" "0,-0.5,0.5,1" bitfld.long 0x28 11. " DCKEC ,DCLK pattern mode" "Level,Enabled" textline " " bitfld.long 0x28 10. " DCKME ,DCLK mask enable" "Disabled,Enabled" bitfld.long 0x28 9. " DCKOH ,DCLK output divide control" "/1,/2" bitfld.long 0x28 8. " DCKIH ,Internal DCLK divide control" "/1,/2" textline " " bitfld.long 0x28 0.--5. " DCKPW ,DCLK pattern valid bit width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x2C "DCLKPTN0,DCLK Pattern 0 Register" hexmask.long.word 0x2C 0.--15. 1. " DCPTN0 ,DCLK pattern" line.long 0x30 "DCLKPTN1,DCLK Pattern 1 Register" hexmask.long.word 0x30 0.--15. 1. " DCPTN1 ,DCLK pattern" line.long 0x34 "DCLKPTN2,DCLK Pattern 2 Register" hexmask.long.word 0x34 0.--15. 1. " DCPTN2 ,DCLK pattern" line.long 0x38 "DCLKPTN3,DCLK Pattern 3 Register" hexmask.long.word 0x38 0.--15. 1. " DCPTN3 ,DCLK pattern" line.long 0x3C "DCLKPTN0A,DCLK Auxiliary Pattern 0 Register" hexmask.long.word 0x3C 0.--15. 1. " DCPTN0A ,DCLK auxiliary pattern" line.long 0x40 "DCLKPTN1A,DCLK Auxiliary Pattern 1 Register" hexmask.long.word 0x40 0.--15. 1. " DCPTN1A ,DCLK auxiliary pattern" line.long 0x44 "DCLKPTN2A,DCLK Auxiliary Pattern 2 Register" hexmask.long.word 0x44 0.--15. 1. " DCPTN2A ,DCLK auxiliary pattern" line.long 0x48 "DCLKPTN3A,DCLK Auxiliary Pattern 3 Register" hexmask.long.word 0x48 0.--15. 1. " DCPTN3A ,DCLK auxiliary pattern" line.long 0x4c "DCLKHSTT,Horizontal DCLK Mask Start Position Register" hexmask.long.word 0x4c 0.--12. 1. " DHS ,Horizontal DCLK mask start position" line.long 0x50 "DCLKHSTTA,Horizontal Auxiliary DCLK Mask Start Register" hexmask.long.word 0x50 0.--12. 1. " DHSA ,Horizontal Auxiliary DCLK Mask Start Position" line.long 0x54 "DCLKHVLD,Horizontal DCLK Mask Range Register" hexmask.long.word 0x54 0.--12. 1. " DHV ,Horizontal DCLK mask range" line.long 0x58 "DCLKVSTT,Vertical DCLK Mask Start Position Register" hexmask.long.word 0x58 0.--12. 1. " DVS ,DCLK vertical mask start position" line.long 0x5c "DCLKVVLD,Vertical DCLK Mask Range Register" hexmask.long.word 0x5c 0.--12. 1. " DVV ,DCLK vertical mask range" line.long 0x60 "CAPCTL,Closed-Caption Control Register" hexmask.long.byte 0x60 8.--14. 1. " CADF ,Closed caption default data register" bitfld.long 0x60 0.--1. " CAPF ,Closed caption field select" "No data,Even field,Odd field,Both" line.long 0x64 "CAPDO,Closed-Caption Odd Field Data Register" hexmask.long.byte 0x64 8.--14. 1. " CADO0 ,Closed caption default data 0" hexmask.long.byte 0x64 0.--6. 1. " CADO1 ,Closed caption default data 1" line.long 0x68 "CAPDE,Closed-Caption Even Field Data Register" hexmask.long.byte 0x68 8.--14. 1. " CADE0 ,Closed caption default data 0" hexmask.long.byte 0x68 0.--6. 1. " CADE1 ,Closed caption default data 1" if (((d.l(asd:0x01c71e00))&0x1C0)==0x0) group.long 0xa8++0xb line.long 0x00 "ATR0,Video Attribute Data 0 Register" bitfld.long 0x00 2.--5. " WORD1 ,Word0-B Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " WORD0 ,Word0-A Data" "0,1,2,3" line.long 0x04 "ATR1,Video Attribute Data 1 Register" bitfld.long 0x04 4.--7. " WORD2 ,Word2 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "ATR2,Video Attribute Data 2 Register" bitfld.long 0x08 7. " ATR_EN ,Atribute Data Insertion Enable" "No insertion,Insertion" hexmask.long.byte 0x08 0.--5. 1. " CRC ,CRC Data" elif (((d.l(asd:0x01c71e00))&0x1C0)==0x40) hgroup.long 0xa8++0xb hide.long 0x00 "ATR0,Video Attribute Data 0 Register" group.long 0xac++0x7 line.long 0x00 "ATR1,Video Attribute Data 1 Register" bitfld.long 0x00 4.--7. " GROUP2 ,Group2 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " GROUP1 ,Group1 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ATR2,Video Attribute Data 2 Register" bitfld.long 0x04 7. " ATR_EN ,Atribute Data Insertion Enable" "No insertion,Insertion" bitfld.long 0x04 3.--5. " GROUP4 ,Group4 Data" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " GROUP3 ,Group3 Data" "0,1,2,3,4,5,6,7" else hgroup.long 0xa8++0xb hide.long 0x00 "ATR0,Video Attribute Data 0 Register" hide.long 0x04 "ATR1,Video Attribute Data 1 Register" hide.long 0x08 "ATR2,Video Attribute Data 2 Register" endif group.long 0xb8++0x17 line.long 0x00 "VSTAT,Video Status Register" bitfld.long 0x00 9. " CAEST ,Closed caption status(even field)" "Ready,Data input" bitfld.long 0x00 8. " CAOST ,Closed caption status(odd field)" "Ready,Data input" bitfld.long 0x00 4. " FIDST ,Field ID monitor" "0,1" line.long 0x04 "RAMADR,Gamma Correction Table RAM Address Register" hexmask.long.byte 0x04 0.--5. 1. " RAMA ,Gamma correction table RAM address" line.long 0x08 "RAMPORT,GCP/FRC Table RAM Data Port Register" hexmask.long.word 0x08 0.--15. 1. " RAMP ,RAM data port" line.long 0x0C "DACTST,DAC Test Register" bitfld.long 0x0C 14. " DAPD2 ,DAC powerdown" "Normal,Powerdown" bitfld.long 0x0C 13. " DAPD1 ,DAC powerdown" "Normal,Powerdown" bitfld.long 0x0C 12. " DAPD0 ,DAC powerdown" "Normal,Powerdown" textline " " bitfld.long 0x0C 11. " DAIV ,DAC output invert mode" "Non-Inverse,Inverse" bitfld.long 0x0C 10. " DADC ,DAC DC output mode" "Normal,DC output" hexmask.long.word 0x0C 0.--9. 1. " DALVL ,DC level control" line.long 0x10 "YCOLVL,YOUT and COUT Levels Register" hexmask.long.byte 0x10 8.--15. 1. " YLVL ,YOUT DC level" hexmask.long.byte 0x10 0.--7. 1. " CLVL ,COUT DC level" line.long 0x14 "SCPROG,Sub-Carrier Programming Register" hexmask.long.word 0x14 0.--9. 1. " SCSD ,Sub-carrier initial phase value" group.long 0xdc++0x3 line.long 0x00 "CVBS,Composite Mode Register" bitfld.long 0x00 12.--14. " CYDLY ,Delay adjustment of Y signal in composite signal" "0,1,2,3,-4,-3,-2,-1" bitfld.long 0x00 5. " CVLVL ,Composite video level (sync/white)" "286mV/714mV,300mV/700mV" bitfld.long 0x00 4. " CSTUP ,Setup for composite" "0%,7.5%" textline " " bitfld.long 0x00 3. " CBLS ,Blanking shape disable" "No,Yes" bitfld.long 0x00 2. " CRCUT ,Chroma signal low-pass filter select" "1.5 MHz,3 MHz" bitfld.long 0x00 1. " CBBLD ,Blanking build up time for composite output" "140 us,300 us" textline " " bitfld.long 0x00 0. " CSBLD ,Sync build up time for composite output" "140 us,200 us" if (((data.long(asd:0x01c71e00))&0x200)==0x00) group.long 0xe0++0x3 line.long 0x00 "CMPNT,Component Mode Register" bitfld.long 0x00 15. " MRGB ,RGB mode select for component output" "YPbPr,RGB" bitfld.long 0x00 12.--14. " MYDLY ,Delay adjustment of Y signal for component output" "0,1,2,3,-4,-3,-2,-1" bitfld.long 0x00 10. " MSYR ,Sync on Pr (or R)" "No sync,Sync on" textline " " bitfld.long 0x00 9. " MSYB ,Sync on Pb (or B)" "No sync,Sync on" bitfld.long 0x00 8. " MSYG ,Sync on Y (or G)" "No sync,Sync on" bitfld.long 0x00 6.--7. " MCLVL ,Chroma level for component YPbPr" "350 mW (SMPTE N10),467 mV (Betacam),467 mV (MII),?..." textline " " bitfld.long 0x00 5. " MYLVL ,Luma level (sync/white) for component YPbPr" "286mV/714mV,300mV/700mV" bitfld.long 0x00 4. " MSTUP ,Setup for component YPbPr" "0%,7.5%" bitfld.long 0x00 3. " MBLS ,Blanking shape disable" "No,Yes" textline " " bitfld.long 0x00 1. " MBBLD ,Blanking build-up time for component output" "70 us,150 us" bitfld.long 0x00 0. " MSBLD ,Sync build-up time for component output" "70 us,100 us" else group.long 0xe0++0x3 line.long 0x00 "CMPNT,Component Mode Register" bitfld.long 0x00 15. " MRGB ,RGB mode select for component output" "YPbPr,RGB" bitfld.long 0x00 12.--14. " MYDLY ,Delay adjustment of Y signal in component mode" "0,1,2,3,-4,-3,-2,-1" bitfld.long 0x00 10. " MSYR ,Sync on Pr (or R)" "No sync,Sync on" textline " " bitfld.long 0x00 9. " MSYB ,Sync on Pb (or B)" "No sync,Sync on" bitfld.long 0x00 8. " MSYG ,Sync on Y (or G)" "No sync,Sync on" bitfld.long 0x00 6.--7. " MCLVL ,Chroma level for component YPbPr" "350 mW (SMPTE N10),467 mV (Betacam),467 mV (MII),?..." textline " " bitfld.long 0x00 5. " MYLVL ,Luma level (sync/white) for component YPbPr" "286mV/714mV,300mV/700mV" bitfld.long 0x00 4. " MSTUP ,Setup for component YPbPr" "0%,7.5%" bitfld.long 0x00 3. " MBLS ,Blanking shape disable" "No,Yes" textline " " bitfld.long 0x00 1. " MBBLD ,Blanking build-up time for component output" "140 us,300 us" bitfld.long 0x00 0. " MSBLD ,Sync build-up time for component output" "140 us,200 us" endif group.long 0xe4++0x13 line.long 0x00 "ETMG0,CVBS Timing Control 0 Register" hexmask.long.byte 0x00 8.--11. 1. " CEPW ,Equalizing pulse width offset for composite output" hexmask.long.byte 0x00 4.--7. 1. " CFSW ,Field sync pulse width offset for composite output" hexmask.long.byte 0x00 0.--3. 1. " CLSW ,Line sync pulse width offset for composite output" line.long 0x04 "ETMG1,CVBS Timing Control 1 Register" hexmask.long.byte 0x04 12.--15. 1. " CBSE ,Burst end position offset for composite output" hexmask.long.byte 0x04 8.--11. 1. " CBST ,Burst start position offset for composite output" hexmask.long.byte 0x04 4.--7. 1. " CFPW ,Front porch position offset for composite output" textline " " hexmask.long.byte 0x04 0.--3. 1. " CLBI ,Line blanking end position offset for composite output" line.long 0x08 "ETMG2,Component Timing Control 2 Register" hexmask.long.byte 0x08 8.--11. 1. " MEPW ,Equalizing pulse width offset for component output" hexmask.long.byte 0x08 4.--7. 1. " MFSW ,Field sync pulse width offset for component output" hexmask.long.byte 0x08 0.--3. 1. " MLSW ,Line sync pulse width offset for component output" line.long 0x0c "ETMG3,Component Timing Control 3 Register" hexmask.long.byte 0x0c 4.--7. 1. " MFPW ,Front porch position offset for component output" hexmask.long.byte 0x0c 0.--3. 1. " MLBI ,Line blanking end position offset for component output" line.long 0x10 "DACSEL,DAC Output Select Register" bitfld.long 0x10 8.--11. " DAC2S ,DAC2 output select" "CVBS,S-Video Y,S-Video C,Y/G,Pb/B,Pr/R,?..." bitfld.long 0x10 4.--7. " DAC1S ,DAC1 output select" "CVBS,S-Video Y,S-Video C,Y/G,Pb/B,Pr/R,?..." bitfld.long 0x10 0.--3. " DAC0S ,DAC0 output select" "CVBS,S-Video Y,S-Video C,Y/G,Pb/B,Pr/R,?..." group.long 0x100++0x73 line.long 0x00 "ARGBX0,Analog RGB Matrix 0 Register" hexmask.long.word 0x00 0.--10. 1. " AGY ,YCbCr->RGB matrix coefficient GY for analog RGB out" line.long 0x04 "ARGBX1,Analog RGB Matrix 1 Register" hexmask.long.word 0x04 0.--10. 1. " ARV ,YCbCr->RGB matrix coefficient RV for analog RGB out" line.long 0x08 "ARGBX2,Analog RGB Matrix 2 Register" hexmask.long.word 0x08 0.--10. 1. " AGU ,YCbCr->RGB matrix coefficient GU for analog RGB out" line.long 0x0c "ARGBX3,Analog RGB Matrix 3 Register" hexmask.long.word 0x0c 0.--10. 1. " AGV ,YCbCr->RGB matrix coefficient GV for analog RGB out" line.long 0x10 "ARGBX4,Analog RGB Matrix 4 Register" hexmask.long.word 0x10 0.--10. 1. " ABU ,YCbCr->RGB matrix coefficient BU for analog RGB out" line.long 0x14 "DRGBX0,Digital RGB Matrix 0 Register" hexmask.long.word 0x14 0.--10. 1. " DGY ,YCbCr->RGB matrix coefficient GY for digital RGB out" line.long 0x18 "DRGBX1,Digital RGB Matrix 1 Register" hexmask.long.word 0x18 0.--10. 1. " DRV ,YCbCr->RGB matrix coefficient RV for digital RGB out" line.long 0x1c "DRGBX2,Digital RGB Matrix 2 Register" hexmask.long.word 0x1c 0.--10. 1. " DGU ,YCbCr->RGB matrix coefficient GU for digital RGB out" line.long 0x20 "DRGBX3,Digital RGB Matrix 3 Register" hexmask.long.word 0x20 0.--10. 1. " DGV ,YCbCr->RGB matrix coefficient GV for digital RGB out" line.long 0x24 "DRGBX4,Digital RGB Matrix 4 Register" hexmask.long.word 0x24 0.--11. 1. " DBU ,YCbCr->RGB matrix coefficient BU for digital RGB out" line.long 0x28 "VSTARTA,Vertical Data Valid Start Position for Even Field Register" hexmask.long.word 0x28 0.--12. 1. " VSTPA ,Vertical data valid start position for even field" line.long 0x2c "OSDCLK0,OSD Clock Control 0 Register" hexmask.long.byte 0x2c 0.--3. 1. " OCPW ,OSD clock pattern bit width" line.long 0x30 "OSDCLK1,OSD Clock Control 1 Register" hexmask.long.word 0x30 0.--15. 1. " OCPT ,OSD clock pattern" line.long 0x34 "HVLDCL0,Horizontal Valid Culling Control 0 Register" bitfld.long 0x34 4. " HCM ,Horizontal valid culling mode" "Normal,Horizontal" hexmask.long.byte 0x34 0.--3. 1. " HCPW ,Horizontal valid culling pattern bit width" line.long 0x38 "HVLDCL1,Horizontal Valid Culling Control 1 Register" hexmask.long.word 0x38 0.--15. 1. " HCPT ,Horizontal valid culling pattern" line.long 0x3c "OSDHADV,OSD Horizontal Sync Advance Register" hexmask.long.byte 0x3c 0.--7. 1. " OHAD ,OSD horizontal sync advance" line.long 0x40 "CLKCTL,Clock Control Register" bitfld.long 0x40 8. " CLKGAM ,Clock enable for gamma correction table" "Disabled,Enabled" bitfld.long 0x40 4. " CLKDIG ,Clock enable for digital LCD controller" "Disabled,Enabled" bitfld.long 0x40 0. " CLKENC ,Clock enable for video encoder" "Disabled,Enabled" line.long 0x44 "GAMCTL,Enable Gamma Correction Register" bitfld.long 0x44 6. " DAFUL2 ,DAC2 full-swing output" "Normal,Full-swing" bitfld.long 0x44 5. " DAFUL1 ,DAC1 full-swing output" "Normal,Full-swing" bitfld.long 0x44 4. " DAFUL0 ,DAC0 full-swing output" "Normal,Full-swing" textline " " bitfld.long 0x44 1. " GAMUQ ,Unique RGB gamma table mode" "Off,On" bitfld.long 0x44 0. " GAMON ,Gamma correction enable" "Disabled,Enabled" line.long 0x48 "VVALIDA,Vertical Data Valid Area For Even Field Register" hexmask.long.word 0x48 0.--12. 1. " VVLDA ,Vertical data valid range for even field" line.long 0x4c "BATR0,Video Attribute 0 For Type B Packet Register" bitfld.long 0x4c 7. " BAEN ,Type B packet insertion enable" "Disabled,Enabled" bitfld.long 0x4c 0.--5. " BAH ,Type B packet header" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x50 "BATR1,Video Attribute 1 For Type B Packet Register" hexmask.long.word 0x50 0.--15. 1. " BAP ,Type B packet header" line.long 0x54 "BATR2,Video Attribute 2 For Type B Packet Register" hexmask.long.word 0x54 0.--15. 1. " BAP ,Type B packet header" line.long 0x58 "BATR3,Video Attribute 3 For Type B Packet Register" hexmask.long.word 0x58 0.--15. 1. " BAP ,Type B packet header" line.long 0x5C "BATR4,Video Attribute 4 For Type B Packet Register" hexmask.long.word 0x5C 0.--15. 1. " BAP ,Type B packet header" line.long 0x60 "BATR5,Video Attribute 5 For Type B Packet Register" hexmask.long.word 0x60 0.--15. 1. " BAP ,Type B packet header" line.long 0x64 "BATR6,Video Attribute 6 For Type B Packet Register" hexmask.long.word 0x64 0.--15. 1. " BAP ,Type B packet header" line.long 0x68 "BATR7,Video Attribute 7 For Type B Packet Register" hexmask.long.word 0x68 0.--15. 1. " BAP ,Type B packet header" line.long 0x6C "BATR8,Video Attribute 8 For Type B Packet Register" hexmask.long.word 0x6C 0.--15. 1. " BAP ,Type B packet header" line.long 0x70 "DACAMP,Gain and Offset Register" hexmask.long.byte 0x70 10.--15. 0x4 " DAOF ,DAC output offset" hexmask.long.word 0x70 0.--9. 1. " DAGA ,DAC output gain" width 0xb tree.end tree.end tree "VPSS (VPSS System Configuration)" base asd:0x01c70200 width 15. group.long 0x00++0x03 line.long 0x00 "VPBE_CLK_CTRL,VPBE Clock Control Register" bitfld.long 0x00 7. " LDC_CLK_SEL ,LDC memory clock select" "OSD module,ARM" bitfld.long 0x00 6. " OSD_CLK_SEL ,OSD memory clock select" "OSD module,ARM" bitfld.long 0x00 3. " LDC_CLK_ENABLE ,LDC clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CLKSEL_VENC ,VENC clock select" "ENC_CLOCK 1,ENC_CLOCK/2" bitfld.long 0x00 0. " VPBE_CLK_ENABLE ,OSD, VENC clock enable" "Disabled,Enabled" width 0xb tree.end tree.end tree.open "PLL" tree "PLL Controller 1" base asd:0x01C40800 width 10. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral ID Register" hexmask.long.byte 0x00 16.--23. 1. " TYPE ,Peripheral type (0x01)" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Peripheral class (0x08)" hexmask.long.byte 0x00 0.--7. 1. " REV ,Peripheral revision" rgroup.long 0xe4++0x03 line.long 0x00 "RSTYPE,Reset Type Status Register" bitfld.long 0x00 3. " SRST ,System reset" "No reset,Reset" bitfld.long 0x00 2. " MRST ,Maximum reset" "No reset,Reset" bitfld.long 0x00 1. " XWRST ,External warm reset" "No reset,Reset" bitfld.long 0x00 0. " POR ,Power on reset" "No reset,Reset" group.long 0x100++0x3 line.long 0x00 "PLLCTL,PLL Control Register" bitfld.long 0x00 5. " PLLENSRC ,PLL enable source" "PLLEN,Internal test hardware" bitfld.long 0x00 3. " PLLRST ,PLL reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " PLLPWRDN ,PLL power-down" "Operation,Power-down" bitfld.long 0x00 0. " PLLEN ,PLL mode enable" "Bypass,PLL" rgroup.long 0x104++0x03 line.long 0x00 "OCSEL,OBSCLK Select Register" bitfld.long 0x00 4. " OCSRC ,OBSCLK source" "Enabled,Disabled" group.long 0x108++0x03 line.long 0x00 "PLLSECCTL,PLL Secondary Control Register" bitfld.long 0x00 23. " LIMITRECALEN ,Force recalibration on code limits" "Disabled,Enabled" bitfld.long 0x00 22. " STOPMODE ,Stop /Limp select" "Disabled,Enabled" bitfld.long 0x00 21. " LOWCURRSTDBY ,Low current stand by select" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLOWCLKLOCK ,Low input frequency control" "Disabled,Enabled" bitfld.long 0x00 19. " DRIFTGUARDEN ,Temperature; Drift recalibration enable" "Disabled,Enabled" bitfld.long 0x00 18. " TENABLEDIV ,Core Register M2/N2 load enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " TENABLE ,Core Register M/N load enable" "Disabled,Enabled" bitfld.long 0x00 16. " TINITZ ,Core soft reset lock sequence initialization" "Disabled,Enabled" group.long 0x110++0x1f line.long 0x00 "PLLM,PLL Multiplier Control Register" hexmask.long.word 0x00 0.--9. 1. " PLLM ,PLL Multiplier" line.long 0x04 "PREDIV,PLL Pre-Divider Control Register" bitfld.long 0x04 0.--4. " RATIO ,Divider ratio for pre divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "PLLDIV1,PLL Controller Divider 1 Register" bitfld.long 0x08 15. " D1EN ,Divider enable for SYSCLK1" "Disabled,Enabled" bitfld.long 0x08 0.--4. " RATIO ,Divider ratio for SYSCLK1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x0c "PLLDIV2,PLL Controller Divider 2 Register" bitfld.long 0x0c 15. " D2EN ,Divider enable for SYSCLK2" "Disabled,Enabled" bitfld.long 0x0c 0.--4. " RATIO ,Divider ratio for SYSCLK2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x10 "PLLDIV3,PLL Controller Divider 3 Register" bitfld.long 0x10 15. " D3EN ,Divider enable for SYSCLK3" "Disabled,Enabled" bitfld.long 0x10 0.--4. " RATIO ,Divider ratio for SYSCLK3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x14 "OSCDIV1,Oscillator Divider 1 Register for OBSCLK" bitfld.long 0x14 15. " OD1EN ,Oscillator Divider OD1 Enable" "Disabled,Enabled" bitfld.long 0x14 0.--4. " RATIO ,Divider ratio for OBSCLK divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x18 "POSTDIV,PLL Post-Divider Control Register" bitfld.long 0x18 15. " POSTDEN ,Post-divider enable" "Disabled,Enabled" bitfld.long 0x18 0.--4. " RATIO ,Divider ratio for post divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x1c "BPDIV,Bypass Divider Register" bitfld.long 0x1c 15. " BPDEN ,Divider enable for bypass clock" "Disabled,Enabled" bitfld.long 0x1c 0.--4. " RATIO ,Divider ratio for bypass clock" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x138++0x3 line.long 0x00 "PLLCMD,PLL Controller Command Register" bitfld.long 0x00 0. " GOSET ,GO operation command for SYSCLKn ratio change and/or phase alignment" "Cleared,Initiated" rgroup.long 0x13c++0x3 line.long 0x00 "PLLSTAT,PLL Controller Status Register" bitfld.long 0x00 2. " STABLE ,OSCIN Stable" "Not finished,Stable" bitfld.long 0x00 1. " LOCK ,PLL Core STATUS" "Not locked,Locked" bitfld.long 0x00 0. " GOSTAT ,GO operation status" "Not in progress,In progress" group.long 0x140++0x3 line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register" bitfld.long 0x00 8. " ALN8 ,SYSCLK9 alignment" "Not aligned,Aligned" bitfld.long 0x00 7. " ALN7 ,SYSCLK8 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 6. " ALN6 ,SYSCLK7 alignment" "Not aligned,Aligned" bitfld.long 0x00 5. " ALN5 ,SYSCLK6 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 4. " ALN4 ,SYSCLK5 alignment" "Not aligned,Aligned" bitfld.long 0x00 3. " ALN3 ,SYSCLK4 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 2. " ALN2 ,SYSCLK3 alignment" "Not aligned,Aligned" bitfld.long 0x00 1. " ALN1 ,SYSCLK2 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 0. " ALN0 ,SYSCLK1 alignment" "Not aligned,Aligned" rgroup.long 0x144++0x3 line.long 0x00 "DCHANGE,PLLDIV Ratio Change Status Register" bitfld.long 0x00 8. " SYS9 ,SYSCLK5 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 7. " SYS8 ,SYSCLK5 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 6. " SYS7 ,SYSCLK5 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 5. " SYS6 ,SYSCLK5 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 4. " SYS5 ,SYSCLK5 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 3. " SYS4 ,SYSCLK4 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 2. " SYS3 ,SYSCLK3 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified" group.long 0x148++0x3 line.long 0x00 "CKEN,Clock Enable Control Register" bitfld.long 0x00 1. " OBSCLK ,OBSCLK Enable" "Disabled,Enabled" bitfld.long 0x00 0. " AUXEN ,Auxiliary clock enable" "Disabled,Enabled" rgroup.long 0x14c++0x07 line.long 0x00 "CKSTAT,Clock Status Register" bitfld.long 0x00 3. " BPON ,SYSCLKBP on status" "Off,On" bitfld.long 0x00 1. " OBSON ,OBSCLK on status" "Off,On" textline " " bitfld.long 0x00 0. " AUXEN ,AUXCLK on status" "Off,On" line.long 0x04 "SYSTAT,SYSCLK Status Register" bitfld.long 0x04 8. " SYS9ON ,SYSCLK9 on status" "Off,On" bitfld.long 0x04 7. " SYS8ON ,SYSCLK8 on status" "Off,On" textline " " bitfld.long 0x04 6. " SYS7ON ,SYSCLK7 on status" "Off,On" bitfld.long 0x04 5. " SYS6ON ,SYSCLK6 on status" "Off,On" textline " " bitfld.long 0x04 4. " SYS5ON ,SYSCLK5 on status" "Off,On" bitfld.long 0x04 3. " SYS4ON ,SYSCLK4 on status" "Off,On" textline " " bitfld.long 0x04 2. " SYS3ON ,SYSCLK3 on status" "Off,On" bitfld.long 0x04 1. " SYS2ON ,SYSCLK2 on status" "Off,On" textline " " bitfld.long 0x04 0. " SYS1ON ,SYSCLK1 on status" "Off,On" group.long 0x160++0x07 line.long 0x00 "PLLDIV4,PLL Controller Divider 4 Register" bitfld.long 0x00 15. " D4EN ,Divider enable for SYSCLK4" "Disabled,Enabled" bitfld.long 0x00 0.--4. " RATIO ,Divider ratio for SYSCLK4" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "PLLDIV5,PLL Controller Divider 5 Register" bitfld.long 0x04 15. " D5EN ,Divider enable for SYSCLK5" "Disabled,Enabled" bitfld.long 0x04 0.--4. " RATIO ,Divider ratio for SYSCLK5" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x168++0x0f line.long 0x0 "PLLDIV6,PLL Controller Divider 4 Register" bitfld.long 0x0 15. " D6EN ,Divider enable for SYSCLK6" "Disabled,Enabled" bitfld.long 0x0 0.--4. " RATIO ,Divider ratio for SYSCLK6" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x4 "PLLDIV7,PLL Controller Divider 4 Register" bitfld.long 0x4 15. " D7EN ,Divider enable for SYSCLK7" "Disabled,Enabled" bitfld.long 0x4 0.--4. " RATIO ,Divider ratio for SYSCLK7" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x8 "PLLDIV8,PLL Controller Divider 4 Register" bitfld.long 0x8 15. " D8EN ,Divider enable for SYSCLK8" "Disabled,Enabled" bitfld.long 0x8 0.--4. " RATIO ,Divider ratio for SYSCLK8" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0xC "PLLDIV9,PLL Controller Divider 4 Register" bitfld.long 0xC 15. " D9EN ,Divider enable for SYSCLK9" "Disabled,Enabled" bitfld.long 0xC 0.--4. " RATIO ,Divider ratio for SYSCLK9" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" width 0xb tree.end tree "PLL Controller 2" base asd:0x01C40c00 width 10. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral ID Register" hexmask.long.byte 0x00 16.--23. 1. " TYPE ,Peripheral type (0x01)" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Peripheral class (0x08)" hexmask.long.byte 0x00 0.--7. 1. " REV ,Peripheral revision" group.long 0x100++0x3 line.long 0x00 "PLLCTL,PLL Control Register" bitfld.long 0x00 5. " PLLENSRC ,PLL enable source" "PLLEN,Internal test hardware" bitfld.long 0x00 3. " PLLRST ,PLL reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " PLLPWRDN ,PLL power-down" "Operation,Power-down" bitfld.long 0x00 0. " PLLEN ,PLL mode enable" "Bypass,PLL" rgroup.long 0x104++0x03 line.long 0x00 "OCSEL,OBSCLK Select Register" bitfld.long 0x00 4. " OCSRC ,OBSCLK source" "Enabled,Disabled" group.long 0x108++0x03 line.long 0x00 "PLLSECCTL,PLL Secondary Control Register" bitfld.long 0x00 23. " LIMITRECALEN ,Force recalibration on code limits" "Disabled,Enabled" bitfld.long 0x00 22. " STOPMODE ,Stop /Limp select" "Disabled,Enabled" bitfld.long 0x00 21. " LOWCURRSTDBY ,Low current stand by select" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " SLOWCLKLOCK ,Low input frequency control" "Disabled,Enabled" bitfld.long 0x00 19. " DRIFTGUARDEN ,Temperature; Drift recalibration enable" "Disabled,Enabled" bitfld.long 0x00 18. " TENABLEDIV ,Core Register M2/N2 load enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " TENABLE ,Core Register M/N load enable" "Disabled,Enabled" bitfld.long 0x00 16. " TINITZ ,Core soft reset lock sequence initialization" "Disabled,Enabled" group.long 0x110++0x1f line.long 0x00 "PLLM,PLL Multiplier Control Register" hexmask.long.word 0x00 0.--9. 1. " PLLM ,PLL Multiplier" line.long 0x04 "PREDIV,PLL Pre-Divider Control Register" bitfld.long 0x04 0.--4. " RATIO ,Divider ratio for pre divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x08 "PLLDIV1,PLL Controller Divider 1 Register" bitfld.long 0x08 15. " D1EN ,Divider enable for SYSCLK1" "Disabled,Enabled" bitfld.long 0x08 0.--4. " RATIO ,Divider ratio for SYSCLK1" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x0c "PLLDIV2,PLL Controller Divider 2 Register" bitfld.long 0x0c 15. " D2EN ,Divider enable for SYSCLK2" "Disabled,Enabled" bitfld.long 0x0c 0.--4. " RATIO ,Divider ratio for SYSCLK2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x10 "PLLDIV3,PLL Controller Divider 3 Register" bitfld.long 0x10 15. " D3EN ,Divider enable for SYSCLK3" "Disabled,Enabled" bitfld.long 0x10 0.--4. " RATIO ,Divider ratio for SYSCLK3" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x14 "OSCDIV1,Oscillator Divider 1 Register for OBSCLK" bitfld.long 0x14 15. " OD1EN ,Oscillator Divider OD1 Enable" "Disabled,Enabled" bitfld.long 0x14 0.--4. " RATIO ,Divider ratio for OBSCLK divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x18 "POSTDIV,PLL Post-Divider Control Register" bitfld.long 0x18 15. " POSTDEN ,Post-divider enable" "Disabled,Enabled" bitfld.long 0x18 0.--4. " RATIO ,Divider ratio for post divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x1c "BPDIV,Bypass Divider Register" bitfld.long 0x1c 15. " BPDEN ,Divider enable for bypass clock" "Disabled,Enabled" bitfld.long 0x1c 0.--4. " RATIO ,Divider ratio for bypass clock" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x138++0x3 line.long 0x00 "PLLCMD,PLL Controller Command Register" bitfld.long 0x00 0. " GOSET ,GO operation command for SYSCLKn ratio change and/or phase alignment" "Cleared,Initiated" rgroup.long 0x13c++0x3 line.long 0x00 "PLLSTAT,PLL Controller Status Register" bitfld.long 0x00 2. " STABLE ,OSCIN Stable" "Not finished,Stable" bitfld.long 0x00 1. " LOCK ,PLL Core STATUS" "Not locked,Locked" bitfld.long 0x00 0. " GOSTAT ,GO operation status" "Not in progress,In progress" group.long 0x140++0x3 line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register" bitfld.long 0x00 4. " ALN4 ,SYSCLK5 alignment" "Not aligned,Aligned" bitfld.long 0x00 3. " ALN3 ,SYSCLK4 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 2. " ALN2 ,SYSCLK3 alignment" "Not aligned,Aligned" bitfld.long 0x00 1. " ALN1 ,SYSCLK2 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 0. " ALN0 ,SYSCLK1 alignment" "Not aligned,Aligned" rgroup.long 0x144++0x3 line.long 0x00 "DCHANGE,PLLDIV Ratio Change Status Register" bitfld.long 0x00 4. " SYS5 ,SYSCLK5 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 3. " SYS4 ,SYSCLK4 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 2. " SYS3 ,SYSCLK3 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified" rgroup.long 0x14c++0x07 line.long 0x00 "CKSTAT,Clock Status Register" bitfld.long 0x00 3. " BPON ,SYSCLKBP on status" "Off,On" bitfld.long 0x00 1. " OBSON ,OBSCLK on status" "Off,On" textline " " bitfld.long 0x00 0. " AUXEN ,AUXCLK on status" "Off,On" line.long 0x04 "SYSTAT,SYSCLK Status Register" bitfld.long 0x04 4. " SYS5ON ,SYSCLK5 on status" "Off,On" bitfld.long 0x04 3. " SYS4ON ,SYSCLK4 on status" "Off,On" textline " " bitfld.long 0x04 2. " SYS3ON ,SYSCLK3 on status" "Off,On" bitfld.long 0x04 1. " SYS2ON ,SYSCLK2 on status" "Off,On" textline " " bitfld.long 0x04 0. " SYS1ON ,SYSCLK1 on status" "Off,On" group.long 0x160++0x07 line.long 0x00 "PLLDIV4,PLL Controller Divider 4 Register" bitfld.long 0x00 15. " D4EN ,Divider enable for SYSCLK4" "Disabled,Enabled" bitfld.long 0x00 0.--4. " RATIO ,Divider ratio for SYSCLK4" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "PLLDIV5,PLL Controller Divider 5 Register" bitfld.long 0x04 15. " D5EN ,Divider enable for SYSCLK5" "Disabled,Enabled" bitfld.long 0x04 0.--4. " RATIO ,Divider ratio for SYSCLK5" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" width 0xb tree.end tree.end tree "PSC (Power and Sleep Controller)" base asd:0x01c41000 width 9. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information" bitfld.long 0x00 30.--31. " SCHEME ,Distinguishes between the old scheme and the current scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Software compatible module family" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major Revision" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Special version for a particular device" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Revision" wgroup.long 0x18++0x3 line.long 0x00 "INTEVAL,Interrupt Evaluation Register" bitfld.long 0x00 0. " ALLEV ,Re-evaluate PSC interrupt" "No effect,Re-evaluate" rgroup.long 0x40++0x7 line.long 0x00 "MERRPR0,Module Error Pending Register 0 (mod 0 - 31)" bitfld.long 0x00 31. " M0[31] ,Module interrupt status bit for module 31 (ARM)" "Not active,Active" bitfld.long 0x00 30. " M0[30] ,Module interrupt status bit for module 30 (SYSTEM)" "Not active,Active" bitfld.long 0x00 29. " M0[29] ,Module interrupt status bit for module 29 (TIMER2)" "Not active,Active" textline " " bitfld.long 0x00 28. " M0[28] ,Module interrupt status bit for module 28 (TIMER1)" "Not active,Active" bitfld.long 0x00 27. " M0[27] ,Module interrupt status bit for module 27 (TIMER0)" "Not active,Active" bitfld.long 0x00 26. " M0[26] ,Module interrupt status bit for module 26 (GPIO)" "Not active,Active" textline " " bitfld.long 0x00 25. " M0[25] ,Module interrupt status bit for module 25 (PWM2)" "Not active,Active" bitfld.long 0x00 24. " M0[24] ,Module interrupt status bit for module 24 (PWM1)" "Not active,Active" bitfld.long 0x00 23. " M0[23] ,Module interrupt status bit for module 23 (PWM0)" "Not active,Active" textline " " bitfld.long 0x00 22. " M0[22] ,Module interrupt status bit for module 22 (SPI0)" "Not active,Active" bitfld.long 0x00 21. " M0[21] ,Module interrupt status bit for module 21 (HPI)" "Not active,Active" bitfld.long 0x00 20. " M0[20] ,Module interrupt status bit for module 20 (UART1)" "Not active,Active" textline " " bitfld.long 0x00 19. " M0[19] ,Module interrupt status bit for module 19 (UART0)" "Not active,Active" bitfld.long 0x00 18. " M0[18] ,Module interrupt status bit for module 18 (I2C)" "Not active,Active" bitfld.long 0x00 17. " M0[17] ,Module interrupt status bit for module 17 (TIMER4)" "Not active,Active" textline " " bitfld.long 0x00 15. " M0[15] ,Module interrupt status bit for module 15 (MMC/SD0)" "Not active,Active" bitfld.long 0x00 14. " M0[14] ,Module interrupt status bit for module 14 (AEMIF)" "Not active,Active" bitfld.long 0x00 13. " M0[13] ,Module interrupt status bit for module 13 (DDR EMIF)" "Not active,Active" textline " " bitfld.long 0x00 12. " M0[12] ,Module interrupt status bit for module 12 (RTO)" "Not active,Active" bitfld.long 0x00 11. " M0[11] ,Module interrupt status bit for module 11 (SPI2)" "Not active,Active" bitfld.long 0x00 10. " M0[10] ,Module interrupt status bit for module 10 (PWM3)" "Not active,Active" textline " " bitfld.long 0x00 9. " M0[09] ,Module interrupt status bit for module 9 (USB)" "Not active,Active" bitfld.long 0x00 8. " M0[08] ,Module interrupt status bit for module 8 (McBSP)" "Not active,Active" bitfld.long 0x00 7. " M0[07] ,Module interrupt status bit for module 7 (MMC_SD1)" "Not active,Active" textline " " bitfld.long 0x00 6. " M0[06] ,Module interrupt status bit for module 6 (SPI1)" "Not active,Active" bitfld.long 0x00 5. " M0[05] ,Module interrupt status bit for module 5 (TIMER3)" "Not active,Active" bitfld.long 0x00 4. " M0[04] ,Module interrupt status bit for module 4 (EDMA TC3)" "Not active,Active" textline " " bitfld.long 0x00 3. " M0[03] ,Module interrupt status bit for module 3 (EDMA TC2)" "Not active,Active" bitfld.long 0x00 2. " M0[02] ,Module interrupt status bit for module 2 (EDMA TC1)" "Not active,Active" bitfld.long 0x00 1. " M0[01] ,Module interrupt status bit for module 1 (EDMA TC0)" "Not active,Active" textline " " bitfld.long 0x00 0. " M0[00] ,Module interrupt status bit for module 0 (EDMA CC)" "Not active,Active" line.long 0x04 "MERRPR1,Module Error Pending Register 1 (mod 32 - 51)" bitfld.long 0x04 19. " M1[51] ,Module interrupt status bit for module 51 (HDVICP)" "Not active,Active" bitfld.long 0x04 18. " M1[50] ,Module interrupt status bit for module 50 (MJCP)" "Not active,Active" bitfld.long 0x04 15. " M1[47] ,Module interrupt status bit for module 47 (VPSS MASTER)" "Not active,Active" textline " " bitfld.long 0x04 14. " M1[46] ,Module interrupt status bit for module 46 (VDAC CLK)" "Not active,Active" bitfld.long 0x04 13. " M1[45] ,Module interrupt status bit for module 45 (VDAC CLKRES)" "Not active,Active" bitfld.long 0x04 12. " M1[44] ,Module interrupt status bit for module 44 (VoiceCodec)" "Not active,Active" textline " " bitfld.long 0x04 11. " M1[43] ,Module interrupt status bit for module 43 (ADC)" "Not active,Active" bitfld.long 0x04 10. " M1[42] ,Module interrupt status bit for module 42 (KEYSCAN)" "Not active,Active" bitfld.long 0x04 9. " M1[41] ,Module interrupt status bit for module 41 (RTC)" "Not active,Active" textline " " bitfld.long 0x04 8. " M1[40] ,Module interrupt status bit for module 40 (EMAC)" "Not active,Active" bitfld.long 0x04 7. " M1[39] ,Module interrupt status bit for module 39 (SPI4)" "Not active,Active" bitfld.long 0x04 6. " M1[38] ,Module interrupt status bit for module 38 (SPI3)" "Not active,Active" textline " " bitfld.long 0x04 3. " M1[35] ,Module interrupt status bit for module 35 (EMULATION)" "Not active,Active" group.long 0x50++0x7 line.long 0x00 "MERRCR0,Module Error Clear Register 0 (mod 0 - 31)" bitfld.long 0x00 31. " M0[31] ,Module interrupt status bit clear for module 31 (ARM)" "No effect,Cleared" bitfld.long 0x00 30. " M0[30] ,Module interrupt status bit clear for module 30 (SYSTEM)" "No effect,Cleared" bitfld.long 0x00 29. " M0[29] ,Module interrupt status bit clear for module 29 (TIMER2)" "No effect,Cleared" textline " " bitfld.long 0x00 28. " M0[28] ,Module interrupt status bit clear for module 28 (TIMER1)" "No effect,Cleared" bitfld.long 0x00 27. " M0[27] ,Module interrupt status bit clear for module 27 (TIMER0)" "No effect,Cleared" bitfld.long 0x00 26. " M0[26] ,Module interrupt status bit clear for module 26 (GPIO)" "No effect,Cleared" textline " " bitfld.long 0x00 25. " M0[25] ,Module interrupt status bit clear for module 25 (PWM2)" "No effect,Cleared" bitfld.long 0x00 24. " M0[24] ,Module interrupt status bit clear for module 24 (PWM1)" "No effect,Cleared" bitfld.long 0x00 23. " M0[23] ,Module interrupt status bit clear for module 23 (PWM0)" "No effect,Cleared" textline " " bitfld.long 0x00 22. " M0[22] ,Module interrupt status bit clear for module 22 (SPI0)" "No effect,Cleared" bitfld.long 0x00 21. " M0[21] ,Module interrupt status bit clear for module 21 (HPI)" "No effect,Cleared" bitfld.long 0x00 20. " M0[20] ,Module interrupt status bit clear for module 20 (UART1)" "No effect,Cleared" textline " " bitfld.long 0x00 19. " M0[19] ,Module interrupt status bit clear for module 19 (UART0)" "No effect,Cleared" bitfld.long 0x00 18. " M0[18] ,Module interrupt status bit clear for module 18 (I2C)" "No effect,Cleared" bitfld.long 0x00 17. " M0[17] ,Module interrupt status bit clear for module 17 (TIMER4)" "No effect,Cleared" textline " " bitfld.long 0x00 15. " M0[15] ,Module interrupt status bit clear for module 15 (MMC/SD0)" "No effect,Cleared" bitfld.long 0x00 14. " M0[14] ,Module interrupt status bit clear for module 14 (AEMIF)" "No effect,Cleared" bitfld.long 0x00 13. " M0[13] ,Module interrupt status bit clear for module 13 (DDR EMIF)" "No effect,Cleared" textline " " bitfld.long 0x00 12. " M0[12] ,Module interrupt status bit clear for module 12 (RTO)" "No effect,Cleared" bitfld.long 0x00 11. " M0[11] ,Module interrupt status bit clear for module 11 (SPI2)" "No effect,Cleared" bitfld.long 0x00 10. " M0[10] ,Module interrupt status bit clear for module 10 (PWM3)" "No effect,Cleared" textline " " bitfld.long 0x00 9. " M0[09] ,Module interrupt status bit clear for module 9 (USB)" "No effect,Cleared" bitfld.long 0x00 8. " M0[08] ,Module interrupt status bit clear for module 8 (McBSP)" "No effect,Cleared" bitfld.long 0x00 7. " M0[07] ,Module interrupt status bit clear for module 7 (MMC_SD1)" "No effect,Cleared" textline " " bitfld.long 0x00 6. " M0[06] ,Module interrupt status bit clear for module 6 (SPI1)" "No effect,Cleared" bitfld.long 0x00 5. " M0[05] ,Module interrupt status bit clear for module 5 (TIMER3)" "No effect,Cleared" bitfld.long 0x00 4. " M0[04] ,Module interrupt status bit clear for module 4 (EDMA TC3)" "No effect,Cleared" textline " " bitfld.long 0x00 3. " M0[03] ,Module interrupt status bit clear for module 3 (EDMA TC2)" "No effect,Cleared" bitfld.long 0x00 2. " M0[02] ,Module interrupt status bit clear for module 2 (EDMA TC1)" "No effect,Cleared" bitfld.long 0x00 1. " M0[01] ,Module interrupt status bit clear for module 1 (EDMA TC0)" "No effect,Cleared" textline " " bitfld.long 0x00 0. " M0[00] ,Module interrupt status bit clear for module 0 (EDMA CC)" "No effect,Cleared" line.long 0x04 "MERRCR1,Module Error Clear Register 1 (mod 32 - 51)" bitfld.long 0x04 19. " M1[51] ,Module interrupt status bit clear for module 51 (HDVICP)" "No effect,Cleared" bitfld.long 0x04 18. " M1[50] ,Module interrupt status bit clear for module 50 (MJCP)" "No effect,Cleared" bitfld.long 0x04 15. " M1[47] ,Module interrupt status bit clear for module 47 (VPSS MASTER)" "No effect,Cleared" textline " " bitfld.long 0x04 14. " M1[46] ,Module interrupt status bit clear for module 46 (VDAC CLK)" "No effect,Cleared" bitfld.long 0x04 13. " M1[45] ,Module interrupt status bit clear for module 45 (VDAC CLKRES)" "No effect,Cleared" bitfld.long 0x04 12. " M1[44] ,Module interrupt status bit clear for module 44 (VoiceCodec)" "No effect,Cleared" textline " " bitfld.long 0x04 11. " M1[43] ,Module interrupt status bit clear for module 43 (ADC)" "No effect,Cleared" bitfld.long 0x04 10. " M1[42] ,Module interrupt status bit clear for module 42 (KEYSCAN)" "No effect,Cleared" bitfld.long 0x04 9. " M1[41] ,Module interrupt status bit clear for module 41 (RTC)" "No effect,Cleared" textline " " bitfld.long 0x04 8. " M1[40] ,Module interrupt status bit clear for module 40 (EMAC)" "No effect,Cleared" bitfld.long 0x04 7. " M1[39] ,Module interrupt status bit clear for module 39 (SPI4)" "No effect,Cleared" bitfld.long 0x04 6. " M1[38] ,Module interrupt status bit clear for module 38 (SPI3)" "No effect,Cleared" textline " " bitfld.long 0x04 3. " M1[35] ,Module interrupt status bit clear for module 35 (EMULATION)" "No effect,Cleared" wgroup.long 0x120++0x3 line.long 0x00 "PTCMD,Power Domain Transition Command Register" bitfld.long 0x00 0. " GO ,Power domain GO transition command" "No effect,Evaluate" rgroup.long 0x128++0x3 line.long 0x00 "PTSTAT,Power Domain Transition Status Register" bitfld.long 0x00 0. " GOSTAT ,Power domain transition status" "No transition,In progress" tree "MDSTAT[0-51] Registers" rgroup.long 0x800--0x83f line.long 0x0 "MDSTAT0,Module Status Registers 0 (EDMA CC)" bitfld.long 0x0 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x0 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x0 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x0 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x4 "MDSTAT1,Module Status Registers 1 (EDMA TC0)" bitfld.long 0x4 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x4 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x4 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x4 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x8 "MDSTAT2,Module Status Registers 2 (EDMA TC1)" bitfld.long 0x8 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x8 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x8 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x8 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x8 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x8 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x8 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0xC "MDSTAT3,Module Status Registers 3 (EDMA TC2)" bitfld.long 0xC 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0xC 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0xC 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0xC 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0xC 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0xC 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0xC 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x10 "MDSTAT4,Module Status Registers 4 (EDMA TC3)" bitfld.long 0x10 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x10 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x10 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x10 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x10 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x10 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x10 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x14 "MDSTAT5,Module Status Registers 5 (TIMER3)" bitfld.long 0x14 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x14 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x14 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x14 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x14 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x14 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x14 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x18 "MDSTAT6,Module Status Registers 6 (SPI1)" bitfld.long 0x18 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x18 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x18 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x18 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x18 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x18 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x18 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x1C "MDSTAT7,Module Status Registers 7 (MMC_SD1)" bitfld.long 0x1C 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x1C 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x1C 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x1C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x1C 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x1C 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x1C 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x1C 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x20 "MDSTAT8,Module Status Registers 8 (McBSP)" bitfld.long 0x20 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x20 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x20 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x20 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x20 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x20 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x20 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x20 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x24 "MDSTAT9,Module Status Registers 9 (USB)" bitfld.long 0x24 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x24 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x24 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x24 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x24 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x24 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x24 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x24 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x28 "MDSTAT10,Module Status Registers 10 (PWM3)" bitfld.long 0x28 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x28 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x28 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x28 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x28 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x28 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x28 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x28 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x2C "MDSTAT11,Module Status Registers 11 (SPI2)" bitfld.long 0x2C 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x2C 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x2C 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x2C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x2C 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x2C 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x2C 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x2C 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x30 "MDSTAT12,Module Status Registers 12 (RTO)" bitfld.long 0x30 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x30 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x30 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x30 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x30 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x30 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x30 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x30 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x34 "MDSTAT13,Module Status Registers 13 (DDR EMIF)" bitfld.long 0x34 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x34 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x34 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x34 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x34 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x34 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x34 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x34 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x38 "MDSTAT14,Module Status Registers 14 (AEMIF)" bitfld.long 0x38 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x38 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x38 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x38 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x38 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x38 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x38 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x38 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x3C "MDSTAT15,Module Status Registers 15 (MMC/SD0)" bitfld.long 0x3C 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x3C 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x3C 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x3C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x3C 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x3C 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x3C 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x3C 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" rgroup.long 0x844--0x87f line.long 0x0 "MDSTAT17,Module Status Registers 17 (TIMER4)" bitfld.long 0x0 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x0 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x0 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x0 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x4 "MDSTAT18,Module Status Registers 18 (I2C)" bitfld.long 0x4 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x4 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x4 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x4 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x8 "MDSTAT19,Module Status Registers 19 (UART0)" bitfld.long 0x8 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x8 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x8 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x8 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x8 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x8 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x8 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0xC "MDSTAT20,Module Status Registers 20 (UART1)" bitfld.long 0xC 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0xC 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0xC 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0xC 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0xC 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0xC 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0xC 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x10 "MDSTAT21,Module Status Registers 21 (UHPI)" bitfld.long 0x10 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x10 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x10 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x10 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x10 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x10 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x10 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x14 "MDSTAT22,Module Status Registers 22 (SPI0)" bitfld.long 0x14 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x14 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x14 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x14 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x14 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x14 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x14 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x18 "MDSTAT23,Module Status Registers 23 (PWM0)" bitfld.long 0x18 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x18 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x18 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x18 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x18 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x18 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x18 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x1C "MDSTAT24,Module Status Registers 24 (PWM1)" bitfld.long 0x1C 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x1C 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x1C 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x1C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x1C 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x1C 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x1C 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x1C 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x20 "MDSTAT25,Module Status Registers 25 (PWM2)" bitfld.long 0x20 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x20 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x20 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x20 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x20 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x20 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x20 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x20 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x24 "MDSTAT26,Module Status Registers 26 (GPIO)" bitfld.long 0x24 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x24 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x24 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x24 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x24 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x24 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x24 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x24 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x28 "MDSTAT27,Module Status Registers 27 (TIMER0)" bitfld.long 0x28 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x28 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x28 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x28 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x28 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x28 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x28 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x28 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x2C "MDSTAT28,Module Status Registers 28 (TIMER1)" bitfld.long 0x2C 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x2C 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x2C 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x2C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x2C 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x2C 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x2C 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x2C 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x30 "MDSTAT29,Module Status Registers 29 (TIMER2)" bitfld.long 0x30 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x30 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x30 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x30 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x30 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x30 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x30 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x30 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x34 "MDSTAT30,Module Status Registers 30 (SYSTEM)" bitfld.long 0x34 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x34 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x34 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x34 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x34 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x34 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x34 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x34 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x38 "MDSTAT31,Module Status Registers 31 (ARM)" bitfld.long 0x38 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x38 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x38 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x38 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x38 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x38 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x38 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x38 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" rgroup.long 0x88c++0x03 line.long 0x00 "MDSTAT35,Module Status Registers 35 (EMULATION)" bitfld.long 0x00 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x00 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x00 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x00 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x00 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x00 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x00 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x00 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" rgroup.long 0x898--0x8bf line.long 0x0 "MDSTAT38,Module Status Registers 38 (SPI3)" bitfld.long 0x0 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x0 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x0 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x0 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x4 "MDSTAT39,Module Status Registers 39 (SPI4)" bitfld.long 0x4 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x4 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x4 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x4 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x8 "MDSTAT40,Module Status Registers 40 (EMAC)" bitfld.long 0x8 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x8 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x8 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x8 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x8 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x8 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x8 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0xC "MDSTAT41,Module Status Registers 41 (RTC)" bitfld.long 0xC 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0xC 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0xC 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0xC 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0xC 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0xC 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0xC 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x10 "MDSTAT42,Module Status Registers 42 (KEYSCAN)" bitfld.long 0x10 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x10 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x10 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x10 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x10 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x10 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x10 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x14 "MDSTAT43,Module Status Registers 43 (ADC)" bitfld.long 0x14 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x14 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x14 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x14 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x14 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x14 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x14 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x18 "MDSTAT44,Module Status Registers 44 (VoiceCodec)" bitfld.long 0x18 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x18 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x18 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x18 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x18 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x18 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x18 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x1C "MDSTAT45,Module Status Registers 45 (VDAC CLKRES)" bitfld.long 0x1C 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x1C 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x1C 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x1C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x1C 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x1C 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x1C 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x1C 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x20 "MDSTAT46,Module Status Registers 46 (VDAC CLK)" bitfld.long 0x20 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x20 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x20 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x20 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x20 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x20 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x20 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x20 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x24 "MDSTAT47,Module Status Registers 47 (VPSS MASTER)" bitfld.long 0x24 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x24 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x24 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x24 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x24 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x24 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x24 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x24 0.--5. " STATE ,Module state status: indicates current module status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" rgroup.long 0x8d0++0x07 line.long 0x0 "MDSTAT50,Module Status Registers 50 (MJCP)" bitfld.long 0x0 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x0 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x0 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x0 0.--5. " STATE ,Module state status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" line.long 0x4 "MDSTAT51,Module Status Registers 51 (HDVICP)" bitfld.long 0x4 17. " EMUIHB ,Emulation alters modules state interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation alters module reset interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status. Shows status of module clock ON / OFF" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Reset,No reset" bitfld.long 0x4 9. " LRSTDONE ,Module local reset initialization done status" "Not done,Done" textline " " bitfld.long 0x4 8. " LRST ,Module local reset actual status" "Reset,No reset" bitfld.long 0x4 0.--5. " STATE ,Module state status" "SwResetDisable,SyncReset,Disabled,Enabled,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition,Transition" tree.end tree "MDCTL[0-51] Registers" group.long 0xa00--0xa3f line.long 0x0 "MDCTL0,Module Control Registers 0 (EDMA CC)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL1,Module Control Registers 1 (EDMA TC0)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x8 "MDCTL2,Module Control Registers 2 (EDMA TC1)" bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x8 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x8 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0xC "MDCTL3,Module Control Registers 3 (EDMA TC2)" bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0xC 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0xC 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x10 "MDCTL4,Module Control Registers 4 (EDMA TC3)" bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x10 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x10 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x14 "MDCTL5,Module Control Registers 5 (TIMER3)" bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x14 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x14 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x18 "MDCTL6,Module Control Registers 6 (SPI1)" bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x18 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x18 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x1C "MDCTL7,Module Control Registers 7 (MMC_SD1)" bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x1C 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x1C 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x20 "MDCTL8,Module Control Registers 8 (McBSP)" bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x20 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x20 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x24 "MDCTL9,Module Control Registers 9 (USB)" bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x24 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x24 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x28 "MDCTL10,Module Control Registers 10 (PWM3)" bitfld.long 0x28 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x28 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x28 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x28 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x2C "MDCTL11,Module Control Registers 11 (SPI2)" bitfld.long 0x2C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x2C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x2C 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x2C 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x30 "MDCTL12,Module Control Registers 12 (RTO)" bitfld.long 0x30 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x30 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x30 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x30 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x34 "MDCTL13,Module Control Registers 13 (DDR EMIF)" bitfld.long 0x34 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x34 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x34 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x34 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x38 "MDCTL14,Module Control Registers 14 (AEMIF)" bitfld.long 0x38 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x38 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x38 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x38 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x3C "MDCTL15,Module Control Registers 15 (MMC/SD0)" bitfld.long 0x3C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x3C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x3C 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x3C 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." group.long 0xa44--0xa7f line.long 0x0 "MDCTL17,Module Control Registers 17 (TIMER4)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL18,Module Control Registers 18 (I2C)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x8 "MDCTL19,Module Control Registers 19 (UART0)" bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x8 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x8 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0xC "MDCTL20,Module Control Registers 20 (UART1)" bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0xC 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0xC 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x10 "MDCTL21,Module Control Registers 21 (UHPI)" bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x10 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x10 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x14 "MDCTL22,Module Control Registers 22 (SPI0)" bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x14 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x14 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x18 "MDCTL23,Module Control Registers 23 (PWM0)" bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x18 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x18 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x1C "MDCTL24,Module Control Registers 24 (PWM1)" bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x1C 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x1C 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x20 "MDCTL25,Module Control Registers 25 (PWM2)" bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x20 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x20 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x24 "MDCTL26,Module Control Registers 26 (GPIO)" bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x24 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x24 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x28 "MDCTL27,Module Control Registers 27 (TIMER0)" bitfld.long 0x28 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x28 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x28 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x28 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x2C "MDCTL28,Module Control Registers 28 (TIMER1)" bitfld.long 0x2C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x2C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x2C 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x2C 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x30 "MDCTL29,Module Control Registers 29 (TIMER2)" bitfld.long 0x30 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x30 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x30 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x30 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x34 "MDCTL30,Module Control Registers 30 (SYSTEM)" bitfld.long 0x34 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x34 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x34 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x34 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x38 "MDCTL31,Module Control Registers 31 (ARM)" bitfld.long 0x38 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x38 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x38 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x38 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." group.long 0xa8c++0x03 line.long 0x00 "MDCTL35,Module Control Registers 35 (EMULATION)" bitfld.long 0x00 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x00 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x00 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x00 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." group.long 0xa98--0xabf line.long 0x0 "MDCTL38,Module Control Registers 38 (SPI3)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL39,Module Control Registers 39 (SPI4)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x8 "MDCTL40,Module Control Registers 40 (EMAC)" bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x8 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x8 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0xC "MDCTL41,Module Control Registers 41 (RTC)" bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0xC 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0xC 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x10 "MDCTL42,Module Control Registers 42 (KEYSCAN)" bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x10 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x10 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x14 "MDCTL43,Module Control Registers 43 (ADC)" bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x14 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x14 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x18 "MDCTL44,Module Control Registers 44 (VoiceCodec)" bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x18 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x18 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x1C "MDCTL45,Module Control Registers 45 (VDAC CLKRES)" bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x1C 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x1C 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x20 "MDCTL46,Module Control Registers 46 (VDAC CLK)" bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x20 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x20 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x24 "MDCTL47,Module Control Registers 47 (VPSS MASTER)" bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x24 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x24 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." group.long 0xad0++0x07 line.long 0x0 "MDCTL50,Module Control Registers 50 (MJCP)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL51,Module Control Registers 51 (HDVICP)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 8. " LRST ,Module local reset control" "Reset,No reset" textline " " bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwResetDisable,SyncReset,Disabled,Enabled,?..." tree.end width 0xb tree.end tree "INTC (Interrupt Controller)" base asd:0x01C48000 width 10. group.long 0x00++0x0f line.long 0x00 "FIQ0,Fast Interrupt Request Status Register 0" bitfld.long 0x00 31. " FIQ[31] ,Interrupt status of INT 31 (SDIO1INT)" "No interrupt,Interrupt" bitfld.long 0x00 30. " FIQ[30] ,Interrupt status of INT 30 (AEMIFINT/HINT)" "No interrupt,Interrupt" bitfld.long 0x00 29. " FIQ[29] ,Interrupt status of INT 29 (DDRINT/RTCINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 28. " FIQ[28] ,Interrupt status of INT 28 (PWM3INT/TINT9)" "No interrupt,Interrupt" bitfld.long 0x00 27. " FIQ[27] ,Interrupt status of INT 27 (MMC1INT)" "No interrupt,Interrupt" bitfld.long 0x00 26. " FIQ[26] ,Interrupt status of INT 26 (RINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 25. " FIQ[25] ,Interrupt status of INT 25 (RINT)" "No interrupt,Interrupt" bitfld.long 0x00 24. " FIQ[24] ,Interrupt status of INT 24 (XINT/VCINT)" "No interrupt,Interrupt" bitfld.long 0x00 23. " FIQ[23] ,Interrupt status of INT 23 (SDIO0INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " FIQ[22] ,Interrupt status of INT 22 (TINT7)" "No interrupt,Interrupt" bitfld.long 0x00 21. " FIQ[21] ,Interrupt status of INT 21 (SPI2INT1)" "No interrupt,Interrupt" bitfld.long 0x00 20. " FIQ[20] ,Interrupt status of INT 20 (PSCINT/TVINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " FIQ[19] ,Interrupt status of INT 19 (SPI2INT0/EDMA TC1_ERRINT)" "No interrupt,Interrupt" bitfld.long 0x00 18. " FIQ[18] ,Interrupt status of INT 18 (SPI1INT1/EDMA TC0_ERRINT)" "No interrupt,Interrupt" bitfld.long 0x00 17. " FIQ[17] ,Interrupt status of INT 17 (SPI1INT0/CCERRINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " FIQ[16] ,Interrupt status of INT 16 (EDMA CC_INT0)" "No interrupt,Interrupt" bitfld.long 0x00 15. " FIQ[15] ,Interrupt status of INT 15 (TINT6)" "No interrupt,Interrupt" bitfld.long 0x00 14. " FIQ[14] ,Interrupt status of INT 14 (TINT5)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " FIQ[13] ,Interrupt status of INT 13 (RTOINT/TINT4)" "No interrupt,Interrupt" bitfld.long 0x00 12. " FIQ[12] ,Interrupt status of INT 12 (USBINT)" "No interrupt,Interrupt" bitfld.long 0x00 11. " FIQ[11] ,Interrupt status of INT 11 (MJCPINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " FIQ[10] ,Interrupt status of INT 10 (IMX0INT/HDVICP_ARMINT)" "No interrupt,Interrupt" bitfld.long 0x00 9. " FIQ[09] ,Interrupt status of INT 9 (SEQINT)" "No interrupt,Interrupt" bitfld.long 0x00 8. " FIQ[08] ,Interrupt status of INT 8 (VPSSINT8/IMX1INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " FIQ[07] ,Interrupt status of INT 7 (VPSSINT7/NSFINT)" "No interrupt,Interrupt" bitfld.long 0x00 6. " FIQ[06] ,Interrupt status of INT 6 (VPSSINT6)" "No interrupt,Interrupt" bitfld.long 0x00 5. " FIQ[05] ,Interrupt status of INT 5 (VPSSINT5)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " FIQ[04] ,Interrupt status of INT 4 (VPSSINT4)" "No interrupt,Interrupt" bitfld.long 0x00 3. " FIQ[03] ,Interrupt status of INT 3 (VPSSINT3)" "No interrupt,Interrupt" bitfld.long 0x00 2. " FIQ[02] ,Interrupt status of INT 2 (VPSSINT2)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " FIQ[01] ,Interrupt status of INT 1 (VPSSINT1)" "No interrupt,Interrupt" bitfld.long 0x00 0. " FIQ[00] ,Interrupt status of INT 0 (VPSSINT0)" "No interrupt,Interrupt" line.long 0x04 "FIQ1,Fast Interrupt Request Status Register 1" bitfld.long 0x04 31. " FIQ[63] ,Interrupt status of INT 63 (EMUINT)" "No interrupt,Interrupt" bitfld.long 0x04 30. " FIQ[62] ,Interrupt status of INT 62 (COMMRX/EDMA TC3_ERRINT)" "No interrupt,Interrupt" bitfld.long 0x04 29. " FIQ[61] ,Interrupt status of INT 61 (COMMTX/EDMA TC2_ERRINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " FIQ[60] ,Interrupt status of INT 60 (KEYINT)" "No interrupt,Interrupt" bitfld.long 0x04 27. " FIQ[59] ,Interrupt status of INT 59 (GIO15/ADCINT)" "No interrupt,Interrupt" bitfld.long 0x04 26. " FIQ[58] ,Interrupt status of INT 58 (GIO14/PWRGIO2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " FIQ[57] ,Interrupt status of INT 57 (GIO13/PWRGIO1)" "No interrupt,Interrupt" bitfld.long 0x04 24. " FIQ[56] ,Interrupt status of INT 56 (GIO12/PWRGIO0)" "No interrupt,Interrupt" bitfld.long 0x04 23. " FIQ[55] ,Interrupt status of INT 55 (GIO11/EMACMISCPULSE)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " FIQ[54] ,Interrupt status of INT 54 (GIO10/EMACTXPULSE)" "No interrupt,Interrupt" bitfld.long 0x04 21. " FIQ[53] ,Interrupt status of INT 53 (GIO9/EMACRXPULSE)" "No interrupt,Interrupt" bitfld.long 0x04 20. " FIQ[52] ,Interrupt status of INT 52 (GIO8/EMACRXTHREESH)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " FIQ[51] ,Interrupt status of INT 51 (GIO7)" "No interrupt,Interrupt" bitfld.long 0x04 18. " FIQ[50] ,Interrupt status of INT 50 (GIO6)" "No interrupt,Interrupt" bitfld.long 0x04 17. " FIQ[49] ,Interrupt status of INT 49 (GIO5)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " FIQ[48] ,Interrupt status of INT 48 (GIO4)" "No interrupt,Interrupt" bitfld.long 0x04 15. " FIQ[47] ,Interrupt status of INT 47 (GIO3)" "No interrupt,Interrupt" bitfld.long 0x04 14. " FIQ[46] ,Interrupt status of INT 46 (GIO2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " FIQ[45] ,Interrupt status of INT 45 (GIO1)" "No interrupt,Interrupt" bitfld.long 0x04 12. " FIQ[44] ,Interrupt status of INT 44 (GIO0)" "No interrupt,Interrupt" bitfld.long 0x04 11. " FIQ[43] ,Interrupt status of INT 43 (SPI0INT1/SPI3INT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " FIQ[42] ,Interrupt status of INT 42 (SPI0INT0)" "No interrupt,Interrupt" bitfld.long 0x04 9. " FIQ[41] ,Interrupt status of INT 41 (UART1INT)" "No interrupt,Interrupt" bitfld.long 0x04 8. " FIQ[40] ,Interrupt status of INT 40 (UART0INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " FIQ[39] ,Interrupt status of INT 39 (I2CINT)" "No interrupt,Interrupt" bitfld.long 0x04 6. " FIQ[38] ,Interrupt status of INT 38 (PWM2INT/TINT8)" "No interrupt,Interrupt" bitfld.long 0x04 5. " FIQ[37] ,Interrupt status of INT 37 (PWM1INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " FIQ[36] ,Interrupt status of INT 36 (PWM0INT)" "No interrupt,Interrupt" bitfld.long 0x04 3. " FIQ[35] ,Interrupt status of INT 35 (TINT3)" "No interrupt,Interrupt" bitfld.long 0x04 2. " FIQ[34] ,Interrupt status of INT 34 (TINT2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " FIQ[33] ,Interrupt status of INT 33 (TINT1)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FIQ[32] ,Interrupt status of INT 32 (TINT0)" "No interrupt,Interrupt" line.long 0x08 "IRQ0,Interrupt Request Status Register 0" bitfld.long 0x08 31. " IRQ[31] ,Interrupt status of INT 31 (SDIO1INT)" "No interrupt,Interrupt" bitfld.long 0x08 30. " IRQ[30] ,Interrupt status of INT 30 (AEMIFINT/HINT)" "No interrupt,Interrupt" bitfld.long 0x08 29. " IRQ[29] ,Interrupt status of INT 29 (DDRINT/RTCINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 28. " IRQ[28] ,Interrupt status of INT 28 (PWM3INT/TINT9)" "No interrupt,Interrupt" bitfld.long 0x08 27. " IRQ[27] ,Interrupt status of INT 27 (MMC1INT)" "No interrupt,Interrupt" bitfld.long 0x08 26. " IRQ[26] ,Interrupt status of INT 26 (RINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 25. " IRQ[25] ,Interrupt status of INT 25 (RINT)" "No interrupt,Interrupt" bitfld.long 0x08 24. " IRQ[24] ,Interrupt status of INT 24 (XINT/VCINT)" "No interrupt,Interrupt" bitfld.long 0x08 23. " IRQ[23] ,Interrupt status of INT 23 (SDIO0INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 22. " IRQ[22] ,Interrupt status of INT 22 (TINT7)" "No interrupt,Interrupt" bitfld.long 0x08 21. " IRQ[21] ,Interrupt status of INT 21 (SPI2INT1)" "No interrupt,Interrupt" bitfld.long 0x08 20. " IRQ[20] ,Interrupt status of INT 20 (PSCINT/TVINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 19. " IRQ[19] ,Interrupt status of INT 19 (SPI2INT0/EDMA TC1_ERRINT)" "No interrupt,Interrupt" bitfld.long 0x08 18. " IRQ[18] ,Interrupt status of INT 18 (SPI1INT1/EDMA TC0_ERRINT)" "No interrupt,Interrupt" bitfld.long 0x08 17. " IRQ[17] ,Interrupt status of INT 17 (SPI1INT0/CCERRINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " IRQ[16] ,Interrupt status of INT 16 (EDMA CC_INT0)" "No interrupt,Interrupt" bitfld.long 0x08 15. " IRQ[15] ,Interrupt status of INT 15 (TINT6)" "No interrupt,Interrupt" bitfld.long 0x08 14. " IRQ[14] ,Interrupt status of INT 14 (TINT5)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 13. " IRQ[13] ,Interrupt status of INT 13 (RTOINT/TINT4)" "No interrupt,Interrupt" bitfld.long 0x08 12. " IRQ[12] ,Interrupt status of INT 12 (USBINT)" "No interrupt,Interrupt" bitfld.long 0x08 11. " IRQ[11] ,Interrupt status of INT 11 (MJCPINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " IRQ[10] ,Interrupt status of INT 10 (IMX0INT/HDVICP_ARMINT)" "No interrupt,Interrupt" bitfld.long 0x08 9. " IRQ[09] ,Interrupt status of INT 9 (SEQINT)" "No interrupt,Interrupt" bitfld.long 0x08 8. " IRQ[08] ,Interrupt status of INT 8 (VPSSINT8/IMX1INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 7. " IRQ[07] ,Interrupt status of INT 7 (VPSSINT7/NSFINT)" "No interrupt,Interrupt" bitfld.long 0x08 6. " IRQ[06] ,Interrupt status of INT 6 (VPSSINT6)" "No interrupt,Interrupt" bitfld.long 0x08 5. " IRQ[05] ,Interrupt status of INT 5 (VPSSINT5)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " IRQ[04] ,Interrupt status of INT 4 (VPSSINT4)" "No interrupt,Interrupt" bitfld.long 0x08 3. " IRQ[03] ,Interrupt status of INT 3 (VPSSINT3)" "No interrupt,Interrupt" bitfld.long 0x08 2. " IRQ[02] ,Interrupt status of INT 2 (VPSSINT2)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 1. " IRQ[01] ,Interrupt status of INT 1 (VPSSINT1)" "No interrupt,Interrupt" bitfld.long 0x08 0. " IRQ[00] ,Interrupt status of INT 0 (VPSSINT0)" "No interrupt,Interrupt" line.long 0x0c "IRQ1,Interrupt Request Status Register 1" bitfld.long 0x0c 31. " IRQ[63] ,Interrupt status of INT 63 (EMUINT)" "No interrupt,Interrupt" bitfld.long 0x0c 30. " IRQ[62] ,Interrupt status of INT 62 (COMMRX/EDMA TC3_ERRINT)" "No interrupt,Interrupt" bitfld.long 0x0c 29. " IRQ[61] ,Interrupt status of INT 61 (COMMTX/EDMA TC2_ERRINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 28. " IRQ[60] ,Interrupt status of INT 60 (KEYINT)" "No interrupt,Interrupt" bitfld.long 0x0c 27. " IRQ[59] ,Interrupt status of INT 59 (GIO15/ADCINT)" "No interrupt,Interrupt" bitfld.long 0x0c 26. " IRQ[58] ,Interrupt status of INT 58 (GIO14/PWRGIO2)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 25. " IRQ[57] ,Interrupt status of INT 57 (GIO13/PWRGIO1)" "No interrupt,Interrupt" bitfld.long 0x0c 24. " IRQ[56] ,Interrupt status of INT 56 (GIO12/PWRGIO0)" "No interrupt,Interrupt" bitfld.long 0x0c 23. " IRQ[55] ,Interrupt status of INT 55 (GIO11/EMACMISCPULSE)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 22. " IRQ[54] ,Interrupt status of INT 54 (GIO10/EMACTXPULSE)" "No interrupt,Interrupt" bitfld.long 0x0c 21. " IRQ[53] ,Interrupt status of INT 53 (GIO9/EMACRXPULSE)" "No interrupt,Interrupt" bitfld.long 0x0c 20. " IRQ[52] ,Interrupt status of INT 52 (GIO8/EMACRXTHREESH)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 19. " IRQ[51] ,Interrupt status of INT 51 (GIO7)" "No interrupt,Interrupt" bitfld.long 0x0c 18. " IRQ[50] ,Interrupt status of INT 50 (GIO6)" "No interrupt,Interrupt" bitfld.long 0x0c 17. " IRQ[49] ,Interrupt status of INT 49 (GIO5)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 16. " IRQ[48] ,Interrupt status of INT 48 (GIO4)" "No interrupt,Interrupt" bitfld.long 0x0c 15. " IRQ[47] ,Interrupt status of INT 47 (GIO3)" "No interrupt,Interrupt" bitfld.long 0x0c 14. " IRQ[46] ,Interrupt status of INT 46 (GIO2)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 13. " IRQ[45] ,Interrupt status of INT 45 (GIO1)" "No interrupt,Interrupt" bitfld.long 0x0c 12. " IRQ[44] ,Interrupt status of INT 44 (GIO0)" "No interrupt,Interrupt" bitfld.long 0x0c 11. " IRQ[43] ,Interrupt status of INT 43 (SPI0INT1/SPI3INT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 10. " IRQ[42] ,Interrupt status of INT 42 (SPI0INT0)" "No interrupt,Interrupt" bitfld.long 0x0c 9. " IRQ[41] ,Interrupt status of INT 41 (UART1INT)" "No interrupt,Interrupt" bitfld.long 0x0c 8. " IRQ[40] ,Interrupt status of INT 40 (UART0INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 7. " IRQ[39] ,Interrupt status of INT 39 (I2CINT)" "No interrupt,Interrupt" bitfld.long 0x0c 6. " IRQ[38] ,Interrupt status of INT 38 (PWM2INT/TINT8)" "No interrupt,Interrupt" bitfld.long 0x0c 5. " IRQ[37] ,Interrupt status of INT 37 (PWM1INT)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 4. " IRQ[36] ,Interrupt status of INT 36 (PWM0INT)" "No interrupt,Interrupt" bitfld.long 0x0c 3. " IRQ[35] ,Interrupt status of INT 35 (TINT3)" "No interrupt,Interrupt" bitfld.long 0x0c 2. " IRQ[34] ,Interrupt status of INT 34 (TINT2)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 1. " IRQ[33] ,Interrupt status of INT 33 (TINT1)" "No interrupt,Interrupt" bitfld.long 0x0c 0. " IRQ[32] ,Interrupt status of INT 32 (TINT0)" "No interrupt,Interrupt" rgroup.long 0x10++0x07 line.long 0x00 "FIQENTRY,Fast Interrupt Request Entry Address Register" line.long 0x04 "IRQENTRY,Interrupt Request Entry Address Register" group.long 0x18++0x0f line.long 0x00 "EINT0,Interrupt Enable Register 0" bitfld.long 0x00 31. " EINT[31] ,Interrupt enable of INT 31 (SDIO1INT)" "Disabled,Enabled" bitfld.long 0x00 30. " EINT[30] ,Interrupt enable of INT 30 (AEMIFINT/HINT)" "Disabled,Enabled" bitfld.long 0x00 29. " EINT[29] ,Interrupt enable of INT 29 (DDRINT/RTCINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " EINT[28] ,Interrupt enable of INT 28 (PWM3INT/TINT9)" "Disabled,Enabled" bitfld.long 0x00 27. " EINT[27] ,Interrupt enable of INT 27 (MMC1INT)" "Disabled,Enabled" bitfld.long 0x00 26. " EINT[26] ,Interrupt enable of INT 26 (RINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " EINT[25] ,Interrupt enable of INT 25 (RINT)" "Disabled,Enabled" bitfld.long 0x00 24. " EINT[24] ,Interrupt enable of INT 24 (XINT/VCINT)" "Disabled,Enabled" bitfld.long 0x00 23. " EINT[23] ,Interrupt enable of INT 23 (SDIO0INT)" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " EINT[22] ,Interrupt enable of INT 22 (TINT7)" "Disabled,Enabled" bitfld.long 0x00 21. " EINT[21] ,Interrupt enable of INT 21 (SPI2INT1)" "Disabled,Enabled" bitfld.long 0x00 20. " EINT[20] ,Interrupt enable of INT 20 (PSCINT/TVINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " EINT[19] ,Interrupt enable of INT 19 (SPI2INT0/EDMA TC1_ERRINT)" "Disabled,Enabled" bitfld.long 0x00 18. " EINT[18] ,Interrupt enable of INT 18 (SPI1INT1/EDMA TC0_ERRINT)" "Disabled,Enabled" bitfld.long 0x00 17. " EINT[17] ,Interrupt enable of INT 17 (SPI1INT0/CCERRINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " EINT[16] ,Interrupt enable of INT 16 (EDMA CC_INT0)" "Disabled,Enabled" bitfld.long 0x00 15. " EINT[15] ,Interrupt enable of INT 15 (TINT6)" "Disabled,Enabled" bitfld.long 0x00 14. " EINT[14] ,Interrupt enable of INT 14 (TINT5)" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " EINT[13] ,Interrupt enable of INT 13 (RTOINT/TINT4)" "Disabled,Enabled" bitfld.long 0x00 12. " EINT[12] ,Interrupt enable of INT 12 (USBINT)" "Disabled,Enabled" bitfld.long 0x00 11. " EINT[11] ,Interrupt enable of INT 11 (MJCPINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " EINT[10] ,Interrupt enable of INT 10 (IMX0INT/HDVICP_ARMINT)" "Disabled,Enabled" bitfld.long 0x00 9. " EINT[09] ,Interrupt enable of INT 9 (SEQINT)" "Disabled,Enabled" bitfld.long 0x00 8. " EINT[08] ,Interrupt enable of INT 8 (VPSSINT8/IMX1INT)" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EINT[07] ,Interrupt enable of INT 7 (VPSSINT7/NSFINT)" "Disabled,Enabled" bitfld.long 0x00 6. " EINT[06] ,Interrupt enable of INT 6 (VPSSINT6)" "Disabled,Enabled" bitfld.long 0x00 5. " EINT[05] ,Interrupt enable of INT 5 (VPSSINT5)" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EINT[04] ,Interrupt enable of INT 4 (VPSSINT4)" "Disabled,Enabled" bitfld.long 0x00 3. " EINT[03] ,Interrupt enable of INT 3 (VPSSINT3)" "Disabled,Enabled" bitfld.long 0x00 2. " EINT[02] ,Interrupt enable of INT 2 (VPSSINT2)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EINT[01] ,Interrupt enable of INT 1 (VPSSINT1)" "Disabled,Enabled" bitfld.long 0x00 0. " EINT[00] ,Interrupt enable of INT 0 (VPSSINT0)" "Disabled,Enabled" line.long 0x04 "EINT1,Interrupt Enable Register 1" bitfld.long 0x04 31. " EINT[63] ,Interrupt enable of INT 63 (EMUINT)" "Disabled,Enabled" bitfld.long 0x04 30. " EINT[62] ,Interrupt enable of INT 62 (COMMRX/EDMA TC3_ERRINT)" "Disabled,Enabled" bitfld.long 0x04 29. " EINT[61] ,Interrupt enable of INT 61 (COMMTX/EDMA TC2_ERRINT)" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " EINT[60] ,Interrupt enable of INT 60 (KEYINT)" "Disabled,Enabled" bitfld.long 0x04 27. " EINT[59] ,Interrupt enable of INT 59 (GIO15/ADCINT)" "Disabled,Enabled" bitfld.long 0x04 26. " EINT[58] ,Interrupt enable of INT 58 (GIO14/PWRGIO2)" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " EINT[57] ,Interrupt enable of INT 57 (GIO13/PWRGIO1)" "Disabled,Enabled" bitfld.long 0x04 24. " EINT[56] ,Interrupt enable of INT 56 (GIO12/PWRGIO0)" "Disabled,Enabled" bitfld.long 0x04 23. " EINT[55] ,Interrupt enable of INT 55 (GIO11/EMACMISCPULSE)" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " EINT[54] ,Interrupt enable of INT 54 (GIO10/EMACTXPULSE)" "Disabled,Enabled" bitfld.long 0x04 21. " EINT[53] ,Interrupt enable of INT 53 (GIO9/EMACRXPULSE)" "Disabled,Enabled" bitfld.long 0x04 20. " EINT[52] ,Interrupt enable of INT 52 (GIO8/EMACRXTHREESH)" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " EINT[51] ,Interrupt enable of INT 51 (GIO7)" "Disabled,Enabled" bitfld.long 0x04 18. " EINT[50] ,Interrupt enable of INT 50 (GIO6)" "Disabled,Enabled" bitfld.long 0x04 17. " EINT[49] ,Interrupt enable of INT 49 (GIO5)" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " EINT[48] ,Interrupt enable of INT 48 (GIO4)" "Disabled,Enabled" bitfld.long 0x04 15. " EINT[47] ,Interrupt enable of INT 47 (GIO3)" "Disabled,Enabled" bitfld.long 0x04 14. " EINT[46] ,Interrupt enable of INT 46 (GIO2)" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " EINT[45] ,Interrupt enable of INT 45 (GIO1)" "Disabled,Enabled" bitfld.long 0x04 12. " EINT[44] ,Interrupt enable of INT 44 (GIO0)" "Disabled,Enabled" bitfld.long 0x04 11. " EINT[43] ,Interrupt enable of INT 43 (SPI0INT1/SPI3INT0)" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " EINT[42] ,Interrupt enable of INT 42 (SPI0INT0)" "Disabled,Enabled" bitfld.long 0x04 9. " EINT[41] ,Interrupt enable of INT 41 (UART1INT)" "Disabled,Enabled" bitfld.long 0x04 8. " EINT[40] ,Interrupt enable of INT 40 (UART0INT)" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " EINT[39] ,Interrupt enable of INT 39 (I2CINT)" "Disabled,Enabled" bitfld.long 0x04 6. " EINT[38] ,Interrupt enable of INT 38 (PWM2INT/TINT8)" "Disabled,Enabled" bitfld.long 0x04 5. " EINT[37] ,Interrupt enable of INT 37 (PWM1INT)" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EINT[36] ,Interrupt enable of INT 36 (PWM0INT)" "Disabled,Enabled" bitfld.long 0x04 3. " EINT[35] ,Interrupt enable of INT 35 (TINT3)" "Disabled,Enabled" bitfld.long 0x04 2. " EINT[34] ,Interrupt enable of INT 34 (TINT2)" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EINT[33] ,Interrupt enable of INT 33 (TINT1)" "Disabled,Enabled" bitfld.long 0x04 0. " EINT[32] ,Interrupt enable of INT 32 (TINT0)" "Disabled,Enabled" line.long 0x08 "INTCTL,Interrupt Operation Control Register" bitfld.long 0x08 2. " IDMODE ,Interrupt disable mode" "Immediately,After acknowledgement" bitfld.long 0x08 1. " IERAW ,Masked interrupt reflect in the IRQENTRY register" "Disabled,Enabled" bitfld.long 0x08 0. " FERAW ,Masked interrupt reflect in the FIQENTRY register" "Disabled,Enabled" line.long 0x0c "EABASE,Interrupt Entry Table Base Address Register" hexmask.long 0x0C 3.--28. 0x08 " EABASE ,Interrupt entry table base address" bitfld.long 0x0C 0.--1. " SIZE ,Size of each entry in the interrupt entry table (byte)" "4,8,16,32" group.long 0x30++0x1f line.long 0x00 "INTPRI0,Interrupt Priority Register 0" bitfld.long 0x00 28.--30. " INT7 ,Selects INT7 (VPSSINT7/NSFINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " INT6 ,Selects INT6 (VPSSINT6) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " INT5 ,Selects INT5 (VPSSINT5) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " INT4 ,Selects INT4 (VPSSINT4) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 12.--14. " INT3 ,Selects INT3 (VPSSINT3) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " INT2 ,Selects INT2 (VPSSINT2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " INT1 ,Selects INT1 (VPSSINT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " INT0 ,Selects INT0 (VPSSINT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x04 "INTPRI1,Interrupt Priority Register 1" bitfld.long 0x04 28.--30. " INT15 ,Selects INT15 (TINT6) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. " INT14 ,Selects INT14 (TINT5) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " INT13 ,Selects INT13 (RTOINT/TINT4) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. " INT12 ,Selects INT12 (USBINT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 12.--14. " INT11 ,Selects INT11 (MJCPINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " INT10 ,Selects INT10 (IMX0INT/HDVICP_ARMINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " INT9 ,Selects INT9 (SEQINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " INT8 ,Selects INT8 (VPSSINT8/IMX1INT) priority level" "0,1,2,3,4,5,6,7" line.long 0x08 "INTPRI2,Interrupt Priority Register 2" bitfld.long 0x08 28.--30. " INT23 ,Selects INT23 (SDIO0INT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " INT22 ,Selects INT22 (TINT7) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " INT21 ,Selects INT21 (PI2INT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 16.--18. " INT20 ,Selects INT20 (PSCINT/TVINT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 12.--14. " INT19 ,Selects INT19 (SPI2INT0/EDMA TC1_ERRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " INT18 ,Selects INT18 (SPI1INT1/EDMA TC0_ERRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. " INT17 ,Selects INT17 (SPI1INT0/CCERRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " INT16 ,Selects INT16 (EDMA CC_INT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x0c "INTPRI3,Interrupt Priority Register 3" bitfld.long 0x0c 28.--30. " INT31 ,Selects INT31 (SDIO1INT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 24.--26. " INT30 ,Selects INT30 (AEMIFINT/HINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 20.--22. " INT29 ,Selects INT29 (DDRINT/RTCINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 16.--18. " INT28 ,Selects INT28 (PWM3INT/TINT9) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0c 12.--14. " INT27 ,Selects INT27 (MMC1INT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 8.--10. " INT26 ,Selects INT26 (MMC0INT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 4.--6. " INT25 ,Selects INT25 (RINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 0.--2. " INT24 ,Selects INT24 (XINT/VCINT) priority level" "0,1,2,3,4,5,6,7" line.long 0x10 "INTPRI4,Interrupt Priority Register 4" bitfld.long 0x10 28.--30. " INT39 ,Selects INT39 (I2CINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. " INT38 ,Selects INT38 (PWM2INT/TINT8) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 20.--22. " INT37 ,Selects INT37 (PWM1INT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. " INT36 ,Selects INT36 (PWM0INT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 12.--14. " INT35 ,Selects INT35 (TINT3) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. " INT34 ,Selects INT34 (TINT2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 4.--6. " INT33 ,Selects INT33 (TINT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " INT32 ,Selects INT32 (TINT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x14 "INTPRI5,Interrupt Priority Register 5" bitfld.long 0x14 28.--30. " INT47 ,Selects INT47 (GIO3) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 24.--26. " INT46 ,Selects INT46 (GIO2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 20.--22. " INT45 ,Selects INT45 (GIO1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 16.--18. " INT44 ,Selects INT44 (GIO0) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 12.--14. " INT43 ,Selects INT43 (SPI0INT1/SPI3INT0) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. " INT42 ,Selects INT42 (SPI0INT0) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--6. " INT41 ,Selects INT41 (UART1INT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. " INT40 ,Selects INT40 (UART0INT) priority level" "0,1,2,3,4,5,6,7" line.long 0x18 "INTPRI6,Interrupt Priority Register 6" bitfld.long 0x18 28.--30. " INT55 ,Selects INT55 (GIO11/EMACMISCPULSE) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--26. " INT54 ,Selects INT54 (GIO10/EMACTXPULSE) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 20.--22. " INT53 ,Selects INT53 (GIO9/EMACRXPULSE) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. " INT52 ,Selects INT52 (GIO8/EMACRXTHREESH) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 12.--14. " INT51 ,Selects INT51 (GIO7) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 8.--10. " INT50 ,Selects INT50 (GIO6) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 4.--6. " INT49 ,Selects INT49 (GIO5) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " INT48 ,Selects INT48 (GIO4) priority level" "0,1,2,3,4,5,6,7" line.long 0x1c "INTPRI7,Interrupt Priority Register 7" bitfld.long 0x1c 28.--30. " INT63 ,Selects INT63 (EMUINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 24.--26. " INT62 ,Selects INT62 (COMMRX/EDMA TC3_ERRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 20.--22. " INT61 ,Selects INT61 (COMMTX/EDMA TC2_ERRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 16.--18. " INT60 ,Selects INT60 (KEYINT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1c 12.--14. " INT59 ,Selects INT59 (GIO15/ADCINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 8.--10. " INT58 ,Selects INT58 (GIO14/PWRGIO2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 4.--6. " INT57 ,Selects INT57 (GIO13/PWRGIO1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 0.--2. " INT56 ,Selects INT56 (GIO12/PWRGIO0) priority level" "0,1,2,3,4,5,6,7" width 0xb tree.end tree "SCR (System Control Registers)" base asd:0x01c40000 width 14. group.long 0x00++0x13 line.long 0x00 "PINMUX0,Pin Mux 0 Register" bitfld.long 0x00 24. " MMC/SD0 ,MMC/SD0 pin multiplexing control" "CLK/CMD/DATA3/DATA2/DATA1/DATA0,?..." textline " " bitfld.long 0x00 23. " GIO49 ,GIO49 and McBSP pin multiplexing control" "GIO49,McBSP_DX" bitfld.long 0x00 22. " GIO48 ,GIO48 and McBSP pin multiplexing control" "GIO48,McBSP_CLKX" bitfld.long 0x00 21. " GIO47 ,GIO47 and McBSP pin multiplexing control" "GIO47,McBSP_FSX" textline " " bitfld.long 0x00 20. " GIO46 ,GIO46 and McBSP pin multiplexing control" "GIO46,McBSP_DR" bitfld.long 0x00 19. " GIO45 ,GIO45 and McBSP pin multiplexing control" "GIO45,McBSP_CLKR" bitfld.long 0x00 18. " GIO44 ,GIO44 and McBSP pin multiplexing control" "GIO44,McBSP_FSR" textline " " bitfld.long 0x00 16.--17. " GIO43 ,GIO43, MMC/SD1, and AEMIF pin multiplexing control" "GIO43,MMCSD1_CLK,EM_A20,?..." bitfld.long 0x00 14.--15. " C_WE_FIELD ,C_WE_FIELD (video in), GIO93 ,USB, and CLKOUT0 pin multiplexing control" "C_WE_FIELD,GIO93,CLKOUT0,USBDRVVBUS" bitfld.long 0x00 13. " VD ,VD (video in) and GIO94 pin multiplexing control" "VD,GIO94" textline " " bitfld.long 0x00 12. " HD ,HD (video in) and GIO95 pin multiplexing control" "HD,GIO95" bitfld.long 0x00 11. " YIN0 ,YIN0 (video in) and GIO96 pin multiplexing control" "YIN0,GIO96" bitfld.long 0x00 10. " YIN1 ,YIN1 (video in) and GIO97 pin multiplexing control" "YIN1,GIO97" textline " " bitfld.long 0x00 9. " YIN2 ,YIN2 (video in) and GIO98 pin multiplexing control" "YIN2,GIO98" bitfld.long 0x00 8. " YIN3 ,YIN3 (video in) and GIO99 pin multiplexing control" "YIN3,GIO99" bitfld.long 0x00 6.--7. " YIN4 ,YIN4 (video in), SPI3, and GIO100 pin multiplexing control" "YIN4,GIO100,SPI3_SOMI,SPI3_SCS[1]" textline " " bitfld.long 0x00 4.--5. " YIN5 ,YIN5 (video in), SPI3, and GIO101 pin multiplexing control" "YIN5,GIO101,SPI3_SCS[0],?..." bitfld.long 0x00 2.--3. " YIN6 ,YIN6 (video in), SPI3, and GIO102 pin multiplexing control" "YIN6,GIO102,SPI3_SIMO,?..." bitfld.long 0x00 0.--1. " YIN7 ,YIN7 (video in), SPI3, and GIO103 pin multiplexing control" "YIN7,GIO103,SPI3_SCLK,?..." line.long 0x04 "PINMUX1,Pin Mux 1 Register" bitfld.long 0x04 22. " VCLK ,VCLK (Video Out) and GIO79 pin multiplexing control" "VCLK,GIO79" bitfld.long 0x04 20.--21. " EXTCLK ,EXTCLK (Video Out), PWM3, and GIO80 pin multiplexing control" "GIO80,EXTCLK,B2,PWM3" bitfld.long 0x04 18.--19. " FIELD ,FIELD (Video Out), PWM3, and GIO81 pin multiplexing control" "GIO81,FIELD,R2,PWM3" textline " " bitfld.long 0x04 17. " LCD_OE ,LCD_OE (Video Out) and GIO82 pin multiplexing control" "LCD_OE,GIO82" bitfld.long 0x04 16. " HVSYNC ,HVSYNC/VSYNC (Video Out) and GIO[84:83] pin multiplexing control" "HSYNC/VSYNC,GIO[84:83]" bitfld.long 0x04 14.--15. " COUT_0 ,COUT0 (Video Out), PWM3, and GIO85 pin multiplexing control" "GIO85,COUT0,PWM3,?..." textline " " bitfld.long 0x04 12.--13. " COUT_1 ,COUT1 (Video Out), PWM3, STTRIG, and GIO86 pin multiplexing control" "GIO86,COUT1,PWM3,?..." bitfld.long 0x04 10.--11. " COUT_2 ,COUT2 (Video Out), PWM2, RTO3, and GIO87 pin multiplexing control" "GIO87,COUT2,PWM2,RTO3" bitfld.long 0x04 8.--9. " COUT_3 ,COUT3 (Video Out), PWM2, RTO2, and GIO88 pin multiplexing control" "GIO88,COUT3,PWM2,RTO2" textline " " bitfld.long 0x04 6.--7. " COUT_4 ,COUT4 (Video Out), PWM2, RTO1, and GIO89 pin multiplexing control" "GIO89,COUT4,PWM2,RTO1" bitfld.long 0x04 4.--5. " COUT_5 ,COUT5(Video Out), PWM2, RTO0, and GIO90 pin multiplexing control" "GIO90,COUT5,PWM2,RTO0" bitfld.long 0x04 2.--3. " COUT_6 ,COUT6 (Video Out), PWM, and GIO91 pin multiplexing control" "GIO91,COUT6,PWM1,?..." textline " " bitfld.long 0x04 0.--1. " COUT_7 ,COUT7 (Video Out), PWM0, and GIO92 pin multiplexing control" "GIO92,COUT7,PWM0,?..." line.long 0x08 "PINMUX2,Pin Mux 2 Register" bitfld.long 0x08 12. " EM_CLK ,EM_CLK (AEMIF) and GI050 pin multiplexing control" "EM_CLK,GIO50" bitfld.long 0x08 11. " EM_ADV ,EM_ADV (AEMIF) and GIO51 pin multiplexing control" "EM_ADV,GIO51" bitfld.long 0x08 10. " EM_WAIT ,EM_WAIT (AEMIF) and GIO52 pin multiplexing control" "EM_WAIT,GIO52" textline " " bitfld.long 0x08 9. " EM_WE_OE ,EM_WE_OE (AEMIF) and GIO[54:53] pin multiplexing control" "/EM_WE & /EM_OE,GIO[54:53]" bitfld.long 0x08 8. " /EM_CE1 ,/EM_CE1 (AEMIF) and GIO55 pin multiplexing control" "/EM_CE1,GIO55" bitfld.long 0x08 7. " /EM_CE0 ,/EM_CE0 (AEMIF) and GIO56 pin multiplexing control" "/EM_CE0,GIO56" textline " " bitfld.long 0x08 6. " EM_D[15:8] ,EM_D[15:8] (AEMIF) and GIO[64:57] pin multiplexing control" "GIO[64:57],EM_D[15:8]" bitfld.long 0x08 4.--5. " EM_A7 ,EM_A7 (AEMIF) and GIO72 pin multiplexing control" "GIO72,EM_A7,EM_A7,KEYA3" bitfld.long 0x08 2.--3. " EM_A3 ,EM_A3 (AEMIF) and GIO68 pin multiplexing control" "GIO68,EM_A3,EM_A3,KEYB3" textline " " bitfld.long 0x08 0.--1. " EM_AR ,EM_AR (AEMIF), GIO[78:73] ,GIO[71:69] ,GIO[78:73] and GIO[67:65] pin multiplexing control" "GIO[78:73]/GIO[71:69]/GIO[67:65],EM_A[13:8]/EM_A[6:4]/EM_A0/EM_BA1/EM_A14,EM_A[13:8]/EM_A[6:4]/EM_A0/EM_BA1/EM_BA0,GIO[78:73]/KEYA[2:0]/KEYB[2:0]" line.long 0x0c "PINMUX3,Pin Mux 3 Register" bitfld.long 0x0C 31. " GIO26 ,GIO26 (GPIO) and SPI1 pin multiplexing control" "GIO26,SPI1_SIMO" bitfld.long 0x0C 29.--30. " GIO25 ,GIO25 (GPIO), SPI0, UART1, and PWM1 pin multiplexing control" "GIO25,SPI0_SCS[0],PWM1,UART1_TXD" bitfld.long 0x0C 28. " GIO24 ,GI024 (GPIO) and SPI0 pin multiplexing control" "GIO24,SPI0_SCLK" textline " " bitfld.long 0x0C 26.--27. " GIO23 ,GIO23 (GPIO), SPI0, and PWM0 pin multiplexing control" "GIO23,SPI0_SOMI,SPI0_SCS[1],PWM0" bitfld.long 0x0C 25. " GIO22 ,GIO22 (GPIO) and SPI0 pin multiplexing control" "GIO22,SPI0_SIMO" bitfld.long 0x0C 23.--24. " GIO21 ,GIO21 (GPIO), UART1, and I2C pin multiplexing control" "GIO21,UART1_RTS,I2C_SDA,?..." textline " " bitfld.long 0x0C 21.--22. " GIO20 ,GIO20 (GPIO), UART1, and I2C pin multiplexing control" "GIO20,UART1_CTS,I2C_SCL,?..." bitfld.long 0x0C 20. " GIO19 ,GIO19 (GPIO) and UART0 pin multiplexing control" "GIO19,UART0_RXD" bitfld.long 0x0C 19. " GIO18 ,GIO18 (GPIO) and UART0 pin multiplexing control" "GIO18,UART0_TXD" textline " " bitfld.long 0x0C 17.--18. " GIO17 ,GIO17 (GPIO), EMAC and UART1 pin multiplexing control" "GIO17,EMAC_TX_EN,UART1_RXD,?..." bitfld.long 0x0C 15.--16. " GIO16 ,GIO16 (GPIO), EMAC and UART1 pin multiplexing control" "GIO16,EMAC_TX_CLK,UART1_TXD,?..." bitfld.long 0x0C 14. " GIO15 ,GIO15 (GPIO) and EMAC pin multiplexing control" "GIO15,EMAC_COL" textline " " bitfld.long 0x0C 13. " GIO14 ,GIO14 (GPIO) and EMAC pin multiplexing control" "GIO14,EMAC_TXD[3]" bitfld.long 0x0C 12. " GIO13 ,GIO13 (GPIO) and EMAC pin multiplexing control" "GIO13,EMAC_TXD[2]" bitfld.long 0x0C 11. " GIO12 ,GIO12 (GPIO) and EMAC pin multiplexing control" "GIO12,EMAC_TXD[1]" textline " " bitfld.long 0x0C 10. " GIO11 ,GIO11 (GPIO) and EMAC pin multiplexing control" "GIO11,EMAC_TXD[0]" bitfld.long 0x0C 9. " GIO10 ,GIO10 (GPIO) and EMAC pin multiplexing control" "GIO10,EMAC_RXD[3]" bitfld.long 0x0C 8. " GIO9 ,GIO9 (GPIO) and EMAC pin multiplexing control" "GIO9,EMAC_RXD[2]" textline " " bitfld.long 0x0C 7. " GIO8 ,GIO8 (GPIO) and EMAC pin multiplexing control" "GIO8,EMAC_RXD[1]" bitfld.long 0x0C 6. " GIO7 ,GIO7 (GPIO) and EMAC pin multiplexing control" "GIO7,EMAC_RXD[0]" bitfld.long 0x0C 5. " GIO6 ,GIO6 (GPIO) and EMAC pin multiplexing control" "GIO6,EMAC_RX_CLK" textline " " bitfld.long 0x0C 4. " GIO5 ,GIO5 (GPIO) and EMAC pin multiplexing control" "GIO5,EMAC_RX_DV" bitfld.long 0x0C 3. " GIO4 ,GIO4 (GPIO) and EMAC pin multiplexing control" "GIO4,EMAC_RX_ER" bitfld.long 0x0C 2. " GIO3 ,GIO3 (GPIO) and EMAC pin multiplexing control" "GIO3,EMAC_CRS" textline " " bitfld.long 0x0C 1. " GIO2 ,GIO2 (GPIO) and EMAC_MDIO pin multiplexing control" "GIO2,EMAC_MDIO" bitfld.long 0x0C 0. " GIO1 ,GIO1 (GPIO) and EMAC_MDIO pin multiplexing control" "GIO1,EMAC_MDCLK" line.long 0x10 "PINMUX4,Pin Mux 4 Register" bitfld.long 0x10 30.--31. " GIO42 ,GIO42 (GPIO), MMC/SD1 and AEMIF pin multiplexing control" "GIO42,MMCSD1_CMD,EM_A19,?..." bitfld.long 0x10 28.--29. " GIO41 ,GIO41 (GPIO), MC/SD1 and AEMIF pin multiplexing control" "GIO41,MMCSD1_DATA3,EM_A18,?..." bitfld.long 0x10 26.--27. " GIO40 ,GIO40 (GPIO), MMC/SD1, and AEMIF pin multiplexing control" "GIO40,MMCSD1_DATA2,EM_A17,?..." textline " " bitfld.long 0x10 24.--25. " GIO39 ,GIO39 (GPIO), MMC/SD1, and AEMIF pin multiplexing control" "GIO39,MMCSD1_DATA1,EM_A16,?..." bitfld.long 0x10 22.--23. " GIO38 ,GIO38 (GPIO), MMC/SD1, and AEMIF pin multiplexing control" "GIO38,MMCSD1_DATA0,EM_A15,?..." bitfld.long 0x10 20.--21. " GIO37 ,GIO37 (GPIO), SPI4, McBSP, and CLKOUT0 pin multiplexing control" "GIO37,SPI4_SCS[0],McBSP_CLKS,CLKOUT0" textline " " bitfld.long 0x10 18.--19. " GIO36 ,GIO36 (GPIO), SPI4, and AEMIF pin multiplexing control" "GIO36,SPI4_SCLK,EM_A21,EM_A14" bitfld.long 0x10 16.--17. " GIO35 ,GIO35 (GPIO), SPI4, and CLKOUT1 pin multiplexing control" "GIO35,SPI4_SOMI,SPI4_SCS[1],CLKOUT1" bitfld.long 0x10 14.--15. " GIO34 ,GIO34 (GPIO), SPI4, and UART1 pin multiplexing control" "GIO34,SPI4_SIMO,SPI4_SOMI,UART1_RXD" textline " " bitfld.long 0x10 12.--13. " GIO33 ,GIO33 (GPIO), SPI2, VENC, and USB pin multiplexing control" "GIO33,SPI2_SCS[0],USBDRVVBUS,R1" bitfld.long 0x10 10.--11. " GIO32 ,GIO32 (GPIO), VENC, and SPI2 pin multiplexing control" "GIO32,SPI2_SCLK,Reserved,R0" bitfld.long 0x10 8.--9. " GIO31 ,GIO31 (GPIO), SPI2, and CLKOUT2 pin multiplexing control" "GIO31,SPI2_SOMI,SPI2_SCS[1],CLKOUT2" textline " " bitfld.long 0x10 6.--7. " GIO30 ,GIO30 (GPIO) and SPI2 pin multiplexing control" "GIO30,SPI2_SIMO,Reserved,G1" bitfld.long 0x10 4.--5. " GIO29 ,GIO29 (GPIO), VENC, and SPI1 pin multiplexing control" "GIO29,SPI1_SCS[0],Reserved,G0" bitfld.long 0x10 2.--3. " GIO28 ,GIO28 (GPIO), VENC, and SPI1 pin multiplexing control" "GIO28,SPI1_SCLK,Reserved,B1" textline " " bitfld.long 0x10 0.--1. " GIO27 ,GIO27(GPIO), VENC, and SPI1 pin multiplexing control" "GIO27,SPI1_SOMI,SPI1_SCS[1],B0" rgroup.long 0x14++0x3 line.long 0x00 "BOOTCFG,Boot Configuration Register" bitfld.long 0x00 8. " GIO0_RESET ,GIO0 value sampled at reset prior to debounce circuit" "Low,High" bitfld.long 0x00 5.--7. " BTSEL ,Configuration of BTSEL[2:0] pins at boot time" "NAND,AEMIF,SD,UART,USB,SPI,EMAC,HPI" bitfld.long 0x00 3.--4. " OSC_SW ,Oscillator frequency mode" "Reserved,30-40 MHz,15-35 MHz,?..." textline " " bitfld.long 0x00 0.--2. " AECFG ,AEMIF address width configuration at boot time" "000,001,010,Reserved,100,101,110,?..." group.long 0x18++0x7 line.long 0x00 "ARM_INTMUX,ARM Interrupt Mux Control Register" bitfld.long 0x00 31. " INT0 ,VPSS_INT0" "VPSS_INT0,?..." bitfld.long 0x00 25. " INT7 ,VPSS_INT7 or MJCP: NSFINT" "VPSS_INT7,MPEG/JPEG Coproc. NSFINT" textline " " bitfld.long 0x00 24. " INT8 ,VPSS_INT8 or IMXI1NT" "VPSS_INT8,MPEG/JPEG Coproc. IMX1INT" bitfld.long 0x00 23. " INT62 ,COMMRX or EDMA3 TC3_ERRINT" "COMMRX,EDMA TC3 Error Interrupt" textline " " bitfld.long 0x00 22. " INT61 ,COMMTX or EDMA3 TC2_ERRINT" "COMMTX,EDMA TC2 Error Interrupt" bitfld.long 0x00 21. " INT59 ,GPIO15 or ADCINT" "GPIO15,ADCINT" textline " " bitfld.long 0x00 20. " INT58 ,GPIO14 or PWRGIO2" "GPIO14,PWRGIO2" bitfld.long 0x00 19. " INT57 ,GPIO13 or PWRGIO1" "GPIO13,PWRGIO1" textline " " bitfld.long 0x00 18. " INT56 ,GPIO12 or PWRGIO0" "GPIO12,PWRGIO0" bitfld.long 0x00 17. " INT55 ,GPIO11 or EMACMISCPULSE" "GPIO11,EMACMISCPULSE" textline " " bitfld.long 0x00 16. " INT54 ,GPIO10 or EMACTXPULSE" "GPIO10,EMACTXPULSE" bitfld.long 0x00 15. " INT53 ,GPIO9 or EMACRXPULSE" "GPIO9,EMACRXPULSE" textline " " bitfld.long 0x00 14. " INT52 ,GPIO8 or EMACRXTHREESH" "GPIO8,EMACRXTHREESH" bitfld.long 0x00 13. " INT43 ,SPI0INT1 or SPI3INT0" "SPI0 - SPIINT1,SPI3 - SPIINT0" textline " " bitfld.long 0x00 12. " INT38 ,PWM2 or Timer 4 : TINT8" "PWM2,Timer 4 : TINT8" bitfld.long 0x00 11. " INT30 ,Async EMIF or HPI" "Async EMIF,HPI" textline " " bitfld.long 0x00 10. " INT29 ,DDR2 EMIF or PRTCSS" "DDR2 EMIF,PRTCSS" bitfld.long 0x00 9. " INT28 ,PWM3 or Timer 4 : TINT9" "PWM3,Timer 4 : TINT9" textline " " bitfld.long 0x00 8. " INT26 ,MMC/SD0" "MMC0,?..." bitfld.long 0x00 7. " INT24 ,McBSP XINT or Voice Codec" "McBSP XINT,VCINT" textline " " bitfld.long 0x00 5. " INT20 ,PSC or TVINT" "PSC,TVINT" bitfld.long 0x00 4. " INT19 ,SPI2INT0 or EDMA3 TC1_ERRINT" "SPI2 - SPIINT0,EDMA TC1 Error Interrupt" textline " " bitfld.long 0x00 3. " INT18 ,SPI1INT1 or EDMA3 TC0_ERRINT" "SPI1 - SPIINT1,EDMA TC0 Error Interrupt" bitfld.long 0x00 2. " INT17 ,SPI1INT0 or EDMA3 CC_ERRINT" "SPI1 - SPIINT0,EDMA CC Error Interrupt" textline " " bitfld.long 0x00 1. " INT13 ,RTO or Timer2:TINT4" "RTO,Timer2:TINT4" bitfld.long 0x00 0. " INT10 ,IMX0INT or HDVICP:HDVICP_ARMINT" "MPEG/JPEG Coproc. IMX0INT,HDVICP_ARMINT" line.long 0x04 "EDMA_EVTMUX,EDMA Event Mux Control Register" bitfld.long 0x04 22. " EVT63 ,MJCP : COPCINT or HDVICP : CP_ECDEND" "MPEG/JPEG Coproc. COPCINT,HDVICP CP_ECDEND" bitfld.long 0x04 21. " EVT62 ,MJCP : RCNTINT or HDVICP : CP_MC" "MPEG/JPEG Coproc. RCNTINT,HDVICP CP_MC" textline " " bitfld.long 0x04 20. " EVT61 ,MJCP : VLCDERRINT or HDVICP: CP_ LPF" "MPEG/JPEG Coproc. VLCDERRINT,HDVICP CP_LPF" bitfld.long 0x04 19. " EVT60 ,MJCP : BPSINT or HDVICP : CP_BS" "MPEG/JPEG Coproc. BPSINT,HDVICP CP_BS" textline " " bitfld.long 0x04 18. " EVT59 ,MJCP : QIQINT or HDVICP: CP_IPE" "MPEG/JPEG Coproc. QIQINT,HDVICPr CP_IPE" bitfld.long 0x04 17. " EVT58 ,MJCP: DCTINT or HDVICP : CP_CALC" "MPEG/JPEG Coproc. DCTINT,HDVICPr CP_CALC" textline " " bitfld.long 0x04 16. " EVT57 ,MJCP : BIMINT or HDVICP : CP_ME" "MPEG/JPEG Coproc. BIMINT,HDVICP CP_ME" bitfld.long 0x04 15. " EVT56 ,MJCP : VLCDINT or HDVICP : CP_ECDCMP" "MPEG/JPEG Coproc. VLCDINT,HDVICP CP_ECDCMP" textline " " bitfld.long 0x04 14. " EVT55 ,PWM3 or HDVICP : CP_UNDEF" "PWM3,HDVICP CP_UNDEF" bitfld.long 0x04 13. " EVT54 ,PWM2 or MJCP : NSFINT" "PWM2,MPEG/JPEG Coproc. NSFINT" textline " " bitfld.long 0x04 12. " EVT53 ,PWM1 or MJCP : IMX1INT" "PWM1,MPEG/JPEG Coproc. IMX1INT" bitfld.long 0x04 9. " EVT43 ,GPIO : GPINT14 or EMACMISCTHREESH" "GPINT14,EMACMISCTHREESH" textline " " bitfld.long 0x04 8. " EVT42 ,GPIO : GPINT14 or EMACTXPULSE" "GPINT14,EMACTXPULSE" bitfld.long 0x04 7. " EVT41 ,GPIO : GPINT14 or EMACRXPULSE" "GPINT14,EMACRXPULSE" textline " " bitfld.long 0x04 6. " EVT40 ,GPIO : GPINT14 or EMACRXTHREESH" "GPINT14,EMACRXTHRESH" bitfld.long 0x04 5. " EVT26 ,MMC0 : RXEVT" "MMC0 : RXEVT,?..." textline " " bitfld.long 0x04 4. " EVT19 ,UART0 : UTXEVT0 or SPI3: SPI3REVT" "UTXEVT0,SPI3REVT" bitfld.long 0x04 3. " EVT18 ,UART0 : URXEVT0 or SPI3: SPI3XEVT" "URXEVT0,SPI3XEVT" textline " " bitfld.long 0x04 2. " EVT12 ,MJCP : IMX0INT or HDVICP : HDVICP_ARMINT" "MPEG/JPEG Coproc. IMX0INT,HDVICP HDVICP_ARMINT" bitfld.long 0x04 1. " EVT3 ,McBSP : REVT or VoiceCodec : VCREVT" "McBSP: REVT,VCREVT" textline " " bitfld.long 0x04 0. " EVT2 ,McBSP : XEVT or VoiceCodec : VCXEVT" "McBSP: XEVT,VCXEVT" group.long 0x24++0x03 line.long 0x00 "HPI_CTL,HPI Control Register" bitfld.long 0x00 9. " CTLMODE ,HPIC register write access" "HOST,DM36x" bitfld.long 0x00 8. " ADDMODE ,HPIA register write access" "HOST,DM36x" hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT ,Host burst write timeout value" rgroup.long 0x28++0x03 line.long 0x00 "DEVICE_ID,Device ID Register" hexmask.long.byte 0x00 28.--31. 1. " DEVREV ,DM36x Silicon version" bitfld.long 0x00 27. " PARTNUM[27] ,ARM Core ID" "ARM,Not ARM" textline " " bitfld.long 0x00 24.--26. " PARTNUM[26:24] ,Capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARM with J exten." bitfld.long 0x00 20.--23. " PARTNUM[23:20] ,Family" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,0x9,?..." textline " " hexmask.long.byte 0x00 12.--19. 1. " PARTNUM[19:12] ,Device Number" hexmask.long.word 0x00 1.--11. 1. " MFGR ,Manufacturer's JTAG ID" group.long 0x2c++0x23 line.long 0x00 "VDAC_CONFIG,Video Dac Configuration Register" bitfld.long 0x00 31. " TVSHORT ,Short detection for the video output" "Not performed,Performed" bitfld.long 0x00 30. " TVINT ,Detection of connection and disconnection of video signal" "Not performed,Performed" textline " " bitfld.long 0x00 19. " PDTVSHORTZ ,PDTVSHORTZ" "No interrupt,Interrupt" bitfld.long 0x00 5. " XDMODE ,Select HD DAC mode / SD Video Buffer mode for DAC CH-C" "SD Video Buffer,HD DAC" textline " " bitfld.long 0x00 4. " PWDNZ_TVDETECT ,TVINT circuit enable signal" "Disabled,Enabled" bitfld.long 0x00 3. " PWDNBUFZ ,Power Down control for SD Video Buffer" "Power Down,Normal" textline " " bitfld.long 0x00 2. " PWD_C ,Power Down mode control for CH-C" "Power Down,Normal" bitfld.long 0x00 1. " PWD_B ,Power Down mode control for CH-B" "Power Down,Normal" textline " " bitfld.long 0x00 0. " PWD_A ," "Power Down,Normal" line.long 0x04 "TIMER64_CTL,Timer Input Control Register" bitfld.long 0x04 1. " GIO3_4 ,GIO3 or GIO4 for input to the timer" "GIO3,GIO4" bitfld.long 0x04 0. " GIO1_2 ,GIO1 or GIO2 for input to the timer" "GIO1,GIO2" line.long 0x08 "USB_PHY_CTRL,USB PHY Control Register" bitfld.long 0x08 12.--15. " PHYCLKFREQ ,USB PHY clock source" "Reserved,12 MHz,24 MHz,Reserved,19.2 MHz,?..." bitfld.long 0x08 11. " DATAPOL ,USB PHY data polority inviersion" "Not inverted,Inverted" textline " " bitfld.long 0x08 9.--10. " PHYCLKSRC ,USB HY input clock source" "Crystal directly,12MHz,PLLC1SYSCLK1,PLLC2SYSCLK1" bitfld.long 0x08 8. " PHYCLKGD ,USB PHY Power/Clock Good" "Not ramped/not locked,Good/locked" textline " " bitfld.long 0x08 7. " SESNDEN ,Session End Comparator enable" "Disabled,Enabled" bitfld.long 0x08 6. " VBDTCTEN ,Vbus comparator enable" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " VBUSENS ,OTG analog block VBUSSENSE output status" "Not present(<0.5V),Present(>0.5V)" bitfld.long 0x08 4. " PHYPLLON ,USB PHY PLL suspend override" "Normal,Override" textline " " bitfld.long 0x08 1. " OTGPDWN ,USB OTG analog block power down control" "Powered,Power off" bitfld.long 0x08 0. " PHYPDWN ,USB PHY power down control" "Powered,Power off" line.long 0x0c "MISC,Miscellaneous Control Register" bitfld.long 0x0c 11. " MMC/SD0_INHB ,MMC/SD0 bus access control" "Normal,Inhibited" bitfld.long 0x0c 10. " HDVICP_INHB ,HDVICP bus access control" "Normal,Inhibited" textline " " bitfld.long 0x0c 8.--9. " BOOTST ,Boot up status" "Failed first & latest attempts,Failed first & passed latest attempt,Reserved,Passed first attempt itself" textline " " bitfld.long 0x0c 7. " EDMATC1_BST ,Default burst size of EDMA TC1 (byte)" "32,64" bitfld.long 0x0c 6. " CLKSTP_BYP1 ,Bypassing the clock stop Req/Ack handshake for EDMA" "Normal,Bypass" textline " " bitfld.long 0x0c 5. " CLKSTP_BYP0 ,Bypassing the clock stop Req/Ack handshake for McBSP" "Normal,Bypass" bitfld.long 0x0c 4. " TIMER2_WDT ,TIMER2 Definition" "Normal,WDT" textline " " bitfld.long 0x0c 0. " AIM_WAIST ,ARM Internal Memory Wait States" "1,0" line.long 0x10 "MSTPRI0,Master Priorities 0 Register" bitfld.long 0x10 20.--22. " HDVICP ,HDVICP processing priority" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. " MJCP ,MJCP processing priority" "0,1,2,3,4,5,6,7" bitfld.long 0x10 4.--6. " ARM_CFGP ,ARM CFG bus priority" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " ARM_DMAP ,ARM DMA priority" "0,1,2,3,4,5,6,7" line.long 0x14 "MSTPRI1,Master Priorities 1 Register" bitfld.long 0x14 8.--10. " PERIP ,Peripheral bus priority" "0,1,2,3,4,5,6,7" line.long 0x18 "VPSS_CLK_CTRL,VPSS Clock Mux Control Register" bitfld.long 0x18 7. " VPSS_CLKMD ,Config/EDMA bus clock versus VPSS clock ratio" "1:2,1:1" bitfld.long 0x18 5.--6. " VENC_CLK_SRC ,27MHz/74.25MHz clock source" "PLLC1 SYSCLK6,PLLC2 SYSCLK5,MXI oscillator,MXI oscillator" textline " " bitfld.long 0x18 4. " DACCLKEN ,Video DAC clock enable" "Disabled,Enabled" bitfld.long 0x18 3. " VENCLKEN ,Video encoder clock enable" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " PCLK_INV ,Video encoder PCLK polarity" "Normal,Inverted" bitfld.long 0x18 0.--1. " VPSS_MUXSEL ,VPSS and DAC clock selection" "VENC_CLK_SRC,VENC_CLK_SRC,EXTCLK input,PCLK (or ~PCLK)" line.long 0x1c "PERI_CLKCTL,Peripheral Clock Control Register" bitfld.long 0x1C 30. " PRTCCLKS ,PRTCSS clock source selection" "RTCXI (OSC),PLLC1AUXCLK clock Divider" textline " " bitfld.long 0x1C 29. " ARMCLKS ,ARM926 clock source selection" "PLLC1SYSCLK2,PLLC2SYSCLK2" textline " " bitfld.long 0x1C 28. " KEYSCLKS ,KeyScan clock source selection" "RTCXI (MXI),PLLC1AUXCLK clock Divider" bitfld.long 0x1C 27. " DDRCLKS ,DDR2 clock source selection" "PLLC1SYSCLK7,PLLC2SYSCLK3" textline " " bitfld.long 0x1C 26. " HDVICPCLKS ,HDVICP Processing logic clock source selection" "PLLC1SYSCLK2,PLLC2SYSCLK2" hexmask.long.word 0x1C 16.--25. 1. " DIV3 ,PLL clock divider for Key Scan and PRTCSS" textline " " hexmask.long.word 0x1C 7.--15. 1. " DIV2 ,PLL clock divider for Voice Codec" bitfld.long 0x1C 3.--6. " DIV1 ,PLL clock divider for CLKOUT2" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x1C 2. " CLOCKOUT2EN ,CLOCKOUT2 Enable" "Enabled,Disabled" bitfld.long 0x1C 1. " CLOCKOUT1EN ,CLOCKOUT1 Enable" "Enabled,Disabled" textline " " bitfld.long 0x1C 0. " CLOCKOUT0EN ,CLOCKOUT0 Enabled" "Enabled,Disabled" line.long 0x20 "DEEPSLEEP,Deep Sleep Mode Configuration Register" bitfld.long 0x20 31. " SLEEPENABLE ,Enable Deep Sleep Mode" "Disabled,Enabled" bitfld.long 0x20 30. " SLEEPCOMPLETE ,Status of the deep sleep complete mode" "Normal/still asleep,After DSM" textline " " hexmask.long.word 0x20 0.--15. 1. " COUNTER ,Wakeup Delay Counter" group.long 0x54++0x2f line.long 0x0 "DEBOUNCE0,De-bounce for GIO[0] Input Register" bitfld.long 0x0 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x0 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x4 "DEBOUNCE1,De-bounce for GIO[1] Input Register" bitfld.long 0x4 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x4 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x8 "DEBOUNCE2,De-bounce for GIO[2] Input Register" bitfld.long 0x8 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x8 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0xC "DEBOUNCE3,De-bounce for GIO[3] Input Register" bitfld.long 0xC 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0xC 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x10 "DEBOUNCE4,De-bounce for GIO[4] Input Register" bitfld.long 0x10 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x10 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x14 "DEBOUNCE5,De-bounce for GIO[5] Input Register" bitfld.long 0x14 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x14 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x18 "DEBOUNCE6,De-bounce for GIO[6] Input Register" bitfld.long 0x18 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x18 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x1C "DEBOUNCE7,De-bounce for GIO[7] Input Register" bitfld.long 0x1C 31. " ENABLE ,Debounce Enable" "Enabled,Disabled" hexmask.long.tbyte 0x1C 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit" line.long 0x20 "VTPIOCR,VTP IO Control Register" bitfld.long 0x20 20. " DLLRSTZ ,Reset the DLL" "Reset,Normal" bitfld.long 0x20 19. " CLKRSTZ ,Reset the clock divider of DDR2 address/data macro" "Reset,Normal" bitfld.long 0x20 18. " VREFEN ,Internal DDR2 IO Vref enable" "Pad/external,Internal" textline " " bitfld.long 0x20 16.--17. " VREFTAP ,Selection for internal reference voltage level" "50.0%,47.5%,52.5%,50.0%" bitfld.long 0x20 15. " READY ,VTP Ready status" "Not ready,Ready" bitfld.long 0x20 14. " IOPWRDN ,Power down control enable for DDR2 input buffer" "Disabled,Enabled" textline " " bitfld.long 0x20 13. " CLRZ ,VTP clear" "Cleared,Not cleared" bitfld.long 0x20 12. " FORCEDNP ,Force decrease PFET drive" "Not forced,Forced" bitfld.long 0x20 11. " FORCEDNN ,Force decrease NFET drive" "Not forced,Forced" textline " " bitfld.long 0x20 10. " FORCEUPP ,Force increase PFET drive" "Not forced,Forced" bitfld.long 0x20 9. " FORCEUPN ,Force increase PFET drive" "Not forced,Forced" bitfld.long 0x20 8. " PWRSAVE ,VTP Power Save Mode" "Disabled,Enabled" textline " " bitfld.long 0x20 7. " LOCK ,VTP Impedance Lock" "Not locked,Locked" bitfld.long 0x20 6. " PWRDN ,VTP Power Down" "Disabled,Enabled" bitfld.long 0x20 5. " D0 ,Drive strength control" "Disabled,Enabled" textline " " bitfld.long 0x20 4. " D1 ,Drive strength control" "Disabled,Enabled" bitfld.long 0x20 3. " D2 ,Drive strength control" "Disabled,Enabled" bitfld.long 0x20 2. " F0 ,Digital filter control" "Disabled,Enabled" textline " " bitfld.long 0x20 1. " F1 ,Digital filter control" "Disabled,Enabled" bitfld.long 0x20 0. " F2 ,Digital filter control" "Disabled,Enabled" line.long 0x24 "PUPDCTL0,Pullup/Down Control 0 Register" bitfld.long 0x24 31. " GIO31 ,GIO31 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 30. " GIO30 ,GIO30 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 29. " GIO29 ,GIO29 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 28. " GIO28 ,GIO28 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 27. " GIO27 ,GIO27 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 26. " GIO26 ,GIO26 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 25. " GIO25 ,GIO25 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 24. " GIO24 ,GIO24 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 23. " GIO23 ,GIO23 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 22. " GIO22 ,GIO22 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 21. " GIO21 ,GIO21 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 20. " GIO20 ,GIO20 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 19. " GIO19 ,GIO19 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 18. " GIO18 ,GIO18 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 17. " GIO17 ,GIO17 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 16. " GIO16 ,GIO16 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 15. " GIO15 ,GIO15 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 14. " GIO14 ,GIO14 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 13. " GIO13 ,GIO13 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 12. " GIO12 ,GIO12 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 11. " GIO11 ,GIO11 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 10. " GIO10 ,GIO10 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 9. " GIO09 ,GIO9 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 8. " GIO08 ,GIO8 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 7. " GIO07 ,GIO7 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 6. " GIO06 ,GIO6 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 5. " GIO05 ,GIO5 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 4. " GIO04 ,GIO4 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 3. " GIO03 ,GIO3 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 2. " GIO02 ,GIO2 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " GIO01 ,GIO1 Pull down enable" "Disabled,Enabled" bitfld.long 0x24 0. " GIO00 ,GIO0 Pull down enable" "Disabled,Enabled" line.long 0x28 "PUPDCTL1,Pullup/Down Control 1 Register" bitfld.long 0x28 31. " YIN ,YIN[7:0] Pull down enable" "Disabled,Enabled" bitfld.long 0x28 30. " CIN ,CIN[7:0] and PCLK Pull down enable" "Disabled,Enabled" bitfld.long 0x28 29. " GIO95 ,GIO95 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 28. " GIO94 ,GIO94 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 27. " GIO93 ,GIO93 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 26. " GIO81 ,GIO81Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 25. " GIO80 ,GIO80 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 24. " GIO78 ,GIO78 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 23. " GIO77 ,GIO77 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 22. " GIO76 ,GIO76 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 21. " GIO75 ,GIO75 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 20. " GIO74 ,GIO74 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 19. " GIO73 ,GIO73 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 18. " GIO52 ,GIO52 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 17. " GIO49 ,GIO49 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 16. " GIO48 ,GIO48 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 15. " GIO47 ,GIO47 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 14. " GIO46 ,GIO46 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 13. " GIO45 ,GIO45 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 12. " GIO44 ,GIO44 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 11. " GIO43 ,GIO43 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 10. " GIO42 ,GIO42 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 9. " GIO41 ,GIO41 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 8. " GIO40 ,GIO40 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 7. " GIO39 ,GIO39 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 6. " GIO38 ,GIO38 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 5. " GIO37 ,GIO37 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 4. " GIO36 ,GIO36 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 3. " GIO35 ,GIO35 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 2. " GIO34 ,GIO34 Pull down enable" "Disabled,Enabled" textline " " bitfld.long 0x28 1. " GIO33 ,GIO33 Pull down enable" "Disabled,Enabled" bitfld.long 0x28 0. " GIO32 ,GIO32 Pull down enable" "Disabled,Enabled" line.long 0x2c "HDVICPBT,HDVICP Boot Register" bitfld.long 0x2C 4. " INITRAM ,HDVICP INITRAM enable" "Disabled,Enabled" bitfld.long 0x2C 0. " COPHLT ,HDVICP Fetch Halt" "Enabled,Stalled" rgroup.long 0x84++0x07 line.long 0x00 "PLLC1_CONFIG,PLLC1 Configuration Register" bitfld.long 0x00 27. " LOCK3 ,PLL in lock mode condition" "Not locked,Locked" bitfld.long 0x00 26. " LOCK2 ,PLL in lock mode condition" "Not locked,Locked" bitfld.long 0x00 25. " LOCK1 ,PLL in lock mode condition" "Not locked,Locked" line.long 0x04 "PLLC1_CONFIG,PLLC1 Configuration Register" bitfld.long 0x04 27. " LOCK3 ,PLL in lock mode condition" "Not locked,Locked" bitfld.long 0x04 26. " LOCK2 ,PLL in lock mode condition" "Not locked,Locked" bitfld.long 0x04 25. " LOCK1 ,PLL in lock mode condition" "Not locked,Locked" width 0xb tree.end tree "HPI (Host Port Interface)" base asd:0x01c69800 width 13. rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.byte 0x00 16.--23. 1. " TID ,Identifies type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CID ,Identifies class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " PREV ,Identifies revision of peripheral" group.long 0x04++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation mode functionality of the HPI" "Not affected,Halted" bitfld.long 0x00 0. " FREE ,Free run emulation control" "SOFT control,Free run" if (((data.long(asd:0x01C40000+0x30))&0x200)==0x00) group.long 0x30++0x3 line.long 0x00 "HPIC,HPI Control Register" bitfld.long 0x00 11. " HPIASEL ,HPI address register select bit" "HPIAW,HPIAR" bitfld.long 0x00 9. " DUALHPIA ,Dual-HPIA mode bit" "Single-HPIA,Dual-HPIA" textline " " bitfld.long 0x00 8. " HWOBSTAT ,HWOB status" "0,1" bitfld.long 0x00 4. " FETCH ,Host data fetch command" "Not requested,Requested" textline " " bitfld.long 0x00 2. " HINT ,Processor-to-host interrupt" "No effect,Interrupt" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 1. " ARMINT ,Host-to-processor interrupt" "No effect,Interrupt" else bitfld.long 0x00 1. " DSPINT ,Host-to-processor interrupt" "No effect,Interrupt" endif textline " " bitfld.long 0x00 0. " HWOB ,Halfword order" "Most significant,Least significant" else group.long 0x30++0x3 line.long 0x00 "HPIC,HPI Control Register" bitfld.long 0x00 11. " HPIASEL ,HPI address register select bit" "HPIAW,HPIAR" bitfld.long 0x00 9. " DUALHPIA ,Dual-HPIA mode bit" "Single-HPIA,Dual-HPIA" textline " " bitfld.long 0x00 8. " HWOBSTAT ,HWOB status" "0,1" bitfld.long 0x00 4. " FETCH ,Host data fetch command" "Not requested,Requested" textline " " eventfld.long 0x00 2. " HINT ,Processor-to-host interrupt" "No effect,Interrupt" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 1. " ARMINT ,Host-to-processor interrupt" "No effect,Interrupt" else bitfld.long 0x00 1. " DSPINT ,Host-to-processor interrupt" "No effect,Interrupt" endif textline " " bitfld.long 0x00 0. " HWOB ,Halfword order" "Most significant,Least significant" endif wgroup.long 0x34++0x3 line.long 0x00 "HPIAW,HPI Address Registers" rgroup.long 0x38++0x3 line.long 0x00 "HPIAR,HPI Address Registers" base asd:0x01C40000 group.long 0x30++0x03 line.long 0x00 "HPI_CTL,HPI Configuration Register" bitfld.long 0x00 9. " CTLMODE ,HPI control register mode" "Host,Processor" bitfld.long 0x00 8. " ADRMODE ,HPI address register mode" "Host,Processor" hexmask.long.byte 0x00 0.--7. 1. " TIMOUT ,Write FIFO timeout value in clock cycles" width 0xb tree.end tree.open "EMAC/MDIO (Ethernet Media Access Controller/Management Data Input/Output)" tree "EMAC Control Module Registers" base asd:0x01D0A000 width 19. rgroup.long 0x00++0x3 line.long 0x00 "CMIDVER,EMAC Control Module Identification and Version Register" sif (cpu()=="DM365"||cpu()=="DM368") hexmask.long.word 0x00 16.--31. 1. " EWIDENT ,EMAC control module identification" else hexmask.long.word 0x00 16.--31. 1. " RXIDENT ,EMAC control module identification" endif hexmask.long.byte 0x00 11.--15. 1. " EWRTLVER ,EMAC control module RTL version" textline " " hexmask.long.byte 0x00 8.--10. 1. " EWMAJORVER ,EMAC control module major version" hexmask.long.byte 0x00 0.--7. 1. " EWMINORVER ,EMAC control module minor version" group.long 0x04++0x1b line.long 0x00 "CMSOFTRESET,EEMAC Control Module Software Reset Register" bitfld.long 0x00 0. " SOFTRESET ,Emulation soft bit" "No Reset,Reset" line.long 0x04 "CMEMCONTROL,EMAC Control Module Emulation Control Register" bitfld.long 0x04 1. " SOFT ,Emulation soft bit" "Disabled,Enabled" bitfld.long 0x04 0. " FREE ,Emulation free bit" "Disabled,Enabled" line.long 0x08 "CMINTCTRL,EMAC Control Module Interrupt Control Register" bitfld.long 0x08 17. " INTPACEEN[1] ,Interrupt pacing enable" "Disabled,Tx_Pulse" bitfld.long 0x08 16. " INTPACEEN[0] ,Interrupt pacing enable" "Disabled,Rx_Pulse" textline " " hexmask.long.word 0x08 0.--11. 1. " INTPRESCALE ,Interrupt counter prescaler" line.long 0x0c "CMRXTHRESHINTEN,EMAC Control Module Receive Threshold Interrupt Enable Register" bitfld.long 0x0c 7. " RXTHRESHEN7 ,Receive threshold interrupt enable" "Disabled,Enabled" bitfld.long 0x0c 6. " RXTHRESHEN6 ,Receive threshold interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 5. " RXTHRESHEN5 ,Receive threshold interrupt enable" "Disabled,Enabled" bitfld.long 0x0c 4. " RXTHRESHEN4 ,Receive threshold interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 3. " RXTHRESHEN3 ,Receive threshold interrupt enable" "Disabled,Enabled" bitfld.long 0x0c 2. " RXTHRESHEN2 ,Receive threshold interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " RXTHRESHEN1 ,Receive threshold interrupt enable" "Disabled,Enabled" bitfld.long 0x0c 0. " RXTHRESHEN0 ,Receive threshold interrupt enable" "Disabled,Enabled" line.long 0x10 "CMRXINTEN,EMAC Control Module Receive Interrupt Enable Register" bitfld.long 0x10 7. " RXPULSEEN7 ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " RXPULSEEN6 ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " RXPULSEEN5 ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x10 4. " RXPULSEEN4 ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " RXPULSEEN3 ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x10 2. " RXPULSEEN2 ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " RXPULSEEN1 ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x10 0. " RXPULSEEN0 ,Receive interrupt enable" "Disabled,Enabled" line.long 0x14 "CMTXINTEN,EMAC Control Module Transmit Interrupt Enable Register" bitfld.long 0x14 7. " TXPULSEEN7 ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x14 6. " TXPULSEEN6 ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " TXPULSEEN5 ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x14 4. " TXPULSEEN4 ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 3. " TXPULSEEN3 ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x14 2. " TXPULSEEN2 ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " TXPULSEEN1 ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x14 0. " TXPULSEEN0 ,Transmit interrupt enable" "Disabled,Enabled" line.long 0x18 "CMMISCINTEN,EMAC Control Module Miscellaneous Interrupt Enable Register" bitfld.long 0x18 3. " STATPENDINTEN ,EMAC module statistics interrupt enable" "Disabled,Enabled" bitfld.long 0x18 2. " HOSTPENDINTEN ,EMAC module host error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " LINKINTEN ,MDIO module link change interrupt enable" "Disabled,Enabled" bitfld.long 0x18 0. " USERINTEN ,MDIO module user interrupt enable" "Disabled,Enabled" rgroup.long 0x40++0xf line.long 0x00 "CMRXTHRESHINTSTAT,EMAC Control Module Receive Threshold Interrupt Status Register" bitfld.long 0x00 7. " RXTHRESHINTTSTAT7 ,Receive threshold interrupt status" "Not pending,Pending" bitfld.long 0x00 6. " RXTHRESHINTTSTAT6 ,Receive threshold interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 5. " RXTHRESHINTTSTAT5 ,Receive threshold interrupt status" "Not pending,Pending" bitfld.long 0x00 4. " RXTHRESHINTTSTAT4 ,Receive threshold interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 3. " RXTHRESHINTTSTAT3 ,Receive threshold interrupt status" "Not pending,Pending" bitfld.long 0x00 2. " RXTHRESHINTTSTAT2 ,Receive threshold interrupt status" "Not pending,Pending" textline " " bitfld.long 0x00 1. " RXTHRESHINTTSTAT1 ,Receive threshold interrupt status" "Not pending,Pending" bitfld.long 0x00 0. " RXTHRESHINTTSTAT0 ,Receive threshold interrupt status" "Not pending,Pending" line.long 0x04 "CMRXINTSTAT,EMAC Control Module Receive Interrupt Status Register" bitfld.long 0x04 7. " RXPULSEINTTSTAT7 ,Receive interrupt status" "Not pending,Pending" bitfld.long 0x04 6. " RXPULSEINTTSTAT6 ,Receive interrupt status" "Not pending,Pending" textline " " bitfld.long 0x04 5. " RXPULSEINTTSTAT5 ,Receive interrupt status" "Not pending,Pending" bitfld.long 0x04 4. " RXPULSEINTTSTAT4 ,Receive interrupt status" "Not pending,Pending" textline " " bitfld.long 0x04 3. " RXPULSEINTTSTAT3 ,Receive interrupt status" "Not pending,Pending" bitfld.long 0x04 2. " RXPULSEINTTSTAT2 ,Receive interrupt status" "Not pending,Pending" textline " " bitfld.long 0x04 1. " RXPULSEINTTSTAT1 ,Receive interrupt status" "Not pending,Pending" bitfld.long 0x04 0. " RXPULSEINTTSTAT0 ,Receive interrupt status" "Not pending,Pending" line.long 0x08 "CMTXINTSTAT,EMAC Control Module Transmit Interrupt Status Register" bitfld.long 0x08 7. " TXPULSEINTTSTAT7 ,Transmit interrupt status" "Not pending,Pending" bitfld.long 0x08 6. " TXPULSEINTTSTAT6 ,Transmit interrupt status" "Not pending,Pending" textline " " bitfld.long 0x08 5. " TXPULSEINTTSTAT5 ,Transmit interrupt status" "Not pending,Pending" bitfld.long 0x08 4. " TXPULSEINTTSTAT4 ,Transmit interrupt status" "Not pending,Pending" textline " " bitfld.long 0x08 3. " TXPULSEINTTSTAT3 ,Transmit interrupt status" "Not pending,Pending" bitfld.long 0x08 2. " TXPULSEINTTSTAT2 ,Transmit interrupt status" "Not pending,Pending" textline " " bitfld.long 0x08 1. " TXPULSEINTTSTAT1 ,Transmit interrupt status" "Not pending,Pending" bitfld.long 0x08 0. " TXPULSEINTTSTAT0 ,Transmit interrupt status" "Not pending,Pending" line.long 0x0c "CMMISCINTSTAT,EMAC Control Module Miscellaneous Interrupt Status Register" bitfld.long 0x0c 3. " STATPENDINTSTAT ,EMAC module statistics interrupt status" "Not pending,Pending" bitfld.long 0x0c 2. " HOSTPENDINTSTAT ,EMAC module host error interrupt status" "Not pending,Pending" textline " " bitfld.long 0x0c 1. " LINKINTSTAT ,EMAC module link change interrupt status" "Not pending,Pending" bitfld.long 0x0c 0. " USERINTSTAT ,EMAC module user interrupt status" "Not pending,Pending" group.long 0x70++0x7 line.long 0x00 "CMRXINTMAX,EMAC Control Module Receive Interrupts per Millisecond Register" bitfld.long 0x00 0.--5. " RXIMAX ,Receive interrupts per millisecond" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "CMTXINTMA,EMAC Control Module Transmit Interrupts per Millisecond Register" bitfld.long 0x04 0.--5. " TXIMAX ,Transmit interrupts per millisecond" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0xb tree.end tree "MDIO Registers" base asd:0x01d0B000 width 9. sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "VERSION,MDIO Version Register" hexmask.long.word 0x00 16.--31. 1. " MODID ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " REVMAJ ,Major revision of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVMIN ,Minor revision of peripheral" endif group.long 0x04++0x7 line.long 0x00 "CONTROL,MDIO Control Register" bitfld.long 0x00 31. " IDLE ,MDIO state machine IDLE status" "Busy,Idle" bitfld.long 0x00 30. " ENABLE ,MDIO state machine enable control" "Disabled,Enabled" hexmask.long.byte 0x00 24.--28. 1. " HUC ,Highest User-access Channel" textline " " bitfld.long 0x00 20. " PREAMBLE ,MDIO frame preamble disable" "No,Yes" eventfld.long 0x00 19. " FAULT ,Fault indicator" "No failure,Failure" bitfld.long 0x00 18. " FAULTENB ,Fault detect enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " CLKDIV ,Clock divider" line.long 0x04 "ALIVE,MDIO PHY Alive Indication Register" eventfld.long 0x04 31. " ALIVE[31] ,MDIO ALIVE bit 31" "Not acknowledged,Acknowledged" eventfld.long 0x04 30. " ALIVE[30] ,MDIO ALIVE bit 30" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 29. " ALIVE[29] ,MDIO ALIVE bit 29" "Not acknowledged,Acknowledged" eventfld.long 0x04 28. " ALIVE[28] ,MDIO ALIVE bit 28" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 27. " ALIVE[27] ,MDIO ALIVE bit 27" "Not acknowledged,Acknowledged" eventfld.long 0x04 26. " ALIVE[26] ,MDIO ALIVE bit 26" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 25. " ALIVE[25] ,MDIO ALIVE bit 25" "Not acknowledged,Acknowledged" eventfld.long 0x04 24. " ALIVE[24] ,MDIO ALIVE bit 24" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 23. " ALIVE[23] ,MDIO ALIVE bit 23" "Not acknowledged,Acknowledged" eventfld.long 0x04 22. " ALIVE[22] ,MDIO ALIVE bit 22" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 21. " ALIVE[21] ,MDIO ALIVE bit 21" "Not acknowledged,Acknowledged" eventfld.long 0x04 20. " ALIVE[20] ,MDIO ALIVE bit 20" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 19. " ALIVE[19] ,MDIO ALIVE bit 19" "Not acknowledged,Acknowledged" eventfld.long 0x04 18. " ALIVE[18] ,MDIO ALIVE bit 18" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 17. " ALIVE[17] ,MDIO ALIVE bit 17" "Not acknowledged,Acknowledged" eventfld.long 0x04 16. " ALIVE[16] ,MDIO ALIVE bit 16" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 15. " ALIVE[15] ,MDIO ALIVE bit 15" "Not acknowledged,Acknowledged" eventfld.long 0x04 14. " ALIVE[14] ,MDIO ALIVE bit 14" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 13. " ALIVE[13] ,MDIO ALIVE bit 13" "Not acknowledged,Acknowledged" eventfld.long 0x04 12. " ALIVE[12] ,MDIO ALIVE bit 12" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 11. " ALIVE[11] ,MDIO ALIVE bit 11" "Not acknowledged,Acknowledged" eventfld.long 0x04 10. " ALIVE[10] ,MDIO ALIVE bit 10" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 9. " ALIVE[9] ,MDIO ALIVE bit 9" "Not acknowledged,Acknowledged" eventfld.long 0x04 8. " ALIVE[8] ,MDIO ALIVE bit 8" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 7. " ALIVE[7] ,MDIO ALIVE bit 7" "Not acknowledged,Acknowledged" eventfld.long 0x04 6. " ALIVE[6] ,MDIO ALIVE bit 6" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 5. " ALIVE[5] ,MDIO ALIVE bit 5" "Not acknowledged,Acknowledged" eventfld.long 0x04 4. " ALIVE[4] ,MDIO ALIVE bit 4" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 3. " ALIVE[3] ,MDIO ALIVE bit 3" "Not acknowledged,Acknowledged" eventfld.long 0x04 2. " ALIVE[2] ,MDIO ALIVE bit 2" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 1. " ALIVE[1] ,MDIO ALIVE bit 1" "Not acknowledged,Acknowledged" eventfld.long 0x04 0. " ALIVE[0] ,MDIO ALIVE bit 0" "Not acknowledged,Acknowledged" rgroup.long 0x0c++0x3 line.long 0x00 "LINK,MDIO PHY Link Status Register" bitfld.long 0x00 31. " LINK[31] ,MDIO link state bit 31" "No link,Link" bitfld.long 0x00 30. " LINK[30] ,MDIO link state bit 30" "No link,Link" bitfld.long 0x00 29. " LINK[29] ,MDIO link state bit 29" "No link,Link" textline " " bitfld.long 0x00 28. " LINK[28] ,MDIO link state bit 28" "No link,Link" bitfld.long 0x00 27. " LINK[27] ,MDIO link state bit 27" "No link,Link" bitfld.long 0x00 26. " LINK[26] ,MDIO link state bit 26" "No link,Link" textline " " bitfld.long 0x00 25. " LINK[25] ,MDIO link state bit 25" "No link,Link" bitfld.long 0x00 24. " LINK[24] ,MDIO link state bit 24" "No link,Link" bitfld.long 0x00 23. " LINK[23] ,MDIO link state bit 23" "No link,Link" textline " " bitfld.long 0x00 22. " LINK[22] ,MDIO link state bit 22" "No link,Link" bitfld.long 0x00 21. " LINK[21] ,MDIO link state bit 21" "No link,Link" bitfld.long 0x00 20. " LINK[20] ,MDIO link state bit 20" "No link,Link" textline " " bitfld.long 0x00 19. " LINK[19] ,MDIO link state bit 19" "No link,Link" bitfld.long 0x00 18. " LINK[18] ,MDIO link state bit 18" "No link,Link" bitfld.long 0x00 17. " LINK[17] ,MDIO link state bit 17" "No link,Link" textline " " bitfld.long 0x00 16. " LINK[16] ,MDIO link state bit 16" "No link,Link" bitfld.long 0x00 15. " LINK[15] ,MDIO link state bit 15" "No link,Link" bitfld.long 0x00 14. " LINK[14] ,MDIO link state bit 14" "No link,Link" textline " " bitfld.long 0x00 13. " LINK[13] ,MDIO link state bit 13" "No link,Link" bitfld.long 0x00 12. " LINK[12] ,MDIO link state bit 12" "No link,Link" bitfld.long 0x00 11. " LINK[11] ,MDIO link state bit 11" "No link,Link" textline " " bitfld.long 0x00 10. " LINK[10] ,MDIO link state bit 10" "No link,Link" bitfld.long 0x00 9. " LINK[9] ,MDIO link state bit 9" "No link,Link" bitfld.long 0x00 8. " LINK[8] ,MDIO link state bit 8" "No link,Link" textline " " bitfld.long 0x00 7. " LINK[7] ,MDIO link state bit 7" "No link,Link" bitfld.long 0x00 6. " LINK[6] ,MDIO link state bit 6" "No link,Link" bitfld.long 0x00 5. " LINK[5] ,MDIO link state bit 5" "No link,Link" textline " " bitfld.long 0x00 4. " LINK[4] ,MDIO link state bit 4" "No link,Link" bitfld.long 0x00 3. " LINK[3] ,MDIO link state bit 3" "No link,Link" bitfld.long 0x00 2. " LINK[2] ,MDIO link state bit 2" "No link,Link" textline " " bitfld.long 0x00 1. " LINK[1] ,MDIO link state bit 1" "No link,Link" bitfld.long 0x00 0. " LINK[0] ,MDIO link state bit 0" "No link,Link" width 18. group.long 0x10++0x7 line.long 0x00 "LINKINTRAW,MDIO Link Status Change Interrupt Register" eventfld.long 0x00 1. " LINKINTRAW1 ,MDIO link change event" "Not changed,Changed" eventfld.long 0x00 0. " LINKINTRAW0 ,MDIO link change event" "Not changed,Changed" line.long 0x04 "LINKINTMASKED,MDIO Link Status Change Interrupt (Masked) Register" eventfld.long 0x04 1. " LINKINTMASKED1 ,MDIO link change interrupt (Masked)" "Not changed,Changed" eventfld.long 0x04 0. " LINKINTMASKED0 ,MDIO link change interrupt (Masked)" "Not changed,Changed" group.long 0x20++0xf line.long 0x00 "USERINTRAW,MDIO User Command Complete Interrupt Register" eventfld.long 0x00 1. " USERINTRAW1 ,MDIO user command complete event" "Not completed,Completed" eventfld.long 0x00 0. " USERINTRAW0 ,MDIO user command complete event" "Not completed,Completed" line.long 0x04 "USERINTMASKED,MDIO User Command Complete Interrupt (Masked) Register" eventfld.long 0x04 1. " USERINTMASKED1 ,MDIO user command complete interrupt (Masked)" "Not completed,Completed" eventfld.long 0x04 0. " USERINTMASKED0 ,MDIO user command complete interrupt (Masked)" "Not completed,Completed" line.long 0x08 "USERINTMASKSET,MDIO User Command Complete Interrupt Mask Set Register" bitfld.long 0x08 1. " USERINTMASKSET1 ,MDIO user interrupt mask set" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " USERINTMASKSET0 ,MDIO user interrupt mask set" "Disabled,Enabled" line.long 0x0c "USERINTMASKCLEAR,MDIO User Command Complete Interrupt Mask Clear Register" eventfld.long 0x0c 1. " USERINTMASKCLEAR1 ,MDIO user command complete interrupt mask clear" "Enabled,Disabled" textline " " eventfld.long 0x0c 0. " USERINTMASKCLEAR0 ,MDIO user command complete interrupt mask clear" "Enabled,Disabled" group.long 0x80++0xf line.long 0x00 "USERACCESS0,MDIO User Access Register 0" bitfld.long 0x00 31. " GO ,GO bit" "No effect,MDIO accessed" bitfld.long 0x00 30. " WRITE ,Write enable" "Read,Write" textline " " bitfld.long 0x00 29. " ACK ,Acknowledge bit" "Not acknowledged,Acknowledged" hexmask.long.word 0x00 21.--25. 0x20 " REGADR ,Register address bits" textline " " hexmask.long.byte 0x00 16.--20. 1. " PHYADR ,PHY address bits" hexmask.long.word 0x00 0.--15. 1. " DATA ,User data bits" line.long 0x04 "USERPHYSEL0,MDIO User PHY Select Register 0" bitfld.long 0x04 7. " LINKSEL ,Link status determination select" "MDIO state machine,Not supported" bitfld.long 0x04 6. " LINKINTENB ,Link change interrupt enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 0.--4. 1. " PHYADRMON ,PHY address whose link status is to be monitored" line.long 0x08 "USERACCESS1,MDIO User Access Register 1" bitfld.long 0x08 31. " GO ,GO bit" "No effect,MDIO accessed" bitfld.long 0x08 30. " WRITE ,Write enable" "Read,Write" textline " " bitfld.long 0x08 29. " ACK ,Acknowledge bit" "Not acknowledged,Acknowledged" hexmask.long.word 0x08 21.--25. 0x20 " REGADR ,Register address bits" textline " " hexmask.long.byte 0x08 16.--20. 1. " PHYADR ,PHY address bits" hexmask.long.word 0x08 0.--15. 1. " DATA ,User data bits" line.long 0x0c "USERPHYSEL1,MDIO User PHY Select Register 1" bitfld.long 0x0c 7. " LINKSEL ,Link status determination select" "MDIO state machine,Not supported" bitfld.long 0x0c 6. " LINKINTENB ,Link change interrupt enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x0c 0.--4. 1. " PHYADRMON ,PHY address whose link status is to be monitored" width 0xb tree.end tree "EMAC Registers" base asd:0x01D07000 width 20. rgroup.long 0x00++0x3 line.long 0x00 "TXIDVER,Transmit Identification and Version Register" hexmask.long.word 0x00 16.--31. 1. " TXIDENT ,Transmit identification value" hexmask.long.byte 0x00 8.--15. 1. " TXMAJORVER ,Transmit major version" textline " " hexmask.long.byte 0x00 0.--7. 1. " TXMINORVER ,Transmit minor version" group.long 0x04++0x7 line.long 0x00 "TXCONTROL,Transmit Control Register" bitfld.long 0x00 0. " TXEN ,Transmit enable" "Disabled,Enabled" line.long 0x04 "TXTEARDOWN,Transmit Teardown Register" bitfld.long 0x04 0.--2. " TXTDNCH ,Transmit teardown channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" rgroup.long 0x10++0x3 line.long 0x00 "RXIDVER,Receive Identification and Version Register" hexmask.long.word 0x00 16.--31. 1. " RXIDENT ,Receive identification value" hexmask.long.byte 0x00 8.--15. 1. " RXMAJORVER ,Receive major version" textline " " hexmask.long.byte 0x00 0.--7. 1. " RXMINORVER ,Receive minor version" group.long 0x14++0x7 line.long 0x00 "RXCONTROL,Receive Control Register" bitfld.long 0x00 0. " RXEN ,Receive enable" "Disabled,Enabled" line.long 0x04 "RXTEARDOWN,Receive Teardown Register" bitfld.long 0x04 0.--2. " RXTDNCH ,Receive teardown channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" rgroup.long 0x80++0x7 line.long 0x00 "TXINTSTATRAW,Transmit Interrupt Status (Unmasked) Register" bitfld.long 0x00 7. " TX7PEND ,TX7PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 6. " TX6PEND ,TX6PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " TX5PEND ,TX5PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 4. " TX4PEND ,TX4PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " TX3PEND ,TX3PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 2. " TX2PEND ,TX2PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " TX1PEND ,TX1PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 0. " TX0PEND ,TX0PEND raw interrupt read" "No interrupt,Interrupt" line.long 0x04 "TXINTSTATMASKED,Transmit Interrupt Status (Masked) Register" bitfld.long 0x04 7. " TX7PEND ,TX7PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 6. " TX6PEND ,TX6PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " TX5PEND ,TX5PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 4. " TX4PEND ,TX4PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " TX3PEND ,TX3PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 2. " TX2PEND ,TX2PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " TX1PEND ,TX1PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 0. " TX0PEND ,TX0PEND masked interrupt read" "No interrupt,Interrupt" group.long 0x88++0x7 line.long 0x00 "TXINTMASKSET,Transmit Interrupt Mask Set Register" bitfld.long 0x00 7. " TX7MASK ,Transmit channel 7 interrupt mask set" "No effect,Set" bitfld.long 0x00 6. " TX6MASK ,Transmit channel 6 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 5. " TX5MASK ,Transmit channel 5 interrupt mask set" "No effect,Set" bitfld.long 0x00 4. " TX4MASK ,Transmit channel 4 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 3. " TX3MASK ,Transmit channel 3 interrupt mask set" "No effect,Set" bitfld.long 0x00 2. " TX2MASK ,Transmit channel 2 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 1. " TX1MASK ,Transmit channel 1 interrupt mask set" "No effect,Set" bitfld.long 0x00 0. " TX0MASK ,Transmit channel 0 interrupt mask set" "No effect,Set" line.long 0x04 "TXINTMASKCLEAR,Transmit Interrupt Mask Clear Register" eventfld.long 0x04 7. " TX7MASK ,Transmit channel 7 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 6. " TX6MASK ,Transmit channel 6 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 5. " TX5MASK ,Transmit channel 5 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 4. " TX4MASK ,Transmit channel 4 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 3. " TX3MASK ,Transmit channel 3 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 2. " TX2MASK ,Transmit channel 2 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 1. " TX1MASK ,Transmit channel 1 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 0. " TX0MASK ,Transmit channel 0 interrupt mask clear" "No effect,Cleared" rgroup.long 0x90++0x3 line.long 0x00 "MACINVECTOR,MAC Input Vector Register" bitfld.long 0x00 27. " STATPEND ,EMAC module statistics interrupt pending status" "Not pending,Pending" bitfld.long 0x00 26. " HOSTPEND ,EMAC module host error interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 25. " LINKINT ,MDIO module link change interrupt (LINKINT) pending status" "Not pending,Pending" bitfld.long 0x00 24. " USERINT ,MDIO module user interrupt (USERINT) pending status" "Not pending,Pending" textline " " bitfld.long 0x00 23. " TXPEND7 ,Transmit channel 7 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 22. " TXPEND6 ,Transmit channel 6 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 21. " TXPEND5 ,Transmit channel 5 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 20. " TXPEND4 ,Transmit channel 4 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 19. " TXPEND3 ,Transmit channel 3 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 18. " TXPEND2 ,Transmit channel 2 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 17. " TXPEND1 ,Transmit channel 1 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 16. " TXPEND0 ,Transmit channel 0 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 15. " RXTHRESHPEND7 ,Receive threshold channels 7 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 14. " RXTHRESHPEND6 ,Receive threshold channels 6 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " RXTHRESHPEND5 ,Receive threshold channels 5 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 12. " RXTHRESHPEND4 ,Receive threshold channels 4 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 11. " RXTHRESHPEND3 ,Receive threshold channels 3 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 10. " RXTHRESHPEND2 ,Receive threshold channels 2 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " RXTHRESHPEND1 ,Receive threshold channels 1 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 8. " RXTHRESHPEND0 ,Receive threshold channels 0 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 7. " RXPEND7 ,Receive channel 7 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 6. " RXPEND6 ,Receive channel 6 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 5. " RXPEND5 ,Receive channel 5 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 4. " RXPEND4 ,Receive channel 4 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 3. " RXPEND3 ,Receive channel 3 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 2. " RXPEND2 ,Receive channel 2 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 1. " RXPEND1 ,Receive channel 1 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 0. " RXPEND0 ,Receive channel 0 interrupt pending status" "Not pending,Pending" group.long 0x94++0x03 line.long 0x00 "MACEOIVECTOR,MAC End Of Interrupt Vector Register" bitfld.long 0x00 0.--1. " EOI ,End of interrupt" "RXTHRESH,RXPULSE,TXPULSE,Miscellaneous" rgroup.long 0xa0++0x7 line.long 0x00 "RXINTSTATRAW,Receive Interrupt Status (Unmasked) Register" bitfld.long 0x00 7. " RX7PEND ,RX7PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 6. " RX6PEND ,RX6PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RX5PEND ,RX5PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 4. " RX4PEND ,RX4PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RX3PEND ,RX3PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX2PEND ,RX2PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RX1PEND ,RX1PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 0. " RX0PEND ,RX0PEND raw interrupt read" "No interrupt,Interrupt" line.long 0x04 "RXINTSTATMASKED,Receive Interrupt Status (Masked) Register" bitfld.long 0x04 7. " RX7PEND ,RX7PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 6. " RX6PEND ,RX6PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " RX5PEND ,RX5PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 4. " RX4PEND ,RX4PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " RX3PEND ,RX3PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 2. " RX2PEND ,RX2PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " RX1PEND ,RX1PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 0. " RX0PEND ,RX0PEND masked interrupt read" "No interrupt,Interrupt" group.long 0xa8++0x7 line.long 0x00 "RXINTMASKSET,Receive Interrupt Mask Set Register" bitfld.long 0x00 7. " RX7MASK ,Receive channel 7 interrupt mask set" "No effect,Set" bitfld.long 0x00 6. " RX6MASK ,Receive channel 6 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 5. " RX5MASK ,Receive channel 5 interrupt mask set" "No effect,Set" bitfld.long 0x00 4. " RX4MASK ,Receive channel 4 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 3. " RX3MASK ,Receive channel 3 interrupt mask set" "No effect,Set" bitfld.long 0x00 2. " RX2MASK ,Receive channel 2 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 1. " RX1MASK ,Receive channel 1 interrupt mask set" "No effect,Set" bitfld.long 0x00 0. " RX0MASK ,Receive channel 0 interrupt mask set" "No effect,Set" line.long 0x04 "RXINTMASKCLEAR,Receive Interrupt Status Mask Clear Register" eventfld.long 0x04 7. " RX7MASK ,Receive channel 7 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 6. " RX6MASK ,Receive channel 6 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 5. " RX5MASK ,Receive channel 5 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 4. " RX4MASK ,Receive channel 4 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 3. " RX3MASK ,Receive channel 3 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 2. " RX2MASK ,Receive channel 2 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 1. " RX1MASK ,Receive channel 1 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 0. " RX0MASK ,Receive channel 0 interrupt mask clear" "No effect,Cleared" rgroup.long 0xb0++0x7 line.long 0x00 "MACINTSTATRAW,MAC Interrupt Status (Unmasked) Register" bitfld.long 0x00 1. " HOSTPEND ,Host pending interrupt" "Not pending,Pending" bitfld.long 0x00 0. " STATPEND ,Statistics pending interrupt" "Not pending,Pending" line.long 0x04 "MACINTSTATMASKED,MAC Interrupt Status (Masked) Register" bitfld.long 0x04 1. " HOSTPEND ,Host pending interrupt" "Not pending,Pending" bitfld.long 0x04 0. " STATPEND ,Statistics pending interrupt" "Not pending,Pending" group.long 0xb8++0x7 line.long 0x00 "MACINTMASKSET,MAC Interrupt Mask Set Register" bitfld.long 0x00 1. " HOSTMASK ,Host error interrupt mask set" "No effect,Set" bitfld.long 0x00 0. " STATMASK ,Statistics interrupt mask set" "No effect,Set" line.long 0x04 "MACINTMASKCLEAR,MAC Interrupt Mask Clear Register" eventfld.long 0x04 1. " HOSTMASK ,Host error interrupt mask clear" "No effect,Clear" eventfld.long 0x04 0. " STATMASK ,Statistics interrupt mask clear" "No effect,Clear" group.long 0x100++0x17 line.long 0x00 "RXMBPENABLE,Receive Multicast/Broadcast/Promiscuous Channel Enable Register" bitfld.long 0x00 30. " RXPASSCRC ,Pass received CRC enable" "Disabled,Enabled" bitfld.long 0x00 29. " RXQOSEN ,Receive quality of service (QOS) enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RXNOCHAIN ,Receive no buffer chaining" "Multiple,Single" bitfld.long 0x00 24. " RXCMFEN ,Receive copy MAC control frames enable" "Filtered,Transferred" textline " " bitfld.long 0x00 23. " RXCSFEN ,Receive copy short frames enable" "Filtered,Transferred" bitfld.long 0x00 22. " RXCEFEN ,Receive copy error frames enable" "Filtered,Transferred" textline " " bitfld.long 0x00 21. " RXCAFEN ,Receive copy all frames enable" "Filtered,Transferred" bitfld.long 0x00 16.--18. " RXPROMCH ,Receive promiscuous channel select" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" textline " " bitfld.long 0x00 13. " RXBROADEN ,Receive broadcast enable" "Filtered,Copied" bitfld.long 0x00 8.--10. " RXBROADCH ,Receive broadcast channel select" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" textline " " bitfld.long 0x00 5. " RXMULTEN ,Receive multicast enable" "Filtered,Copied" bitfld.long 0x00 0.--2. " RXMULTCH ,Receive multicast channel select" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" line.long 0x04 "RXUNICASTSET,Receive Unicast Enable Set Register" bitfld.long 0x04 7. " RXCH7EN ,Receive channel 7 unicast enable set" "No effect,Set" bitfld.long 0x04 6. " RXCH6EN ,Receive channel 6 unicast enable set" "No effect,Set" textline " " bitfld.long 0x04 5. " RXCH5EN ,Receive channel 5 unicast enable set" "No effect,Set" bitfld.long 0x04 4. " RXCH4EN ,Receive channel 4 unicast enable set" "No effect,Set" textline " " bitfld.long 0x04 3. " RXCH3EN ,Receive channel 3 unicast enable set" "No effect,Set" bitfld.long 0x04 2. " RXCH2EN ,Receive channel 2 unicast enable set" "No effect,Set" textline " " bitfld.long 0x04 1. " RXCH1EN ,Receive channel 1 unicast enable set" "No effect,Set" bitfld.long 0x04 0. " RXCH0EN ,Receive channel 0 unicast enable set" "No effect,Set" line.long 0x08 "RXUNICASTCLEAR,Receive Unicast Clear Register" eventfld.long 0x08 7. " RXCH7EN ,Receive channel 7 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 6. " RXCH6EN ,Receive channel 6 unicast enable clear" "No effect,Cleared" textline " " eventfld.long 0x08 5. " RXCH5EN ,Receive channel 5 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 4. " RXCH4EN ,Receive channel 4 unicast enable clear" "No effect,Cleared" textline " " eventfld.long 0x08 3. " RXCH3EN ,Receive channel 3 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 2. " RXCH2EN ,Receive channel 2 unicast enable clear" "No effect,Cleared" textline " " eventfld.long 0x08 1. " RXCH1EN ,Receive channel 1 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 0. " RXCH0EN ,Receive channel 0 unicast enable clear" "No effect,Cleared" line.long 0x0c "RXMAXLEN,Receive Maximum Length Register" hexmask.long.word 0x0c 0.--15. 1. " RXMAXLEN ,Received maximum frame length" line.long 0x10 "RXBUFFEROFFSET,Receive Buffer Offset Register" hexmask.long.word 0x10 0.--15. 1. " RXBUFFEROFFSET ,Receive buffer offset" line.long 0x14 "RXFILTERLOWTHRESH,Receive Filter Low Priority Frame Threshold Register" hexmask.long.byte 0x14 0.--7. 1. " RXFILTERTHRESH ,Receive filter low threshold" group.long 0x120++0x1f line.long 0x0 "RX0FLOWTHRESH,Receive Channel 0 Flow Control Threshold Register" hexmask.long.byte 0x0 0.--7. 1. " RX0FLOWTHRESH ,Receive flow threshold" line.long 0x4 "RX1FLOWTHRESH,Receive Channel 1 Flow Control Threshold Register" hexmask.long.byte 0x4 0.--7. 1. " RX1FLOWTHRESH ,Receive flow threshold" line.long 0x8 "RX2FLOWTHRESH,Receive Channel 2 Flow Control Threshold Register" hexmask.long.byte 0x8 0.--7. 1. " RX2FLOWTHRESH ,Receive flow threshold" line.long 0xC "RX3FLOWTHRESH,Receive Channel 3 Flow Control Threshold Register" hexmask.long.byte 0xC 0.--7. 1. " RX3FLOWTHRESH ,Receive flow threshold" line.long 0x10 "RX4FLOWTHRESH,Receive Channel 4 Flow Control Threshold Register" hexmask.long.byte 0x10 0.--7. 1. " RX4FLOWTHRESH ,Receive flow threshold" line.long 0x14 "RX5FLOWTHRESH,Receive Channel 5 Flow Control Threshold Register" hexmask.long.byte 0x14 0.--7. 1. " RX5FLOWTHRESH ,Receive flow threshold" line.long 0x18 "RX6FLOWTHRESH,Receive Channel 6 Flow Control Threshold Register" hexmask.long.byte 0x18 0.--7. 1. " RX6FLOWTHRESH ,Receive flow threshold" line.long 0x1C "RX7FLOWTHRESH,Receive Channel 7 Flow Control Threshold Register" hexmask.long.byte 0x1C 0.--7. 1. " RX7FLOWTHRESH ,Receive flow threshold" wgroup.long 0x140++0x1f line.long 0x0 "RX0FREEBUFFER,Receive Channel 0 Free Buffer Count Register" hexmask.long.word 0x0 0.--15. 1. " RX0FREEBUF ,Receive free buffer count" line.long 0x4 "RX1FREEBUFFER,Receive Channel 1 Free Buffer Count Register" hexmask.long.word 0x4 0.--15. 1. " RX1FREEBUF ,Receive free buffer count" line.long 0x8 "RX2FREEBUFFER,Receive Channel 2 Free Buffer Count Register" hexmask.long.word 0x8 0.--15. 1. " RX2FREEBUF ,Receive free buffer count" line.long 0xC "RX3FREEBUFFER,Receive Channel 3 Free Buffer Count Register" hexmask.long.word 0xC 0.--15. 1. " RX3FREEBUF ,Receive free buffer count" line.long 0x10 "RX4FREEBUFFER,Receive Channel 4 Free Buffer Count Register" hexmask.long.word 0x10 0.--15. 1. " RX4FREEBUF ,Receive free buffer count" line.long 0x14 "RX5FREEBUFFER,Receive Channel 5 Free Buffer Count Register" hexmask.long.word 0x14 0.--15. 1. " RX5FREEBUF ,Receive free buffer count" line.long 0x18 "RX6FREEBUFFER,Receive Channel 6 Free Buffer Count Register" hexmask.long.word 0x18 0.--15. 1. " RX6FREEBUF ,Receive free buffer count" line.long 0x1C "RX7FREEBUFFER,Receive Channel 7 Free Buffer Count Register" hexmask.long.word 0x1C 0.--15. 1. " RX7FREEBUF ,Receive free buffer count" group.long 0x160++0x3 line.long 0x00 "MACCONTROL,MAC Control Register" bitfld.long 0x00 14. " RXOFFLENBLOCK ,Receive offset / length word write block" "Not blocked,Blocked" bitfld.long 0x00 13. " RXOWNERSHIP ,Receive ownership write bit value" "Zero,One" textline " " bitfld.long 0x00 12. " RXFIFOFLOWEN ,Receive FIFO flow control enable" "Disabled,Enabled" bitfld.long 0x00 11. " CMDIDLE ,Command Idle" "Not commanded,Commanded" textline " " bitfld.long 0x00 9. " TXPTYPE ,Transmit queue priority type" "Round-robin,Fixed-priority" bitfld.long 0x00 6. " TXPACE ,Transmit pacing enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " MIIEN ,MII enable" "Disabled,Enabled" bitfld.long 0x00 4. " TXFLOWEN ,Transmit flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RXBUFFERFLOWEN ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " LOOPBACK ,Loopback mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FULLDUPLEX ,Full-duplex mode" "Half-duplex,Full-duplex" rgroup.long 0x164++0x3 line.long 0x00 "MACSTATUS,MAC Status Register" bitfld.long 0x00 31. " IDLE ,EMAC idle" "Busy,Idle" bitfld.long 0x00 20.--23. " TXERRCODE ,Transmit host error code" "NOERROR,SOPERROR,OWNERSHIP,NOEOP,NULLPTR,NULLLEN,LENERROR,?..." textline " " bitfld.long 0x00 16.--18. " TXERRCH ,Transmit host error channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" bitfld.long 0x00 12.--15. " RXERRCODE ,Receive host error code" "NOERROR,Reserved,OWNERSHIP,Reserved,NULLPTR,?..." textline " " bitfld.long 0x00 8.--10. " RXERRCH ,Receive host error channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" bitfld.long 0x00 2. " RXQOSACT ,Receive quality of service (QOS) active" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RXFLOWACT ,Receive flow control active" "Disabled,Enabled" bitfld.long 0x00 0. " TXFLOWACT ,Transmit flow control active" "Disabled,Enabled" group.long 0x168++0x7 line.long 0x00 "EMCONTROL,Emulation Control Register" bitfld.long 0x00 1. " SOFT ,Emulation soft bit" "0,1" bitfld.long 0x00 0. " FREE ,Emulation free bit" "0,1" line.long 0x04 "FIFOCONTROL,FIFO Control Register" hexmask.long.byte 0x04 16.--22. 1. " RXFIFOFLOWTHRESH ,Receive FIFO flow control threshold" hexmask.long.byte 0x04 0.--4. 1. " TXCELLTHRESH ,Transmit FIFO cell threshold" rgroup.long 0x170++0x3 line.long 0x00 "MACCONFIG,MAC Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " TXCELLDEPTH ,Transmit cell depth" hexmask.long.byte 0x00 16.--23. 1. " RXCELLDEPTH ,Receive cell depth" textline " " hexmask.long.byte 0x00 8.--15. 1. " ADDRESSTYPE ,Address type" hexmask.long.byte 0x00 0.--7. 1. " MACCFIG ,MAC configuration value" group.long 0x174++0x3 line.long 0x00 "SOFTRESET,Soft Reset Register" bitfld.long 0x00 0. " SOFTRESET ,Software reset" "No reset,Reset" group.long 0x1d0++0xf line.long 0x00 "MACSRCADDRLO,MAC Source Address Low Bytes Register" hexmask.long.byte 0x00 8.--15. 1. " MACSRCADDR0 ,MAC source address lower 8 bits (byte 0)" hexmask.long.byte 0x00 0.--7. 1. " MACSRCADDR1 ,MAC source address bits 15-8 (byte 1)" line.long 0x04 "MACSRCADDRHI,MAC Source Address High Bytes Register" hexmask.long.byte 0x04 24.--31. 1. " MACSRCADDR2 ,MAC source address bits 23-16 (byte 2)" hexmask.long.byte 0x04 16.--23. 1. " MACSRCADDR3 ,MAC source address bits 31-24 (byte 3)" textline " " hexmask.long.byte 0x04 8.--15. 1. " MACSRCADDR4 ,MAC source address bits 39-32 (byte 4)" hexmask.long.byte 0x04 0.--7. 1. " MACSRCADDR5 ,MAC source address bits 47-40 (byte 5)" line.long 0x08 "MACHASH1,MAC Address Hash 1 Register" line.long 0x0c "MACHASH2,MAC Address Hash 2 Register" rgroup.long 0x1e0++0xf line.long 0x00 "BOFFTEST,Back Off Test Register" hexmask.long.word 0x00 16.--25. 1. " RNDNUM ,Backoff random number generator" hexmask.long.byte 0x00 12.--15. 1. " COLLCOUNT ,Collision count" textline " " hexmask.long.word 0x00 0.--9. 1. " TXBACKOFF ,Backoff count" line.long 0x04 "TPACETEST,Transmit Pacing Algorithm Test Register" hexmask.long.byte 0x04 0.--4. 1. " PACEVAL ,Pacing register current value" line.long 0x08 "RXPAUSE,Receive Pause Timer Register" hexmask.long.word 0x08 0.--15. 1. " PAUSETIMER ,Pause timer value bits" line.long 0x0c "TXPAUSE,Transmit Pause Timer Register" hexmask.long.word 0x0c 0.--15. 1. " PAUSETIMER ,Pause timer value bits" group.long 0x500++0xb line.long 0x00 "MACADDRLO,MAC Address Low Bytes Register" bitfld.long 0x00 20. " VALID ,Address valid" "Not valid,Valid" bitfld.long 0x00 19. " MATCHFILT ,Match or filter" "Filtered,Matched" textline " " bitfld.long 0x00 16.--18. " CHANNEL ,Receive Channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" hexmask.long.byte 0x00 8.--15. 1. " MACADDR0 ,MAC address lower 8 bits (byte 0)" textline " " hexmask.long.byte 0x00 0.--7. 1. " MACADDR1 ,MAC address bits 15-8 (byte 1)" line.long 0x04 "MACADDRHI,MAC Address High Bytes Register" hexmask.long.byte 0x04 24.--31. 1. " MACADDR2 ,MAC source address bits 23-16 (byte 2)" hexmask.long.byte 0x04 16.--23. 1. " MACADDR3 ,MAC source address bits 31-24 (byte 3)" textline " " hexmask.long.byte 0x04 8.--15. 1. " MACADDR4 ,MAC source address bits 39-32 (byte 4)" hexmask.long.byte 0x04 0.--7. 1. " MACADDR5 ,MAC source address bits 47-40 (byte 5)" line.long 0x08 "MACINDEX,MAC Index Register" hexmask.long.byte 0x08 0.--2. 1. " MACINDEX ,MAC address index" group.long 0x600++0x1f line.long 0x0 "TX0HDP,Transmit Channel 0 DMA Head Descriptor Pointer Register" line.long 0x4 "TX1HDP,Transmit Channel 1 DMA Head Descriptor Pointer Register" line.long 0x8 "TX2HDP,Transmit Channel 2 DMA Head Descriptor Pointer Register" line.long 0xC "TX3HDP,Transmit Channel 3 DMA Head Descriptor Pointer Register" line.long 0x10 "TX4HDP,Transmit Channel 4 DMA Head Descriptor Pointer Register" line.long 0x14 "TX5HDP,Transmit Channel 5 DMA Head Descriptor Pointer Register" line.long 0x18 "TX6HDP,Transmit Channel 6 DMA Head Descriptor Pointer Register" line.long 0x1C "TX7HDP,Transmit Channel 7 DMA Head Descriptor Pointer Register" group.long 0x620++0x1f line.long 0x0 "RX0HDP,Receive Channel 0 DMA Head Descriptor Pointer Register" line.long 0x4 "RX1HDP,Receive Channel 1 DMA Head Descriptor Pointer Register" line.long 0x8 "RX2HDP,Receive Channel 2 DMA Head Descriptor Pointer Register" line.long 0xC "RX3HDP,Receive Channel 3 DMA Head Descriptor Pointer Register" line.long 0x10 "RX4HDP,Receive Channel 4 DMA Head Descriptor Pointer Register" line.long 0x14 "RX5HDP,Receive Channel 5 DMA Head Descriptor Pointer Register" line.long 0x18 "RX6HDP,Receive Channel 6 DMA Head Descriptor Pointer Register" line.long 0x1C "RX7HDP,Receive Channel 7 DMA Head Descriptor Pointer Register" group.long 0x640++0x1f line.long 0x0 "TX0CP,Transmit Channel 0 Completion Pointer Register" line.long 0x4 "TX1CP,Transmit Channel 1 Completion Pointer Register" line.long 0x8 "TX2CP,Transmit Channel 2 Completion Pointer Register" line.long 0xC "TX3CP,Transmit Channel 3 Completion Pointer Register" line.long 0x10 "TX4CP,Transmit Channel 4 Completion Pointer Register" line.long 0x14 "TX5CP,Transmit Channel 5 Completion Pointer Register" line.long 0x18 "TX6CP,Transmit Channel 6 Completion Pointer Register" line.long 0x1C "TX7CP,Transmit Channel 7 Completion Pointer Register" group.long 0x660++0x1f line.long 0x0 "RX0CP,Receive Channel 0 Completion Pointer Register" line.long 0x4 "RX1CP,Receive Channel 1 Completion Pointer Register" line.long 0x8 "RX2CP,Receive Channel 2 Completion Pointer Register" line.long 0xC "RX3CP,Receive Channel 3 Completion Pointer Register" line.long 0x10 "RX4CP,Receive Channel 4 Completion Pointer Register" line.long 0x14 "RX5CP,Receive Channel 5 Completion Pointer Register" line.long 0x18 "RX6CP,Receive Channel 6 Completion Pointer Register" line.long 0x1C "RX7CP,Receive Channel 7 Completion Pointer Register" group.long 0x200++0x8f "Network Statistics Registers" line.long 0x00 "RXGOODFRAMES,Good Receive Frames Register" line.long 0x04 "RXBCASTFRAMES,Broadcast Receive Frames Register" line.long 0x08 "RXMCASTFRAMES,Multicast Receive Frames Register" line.long 0x0c "RXPAUSEFRAMES,Pause Receive Frames Register" line.long 0x10 "RXCRCERRORS,Receive CRC Errors Register" line.long 0x14 "RXALIGNCODEERRORS,Receive Alignment/Code Errors Register" line.long 0x18 "RXOVERSIZED,Receive Oversized Frames Register" line.long 0x1c "RXJABBER,Receive Jabber Frames Register" line.long 0x20 "RXUNDERSIZED,Receive Undersized Frames Register" line.long 0x24 "RXFRAGMENTS,Receive Frame Fragments Register" line.long 0x28 "RXFILTERED,Filtered Receive Frames Register" line.long 0x2c "RXQOSFILTERED,Receive QOS Filtered Frames Register" line.long 0x30 "RXOCTETS,Receive Octet Frames Register" line.long 0x34 "TXGOODFRAMES,Good Transmit Frames Register" line.long 0x38 "TXBCASTFRAMES,Broadcast Transmit Frames Register" line.long 0x3c "TXMCASTFRAMES,Multicast Transmit Frames Register" line.long 0x40 "TXPAUSEFRAMES,Pause Transmit Frames Register" line.long 0x44 "TXDEFERRED,Deferred Transmit Frames Register" line.long 0x48 "TXCOLLISION,Transmit Collision Frames Register" line.long 0x4c "TXSINGLECOLL,Transmit Single Collision Frames Register" line.long 0x50 "TXMULTICOLL,Transmit Multiple Collision Frames Register" line.long 0x54 "TXEXCESSIVECOLL,Transmit Excessive Collision Frames Register" line.long 0x58 "TXLATECOLL,Transmit Late Collision Frames Register" line.long 0x5c "TXUNDERRUN,Transmit Underrun Error Register" line.long 0x60 "TXCARRIERSENSE,Transmit Carrier Sense Errors Register" line.long 0x64 "TXOCTETS,Transmit Octet Frames Register" line.long 0x68 "FRAME64,Transmit and Receive 64 Octet Frames Register" line.long 0x6c "FRAME65T127,Transmit and Receive 65 to 127 Octet Frames Register" line.long 0x70 "FRAME128T255,Transmit and Receive 128 to 255 Octet Frames Register" line.long 0x74 "FRAME256T511,Transmit and Receive 256 to 511 Octet Frames Register" line.long 0x78 "FRAME512T1023,Transmit and Receive 512 to 1023 Octet Frames Register" line.long 0x7c "FRAME1024TUP,Transmit and Receive 1024 to RXMAXLEN Octet Frames Register" line.long 0x80 "NETOCTETS,Network Octet Frames Register" line.long 0x84 "RXSOFOVERRUNS,Receive FIFO or DMA Start of Frame Overruns Register" line.long 0x88 "RXMOFOVERRUNS,Receive FIFO or DMA Middle of Frame Overruns Register" line.long 0x8c "RXDMAOVERRUNS,Receive DMA Overruns Register" width 0xb tree.end tree.end tree "PRTCSS (Power Management and Real-Time Clock Subsystem)" base asd:0x01c69000 width 15. tree "PRTCIF (PRTC Interface Registers)" rgroup.long 0x00++0x03 line.long 0x00 "PID,PRTCIF peripheral ID register" group.long 0x04++0x13 line.long 0x00 "PRTCIF_CTRL,PRTCIF control register" bitfld.long 0x00 31. " BUSY ,Status" "Not busy,Busy" bitfld.long 0x00 25. " SIZE ,Access size" "4 bytes,8 bytes" bitfld.long 0x00 24. " DIR ,Access direction" "Write,Read" textline " " bitfld.long 0x00 23. " BENU ,Access byte enable for PRTCIF_UDATA MSB (0-No access 1-Access)" "0,1" bitfld.long 0x00 22. ",Access byte enable for PRTCIF_UDATA 3rd byte (0-No access 1-Access)" "0,1" bitfld.long 0x00 21. ",Access byte enable for PRTCIF_UDATA 2nd byte (0-No access 1-Access)" "0,1" bitfld.long 0x00 20. ",Access byte enable for PRTCIF_UDATA LSB (0-No access 1-Access)" "0,1" bitfld.long 0x00 19. " BENL ,Access byte enable for PRTCIF_LDATA MSB (0-No access 1-Access)" "0,1" bitfld.long 0x00 18. ",Access byte enable for PRTCIF_LDATA 3rd byte (0-No access 1-Access)" "0,1" bitfld.long 0x00 17. ",Access byte enable for PRTCIF_LDATA 2nd byte (0-No access 1-Access)" "0,1" bitfld.long 0x00 16. ",Access byte enable for PRTCIF_LDATA LSB (0-No access 1-Access)" "0,1" hexmask.long.byte 0x00 0.--7. 1. " ADRS ,PRTCSS target memory address" width 15. line.long 0x04 "PRTCIF_LDATA,PRTCIF access lower data register" line.long 0x08 "PRTCIF_UDATA,PRTCIF access upper data register" line.long 0x0c "PRTCIF_INTEN,PRTCIF interrupt enable register" bitfld.long 0x0c 1. " PRTCSS_INT_EN ,PRTCSS interrupt enable" "Disabled,Enabled" bitfld.long 0x0c 0. " PRTCIF_INT_EN ,PRTCIF interrupt enable" "Disabled,Enabled" line.long 0x10 "PRTCIF_INTFLG,PRTCIF interrupt flag register" eventfld.long 0x10 1. " PRTCSS_INT_FLAG ,PRTCSS interrupt flag" "No interrupt,Interrupt" eventfld.long 0x10 0. " PRTCIF_INT_FLAG ,PRTCIF interrupt flag" "No interrupt,Interrupt" tree.end width 18. tree "PRTCSS (Power Management and Real Time Clock Subsystem Registers)" group.long 0x08++0x03 saveout 0x04 %l 0x00 line.byte 0x00 "GO_OUT,Global output pin output data register" bitfld.byte 0x00 3. " PWCTRO_O3 ,PWCTRO output data" "Low,High" bitfld.byte 0x00 2. " PWCTRO_O2 ,PWCTRO output data" "Low,High" bitfld.byte 0x00 1. " PWCTRO_O1 ,PWCTRO output data" "Low,High" textline " " bitfld.byte 0x00 0. " PWCTRO_O0 ,PWCTRO output data" "Low,High" group.long 0x08++0x03 saveout 0x04 %l 0x01 line.byte 0x00 "GIO0_OUT,Global input/output pin output data register" bitfld.byte 0x00 6. " PWCTRIO_O6 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 5. " PWCTRIO_O5 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 4. " PWCTRIO_O4 ,PWCTRIO output data" "Low,High" textline " " bitfld.byte 0x00 3. " PWCTRIO_O3 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 2. " PWCTRIO_O2 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 1. " PWCTRIO_O1 ,PWCTRIO output data" "Low,High" textline " " bitfld.byte 0x00 0. " PWCTRIO_O0 ,PWCTRIO output data" "Low,High" group.long 0x08++0x03 saveout 0x04 %l 0x02 line.byte 0x00 "GIO_DIR,Global input/output pin direction register" bitfld.byte 0x00 6. " PWCTRIO_DIR6 ,PWCTRIO direction pin 6" "Output,Input" bitfld.byte 0x00 5. " PWCTRIO_DIR5 ,PWCTRIO direction pin 5" "Output,Input" bitfld.byte 0x00 4. " PWCTRIO_DIR4 ,PWCTRIO direction pin 4" "Output,Input" textline " " bitfld.byte 0x00 3. " PWCTRIO_DIR3 ,PWCTRIO direction pin 3" "Output,Input" bitfld.byte 0x00 2. " PWCTRIO_DIR2 ,PWCTRIO direction pin 2" "Output,Input" bitfld.byte 0x00 1. " PWCTRIO_DIR1 ,PWCTRIO direction pin 1" "Output,Input" textline " " bitfld.byte 0x00 0. " PWCTRIO_DIR0 ,PWCTRIO direction pin 0" "Output,Input" rgroup.byte 0x08++0x03 saveout 0x04 %l 0x03 line.byte 0x00 "GIO_IN,Global input/output pin input data register" bitfld.byte 0x00 6. " PWCTRIO_IN6 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 5. " PWCTRIO_IN5 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 4. " PWCTRIO_IN4 ,PWCTRIO input data" "Low,High" textline " " bitfld.byte 0x00 3. " PWCTRIO_IN3 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 2. " PWCTRIO_IN2 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 1. " PWCTRIO_IN1 ,PWCTRIO input data" "Low,High" textline " " bitfld.byte 0x00 0. " PWCTRIO_IN0 ,PWCTRIO input data" "Low,High" width 18. group.byte 0x08++0x03 saveout 0x04 %l 0x04 line.byte 0x00 "GIO_FUNC,Global input/output pin function register" bitfld.byte 0x00 5.--7. " PWM_PERIOD ,PWM period" "2,3,4,5,6,7,8,9" bitfld.byte 0x00 2.--4. " PWM_WIDTH ,PWM width" "16,32,64,128,256,512,1024,2048" textline " " bitfld.byte 0x00 0.--1. " GO2_FUNC ,Function enable" "PWCTRO,32.768 kHz clockout,PWM output (Polarity=0),PWM output (Polarity=1)" width 18. group.byte 0x08++0x03 saveout 0x04 %l 0x05 line.byte 0x00 "GIO_RISE_INT_EN,GIO rise interrupt enable register" bitfld.byte 0x00 6. " PWCTRIO_RINT6 ,Enable rising edge interrupt detection on PWCTRIO pin 6" "Disabled,Enabled" bitfld.byte 0x00 5. " PWCTRIO_RINT5 ,Enable rising edge interrupt detection on PWCTRIO pin 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " PWCTRIO_RINT4 ,Enable rising edge interrupt detection on PWCTRIO pin 4" "Disabled,Enabled" bitfld.byte 0x00 3. " PWCTRIO_RINT3 ,Enable rising edge interrupt detection on PWCTRIO pin 3" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PWCTRIO_RINT2 ,Enable rising edge interrupt detection on PWCTRIO pin 2" "Disabled,Enabled" bitfld.byte 0x00 1. " PWCTRIO_RINT1 ,Enable rising edge interrupt detection on PWCTRIO pin 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PWCTRIO_RINT0 ,Enable rising edge interrupt detection on PWCTRIO pin 0" "Disabled,Enabled" group.byte 0x08++0x03 saveout 0x04 %l 0x06 line.byte 0x00 "GIO_FALL_INT_EN,GIO fall interrupt enable register" bitfld.byte 0x00 6. " PWCTRIO_FINT6 ,Enable falling edge interrupt detection on PWCTRIO pin 6" "Disabled,Enabled" bitfld.byte 0x00 5. " PWCTRIO_FINT5 ,Enable falling edge interrupt detection on PWCTRIO pin 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " PWCTRIO_FINT4 ,Enable falling edge interrupt detection on PWCTRIO pin 4" "Disabled,Enabled" bitfld.byte 0x00 3. " PWCTRIO_FINT3 ,Enable falling edge interrupt detection on PWCTRIO pin 3" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PWCTRIO_FINT2 ,Enable falling edge interrupt detection on PWCTRIO pin 2" "Disabled,Enabled" bitfld.byte 0x00 1. " PWCTRIO_FINT1 ,Enable falling edge interrupt detection on PWCTRIO pin 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PWCTRIO_FINT0 ,Enable falling edge interrupt detection on PWCTRIO pin 0" "Disabled,Enabled" group.byte 0x08++0x03 saveout 0x04 %l 0x07 line.byte 0x00 "GIO_RISE_INT_FLG,GIO rise interrupt flag register" eventfld.byte 0x00 6. " PWCTRIO_RFLG6 ,Interrupt flag rising edge for PWCTRIO pin 6" "No interrupt,Interrupt" eventfld.byte 0x00 5. " PWCTRIO_RFLG5 ,Interrupt flag rising edge for PWCTRIO pin 5" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 4. " PWCTRIO_RFLG4 ,Interrupt flag rising edge for PWCTRIO pin 4" "No interrupt,Interrupt" eventfld.byte 0x00 3. " PWCTRIO_RFLG3 ,Interrupt flag rising edge for PWCTRIO pin 3" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 2. " PWCTRIO_RFLG2 ,Interrupt flag rising edge for PWCTRIO pin 2" "No interrupt,Interrupt" eventfld.byte 0x00 1. " PWCTRIO_RFLG1 ,Interrupt flag rising edge for PWCTRIO pin 6" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 0. " PWCTRIO_RFLG0 ,Interrupt flag rising edge for PWCTRIO pin 0" "No interrupt,Interrupt" group.byte 0x08++0x03 saveout 0x04 %l 0x08 line.byte 0x00 "GIO_FALL_INT_FLG,GIO fall interrupt flag register" eventfld.byte 0x00 6. " PWCTRIO_FFLG6 ,Interrupt flag register falling edge for PWCTRIO pin 6" "No interrupt,Interrupt" eventfld.byte 0x00 5. " PWCTRIO_FFLG5 ,Interrupt flag register falling edge for PWCTRIO pin 5" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 4. " PWCTRIO_FFLG4 ,Interrupt flag register falling edge for PWCTRIO pin 4" "No interrupt,Interrupt" eventfld.byte 0x00 3. " PWCTRIO_FFLG3 ,Interrupt flag register falling edge for PWCTRIO pin 3" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 2. " PWCTRIO_FFLG2 ,Interrupt flag register falling edge for PWCTRIO pin 2" "No interrupt,Interrupt" eventfld.byte 0x00 1. " PWCTRIO_FFLG1 ,Interrupt flag register falling edge for PWCTRIO pin 1" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 0. " PWCTRIO_FFLG0 ,Interrupt flag register falling edge for PWCTRIO pin 0" "No interrupt,Interrupt" group.byte 0x08++0x03 saveout 0x04 %l 0x0b line.byte 0x00 "INTC_EXTENA0,EXT interrupt enable 0 register" bitfld.byte 0x00 6. " PWCTRIO6 ,PWCTRIO6 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 5. " PWCTRIO5 ,PWCTRIO5 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " PWCTRIO4 ,PWCTRIO4 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " PWCTRIO3 ,PWCTRIO3 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PWCTRIO2 ,PWCTRIO2 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 1. " PWCTRIO1 ,PWCTRIO1 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PWCTRIO0 ,PWCTRIO0 interrupt enable" "Disabled,Enabled" group.byte 0x08++0x03 saveout 0x04 %l 0x0c line.byte 0x00 "INTC_EXTENA1,EXT interrupt enable 1 register" bitfld.byte 0x00 2. " TIMER ,Timer interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 1. " ALARM ,Alarm interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " WDT ,WDT interrupt enable" "Disabled,Enabled" rgroup.byte 0x08++0x03 saveout 0x04 %l 0x0d line.byte 0x00 "INTC_FLG0,Event interrupt flag 0 register" bitfld.byte 0x00 6. " PWCTRIO6 ,PWCTRIO6 interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x00 5. " PWCTRIO5 ,PWCTRIO5 interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 4. " PWCTRIO4 ,PWCTRIO4 interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x00 3. " PWCTRIO3 ,PWCTRIO3 interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 2. " PWCTRIO2 ,PWCTRIO2 interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x00 1. " PWCTRIO1 ,PWCTRIO1 interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 0. " PWCTRIO0 ,PWCTRIO0 interrupt flag" "No interrupt,Interrupt" rgroup.byte 0x08++0x03 saveout 0x04 %l 0x0e line.byte 0x01 "INTC_FLG1,Event interrupt flag 1 register" bitfld.byte 0x01 2. " TIMER ,Timer interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x01 1. " ALARM ,Alarm interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x01 0. " WDT ,WDT interrupt flag" "No interrupt,Interrupt" group.byte 0x08++0x03 saveout 0x04 %l 0x10 line.byte 0x00 "RTC_CTRL,RTC control register" bitfld.byte 0x00 7. " WDTBUSY ,WDT access busy flag" "Not busy,Busy" bitfld.byte 0x00 6. " WEN ,Watchdog timer enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " WDRT ,Watchdog timer reset" "No reset,Reset" eventfld.byte 0x00 4. " WDTFLG ,Watchdog timer interrupt flag bit" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " TE ,Timer enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TIEN ,Timer interrput enable" "Disabled,Enabled" textline " " eventfld.byte 0x00 1. " TMRFLG ,Timer interrupt flag bit" "No interrupt,Interrupt" bitfld.byte 0x00 0. " TMMD ,Timer run mode" "One-shot,Free-run" group.byte 0x08++0x03 saveout 0x04 %l 0x11 line.byte 0x00 "RTC_WDT,Watchdog timer counter register" group.byte 0x08++0x03 saveout 0x04 %l 0x12 line.byte 0x00 "RTC_TMR0,Timer counter 0 register" group.byte 0x08++0x03 saveout 0x04 %l 0x13 line.byte 0x00 "RTC_TMR1,Timer counter 1 register" group.byte 0x08++0x03 saveout 0x04 %l 0x14 line.byte 0x00 "RTC_CCTRL,Calendar control register" bitfld.byte 0x00 7. " CALBUSY ,Calendar access busy flag" "Not busy,Busy" bitfld.byte 0x00 5. " DAEN ,Day alarm enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " HAEN ,Hour alarm enable" "Disabled,Enabled" bitfld.byte 0x00 3. " MAEN ,Minute alarm enable" "Disabled,Enabled" textline " " eventfld.byte 0x00 2. " ALMFLG ,Alarm interrupt flag bit" "No interrupt,Interrupt" bitfld.byte 0x00 1. " AIEN ,Alarm interrput enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " CAEN ,Calendar enable" "Disabled,Enabled" group.byte 0x08++0x03 saveout 0x04 %l 0x15 line.byte 0x00 "RTC_SEC,Seconds register" bitfld.byte 0x00 4.--6. " SEC ,2nd digit of seconds" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. ",1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." group.byte 0x08++0x03 saveout 0x04 %l 0x16 line.byte 0x00 "RTC_MIN,Minutes register" bitfld.byte 0x00 04.--06. " MIN ,2nd digit of minutes" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 00.--03. ",1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." group.byte 0x08++0x03 saveout 0x04 %l 0x17 line.byte 0x00 "RTC_HOUR,Hours register" bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. ",1st digit of hours" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." group.byte 0x08++0x03 saveout 0x04 %l 0x18 line.byte 0x00 "RTC_DAY0,Days[7:0] register" group.byte 0x08++0x03 saveout 0x04 %l 0x19 line.byte 0x00 "RTC_DAY1,Days[14:8] register" hexmask.byte 0x00 0.--6. 1. " DAY[14:8] ,Days counter [14:8]" group.byte 0x08++0x03 saveout 0x04 %l 0x1a line.byte 0x00 "RTC_AMIN,Minutes Alarm register" bitfld.byte 0x00 04.--06. " AMIN ,2nd digit of minutes alarm" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 00.--03. ",1st digit of minutes alarm" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." group.byte 0x08++0x03 saveout 0x04 %l 0x1b line.byte 0x00 "RTC_AHOUR,Hour Alarm register" bitfld.byte 0x00 4.--5. " AHOUR ,2nd digit of hours alarm" "0,1,2,-" bitfld.byte 0x00 0.--3. ",1st digit of hours alarm" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." group.byte 0x08++0x03 saveout 0x04 %l 0x1c line.byte 0x00 "RTC_ADAY0,Days[7:0] Alarm register" group.byte 0x08++0x03 saveout 0x04 %l 0x1d line.byte 0x00 "RTC_ADAY1,Days[14:8] Alarm register" hexmask.byte 0x00 0.--6. 1. " ADAY[14:8] ,Days alarm [14:8]" group.byte 0x08++0x03 saveout 0x04 %l 0x20 line.byte 0x00 "CLKC_CNT,Clock control register" bitfld.byte 0x00 4.--7. " CLKC_WDT ,Divide value for WDT clock" "32.768 kHz,16.384 kHz,8.192 kHz,4.096 kHz,2.048 kHz,1.024 kHz,512 Hz,256 Hz,128 Hz,64 Hz,32 Hz,16 Hz,8 Hz,8 Hz,8 Hz,8 Hz" bitfld.byte 0x00 0.--3. " CLKC_PERI ,Divide value for peripheral clock" "32.768 kHz,16.384 kHz,8.192 kHz,4.096 kHz,2.048 kHz,1.024 kHz,512 Hz,256 Hz,128 Hz,64 Hz,32 Hz,16 Hz,8 Hz,8 Hz,8 Hz,8 Hz" if (((d.l(asd:(0x01c69000+0x04)))&0x2000000)==0x2000000) textline " " group.long 0x0c++0x03 saveout 0x04 %l 0x00 line.byte 0x00 "GO_OUT,Global output pin output data register" bitfld.byte 0x00 3. " PWCTRO_O3 ,PWCTRO output data" "Low,High" bitfld.byte 0x00 2. " PWCTRO_O2 ,PWCTRO output data" "Low,High" bitfld.byte 0x00 1. " PWCTRO_O1 ,PWCTRO output data" "Low,High" textline " " bitfld.byte 0x00 0. " PWCTRO_O0 ,PWCTRO output data" "Low,High" group.long 0x0c++0x03 saveout 0x04 %l 0x01 line.byte 0x00 "GIO0_OUT,Global input/output pin output data register" bitfld.byte 0x00 6. " PWCTRIO_O6 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 5. " PWCTRIO_O5 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 4. " PWCTRIO_O4 ,PWCTRIO output data" "Low,High" textline " " bitfld.byte 0x00 3. " PWCTRIO_O3 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 2. " PWCTRIO_O2 ,PWCTRIO output data" "Low,High" bitfld.byte 0x00 1. " PWCTRIO_O1 ,PWCTRIO output data" "Low,High" textline " " bitfld.byte 0x00 0. " PWCTRIO_O0 ,PWCTRIO output data" "Low,High" group.long 0x0c++0x03 saveout 0x04 %l 0x02 line.byte 0x00 "GIO_DIR,Global input/output pin direction register" bitfld.byte 0x00 6. " PWCTRIO_DIR6 ,PWCTRIO direction pin 6" "Output,Input" bitfld.byte 0x00 5. " PWCTRIO_DIR5 ,PWCTRIO direction pin 5" "Output,Input" bitfld.byte 0x00 4. " PWCTRIO_DIR4 ,PWCTRIO direction pin 4" "Output,Input" textline " " bitfld.byte 0x00 3. " PWCTRIO_DIR3 ,PWCTRIO direction pin 3" "Output,Input" bitfld.byte 0x00 2. " PWCTRIO_DIR2 ,PWCTRIO direction pin 2" "Output,Input" bitfld.byte 0x00 1. " PWCTRIO_DIR1 ,PWCTRIO direction pin 1" "Output,Input" textline " " bitfld.byte 0x00 0. " PWCTRIO_DIR0 ,PWCTRIO direction pin 0" "Output,Input" rgroup.byte 0x0c++0x03 saveout 0x04 %l 0x03 line.byte 0x00 "GIO_IN,Global input/output pin input data register" bitfld.byte 0x00 6. " PWCTRIO_IN6 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 5. " PWCTRIO_IN5 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 4. " PWCTRIO_IN4 ,PWCTRIO input data" "Low,High" textline " " bitfld.byte 0x00 3. " PWCTRIO_IN3 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 2. " PWCTRIO_IN2 ,PWCTRIO input data" "Low,High" bitfld.byte 0x00 1. " PWCTRIO_IN1 ,PWCTRIO input data" "Low,High" textline " " bitfld.byte 0x00 0. " PWCTRIO_IN0 ,PWCTRIO input data" "Low,High" width 18. group.byte 0x0c++0x03 saveout 0x04 %l 0x04 line.byte 0x00 "GIO_FUNC,Global input/output pin function register" bitfld.byte 0x00 5.--7. " PWM_PERIOD ,PWM period" "2,3,4,5,6,7,8,9" bitfld.byte 0x00 2.--4. " PWM_WIDTH ,PWM width" "16,32,64,128,256,512,1024,2048" textline " " bitfld.byte 0x00 0.--1. " GO2_FUNC ,Function enable" "PWCTRO,32.768 kHz clockout,PWM output (Polarity=0),PWM output (Polarity=1)" width 18. group.byte 0x0c++0x03 saveout 0x04 %l 0x05 line.byte 0x00 "GIO_RISE_INT_EN,GIO rise interrupt enable register" bitfld.byte 0x00 6. " PWCTRIO_RINT6 ,Enable rising edge interrupt detection on PWCTRIO pin 6" "Disabled,Enabled" bitfld.byte 0x00 5. " PWCTRIO_RINT5 ,Enable rising edge interrupt detection on PWCTRIO pin 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " PWCTRIO_RINT4 ,Enable rising edge interrupt detection on PWCTRIO pin 4" "Disabled,Enabled" bitfld.byte 0x00 3. " PWCTRIO_RINT3 ,Enable rising edge interrupt detection on PWCTRIO pin 3" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PWCTRIO_RINT2 ,Enable rising edge interrupt detection on PWCTRIO pin 2" "Disabled,Enabled" bitfld.byte 0x00 1. " PWCTRIO_RINT1 ,Enable rising edge interrupt detection on PWCTRIO pin 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PWCTRIO_RINT0 ,Enable rising edge interrupt detection on PWCTRIO pin 0" "Disabled,Enabled" group.byte 0x0c++0x03 saveout 0x04 %l 0x06 line.byte 0x00 "GIO_FALL_INT_EN,GIO fall interrupt enable register" bitfld.byte 0x00 6. " PWCTRIO_FINT6 ,Enable falling edge interrupt detection on PWCTRIO pin 6" "Disabled,Enabled" bitfld.byte 0x00 5. " PWCTRIO_FINT5 ,Enable falling edge interrupt detection on PWCTRIO pin 5" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " PWCTRIO_FINT4 ,Enable falling edge interrupt detection on PWCTRIO pin 4" "Disabled,Enabled" bitfld.byte 0x00 3. " PWCTRIO_FINT3 ,Enable falling edge interrupt detection on PWCTRIO pin 3" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PWCTRIO_FINT2 ,Enable falling edge interrupt detection on PWCTRIO pin 2" "Disabled,Enabled" bitfld.byte 0x00 1. " PWCTRIO_FINT1 ,Enable falling edge interrupt detection on PWCTRIO pin 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PWCTRIO_FINT0 ,Enable falling edge interrupt detection on PWCTRIO pin 0" "Disabled,Enabled" group.byte 0x0c++0x03 saveout 0x04 %l 0x07 line.byte 0x00 "GIO_RISE_INT_FLG,GIO rise interrupt flag register" eventfld.byte 0x00 6. " PWCTRIO_RFLG6 ,Interrupt flag rising edge for PWCTRIO pin 6" "No interrupt,Interrupt" eventfld.byte 0x00 5. " PWCTRIO_RFLG5 ,Interrupt flag rising edge for PWCTRIO pin 5" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 4. " PWCTRIO_RFLG4 ,Interrupt flag rising edge for PWCTRIO pin 4" "No interrupt,Interrupt" eventfld.byte 0x00 3. " PWCTRIO_RFLG3 ,Interrupt flag rising edge for PWCTRIO pin 3" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 2. " PWCTRIO_RFLG2 ,Interrupt flag rising edge for PWCTRIO pin 2" "No interrupt,Interrupt" eventfld.byte 0x00 1. " PWCTRIO_RFLG1 ,Interrupt flag rising edge for PWCTRIO pin 6" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 0. " PWCTRIO_RFLG0 ,Interrupt flag rising edge for PWCTRIO pin 0" "No interrupt,Interrupt" group.byte 0x0c++0x03 saveout 0x04 %l 0x08 line.byte 0x00 "GIO_FALL_INT_FLG,GIO fall interrupt flag register" eventfld.byte 0x00 6. " PWCTRIO_FFLG6 ,Interrupt flag register falling edge for PWCTRIO pin 6" "No interrupt,Interrupt" eventfld.byte 0x00 5. " PWCTRIO_FFLG5 ,Interrupt flag register falling edge for PWCTRIO pin 5" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 4. " PWCTRIO_FFLG4 ,Interrupt flag register falling edge for PWCTRIO pin 4" "No interrupt,Interrupt" eventfld.byte 0x00 3. " PWCTRIO_FFLG3 ,Interrupt flag register falling edge for PWCTRIO pin 3" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 2. " PWCTRIO_FFLG2 ,Interrupt flag register falling edge for PWCTRIO pin 2" "No interrupt,Interrupt" eventfld.byte 0x00 1. " PWCTRIO_FFLG1 ,Interrupt flag register falling edge for PWCTRIO pin 1" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 0. " PWCTRIO_FFLG0 ,Interrupt flag register falling edge for PWCTRIO pin 0" "No interrupt,Interrupt" group.byte 0x0c++0x03 saveout 0x04 %l 0x0b line.byte 0x00 "INTC_EXTENA0,EXT interrupt enable 0 register" bitfld.byte 0x00 6. " PWCTRIO6 ,PWCTRIO6 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 5. " PWCTRIO5 ,PWCTRIO5 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " PWCTRIO4 ,PWCTRIO4 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " PWCTRIO3 ,PWCTRIO3 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " PWCTRIO2 ,PWCTRIO2 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 1. " PWCTRIO1 ,PWCTRIO1 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " PWCTRIO0 ,PWCTRIO0 interrupt enable" "Disabled,Enabled" group.byte 0x0c++0x03 saveout 0x04 %l 0x0c line.byte 0x00 "INTC_EXTENA1,EXT interrupt enable 1 register" bitfld.byte 0x00 2. " TIMER ,Timer interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 1. " ALARM ,Alarm interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " WDT ,WDT interrupt enable" "Disabled,Enabled" rgroup.byte 0x0c++0x03 saveout 0x04 %l 0x0d line.byte 0x00 "INTC_FLG0,Event interrupt flag 0 register" bitfld.byte 0x00 6. " PWCTRIO6 ,PWCTRIO6 interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x00 5. " PWCTRIO5 ,PWCTRIO5 interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 4. " PWCTRIO4 ,PWCTRIO4 interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x00 3. " PWCTRIO3 ,PWCTRIO3 interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 2. " PWCTRIO2 ,PWCTRIO2 interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x00 1. " PWCTRIO1 ,PWCTRIO1 interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 0. " PWCTRIO0 ,PWCTRIO0 interrupt flag" "No interrupt,Interrupt" rgroup.byte 0x0c++0x03 saveout 0x04 %l 0x0e line.byte 0x01 "INTC_FLG1,Event interrupt flag 1 register" bitfld.byte 0x01 2. " TIMER ,Timer interrupt flag" "No interrupt,Interrupt" bitfld.byte 0x01 1. " ALARM ,Alarm interrupt flag" "No interrupt,Interrupt" textline " " bitfld.byte 0x01 0. " WDT ,WDT interrupt flag" "No interrupt,Interrupt" group.byte 0x0c++0x03 saveout 0x04 %l 0x10 line.byte 0x00 "RTC_CTRL,RTC control register" bitfld.byte 0x00 7. " WDTBUSY ,WDT access busy flag" "Not busy,Busy" bitfld.byte 0x00 6. " WEN ,Watchdog timer enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " WDRT ,Watchdog timer reset" "No reset,Reset" eventfld.byte 0x00 4. " WDTFLG ,Watchdog timer interrupt flag bit" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " TE ,Timer enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TIEN ,Timer interrput enable" "Disabled,Enabled" textline " " eventfld.byte 0x00 1. " TMRFLG ,Timer interrupt flag bit" "No interrupt,Interrupt" bitfld.byte 0x00 0. " TMMD ,Timer run mode" "One-shot,Free-run" group.byte 0x0c++0x03 saveout 0x04 %l 0x11 line.byte 0x00 "RTC_WDT,Watchdog timer counter register" group.byte 0x0c++0x03 saveout 0x04 %l 0x12 line.byte 0x00 "RTC_TMR0,Timer counter 0 register" group.byte 0x0c++0x03 saveout 0x04 %l 0x13 line.byte 0x00 "RTC_TMR1,Timer counter 1 register" group.byte 0x0c++0x03 saveout 0x04 %l 0x14 line.byte 0x00 "RTC_CCTRL,Calendar control register" bitfld.byte 0x00 7. " CALBUSY ,Calendar access busy flag" "Not busy,Busy" bitfld.byte 0x00 5. " DAEN ,Day alarm enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " HAEN ,Hour alarm enable" "Disabled,Enabled" bitfld.byte 0x00 3. " MAEN ,Minute alarm enable" "Disabled,Enabled" textline " " eventfld.byte 0x00 2. " ALMFLG ,Alarm interrupt flag bit" "No interrupt,Interrupt" bitfld.byte 0x00 1. " AIEN ,Alarm interrput enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " CAEN ,Calendar enable" "Disabled,Enabled" group.byte 0x0c++0x03 saveout 0x04 %l 0x15 line.byte 0x00 "RTC_SEC,Seconds register" bitfld.byte 0x00 4.--6. " SEC ,2nd digit of seconds" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. ",1st digit of seconds" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." group.byte 0x0c++0x03 saveout 0x04 %l 0x16 line.byte 0x00 "RTC_MIN,Minutes register" bitfld.byte 0x00 04.--06. " MIN ,2nd digit of minutes" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 00.--03. ",1st digit of minutes" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." group.byte 0x0c++0x03 saveout 0x04 %l 0x17 line.byte 0x00 "RTC_HOUR,Hours register" bitfld.byte 0x00 4.--5. " HOUR ,2nd digit of hours" "0,1,2,-" bitfld.byte 0x00 0.--3. ",1st digit of hours" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." group.byte 0x0c++0x03 saveout 0x04 %l 0x18 line.byte 0x00 "RTC_DAY0,Days[7:0] register" group.byte 0x0c++0x03 saveout 0x04 %l 0x19 line.byte 0x00 "RTC_DAY1,Days[14:8] register" hexmask.byte 0x00 0.--6. 1. " DAY[14:8] ,Days counter [14:8]" group.byte 0x0c++0x03 saveout 0x04 %l 0x1a line.byte 0x00 "RTC_AMIN,Minutes Alarm register" bitfld.byte 0x00 04.--06. " AMIN ,2nd digit of minutes alarm" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 00.--03. ",1st digit of minutes alarm" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." group.byte 0x0c++0x03 saveout 0x04 %l 0x1b line.byte 0x00 "RTC_AHOUR,Hour Alarm register" bitfld.byte 0x00 4.--5. " AHOUR ,2nd digit of hours alarm" "0,1,2,-" bitfld.byte 0x00 0.--3. ",1st digit of hours alarm" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." group.byte 0x0c++0x03 saveout 0x04 %l 0x1c line.byte 0x00 "RTC_ADAY0,Days[7:0] Alarm register" group.byte 0x0c++0x03 saveout 0x04 %l 0x1d line.byte 0x00 "RTC_ADAY1,Days[14:8] Alarm register" hexmask.byte 0x00 0.--6. 1. " ADAY[14:8] ,Days alarm [14:8]" group.byte 0x0c++0x03 saveout 0x04 %l 0x20 line.byte 0x00 "CLKC_CNT,Clock control register" bitfld.byte 0x00 4.--7. " CLKC_WDT ,Divide value for WDT clock" "32.768 kHz,16.384 kHz,8.192 kHz,4.096 kHz,2.048 kHz,1.024 kHz,512 Hz,256 Hz,128 Hz,64 Hz,32 Hz,16 Hz,8 Hz,8 Hz,8 Hz,8 Hz" bitfld.byte 0x00 0.--3. " CLKC_PERI ,Divide value for peripheral clock" "32.768 kHz,16.384 kHz,8.192 kHz,4.096 kHz,2.048 kHz,1.024 kHz,512 Hz,256 Hz,128 Hz,64 Hz,32 Hz,16 Hz,8 Hz,8 Hz,8 Hz,8 Hz" endif tree.end width 0xb tree.end tree "VC (Voice Codec)" base asd:0x01d0c000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "VC_PID,Voice Codec PID Register" hexmask.long.byte 0x00 0.--7. 1. " PID ,PID" group.long 0x04++0x07 line.long 0x00 "VC_CTRL,Voice Codec Control Register" bitfld.long 0x00 14. " WFIFOMD ,Write FIFO data request timing control" "8 word,1 word" bitfld.long 0x00 13. " WFIFOCL ,Write FIFO clear" "No effect,Cleared" bitfld.long 0x00 12. " WFIFOEN ,Write FIFO enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RFIFOMD ,Read FIFO data request timing control" "8 word,1 word" bitfld.long 0x00 9. " RFIFOCL ,Read FIFO clear" "No effect,Cleared" bitfld.long 0x00 8. " RFIFOEN ,Read FIFO enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " WDUNSIGNED ,Write Data sign bit control" "Signed,Unsigned" bitfld.long 0x00 6. " WDSIZE ,Write Data size" "16-bit,8-bit" bitfld.long 0x00 5. " RDUNSIGNED ,Read Data sign bit control" "Signed,Unsigned" textline " " bitfld.long 0x00 4. " RDSIZE ,Read Data size" "16-bit,8-bit" bitfld.long 0x00 1. " RSTDAC ,Analog DAC Reset" "No reset,Reset" bitfld.long 0x00 0. " RSTADC ,Analog ADC Reset" "No reset,Reset" line.long 0x04 "VC_INTEN,Voice Codec Interrupt enable Register" bitfld.long 0x04 5. " WERRUDR ,Interrupt enable for Write FIFO underrun error" "Disabled,Enabled" bitfld.long 0x04 4. " WERROVF ,Interrupt enable for Write FIFO overflow error" "Disabled,Enabled" bitfld.long 0x04 3. " WDREQ ,Interrupt enable for Write FIFO Data request" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " RERRUDR ,Interrupt enable for Read FIFO underrun error" "Disabled,Enabled" bitfld.long 0x04 1. " RERROVF ,Interrupt enable for Read FIFO overflow error" "Disabled,Enabled" bitfld.long 0x04 0. " RDRDY ,Interrupt enable for Read FIFO Data ready" "Disabled,Enabled" rgroup.long 0x0c++0x03 line.long 0x00 "VC_INTSTATUS,Voice Codec Interrupt status Register" bitfld.long 0x00 5. " WERRUDR ,Interrupt status for Write FIFO underrun error" "No interrupt,Interrupt" bitfld.long 0x00 4. " WERROVF ,Interrupt status for Write FIFO overflow error" "No interrupt,Interrupt" bitfld.long 0x00 3. " WDREQ ,Interrupt status for Write FIFO Data request" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " RERRUDR ,Interrupt status for Read FIFO underrun error" "No interrupt,Interrupt" bitfld.long 0x00 1. " RERROVF ,Interrupt status for Read FIFO overflow error" "No interrupt,Interrupt" bitfld.long 0x00 0. " RDRDY ,Interrupt status for Read FIFO Data ready" "No interrupt,Interrupt" wgroup.long 0x10++0x03 line.long 0x00 "VC_INTCLR,Voice Codec Interrupt status clear Register" bitfld.long 0x00 5. " WERRUDR ,Interrupt status for Write FIFO underrun error" "No effect,Clear" bitfld.long 0x00 4. " WERROVF ,Interrupt status for Write FIFO overflow error" "No effect,Clear" bitfld.long 0x00 3. " WDREQ ,Interrupt status for Write FIFO Data request" "No effect,Clear" textline " " bitfld.long 0x00 2. " RERRUDR ,Interrupt status for Read FIFO underrun error" "No effect,Clear" bitfld.long 0x00 1. " RERROVF ,Interrupt status for Read FIFO overflow error" "No effect,Clear" bitfld.long 0x00 0. " RDRDY ,Interrupt status for Read FIFO Data ready" "No effect,Clear" group.long 0x14++0x03 line.long 0x00 "VC_EMUL_CTRL,Voice Codec Emulator Control Register" bitfld.long 0x00 1. " SOFT ,Emulation soft bit" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Emulation free bit" "Disabled,Enabled" hgroup.long 0x20++0x03 hide.long 0x00 "RFIFO,Voice Codec Read FIFO access Register" in hgroup.long 0x24++0x03 hide.long 0x00 "WFIFO,Voice Codec Write FIFO access Register" in rgroup.long 0x28++0x03 line.long 0x00 "FIFOSTAT,Voice Codec FIFO Status Register" hexmask.long.byte 0x00 8.--12. 1. " WDATACOUNT ,WFIFO stored data count" hexmask.long.byte 0x00 0.--4. 1. " RDATACOUNT ,RFIFO stored data count" group.long 0x80++0x1b line.long 0x00 "VC_REG00,Notch filter 1 parameter Register" hexmask.long.byte 0x00 0.--7. 1. " NA1[7:0] ,Notch filter 1 coefficient [7:0]" line.long 0x04 "VC_REG01,Notch filter 1 parameter Register" hexmask.long.byte 0x04 0.--5. 1. " NA1[13:8] ,Notch filter 1 coefficient [13:8]" line.long 0x08 "VC_REG02,Notch filter 2 parameter Register" hexmask.long.byte 0x08 0.--7. 1. " NA2[7:0] ,Notch filter 2 coefficient [7:0]" line.long 0x0C "VC_REG03,Notch filter 2 parameter Register" hexmask.long.byte 0x0c 0.--5. 1. " NA2[13:8] ,Notch filter 2 coefficient [13:8]" line.long 0x10 "VC_REG04,Voice Codec Recording mode control Register" bitfld.long 0x10 3. " HPF ,High-pass filter enable or disable" "Enabled,Disabled" bitfld.long 0x10 2. " NTRST ,Reset control for notch filter" "No reset,Reset" bitfld.long 0x10 1. " NTEN ,Notch filter enable" "Enabled,Disabled" textline " " bitfld.long 0x10 0. " NTUP ,Notch filter coefficient update" "Not updated,Updated" line.long 0x14 "VC_REG05,Programmable Gain Amplifier (PGA) and Microphone gain control Register" bitfld.long 0x14 4. " ZCAEN ,Zero cross enable for ALC" "Disabled,Enabled" bitfld.long 0x14 3. " ZCREN ,Zero cross detection enable for MIC gain and PGA update" "Disabled,Enabled" bitfld.long 0x14 2. " GAA ,Gain setting of MIC amplifier" "20 dB,26 dB" textline " " bitfld.long 0x14 0.--1. " GAD ,Gain setting of digital PGA" "0 dB,6 dB,12 dB,18 dB" line.long 0x18 "VC_REG06,Automatic Level control Register" bitfld.long 0x18 0. " ALCEN ,Automatic Level Control enable" "Disabled,Enabled" group.long 0xA4++0x07 line.long 0x00 "VC_REG09,Digital soft mute/attenuation control Register" bitfld.long 0x00 6. " PMUT ,Digital soft mute for DAC" "Disabled,Enabled" bitfld.long 0x00 0.--5. " AT ,Digital attenuation for DAC" "Mute,-62 dB,-60 dB,-58 dB,-56 dB,-54 dB,-52 dB,-50 dB,-48 dB,-46 dB,-44dB,-42 dB,-40 dB,-38 dB,-36 dB,-34 dB,-32 dB,-30 dB,-28 dB,-26 dB,-24 dB,-22 dB,-20 dB,-18 dB,-16 dB,-14 dB,-12 dB,-10 dB,-8 dB,-4 dB,-2 dB,0 dB,?..." line.long 0x04 "VC_REG10,Zero cross detection control Register" bitfld.long 0x04 0. " ZCEN ,Zero cross detection enable for DAC soft mute and attenuation update" "Disabled,Enabled" group.long 0xB0++0x03 line.long 0x00 "VC_REG12,Voice Codec Power up/down control Register" bitfld.long 0x00 7. " PDSP ,Power up/down control for speaker amplifier" "Power down,Power up" bitfld.long 0x00 6. " PDLN ,Power up/down control for line amplifier" "Power down,Power up" bitfld.long 0x00 5. " PDDA ,Power up/down control for DAC" "Power down,Power up" textline " " bitfld.long 0x00 4. " PDAD ,Power up/down control for ADC" "Power down,Power up" bitfld.long 0x00 3. " PDMC ,Power up/down control for MIC amplifier" "Power down,Power up" bitfld.long 0x00 2. " PDBS ,Power up/down control for bias generator" "Power down,Power up" textline " " bitfld.long 0x00 0. " PDCM ,Power up/down control for VCOM" "Power down,Power up" width 0xb tree.end tree "KeyScan" base asd:0x01C69400 width 14. group.long 0x00++0x07 line.long 0x00 "KEYCTRL,Key Control Register" bitfld.long 0x00 6. " MODE ,Key matrix type" "4x4,5x3" bitfld.long 0x00 5. " OUTPUTTYPE ,Output type" "Active low,Always out" bitfld.long 0x00 4. " SCANMODE ,Scan mode select bit" "Scan interval,Channel interval" textline " " bitfld.long 0x00 3. " AUTODET ,Automatic key detection function select bit" "Off,On" bitfld.long 0x00 2. " CHATOFF ,Anti-chatter function select bit" "On,Off" bitfld.long 0x00 1. " PREVMODE ,Previous status update mode select bit" "Previous,First bottom" textline " " bitfld.long 0x00 0. " KEYEN ,Module enable" "Disabled,Enabled" line.long 0x04 "INTCENA,Interrupt Enable Control Register" bitfld.long 0x04 3. " CONTIENA ,Continuous Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 2. " OFFENA ,Key Data All Off Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 1. " ONENA ,Key Data On Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CHNGENA ,Key Data Change Interrupt Enable" "Disabled,Enabked" rgroup.long 0x08++0x03 line.long 0x00 "INTFLG,Interrupt Flag Control Register" bitfld.long 0x00 3. " CONTIFLG ,Continuous Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 2. " OFFFLG ,Key Data All Off Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 1. " ONFLG ,Key Data On Interrupt Flag" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " CHNGFLG ,Key Data Change Interrupt Flag" "No interrupt,Interrupt" group.long 0x0c++0x0f line.long 0x00 "INTCLR,Interrupt Clear Control Register" eventfld.long 0x00 3. " CONTICLR ,Continuous Interrupt Flag Clear" "No effect,Cleared" eventfld.long 0x00 2. " OFFCLR ,Key Data All Off Interrupt Flag Clear" "No effect,Cleared" eventfld.long 0x00 1. " ONCLR ,Key Data On Interrupt Flag Clear" "No effect,Cleared" textline " " eventfld.long 0x00 0. " CHNGCLR ,Key Data Change Interrupt Flag Clear" "No effect,Cleared" line.long 0x04 "STRBWIDTH,Strobe Width Register" hexmask.long.byte 0x04 0.--7. 1. " STWIDTH ,Strobe width set bit" line.long 0x08 "INTERVALTIME,Interval Time Register" hexmask.long.byte 0x08 0.--7. 1. " INTERVAL ,Interval width set bit" line.long 0x0c "CONTITIME,Continuous Timer Register" hexmask.long.byte 0x0c 0.--7. 1. " CONTTIMER ,Interval of the Timer Interrupt flag output set bit" width 14. rgroup.long 0x1C++0x0b line.long 0x00 "CURRENTST,Key Scan Current Status Register" bitfld.long 0x00 15. " CURST[15] ,Current key status bit 15" "On,Off" bitfld.long 0x00 14. " CURST[14] ,Current key status bit 14" "On,Off" bitfld.long 0x00 13. " CURST[13] ,Current key status bit 13" "On,Off" bitfld.long 0x00 12. " CURST[12] ,Current key status bit 12" "On,Off" textline " " bitfld.long 0x00 11. " CURST[11] ,Current key status bit 11" "On,Off" bitfld.long 0x00 10. " CURST[10] ,Current key status bit 10" "On,Off" bitfld.long 0x00 9. " CURST[9] ,Current key status bit 9" "On,Off" bitfld.long 0x00 8. " CURST[8] ,Current key status bit 8" "On,Off" textline " " bitfld.long 0x00 7. " CURST[7] ,Current key status bit 7" "On,Off" bitfld.long 0x00 6. " CURST[6] ,Current key status bit 6" "On,Off" bitfld.long 0x00 5. " CURST[5] ,Current key status bit 5" "On,Off" bitfld.long 0x00 4. " CURST[4] ,Current key status bit 4" "On,Off" textline " " bitfld.long 0x00 3. " CURST[3] ,Current key status bit 3" "On,Off" bitfld.long 0x00 2. " CURST[2] ,Current key status bit 2" "On,Off" bitfld.long 0x00 1. " CURST[1] ,Current key status bit 1" "On,Off" bitfld.long 0x00 0. " CURST[0] ,Current key status bit 0" "On,Off" line.long 0x04 "PREVIOUSST,Key Scan Previous Status Register" bitfld.long 0x04 15. " PREST[15] ,Previous key status bit 15" "On,Off" bitfld.long 0x04 14. " PREST[14] ,Previous key status bit 14" "On,Off" bitfld.long 0x04 13. " PREST[13] ,Previous key status bit 13" "On,Off" bitfld.long 0x04 12. " PREST[12] ,Previous key status bit 12" "On,Off" textline " " bitfld.long 0x04 11. " PREST[11] ,Previous key status bit 11" "On,Off" bitfld.long 0x04 10. " PREST[10] ,Previous key status bit 10" "On,Off" bitfld.long 0x04 9. " PREST[9] ,Previous key status bit 9" "On,Off" bitfld.long 0x04 8. " PREST[8] ,Previous key status bit 8" "On,Off" textline " " bitfld.long 0x04 7. " PREST[7] ,Previous key status bit 7" "On,Off" bitfld.long 0x04 6. " PREST[6] ,Previous key status bit 6" "On,Off" bitfld.long 0x04 5. " PREST[5] ,Previous key status bit 5" "On,Off" bitfld.long 0x04 4. " PREST[4] ,Previous key status bit 4" "On,Off" textline " " bitfld.long 0x04 3. " PREST[3] ,Previous key status bit 3" "On,Off" bitfld.long 0x04 2. " PREST[2] ,Previous key status bit 2" "On,Off" bitfld.long 0x04 1. " PREST[1] ,Previous key status bit 1" "On,Off" bitfld.long 0x04 0. " PREST[0] ,Previous key status bit 0" "On,Off" line.long 0x08 "EMUCTRL,Emulation Control Register" bitfld.long 0x08 2. " RT_SEL ,RT_SEL support only emulation suspend" "Not supported,Supported" bitfld.long 0x08 1. " SOFT ,Key scan supports only soft stop" "Not supported,Supported" bitfld.long 0x08 0. " FREERUN ,Emulation free bit" "Disabled,Enabled" width 0xb tree.end tree "ADCIF (Analog to Digital Converter Interface)" base asd:0x01c23c00 width 9. group.long 0x00++0x17 line.long 0x00 "ADCTL,Control register" bitfld.long 0x00 7. " BUSY ,Busy flag" "Not busy,Busy" eventfld.long 0x00 6. " CMPFLG ,Comparator interrupt flag clear bit" "No interupt,Interrupt" bitfld.long 0x00 5. " CMPIEN ,Comparator interrupt enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CMPMD ,Comparator mode select bit" "Low,High" eventfld.long 0x00 3. " SCNFLG ,Scan interrupt flag clear bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " SCNIEN ,Scan interrupt enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SCNMD ,Scan mode selection" "One shot,Free run" bitfld.long 0x00 0. " START ,A/D conversion start bit" "Not started,Started" line.long 0x04 "CMPTGT,Comparator target channel" hexmask.long.byte 0x04 0.--5. 1. " CMPTGT ,Comparator target channel at A/D conversion" line.long 0x08 "CMPLDAT,Comparison A/D Lower data" hexmask.long.word 0x08 0.--9. 1. " CMPLDAT ,Comparative data (lower) value of CMPLDAT" line.long 0x0C "CMPUDAT,Comparison A/D Upper data" hexmask.long.word 0x0c 0.--9. 1. " CMPUDAT ,Comparativer data (upper) value of CMPUDAT" line.long 0x10 "SETDIV,Setup divide value for start A/D conversion" hexmask.long.word 0x10 0.--15. 1. " SETDIV ,SETDIV bits set the Analog switch setup time" line.long 0x14 "CHSEL,Analog Input channel select" bitfld.long 0x14 5. " CHSEL5 ,A/D conversion select channel 5" "Not selected,Selected" bitfld.long 0x14 4. " CHSEL4 ,A/D conversion select channel 4" "Not selected,Selected" bitfld.long 0x14 3. " CHSEL3 ,A/D conversion select channel 3" "Not selected,Selected" textline " " bitfld.long 0x14 2. " CHSEL2 ,A/D conversion select channel 2" "Not selected,Selected" bitfld.long 0x14 1. " CHSEL1 ,A/D conversion select channel 1" "Not selected,Selected" bitfld.long 0x14 0. " CHSEL0 ,A/D conversion select channel 0" "Not selected,Selected" rgroup.long 0x18++0x17 line.long 0x0 "AD0DAT,A/D conversion data 0" hexmask.long.word 0x0 0.--9. 1. " AD0DAT ,A/D conversion data for channel 0" line.long 0x4 "AD1DAT,A/D conversion data 1" hexmask.long.word 0x4 0.--9. 1. " AD1DAT ,A/D conversion data for channel 1" line.long 0x8 "AD2DAT,A/D conversion data 2" hexmask.long.word 0x8 0.--9. 1. " AD2DAT ,A/D conversion data for channel 2" line.long 0xC "AD3DAT,A/D conversion data 3" hexmask.long.word 0xC 0.--9. 1. " AD3DAT ,A/D conversion data for channel 3" line.long 0x10 "AD4DAT,A/D conversion data 4" hexmask.long.word 0x10 0.--9. 1. " AD4DAT ,A/D conversion data for channel 4" line.long 0x14 "AD5DAT,A/D conversion data 5" hexmask.long.word 0x14 0.--9. 1. " AD5DAT ,A/D conversion data for channel 5" group.long 0x30++0x03 line.long 0x00 "EMUCTRL,Emulation Control" bitfld.long 0x00 2. " RT_SEL ,RT_SEL support only emulation suspend" "Not supported,Supported" bitfld.long 0x00 1. " SOFT ,Key scan supports only soft stop" "Not supported,Supported" bitfld.long 0x00 0. " FREE ,Emulation free bit" "Disabled,Enabled" width 0xb tree.end tree "RTO (Real Time Out Controller)" base asd:0x01c20c00 width 13. rgroup.long 0x00++0x3 line.long 0x00 "REVID,RTO Controller Revision ID Register" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" textline " " hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" textline " " hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" group.long 0x04++0x3 line.long 0x00 "CTRL_STATUS,RTO Controller Control and Status Register" bitfld.long 0x00 21. " OUTSTATE[3] ,Output signal status bit[3]" "Low,High" bitfld.long 0x00 20. " OUTSTATE[2] ,Output signal status bit[2]" "Low,High" textline " " bitfld.long 0x00 19. " OUTSTATE[1] ,Output signal status bit[1]" "Low,High" bitfld.long 0x00 18. " OUTSTATE[0] ,Output signal status bit[0]" "Low,High" textline " " bitfld.long 0x00 17. " SOURCEPOLARITY ,Event source bit" "High,Low" bitfld.long 0x00 16. " OVERRUN ,Overrun condition bit" "Not occurred,Occurred" textline " " bitfld.long 0x00 15. " OPMASKDATA[3] ,Output mask[3]" "Not changed,Changed" bitfld.long 0x00 14. " OPMASKDATA[2] ,Output mask[2]" "Not changed,Changed" textline " " bitfld.long 0x00 13. " OPMASKDATA[1] ,Output mask[1]" "Not changed,Changed" bitfld.long 0x00 12. " OPMASKDATA[0] ,Output mask[0]" "Not changed,Changed" textline " " bitfld.long 0x00 11. " OPPATTERNDATA[3] ,Output pattern mode bit[3]" "Not changed,Toggled" bitfld.long 0x00 10. " OPPATTERNDATA[2] ,Output pattern mode bit[2]" "Not changed,Toggled" textline " " bitfld.long 0x00 9. " OPPATTERNDATA[1] ,Output pattern mode bit[1]" "Not changed,Toggled" bitfld.long 0x00 8. " OPPATTERNDATA[0] ,Output pattern mode bit[0]" "Not changed,Toggled" textline " " bitfld.long 0x00 7. " OUTPUTMODE ,Output Mode" "Direct Out,Toggle" bitfld.long 0x00 5.--6. " DETECTBIT ,Input event condition detect" "No events,Rising edge,Falling edge,Both edge" textline " " bitfld.long 0x00 1.--4. " SELECTBIT ,Select input event source" "Timer 1:2 side of Timer 3,Timer 3:4 side of Timer 3,?..." textline " " bitfld.long 0x00 0. " ENABLE ,RTO Enable" "Disabled,Enabled" width 0xb tree.end tree "McBSP (Multi-Channel Buffered Serial Port)" base asd:0x01D02000 width 9. rgroup.long 0x00++0x7 line.long 0x00 "DRR,Data Receive Register" line.long 0x04 "DXR,Data Transmit Ragister" if (((d.l(asd:0x01D02000+0x24))&0x2)==0x0) group.long 0x08++0x3 line.long 0x00 "SPCR,Serial Port Control Register" bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled" bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset" bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset" textline " " bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR" bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error" textline " " bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty" bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready" textline " " bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled" bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..." textline " " bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode bit" "Disabled,Reserved,Rising edge without delay,Rising edge with delay" textline " " bitfld.long 0x00 7. " DXENA ,DX enabler bit" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR" textline " " bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error" bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full" textline " " bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready" bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled" else group.long 0x08++0x3 line.long 0x00 "SPCR,Serial Port Control Register" bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled" bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset" bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset" textline " " bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR" bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error" textline " " bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty" bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready" textline " " bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled" bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..." textline " " bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode bit" "Disabled,Reserved,Falling edge without delay,Falling edge with delay" textline " " bitfld.long 0x00 7. " DXENA ,DX enabler bit" "Disabled,Enabled" bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR" textline " " bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error" bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full" textline " " bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready" bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled" endif group.long 0x0c++0x7 line.long 0x00 "RCR,Receive Control Register" bitfld.long 0x00 31. " RPHASE ,Receive phases" "Single,Dual" hexmask.long.byte 0x00 24.--30. 1. " RFRLEN2 ,Receive frame length (number of words) in phase 2" textline " " bitfld.long 0x00 21.--23. " RWDLEN2 ,Specifies the receive word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." bitfld.long 0x00 19.--20. " RCOMPAND ,Receive companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law" textline " " bitfld.long 0x00 18. " RFIG ,Receive frame ignore" "Not ignored,Ignored" bitfld.long 0x00 16.--17. " RDATDLY ,Receive data delay" "0-bit,1-bit,2-bit,?..." textline " " hexmask.long.byte 0x00 8.--14. 1. " RFRLEN1 ,Receive frame length (number of words) in phase 1" bitfld.long 0x00 5.--7. " RWDLEN1 ,Receive word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." textline " " bitfld.long 0x00 4. " RWDREVRS ,Receive 32-bit reversal enable" "Disabled,Enabled" line.long 0x04 "XCR,Transmit Control Register" bitfld.long 0x04 31. " XPHASE ,Transmit phases" "Single,Dual" hexmask.long.byte 0x04 24.--30. 1. " XFRLEN2 ,Transmit frame length (number of words) in phase 2" textline " " bitfld.long 0x04 21.--23. " XWDLEN2 ,Specifies the transmit word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." bitfld.long 0x04 19.--20. " XCOMPAND ,Transmit companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law" textline " " bitfld.long 0x04 18. " XFIG ,Transmit frame ignore" "Not ignored,Ignored" bitfld.long 0x04 16.--17. " XDATDLY ,Transmit data delay" "0-bit,1-bit,2-bit,?..." textline " " hexmask.long.byte 0x04 8.--14. 1. " XFRLEN1 ,Transmit frame length (number of words) in phase 1" bitfld.long 0x04 5.--7. " XWDLEN1 ,Transmit word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." textline " " bitfld.long 0x04 4. " XWDREVRS ,Transmit 32-bit reversal enable" "Disabled,Enabled" if (((d.l(asd:0x01D02000+0x24))&0x80)==0x80) group.long 0x14++0x3 line.long 0x00 "SRGR,Sample Rate Generator Register" bitfld.long 0x00 31. " GSYNC ,Sample-rate generator clock synchronization" "Free running,Frame-sync" bitfld.long 0x00 30. " CLKSP ,CLKS polarity clock edge select" "Rising edge,Falling edge" textline " " bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "MCBSP_CLKR pin,MCBSP_CLKX pin" bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG" textline " " hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1" hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock" else group.long 0x14++0x3 line.long 0x00 "SRGR,Sample Rate Generator Register" bitfld.long 0x00 31. " GSYNC ,Sample-rate generator clock synchronization" "Free running,Frame-sync" bitfld.long 0x00 30. " CLKSP ,CLKS polarity clock edge select" "Rising edge,Falling edge" textline " " bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "MCBSP_CLKS pin,McBSP internal" bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG" textline " " hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1" hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock" endif group.long 0x18++0x3 line.long 0x00 "MCR,Multichannel Control Register" bitfld.long 0x00 25. " XMCME ,Transmit multichannel partition mode bit" "2-partition,8-partition" bitfld.long 0x00 23.--24. " XPBBLK ,Transmit partition B block bit" "Block 1: ch. 16 - 31,Block 3: ch. 48 - 63,Block 5: ch. 80 - 95,Block 7: ch. 112 - 127" textline " " bitfld.long 0x00 21.--22. " XPABLK ,Transmit partition A block bit" "Block 0: ch. 0 - 15,Block 2: ch. 32 - 47,Block 4: ch. 64 - 79,Block 6: ch. 96 - 111" bitfld.long 0x00 18.--20. " XCBLK ,Transmit current block indicator" "Block 0: ch. 0 - 15,Block 1: ch. 16 - 31,Block 2: ch. 32 - 47,Block 3: ch. 48 - 63,Block 4: ch. 64 - 79,Block 5: ch. 80 - 95,Block 6: ch. 96 - 111,Block 7: ch. 112 - 127" textline " " bitfld.long 0x00 16.--17. " XMCM ,Transmit multichannel selection mode bit" "All ch. enabled & unmasked,All ch. disabled unless selected,All ch. enabled but masked unless selected,All ch. masked unless selected" textline " " bitfld.long 0x00 9. " RMCME ,Receive multichannel partition mode bit" "2-partition,8-partition" textline " " bitfld.long 0x00 7.--8. " RPBBLK ,Receive partition B block bit" "Block 1: ch. 16 - 31,Block 3: ch. 48 - 63,Block 5: ch. 80 - 95,Block 7: ch. 112 - 127" bitfld.long 0x00 5.--6. " RPABLK ,Receive partition A block bit" "Block 0: ch. 0 - 15,Block 2: ch. 32 - 47,Block 4: ch. 64 - 79,Block 6: ch. 96 - 111" textline " " bitfld.long 0x00 2.--4. " RCBLK ,Receive current block indicator" "Block 0: ch. 0 - 15,Block 1: ch. 16 - 31,Block 2: ch. 32 - 47,Block 3: ch. 48 - 63,Block 4: ch. 64 - 79,Block 5: ch. 80 - 95,Block 6: ch. 96 - 111,Block 7: ch. 112 - 127" bitfld.long 0x00 0. " RMCM ,Receive multichannel selection mode bit" "All ch. enabled,Multichannel selection" if ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x8000)&&(((d.l(asd:0x01D02000+0x08))&0x1800)==0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "McBSP internal,MCBSP_CLKX pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x0)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x8000)&&(((d.l(asd:0x01D02000+0x08))&0x1800)==0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "MCBSP_CLKS pin,MCBSP_CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x0)&&(((d.l(asd:0x01D02000+0x08))&0x1800)==0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "McBSP internal,MCBSP_CLKX pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x0)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x0)&&(((d.l(asd:0x01D02000+0x08))&0x1800)!=0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "Reserved,Master" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "MCBSP_CLKS pin,MCBSP_CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x8000)&&(((d.l(asd:0x01D02000+0x08))&0x1800)!=0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "Reserved,Master" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "McBSP internal,MCBSP_CLKX pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x0)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x8000)&&(((d.l(asd:0x01D02000+0x08))&0x1800)!=0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "Reserved,Master" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "MCBSP_CLKS pin,MCBSP_CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01D02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01D02000+0x08))&0x8000)==0x0)&&(((d.l(asd:0x01D02000+0x08))&0x1800)!=0x0000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "Reserved,Master" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "McBSP internal,MCBSP_CLKX pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" else group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" textline " " bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" textline " " bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "MCBSP_CLKS pin,MCBSP_CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" textline " " bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" endif tree "Enhanced receive channel enable register partition A/B C/D E/F G/H" if (((d.l(asd:0x01D02000+0x18))&0x201)==0x001) group.long 0x1c++0x3 line.long 0x00 "RCERE0,Enhanced Receive Channel Enable Registers" bitfld.long 0x00 31. " RCE31 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " RCE30 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " RCE29 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RCE28 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " RCE27 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " RCE26 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RCE25 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " RCE24 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " RCE23 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " RCE22 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " RCE21 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " RCE20 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RCE19 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " RCE18 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " RCE17 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RCE16 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " RCE15 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " RCE14 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RCE13 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " RCE12 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " RCE11 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RCE10 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " RCE9 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " RCE8 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RCE7 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " RCE6 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " RCE5 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RCE4 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " RCE3 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " RCE2 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RCE1 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " RCE0 ,Receive channel in partition A enable bit" "Disabled,Enabled" elif (((d.l(asd:0x01D02000+0x18))&0x201)==0x201) group.long 0x1c++0x3 line.long 0x00 "RCERE0,Enhanced Receive Channel Enable Registers" bitfld.long 0x00 31. " RCE31 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " RCE30 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " RCE29 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RCE28 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " RCE27 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " RCE26 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RCE25 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " RCE24 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " RCE23 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " RCE22 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " RCE21 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " RCE20 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RCE19 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " RCE18 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " RCE17 ,Receive channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RCE16 ,Receive channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " RCE15 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " RCE14 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RCE13 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " RCE12 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " RCE11 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RCE10 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " RCE9 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " RCE8 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RCE7 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " RCE6 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " RCE5 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RCE4 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " RCE3 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " RCE2 ,Receive channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RCE1 ,Receive channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " RCE0 ,Receive channel in partition A enable bit" "Disabled,Enabled" group.long 0x28++0x3 line.long 0x00 "RCERE1,Enhanced Receive Channel Enable Registers C/D" bitfld.long 0x00 31. " RCE31 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " RCE30 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " RCE29 ,Receive channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RCE28 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " RCE27 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " RCE26 ,Receive channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RCE25 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " RCE24 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " RCE23 ,Receive channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " RCE22 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " RCE21 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " RCE20 ,Receive channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RCE19 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " RCE18 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " RCE17 ,Receive channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RCE16 ,Receive channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " RCE15 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " RCE14 ,Receive channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RCE13 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " RCE12 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " RCE11 ,Receive channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RCE10 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " RCE9 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " RCE8 ,Receive channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RCE7 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " RCE6 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " RCE5 ,Receive channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RCE4 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " RCE3 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " RCE2 ,Receive channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RCE1 ,Receive channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " RCE0 ,Receive channel in partition C enable bit" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "RCERE2,Enhanced Receive Channel Enable Registers E/F" bitfld.long 0x00 31. " RCE31 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " RCE30 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " RCE29 ,Receive channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RCE28 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " RCE27 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " RCE26 ,Receive channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RCE25 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " RCE24 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " RCE23 ,Receive channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " RCE22 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " RCE21 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " RCE20 ,Receive channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RCE19 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " RCE18 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " RCE17 ,Receive channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RCE16 ,Receive channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " RCE15 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " RCE14 ,Receive channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RCE13 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " RCE12 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " RCE11 ,Receive channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RCE10 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " RCE9 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " RCE8 ,Receive channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RCE7 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " RCE6 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " RCE5 ,Receive channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RCE4 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " RCE3 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " RCE2 ,Receive channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RCE1 ,Receive channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " RCE0 ,Receive channel in partition E enable bit" "Disabled,Enabled" group.long 0x38++0x3 line.long 0x00 "RCERE3,Enhanced Receive Channel Enable Registers G/H" bitfld.long 0x00 31. " RCE31 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " RCE30 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " RCE29 ,Receive channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RCE28 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " RCE27 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " RCE26 ,Receive channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " RCE25 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " RCE24 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " RCE23 ,Receive channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " RCE22 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " RCE21 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " RCE20 ,Receive channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " RCE19 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " RCE18 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " RCE17 ,Receive channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RCE16 ,Receive channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " RCE15 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " RCE14 ,Receive channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " RCE13 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " RCE12 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " RCE11 ,Receive channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " RCE10 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " RCE9 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " RCE8 ,Receive channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RCE7 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " RCE6 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " RCE5 ,Receive channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RCE4 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " RCE3 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " RCE2 ,Receive channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RCE1 ,Receive channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " RCE0 ,Receive channel in partition G enable bit" "Disabled,Enabled" endif tree.end tree "Enhanced transmit channel enable register partition A/B C/D E/F G/H" if (((d.l(asd:0x01D02000+0x18))&0x2030000)==0x0010000) group.long 0x20++0x3 line.long 0x00 "XCERE0,Enhanced Transmit Channel Enable Registers A/B" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition A enable bit" "Disabled,Enabled" elif (((d.l(asd:0x01D02000+0x18))&0x2030000)==((0x020000)||(0x030000))) group.long 0x20++0x3 line.long 0x00 "XCERE0,Enhanced Transmit Channel Enable Registers A/B" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" elif (((d.l(asd:0x01D02000+0x18))&0x2030000)==0x2010000) group.long 0x20++0x3 line.long 0x00 "XCERE0,Enhanced Transmit Channel Enable Registers A/B" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition B enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition B enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition A enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition A enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition A enable bit" "Disabled,Enabled" group.long 0x2C++0x3 line.long 0x00 "XCERE1,Enhanced Transmit Channel Enable Registers C/D" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition D enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition D enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition C enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition C enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition C enable bit" "Disabled,Enabled" group.long 0x34++0x3 line.long 0x00 "XCERE2,Enhanced Transmit Channel Enable Registers E/F" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition F enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition F enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition E enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition E enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition E enable bit" "Disabled,Enabled" group.long 0x3C++0x3 line.long 0x00 "XCERE3,Enhanced Transmit Channel Enable Registers G/H" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition H enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition H enable bit" "Disabled,Enabled" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition G enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition G enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition G enable bit" "Disabled,Enabled" elif (((d.l(asd:0x01D02000+0x18))&0x2030000)==((0x2020000)||(0x2030000))) group.long 0x20++0x3 line.long 0x00 "XCERE0,Enhanced Transmit Channel Enable Registers A/B" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition B unmask bit" "Masked,Unmasked" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition A unmask bit" "Masked,Unmasked" group.long 0x2C++0x3 line.long 0x00 "XCERE1,Enhanced Transmit Channel Enable Registers C/D" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition D unmask bit" "Masked,Unmasked" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition C unmask bit" "Masked,Unmasked" group.long 0x34++0x3 line.long 0x00 "XCERE2,Enhanced Transmit Channel Enable Registers E/F" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition F unmask bit" "Masked,Unmasked" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition E unmask bit" "Masked,Unmasked" group.long 0x3C++0x3 line.long 0x00 "XCERE3,Enhanced Transmit Channel Enable Registers G/H" bitfld.long 0x00 31. " XCE31 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 30. " XCE30 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 29. " XCE29 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 28. " XCE28 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 27. " XCE27 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 26. " XCE26 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 25. " XCE25 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 24. " XCE24 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 23. " XCE23 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 22. " XCE22 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 21. " XCE21 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 20. " XCE20 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 19. " XCE19 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 18. " XCE18 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 17. " XCE17 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 16. " XCE16 ,Transmit channel in partition H unmask bit" "Masked,Unmasked" bitfld.long 0x00 15. " XCE15 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 14. " XCE14 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 13. " XCE13 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 12. " XCE12 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 11. " XCE11 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 10. " XCE10 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 9. " XCE9 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 8. " XCE8 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " XCE7 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 6. " XCE6 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 5. " XCE5 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 4. " XCE4 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 3. " XCE3 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 2. " XCE2 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" textline " " bitfld.long 0x00 1. " XCE1 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" bitfld.long 0x00 0. " XCE0 ,Transmit channel in partition G unmask bit" "Masked,Unmasked" endif tree.end width 0xb tree.end tree "FDIF (Face Detection Interface)" base asd:0x01C71800 width 15. rgroup.long 0x00++0x03 line.long 0x00 "FDIF_PID,FDIF PID Register" hexmask.long.byte 0x00 0.--7. 1. " PID ,PID" group.long 0x08++0x0b line.long 0x00 "FDIF_INTEN,FDIF Interrupt Enable Register" bitfld.long 0x00 0. " FINISH ,Interrupt enable for detect process finish" "Disabled,Enabled" line.long 0x04 "FDIF_PICADDR,FDIF Picture Data Address Register" hexmask.long 0x04 5.--31. 0x20 " PICADDR ,Picture Data Store Address" line.long 0x08 "FDIF_WKADDR,FDIF Work Area Address Register" hexmask.long 0x08 5.--31. 0x20 " WKADDR ,Work area address" group.long 0x20++0x03 line.long 0x00 "FD_CTRL,FD Core Control Register" eventfld.long 0x00 2. " FINISH ,Process finish flag" "Not finished,Finished" bitfld.long 0x00 1. " RUN ,Process Start request" "Not started,Started" bitfld.long 0x00 0. " SRST ,FD Core soft reset" "No reset,Reset" rgroup.long 0x24++0x03 line.long 0x00 "FD_DNUM,Face Detect Number Register" hexmask.long.byte 0x00 0.--5. 1. " DNUM ,Detection result number" group.long 0x28++0x17 line.long 0x00 "FD_DCOND,Detect Condition Set Register" bitfld.long 0x00 2.--3. " DIR ,Set detect direction" "Up,Right,Left,?..." bitfld.long 0x00 0.--1. " MIN ,Set detect minimum size" "20x20 pixels,25x25 pixels,32x32 pixels,40x40 pixels" line.long 0x04 "FD_STARTX,X Start Address Register" hexmask.long.byte 0x04 0.--7. 1. " STARTX ,X Start Address" line.long 0x08 "FD_STARTY,Y Start Address Register" hexmask.long.byte 0x08 0.--7. 1. " STARTY ,Y Start Address" line.long 0x0c "FD_SIZEX,X Size for Detection Register" hexmask.long.byte 0x0c 0.--7. 1. " SIZEX ,X size for detect process" line.long 0x10 "FD_SIZEY,Y Size for Detection Register" hexmask.long.byte 0x10 0.--7. 1. " SIZEY ,Y size for detect process" line.long 0x14 "FD_LHIT,Detect Process Threshold Register" bitfld.long 0x14 0.--3. " LHIT ,Detect process threshold" "0,1,2,3,4,5,6,7,8,9,?..." rgroup.long 0x100++0x0f line.long 0x00 "FD_CENTERX1,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX1 ,Center X address" line.long 0x04 "FD_CENTERY1,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY1 ,Center Y address" line.long 0x08 "FD_CONFSIZE1,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF1 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE1 ,Face size" line.long 0x0c "FD_ANGLE1,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE1 ,Angle" rgroup.long 0x110++0x0f line.long 0x00 "FD_CENTERX2,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX2 ,Center X address" line.long 0x04 "FD_CENTERY2,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY2 ,Center Y address" line.long 0x08 "FD_CONFSIZE2,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF2 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE2 ,Face size" line.long 0x0c "FD_ANGLE2,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE2 ,Angle" rgroup.long 0x120++0x0f line.long 0x00 "FD_CENTERX3,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX3 ,Center X address" line.long 0x04 "FD_CENTERY3,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY3 ,Center Y address" line.long 0x08 "FD_CONFSIZE3,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF3 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE3 ,Face size" line.long 0x0c "FD_ANGLE3,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE3 ,Angle" rgroup.long 0x130++0x0f line.long 0x00 "FD_CENTERX4,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX4 ,Center X address" line.long 0x04 "FD_CENTERY4,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY4 ,Center Y address" line.long 0x08 "FD_CONFSIZE4,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF4 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE4 ,Face size" line.long 0x0c "FD_ANGLE4,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE4 ,Angle" rgroup.long 0x140++0x0f line.long 0x00 "FD_CENTERX5,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX5 ,Center X address" line.long 0x04 "FD_CENTERY5,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY5 ,Center Y address" line.long 0x08 "FD_CONFSIZE5,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF5 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE5 ,Face size" line.long 0x0c "FD_ANGLE5,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE5 ,Angle" rgroup.long 0x150++0x0f line.long 0x00 "FD_CENTERX6,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX6 ,Center X address" line.long 0x04 "FD_CENTERY6,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY6 ,Center Y address" line.long 0x08 "FD_CONFSIZE6,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF6 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE6 ,Face size" line.long 0x0c "FD_ANGLE6,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE6 ,Angle" rgroup.long 0x160++0x0f line.long 0x00 "FD_CENTERX7,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX7 ,Center X address" line.long 0x04 "FD_CENTERY7,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY7 ,Center Y address" line.long 0x08 "FD_CONFSIZE7,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF7 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE7 ,Face size" line.long 0x0c "FD_ANGLE7,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE7 ,Angle" rgroup.long 0x170++0x0f line.long 0x00 "FD_CENTERX8,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX8 ,Center X address" line.long 0x04 "FD_CENTERY8,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY8 ,Center Y address" line.long 0x08 "FD_CONFSIZE8,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF8 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE8 ,Face size" line.long 0x0c "FD_ANGLE8,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE8 ,Angle" rgroup.long 0x180++0x0f line.long 0x00 "FD_CENTERX9,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX9 ,Center X address" line.long 0x04 "FD_CENTERY9,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY9 ,Center Y address" line.long 0x08 "FD_CONFSIZE9,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF9 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE9 ,Face size" line.long 0x0c "FD_ANGLE9,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE9 ,Angle" rgroup.long 0x190++0x0f line.long 0x00 "FD_CENTERX10,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX10 ,Center X address" line.long 0x04 "FD_CENTERY10,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY10 ,Center Y address" line.long 0x08 "FD_CONFSIZE10,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF10 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE10 ,Face size" line.long 0x0c "FD_ANGLE10,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE10 ,Angle" rgroup.long 0x1A0++0x0f line.long 0x00 "FD_CENTERX11,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX11 ,Center X address" line.long 0x04 "FD_CENTERY11,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY11 ,Center Y address" line.long 0x08 "FD_CONFSIZE11,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF11 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE11 ,Face size" line.long 0x0c "FD_ANGLE11,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE11 ,Angle" rgroup.long 0x1B0++0x0f line.long 0x00 "FD_CENTERX12,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX12 ,Center X address" line.long 0x04 "FD_CENTERY12,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY12 ,Center Y address" line.long 0x08 "FD_CONFSIZE12,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF12 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE12 ,Face size" line.long 0x0c "FD_ANGLE12,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE12 ,Angle" rgroup.long 0x1C0++0x0f line.long 0x00 "FD_CENTERX13,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX13 ,Center X address" line.long 0x04 "FD_CENTERY13,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY13 ,Center Y address" line.long 0x08 "FD_CONFSIZE13,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF13 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE13 ,Face size" line.long 0x0c "FD_ANGLE13,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE13 ,Angle" rgroup.long 0x1D0++0x0f line.long 0x00 "FD_CENTERX14,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX14 ,Center X address" line.long 0x04 "FD_CENTERY14,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY14 ,Center Y address" line.long 0x08 "FD_CONFSIZE14,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF14 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE14 ,Face size" line.long 0x0c "FD_ANGLE14,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE14 ,Angle" rgroup.long 0x1E0++0x0f line.long 0x00 "FD_CENTERX15,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX15 ,Center X address" line.long 0x04 "FD_CENTERY15,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY15 ,Center Y address" line.long 0x08 "FD_CONFSIZE15,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF15 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE15 ,Face size" line.long 0x0c "FD_ANGLE15,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE15 ,Angle" rgroup.long 0x1F0++0x0f line.long 0x00 "FD_CENTERX16,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX16 ,Center X address" line.long 0x04 "FD_CENTERY16,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY16 ,Center Y address" line.long 0x08 "FD_CONFSIZE16,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF16 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE16 ,Face size" line.long 0x0c "FD_ANGLE16,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE16 ,Angle" rgroup.long 0x200++0x0f line.long 0x00 "FD_CENTERX17,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX17 ,Center X address" line.long 0x04 "FD_CENTERY17,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY17 ,Center Y address" line.long 0x08 "FD_CONFSIZE17,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF17 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE17 ,Face size" line.long 0x0c "FD_ANGLE17,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE17 ,Angle" rgroup.long 0x210++0x0f line.long 0x00 "FD_CENTERX18,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX18 ,Center X address" line.long 0x04 "FD_CENTERY18,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY18 ,Center Y address" line.long 0x08 "FD_CONFSIZE18,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF18 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE18 ,Face size" line.long 0x0c "FD_ANGLE18,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE18 ,Angle" rgroup.long 0x220++0x0f line.long 0x00 "FD_CENTERX19,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX19 ,Center X address" line.long 0x04 "FD_CENTERY19,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY19 ,Center Y address" line.long 0x08 "FD_CONFSIZE19,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF19 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE19 ,Face size" line.long 0x0c "FD_ANGLE19,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE19 ,Angle" rgroup.long 0x230++0x0f line.long 0x00 "FD_CENTERX20,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX20 ,Center X address" line.long 0x04 "FD_CENTERY20,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY20 ,Center Y address" line.long 0x08 "FD_CONFSIZE20,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF20 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE20 ,Face size" line.long 0x0c "FD_ANGLE20,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE20 ,Angle" rgroup.long 0x240++0x0f line.long 0x00 "FD_CENTERX21,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX21 ,Center X address" line.long 0x04 "FD_CENTERY21,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY21 ,Center Y address" line.long 0x08 "FD_CONFSIZE21,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF21 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE21 ,Face size" line.long 0x0c "FD_ANGLE21,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE21 ,Angle" rgroup.long 0x250++0x0f line.long 0x00 "FD_CENTERX22,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX22 ,Center X address" line.long 0x04 "FD_CENTERY22,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY22 ,Center Y address" line.long 0x08 "FD_CONFSIZE22,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF22 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE22 ,Face size" line.long 0x0c "FD_ANGLE22,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE22 ,Angle" rgroup.long 0x260++0x0f line.long 0x00 "FD_CENTERX23,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX23 ,Center X address" line.long 0x04 "FD_CENTERY23,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY23 ,Center Y address" line.long 0x08 "FD_CONFSIZE23,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF23 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE23 ,Face size" line.long 0x0c "FD_ANGLE23,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE23 ,Angle" rgroup.long 0x270++0x0f line.long 0x00 "FD_CENTERX24,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX24 ,Center X address" line.long 0x04 "FD_CENTERY24,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY24 ,Center Y address" line.long 0x08 "FD_CONFSIZE24,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF24 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE24 ,Face size" line.long 0x0c "FD_ANGLE24,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE24 ,Angle" rgroup.long 0x280++0x0f line.long 0x00 "FD_CENTERX25,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX25 ,Center X address" line.long 0x04 "FD_CENTERY25,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY25 ,Center Y address" line.long 0x08 "FD_CONFSIZE25,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF25 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE25 ,Face size" line.long 0x0c "FD_ANGLE25,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE25 ,Angle" rgroup.long 0x290++0x0f line.long 0x00 "FD_CENTERX26,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX26 ,Center X address" line.long 0x04 "FD_CENTERY26,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY26 ,Center Y address" line.long 0x08 "FD_CONFSIZE26,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF26 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE26 ,Face size" line.long 0x0c "FD_ANGLE26,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE26 ,Angle" rgroup.long 0x2A0++0x0f line.long 0x00 "FD_CENTERX27,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX27 ,Center X address" line.long 0x04 "FD_CENTERY27,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY27 ,Center Y address" line.long 0x08 "FD_CONFSIZE27,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF27 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE27 ,Face size" line.long 0x0c "FD_ANGLE27,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE27 ,Angle" rgroup.long 0x2B0++0x0f line.long 0x00 "FD_CENTERX28,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX28 ,Center X address" line.long 0x04 "FD_CENTERY28,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY28 ,Center Y address" line.long 0x08 "FD_CONFSIZE28,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF28 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE28 ,Face size" line.long 0x0c "FD_ANGLE28,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE28 ,Angle" rgroup.long 0x2C0++0x0f line.long 0x00 "FD_CENTERX29,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX29 ,Center X address" line.long 0x04 "FD_CENTERY29,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY29 ,Center Y address" line.long 0x08 "FD_CONFSIZE29,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF29 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE29 ,Face size" line.long 0x0c "FD_ANGLE29,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE29 ,Angle" rgroup.long 0x2D0++0x0f line.long 0x00 "FD_CENTERX30,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX30 ,Center X address" line.long 0x04 "FD_CENTERY30,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY30 ,Center Y address" line.long 0x08 "FD_CONFSIZE30,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF30 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE30 ,Face size" line.long 0x0c "FD_ANGLE30,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE30 ,Angle" rgroup.long 0x2E0++0x0f line.long 0x00 "FD_CENTERX31,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX31 ,Center X address" line.long 0x04 "FD_CENTERY31,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY31 ,Center Y address" line.long 0x08 "FD_CONFSIZE31,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF31 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE31 ,Face size" line.long 0x0c "FD_ANGLE31,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE31 ,Angle" rgroup.long 0x2F0++0x0f line.long 0x00 "FD_CENTERX32,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX32 ,Center X address" line.long 0x04 "FD_CENTERY32,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY32 ,Center Y address" line.long 0x08 "FD_CONFSIZE32,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF32 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE32 ,Face size" line.long 0x0c "FD_ANGLE32,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE32 ,Angle" rgroup.long 0x300++0x0f line.long 0x00 "FD_CENTERX33,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX33 ,Center X address" line.long 0x04 "FD_CENTERY33,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY33 ,Center Y address" line.long 0x08 "FD_CONFSIZE33,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF33 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE33 ,Face size" line.long 0x0c "FD_ANGLE33,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE33 ,Angle" rgroup.long 0x310++0x0f line.long 0x00 "FD_CENTERX34,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX34 ,Center X address" line.long 0x04 "FD_CENTERY34,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY34 ,Center Y address" line.long 0x08 "FD_CONFSIZE34,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF34 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE34 ,Face size" line.long 0x0c "FD_ANGLE34,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE34 ,Angle" rgroup.long 0x320++0x0f line.long 0x00 "FD_CENTERX35,Detect Result Center X Address Register" hexmask.long.word 0x00 0.--8. 1. " CENTERX35 ,Center X address" line.long 0x04 "FD_CENTERY35,Detect Result Center Y Address Register" hexmask.long.byte 0x04 0.--7. 1. " CENTERY35 ,Center Y address" line.long 0x08 "FD_CONFSIZE35,Detect Result Confidence/Size Register" hexmask.long.byte 0x08 8.--11. 1. " CONF35 ,Confidence" hexmask.long.byte 0x08 0.--7. 1. " SIZE35 ,Face size" line.long 0x0c "FD_ANGLE35,Detect Angle Register" hexmask.long.word 0x0c 0.--8. 1. " ANGLE35 ,Angle" width 0xb tree.end textline ""